dp_rx_err.c 82 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include "hal_api.h"
  25. #include "qdf_trace.h"
  26. #include "qdf_nbuf.h"
  27. #include "dp_rx_defrag.h"
  28. #include "dp_ipa.h"
  29. #ifdef FEATURE_WDS
  30. #include "dp_txrx_wds.h"
  31. #endif
  32. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  33. #include "qdf_net_types.h"
  34. #include "dp_rx_buffer_pool.h"
  35. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  36. #define dp_rx_err_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_ERROR, params)
  37. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  38. #define dp_rx_err_info(params...) \
  39. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  40. #define dp_rx_err_info_rl(params...) \
  41. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  42. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  44. /* Max buffer in invalid peer SG list*/
  45. #define DP_MAX_INVALID_BUFFERS 10
  46. /* Max regular Rx packet routing error */
  47. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  48. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  49. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  50. #ifdef FEATURE_MEC
  51. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  52. struct dp_peer *peer,
  53. uint8_t *rx_tlv_hdr,
  54. qdf_nbuf_t nbuf)
  55. {
  56. struct dp_vdev *vdev = peer->vdev;
  57. struct dp_pdev *pdev = vdev->pdev;
  58. struct dp_mec_entry *mecentry = NULL;
  59. struct dp_ast_entry *ase = NULL;
  60. uint16_t sa_idx = 0;
  61. uint8_t *data;
  62. /*
  63. * Multicast Echo Check is required only if vdev is STA and
  64. * received pkt is a multicast/broadcast pkt. otherwise
  65. * skip the MEC check.
  66. */
  67. if (vdev->opmode != wlan_op_mode_sta)
  68. return false;
  69. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  70. return false;
  71. data = qdf_nbuf_data(nbuf);
  72. /*
  73. * if the received pkts src mac addr matches with vdev
  74. * mac address then drop the pkt as it is looped back
  75. */
  76. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  77. vdev->mac_addr.raw,
  78. QDF_MAC_ADDR_SIZE)))
  79. return true;
  80. /*
  81. * In case of qwrap isolation mode, donot drop loopback packets.
  82. * In isolation mode, all packets from the wired stations need to go
  83. * to rootap and loop back to reach the wireless stations and
  84. * vice-versa.
  85. */
  86. if (qdf_unlikely(vdev->isolation_vdev))
  87. return false;
  88. /*
  89. * if the received pkts src mac addr matches with the
  90. * wired PCs MAC addr which is behind the STA or with
  91. * wireless STAs MAC addr which are behind the Repeater,
  92. * then drop the pkt as it is looped back
  93. */
  94. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  95. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  96. if ((sa_idx < 0) ||
  97. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  98. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  99. "invalid sa_idx: %d", sa_idx);
  100. qdf_assert_always(0);
  101. }
  102. qdf_spin_lock_bh(&soc->ast_lock);
  103. ase = soc->ast_table[sa_idx];
  104. /*
  105. * this check was not needed since MEC is not dependent on AST,
  106. * but if we dont have this check SON has some issues in
  107. * dual backhaul scenario. in APS SON mode, client connected
  108. * to RE 2G and sends multicast packets. the RE sends it to CAP
  109. * over 5G backhaul. the CAP loopback it on 2G to RE.
  110. * On receiving in 2G STA vap, we assume that client has roamed
  111. * and kickout the client.
  112. */
  113. if (ase && (ase->peer_id != peer->peer_id)) {
  114. qdf_spin_unlock_bh(&soc->ast_lock);
  115. goto drop;
  116. }
  117. qdf_spin_unlock_bh(&soc->ast_lock);
  118. }
  119. qdf_spin_lock_bh(&soc->mec_lock);
  120. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  121. &data[QDF_MAC_ADDR_SIZE]);
  122. if (!mecentry) {
  123. qdf_spin_unlock_bh(&soc->mec_lock);
  124. return false;
  125. }
  126. qdf_spin_unlock_bh(&soc->mec_lock);
  127. drop:
  128. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  129. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  130. return true;
  131. }
  132. #endif
  133. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  134. void dp_rx_link_desc_refill_duplicate_check(
  135. struct dp_soc *soc,
  136. struct hal_buf_info *buf_info,
  137. hal_buff_addrinfo_t ring_buf_info)
  138. {
  139. struct hal_buf_info current_link_desc_buf_info = { 0 };
  140. /* do duplicate link desc address check */
  141. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  142. &current_link_desc_buf_info);
  143. /*
  144. * TODO - Check if the hal soc api call can be removed
  145. * since the cookie is just used for print.
  146. * buffer_addr_info is the first element of ring_desc
  147. */
  148. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  149. (uint32_t *)ring_buf_info,
  150. &current_link_desc_buf_info);
  151. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  152. buf_info->paddr)) {
  153. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  154. current_link_desc_buf_info.paddr,
  155. current_link_desc_buf_info.sw_cookie);
  156. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  157. }
  158. *buf_info = current_link_desc_buf_info;
  159. }
  160. /**
  161. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  162. * (WBM) by address
  163. *
  164. * @soc: core DP main context
  165. * @link_desc_addr: link descriptor addr
  166. *
  167. * Return: QDF_STATUS
  168. */
  169. QDF_STATUS
  170. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  171. hal_buff_addrinfo_t link_desc_addr,
  172. uint8_t bm_action)
  173. {
  174. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  175. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  176. hal_soc_handle_t hal_soc = soc->hal_soc;
  177. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  178. void *src_srng_desc;
  179. if (!wbm_rel_srng) {
  180. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  181. return status;
  182. }
  183. /* do duplicate link desc address check */
  184. dp_rx_link_desc_refill_duplicate_check(
  185. soc,
  186. &soc->last_op_info.wbm_rel_link_desc,
  187. link_desc_addr);
  188. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  189. /* TODO */
  190. /*
  191. * Need API to convert from hal_ring pointer to
  192. * Ring Type / Ring Id combo
  193. */
  194. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  195. soc, wbm_rel_srng);
  196. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  197. goto done;
  198. }
  199. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  200. if (qdf_likely(src_srng_desc)) {
  201. /* Return link descriptor through WBM ring (SW2WBM)*/
  202. hal_rx_msdu_link_desc_set(hal_soc,
  203. src_srng_desc, link_desc_addr, bm_action);
  204. status = QDF_STATUS_SUCCESS;
  205. } else {
  206. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  207. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  208. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  209. srng->ring_id,
  210. soc->stats.rx.err.hal_ring_access_full_fail);
  211. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  212. *srng->u.src_ring.hp_addr,
  213. srng->u.src_ring.reap_hp,
  214. *srng->u.src_ring.tp_addr,
  215. srng->u.src_ring.cached_tp);
  216. QDF_BUG(0);
  217. }
  218. done:
  219. hal_srng_access_end(hal_soc, wbm_rel_srng);
  220. return status;
  221. }
  222. /**
  223. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  224. * (WBM), following error handling
  225. *
  226. * @soc: core DP main context
  227. * @ring_desc: opaque pointer to the REO error ring descriptor
  228. *
  229. * Return: QDF_STATUS
  230. */
  231. QDF_STATUS
  232. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  233. uint8_t bm_action)
  234. {
  235. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  236. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  237. }
  238. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  239. /**
  240. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  241. *
  242. * @soc: core txrx main context
  243. * @ring_desc: opaque pointer to the REO error ring descriptor
  244. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  245. * @head: head of the local descriptor free-list
  246. * @tail: tail of the local descriptor free-list
  247. * @quota: No. of units (packets) that can be serviced in one shot.
  248. *
  249. * This function is used to drop all MSDU in an MPDU
  250. *
  251. * Return: uint32_t: No. of elements processed
  252. */
  253. static uint32_t
  254. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  255. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  256. uint8_t *mac_id,
  257. uint32_t quota)
  258. {
  259. uint32_t rx_bufs_used = 0;
  260. void *link_desc_va;
  261. struct hal_buf_info buf_info;
  262. struct dp_pdev *pdev;
  263. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  264. int i;
  265. uint8_t *rx_tlv_hdr;
  266. uint32_t tid;
  267. struct rx_desc_pool *rx_desc_pool;
  268. struct dp_rx_desc *rx_desc;
  269. /* First field in REO Dst ring Desc is buffer_addr_info */
  270. void *buf_addr_info = ring_desc;
  271. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  272. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  273. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  274. /* buffer_addr_info is the first element of ring_desc */
  275. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  276. (uint32_t *)ring_desc,
  277. &buf_info);
  278. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  279. more_msdu_link_desc:
  280. /* No UNMAP required -- this is "malloc_consistent" memory */
  281. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  282. &mpdu_desc_info->msdu_count);
  283. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  284. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc,
  285. msdu_list.sw_cookie[i]);
  286. qdf_assert_always(rx_desc);
  287. /* all buffers from a MSDU link link belong to same pdev */
  288. *mac_id = rx_desc->pool_id;
  289. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  290. if (!pdev) {
  291. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  292. soc, rx_desc->pool_id);
  293. return rx_bufs_used;
  294. }
  295. if (!dp_rx_desc_check_magic(rx_desc)) {
  296. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  297. soc, msdu_list.sw_cookie[i]);
  298. return rx_bufs_used;
  299. }
  300. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  301. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  302. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  303. rx_desc_pool->buf_size,
  304. false);
  305. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  306. QDF_DMA_FROM_DEVICE,
  307. rx_desc_pool->buf_size);
  308. rx_desc->unmapped = 1;
  309. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  310. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  311. rx_bufs_used++;
  312. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  313. rx_desc->rx_buf_start);
  314. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  315. soc, tid);
  316. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  317. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  318. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  319. /* Just free the buffers */
  320. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  321. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  322. &pdev->free_list_tail, rx_desc);
  323. }
  324. /*
  325. * If the msdu's are spread across multiple link-descriptors,
  326. * we cannot depend solely on the msdu_count(e.g., if msdu is
  327. * spread across multiple buffers).Hence, it is
  328. * necessary to check the next link_descriptor and release
  329. * all the msdu's that are part of it.
  330. */
  331. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  332. link_desc_va,
  333. &next_link_desc_addr_info);
  334. if (hal_rx_is_buf_addr_info_valid(
  335. &next_link_desc_addr_info)) {
  336. /* Clear the next link desc info for the current link_desc */
  337. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  338. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  339. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  340. hal_rx_buffer_addr_info_get_paddr(
  341. &next_link_desc_addr_info,
  342. &buf_info);
  343. /* buffer_addr_info is the first element of ring_desc */
  344. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  345. (uint32_t *)&next_link_desc_addr_info,
  346. &buf_info);
  347. cur_link_desc_addr_info = next_link_desc_addr_info;
  348. buf_addr_info = &cur_link_desc_addr_info;
  349. link_desc_va =
  350. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  351. goto more_msdu_link_desc;
  352. }
  353. quota--;
  354. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  355. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  356. return rx_bufs_used;
  357. }
  358. /**
  359. * dp_rx_pn_error_handle() - Handles PN check errors
  360. *
  361. * @soc: core txrx main context
  362. * @ring_desc: opaque pointer to the REO error ring descriptor
  363. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  364. * @head: head of the local descriptor free-list
  365. * @tail: tail of the local descriptor free-list
  366. * @quota: No. of units (packets) that can be serviced in one shot.
  367. *
  368. * This function implements PN error handling
  369. * If the peer is configured to ignore the PN check errors
  370. * or if DP feels, that this frame is still OK, the frame can be
  371. * re-injected back to REO to use some of the other features
  372. * of REO e.g. duplicate detection/routing to other cores
  373. *
  374. * Return: uint32_t: No. of elements processed
  375. */
  376. static uint32_t
  377. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  378. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  379. uint8_t *mac_id,
  380. uint32_t quota)
  381. {
  382. uint16_t peer_id;
  383. uint32_t rx_bufs_used = 0;
  384. struct dp_peer *peer;
  385. bool peer_pn_policy = false;
  386. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  387. mpdu_desc_info->peer_meta_data);
  388. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  389. if (qdf_likely(peer)) {
  390. /*
  391. * TODO: Check for peer specific policies & set peer_pn_policy
  392. */
  393. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  394. "discard rx due to PN error for peer %pK "QDF_MAC_ADDR_FMT,
  395. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  396. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  397. }
  398. dp_rx_err_err("%pK: Packet received with PN error", soc);
  399. /* No peer PN policy -- definitely drop */
  400. if (!peer_pn_policy)
  401. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  402. mpdu_desc_info,
  403. mac_id, quota);
  404. return rx_bufs_used;
  405. }
  406. /**
  407. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  408. *
  409. * @soc: core txrx main context
  410. * @nbuf: pointer to msdu skb
  411. * @peer_id: dp peer ID
  412. * @rx_tlv_hdr: start of rx tlv header
  413. *
  414. * This function process the msdu delivered from REO2TCL
  415. * ring with error type OOR
  416. *
  417. * Return: None
  418. */
  419. static void
  420. dp_rx_oor_handle(struct dp_soc *soc,
  421. qdf_nbuf_t nbuf,
  422. uint16_t peer_id,
  423. uint8_t *rx_tlv_hdr)
  424. {
  425. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  426. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  427. struct dp_peer *peer = NULL;
  428. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  429. if (!peer) {
  430. dp_info_rl("peer not found");
  431. goto free_nbuf;
  432. }
  433. if (dp_rx_deliver_special_frame(soc, peer, nbuf, frame_mask,
  434. rx_tlv_hdr)) {
  435. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  436. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  437. return;
  438. }
  439. free_nbuf:
  440. if (peer)
  441. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  442. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  443. qdf_nbuf_free(nbuf);
  444. }
  445. /**
  446. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  447. *
  448. * @soc: core txrx main context
  449. * @ring_desc: opaque pointer to the REO error ring descriptor
  450. * @mpdu_desc_info: pointer to mpdu level description info
  451. * @link_desc_va: pointer to msdu_link_desc virtual address
  452. * @err_code: reo erro code fetched from ring entry
  453. *
  454. * Function to handle msdus fetched from msdu link desc, currently
  455. * only support 2K jump, OOR error.
  456. *
  457. * Return: msdu count processed.
  458. */
  459. static uint32_t
  460. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  461. void *ring_desc,
  462. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  463. void *link_desc_va,
  464. enum hal_reo_error_code err_code)
  465. {
  466. uint32_t rx_bufs_used = 0;
  467. struct dp_pdev *pdev;
  468. int i;
  469. uint8_t *rx_tlv_hdr_first;
  470. uint8_t *rx_tlv_hdr_last;
  471. uint32_t tid = DP_MAX_TIDS;
  472. uint16_t peer_id;
  473. struct dp_rx_desc *rx_desc;
  474. struct rx_desc_pool *rx_desc_pool;
  475. qdf_nbuf_t nbuf;
  476. struct hal_buf_info buf_info;
  477. struct hal_rx_msdu_list msdu_list;
  478. uint16_t num_msdus;
  479. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  480. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  481. /* First field in REO Dst ring Desc is buffer_addr_info */
  482. void *buf_addr_info = ring_desc;
  483. qdf_nbuf_t head_nbuf = NULL;
  484. qdf_nbuf_t tail_nbuf = NULL;
  485. uint16_t msdu_processed = 0;
  486. bool ret;
  487. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  488. mpdu_desc_info->peer_meta_data);
  489. more_msdu_link_desc:
  490. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  491. &num_msdus);
  492. for (i = 0; i < num_msdus; i++) {
  493. rx_desc = dp_rx_cookie_2_va_rxdma_buf(
  494. soc,
  495. msdu_list.sw_cookie[i]);
  496. qdf_assert_always(rx_desc);
  497. /* all buffers from a MSDU link belong to same pdev */
  498. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  499. nbuf = rx_desc->nbuf;
  500. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  501. msdu_list.paddr[i]);
  502. if (!ret) {
  503. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  504. rx_desc->in_err_state = 1;
  505. continue;
  506. }
  507. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  508. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  509. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf,
  510. rx_desc_pool->buf_size,
  511. false);
  512. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  513. QDF_DMA_FROM_DEVICE,
  514. rx_desc_pool->buf_size);
  515. rx_desc->unmapped = 1;
  516. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  517. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  518. rx_bufs_used++;
  519. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  520. &pdev->free_list_tail, rx_desc);
  521. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  522. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  523. HAL_MSDU_F_MSDU_CONTINUATION))
  524. continue;
  525. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  526. rx_desc->pool_id)) {
  527. /* MSDU queued back to the pool */
  528. goto process_next_msdu;
  529. }
  530. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  531. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  532. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  533. nbuf = dp_rx_sg_create(soc, head_nbuf);
  534. qdf_nbuf_set_is_frag(nbuf, 1);
  535. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  536. }
  537. switch (err_code) {
  538. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  539. /*
  540. * only first msdu, mpdu start description tlv valid?
  541. * and use it for following msdu.
  542. */
  543. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  544. rx_tlv_hdr_last))
  545. tid = hal_rx_mpdu_start_tid_get(
  546. soc->hal_soc,
  547. rx_tlv_hdr_first);
  548. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  549. peer_id, tid);
  550. break;
  551. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  552. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  553. break;
  554. default:
  555. dp_err_rl("Non-support error code %d", err_code);
  556. qdf_nbuf_free(nbuf);
  557. }
  558. process_next_msdu:
  559. msdu_processed++;
  560. head_nbuf = NULL;
  561. tail_nbuf = NULL;
  562. }
  563. /*
  564. * If the msdu's are spread across multiple link-descriptors,
  565. * we cannot depend solely on the msdu_count(e.g., if msdu is
  566. * spread across multiple buffers).Hence, it is
  567. * necessary to check the next link_descriptor and release
  568. * all the msdu's that are part of it.
  569. */
  570. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  571. link_desc_va,
  572. &next_link_desc_addr_info);
  573. if (hal_rx_is_buf_addr_info_valid(
  574. &next_link_desc_addr_info)) {
  575. /* Clear the next link desc info for the current link_desc */
  576. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  577. dp_rx_link_desc_return_by_addr(
  578. soc,
  579. buf_addr_info,
  580. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  581. hal_rx_buffer_addr_info_get_paddr(
  582. &next_link_desc_addr_info,
  583. &buf_info);
  584. /* buffer_addr_info is the first element of ring_desc */
  585. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  586. (uint32_t *)&next_link_desc_addr_info,
  587. &buf_info);
  588. link_desc_va =
  589. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  590. cur_link_desc_addr_info = next_link_desc_addr_info;
  591. buf_addr_info = &cur_link_desc_addr_info;
  592. goto more_msdu_link_desc;
  593. }
  594. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  595. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  596. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  597. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  598. return rx_bufs_used;
  599. }
  600. #ifdef DP_INVALID_PEER_ASSERT
  601. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) \
  602. do { \
  603. qdf_assert_always(!(head)); \
  604. qdf_assert_always(!(tail)); \
  605. } while (0)
  606. #else
  607. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) /* no op */
  608. #endif
  609. /**
  610. * dp_rx_chain_msdus() - Function to chain all msdus of a mpdu
  611. * to pdev invalid peer list
  612. *
  613. * @soc: core DP main context
  614. * @nbuf: Buffer pointer
  615. * @rx_tlv_hdr: start of rx tlv header
  616. * @mac_id: mac id
  617. *
  618. * Return: bool: true for last msdu of mpdu
  619. */
  620. static bool
  621. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  622. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  623. {
  624. bool mpdu_done = false;
  625. qdf_nbuf_t curr_nbuf = NULL;
  626. qdf_nbuf_t tmp_nbuf = NULL;
  627. /* TODO: Currently only single radio is supported, hence
  628. * pdev hard coded to '0' index
  629. */
  630. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  631. if (!dp_pdev) {
  632. dp_rx_err_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  633. return mpdu_done;
  634. }
  635. /* if invalid peer SG list has max values free the buffers in list
  636. * and treat current buffer as start of list
  637. *
  638. * current logic to detect the last buffer from attn_tlv is not reliable
  639. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  640. * up
  641. */
  642. if (!dp_pdev->first_nbuf ||
  643. (dp_pdev->invalid_peer_head_msdu &&
  644. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  645. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  646. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  647. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  648. rx_tlv_hdr);
  649. dp_pdev->first_nbuf = true;
  650. /* If the new nbuf received is the first msdu of the
  651. * amsdu and there are msdus in the invalid peer msdu
  652. * list, then let us free all the msdus of the invalid
  653. * peer msdu list.
  654. * This scenario can happen when we start receiving
  655. * new a-msdu even before the previous a-msdu is completely
  656. * received.
  657. */
  658. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  659. while (curr_nbuf) {
  660. tmp_nbuf = curr_nbuf->next;
  661. qdf_nbuf_free(curr_nbuf);
  662. curr_nbuf = tmp_nbuf;
  663. }
  664. dp_pdev->invalid_peer_head_msdu = NULL;
  665. dp_pdev->invalid_peer_tail_msdu = NULL;
  666. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc, rx_tlv_hdr,
  667. &(dp_pdev->ppdu_info.rx_status));
  668. }
  669. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  670. rx_tlv_hdr) &&
  671. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  672. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  673. qdf_assert_always(dp_pdev->first_nbuf == true);
  674. dp_pdev->first_nbuf = false;
  675. mpdu_done = true;
  676. }
  677. /*
  678. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  679. * should be NULL here, add the checking for debugging purpose
  680. * in case some corner case.
  681. */
  682. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  683. dp_pdev->invalid_peer_tail_msdu);
  684. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  685. dp_pdev->invalid_peer_tail_msdu,
  686. nbuf);
  687. return mpdu_done;
  688. }
  689. static
  690. void dp_rx_err_handle_bar(struct dp_soc *soc,
  691. struct dp_peer *peer,
  692. qdf_nbuf_t nbuf)
  693. {
  694. uint8_t *rx_tlv_hdr;
  695. unsigned char type, subtype;
  696. uint16_t start_seq_num;
  697. uint32_t tid;
  698. QDF_STATUS status;
  699. struct ieee80211_frame_bar *bar;
  700. /*
  701. * 1. Is this a BAR frame. If not Discard it.
  702. * 2. If it is, get the peer id, tid, ssn
  703. * 2a Do a tid update
  704. */
  705. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  706. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  707. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  708. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  709. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  710. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  711. dp_err_rl("Not a BAR frame!");
  712. return;
  713. }
  714. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  715. qdf_assert_always(tid < DP_MAX_TIDS);
  716. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  717. dp_info_rl("tid %u window_size %u start_seq_num %u",
  718. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  719. status = dp_rx_tid_update_wifi3(peer, tid,
  720. peer->rx_tid[tid].ba_win_size,
  721. start_seq_num);
  722. if (status != QDF_STATUS_SUCCESS) {
  723. dp_err_rl("failed to handle bar frame update rx tid");
  724. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  725. } else {
  726. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  727. }
  728. }
  729. /**
  730. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  731. * @soc: core DP main context
  732. * @ring_desc: Hal ring desc
  733. * @rx_desc: dp rx desc
  734. * @mpdu_desc_info: mpdu desc info
  735. *
  736. * Handle the error BAR frames received. Ensure the SOC level
  737. * stats are updated based on the REO error code. The BAR frames
  738. * are further processed by updating the Rx tids with the start
  739. * sequence number (SSN) and BA window size. Desc is returned
  740. * to the free desc list
  741. *
  742. * Return: none
  743. */
  744. static void
  745. dp_rx_bar_frame_handle(struct dp_soc *soc,
  746. hal_ring_desc_t ring_desc,
  747. struct dp_rx_desc *rx_desc,
  748. struct hal_rx_mpdu_desc_info *mpdu_desc_info)
  749. {
  750. qdf_nbuf_t nbuf;
  751. struct dp_pdev *pdev;
  752. struct dp_peer *peer;
  753. struct rx_desc_pool *rx_desc_pool;
  754. uint16_t peer_id;
  755. uint8_t *rx_tlv_hdr;
  756. uint32_t tid;
  757. uint8_t reo_err_code;
  758. nbuf = rx_desc->nbuf;
  759. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  760. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  761. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf,
  762. rx_desc_pool->buf_size,
  763. false);
  764. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  765. QDF_DMA_FROM_DEVICE,
  766. rx_desc_pool->buf_size);
  767. rx_desc->unmapped = 1;
  768. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  769. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  770. peer_id =
  771. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  772. rx_tlv_hdr);
  773. peer = dp_peer_get_ref_by_id(soc, peer_id,
  774. DP_MOD_ID_RX_ERR);
  775. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  776. rx_tlv_hdr);
  777. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  778. if (!peer)
  779. goto next;
  780. reo_err_code = hal_rx_get_reo_error_code(soc->hal_soc, ring_desc);
  781. dp_info("BAR frame: peer = "QDF_MAC_ADDR_FMT
  782. " peer_id = %d"
  783. " tid = %u"
  784. " SSN = %d"
  785. " error code = %d",
  786. QDF_MAC_ADDR_REF(peer->mac_addr.raw),
  787. peer->peer_id,
  788. tid,
  789. mpdu_desc_info->mpdu_seq,
  790. reo_err_code);
  791. switch (reo_err_code) {
  792. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  793. /* fallthrough */
  794. case HAL_REO_ERR_BAR_FRAME_OOR:
  795. dp_rx_err_handle_bar(soc, peer, nbuf);
  796. DP_STATS_INC(soc,
  797. rx.err.reo_error[reo_err_code], 1);
  798. break;
  799. default:
  800. DP_STATS_INC(soc, rx.bar_frame, 1);
  801. }
  802. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  803. next:
  804. dp_rx_link_desc_return(soc, ring_desc,
  805. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  806. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  807. rx_desc->pool_id);
  808. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  809. &pdev->free_list_tail,
  810. rx_desc);
  811. }
  812. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  813. /**
  814. * dp_2k_jump_handle() - Function to handle 2k jump exception
  815. * on WBM ring
  816. *
  817. * @soc: core DP main context
  818. * @nbuf: buffer pointer
  819. * @rx_tlv_hdr: start of rx tlv header
  820. * @peer_id: peer id of first msdu
  821. * @tid: Tid for which exception occurred
  822. *
  823. * This function handles 2k jump violations arising out
  824. * of receiving aggregates in non BA case. This typically
  825. * may happen if aggregates are received on a QOS enabled TID
  826. * while Rx window size is still initialized to value of 2. Or
  827. * it may also happen if negotiated window size is 1 but peer
  828. * sends aggregates.
  829. *
  830. */
  831. void
  832. dp_2k_jump_handle(struct dp_soc *soc,
  833. qdf_nbuf_t nbuf,
  834. uint8_t *rx_tlv_hdr,
  835. uint16_t peer_id,
  836. uint8_t tid)
  837. {
  838. struct dp_peer *peer = NULL;
  839. struct dp_rx_tid *rx_tid = NULL;
  840. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  841. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  842. if (!peer) {
  843. dp_rx_err_err("%pK: peer not found", soc);
  844. goto free_nbuf;
  845. }
  846. if (tid >= DP_MAX_TIDS) {
  847. dp_info_rl("invalid tid");
  848. goto nbuf_deliver;
  849. }
  850. rx_tid = &peer->rx_tid[tid];
  851. qdf_spin_lock_bh(&rx_tid->tid_lock);
  852. /* only if BA session is active, allow send Delba */
  853. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  854. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  855. goto nbuf_deliver;
  856. }
  857. if (!rx_tid->delba_tx_status) {
  858. rx_tid->delba_tx_retry++;
  859. rx_tid->delba_tx_status = 1;
  860. rx_tid->delba_rcode =
  861. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  862. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  863. if (soc->cdp_soc.ol_ops->send_delba) {
  864. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent, 1);
  865. soc->cdp_soc.ol_ops->send_delba(
  866. peer->vdev->pdev->soc->ctrl_psoc,
  867. peer->vdev->vdev_id,
  868. peer->mac_addr.raw,
  869. tid,
  870. rx_tid->delba_rcode);
  871. }
  872. } else {
  873. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  874. }
  875. nbuf_deliver:
  876. if (dp_rx_deliver_special_frame(soc, peer, nbuf, frame_mask,
  877. rx_tlv_hdr)) {
  878. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  879. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  880. return;
  881. }
  882. free_nbuf:
  883. if (peer)
  884. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  885. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  886. qdf_nbuf_free(nbuf);
  887. }
  888. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  889. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_WCN7850)
  890. /**
  891. * dp_rx_null_q_handle_invalid_peer_id_exception() - to find exception
  892. * @soc: pointer to dp_soc struct
  893. * @pool_id: Pool id to find dp_pdev
  894. * @rx_tlv_hdr: TLV header of received packet
  895. * @nbuf: SKB
  896. *
  897. * In certain types of packets if peer_id is not correct then
  898. * driver may not be able find. Try finding peer by addr_2 of
  899. * received MPDU. If you find the peer then most likely sw_peer_id &
  900. * ast_idx is corrupted.
  901. *
  902. * Return: True if you find the peer by addr_2 of received MPDU else false
  903. */
  904. static bool
  905. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  906. uint8_t pool_id,
  907. uint8_t *rx_tlv_hdr,
  908. qdf_nbuf_t nbuf)
  909. {
  910. struct dp_peer *peer = NULL;
  911. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  912. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  913. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  914. if (!pdev) {
  915. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  916. soc, pool_id);
  917. return false;
  918. }
  919. /*
  920. * WAR- In certain types of packets if peer_id is not correct then
  921. * driver may not be able find. Try finding peer by addr_2 of
  922. * received MPDU
  923. */
  924. if (wh)
  925. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  926. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  927. if (peer) {
  928. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  929. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  930. QDF_TRACE_LEVEL_DEBUG);
  931. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  932. 1, qdf_nbuf_len(nbuf));
  933. qdf_nbuf_free(nbuf);
  934. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  935. return true;
  936. }
  937. return false;
  938. }
  939. /**
  940. * dp_rx_check_pkt_len() - Check for pktlen validity
  941. * @soc: DP SOC context
  942. * @pkt_len: computed length of the pkt from caller in bytes
  943. *
  944. * Return: true if pktlen > RX_BUFFER_SIZE, else return false
  945. *
  946. */
  947. static inline
  948. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  949. {
  950. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  951. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  952. 1, pkt_len);
  953. return true;
  954. } else {
  955. return false;
  956. }
  957. }
  958. #else
  959. static inline bool
  960. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  961. uint8_t pool_id,
  962. uint8_t *rx_tlv_hdr,
  963. qdf_nbuf_t nbuf)
  964. {
  965. return false;
  966. }
  967. static inline
  968. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  969. {
  970. return false;
  971. }
  972. #endif
  973. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  974. /**
  975. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  976. * descriptor violation on either a
  977. * REO or WBM ring
  978. *
  979. * @soc: core DP main context
  980. * @nbuf: buffer pointer
  981. * @rx_tlv_hdr: start of rx tlv header
  982. * @pool_id: mac id
  983. * @peer: peer handle
  984. *
  985. * This function handles NULL queue descriptor violations arising out
  986. * a missing REO queue for a given peer or a given TID. This typically
  987. * may happen if a packet is received on a QOS enabled TID before the
  988. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  989. * it may also happen for MC/BC frames if they are not routed to the
  990. * non-QOS TID queue, in the absence of any other default TID queue.
  991. * This error can show up both in a REO destination or WBM release ring.
  992. *
  993. * Return: QDF_STATUS_SUCCESS, if nbuf handled successfully. QDF status code
  994. * if nbuf could not be handled or dropped.
  995. */
  996. static QDF_STATUS
  997. dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  998. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  999. struct dp_peer *peer)
  1000. {
  1001. uint32_t pkt_len;
  1002. uint16_t msdu_len;
  1003. struct dp_vdev *vdev;
  1004. uint8_t tid;
  1005. qdf_ether_header_t *eh;
  1006. struct hal_rx_msdu_metadata msdu_metadata;
  1007. uint16_t sa_idx = 0;
  1008. bool is_eapol;
  1009. qdf_nbuf_set_rx_chfrag_start(nbuf,
  1010. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1011. rx_tlv_hdr));
  1012. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1013. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1014. rx_tlv_hdr));
  1015. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1016. rx_tlv_hdr));
  1017. qdf_nbuf_set_da_valid(nbuf,
  1018. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1019. rx_tlv_hdr));
  1020. qdf_nbuf_set_sa_valid(nbuf,
  1021. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1022. rx_tlv_hdr));
  1023. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1024. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1025. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1026. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1027. if (dp_rx_check_pkt_len(soc, pkt_len))
  1028. goto drop_nbuf;
  1029. /* Set length in nbuf */
  1030. qdf_nbuf_set_pktlen(
  1031. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1032. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1033. }
  1034. /*
  1035. * Check if DMA completed -- msdu_done is the last bit
  1036. * to be written
  1037. */
  1038. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1039. dp_err_rl("MSDU DONE failure");
  1040. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1041. QDF_TRACE_LEVEL_INFO);
  1042. qdf_assert(0);
  1043. }
  1044. if (!peer &&
  1045. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1046. rx_tlv_hdr, nbuf))
  1047. return QDF_STATUS_E_FAILURE;
  1048. if (!peer) {
  1049. bool mpdu_done = false;
  1050. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1051. if (!pdev) {
  1052. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1053. return QDF_STATUS_E_FAILURE;
  1054. }
  1055. dp_err_rl("peer is NULL");
  1056. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1057. qdf_nbuf_len(nbuf));
  1058. /* QCN9000 has the support enabled */
  1059. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1060. mpdu_done = true;
  1061. nbuf->next = NULL;
  1062. /* Trigger invalid peer handler wrapper */
  1063. dp_rx_process_invalid_peer_wrapper(soc,
  1064. nbuf, mpdu_done, pool_id);
  1065. } else {
  1066. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  1067. /* Trigger invalid peer handler wrapper */
  1068. dp_rx_process_invalid_peer_wrapper(soc,
  1069. pdev->invalid_peer_head_msdu,
  1070. mpdu_done, pool_id);
  1071. }
  1072. if (mpdu_done) {
  1073. pdev->invalid_peer_head_msdu = NULL;
  1074. pdev->invalid_peer_tail_msdu = NULL;
  1075. }
  1076. return QDF_STATUS_E_FAILURE;
  1077. }
  1078. vdev = peer->vdev;
  1079. if (!vdev) {
  1080. dp_err_rl("Null vdev!");
  1081. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1082. goto drop_nbuf;
  1083. }
  1084. /*
  1085. * Advance the packet start pointer by total size of
  1086. * pre-header TLV's
  1087. */
  1088. if (qdf_nbuf_is_frag(nbuf))
  1089. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1090. else
  1091. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1092. soc->rx_pkt_tlv_size));
  1093. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1094. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1095. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1096. if ((sa_idx < 0) ||
  1097. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1098. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1099. goto drop_nbuf;
  1100. }
  1101. }
  1102. if (dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf)) {
  1103. /* this is a looped back MCBC pkt, drop it */
  1104. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, qdf_nbuf_len(nbuf));
  1105. goto drop_nbuf;
  1106. }
  1107. /*
  1108. * In qwrap mode if the received packet matches with any of the vdev
  1109. * mac addresses, drop it. Donot receive multicast packets originated
  1110. * from any proxysta.
  1111. */
  1112. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1113. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, qdf_nbuf_len(nbuf));
  1114. goto drop_nbuf;
  1115. }
  1116. if (qdf_unlikely((peer->nawds_enabled == true) &&
  1117. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1118. rx_tlv_hdr))) {
  1119. dp_err_rl("free buffer for multicast packet");
  1120. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1121. goto drop_nbuf;
  1122. }
  1123. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1124. dp_err_rl("mcast Policy Check Drop pkt");
  1125. goto drop_nbuf;
  1126. }
  1127. /* WDS Source Port Learning */
  1128. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1129. vdev->wds_enabled))
  1130. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf,
  1131. msdu_metadata);
  1132. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1133. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1134. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1135. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  1136. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1137. }
  1138. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1139. if (!peer->authorize) {
  1140. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1141. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  1142. if (is_eapol) {
  1143. if (qdf_mem_cmp(eh->ether_dhost,
  1144. &vdev->mac_addr.raw[0],
  1145. QDF_MAC_ADDR_SIZE))
  1146. goto drop_nbuf;
  1147. } else {
  1148. goto drop_nbuf;
  1149. }
  1150. }
  1151. /*
  1152. * Drop packets in this path if cce_match is found. Packets will come
  1153. * in following path depending on whether tidQ is setup.
  1154. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1155. * cce_match = 1
  1156. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1157. * dropped.
  1158. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1159. * cce_match = 1
  1160. * These packets need to be dropped and should not get delivered
  1161. * to stack.
  1162. */
  1163. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr))) {
  1164. goto drop_nbuf;
  1165. }
  1166. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1167. qdf_nbuf_set_next(nbuf, NULL);
  1168. dp_rx_deliver_raw(vdev, nbuf, peer);
  1169. } else {
  1170. qdf_nbuf_set_next(nbuf, NULL);
  1171. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1172. qdf_nbuf_len(nbuf));
  1173. /*
  1174. * Update the protocol tag in SKB based on
  1175. * CCE metadata
  1176. */
  1177. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1178. EXCEPTION_DEST_RING_ID,
  1179. true, true);
  1180. /* Update the flow tag in SKB based on FSE metadata */
  1181. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1182. rx_tlv_hdr, true);
  1183. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1184. soc->hal_soc, rx_tlv_hdr) &&
  1185. (vdev->rx_decap_type ==
  1186. htt_cmn_pkt_type_ethernet))) {
  1187. DP_STATS_INC_PKT(peer, rx.multicast, 1,
  1188. qdf_nbuf_len(nbuf));
  1189. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1190. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  1191. qdf_nbuf_len(nbuf));
  1192. }
  1193. qdf_nbuf_set_exc_frame(nbuf, 1);
  1194. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf, NULL);
  1195. }
  1196. return QDF_STATUS_SUCCESS;
  1197. drop_nbuf:
  1198. qdf_nbuf_free(nbuf);
  1199. return QDF_STATUS_E_FAILURE;
  1200. }
  1201. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1202. /**
  1203. * dp_rx_process_rxdma_err() - Function to deliver rxdma unencrypted_err
  1204. * frames to OS or wifi parse errors.
  1205. * @soc: core DP main context
  1206. * @nbuf: buffer pointer
  1207. * @rx_tlv_hdr: start of rx tlv header
  1208. * @peer: peer reference
  1209. * @err_code: rxdma err code
  1210. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1211. * pool_id has same mapping)
  1212. *
  1213. * Return: None
  1214. */
  1215. void
  1216. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1217. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1218. uint8_t err_code, uint8_t mac_id)
  1219. {
  1220. uint32_t pkt_len, l2_hdr_offset;
  1221. uint16_t msdu_len;
  1222. struct dp_vdev *vdev;
  1223. qdf_ether_header_t *eh;
  1224. bool is_broadcast;
  1225. /*
  1226. * Check if DMA completed -- msdu_done is the last bit
  1227. * to be written
  1228. */
  1229. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1230. dp_err_rl("MSDU DONE failure");
  1231. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1232. QDF_TRACE_LEVEL_INFO);
  1233. qdf_assert(0);
  1234. }
  1235. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1236. rx_tlv_hdr);
  1237. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1238. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1239. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1240. /* Drop & free packet */
  1241. qdf_nbuf_free(nbuf);
  1242. return;
  1243. }
  1244. /* Set length in nbuf */
  1245. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1246. qdf_nbuf_set_next(nbuf, NULL);
  1247. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1248. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1249. if (!peer) {
  1250. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "peer is NULL");
  1251. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1252. qdf_nbuf_len(nbuf));
  1253. /* Trigger invalid peer handler wrapper */
  1254. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1255. return;
  1256. }
  1257. vdev = peer->vdev;
  1258. if (!vdev) {
  1259. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1260. vdev);
  1261. /* Drop & free packet */
  1262. qdf_nbuf_free(nbuf);
  1263. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1264. return;
  1265. }
  1266. /*
  1267. * Advance the packet start pointer by total size of
  1268. * pre-header TLV's
  1269. */
  1270. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1271. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1272. uint8_t *pkt_type;
  1273. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1274. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1275. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1276. htons(QDF_LLC_STP)) {
  1277. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1278. goto process_mesh;
  1279. } else {
  1280. goto process_rx;
  1281. }
  1282. }
  1283. }
  1284. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1285. goto process_mesh;
  1286. /*
  1287. * WAPI cert AP sends rekey frames as unencrypted.
  1288. * Thus RXDMA will report unencrypted frame error.
  1289. * To pass WAPI cert case, SW needs to pass unencrypted
  1290. * rekey frame to stack.
  1291. */
  1292. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1293. goto process_rx;
  1294. }
  1295. /*
  1296. * In dynamic WEP case rekey frames are not encrypted
  1297. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1298. * key install is already done
  1299. */
  1300. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1301. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1302. goto process_rx;
  1303. process_mesh:
  1304. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1305. qdf_nbuf_free(nbuf);
  1306. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1307. return;
  1308. }
  1309. if (vdev->mesh_vdev) {
  1310. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1311. == QDF_STATUS_SUCCESS) {
  1312. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1313. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1314. qdf_nbuf_free(nbuf);
  1315. return;
  1316. }
  1317. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1318. }
  1319. process_rx:
  1320. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1321. rx_tlv_hdr) &&
  1322. (vdev->rx_decap_type ==
  1323. htt_cmn_pkt_type_ethernet))) {
  1324. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1325. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1326. (eh->ether_dhost)) ? 1 : 0 ;
  1327. DP_STATS_INC_PKT(peer, rx.multicast, 1, qdf_nbuf_len(nbuf));
  1328. if (is_broadcast) {
  1329. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  1330. qdf_nbuf_len(nbuf));
  1331. }
  1332. }
  1333. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1334. dp_rx_deliver_raw(vdev, nbuf, peer);
  1335. } else {
  1336. /* Update the protocol tag in SKB based on CCE metadata */
  1337. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1338. EXCEPTION_DEST_RING_ID, true, true);
  1339. /* Update the flow tag in SKB based on FSE metadata */
  1340. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1341. DP_STATS_INC(peer, rx.to_stack.num, 1);
  1342. qdf_nbuf_set_exc_frame(nbuf, 1);
  1343. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf, NULL);
  1344. }
  1345. return;
  1346. }
  1347. /**
  1348. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  1349. * @soc: core DP main context
  1350. * @nbuf: buffer pointer
  1351. * @rx_tlv_hdr: start of rx tlv header
  1352. * @peer: peer handle
  1353. *
  1354. * return: void
  1355. */
  1356. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1357. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  1358. {
  1359. struct dp_vdev *vdev = NULL;
  1360. struct dp_pdev *pdev = NULL;
  1361. struct ol_if_ops *tops = NULL;
  1362. uint16_t rx_seq, fragno;
  1363. uint8_t is_raw;
  1364. unsigned int tid;
  1365. QDF_STATUS status;
  1366. struct cdp_rx_mic_err_info mic_failure_info;
  1367. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1368. rx_tlv_hdr))
  1369. return;
  1370. if (!peer) {
  1371. dp_info_rl("peer not found");
  1372. goto fail;
  1373. }
  1374. vdev = peer->vdev;
  1375. if (!vdev) {
  1376. dp_info_rl("VDEV not found");
  1377. goto fail;
  1378. }
  1379. pdev = vdev->pdev;
  1380. if (!pdev) {
  1381. dp_info_rl("PDEV not found");
  1382. goto fail;
  1383. }
  1384. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1385. if (is_raw) {
  1386. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1387. qdf_nbuf_data(nbuf));
  1388. /* Can get only last fragment */
  1389. if (fragno) {
  1390. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1391. qdf_nbuf_data(nbuf));
  1392. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1393. qdf_nbuf_data(nbuf));
  1394. status = dp_rx_defrag_add_last_frag(soc, peer,
  1395. tid, rx_seq, nbuf);
  1396. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1397. "status %d !", rx_seq, fragno, status);
  1398. return;
  1399. }
  1400. }
  1401. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1402. &mic_failure_info.da_mac_addr.bytes[0])) {
  1403. dp_err_rl("Failed to get da_mac_addr");
  1404. goto fail;
  1405. }
  1406. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1407. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1408. dp_err_rl("Failed to get ta_mac_addr");
  1409. goto fail;
  1410. }
  1411. mic_failure_info.key_id = 0;
  1412. mic_failure_info.multicast =
  1413. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1414. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1415. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1416. mic_failure_info.data = NULL;
  1417. mic_failure_info.vdev_id = vdev->vdev_id;
  1418. tops = pdev->soc->cdp_soc.ol_ops;
  1419. if (tops->rx_mic_error)
  1420. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1421. &mic_failure_info);
  1422. fail:
  1423. qdf_nbuf_free(nbuf);
  1424. return;
  1425. }
  1426. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1427. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1428. /**
  1429. * dp_rx_link_cookie_check() - Validate link desc cookie
  1430. * @ring_desc: ring descriptor
  1431. *
  1432. * Return: qdf status
  1433. */
  1434. static inline QDF_STATUS
  1435. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1436. {
  1437. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1438. return QDF_STATUS_E_FAILURE;
  1439. return QDF_STATUS_SUCCESS;
  1440. }
  1441. /**
  1442. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1443. * @ring_desc: ring descriptor
  1444. *
  1445. * Return: None
  1446. */
  1447. static inline void
  1448. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1449. {
  1450. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1451. }
  1452. #else
  1453. static inline QDF_STATUS
  1454. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1455. {
  1456. return QDF_STATUS_SUCCESS;
  1457. }
  1458. static inline void
  1459. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1460. {
  1461. }
  1462. #endif
  1463. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1464. /**
  1465. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1466. * @soc: Datapath soc structure
  1467. * @paddr: paddr of the buffer in RX err ring
  1468. * @sw_cookie: SW cookie of the buffer in RX err ring
  1469. * @rbm: Return buffer manager of the buffer in RX err ring
  1470. *
  1471. * Returns: None
  1472. */
  1473. static inline void
  1474. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1475. uint32_t sw_cookie, uint8_t rbm)
  1476. {
  1477. struct dp_buf_info_record *record;
  1478. uint32_t idx;
  1479. if (qdf_unlikely(!soc->rx_err_ring_history))
  1480. return;
  1481. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1482. DP_RX_ERR_HIST_MAX);
  1483. /* No NULL check needed for record since its an array */
  1484. record = &soc->rx_err_ring_history->entry[idx];
  1485. record->timestamp = qdf_get_log_timestamp();
  1486. record->hbi.paddr = paddr;
  1487. record->hbi.sw_cookie = sw_cookie;
  1488. record->hbi.rbm = rbm;
  1489. }
  1490. #else
  1491. static inline void
  1492. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1493. uint32_t sw_cookie, uint8_t rbm)
  1494. {
  1495. }
  1496. #endif
  1497. #ifdef HANDLE_RX_REROUTE_ERR
  1498. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1499. hal_ring_desc_t ring_desc)
  1500. {
  1501. int lmac_id = DP_INVALID_LMAC_ID;
  1502. struct dp_rx_desc *rx_desc;
  1503. struct hal_buf_info hbi;
  1504. struct dp_pdev *pdev;
  1505. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1506. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1507. /* sanity */
  1508. if (!rx_desc) {
  1509. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1510. goto assert_return;
  1511. }
  1512. if (!rx_desc->nbuf)
  1513. goto assert_return;
  1514. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1515. hbi.sw_cookie,
  1516. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1517. ring_desc));
  1518. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1519. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1520. rx_desc->in_err_state = 1;
  1521. goto assert_return;
  1522. }
  1523. /* After this point the rx_desc and nbuf are valid */
  1524. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1525. qdf_assert_always(rx_desc->unmapped);
  1526. dp_ipa_handle_rx_buf_smmu_mapping(soc,
  1527. rx_desc->nbuf,
  1528. RX_DATA_BUFFER_SIZE,
  1529. false);
  1530. qdf_nbuf_unmap_nbytes_single(soc->osdev,
  1531. rx_desc->nbuf,
  1532. QDF_DMA_FROM_DEVICE,
  1533. RX_DATA_BUFFER_SIZE);
  1534. rx_desc->unmapped = 1;
  1535. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1536. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1537. rx_desc->pool_id);
  1538. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1539. lmac_id = rx_desc->pool_id;
  1540. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1541. &pdev->free_list_tail,
  1542. rx_desc);
  1543. return lmac_id;
  1544. assert_return:
  1545. qdf_assert(0);
  1546. return lmac_id;
  1547. }
  1548. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1549. {
  1550. int ret;
  1551. uint64_t cur_time_stamp;
  1552. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1553. /* Recover if overall error count exceeds threshold */
  1554. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1555. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1556. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1557. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1558. soc->rx_route_err_start_pkt_ts);
  1559. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1560. }
  1561. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1562. if (!soc->rx_route_err_start_pkt_ts)
  1563. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1564. /* Recover if threshold number of packets received in threshold time */
  1565. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1566. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1567. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1568. if (soc->rx_route_err_in_window >
  1569. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1570. qdf_trigger_self_recovery(NULL,
  1571. QDF_RX_REG_PKT_ROUTE_ERR);
  1572. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1573. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1574. soc->rx_route_err_start_pkt_ts);
  1575. } else {
  1576. soc->rx_route_err_in_window = 1;
  1577. }
  1578. } else {
  1579. soc->rx_route_err_in_window++;
  1580. }
  1581. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1582. return ret;
  1583. }
  1584. #else /* HANDLE_RX_REROUTE_ERR */
  1585. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1586. {
  1587. qdf_assert_always(0);
  1588. return DP_INVALID_LMAC_ID;
  1589. }
  1590. #endif /* HANDLE_RX_REROUTE_ERR */
  1591. uint32_t
  1592. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1593. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1594. {
  1595. hal_ring_desc_t ring_desc;
  1596. hal_soc_handle_t hal_soc;
  1597. uint32_t count = 0;
  1598. uint32_t rx_bufs_used = 0;
  1599. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1600. uint8_t mac_id = 0;
  1601. uint8_t buf_type;
  1602. uint8_t error;
  1603. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1604. struct hal_buf_info hbi;
  1605. struct dp_pdev *dp_pdev;
  1606. struct dp_srng *dp_rxdma_srng;
  1607. struct rx_desc_pool *rx_desc_pool;
  1608. void *link_desc_va;
  1609. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  1610. uint16_t num_msdus;
  1611. struct dp_rx_desc *rx_desc = NULL;
  1612. QDF_STATUS status;
  1613. bool ret;
  1614. uint32_t error_code = 0;
  1615. /* Debug -- Remove later */
  1616. qdf_assert(soc && hal_ring_hdl);
  1617. hal_soc = soc->hal_soc;
  1618. /* Debug -- Remove later */
  1619. qdf_assert(hal_soc);
  1620. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1621. /* TODO */
  1622. /*
  1623. * Need API to convert from hal_ring pointer to
  1624. * Ring Type / Ring Id combo
  1625. */
  1626. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1627. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  1628. hal_ring_hdl);
  1629. goto done;
  1630. }
  1631. while (qdf_likely(quota-- && (ring_desc =
  1632. hal_srng_dst_peek(hal_soc,
  1633. hal_ring_hdl)))) {
  1634. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  1635. error = hal_rx_err_status_get(hal_soc, ring_desc);
  1636. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  1637. /* Get the MPDU DESC info */
  1638. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1639. if (mpdu_desc_info.msdu_count == 0)
  1640. goto next_entry;
  1641. /*
  1642. * For REO error ring, only MSDU LINK DESC is expected.
  1643. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  1644. */
  1645. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  1646. int lmac_id;
  1647. lmac_id = dp_rx_err_exception(soc, ring_desc);
  1648. if (lmac_id >= 0)
  1649. rx_bufs_reaped[lmac_id] += 1;
  1650. goto next_entry;
  1651. }
  1652. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  1653. &hbi);
  1654. /*
  1655. * check for the magic number in the sw cookie
  1656. */
  1657. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  1658. soc->link_desc_id_start);
  1659. status = dp_rx_link_cookie_check(ring_desc);
  1660. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1661. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  1662. break;
  1663. }
  1664. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1665. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  1666. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1667. &num_msdus);
  1668. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  1669. msdu_list.sw_cookie[0],
  1670. msdu_list.rbm[0]);
  1671. // TODO - BE- Check if the RBM is to be checked for all chips
  1672. if (qdf_unlikely((msdu_list.rbm[0] !=
  1673. DP_WBM2SW_RBM(soc->wbm_sw0_bm_id)) &&
  1674. (msdu_list.rbm[0] !=
  1675. HAL_RX_BUF_RBM_WBM_CHIP0_IDLE_DESC_LIST) &&
  1676. (msdu_list.rbm[0] !=
  1677. DP_DEFRAG_RBM(soc->wbm_sw0_bm_id)))) {
  1678. /* TODO */
  1679. /* Call appropriate handler */
  1680. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1681. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1682. dp_rx_err_err("%pK: Invalid RBM %d",
  1683. soc, msdu_list.rbm[0]);
  1684. }
  1685. /* Return link descriptor through WBM ring (SW2WBM)*/
  1686. dp_rx_link_desc_return(soc, ring_desc,
  1687. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  1688. goto next_entry;
  1689. }
  1690. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc,
  1691. msdu_list.sw_cookie[0]);
  1692. qdf_assert_always(rx_desc);
  1693. mac_id = rx_desc->pool_id;
  1694. if (mpdu_desc_info.bar_frame) {
  1695. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  1696. dp_rx_bar_frame_handle(soc,
  1697. ring_desc,
  1698. rx_desc,
  1699. &mpdu_desc_info);
  1700. rx_bufs_reaped[mac_id] += 1;
  1701. goto next_entry;
  1702. }
  1703. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  1704. /*
  1705. * We only handle one msdu per link desc for fragmented
  1706. * case. We drop the msdus and release the link desc
  1707. * back if there are more than one msdu in link desc.
  1708. */
  1709. if (qdf_unlikely(num_msdus > 1)) {
  1710. count = dp_rx_msdus_drop(soc, ring_desc,
  1711. &mpdu_desc_info,
  1712. &mac_id, quota);
  1713. rx_bufs_reaped[mac_id] += count;
  1714. goto next_entry;
  1715. }
  1716. /*
  1717. * this is a unlikely scenario where the host is reaping
  1718. * a descriptor which it already reaped just a while ago
  1719. * but is yet to replenish it back to HW.
  1720. * In this case host will dump the last 128 descriptors
  1721. * including the software descriptor rx_desc and assert.
  1722. */
  1723. if (qdf_unlikely(!rx_desc->in_use)) {
  1724. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1725. dp_info_rl("Reaping rx_desc not in use!");
  1726. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1727. ring_desc, rx_desc);
  1728. /* ignore duplicate RX desc and continue */
  1729. /* Pop out the descriptor */
  1730. goto next_entry;
  1731. }
  1732. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1733. msdu_list.paddr[0]);
  1734. if (!ret) {
  1735. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1736. rx_desc->in_err_state = 1;
  1737. goto next_entry;
  1738. }
  1739. count = dp_rx_frag_handle(soc,
  1740. ring_desc, &mpdu_desc_info,
  1741. rx_desc, &mac_id, quota);
  1742. rx_bufs_reaped[mac_id] += count;
  1743. DP_STATS_INC(soc, rx.rx_frags, 1);
  1744. goto next_entry;
  1745. }
  1746. /*
  1747. * Expect REO errors to be handled after this point
  1748. */
  1749. qdf_assert_always(error == HAL_REO_ERROR_DETECTED);
  1750. error_code = hal_rx_get_reo_error_code(hal_soc, ring_desc);
  1751. if (hal_rx_reo_is_pn_error(error_code)) {
  1752. /* TOD0 */
  1753. DP_STATS_INC(soc,
  1754. rx.err.
  1755. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  1756. 1);
  1757. /* increment @pdev level */
  1758. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1759. if (dp_pdev)
  1760. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1761. count = dp_rx_pn_error_handle(soc,
  1762. ring_desc,
  1763. &mpdu_desc_info, &mac_id,
  1764. quota);
  1765. rx_bufs_reaped[mac_id] += count;
  1766. goto next_entry;
  1767. }
  1768. if (hal_rx_reo_is_2k_jump(error_code)) {
  1769. /* TOD0 */
  1770. DP_STATS_INC(soc,
  1771. rx.err.
  1772. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  1773. 1);
  1774. /* increment @pdev level */
  1775. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1776. if (dp_pdev)
  1777. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1778. count = dp_rx_reo_err_entry_process(
  1779. soc,
  1780. ring_desc,
  1781. &mpdu_desc_info,
  1782. link_desc_va,
  1783. HAL_REO_ERR_REGULAR_FRAME_2K_JUMP);
  1784. rx_bufs_reaped[mac_id] += count;
  1785. goto next_entry;
  1786. }
  1787. if (hal_rx_reo_is_oor_error(error_code)) {
  1788. DP_STATS_INC(
  1789. soc,
  1790. rx.err.
  1791. reo_error[HAL_REO_ERR_REGULAR_FRAME_OOR],
  1792. 1);
  1793. /* increment @pdev level */
  1794. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1795. if (dp_pdev)
  1796. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1797. count = dp_rx_reo_err_entry_process(
  1798. soc,
  1799. ring_desc,
  1800. &mpdu_desc_info,
  1801. link_desc_va,
  1802. HAL_REO_ERR_REGULAR_FRAME_OOR);
  1803. rx_bufs_reaped[mac_id] += count;
  1804. goto next_entry;
  1805. }
  1806. /* Assert if unexpected error type */
  1807. qdf_assert_always(0);
  1808. next_entry:
  1809. dp_rx_link_cookie_invalidate(ring_desc);
  1810. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1811. }
  1812. done:
  1813. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1814. if (soc->rx.flags.defrag_timeout_check) {
  1815. uint32_t now_ms =
  1816. qdf_system_ticks_to_msecs(qdf_system_ticks());
  1817. if (now_ms >= soc->rx.defrag.next_flush_ms)
  1818. dp_rx_defrag_waitlist_flush(soc);
  1819. }
  1820. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1821. if (rx_bufs_reaped[mac_id]) {
  1822. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1823. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1824. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1825. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1826. rx_desc_pool,
  1827. rx_bufs_reaped[mac_id],
  1828. &dp_pdev->free_list_head,
  1829. &dp_pdev->free_list_tail);
  1830. rx_bufs_used += rx_bufs_reaped[mac_id];
  1831. }
  1832. }
  1833. return rx_bufs_used; /* Assume no scale factor for now */
  1834. }
  1835. #ifdef DROP_RXDMA_DECRYPT_ERR
  1836. /**
  1837. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  1838. *
  1839. * Return: true if rxdma decrypt err frames are handled and false otheriwse
  1840. */
  1841. static inline bool dp_handle_rxdma_decrypt_err(void)
  1842. {
  1843. return false;
  1844. }
  1845. #else
  1846. static inline bool dp_handle_rxdma_decrypt_err(void)
  1847. {
  1848. return true;
  1849. }
  1850. #endif
  1851. static inline bool
  1852. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  1853. {
  1854. /*
  1855. * Currently Null Queue and Unencrypted error handlers has support for
  1856. * SG. Other error handler do not deal with SG buffer.
  1857. */
  1858. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  1859. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  1860. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  1861. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  1862. return true;
  1863. return false;
  1864. }
  1865. uint32_t
  1866. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1867. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1868. {
  1869. hal_ring_desc_t ring_desc;
  1870. hal_soc_handle_t hal_soc;
  1871. struct dp_rx_desc *rx_desc;
  1872. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1873. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1874. uint32_t rx_bufs_used = 0;
  1875. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1876. uint8_t buf_type;
  1877. uint8_t mac_id;
  1878. struct dp_pdev *dp_pdev;
  1879. struct dp_srng *dp_rxdma_srng;
  1880. struct rx_desc_pool *rx_desc_pool;
  1881. uint8_t *rx_tlv_hdr;
  1882. qdf_nbuf_t nbuf_head = NULL;
  1883. qdf_nbuf_t nbuf_tail = NULL;
  1884. qdf_nbuf_t nbuf, next;
  1885. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  1886. uint8_t pool_id;
  1887. uint8_t tid = 0;
  1888. uint8_t msdu_continuation = 0;
  1889. bool process_sg_buf = false;
  1890. uint32_t wbm_err_src;
  1891. struct hal_buf_info buf_info = {0};
  1892. /* Debug -- Remove later */
  1893. qdf_assert(soc && hal_ring_hdl);
  1894. hal_soc = soc->hal_soc;
  1895. /* Debug -- Remove later */
  1896. qdf_assert(hal_soc);
  1897. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1898. /* TODO */
  1899. /*
  1900. * Need API to convert from hal_ring pointer to
  1901. * Ring Type / Ring Id combo
  1902. */
  1903. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1904. soc, hal_ring_hdl);
  1905. goto done;
  1906. }
  1907. while (qdf_likely(quota)) {
  1908. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1909. if (qdf_unlikely(!ring_desc))
  1910. break;
  1911. /* XXX */
  1912. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1913. /*
  1914. * For WBM ring, expect only MSDU buffers
  1915. */
  1916. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  1917. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1918. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1919. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1920. /*
  1921. * Check if the buffer is to be processed on this processor
  1922. */
  1923. /* only cookie and rbm will be valid in buf_info */
  1924. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  1925. &buf_info);
  1926. if (qdf_unlikely(buf_info.rbm !=
  1927. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id))) {
  1928. /* TODO */
  1929. /* Call appropriate handler */
  1930. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1931. dp_rx_err_err("%pK: Invalid RBM %d", soc,
  1932. buf_info.rbm);
  1933. continue;
  1934. }
  1935. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  1936. qdf_assert_always(rx_desc);
  1937. if (!dp_rx_desc_check_magic(rx_desc)) {
  1938. dp_rx_err_err("%pk: Invalid rx_desc cookie=%d",
  1939. soc, buf_info.sw_cookie);
  1940. continue;
  1941. }
  1942. /*
  1943. * this is a unlikely scenario where the host is reaping
  1944. * a descriptor which it already reaped just a while ago
  1945. * but is yet to replenish it back to HW.
  1946. * In this case host will dump the last 128 descriptors
  1947. * including the software descriptor rx_desc and assert.
  1948. */
  1949. if (qdf_unlikely(!rx_desc->in_use)) {
  1950. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1951. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1952. ring_desc, rx_desc);
  1953. continue;
  1954. }
  1955. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  1956. nbuf = rx_desc->nbuf;
  1957. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1958. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1959. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf,
  1960. rx_desc_pool->buf_size,
  1961. false);
  1962. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  1963. QDF_DMA_FROM_DEVICE,
  1964. rx_desc_pool->buf_size);
  1965. rx_desc->unmapped = 1;
  1966. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1967. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support &&
  1968. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  1969. /* SG is detected from continuation bit */
  1970. msdu_continuation =
  1971. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1972. ring_desc);
  1973. if (msdu_continuation &&
  1974. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1975. /* Update length from first buffer in SG */
  1976. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1977. hal_rx_msdu_start_msdu_len_get(
  1978. soc->hal_soc,
  1979. qdf_nbuf_data(nbuf));
  1980. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = true;
  1981. }
  1982. if (msdu_continuation) {
  1983. /* MSDU continued packets */
  1984. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1985. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1986. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1987. } else {
  1988. /* This is the terminal packet in SG */
  1989. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1990. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1991. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1992. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1993. process_sg_buf = true;
  1994. }
  1995. }
  1996. /*
  1997. * save the wbm desc info in nbuf TLV. We will need this
  1998. * info when we do the actual nbuf processing
  1999. */
  2000. wbm_err_info.pool_id = rx_desc->pool_id;
  2001. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  2002. qdf_nbuf_data(nbuf),
  2003. (uint8_t *)&wbm_err_info,
  2004. sizeof(wbm_err_info));
  2005. rx_bufs_reaped[rx_desc->pool_id]++;
  2006. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  2007. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  2008. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  2009. nbuf);
  2010. if (process_sg_buf) {
  2011. if (!dp_rx_buffer_pool_refill(
  2012. soc,
  2013. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2014. rx_desc->pool_id))
  2015. DP_RX_MERGE_TWO_LIST(
  2016. nbuf_head, nbuf_tail,
  2017. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2018. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  2019. dp_rx_wbm_sg_list_reset(soc);
  2020. process_sg_buf = false;
  2021. }
  2022. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  2023. rx_desc->pool_id)) {
  2024. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  2025. }
  2026. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2027. &tail[rx_desc->pool_id],
  2028. rx_desc);
  2029. /*
  2030. * if continuation bit is set then we have MSDU spread
  2031. * across multiple buffers, let us not decrement quota
  2032. * till we reap all buffers of that MSDU.
  2033. */
  2034. if (qdf_likely(!msdu_continuation))
  2035. quota -= 1;
  2036. }
  2037. done:
  2038. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2039. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2040. if (rx_bufs_reaped[mac_id]) {
  2041. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2042. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2043. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2044. rx_desc_pool, rx_bufs_reaped[mac_id],
  2045. &head[mac_id], &tail[mac_id]);
  2046. rx_bufs_used += rx_bufs_reaped[mac_id];
  2047. }
  2048. }
  2049. nbuf = nbuf_head;
  2050. while (nbuf) {
  2051. struct dp_peer *peer;
  2052. uint16_t peer_id;
  2053. uint8_t err_code;
  2054. uint8_t *tlv_hdr;
  2055. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2056. /*
  2057. * retrieve the wbm desc info from nbuf TLV, so we can
  2058. * handle error cases appropriately
  2059. */
  2060. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2061. (uint8_t *)&wbm_err_info,
  2062. sizeof(wbm_err_info));
  2063. peer_id = hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  2064. rx_tlv_hdr);
  2065. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2066. if (!peer)
  2067. dp_info_rl("peer is null peer_id%u err_src%u err_rsn%u",
  2068. peer_id, wbm_err_info.wbm_err_src,
  2069. wbm_err_info.reo_psh_rsn);
  2070. /* Set queue_mapping in nbuf to 0 */
  2071. dp_set_rx_queue(nbuf, 0);
  2072. next = nbuf->next;
  2073. /*
  2074. * Form the SG for msdu continued buffers
  2075. * QCN9000 has this support
  2076. */
  2077. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2078. nbuf = dp_rx_sg_create(soc, nbuf);
  2079. next = nbuf->next;
  2080. /*
  2081. * SG error handling is not done correctly,
  2082. * drop SG frames for now.
  2083. */
  2084. qdf_nbuf_free(nbuf);
  2085. dp_info_rl("scattered msdu dropped");
  2086. nbuf = next;
  2087. if (peer)
  2088. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2089. continue;
  2090. }
  2091. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2092. if (wbm_err_info.reo_psh_rsn
  2093. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2094. DP_STATS_INC(soc,
  2095. rx.err.reo_error
  2096. [wbm_err_info.reo_err_code], 1);
  2097. /* increment @pdev level */
  2098. pool_id = wbm_err_info.pool_id;
  2099. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2100. if (dp_pdev)
  2101. DP_STATS_INC(dp_pdev, err.reo_error,
  2102. 1);
  2103. switch (wbm_err_info.reo_err_code) {
  2104. /*
  2105. * Handling for packets which have NULL REO
  2106. * queue descriptor
  2107. */
  2108. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2109. pool_id = wbm_err_info.pool_id;
  2110. dp_rx_null_q_desc_handle(soc, nbuf,
  2111. rx_tlv_hdr,
  2112. pool_id, peer);
  2113. break;
  2114. /* TODO */
  2115. /* Add per error code accounting */
  2116. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2117. pool_id = wbm_err_info.pool_id;
  2118. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2119. rx_tlv_hdr)) {
  2120. peer_id =
  2121. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  2122. rx_tlv_hdr);
  2123. tid =
  2124. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2125. }
  2126. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2127. hal_rx_msdu_start_msdu_len_get(
  2128. soc->hal_soc, rx_tlv_hdr);
  2129. nbuf->next = NULL;
  2130. dp_2k_jump_handle(soc, nbuf,
  2131. rx_tlv_hdr,
  2132. peer_id, tid);
  2133. break;
  2134. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2135. if (peer)
  2136. DP_STATS_INC(peer,
  2137. rx.err.oor_err, 1);
  2138. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2139. rx_tlv_hdr)) {
  2140. peer_id =
  2141. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  2142. rx_tlv_hdr);
  2143. tid =
  2144. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2145. }
  2146. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2147. hal_rx_msdu_start_msdu_len_get(
  2148. soc->hal_soc, rx_tlv_hdr);
  2149. nbuf->next = NULL;
  2150. dp_rx_oor_handle(soc, nbuf,
  2151. peer_id,
  2152. rx_tlv_hdr);
  2153. break;
  2154. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2155. case HAL_REO_ERR_BAR_FRAME_OOR:
  2156. if (peer)
  2157. dp_rx_err_handle_bar(soc,
  2158. peer,
  2159. nbuf);
  2160. qdf_nbuf_free(nbuf);
  2161. break;
  2162. case HAL_REO_ERR_PN_CHECK_FAILED:
  2163. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2164. if (peer)
  2165. DP_STATS_INC(peer,
  2166. rx.err.pn_err, 1);
  2167. qdf_nbuf_free(nbuf);
  2168. break;
  2169. default:
  2170. dp_info_rl("Got pkt with REO ERROR: %d",
  2171. wbm_err_info.reo_err_code);
  2172. qdf_nbuf_free(nbuf);
  2173. }
  2174. } else if (wbm_err_info.reo_psh_rsn
  2175. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2176. DP_STATS_INC(soc, rx.reo2rel_route_drop, 1);
  2177. qdf_nbuf_free(nbuf);
  2178. }
  2179. } else if (wbm_err_info.wbm_err_src ==
  2180. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2181. if (wbm_err_info.rxdma_psh_rsn
  2182. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2183. DP_STATS_INC(soc,
  2184. rx.err.rxdma_error
  2185. [wbm_err_info.rxdma_err_code], 1);
  2186. /* increment @pdev level */
  2187. pool_id = wbm_err_info.pool_id;
  2188. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2189. if (dp_pdev)
  2190. DP_STATS_INC(dp_pdev,
  2191. err.rxdma_error, 1);
  2192. switch (wbm_err_info.rxdma_err_code) {
  2193. case HAL_RXDMA_ERR_UNENCRYPTED:
  2194. case HAL_RXDMA_ERR_WIFI_PARSE:
  2195. pool_id = wbm_err_info.pool_id;
  2196. dp_rx_process_rxdma_err(soc, nbuf,
  2197. rx_tlv_hdr,
  2198. peer,
  2199. wbm_err_info.
  2200. rxdma_err_code,
  2201. pool_id);
  2202. break;
  2203. case HAL_RXDMA_ERR_TKIP_MIC:
  2204. dp_rx_process_mic_error(soc, nbuf,
  2205. rx_tlv_hdr,
  2206. peer);
  2207. if (peer)
  2208. DP_STATS_INC(peer, rx.err.mic_err, 1);
  2209. break;
  2210. case HAL_RXDMA_ERR_DECRYPT:
  2211. if (peer) {
  2212. DP_STATS_INC(peer, rx.err.
  2213. decrypt_err, 1);
  2214. qdf_nbuf_free(nbuf);
  2215. break;
  2216. }
  2217. if (!dp_handle_rxdma_decrypt_err()) {
  2218. qdf_nbuf_free(nbuf);
  2219. break;
  2220. }
  2221. pool_id = wbm_err_info.pool_id;
  2222. err_code = wbm_err_info.rxdma_err_code;
  2223. tlv_hdr = rx_tlv_hdr;
  2224. dp_rx_process_rxdma_err(soc, nbuf,
  2225. tlv_hdr, NULL,
  2226. err_code,
  2227. pool_id);
  2228. break;
  2229. default:
  2230. qdf_nbuf_free(nbuf);
  2231. dp_err_rl("RXDMA error %d",
  2232. wbm_err_info.rxdma_err_code);
  2233. }
  2234. } else if (wbm_err_info.rxdma_psh_rsn
  2235. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2236. DP_STATS_INC(soc, rx.rxdma2rel_route_drop, 1);
  2237. qdf_nbuf_free(nbuf);
  2238. }
  2239. } else {
  2240. /* Should not come here */
  2241. qdf_assert(0);
  2242. }
  2243. if (peer)
  2244. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2245. nbuf = next;
  2246. }
  2247. return rx_bufs_used; /* Assume no scale factor for now */
  2248. }
  2249. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2250. /**
  2251. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2252. *
  2253. * @soc: core DP main context
  2254. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2255. * @rx_desc: void pointer to rx descriptor
  2256. *
  2257. * Return: void
  2258. */
  2259. static void dup_desc_dbg(struct dp_soc *soc,
  2260. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2261. void *rx_desc)
  2262. {
  2263. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2264. dp_rx_dump_info_and_assert(
  2265. soc,
  2266. soc->rx_rel_ring.hal_srng,
  2267. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2268. rx_desc);
  2269. }
  2270. /**
  2271. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2272. *
  2273. * @soc: core DP main context
  2274. * @mac_id: mac id which is one of 3 mac_ids
  2275. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2276. * @head: head of descs list to be freed
  2277. * @tail: tail of decs list to be freed
  2278. * Return: number of msdu in MPDU to be popped
  2279. */
  2280. static inline uint32_t
  2281. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2282. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2283. union dp_rx_desc_list_elem_t **head,
  2284. union dp_rx_desc_list_elem_t **tail)
  2285. {
  2286. void *rx_msdu_link_desc;
  2287. qdf_nbuf_t msdu;
  2288. qdf_nbuf_t last;
  2289. struct hal_rx_msdu_list msdu_list;
  2290. uint16_t num_msdus;
  2291. struct hal_buf_info buf_info;
  2292. uint32_t rx_bufs_used = 0;
  2293. uint32_t msdu_cnt;
  2294. uint32_t i;
  2295. uint8_t push_reason;
  2296. uint8_t rxdma_error_code = 0;
  2297. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2298. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2299. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2300. hal_rxdma_desc_t ring_desc;
  2301. struct rx_desc_pool *rx_desc_pool;
  2302. if (!pdev) {
  2303. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2304. soc, mac_id);
  2305. return rx_bufs_used;
  2306. }
  2307. msdu = 0;
  2308. last = NULL;
  2309. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2310. &buf_info, &msdu_cnt);
  2311. push_reason =
  2312. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2313. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2314. rxdma_error_code =
  2315. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2316. }
  2317. do {
  2318. rx_msdu_link_desc =
  2319. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2320. qdf_assert_always(rx_msdu_link_desc);
  2321. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2322. &msdu_list, &num_msdus);
  2323. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2324. /* if the msdus belongs to NSS offloaded radio &&
  2325. * the rbm is not SW1_BM then return the msdu_link
  2326. * descriptor without freeing the msdus (nbufs). let
  2327. * these buffers be given to NSS completion ring for
  2328. * NSS to free them.
  2329. * else iterate through the msdu link desc list and
  2330. * free each msdu in the list.
  2331. */
  2332. if (msdu_list.rbm[0] !=
  2333. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2334. wlan_cfg_get_dp_pdev_nss_enabled(
  2335. pdev->wlan_cfg_ctx))
  2336. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2337. else {
  2338. for (i = 0; i < num_msdus; i++) {
  2339. struct dp_rx_desc *rx_desc =
  2340. dp_rx_cookie_2_va_rxdma_buf(soc,
  2341. msdu_list.sw_cookie[i]);
  2342. qdf_assert_always(rx_desc);
  2343. msdu = rx_desc->nbuf;
  2344. /*
  2345. * this is a unlikely scenario
  2346. * where the host is reaping
  2347. * a descriptor which
  2348. * it already reaped just a while ago
  2349. * but is yet to replenish
  2350. * it back to HW.
  2351. * In this case host will dump
  2352. * the last 128 descriptors
  2353. * including the software descriptor
  2354. * rx_desc and assert.
  2355. */
  2356. ring_desc = rxdma_dst_ring_desc;
  2357. if (qdf_unlikely(!rx_desc->in_use)) {
  2358. dup_desc_dbg(soc,
  2359. ring_desc,
  2360. rx_desc);
  2361. continue;
  2362. }
  2363. rx_desc_pool = &soc->
  2364. rx_desc_buf[rx_desc->pool_id];
  2365. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2366. dp_ipa_handle_rx_buf_smmu_mapping(
  2367. soc, msdu,
  2368. rx_desc_pool->buf_size,
  2369. false);
  2370. qdf_nbuf_unmap_nbytes_single(
  2371. soc->osdev, msdu,
  2372. QDF_DMA_FROM_DEVICE,
  2373. rx_desc_pool->buf_size);
  2374. rx_desc->unmapped = 1;
  2375. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2376. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  2377. soc, msdu);
  2378. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2379. rx_desc->pool_id);
  2380. rx_bufs_used++;
  2381. dp_rx_add_to_free_desc_list(head,
  2382. tail, rx_desc);
  2383. }
  2384. }
  2385. } else {
  2386. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  2387. }
  2388. /*
  2389. * Store the current link buffer into to the local structure
  2390. * to be used for release purpose.
  2391. */
  2392. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2393. buf_info.paddr, buf_info.sw_cookie,
  2394. buf_info.rbm);
  2395. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2396. &buf_info);
  2397. dp_rx_link_desc_return_by_addr(soc,
  2398. (hal_buff_addrinfo_t)
  2399. rx_link_buf_info,
  2400. bm_action);
  2401. } while (buf_info.paddr);
  2402. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  2403. if (pdev)
  2404. DP_STATS_INC(pdev, err.rxdma_error, 1);
  2405. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  2406. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  2407. }
  2408. return rx_bufs_used;
  2409. }
  2410. uint32_t
  2411. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2412. uint32_t mac_id, uint32_t quota)
  2413. {
  2414. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2415. hal_rxdma_desc_t rxdma_dst_ring_desc;
  2416. hal_soc_handle_t hal_soc;
  2417. void *err_dst_srng;
  2418. union dp_rx_desc_list_elem_t *head = NULL;
  2419. union dp_rx_desc_list_elem_t *tail = NULL;
  2420. struct dp_srng *dp_rxdma_srng;
  2421. struct rx_desc_pool *rx_desc_pool;
  2422. uint32_t work_done = 0;
  2423. uint32_t rx_bufs_used = 0;
  2424. if (!pdev)
  2425. return 0;
  2426. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  2427. if (!err_dst_srng) {
  2428. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2429. soc, err_dst_srng);
  2430. return 0;
  2431. }
  2432. hal_soc = soc->hal_soc;
  2433. qdf_assert(hal_soc);
  2434. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  2435. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2436. soc, err_dst_srng);
  2437. return 0;
  2438. }
  2439. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  2440. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  2441. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  2442. rxdma_dst_ring_desc,
  2443. &head, &tail);
  2444. }
  2445. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  2446. if (rx_bufs_used) {
  2447. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2448. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2449. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2450. } else {
  2451. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  2452. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  2453. }
  2454. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2455. rx_desc_pool, rx_bufs_used, &head, &tail);
  2456. work_done += rx_bufs_used;
  2457. }
  2458. return work_done;
  2459. }
  2460. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2461. static inline uint32_t
  2462. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2463. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2464. union dp_rx_desc_list_elem_t **head,
  2465. union dp_rx_desc_list_elem_t **tail)
  2466. {
  2467. void *rx_msdu_link_desc;
  2468. qdf_nbuf_t msdu;
  2469. qdf_nbuf_t last;
  2470. struct hal_rx_msdu_list msdu_list;
  2471. uint16_t num_msdus;
  2472. struct hal_buf_info buf_info;
  2473. uint32_t rx_bufs_used = 0, msdu_cnt, i;
  2474. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2475. struct rx_desc_pool *rx_desc_pool;
  2476. msdu = 0;
  2477. last = NULL;
  2478. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2479. &buf_info, &msdu_cnt);
  2480. do {
  2481. rx_msdu_link_desc =
  2482. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2483. if (!rx_msdu_link_desc) {
  2484. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  2485. break;
  2486. }
  2487. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2488. &msdu_list, &num_msdus);
  2489. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2490. for (i = 0; i < num_msdus; i++) {
  2491. struct dp_rx_desc *rx_desc =
  2492. dp_rx_cookie_2_va_rxdma_buf(
  2493. soc,
  2494. msdu_list.sw_cookie[i]);
  2495. qdf_assert_always(rx_desc);
  2496. rx_desc_pool =
  2497. &soc->rx_desc_buf[rx_desc->pool_id];
  2498. msdu = rx_desc->nbuf;
  2499. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2500. dp_ipa_handle_rx_buf_smmu_mapping(
  2501. soc, msdu,
  2502. rx_desc_pool->buf_size,
  2503. false);
  2504. qdf_nbuf_unmap_nbytes_single(
  2505. soc->osdev,
  2506. msdu,
  2507. QDF_DMA_FROM_DEVICE,
  2508. rx_desc_pool->buf_size);
  2509. rx_desc->unmapped = 1;
  2510. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2511. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2512. rx_desc->pool_id);
  2513. rx_bufs_used++;
  2514. dp_rx_add_to_free_desc_list(head,
  2515. tail, rx_desc);
  2516. }
  2517. }
  2518. /*
  2519. * Store the current link buffer into to the local structure
  2520. * to be used for release purpose.
  2521. */
  2522. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2523. buf_info.paddr, buf_info.sw_cookie,
  2524. buf_info.rbm);
  2525. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2526. &buf_info);
  2527. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  2528. rx_link_buf_info,
  2529. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  2530. } while (buf_info.paddr);
  2531. return rx_bufs_used;
  2532. }
  2533. /*
  2534. *
  2535. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  2536. *
  2537. * @soc: core DP main context
  2538. * @hal_desc: hal descriptor
  2539. * @buf_type: indicates if the buffer is of type link disc or msdu
  2540. * Return: None
  2541. *
  2542. * wbm_internal_error is seen in following scenarios :
  2543. *
  2544. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  2545. * 2. Null pointers detected during delinking process
  2546. *
  2547. * Some null pointer cases:
  2548. *
  2549. * a. MSDU buffer pointer is NULL
  2550. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  2551. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  2552. */
  2553. void
  2554. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  2555. uint32_t buf_type)
  2556. {
  2557. struct hal_buf_info buf_info = {0};
  2558. struct dp_rx_desc *rx_desc = NULL;
  2559. struct rx_desc_pool *rx_desc_pool;
  2560. uint32_t rx_bufs_reaped = 0;
  2561. union dp_rx_desc_list_elem_t *head = NULL;
  2562. union dp_rx_desc_list_elem_t *tail = NULL;
  2563. uint8_t pool_id;
  2564. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  2565. if (!buf_info.paddr) {
  2566. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  2567. return;
  2568. }
  2569. /* buffer_addr_info is the first element of ring_desc */
  2570. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  2571. &buf_info);
  2572. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  2573. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  2574. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  2575. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  2576. if (rx_desc && rx_desc->nbuf) {
  2577. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2578. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2579. dp_ipa_handle_rx_buf_smmu_mapping(
  2580. soc, rx_desc->nbuf,
  2581. rx_desc_pool->buf_size,
  2582. false);
  2583. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2584. QDF_DMA_FROM_DEVICE,
  2585. rx_desc_pool->buf_size);
  2586. rx_desc->unmapped = 1;
  2587. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2588. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  2589. rx_desc->pool_id);
  2590. dp_rx_add_to_free_desc_list(&head,
  2591. &tail,
  2592. rx_desc);
  2593. rx_bufs_reaped++;
  2594. }
  2595. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  2596. rx_bufs_reaped = dp_wbm_int_err_mpdu_pop(soc, pool_id,
  2597. hal_desc,
  2598. &head, &tail);
  2599. }
  2600. if (rx_bufs_reaped) {
  2601. struct rx_desc_pool *rx_desc_pool;
  2602. struct dp_srng *dp_rxdma_srng;
  2603. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  2604. dp_rxdma_srng = &soc->rx_refill_buf_ring[pool_id];
  2605. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  2606. dp_rx_buffers_replenish(soc, pool_id, dp_rxdma_srng,
  2607. rx_desc_pool,
  2608. rx_bufs_reaped,
  2609. &head, &tail);
  2610. }
  2611. }
  2612. #endif /* QCA_HOST_MODE_WIFI_DISABLED */