main.c 143 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define CNSS_QUIRKS_DEFAULT 0
  62. #ifdef CONFIG_CNSS_EMULATION
  63. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  64. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  65. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  66. #else
  67. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  68. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  69. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  70. #endif
  71. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  72. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  73. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  74. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  76. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  77. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  78. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  79. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  80. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  81. enum cnss_cal_db_op {
  82. CNSS_CAL_DB_UPLOAD,
  83. CNSS_CAL_DB_DOWNLOAD,
  84. CNSS_CAL_DB_INVALID_OP,
  85. };
  86. enum cnss_recovery_type {
  87. CNSS_WLAN_RECOVERY = 0x1,
  88. CNSS_PCSS_RECOVERY = 0x2,
  89. };
  90. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  91. #define CNSS_MAX_DEV_NUM 2
  92. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  93. static int plat_env_count;
  94. #else
  95. static struct cnss_plat_data *plat_env;
  96. #endif
  97. static bool cnss_allow_driver_loading;
  98. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  99. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  100. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  101. };
  102. static struct cnss_fw_files FW_FILES_DEFAULT = {
  103. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  104. "utfbd.bin", "epping.bin", "evicted.bin"
  105. };
  106. struct cnss_driver_event {
  107. struct list_head list;
  108. enum cnss_driver_event_type type;
  109. bool sync;
  110. struct completion complete;
  111. int ret;
  112. void *data;
  113. };
  114. bool cnss_check_driver_loading_allowed(void)
  115. {
  116. return cnss_allow_driver_loading;
  117. }
  118. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  119. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  120. struct cnss_plat_data *plat_priv)
  121. {
  122. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  123. if (plat_priv) {
  124. plat_priv->plat_idx = plat_env_count;
  125. plat_env[plat_priv->plat_idx] = plat_priv;
  126. plat_env_count++;
  127. }
  128. }
  129. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  130. *plat_dev)
  131. {
  132. int i;
  133. if (!plat_dev)
  134. return NULL;
  135. for (i = 0; i < plat_env_count; i++) {
  136. if (plat_env[i]->plat_dev == plat_dev)
  137. return plat_env[i];
  138. }
  139. return NULL;
  140. }
  141. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  142. *plat_dev)
  143. {
  144. int i;
  145. if (!plat_dev) {
  146. for (i = 0; i < plat_env_count; i++) {
  147. if (plat_env[i])
  148. return plat_env[i];
  149. }
  150. }
  151. return NULL;
  152. }
  153. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  154. {
  155. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  156. plat_env[plat_priv->plat_idx] = NULL;
  157. plat_env_count--;
  158. }
  159. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  160. {
  161. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  162. "wlan_%d", plat_priv->plat_idx);
  163. return 0;
  164. }
  165. static int cnss_plat_env_available(void)
  166. {
  167. int ret = 0;
  168. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  169. cnss_pr_err("ERROR: No space to store plat_priv\n");
  170. ret = -ENOMEM;
  171. }
  172. return ret;
  173. }
  174. int cnss_get_plat_env_count(void)
  175. {
  176. return plat_env_count;
  177. }
  178. struct cnss_plat_data *cnss_get_plat_env(int index)
  179. {
  180. return plat_env[index];
  181. }
  182. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  183. {
  184. int i;
  185. for (i = 0; i < plat_env_count; i++) {
  186. if (plat_env[i]->rc_num == rc_num)
  187. return plat_env[i];
  188. }
  189. return NULL;
  190. }
  191. static inline int
  192. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  193. {
  194. return of_property_read_u32(plat_priv->dev_node,
  195. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  196. }
  197. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  198. {
  199. int ret = 0;
  200. ret = cnss_get_qrtr_node_id(plat_priv);
  201. if (ret) {
  202. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  203. plat_priv->qrtr_node_id = 0;
  204. plat_priv->wlfw_service_instance_id = 0;
  205. } else {
  206. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  207. QRTR_NODE_FW_ID_BASE;
  208. cnss_pr_dbg("service_instance_id=0x%x\n",
  209. plat_priv->wlfw_service_instance_id);
  210. }
  211. }
  212. static inline int
  213. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  214. {
  215. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  216. "qcom,pld_bus_ops_name",
  217. &plat_priv->pld_bus_ops_name);
  218. }
  219. #else
  220. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  221. struct cnss_plat_data *plat_priv)
  222. {
  223. plat_env = plat_priv;
  224. }
  225. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  226. {
  227. return plat_env;
  228. }
  229. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  230. {
  231. plat_env = NULL;
  232. }
  233. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  234. {
  235. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  236. "wlan");
  237. return 0;
  238. }
  239. static int cnss_plat_env_available(void)
  240. {
  241. return 0;
  242. }
  243. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  244. {
  245. return cnss_bus_dev_to_plat_priv(NULL);
  246. }
  247. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  248. {
  249. }
  250. static int
  251. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  252. {
  253. return 0;
  254. }
  255. #endif
  256. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,sleep-clk-support");
  260. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  261. plat_priv->sleep_clk);
  262. }
  263. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  264. {
  265. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  266. "qcom,no-bwscale");
  267. }
  268. static inline int
  269. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  270. {
  271. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  272. "qcom,wlan-rc-num", &plat_priv->rc_num);
  273. }
  274. bool cnss_is_dual_wlan_enabled(void)
  275. {
  276. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  277. }
  278. /**
  279. * cnss_get_mem_seg_count - Get segment count of memory
  280. * @type: memory type
  281. * @seg: segment count
  282. *
  283. * Return: 0 on success, negative value on failure
  284. */
  285. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  286. {
  287. struct cnss_plat_data *plat_priv;
  288. plat_priv = cnss_get_plat_priv(NULL);
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (type) {
  292. case CNSS_REMOTE_MEM_TYPE_FW:
  293. *seg = plat_priv->fw_mem_seg_len;
  294. break;
  295. case CNSS_REMOTE_MEM_TYPE_QDSS:
  296. *seg = plat_priv->qdss_mem_seg_len;
  297. break;
  298. default:
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  304. /**
  305. * cnss_get_wifi_kobject -return wifi kobject
  306. * Return: Null, to maintain driver comnpatibilty
  307. */
  308. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  309. {
  310. struct cnss_plat_data *plat_priv;
  311. plat_priv = cnss_get_plat_priv(NULL);
  312. if (!plat_priv)
  313. return NULL;
  314. return plat_priv->wifi_kobj;
  315. }
  316. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  317. /**
  318. * cnss_get_mem_segment_info - Get memory info of different type
  319. * @type: memory type
  320. * @segment: array to save the segment info
  321. * @seg: segment count
  322. *
  323. * Return: 0 on success, negative value on failure
  324. */
  325. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  326. struct cnss_mem_segment segment[],
  327. u32 segment_count)
  328. {
  329. struct cnss_plat_data *plat_priv;
  330. u32 i;
  331. plat_priv = cnss_get_plat_priv(NULL);
  332. if (!plat_priv)
  333. return -ENODEV;
  334. switch (type) {
  335. case CNSS_REMOTE_MEM_TYPE_FW:
  336. if (segment_count > plat_priv->fw_mem_seg_len)
  337. segment_count = plat_priv->fw_mem_seg_len;
  338. for (i = 0; i < segment_count; i++) {
  339. segment[i].size = plat_priv->fw_mem[i].size;
  340. segment[i].va = plat_priv->fw_mem[i].va;
  341. segment[i].pa = plat_priv->fw_mem[i].pa;
  342. }
  343. break;
  344. case CNSS_REMOTE_MEM_TYPE_QDSS:
  345. if (segment_count > plat_priv->qdss_mem_seg_len)
  346. segment_count = plat_priv->qdss_mem_seg_len;
  347. for (i = 0; i < segment_count; i++) {
  348. segment[i].size = plat_priv->qdss_mem[i].size;
  349. segment[i].va = plat_priv->qdss_mem[i].va;
  350. segment[i].pa = plat_priv->qdss_mem[i].pa;
  351. }
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  359. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  360. {
  361. struct device_node *audio_ion_node;
  362. struct platform_device *audio_ion_pdev;
  363. audio_ion_node = of_find_compatible_node(NULL, NULL,
  364. "qcom,msm-audio-ion");
  365. if (!audio_ion_node) {
  366. cnss_pr_err("Unable to get Audio ion node");
  367. return -EINVAL;
  368. }
  369. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  370. of_node_put(audio_ion_node);
  371. if (!audio_ion_pdev) {
  372. cnss_pr_err("Unable to get Audio ion platform device");
  373. return -EINVAL;
  374. }
  375. plat_priv->audio_iommu_domain =
  376. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  377. put_device(&audio_ion_pdev->dev);
  378. if (!plat_priv->audio_iommu_domain) {
  379. cnss_pr_err("Unable to get Audio ion iommu domain");
  380. return -EINVAL;
  381. }
  382. return 0;
  383. }
  384. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  385. enum cnss_feature_v01 feature)
  386. {
  387. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  388. return -EINVAL;
  389. plat_priv->feature_list |= 1 << feature;
  390. return 0;
  391. }
  392. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  393. enum cnss_feature_v01 feature)
  394. {
  395. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  396. return -EINVAL;
  397. plat_priv->feature_list &= ~(1 << feature);
  398. return 0;
  399. }
  400. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  401. u64 *feature_list)
  402. {
  403. if (unlikely(!plat_priv))
  404. return -EINVAL;
  405. *feature_list = plat_priv->feature_list;
  406. return 0;
  407. }
  408. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  409. char *buf, const size_t buf_len)
  410. {
  411. if (unlikely(!plat_priv || !buf || !buf_len))
  412. return 0;
  413. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  414. "platform-name-required")) {
  415. struct device_node *root;
  416. root = of_find_node_by_path("/");
  417. if (root) {
  418. const char *model;
  419. size_t model_len;
  420. model = of_get_property(root, "model", NULL);
  421. if (model) {
  422. model_len = strlcpy(buf, model, buf_len);
  423. cnss_pr_dbg("Platform name: %s (%zu)\n",
  424. buf, model_len);
  425. return model_len;
  426. }
  427. }
  428. }
  429. return 0;
  430. }
  431. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  432. {
  433. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  434. return;
  435. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  436. plat_priv->driver_state,
  437. atomic_read(&plat_priv->pm_count));
  438. pm_stay_awake(&plat_priv->plat_dev->dev);
  439. }
  440. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  441. {
  442. int r = atomic_dec_return(&plat_priv->pm_count);
  443. WARN_ON(r < 0);
  444. if (r != 0)
  445. return;
  446. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  447. plat_priv->driver_state,
  448. atomic_read(&plat_priv->pm_count));
  449. pm_relax(&plat_priv->plat_dev->dev);
  450. }
  451. int cnss_get_fw_files_for_target(struct device *dev,
  452. struct cnss_fw_files *pfw_files,
  453. u32 target_type, u32 target_version)
  454. {
  455. if (!pfw_files)
  456. return -ENODEV;
  457. switch (target_version) {
  458. case QCA6174_REV3_VERSION:
  459. case QCA6174_REV3_2_VERSION:
  460. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  461. break;
  462. default:
  463. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  464. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  465. target_type, target_version);
  466. break;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  471. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  472. {
  473. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  474. if (!plat_priv)
  475. return -ENODEV;
  476. if (!cap)
  477. return -EINVAL;
  478. *cap = plat_priv->cap;
  479. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  480. return 0;
  481. }
  482. EXPORT_SYMBOL(cnss_get_platform_cap);
  483. /**
  484. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  485. * @dev: Device
  486. * @fw_cap: FW Capability which needs to be checked
  487. *
  488. * Return: TRUE if supported, FALSE on failure or if not supported
  489. */
  490. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  491. {
  492. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  493. bool is_supported = false;
  494. if (!plat_priv)
  495. return is_supported;
  496. if (!plat_priv->fw_caps)
  497. return is_supported;
  498. switch (fw_cap) {
  499. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  500. is_supported = !!(plat_priv->fw_caps &
  501. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  502. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  503. is_supported = false;
  504. break;
  505. default:
  506. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  507. }
  508. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  509. is_supported ? "supported" : "not supported");
  510. return is_supported;
  511. }
  512. EXPORT_SYMBOL(cnss_get_fw_cap);
  513. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  514. {
  515. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  516. if (!plat_priv)
  517. return;
  518. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  519. }
  520. EXPORT_SYMBOL(cnss_request_pm_qos);
  521. void cnss_remove_pm_qos(struct device *dev)
  522. {
  523. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  524. if (!plat_priv)
  525. return;
  526. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  527. }
  528. EXPORT_SYMBOL(cnss_remove_pm_qos);
  529. int cnss_wlan_enable(struct device *dev,
  530. struct cnss_wlan_enable_cfg *config,
  531. enum cnss_driver_mode mode,
  532. const char *host_version)
  533. {
  534. int ret = 0;
  535. struct cnss_plat_data *plat_priv;
  536. if (!dev) {
  537. cnss_pr_err("Invalid dev pointer\n");
  538. return -EINVAL;
  539. }
  540. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  541. if (!plat_priv)
  542. return -ENODEV;
  543. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  544. return 0;
  545. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  546. return 0;
  547. if (!config || !host_version) {
  548. cnss_pr_err("Invalid config or host_version pointer\n");
  549. return -EINVAL;
  550. }
  551. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  552. mode, config, host_version);
  553. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  554. goto skip_cfg;
  555. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  556. config->send_msi_ce = true;
  557. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  558. if (ret)
  559. goto out;
  560. skip_cfg:
  561. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  562. out:
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(cnss_wlan_enable);
  566. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  567. {
  568. int ret = 0;
  569. struct cnss_plat_data *plat_priv;
  570. if (!dev) {
  571. cnss_pr_err("Invalid dev pointer\n");
  572. return -EINVAL;
  573. }
  574. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  575. if (!plat_priv)
  576. return -ENODEV;
  577. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  578. return 0;
  579. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  580. return 0;
  581. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  582. cnss_bus_free_qdss_mem(plat_priv);
  583. return ret;
  584. }
  585. EXPORT_SYMBOL(cnss_wlan_disable);
  586. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  587. int cnss_iommu_map(struct iommu_domain *domain,
  588. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  589. {
  590. return iommu_map(domain, iova, paddr, size, prot);
  591. }
  592. #else
  593. int cnss_iommu_map(struct iommu_domain *domain,
  594. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  595. {
  596. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  597. }
  598. #endif
  599. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  600. dma_addr_t iova, size_t size)
  601. {
  602. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  603. uint32_t page_offset;
  604. if (!plat_priv)
  605. return -ENODEV;
  606. if (!plat_priv->audio_iommu_domain)
  607. return -EINVAL;
  608. page_offset = iova & (PAGE_SIZE - 1);
  609. if (page_offset + size > PAGE_SIZE)
  610. size += PAGE_SIZE;
  611. iova -= page_offset;
  612. paddr -= page_offset;
  613. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  614. roundup(size, PAGE_SIZE), IOMMU_READ |
  615. IOMMU_WRITE | IOMMU_CACHE);
  616. }
  617. EXPORT_SYMBOL(cnss_audio_smmu_map);
  618. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  619. {
  620. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  621. uint32_t page_offset;
  622. if (!plat_priv)
  623. return;
  624. if (!plat_priv->audio_iommu_domain)
  625. return;
  626. page_offset = iova & (PAGE_SIZE - 1);
  627. if (page_offset + size > PAGE_SIZE)
  628. size += PAGE_SIZE;
  629. iova -= page_offset;
  630. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  631. roundup(size, PAGE_SIZE));
  632. }
  633. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  634. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  635. u32 data_len, u8 *output)
  636. {
  637. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  638. int ret = 0;
  639. if (!plat_priv) {
  640. cnss_pr_err("plat_priv is NULL!\n");
  641. return -EINVAL;
  642. }
  643. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  644. return 0;
  645. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  646. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  647. plat_priv->driver_state);
  648. ret = -EINVAL;
  649. goto out;
  650. }
  651. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  652. data_len, output);
  653. out:
  654. return ret;
  655. }
  656. EXPORT_SYMBOL(cnss_athdiag_read);
  657. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  658. u32 data_len, u8 *input)
  659. {
  660. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  661. int ret = 0;
  662. if (!plat_priv) {
  663. cnss_pr_err("plat_priv is NULL!\n");
  664. return -EINVAL;
  665. }
  666. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  667. return 0;
  668. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  669. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  670. plat_priv->driver_state);
  671. ret = -EINVAL;
  672. goto out;
  673. }
  674. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  675. data_len, input);
  676. out:
  677. return ret;
  678. }
  679. EXPORT_SYMBOL(cnss_athdiag_write);
  680. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  681. {
  682. struct cnss_plat_data *plat_priv;
  683. if (!dev) {
  684. cnss_pr_err("Invalid dev pointer\n");
  685. return -EINVAL;
  686. }
  687. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  688. if (!plat_priv)
  689. return -ENODEV;
  690. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  691. return 0;
  692. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  693. }
  694. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  695. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  696. {
  697. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  698. if (!plat_priv)
  699. return -EINVAL;
  700. if (!plat_priv->fw_pcie_gen_switch) {
  701. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  702. return -EOPNOTSUPP;
  703. }
  704. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  705. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  706. return -EINVAL;
  707. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  708. plat_priv->pcie_gen_speed = pcie_gen_speed;
  709. return 0;
  710. }
  711. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  712. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  713. {
  714. switch (plat_priv->device_id) {
  715. case PEACH_DEVICE_ID:
  716. if (!plat_priv->fw_aux_uc_support) {
  717. cnss_pr_dbg("FW does not support aux uc capability\n");
  718. return false;
  719. }
  720. break;
  721. default:
  722. cnss_pr_dbg("Host does not support aux uc capability\n");
  723. return false;
  724. }
  725. return true;
  726. }
  727. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  728. {
  729. int ret = 0;
  730. if (!plat_priv)
  731. return -ENODEV;
  732. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  733. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  734. if (ret)
  735. goto out;
  736. cnss_bus_load_tme_patch(plat_priv);
  737. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  738. WLFW_TME_LITE_PATCH_FILE_V01);
  739. if (plat_priv->hds_enabled)
  740. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  741. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  742. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  743. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  744. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  745. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  746. plat_priv->ctrl_params.bdf_type);
  747. if (ret)
  748. goto out;
  749. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  750. return 0;
  751. ret = cnss_bus_load_m3(plat_priv);
  752. if (ret)
  753. goto out;
  754. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  755. if (ret)
  756. goto out;
  757. if (cnss_is_aux_support_enabled(plat_priv)) {
  758. ret = cnss_bus_load_aux(plat_priv);
  759. if (ret)
  760. goto out;
  761. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  762. if (ret)
  763. goto out;
  764. }
  765. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  766. return 0;
  767. out:
  768. return ret;
  769. }
  770. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  771. {
  772. int ret = 0;
  773. if (!plat_priv->antenna) {
  774. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  775. if (ret)
  776. goto out;
  777. }
  778. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  779. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  780. if (ret)
  781. goto out;
  782. }
  783. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  784. if (ret)
  785. goto out;
  786. return 0;
  787. out:
  788. return ret;
  789. }
  790. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  791. {
  792. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  793. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  794. }
  795. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  796. {
  797. u32 i;
  798. int ret = 0;
  799. struct cnss_plat_ipc_daemon_config *cfg;
  800. ret = cnss_qmi_get_dms_mac(plat_priv);
  801. if (ret == 0 && plat_priv->dms.mac_valid)
  802. goto qmi_send;
  803. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  804. * Thus assert on failure to get MAC from DMS even after retries
  805. */
  806. if (plat_priv->use_nv_mac) {
  807. /* Check if Daemon says platform support DMS MAC provisioning */
  808. cfg = cnss_plat_ipc_qmi_daemon_config();
  809. if (cfg) {
  810. if (!cfg->dms_mac_addr_supported) {
  811. cnss_pr_err("DMS MAC address not supported\n");
  812. CNSS_ASSERT(0);
  813. return -EINVAL;
  814. }
  815. }
  816. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  817. if (plat_priv->dms.mac_valid)
  818. break;
  819. ret = cnss_qmi_get_dms_mac(plat_priv);
  820. if (ret == 0)
  821. break;
  822. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  823. }
  824. if (!plat_priv->dms.mac_valid) {
  825. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  826. CNSS_ASSERT(0);
  827. return -EINVAL;
  828. }
  829. }
  830. qmi_send:
  831. if (plat_priv->dms.mac_valid)
  832. ret =
  833. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  834. ARRAY_SIZE(plat_priv->dms.mac));
  835. return ret;
  836. }
  837. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  838. enum cnss_cal_db_op op, u32 *size)
  839. {
  840. int ret = 0;
  841. u32 timeout = cnss_get_timeout(plat_priv,
  842. CNSS_TIMEOUT_DAEMON_CONNECTION);
  843. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  844. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  845. if (op >= CNSS_CAL_DB_INVALID_OP)
  846. return -EINVAL;
  847. if (!plat_priv->cbc_file_download) {
  848. cnss_pr_info("CAL DB file not required as per BDF\n");
  849. return 0;
  850. }
  851. if (*size == 0) {
  852. cnss_pr_err("Invalid cal file size\n");
  853. return -EINVAL;
  854. }
  855. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  856. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  857. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  858. msecs_to_jiffies(timeout));
  859. if (!ret) {
  860. cnss_pr_err("Daemon not yet connected\n");
  861. CNSS_ASSERT(0);
  862. return ret;
  863. }
  864. }
  865. if (!plat_priv->cal_mem->va) {
  866. cnss_pr_err("CAL DB Memory not setup for FW\n");
  867. return -EINVAL;
  868. }
  869. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  870. if (op == CNSS_CAL_DB_DOWNLOAD) {
  871. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  872. ret = cnss_plat_ipc_qmi_file_download(client_id,
  873. CNSS_CAL_DB_FILE_NAME,
  874. plat_priv->cal_mem->va,
  875. size);
  876. } else {
  877. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  878. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  879. CNSS_CAL_DB_FILE_NAME,
  880. plat_priv->cal_mem->va,
  881. *size);
  882. }
  883. if (ret)
  884. cnss_pr_err("Cal DB file %s %s failure\n",
  885. CNSS_CAL_DB_FILE_NAME,
  886. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  887. else
  888. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  889. CNSS_CAL_DB_FILE_NAME,
  890. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  891. *size);
  892. return ret;
  893. }
  894. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  895. {
  896. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  897. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  898. return -EINVAL;
  899. }
  900. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  901. &plat_priv->cal_file_size);
  902. }
  903. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  904. u32 *cal_file_size)
  905. {
  906. /* To download pass the total size of cal DB mem allocated.
  907. * After cal file is download to mem, its size is updated in
  908. * return pointer
  909. */
  910. *cal_file_size = plat_priv->cal_mem->size;
  911. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  912. cal_file_size);
  913. }
  914. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  915. {
  916. int ret = 0;
  917. u32 cal_file_size = 0;
  918. if (!plat_priv)
  919. return -ENODEV;
  920. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  921. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  922. return -EINVAL;
  923. }
  924. cnss_pr_dbg("Processing FW Init Done..\n");
  925. del_timer(&plat_priv->fw_boot_timer);
  926. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  927. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  928. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  929. cnss_send_subsys_restart_level_msg(plat_priv);
  930. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  931. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  932. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  933. }
  934. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  935. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  936. CNSS_WALTEST);
  937. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  938. cnss_request_antenna_sharing(plat_priv);
  939. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  940. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  941. plat_priv->cal_time = jiffies;
  942. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  943. CNSS_CALIBRATION);
  944. } else {
  945. ret = cnss_setup_dms_mac(plat_priv);
  946. ret = cnss_bus_call_driver_probe(plat_priv);
  947. }
  948. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  949. goto out;
  950. else if (ret)
  951. goto shutdown;
  952. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  953. return 0;
  954. shutdown:
  955. cnss_bus_dev_shutdown(plat_priv);
  956. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  957. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  958. out:
  959. return ret;
  960. }
  961. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  962. {
  963. switch (type) {
  964. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  965. return "SERVER_ARRIVE";
  966. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  967. return "SERVER_EXIT";
  968. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  969. return "REQUEST_MEM";
  970. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  971. return "FW_MEM_READY";
  972. case CNSS_DRIVER_EVENT_FW_READY:
  973. return "FW_READY";
  974. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  975. return "COLD_BOOT_CAL_START";
  976. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  977. return "COLD_BOOT_CAL_DONE";
  978. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  979. return "REGISTER_DRIVER";
  980. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  981. return "UNREGISTER_DRIVER";
  982. case CNSS_DRIVER_EVENT_RECOVERY:
  983. return "RECOVERY";
  984. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  985. return "FORCE_FW_ASSERT";
  986. case CNSS_DRIVER_EVENT_POWER_UP:
  987. return "POWER_UP";
  988. case CNSS_DRIVER_EVENT_POWER_DOWN:
  989. return "POWER_DOWN";
  990. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  991. return "IDLE_RESTART";
  992. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  993. return "IDLE_SHUTDOWN";
  994. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  995. return "IMS_WFC_CALL_IND";
  996. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  997. return "WLFW_TWC_CFG_IND";
  998. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  999. return "QDSS_TRACE_REQ_MEM";
  1000. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1001. return "FW_MEM_FILE_SAVE";
  1002. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1003. return "QDSS_TRACE_FREE";
  1004. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1005. return "QDSS_TRACE_REQ_DATA";
  1006. case CNSS_DRIVER_EVENT_MAX:
  1007. return "EVENT_MAX";
  1008. }
  1009. return "UNKNOWN";
  1010. };
  1011. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1012. enum cnss_driver_event_type type,
  1013. u32 flags, void *data)
  1014. {
  1015. struct cnss_driver_event *event;
  1016. unsigned long irq_flags;
  1017. int gfp = GFP_KERNEL;
  1018. int ret = 0;
  1019. if (!plat_priv)
  1020. return -ENODEV;
  1021. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1022. cnss_driver_event_to_str(type), type,
  1023. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1024. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1025. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1026. return -EINVAL;
  1027. }
  1028. if (in_interrupt() || irqs_disabled())
  1029. gfp = GFP_ATOMIC;
  1030. event = kzalloc(sizeof(*event), gfp);
  1031. if (!event)
  1032. return -ENOMEM;
  1033. cnss_pm_stay_awake(plat_priv);
  1034. event->type = type;
  1035. event->data = data;
  1036. init_completion(&event->complete);
  1037. event->ret = CNSS_EVENT_PENDING;
  1038. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1039. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1040. list_add_tail(&event->list, &plat_priv->event_list);
  1041. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1042. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1043. if (!(flags & CNSS_EVENT_SYNC))
  1044. goto out;
  1045. if (flags & CNSS_EVENT_UNKILLABLE)
  1046. wait_for_completion(&event->complete);
  1047. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1048. ret = wait_for_completion_killable(&event->complete);
  1049. else
  1050. ret = wait_for_completion_interruptible(&event->complete);
  1051. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1052. cnss_driver_event_to_str(type), type,
  1053. plat_priv->driver_state, ret, event->ret);
  1054. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1055. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1056. event->sync = false;
  1057. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1058. ret = -EINTR;
  1059. goto out;
  1060. }
  1061. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1062. ret = event->ret;
  1063. kfree(event);
  1064. out:
  1065. cnss_pm_relax(plat_priv);
  1066. return ret;
  1067. }
  1068. /**
  1069. * cnss_get_timeout - Get timeout for corresponding type.
  1070. * @plat_priv: Pointer to platform driver context.
  1071. * @cnss_timeout_type: Timeout type.
  1072. *
  1073. * Return: Timeout in milliseconds.
  1074. */
  1075. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1076. enum cnss_timeout_type timeout_type)
  1077. {
  1078. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1079. switch (timeout_type) {
  1080. case CNSS_TIMEOUT_QMI:
  1081. return qmi_timeout;
  1082. case CNSS_TIMEOUT_POWER_UP:
  1083. return (qmi_timeout << 2);
  1084. case CNSS_TIMEOUT_IDLE_RESTART:
  1085. /* In idle restart power up sequence, we have fw_boot_timer to
  1086. * handle FW initialization failure.
  1087. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1088. * account for FW dump collection and FW re-initialization on
  1089. * retry.
  1090. */
  1091. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1092. case CNSS_TIMEOUT_CALIBRATION:
  1093. /* Similar to mission mode, in CBC if FW init fails
  1094. * fw recovery is tried. Thus return 2x the CBC timeout.
  1095. */
  1096. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1097. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1098. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1099. case CNSS_TIMEOUT_RDDM:
  1100. return CNSS_RDDM_TIMEOUT_MS;
  1101. case CNSS_TIMEOUT_RECOVERY:
  1102. return RECOVERY_TIMEOUT;
  1103. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1104. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1105. default:
  1106. return qmi_timeout;
  1107. }
  1108. }
  1109. unsigned int cnss_get_boot_timeout(struct device *dev)
  1110. {
  1111. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1112. if (!plat_priv) {
  1113. cnss_pr_err("plat_priv is NULL\n");
  1114. return 0;
  1115. }
  1116. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1117. }
  1118. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1119. int cnss_power_up(struct device *dev)
  1120. {
  1121. int ret = 0;
  1122. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1123. unsigned int timeout;
  1124. if (!plat_priv) {
  1125. cnss_pr_err("plat_priv is NULL\n");
  1126. return -ENODEV;
  1127. }
  1128. cnss_pr_dbg("Powering up device\n");
  1129. ret = cnss_driver_event_post(plat_priv,
  1130. CNSS_DRIVER_EVENT_POWER_UP,
  1131. CNSS_EVENT_SYNC, NULL);
  1132. if (ret)
  1133. goto out;
  1134. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1135. goto out;
  1136. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1137. reinit_completion(&plat_priv->power_up_complete);
  1138. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1139. msecs_to_jiffies(timeout));
  1140. if (!ret) {
  1141. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1142. timeout);
  1143. ret = -EAGAIN;
  1144. goto out;
  1145. }
  1146. return 0;
  1147. out:
  1148. return ret;
  1149. }
  1150. EXPORT_SYMBOL(cnss_power_up);
  1151. int cnss_power_down(struct device *dev)
  1152. {
  1153. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1154. if (!plat_priv) {
  1155. cnss_pr_err("plat_priv is NULL\n");
  1156. return -ENODEV;
  1157. }
  1158. cnss_pr_dbg("Powering down device\n");
  1159. return cnss_driver_event_post(plat_priv,
  1160. CNSS_DRIVER_EVENT_POWER_DOWN,
  1161. CNSS_EVENT_SYNC, NULL);
  1162. }
  1163. EXPORT_SYMBOL(cnss_power_down);
  1164. int cnss_idle_restart(struct device *dev)
  1165. {
  1166. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1167. unsigned int timeout;
  1168. int ret = 0;
  1169. if (!plat_priv) {
  1170. cnss_pr_err("plat_priv is NULL\n");
  1171. return -ENODEV;
  1172. }
  1173. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1174. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1175. return -EBUSY;
  1176. }
  1177. cnss_pr_dbg("Doing idle restart\n");
  1178. reinit_completion(&plat_priv->power_up_complete);
  1179. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1180. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1181. ret = -EINVAL;
  1182. goto out;
  1183. }
  1184. ret = cnss_driver_event_post(plat_priv,
  1185. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1186. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1187. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1188. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1189. else if (ret)
  1190. goto out;
  1191. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1192. ret = cnss_bus_call_driver_probe(plat_priv);
  1193. goto out;
  1194. }
  1195. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1196. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1197. msecs_to_jiffies(timeout));
  1198. if (plat_priv->power_up_error) {
  1199. ret = plat_priv->power_up_error;
  1200. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1201. cnss_pr_dbg("Power up error:%d, exiting\n",
  1202. plat_priv->power_up_error);
  1203. goto out;
  1204. }
  1205. if (!ret) {
  1206. /* This exception occurs after attempting retry of FW recovery.
  1207. * Thus we can safely power off the device.
  1208. */
  1209. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1210. timeout);
  1211. ret = -ETIMEDOUT;
  1212. cnss_power_down(dev);
  1213. CNSS_ASSERT(0);
  1214. goto out;
  1215. }
  1216. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1217. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1218. del_timer(&plat_priv->fw_boot_timer);
  1219. ret = -EINVAL;
  1220. goto out;
  1221. }
  1222. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1223. * non-DRV is supported only once after device reboots and before wifi
  1224. * is turned on. We do not allow switching back to DRV.
  1225. * To bring device back into DRV, user needs to reboot device.
  1226. */
  1227. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1228. cnss_pr_dbg("DRV is disabled\n");
  1229. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1230. }
  1231. mutex_unlock(&plat_priv->driver_ops_lock);
  1232. return 0;
  1233. out:
  1234. mutex_unlock(&plat_priv->driver_ops_lock);
  1235. return ret;
  1236. }
  1237. EXPORT_SYMBOL(cnss_idle_restart);
  1238. int cnss_idle_shutdown(struct device *dev)
  1239. {
  1240. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1241. if (!plat_priv) {
  1242. cnss_pr_err("plat_priv is NULL\n");
  1243. return -ENODEV;
  1244. }
  1245. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1246. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1247. return -EAGAIN;
  1248. }
  1249. cnss_pr_dbg("Doing idle shutdown\n");
  1250. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1251. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1252. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1253. return -EBUSY;
  1254. }
  1255. return cnss_driver_event_post(plat_priv,
  1256. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1257. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1258. }
  1259. EXPORT_SYMBOL(cnss_idle_shutdown);
  1260. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1261. {
  1262. int ret = 0;
  1263. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1264. if (ret < 0) {
  1265. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1266. goto out;
  1267. }
  1268. ret = cnss_get_clk(plat_priv);
  1269. if (ret) {
  1270. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1271. goto put_vreg;
  1272. }
  1273. ret = cnss_get_pinctrl(plat_priv);
  1274. if (ret) {
  1275. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1276. goto put_clk;
  1277. }
  1278. return 0;
  1279. put_clk:
  1280. cnss_put_clk(plat_priv);
  1281. put_vreg:
  1282. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1283. out:
  1284. return ret;
  1285. }
  1286. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1287. {
  1288. cnss_put_clk(plat_priv);
  1289. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1290. }
  1291. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1292. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1293. unsigned long code,
  1294. void *ss_handle)
  1295. {
  1296. struct cnss_plat_data *plat_priv =
  1297. container_of(nb, struct cnss_plat_data, modem_nb);
  1298. struct cnss_esoc_info *esoc_info;
  1299. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1300. if (!plat_priv)
  1301. return NOTIFY_DONE;
  1302. esoc_info = &plat_priv->esoc_info;
  1303. if (code == SUBSYS_AFTER_POWERUP)
  1304. esoc_info->modem_current_status = 1;
  1305. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1306. esoc_info->modem_current_status = 0;
  1307. else
  1308. return NOTIFY_DONE;
  1309. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1310. esoc_info->modem_current_status))
  1311. return NOTIFY_DONE;
  1312. return NOTIFY_OK;
  1313. }
  1314. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1315. {
  1316. int ret = 0;
  1317. struct device *dev;
  1318. struct cnss_esoc_info *esoc_info;
  1319. struct esoc_desc *esoc_desc;
  1320. const char *client_desc;
  1321. dev = &plat_priv->plat_dev->dev;
  1322. esoc_info = &plat_priv->esoc_info;
  1323. esoc_info->notify_modem_status =
  1324. of_property_read_bool(dev->of_node,
  1325. "qcom,notify-modem-status");
  1326. if (!esoc_info->notify_modem_status)
  1327. goto out;
  1328. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1329. &client_desc);
  1330. if (ret) {
  1331. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1332. } else {
  1333. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1334. if (IS_ERR_OR_NULL(esoc_desc)) {
  1335. ret = PTR_RET(esoc_desc);
  1336. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1337. ret);
  1338. goto out;
  1339. }
  1340. esoc_info->esoc_desc = esoc_desc;
  1341. }
  1342. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1343. esoc_info->modem_current_status = 0;
  1344. esoc_info->modem_notify_handler =
  1345. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1346. esoc_info->esoc_desc->name :
  1347. "modem", &plat_priv->modem_nb);
  1348. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1349. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1350. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1351. ret);
  1352. goto unreg_esoc;
  1353. }
  1354. return 0;
  1355. unreg_esoc:
  1356. if (esoc_info->esoc_desc)
  1357. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1358. out:
  1359. return ret;
  1360. }
  1361. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1362. {
  1363. struct device *dev;
  1364. struct cnss_esoc_info *esoc_info;
  1365. dev = &plat_priv->plat_dev->dev;
  1366. esoc_info = &plat_priv->esoc_info;
  1367. if (esoc_info->notify_modem_status)
  1368. subsys_notif_unregister_notifier
  1369. (esoc_info->modem_notify_handler,
  1370. &plat_priv->modem_nb);
  1371. if (esoc_info->esoc_desc)
  1372. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1373. }
  1374. #else
  1375. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1376. {
  1377. return 0;
  1378. }
  1379. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1380. #endif
  1381. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1382. {
  1383. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1384. int ret = 0;
  1385. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1386. return 0;
  1387. enable_irq(sol_gpio->dev_sol_irq);
  1388. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1389. if (ret)
  1390. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1391. ret);
  1392. return ret;
  1393. }
  1394. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1395. {
  1396. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1397. int ret = 0;
  1398. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1399. return 0;
  1400. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1401. if (ret)
  1402. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1403. ret);
  1404. disable_irq(sol_gpio->dev_sol_irq);
  1405. return ret;
  1406. }
  1407. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1408. {
  1409. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1410. if (sol_gpio->dev_sol_gpio < 0)
  1411. return -EINVAL;
  1412. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1413. }
  1414. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1415. {
  1416. struct cnss_plat_data *plat_priv = data;
  1417. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1418. sol_gpio->dev_sol_counter++;
  1419. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1420. irq, sol_gpio->dev_sol_counter);
  1421. /* Make sure abort current suspend */
  1422. cnss_pm_stay_awake(plat_priv);
  1423. cnss_pm_relax(plat_priv);
  1424. pm_system_wakeup();
  1425. cnss_bus_handle_dev_sol_irq(plat_priv);
  1426. return IRQ_HANDLED;
  1427. }
  1428. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1429. {
  1430. struct device *dev = &plat_priv->plat_dev->dev;
  1431. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1432. int ret = 0;
  1433. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1434. "wlan-dev-sol-gpio", 0);
  1435. if (sol_gpio->dev_sol_gpio < 0)
  1436. goto out;
  1437. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1438. sol_gpio->dev_sol_gpio);
  1439. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1440. if (ret) {
  1441. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1442. ret);
  1443. goto out;
  1444. }
  1445. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1446. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1447. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1448. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1449. if (ret) {
  1450. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1451. goto free_gpio;
  1452. }
  1453. return 0;
  1454. free_gpio:
  1455. gpio_free(sol_gpio->dev_sol_gpio);
  1456. out:
  1457. return ret;
  1458. }
  1459. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1460. {
  1461. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1462. if (sol_gpio->dev_sol_gpio < 0)
  1463. return;
  1464. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1465. gpio_free(sol_gpio->dev_sol_gpio);
  1466. }
  1467. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1468. {
  1469. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1470. if (sol_gpio->host_sol_gpio < 0)
  1471. return -EINVAL;
  1472. if (value)
  1473. cnss_pr_dbg("Assert host SOL GPIO\n");
  1474. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1475. return 0;
  1476. }
  1477. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1478. {
  1479. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1480. if (sol_gpio->host_sol_gpio < 0)
  1481. return -EINVAL;
  1482. return gpio_get_value(sol_gpio->host_sol_gpio);
  1483. }
  1484. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1485. {
  1486. struct device *dev = &plat_priv->plat_dev->dev;
  1487. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1488. int ret = 0;
  1489. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1490. "wlan-host-sol-gpio", 0);
  1491. if (sol_gpio->host_sol_gpio < 0)
  1492. goto out;
  1493. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1494. sol_gpio->host_sol_gpio);
  1495. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1496. if (ret) {
  1497. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1498. ret);
  1499. goto out;
  1500. }
  1501. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1502. return 0;
  1503. out:
  1504. return ret;
  1505. }
  1506. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1507. {
  1508. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1509. if (sol_gpio->host_sol_gpio < 0)
  1510. return;
  1511. gpio_free(sol_gpio->host_sol_gpio);
  1512. }
  1513. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1514. {
  1515. int ret;
  1516. ret = cnss_init_dev_sol_gpio(plat_priv);
  1517. if (ret)
  1518. goto out;
  1519. ret = cnss_init_host_sol_gpio(plat_priv);
  1520. if (ret)
  1521. goto deinit_dev_sol;
  1522. return 0;
  1523. deinit_dev_sol:
  1524. cnss_deinit_dev_sol_gpio(plat_priv);
  1525. out:
  1526. return ret;
  1527. }
  1528. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1529. {
  1530. cnss_deinit_host_sol_gpio(plat_priv);
  1531. cnss_deinit_dev_sol_gpio(plat_priv);
  1532. }
  1533. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1534. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1535. {
  1536. struct cnss_plat_data *plat_priv;
  1537. int ret = 0;
  1538. if (!subsys_desc->dev) {
  1539. cnss_pr_err("dev from subsys_desc is NULL\n");
  1540. return -ENODEV;
  1541. }
  1542. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1543. if (!plat_priv) {
  1544. cnss_pr_err("plat_priv is NULL\n");
  1545. return -ENODEV;
  1546. }
  1547. if (!plat_priv->driver_state) {
  1548. cnss_pr_dbg("subsys powerup is ignored\n");
  1549. return 0;
  1550. }
  1551. ret = cnss_bus_dev_powerup(plat_priv);
  1552. if (ret)
  1553. __pm_relax(plat_priv->recovery_ws);
  1554. return ret;
  1555. }
  1556. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1557. bool force_stop)
  1558. {
  1559. struct cnss_plat_data *plat_priv;
  1560. if (!subsys_desc->dev) {
  1561. cnss_pr_err("dev from subsys_desc is NULL\n");
  1562. return -ENODEV;
  1563. }
  1564. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1565. if (!plat_priv) {
  1566. cnss_pr_err("plat_priv is NULL\n");
  1567. return -ENODEV;
  1568. }
  1569. if (!plat_priv->driver_state) {
  1570. cnss_pr_dbg("subsys shutdown is ignored\n");
  1571. return 0;
  1572. }
  1573. return cnss_bus_dev_shutdown(plat_priv);
  1574. }
  1575. void cnss_device_crashed(struct device *dev)
  1576. {
  1577. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1578. struct cnss_subsys_info *subsys_info;
  1579. if (!plat_priv)
  1580. return;
  1581. subsys_info = &plat_priv->subsys_info;
  1582. if (subsys_info->subsys_device) {
  1583. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1584. subsys_set_crash_status(subsys_info->subsys_device, true);
  1585. subsystem_restart_dev(subsys_info->subsys_device);
  1586. }
  1587. }
  1588. EXPORT_SYMBOL(cnss_device_crashed);
  1589. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1590. {
  1591. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1592. if (!plat_priv) {
  1593. cnss_pr_err("plat_priv is NULL\n");
  1594. return;
  1595. }
  1596. cnss_bus_dev_crash_shutdown(plat_priv);
  1597. }
  1598. static int cnss_subsys_ramdump(int enable,
  1599. const struct subsys_desc *subsys_desc)
  1600. {
  1601. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1602. if (!plat_priv) {
  1603. cnss_pr_err("plat_priv is NULL\n");
  1604. return -ENODEV;
  1605. }
  1606. if (!enable)
  1607. return 0;
  1608. return cnss_bus_dev_ramdump(plat_priv);
  1609. }
  1610. static void cnss_recovery_work_handler(struct work_struct *work)
  1611. {
  1612. }
  1613. #else
  1614. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1615. {
  1616. int ret;
  1617. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1618. if (!plat_priv->recovery_enabled)
  1619. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1620. cnss_bus_dev_shutdown(plat_priv);
  1621. cnss_bus_dev_ramdump(plat_priv);
  1622. /* If recovery is triggered before Host driver registration,
  1623. * avoid device power up because eventually device will be
  1624. * power up as part of driver registration.
  1625. */
  1626. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1627. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1628. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1629. plat_priv->driver_state);
  1630. return;
  1631. }
  1632. msleep(POWER_RESET_MIN_DELAY_MS);
  1633. ret = cnss_bus_dev_powerup(plat_priv);
  1634. if (ret)
  1635. __pm_relax(plat_priv->recovery_ws);
  1636. return;
  1637. }
  1638. static void cnss_recovery_work_handler(struct work_struct *work)
  1639. {
  1640. struct cnss_plat_data *plat_priv =
  1641. container_of(work, struct cnss_plat_data, recovery_work);
  1642. cnss_recovery_handler(plat_priv);
  1643. }
  1644. void cnss_device_crashed(struct device *dev)
  1645. {
  1646. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1647. if (!plat_priv)
  1648. return;
  1649. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1650. schedule_work(&plat_priv->recovery_work);
  1651. }
  1652. EXPORT_SYMBOL(cnss_device_crashed);
  1653. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1654. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1655. {
  1656. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1657. struct cnss_ramdump_info *ramdump_info;
  1658. if (!plat_priv)
  1659. return NULL;
  1660. ramdump_info = &plat_priv->ramdump_info;
  1661. *size = ramdump_info->ramdump_size;
  1662. return ramdump_info->ramdump_va;
  1663. }
  1664. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1665. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1666. {
  1667. switch (reason) {
  1668. case CNSS_REASON_DEFAULT:
  1669. return "DEFAULT";
  1670. case CNSS_REASON_LINK_DOWN:
  1671. return "LINK_DOWN";
  1672. case CNSS_REASON_RDDM:
  1673. return "RDDM";
  1674. case CNSS_REASON_TIMEOUT:
  1675. return "TIMEOUT";
  1676. }
  1677. return "UNKNOWN";
  1678. };
  1679. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1680. enum cnss_recovery_reason reason)
  1681. {
  1682. plat_priv->recovery_count++;
  1683. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1684. goto self_recovery;
  1685. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1686. cnss_pr_dbg("Skip device recovery\n");
  1687. return 0;
  1688. }
  1689. /* FW recovery sequence has multiple steps and firmware load requires
  1690. * linux PM in awake state. Thus hold the cnss wake source until
  1691. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1692. * time taken in this process.
  1693. */
  1694. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1695. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1696. true);
  1697. switch (reason) {
  1698. case CNSS_REASON_LINK_DOWN:
  1699. if (!cnss_bus_check_link_status(plat_priv)) {
  1700. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1701. return 0;
  1702. }
  1703. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1704. &plat_priv->ctrl_params.quirks))
  1705. goto self_recovery;
  1706. if (!cnss_bus_recover_link_down(plat_priv)) {
  1707. /* clear recovery bit here to avoid skipping
  1708. * the recovery work for RDDM later
  1709. */
  1710. clear_bit(CNSS_DRIVER_RECOVERY,
  1711. &plat_priv->driver_state);
  1712. return 0;
  1713. }
  1714. break;
  1715. case CNSS_REASON_RDDM:
  1716. cnss_bus_collect_dump_info(plat_priv, false);
  1717. break;
  1718. case CNSS_REASON_DEFAULT:
  1719. case CNSS_REASON_TIMEOUT:
  1720. break;
  1721. default:
  1722. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1723. cnss_recovery_reason_to_str(reason), reason);
  1724. break;
  1725. }
  1726. cnss_bus_device_crashed(plat_priv);
  1727. return 0;
  1728. self_recovery:
  1729. cnss_pr_dbg("Going for self recovery\n");
  1730. cnss_bus_dev_shutdown(plat_priv);
  1731. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1732. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1733. &plat_priv->ctrl_params.quirks);
  1734. /* If link down self recovery is triggered before Host driver
  1735. * registration, avoid device power up because eventually device
  1736. * will be power up as part of driver registration.
  1737. */
  1738. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1739. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1740. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1741. plat_priv->driver_state);
  1742. return 0;
  1743. }
  1744. cnss_bus_dev_powerup(plat_priv);
  1745. return 0;
  1746. }
  1747. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1748. void *data)
  1749. {
  1750. struct cnss_recovery_data *recovery_data = data;
  1751. int ret = 0;
  1752. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1753. cnss_recovery_reason_to_str(recovery_data->reason),
  1754. recovery_data->reason);
  1755. if (!plat_priv->driver_state) {
  1756. cnss_pr_err("Improper driver state, ignore recovery\n");
  1757. ret = -EINVAL;
  1758. goto out;
  1759. }
  1760. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1761. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1762. ret = -EINVAL;
  1763. goto out;
  1764. }
  1765. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1766. cnss_pr_err("Recovery is already in progress\n");
  1767. CNSS_ASSERT(0);
  1768. ret = -EINVAL;
  1769. goto out;
  1770. }
  1771. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1772. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1773. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1774. ret = -EINVAL;
  1775. goto out;
  1776. }
  1777. switch (plat_priv->device_id) {
  1778. case QCA6174_DEVICE_ID:
  1779. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1780. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1781. &plat_priv->driver_state)) {
  1782. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1783. ret = -EINVAL;
  1784. goto out;
  1785. }
  1786. break;
  1787. default:
  1788. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1789. set_bit(CNSS_FW_BOOT_RECOVERY,
  1790. &plat_priv->driver_state);
  1791. }
  1792. break;
  1793. }
  1794. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1795. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1796. out:
  1797. kfree(data);
  1798. return ret;
  1799. }
  1800. int cnss_self_recovery(struct device *dev,
  1801. enum cnss_recovery_reason reason)
  1802. {
  1803. cnss_schedule_recovery(dev, reason);
  1804. return 0;
  1805. }
  1806. EXPORT_SYMBOL(cnss_self_recovery);
  1807. void cnss_schedule_recovery(struct device *dev,
  1808. enum cnss_recovery_reason reason)
  1809. {
  1810. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1811. struct cnss_recovery_data *data;
  1812. int gfp = GFP_KERNEL;
  1813. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1814. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1815. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1816. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1817. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1818. return;
  1819. }
  1820. if (in_interrupt() || irqs_disabled())
  1821. gfp = GFP_ATOMIC;
  1822. data = kzalloc(sizeof(*data), gfp);
  1823. if (!data)
  1824. return;
  1825. data->reason = reason;
  1826. cnss_driver_event_post(plat_priv,
  1827. CNSS_DRIVER_EVENT_RECOVERY,
  1828. 0, data);
  1829. }
  1830. EXPORT_SYMBOL(cnss_schedule_recovery);
  1831. int cnss_force_fw_assert(struct device *dev)
  1832. {
  1833. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1834. if (!plat_priv) {
  1835. cnss_pr_err("plat_priv is NULL\n");
  1836. return -ENODEV;
  1837. }
  1838. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1839. cnss_pr_info("Forced FW assert is not supported\n");
  1840. return -EOPNOTSUPP;
  1841. }
  1842. if (cnss_bus_is_device_down(plat_priv)) {
  1843. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1844. return 0;
  1845. }
  1846. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1847. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1848. return 0;
  1849. }
  1850. if (in_interrupt() || irqs_disabled())
  1851. cnss_driver_event_post(plat_priv,
  1852. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1853. 0, NULL);
  1854. else
  1855. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1856. return 0;
  1857. }
  1858. EXPORT_SYMBOL(cnss_force_fw_assert);
  1859. int cnss_force_collect_rddm(struct device *dev)
  1860. {
  1861. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1862. unsigned int timeout;
  1863. int ret = 0;
  1864. if (!plat_priv) {
  1865. cnss_pr_err("plat_priv is NULL\n");
  1866. return -ENODEV;
  1867. }
  1868. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1869. cnss_pr_info("Force collect rddm is not supported\n");
  1870. return -EOPNOTSUPP;
  1871. }
  1872. if (cnss_bus_is_device_down(plat_priv)) {
  1873. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1874. goto wait_rddm;
  1875. }
  1876. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1877. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1878. goto wait_rddm;
  1879. }
  1880. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1881. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1882. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1883. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1884. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1885. return 0;
  1886. }
  1887. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1888. if (ret)
  1889. return ret;
  1890. wait_rddm:
  1891. reinit_completion(&plat_priv->rddm_complete);
  1892. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1893. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1894. msecs_to_jiffies(timeout));
  1895. if (!ret) {
  1896. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1897. timeout);
  1898. ret = -ETIMEDOUT;
  1899. } else if (ret > 0) {
  1900. ret = 0;
  1901. }
  1902. return ret;
  1903. }
  1904. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1905. int cnss_qmi_send_get(struct device *dev)
  1906. {
  1907. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1908. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1909. return 0;
  1910. return cnss_bus_qmi_send_get(plat_priv);
  1911. }
  1912. EXPORT_SYMBOL(cnss_qmi_send_get);
  1913. int cnss_qmi_send_put(struct device *dev)
  1914. {
  1915. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1916. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1917. return 0;
  1918. return cnss_bus_qmi_send_put(plat_priv);
  1919. }
  1920. EXPORT_SYMBOL(cnss_qmi_send_put);
  1921. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1922. int cmd_len, void *cb_ctx,
  1923. int (*cb)(void *ctx, void *event, int event_len))
  1924. {
  1925. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1926. int ret;
  1927. if (!plat_priv)
  1928. return -ENODEV;
  1929. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1930. return -EINVAL;
  1931. plat_priv->get_info_cb = cb;
  1932. plat_priv->get_info_cb_ctx = cb_ctx;
  1933. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1934. if (ret) {
  1935. plat_priv->get_info_cb = NULL;
  1936. plat_priv->get_info_cb_ctx = NULL;
  1937. }
  1938. return ret;
  1939. }
  1940. EXPORT_SYMBOL(cnss_qmi_send);
  1941. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1942. {
  1943. int ret = 0;
  1944. u32 retry = 0, timeout;
  1945. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1946. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1947. goto out;
  1948. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1949. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1950. goto out;
  1951. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1952. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1953. goto out;
  1954. }
  1955. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1956. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1957. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1958. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1959. CNSS_ASSERT(0);
  1960. return -EINVAL;
  1961. }
  1962. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1963. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1964. break;
  1965. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1966. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1967. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1968. CNSS_ASSERT(0);
  1969. ret = -EINVAL;
  1970. goto mark_cal_fail;
  1971. }
  1972. }
  1973. switch (plat_priv->device_id) {
  1974. case QCA6290_DEVICE_ID:
  1975. case QCA6390_DEVICE_ID:
  1976. case QCA6490_DEVICE_ID:
  1977. case KIWI_DEVICE_ID:
  1978. case MANGO_DEVICE_ID:
  1979. case PEACH_DEVICE_ID:
  1980. break;
  1981. default:
  1982. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1983. plat_priv->device_id);
  1984. ret = -EINVAL;
  1985. goto mark_cal_fail;
  1986. }
  1987. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1988. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1989. timeout = cnss_get_timeout(plat_priv,
  1990. CNSS_TIMEOUT_CALIBRATION);
  1991. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1992. timeout / 1000);
  1993. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1994. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1995. msecs_to_jiffies(timeout));
  1996. }
  1997. reinit_completion(&plat_priv->cal_complete);
  1998. ret = cnss_bus_dev_powerup(plat_priv);
  1999. mark_cal_fail:
  2000. if (ret) {
  2001. complete(&plat_priv->cal_complete);
  2002. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2003. /* Set CBC done in driver state to mark attempt and note error
  2004. * since calibration cannot be retried at boot.
  2005. */
  2006. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2007. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2008. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2009. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2010. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2011. goto out;
  2012. cnss_pr_info("Schedule WLAN driver load\n");
  2013. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2014. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2015. 0);
  2016. }
  2017. }
  2018. out:
  2019. return ret;
  2020. }
  2021. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2022. void *data)
  2023. {
  2024. struct cnss_cal_info *cal_info = data;
  2025. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2026. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2027. goto out;
  2028. switch (cal_info->cal_status) {
  2029. case CNSS_CAL_DONE:
  2030. cnss_pr_dbg("Calibration completed successfully\n");
  2031. plat_priv->cal_done = true;
  2032. break;
  2033. case CNSS_CAL_TIMEOUT:
  2034. case CNSS_CAL_FAILURE:
  2035. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2036. cal_info->cal_status);
  2037. break;
  2038. default:
  2039. cnss_pr_err("Unknown calibration status: %u\n",
  2040. cal_info->cal_status);
  2041. break;
  2042. }
  2043. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2044. cnss_bus_free_qdss_mem(plat_priv);
  2045. cnss_release_antenna_sharing(plat_priv);
  2046. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2047. goto skip_shutdown;
  2048. cnss_bus_dev_shutdown(plat_priv);
  2049. msleep(POWER_RESET_MIN_DELAY_MS);
  2050. skip_shutdown:
  2051. complete(&plat_priv->cal_complete);
  2052. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2053. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2054. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2055. cnss_cal_mem_upload_to_file(plat_priv);
  2056. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2057. goto out;
  2058. cnss_pr_dbg("Schedule WLAN driver load\n");
  2059. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2060. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2061. 0);
  2062. }
  2063. out:
  2064. kfree(data);
  2065. return 0;
  2066. }
  2067. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2068. {
  2069. int ret;
  2070. ret = cnss_bus_dev_powerup(plat_priv);
  2071. if (ret)
  2072. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2073. return ret;
  2074. }
  2075. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2076. {
  2077. cnss_bus_dev_shutdown(plat_priv);
  2078. return 0;
  2079. }
  2080. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2081. {
  2082. int ret = 0;
  2083. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2084. if (ret < 0)
  2085. return ret;
  2086. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2087. }
  2088. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2089. u32 mem_seg_len, u64 pa, u32 size)
  2090. {
  2091. int i = 0;
  2092. u64 offset = 0;
  2093. void *va = NULL;
  2094. u64 local_pa;
  2095. u32 local_size;
  2096. for (i = 0; i < mem_seg_len; i++) {
  2097. local_pa = (u64)fw_mem[i].pa;
  2098. local_size = (u32)fw_mem[i].size;
  2099. if (pa == local_pa && size <= local_size) {
  2100. va = fw_mem[i].va;
  2101. break;
  2102. }
  2103. if (pa > local_pa &&
  2104. pa < local_pa + local_size &&
  2105. pa + size <= local_pa + local_size) {
  2106. offset = pa - local_pa;
  2107. va = fw_mem[i].va + offset;
  2108. break;
  2109. }
  2110. }
  2111. return va;
  2112. }
  2113. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2114. void *data)
  2115. {
  2116. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2117. struct cnss_fw_mem *fw_mem_seg;
  2118. int ret = 0L;
  2119. void *va = NULL;
  2120. u32 i, fw_mem_seg_len;
  2121. switch (event_data->mem_type) {
  2122. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2123. if (!plat_priv->fw_mem_seg_len)
  2124. goto invalid_mem_save;
  2125. fw_mem_seg = plat_priv->fw_mem;
  2126. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2127. break;
  2128. case QMI_WLFW_MEM_QDSS_V01:
  2129. if (!plat_priv->qdss_mem_seg_len)
  2130. goto invalid_mem_save;
  2131. fw_mem_seg = plat_priv->qdss_mem;
  2132. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2133. break;
  2134. default:
  2135. goto invalid_mem_save;
  2136. }
  2137. for (i = 0; i < event_data->mem_seg_len; i++) {
  2138. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2139. event_data->mem_seg[i].addr,
  2140. event_data->mem_seg[i].size);
  2141. if (!va) {
  2142. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2143. &event_data->mem_seg[i].addr,
  2144. event_data->mem_type);
  2145. ret = -EINVAL;
  2146. break;
  2147. }
  2148. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2149. event_data->file_name,
  2150. event_data->mem_seg[i].size);
  2151. if (ret < 0) {
  2152. cnss_pr_err("Fail to save fw mem data: %d\n",
  2153. ret);
  2154. break;
  2155. }
  2156. }
  2157. kfree(data);
  2158. return ret;
  2159. invalid_mem_save:
  2160. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2161. event_data->mem_type);
  2162. kfree(data);
  2163. return -EINVAL;
  2164. }
  2165. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2166. {
  2167. cnss_bus_free_qdss_mem(plat_priv);
  2168. return 0;
  2169. }
  2170. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2171. void *data)
  2172. {
  2173. int ret = 0;
  2174. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2175. if (!plat_priv)
  2176. return -ENODEV;
  2177. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2178. event_data->total_size);
  2179. kfree(data);
  2180. return ret;
  2181. }
  2182. static void cnss_driver_event_work(struct work_struct *work)
  2183. {
  2184. struct cnss_plat_data *plat_priv =
  2185. container_of(work, struct cnss_plat_data, event_work);
  2186. struct cnss_driver_event *event;
  2187. unsigned long flags;
  2188. int ret = 0;
  2189. if (!plat_priv) {
  2190. cnss_pr_err("plat_priv is NULL!\n");
  2191. return;
  2192. }
  2193. cnss_pm_stay_awake(plat_priv);
  2194. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2195. while (!list_empty(&plat_priv->event_list)) {
  2196. event = list_first_entry(&plat_priv->event_list,
  2197. struct cnss_driver_event, list);
  2198. list_del(&event->list);
  2199. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2200. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2201. cnss_driver_event_to_str(event->type),
  2202. event->sync ? "-sync" : "", event->type,
  2203. plat_priv->driver_state);
  2204. switch (event->type) {
  2205. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2206. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2207. break;
  2208. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2209. ret = cnss_wlfw_server_exit(plat_priv);
  2210. break;
  2211. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2212. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2213. if (ret)
  2214. break;
  2215. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2216. break;
  2217. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2218. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2219. break;
  2220. case CNSS_DRIVER_EVENT_FW_READY:
  2221. ret = cnss_fw_ready_hdlr(plat_priv);
  2222. break;
  2223. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2224. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2225. break;
  2226. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2227. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2228. event->data);
  2229. break;
  2230. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2231. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2232. event->data);
  2233. break;
  2234. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2235. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2236. break;
  2237. case CNSS_DRIVER_EVENT_RECOVERY:
  2238. ret = cnss_driver_recovery_hdlr(plat_priv,
  2239. event->data);
  2240. break;
  2241. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2242. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2243. break;
  2244. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2245. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2246. &plat_priv->driver_state);
  2247. fallthrough;
  2248. case CNSS_DRIVER_EVENT_POWER_UP:
  2249. ret = cnss_power_up_hdlr(plat_priv);
  2250. break;
  2251. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2252. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2253. &plat_priv->driver_state);
  2254. fallthrough;
  2255. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2256. ret = cnss_power_down_hdlr(plat_priv);
  2257. break;
  2258. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2259. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2260. event->data);
  2261. break;
  2262. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2263. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2264. event->data);
  2265. break;
  2266. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2267. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2268. break;
  2269. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2270. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2271. event->data);
  2272. break;
  2273. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2274. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2275. break;
  2276. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2277. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2278. event->data);
  2279. break;
  2280. default:
  2281. cnss_pr_err("Invalid driver event type: %d",
  2282. event->type);
  2283. kfree(event);
  2284. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2285. continue;
  2286. }
  2287. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2288. if (event->sync) {
  2289. event->ret = ret;
  2290. complete(&event->complete);
  2291. continue;
  2292. }
  2293. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2294. kfree(event);
  2295. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2296. }
  2297. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2298. cnss_pm_relax(plat_priv);
  2299. }
  2300. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2301. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2302. {
  2303. int ret = 0;
  2304. struct cnss_subsys_info *subsys_info;
  2305. subsys_info = &plat_priv->subsys_info;
  2306. subsys_info->subsys_desc.name = plat_priv->device_name;
  2307. subsys_info->subsys_desc.owner = THIS_MODULE;
  2308. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2309. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2310. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2311. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2312. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2313. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2314. if (IS_ERR(subsys_info->subsys_device)) {
  2315. ret = PTR_ERR(subsys_info->subsys_device);
  2316. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2317. goto out;
  2318. }
  2319. subsys_info->subsys_handle =
  2320. subsystem_get(subsys_info->subsys_desc.name);
  2321. if (!subsys_info->subsys_handle) {
  2322. cnss_pr_err("Failed to get subsys_handle!\n");
  2323. ret = -EINVAL;
  2324. goto unregister_subsys;
  2325. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2326. ret = PTR_ERR(subsys_info->subsys_handle);
  2327. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2328. goto unregister_subsys;
  2329. }
  2330. return 0;
  2331. unregister_subsys:
  2332. subsys_unregister(subsys_info->subsys_device);
  2333. out:
  2334. return ret;
  2335. }
  2336. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2337. {
  2338. struct cnss_subsys_info *subsys_info;
  2339. subsys_info = &plat_priv->subsys_info;
  2340. subsystem_put(subsys_info->subsys_handle);
  2341. subsys_unregister(subsys_info->subsys_device);
  2342. }
  2343. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2344. {
  2345. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2346. return create_ramdump_device(subsys_info->subsys_desc.name,
  2347. subsys_info->subsys_desc.dev);
  2348. }
  2349. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2350. void *ramdump_dev)
  2351. {
  2352. destroy_ramdump_device(ramdump_dev);
  2353. }
  2354. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2355. {
  2356. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2357. struct ramdump_segment segment;
  2358. memset(&segment, 0, sizeof(segment));
  2359. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2360. segment.size = ramdump_info->ramdump_size;
  2361. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2362. }
  2363. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2364. {
  2365. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2366. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2367. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2368. struct ramdump_segment *ramdump_segs, *s;
  2369. struct cnss_dump_meta_info meta_info = {0};
  2370. int i, ret = 0;
  2371. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2372. sizeof(*ramdump_segs),
  2373. GFP_KERNEL);
  2374. if (!ramdump_segs)
  2375. return -ENOMEM;
  2376. s = ramdump_segs + 1;
  2377. for (i = 0; i < dump_data->nentries; i++) {
  2378. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2379. cnss_pr_err("Unsupported dump type: %d",
  2380. dump_seg->type);
  2381. continue;
  2382. }
  2383. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2384. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2385. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2386. }
  2387. meta_info.entry[dump_seg->type].entry_num++;
  2388. s->address = dump_seg->address;
  2389. s->v_address = (void __iomem *)dump_seg->v_address;
  2390. s->size = dump_seg->size;
  2391. s++;
  2392. dump_seg++;
  2393. }
  2394. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2395. meta_info.version = CNSS_RAMDUMP_VERSION;
  2396. meta_info.chipset = plat_priv->device_id;
  2397. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2398. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2399. ramdump_segs->size = sizeof(meta_info);
  2400. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2401. dump_data->nentries + 1);
  2402. kfree(ramdump_segs);
  2403. return ret;
  2404. }
  2405. #else
  2406. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2407. void *data)
  2408. {
  2409. struct cnss_plat_data *plat_priv =
  2410. container_of(nb, struct cnss_plat_data, panic_nb);
  2411. cnss_bus_dev_crash_shutdown(plat_priv);
  2412. return NOTIFY_DONE;
  2413. }
  2414. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2415. {
  2416. int ret;
  2417. if (!plat_priv)
  2418. return -ENODEV;
  2419. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2420. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2421. &plat_priv->panic_nb);
  2422. if (ret) {
  2423. cnss_pr_err("Failed to register panic handler\n");
  2424. return -EINVAL;
  2425. }
  2426. return 0;
  2427. }
  2428. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2429. {
  2430. int ret;
  2431. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2432. &plat_priv->panic_nb);
  2433. if (ret)
  2434. cnss_pr_err("Failed to unregister panic handler\n");
  2435. }
  2436. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2437. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2438. {
  2439. return &plat_priv->plat_dev->dev;
  2440. }
  2441. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2442. void *ramdump_dev)
  2443. {
  2444. }
  2445. #endif
  2446. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2447. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2448. {
  2449. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2450. struct qcom_dump_segment segment;
  2451. struct list_head head;
  2452. INIT_LIST_HEAD(&head);
  2453. memset(&segment, 0, sizeof(segment));
  2454. segment.va = ramdump_info->ramdump_va;
  2455. segment.size = ramdump_info->ramdump_size;
  2456. list_add(&segment.node, &head);
  2457. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2458. }
  2459. #else
  2460. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2461. {
  2462. return 0;
  2463. }
  2464. /* Using completion event inside dynamically allocated ramdump_desc
  2465. * may result a race between freeing the event after setting it to
  2466. * complete inside dev coredump free callback and the thread that is
  2467. * waiting for completion.
  2468. */
  2469. DECLARE_COMPLETION(dump_done);
  2470. #define TIMEOUT_SAVE_DUMP_MS 30000
  2471. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2472. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2473. { \
  2474. if (class == ELFCLASS32) \
  2475. return sizeof(struct elf32_##__xhdr); \
  2476. else \
  2477. return sizeof(struct elf64_##__xhdr); \
  2478. }
  2479. SIZEOF_ELF_STRUCT(phdr)
  2480. SIZEOF_ELF_STRUCT(hdr)
  2481. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2482. do { \
  2483. if (class == ELFCLASS32) \
  2484. ((struct elf32_##__xhdr *)arg)->member = value; \
  2485. else \
  2486. ((struct elf64_##__xhdr *)arg)->member = value; \
  2487. } while (0)
  2488. #define set_ehdr_property(arg, class, member, value) \
  2489. set_xhdr_property(hdr, arg, class, member, value)
  2490. #define set_phdr_property(arg, class, member, value) \
  2491. set_xhdr_property(phdr, arg, class, member, value)
  2492. /* These replace qcom_ramdump driver APIs called from common API
  2493. * cnss_do_elf_dump() by the ones defined here.
  2494. */
  2495. #define qcom_dump_segment cnss_qcom_dump_segment
  2496. #define qcom_elf_dump cnss_qcom_elf_dump
  2497. #define dump_enabled cnss_dump_enabled
  2498. struct cnss_qcom_dump_segment {
  2499. struct list_head node;
  2500. dma_addr_t da;
  2501. void *va;
  2502. size_t size;
  2503. };
  2504. struct cnss_qcom_ramdump_desc {
  2505. void *data;
  2506. struct completion dump_done;
  2507. };
  2508. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2509. void *data, size_t datalen)
  2510. {
  2511. struct cnss_qcom_ramdump_desc *desc = data;
  2512. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2513. datalen);
  2514. }
  2515. static void cnss_qcom_devcd_freev(void *data)
  2516. {
  2517. struct cnss_qcom_ramdump_desc *desc = data;
  2518. cnss_pr_dbg("Free dump data for dev coredump\n");
  2519. complete(&dump_done);
  2520. vfree(desc->data);
  2521. kfree(desc);
  2522. }
  2523. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2524. gfp_t gfp)
  2525. {
  2526. struct cnss_qcom_ramdump_desc *desc;
  2527. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2528. int ret;
  2529. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2530. if (!desc)
  2531. return -ENOMEM;
  2532. desc->data = data;
  2533. reinit_completion(&dump_done);
  2534. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2535. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2536. ret = wait_for_completion_timeout(&dump_done,
  2537. msecs_to_jiffies(timeout));
  2538. if (!ret)
  2539. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2540. timeout);
  2541. return ret ? 0 : -ETIMEDOUT;
  2542. }
  2543. /* Since the elf32 and elf64 identification is identical apart from
  2544. * the class, use elf32 by default.
  2545. */
  2546. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2547. {
  2548. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2549. ehdr->e_ident[EI_CLASS] = class;
  2550. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2551. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2552. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2553. }
  2554. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2555. unsigned char class)
  2556. {
  2557. struct cnss_qcom_dump_segment *segment;
  2558. void *phdr, *ehdr;
  2559. size_t data_size, offset;
  2560. int phnum = 0;
  2561. void *data;
  2562. void __iomem *ptr;
  2563. if (!segs || list_empty(segs))
  2564. return -EINVAL;
  2565. data_size = sizeof_elf_hdr(class);
  2566. list_for_each_entry(segment, segs, node) {
  2567. data_size += sizeof_elf_phdr(class) + segment->size;
  2568. phnum++;
  2569. }
  2570. data = vmalloc(data_size);
  2571. if (!data)
  2572. return -ENOMEM;
  2573. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2574. ehdr = data;
  2575. memset(ehdr, 0, sizeof_elf_hdr(class));
  2576. init_elf_identification(ehdr, class);
  2577. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2578. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2579. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2580. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2581. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2582. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2583. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2584. phdr = data + sizeof_elf_hdr(class);
  2585. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2586. list_for_each_entry(segment, segs, node) {
  2587. memset(phdr, 0, sizeof_elf_phdr(class));
  2588. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2589. set_phdr_property(phdr, class, p_offset, offset);
  2590. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2591. set_phdr_property(phdr, class, p_paddr, segment->da);
  2592. set_phdr_property(phdr, class, p_filesz, segment->size);
  2593. set_phdr_property(phdr, class, p_memsz, segment->size);
  2594. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2595. set_phdr_property(phdr, class, p_align, 0);
  2596. if (segment->va) {
  2597. memcpy(data + offset, segment->va, segment->size);
  2598. } else {
  2599. ptr = devm_ioremap(dev, segment->da, segment->size);
  2600. if (!ptr) {
  2601. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2602. &segment->da, segment->size);
  2603. memset(data + offset, 0xff, segment->size);
  2604. } else {
  2605. memcpy_fromio(data + offset, ptr,
  2606. segment->size);
  2607. }
  2608. }
  2609. offset += segment->size;
  2610. phdr += sizeof_elf_phdr(class);
  2611. }
  2612. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2613. }
  2614. /* Saving dump to file system is always needed in this case. */
  2615. static bool cnss_dump_enabled(void)
  2616. {
  2617. return true;
  2618. }
  2619. #endif /* CONFIG_QCOM_RAMDUMP */
  2620. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2621. {
  2622. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2623. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2624. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2625. struct qcom_dump_segment *seg;
  2626. struct cnss_dump_meta_info meta_info = {0};
  2627. struct list_head head;
  2628. int i, ret = 0;
  2629. if (!dump_enabled()) {
  2630. cnss_pr_info("Dump collection is not enabled\n");
  2631. return ret;
  2632. }
  2633. INIT_LIST_HEAD(&head);
  2634. for (i = 0; i < dump_data->nentries; i++) {
  2635. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2636. cnss_pr_err("Unsupported dump type: %d",
  2637. dump_seg->type);
  2638. continue;
  2639. }
  2640. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2641. if (!seg) {
  2642. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2643. __func__, i);
  2644. continue;
  2645. }
  2646. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2647. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2648. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2649. }
  2650. meta_info.entry[dump_seg->type].entry_num++;
  2651. seg->da = dump_seg->address;
  2652. seg->va = dump_seg->v_address;
  2653. seg->size = dump_seg->size;
  2654. list_add_tail(&seg->node, &head);
  2655. dump_seg++;
  2656. }
  2657. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2658. if (!seg) {
  2659. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2660. __func__);
  2661. goto skip_elf_dump;
  2662. }
  2663. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2664. meta_info.version = CNSS_RAMDUMP_VERSION;
  2665. meta_info.chipset = plat_priv->device_id;
  2666. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2667. seg->va = &meta_info;
  2668. seg->size = sizeof(meta_info);
  2669. list_add(&seg->node, &head);
  2670. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2671. skip_elf_dump:
  2672. while (!list_empty(&head)) {
  2673. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2674. list_del(&seg->node);
  2675. kfree(seg);
  2676. }
  2677. return ret;
  2678. }
  2679. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2680. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2681. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2682. size_t num_entries_loaded)
  2683. {
  2684. struct qcom_dump_segment *seg;
  2685. struct cnss_host_dump_meta_info meta_info = {0};
  2686. struct list_head head;
  2687. int dev_ret = 0;
  2688. struct device *new_device;
  2689. static const char * const wlan_str[] = {
  2690. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2691. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2692. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2693. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2694. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2695. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2696. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2697. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2698. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2699. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2700. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2701. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2702. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2703. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2704. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2705. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2706. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2707. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2708. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2709. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2710. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2711. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2712. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max",
  2713. [CNSS_HOST_DP_WBM_DESC_REL] = "wbm_desc_rel_ring",
  2714. [CNSS_HOST_DP_WBM_DESC_REL_HANDLE] = "wbm_desc_rel_ring_handle",
  2715. [CNSS_HOST_DP_TCL_CMD] = "tcl_cmd_ring",
  2716. [CNSS_HOST_DP_TCL_CMD_HANDLE] = "tcl_cmd_ring_handle",
  2717. [CNSS_HOST_DP_TCL_STATUS] = "tcl_status_ring",
  2718. [CNSS_HOST_DP_TCL_STATUS_HANDLE] = "tcl_status_ring_handle",
  2719. [CNSS_HOST_DP_REO_REINJ] = "reo_reinject_ring",
  2720. [CNSS_HOST_DP_REO_REINJ_HANDLE] = "reo_reinject_ring_handle",
  2721. [CNSS_HOST_DP_RX_REL] = "rx_rel_ring",
  2722. [CNSS_HOST_DP_RX_REL_HANDLE] = "rx_rel_ring_handle",
  2723. [CNSS_HOST_DP_REO_EXP] = "reo_exception_ring",
  2724. [CNSS_HOST_DP_REO_EXP_HANDLE] = "reo_exception_ring_handle",
  2725. [CNSS_HOST_DP_REO_CMD] = "reo_cmd_ring",
  2726. [CNSS_HOST_DP_REO_CMD_HANDLE] = "reo_cmd_ring_handle",
  2727. [CNSS_HOST_DP_REO_STATUS] = "reo_status_ring",
  2728. [CNSS_HOST_DP_REO_STATUS_HANDLE] = "reo_status_ring_handle",
  2729. [CNSS_HOST_DP_TCL_DATA_0] = "tcl_data_ring_0",
  2730. [CNSS_HOST_DP_TCL_DATA_0_HANDLE] = "tcl_data_ring_0_handle",
  2731. [CNSS_HOST_DP_TX_COMP_0] = "tx_comp_ring_0",
  2732. [CNSS_HOST_DP_TX_COMP_0_HANDLE] = "tx_comp_ring_0_handle",
  2733. [CNSS_HOST_DP_TCL_DATA_1] = "tcl_data_ring_1",
  2734. [CNSS_HOST_DP_TCL_DATA_1_HANDLE] = "tcl_data_ring_1_handle",
  2735. [CNSS_HOST_DP_TX_COMP_1] = "tx_comp_ring_1",
  2736. [CNSS_HOST_DP_TX_COMP_1_HANDLE] = "tx_comp_ring_1_handle",
  2737. [CNSS_HOST_DP_TCL_DATA_2] = "tcl_data_ring_2",
  2738. [CNSS_HOST_DP_TCL_DATA_2_HANDLE] = "tcl_data_ring_2_handle",
  2739. [CNSS_HOST_DP_TX_COMP_2] = "tx_comp_ring_2",
  2740. [CNSS_HOST_DP_TX_COMP_2_HANDLE] = "tx_comp_ring_2_handle",
  2741. [CNSS_HOST_DP_REO_DST_0] = "reo_dest_ring_0",
  2742. [CNSS_HOST_DP_REO_DST_0_HANDLE] = "reo_dest_ring_0_handle",
  2743. [CNSS_HOST_DP_REO_DST_1] = "reo_dest_ring_1",
  2744. [CNSS_HOST_DP_REO_DST_1_HANDLE] = "reo_dest_ring_1_handle",
  2745. [CNSS_HOST_DP_REO_DST_2] = "reo_dest_ring_2",
  2746. [CNSS_HOST_DP_REO_DST_2_HANDLE] = "reo_dest_ring_2_handle",
  2747. [CNSS_HOST_DP_REO_DST_3] = "reo_dest_ring_3",
  2748. [CNSS_HOST_DP_REO_DST_3_HANDLE] = "reo_dest_ring_3_handle",
  2749. [CNSS_HOST_DP_REO_DST_4] = "reo_dest_ring_4",
  2750. [CNSS_HOST_DP_REO_DST_4_HANDLE] = "reo_dest_ring_4_handle",
  2751. [CNSS_HOST_DP_REO_DST_5] = "reo_dest_ring_5",
  2752. [CNSS_HOST_DP_REO_DST_5_HANDLE] = "reo_dest_ring_5_handle",
  2753. [CNSS_HOST_DP_REO_DST_6] = "reo_dest_ring_6",
  2754. [CNSS_HOST_DP_REO_DST_6_HANDLE] = "reo_dest_ring_6_handle",
  2755. [CNSS_HOST_DP_REO_DST_7] = "reo_dest_ring_7",
  2756. [CNSS_HOST_DP_REO_DST_7_HANDLE] = "reo_dest_ring_7_handle",
  2757. [CNSS_HOST_DP_PDEV_0] = "dp_pdev_0",
  2758. [CNSS_HOST_DP_WLAN_CFG_CTX] = "wlan_cfg_ctx",
  2759. [CNSS_HOST_DP_SOC] = "dp_soc",
  2760. [CNSS_HOST_HAL_RX_FST] = "hal_rx_fst",
  2761. [CNSS_HOST_DP_FISA] = "dp_fisa",
  2762. [CNSS_HOST_DP_FISA_HW_FSE_TABLE] = "dp_fisa_hw_fse_table",
  2763. [CNSS_HOST_DP_FISA_SW_FSE_TABLE] = "dp_fisa_sw_fse_table",
  2764. [CNSS_HOST_HIF] = "hif",
  2765. [CNSS_HOST_QDF_NBUF_HIST] = "qdf_nbuf_history",
  2766. [CNSS_HOST_TCL_WBM_MAP] = "tcl_wbm_map_array",
  2767. [CNSS_HOST_RX_MAC_BUF_RING_0] = "rx_mac_buf_ring_0",
  2768. [CNSS_HOST_RX_MAC_BUF_RING_0_HANDLE] = "rx_mac_buf_ring_0_handle",
  2769. [CNSS_HOST_RX_MAC_BUF_RING_1] = "rx_mac_buf_ring_1",
  2770. [CNSS_HOST_RX_MAC_BUF_RING_1_HANDLE] = "rx_mac_buf_ring_1_handle",
  2771. [CNSS_HOST_RX_REFILL_0] = "rx_refill_buf_ring_0",
  2772. [CNSS_HOST_RX_REFILL_0_HANDLE] = "rx_refill_buf_ring_0_handle",
  2773. [CNSS_HOST_CE_0] = "ce_0",
  2774. [CNSS_HOST_CE_0_SRC_RING] = "ce_0_src_ring",
  2775. [CNSS_HOST_CE_0_SRC_RING_CTX] = "ce_0_src_ring_ctx",
  2776. [CNSS_HOST_CE_1] = "ce_1",
  2777. [CNSS_HOST_CE_1_STATUS_RING] = "ce_1_status_ring",
  2778. [CNSS_HOST_CE_1_STATUS_RING_CTX] = "ce_1_status_ring_ctx",
  2779. [CNSS_HOST_CE_1_DEST_RING] = "ce_1_dest_ring",
  2780. [CNSS_HOST_CE_1_DEST_RING_CTX] = "ce_1_dest_ring_ctx",
  2781. [CNSS_HOST_CE_2] = "ce_2",
  2782. [CNSS_HOST_CE_2_STATUS_RING] = "ce_2_status_ring",
  2783. [CNSS_HOST_CE_2_STATUS_RING_CTX] = "ce_2_status_ring_ctx",
  2784. [CNSS_HOST_CE_2_DEST_RING] = "ce_2_dest_ring",
  2785. [CNSS_HOST_CE_2_DEST_RING_CTX] = "ce_2_dest_ring_ctx",
  2786. [CNSS_HOST_CE_3] = "ce_3",
  2787. [CNSS_HOST_CE_3_SRC_RING] = "ce_3_src_ring",
  2788. [CNSS_HOST_CE_3_SRC_RING_CTX] = "ce_3_src_ring_ctx",
  2789. [CNSS_HOST_CE_4] = "ce_4",
  2790. [CNSS_HOST_CE_4_SRC_RING] = "ce_4_src_ring",
  2791. [CNSS_HOST_CE_4_SRC_RING_CTX] = "ce_4_src_ring_ctx",
  2792. [CNSS_HOST_CE_5] = "ce_5",
  2793. [CNSS_HOST_CE_6] = "ce_6",
  2794. [CNSS_HOST_CE_7] = "ce_7",
  2795. [CNSS_HOST_CE_7_STATUS_RING] = "ce_7_status_ring",
  2796. [CNSS_HOST_CE_7_STATUS_RING_CTX] = "ce_7_status_ring_ctx",
  2797. [CNSS_HOST_CE_7_DEST_RING] = "ce_7_dest_ring",
  2798. [CNSS_HOST_CE_7_DEST_RING_CTX] = "ce_7_dest_ring_ctx",
  2799. [CNSS_HOST_CE_8] = "ce_8",
  2800. [CNSS_HOST_DP_TCL_DATA_3] = "tcl_data_ring_3",
  2801. [CNSS_HOST_DP_TCL_DATA_3_HANDLE] = "tcl_data_ring_3_handle",
  2802. [CNSS_HOST_DP_TX_COMP_3] = "tx_comp_ring_3",
  2803. [CNSS_HOST_DP_TX_COMP_3_HANDLE] = "tx_comp_ring_3_handle"
  2804. };
  2805. int i;
  2806. int ret = 0;
  2807. enum cnss_host_dump_type j;
  2808. if (!dump_enabled()) {
  2809. cnss_pr_info("Dump collection is not enabled\n");
  2810. return ret;
  2811. }
  2812. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2813. if (!new_device) {
  2814. cnss_pr_err("Failed to alloc device mem\n");
  2815. return -ENOMEM;
  2816. }
  2817. device_initialize(new_device);
  2818. dev_set_name(new_device, "wlan_driver");
  2819. dev_ret = device_add(new_device);
  2820. if (dev_ret) {
  2821. cnss_pr_err("Failed to add new device\n");
  2822. goto put_device;
  2823. }
  2824. INIT_LIST_HEAD(&head);
  2825. for (i = 0; i < num_entries_loaded; i++) {
  2826. /* If region name registered by driver is not present in
  2827. * wlan_str. type for that entry will not be set, but entry will
  2828. * be added. Which will result in entry type being 0. Currently
  2829. * entry type 0 is for wlan_logs, which will result in parsing
  2830. * issue for wlan_logs as parsing is done based upon type field.
  2831. * So initialize type with -1(Invalid) to avoid such issues.
  2832. */
  2833. meta_info.entry[i].type = -1;
  2834. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2835. if (!seg) {
  2836. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2837. continue;
  2838. }
  2839. seg->va = ssr_entry[i].buffer_pointer;
  2840. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2841. seg->size = ssr_entry[i].buffer_size;
  2842. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2843. if (strcmp(ssr_entry[i].region_name, wlan_str[j]) == 0) {
  2844. meta_info.entry[i].type = j;
  2845. }
  2846. }
  2847. meta_info.entry[i].entry_start = i + 1;
  2848. meta_info.entry[i].entry_num++;
  2849. list_add_tail(&seg->node, &head);
  2850. }
  2851. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2852. if (!seg) {
  2853. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2854. __func__);
  2855. goto skip_host_dump;
  2856. }
  2857. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2858. meta_info.version = CNSS_RAMDUMP_VERSION;
  2859. meta_info.chipset = plat_priv->device_id;
  2860. meta_info.total_entries = num_entries_loaded;
  2861. seg->va = &meta_info;
  2862. seg->da = (dma_addr_t)&meta_info;
  2863. seg->size = sizeof(meta_info);
  2864. list_add(&seg->node, &head);
  2865. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2866. skip_host_dump:
  2867. while (!list_empty(&head)) {
  2868. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2869. list_del(&seg->node);
  2870. kfree(seg);
  2871. }
  2872. device_del(new_device);
  2873. put_device:
  2874. put_device(new_device);
  2875. kfree(new_device);
  2876. return ret;
  2877. }
  2878. #endif
  2879. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2880. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2881. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2882. {
  2883. struct cnss_ramdump_info *ramdump_info;
  2884. struct msm_dump_entry dump_entry;
  2885. ramdump_info = &plat_priv->ramdump_info;
  2886. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2887. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2888. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2889. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2890. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2891. sizeof(ramdump_info->dump_data.name));
  2892. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2893. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2894. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2895. &dump_entry);
  2896. }
  2897. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2898. {
  2899. int ret = 0;
  2900. struct device *dev;
  2901. struct cnss_ramdump_info *ramdump_info;
  2902. u32 ramdump_size = 0;
  2903. dev = &plat_priv->plat_dev->dev;
  2904. ramdump_info = &plat_priv->ramdump_info;
  2905. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2906. /* dt type: legacy or converged */
  2907. ret = of_property_read_u32(dev->of_node,
  2908. "qcom,wlan-ramdump-dynamic",
  2909. &ramdump_size);
  2910. } else {
  2911. ret = of_property_read_u32(plat_priv->dev_node,
  2912. "qcom,wlan-ramdump-dynamic",
  2913. &ramdump_size);
  2914. }
  2915. if (ret == 0) {
  2916. ramdump_info->ramdump_va =
  2917. dma_alloc_coherent(dev, ramdump_size,
  2918. &ramdump_info->ramdump_pa,
  2919. GFP_KERNEL);
  2920. if (ramdump_info->ramdump_va)
  2921. ramdump_info->ramdump_size = ramdump_size;
  2922. }
  2923. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2924. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2925. if (ramdump_info->ramdump_size == 0) {
  2926. cnss_pr_info("Ramdump will not be collected");
  2927. goto out;
  2928. }
  2929. ret = cnss_init_dump_entry(plat_priv);
  2930. if (ret) {
  2931. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2932. goto free_ramdump;
  2933. }
  2934. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2935. if (!ramdump_info->ramdump_dev) {
  2936. cnss_pr_err("Failed to create ramdump device!");
  2937. ret = -ENOMEM;
  2938. goto free_ramdump;
  2939. }
  2940. return 0;
  2941. free_ramdump:
  2942. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2943. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2944. out:
  2945. return ret;
  2946. }
  2947. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2948. {
  2949. struct device *dev;
  2950. struct cnss_ramdump_info *ramdump_info;
  2951. dev = &plat_priv->plat_dev->dev;
  2952. ramdump_info = &plat_priv->ramdump_info;
  2953. if (ramdump_info->ramdump_dev)
  2954. cnss_destroy_ramdump_device(plat_priv,
  2955. ramdump_info->ramdump_dev);
  2956. if (ramdump_info->ramdump_va)
  2957. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2958. ramdump_info->ramdump_va,
  2959. ramdump_info->ramdump_pa);
  2960. }
  2961. /**
  2962. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2963. * @ret: Error returned by msm_dump_data_register_nominidump
  2964. *
  2965. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2966. * ignore failure.
  2967. *
  2968. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2969. */
  2970. static int cnss_ignore_dump_data_reg_fail(int ret)
  2971. {
  2972. return ret;
  2973. }
  2974. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2975. {
  2976. int ret = 0;
  2977. struct cnss_ramdump_info_v2 *info_v2;
  2978. struct cnss_dump_data *dump_data;
  2979. struct msm_dump_entry dump_entry;
  2980. struct device *dev = &plat_priv->plat_dev->dev;
  2981. u32 ramdump_size = 0;
  2982. info_v2 = &plat_priv->ramdump_info_v2;
  2983. dump_data = &info_v2->dump_data;
  2984. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2985. /* dt type: legacy or converged */
  2986. ret = of_property_read_u32(dev->of_node,
  2987. "qcom,wlan-ramdump-dynamic",
  2988. &ramdump_size);
  2989. } else {
  2990. ret = of_property_read_u32(plat_priv->dev_node,
  2991. "qcom,wlan-ramdump-dynamic",
  2992. &ramdump_size);
  2993. }
  2994. if (ret == 0)
  2995. info_v2->ramdump_size = ramdump_size;
  2996. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2997. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2998. if (!info_v2->dump_data_vaddr)
  2999. return -ENOMEM;
  3000. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3001. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3002. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3003. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3004. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3005. sizeof(dump_data->name));
  3006. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3007. dump_entry.addr = virt_to_phys(dump_data);
  3008. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  3009. &dump_entry);
  3010. if (ret) {
  3011. ret = cnss_ignore_dump_data_reg_fail(ret);
  3012. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  3013. ret ? "Error" : "Ignoring", ret);
  3014. goto free_ramdump;
  3015. }
  3016. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3017. if (!info_v2->ramdump_dev) {
  3018. cnss_pr_err("Failed to create ramdump device!\n");
  3019. ret = -ENOMEM;
  3020. goto free_ramdump;
  3021. }
  3022. return 0;
  3023. free_ramdump:
  3024. kfree(info_v2->dump_data_vaddr);
  3025. info_v2->dump_data_vaddr = NULL;
  3026. return ret;
  3027. }
  3028. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  3029. {
  3030. struct cnss_ramdump_info_v2 *info_v2;
  3031. info_v2 = &plat_priv->ramdump_info_v2;
  3032. if (info_v2->ramdump_dev)
  3033. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  3034. kfree(info_v2->dump_data_vaddr);
  3035. info_v2->dump_data_vaddr = NULL;
  3036. info_v2->dump_data_valid = false;
  3037. }
  3038. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3039. {
  3040. int ret = 0;
  3041. switch (plat_priv->device_id) {
  3042. case QCA6174_DEVICE_ID:
  3043. ret = cnss_register_ramdump_v1(plat_priv);
  3044. break;
  3045. case QCA6290_DEVICE_ID:
  3046. case QCA6390_DEVICE_ID:
  3047. case QCN7605_DEVICE_ID:
  3048. case QCA6490_DEVICE_ID:
  3049. case KIWI_DEVICE_ID:
  3050. case MANGO_DEVICE_ID:
  3051. case PEACH_DEVICE_ID:
  3052. ret = cnss_register_ramdump_v2(plat_priv);
  3053. break;
  3054. default:
  3055. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3056. ret = -ENODEV;
  3057. break;
  3058. }
  3059. return ret;
  3060. }
  3061. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3062. {
  3063. switch (plat_priv->device_id) {
  3064. case QCA6174_DEVICE_ID:
  3065. cnss_unregister_ramdump_v1(plat_priv);
  3066. break;
  3067. case QCA6290_DEVICE_ID:
  3068. case QCA6390_DEVICE_ID:
  3069. case QCN7605_DEVICE_ID:
  3070. case QCA6490_DEVICE_ID:
  3071. case KIWI_DEVICE_ID:
  3072. case MANGO_DEVICE_ID:
  3073. case PEACH_DEVICE_ID:
  3074. cnss_unregister_ramdump_v2(plat_priv);
  3075. break;
  3076. default:
  3077. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3078. break;
  3079. }
  3080. }
  3081. #else
  3082. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3083. {
  3084. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3085. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  3086. struct device *dev = &plat_priv->plat_dev->dev;
  3087. u32 ramdump_size = 0;
  3088. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  3089. &ramdump_size) == 0)
  3090. info_v2->ramdump_size = ramdump_size;
  3091. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3092. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3093. if (!info_v2->dump_data_vaddr)
  3094. return -ENOMEM;
  3095. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3096. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3097. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3098. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3099. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3100. sizeof(dump_data->name));
  3101. info_v2->ramdump_dev = dev;
  3102. return 0;
  3103. }
  3104. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3105. {
  3106. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3107. info_v2->ramdump_dev = NULL;
  3108. kfree(info_v2->dump_data_vaddr);
  3109. info_v2->dump_data_vaddr = NULL;
  3110. info_v2->dump_data_valid = false;
  3111. }
  3112. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3113. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3114. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3115. phys_addr_t *pa, unsigned long attrs)
  3116. {
  3117. struct sg_table sgt;
  3118. int ret;
  3119. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3120. if (ret) {
  3121. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3122. va, &dma, size, attrs);
  3123. return -EINVAL;
  3124. }
  3125. *pa = page_to_phys(sg_page(sgt.sgl));
  3126. sg_free_table(&sgt);
  3127. return 0;
  3128. }
  3129. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3130. enum cnss_fw_dump_type type, int seg_no,
  3131. void *va, phys_addr_t pa, size_t size)
  3132. {
  3133. struct md_region md_entry;
  3134. int ret;
  3135. switch (type) {
  3136. case CNSS_FW_IMAGE:
  3137. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3138. seg_no);
  3139. break;
  3140. case CNSS_FW_RDDM:
  3141. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3142. seg_no);
  3143. break;
  3144. case CNSS_FW_REMOTE_HEAP:
  3145. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3146. seg_no);
  3147. break;
  3148. default:
  3149. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3150. return -EINVAL;
  3151. }
  3152. md_entry.phys_addr = pa;
  3153. md_entry.virt_addr = (uintptr_t)va;
  3154. md_entry.size = size;
  3155. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3156. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3157. md_entry.name, va, &pa, size);
  3158. ret = msm_minidump_add_region(&md_entry);
  3159. if (ret < 0)
  3160. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3161. return ret;
  3162. }
  3163. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3164. enum cnss_fw_dump_type type, int seg_no,
  3165. void *va, phys_addr_t pa, size_t size)
  3166. {
  3167. struct md_region md_entry;
  3168. int ret;
  3169. switch (type) {
  3170. case CNSS_FW_IMAGE:
  3171. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3172. seg_no);
  3173. break;
  3174. case CNSS_FW_RDDM:
  3175. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3176. seg_no);
  3177. break;
  3178. case CNSS_FW_REMOTE_HEAP:
  3179. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3180. seg_no);
  3181. break;
  3182. default:
  3183. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3184. return -EINVAL;
  3185. }
  3186. md_entry.phys_addr = pa;
  3187. md_entry.virt_addr = (uintptr_t)va;
  3188. md_entry.size = size;
  3189. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3190. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3191. md_entry.name, va, &pa, size);
  3192. ret = msm_minidump_remove_region(&md_entry);
  3193. if (ret)
  3194. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3195. ret);
  3196. return ret;
  3197. }
  3198. #else
  3199. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3200. phys_addr_t *pa, unsigned long attrs)
  3201. {
  3202. return 0;
  3203. }
  3204. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3205. enum cnss_fw_dump_type type, int seg_no,
  3206. void *va, phys_addr_t pa, size_t size)
  3207. {
  3208. return 0;
  3209. }
  3210. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3211. enum cnss_fw_dump_type type, int seg_no,
  3212. void *va, phys_addr_t pa, size_t size)
  3213. {
  3214. return 0;
  3215. }
  3216. #endif /* CONFIG_QCOM_MINIDUMP */
  3217. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3218. const struct firmware **fw_entry,
  3219. const char *filename)
  3220. {
  3221. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3222. return request_firmware_direct(fw_entry, filename,
  3223. &plat_priv->plat_dev->dev);
  3224. else
  3225. return firmware_request_nowarn(fw_entry, filename,
  3226. &plat_priv->plat_dev->dev);
  3227. }
  3228. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3229. /**
  3230. * cnss_register_bus_scale() - Setup interconnect voting data
  3231. * @plat_priv: Platform data structure
  3232. *
  3233. * For different interconnect path configured in device tree setup voting data
  3234. * for list of bandwidth requirements.
  3235. *
  3236. * Result: 0 for success. -EINVAL if not configured
  3237. */
  3238. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3239. {
  3240. int ret = -EINVAL;
  3241. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3242. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3243. struct device *dev = &plat_priv->plat_dev->dev;
  3244. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3245. ret = of_property_read_u32(dev->of_node,
  3246. "qcom,icc-path-count",
  3247. &plat_priv->icc.path_count);
  3248. if (ret) {
  3249. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3250. return 0;
  3251. }
  3252. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3253. "qcom,bus-bw-cfg-count",
  3254. &plat_priv->icc.bus_bw_cfg_count);
  3255. if (ret) {
  3256. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3257. goto cleanup;
  3258. }
  3259. cfg_arr_size = plat_priv->icc.path_count *
  3260. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3261. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3262. if (!cfg_arr) {
  3263. cnss_pr_err("Failed to alloc cfg table mem\n");
  3264. ret = -ENOMEM;
  3265. goto cleanup;
  3266. }
  3267. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3268. "qcom,bus-bw-cfg", cfg_arr,
  3269. cfg_arr_size);
  3270. if (ret) {
  3271. cnss_pr_err("Invalid Bus BW Config Table\n");
  3272. goto cleanup;
  3273. }
  3274. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3275. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3276. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3277. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3278. GFP_KERNEL);
  3279. if (!bus_bw_info) {
  3280. ret = -ENOMEM;
  3281. goto out;
  3282. }
  3283. ret = of_property_read_string_index(dev->of_node,
  3284. "interconnect-names", idx,
  3285. &bus_bw_info->icc_name);
  3286. if (ret)
  3287. goto out;
  3288. bus_bw_info->icc_path =
  3289. of_icc_get(&plat_priv->plat_dev->dev,
  3290. bus_bw_info->icc_name);
  3291. if (IS_ERR(bus_bw_info->icc_path)) {
  3292. ret = PTR_ERR(bus_bw_info->icc_path);
  3293. if (ret != -EPROBE_DEFER) {
  3294. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3295. bus_bw_info->icc_name, ret);
  3296. goto out;
  3297. }
  3298. }
  3299. bus_bw_info->cfg_table =
  3300. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3301. sizeof(*bus_bw_info->cfg_table),
  3302. GFP_KERNEL);
  3303. if (!bus_bw_info->cfg_table) {
  3304. ret = -ENOMEM;
  3305. goto out;
  3306. }
  3307. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3308. bus_bw_info->icc_name);
  3309. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3310. CNSS_ICC_VOTE_MAX);
  3311. i < plat_priv->icc.bus_bw_cfg_count;
  3312. i++, j += 2) {
  3313. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3314. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3315. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3316. i, bus_bw_info->cfg_table[i].avg_bw,
  3317. bus_bw_info->cfg_table[i].peak_bw);
  3318. }
  3319. list_add_tail(&bus_bw_info->list,
  3320. &plat_priv->icc.list_head);
  3321. }
  3322. kfree(cfg_arr);
  3323. return 0;
  3324. out:
  3325. list_for_each_entry_safe(bus_bw_info, tmp,
  3326. &plat_priv->icc.list_head, list) {
  3327. list_del(&bus_bw_info->list);
  3328. }
  3329. cleanup:
  3330. kfree(cfg_arr);
  3331. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3332. return ret;
  3333. }
  3334. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3335. {
  3336. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3337. list_for_each_entry_safe(bus_bw_info, tmp,
  3338. &plat_priv->icc.list_head, list) {
  3339. list_del(&bus_bw_info->list);
  3340. if (bus_bw_info->icc_path)
  3341. icc_put(bus_bw_info->icc_path);
  3342. }
  3343. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3344. }
  3345. #else
  3346. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3347. {
  3348. return 0;
  3349. }
  3350. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3351. #endif /* CONFIG_INTERCONNECT */
  3352. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3353. {
  3354. struct cnss_plat_data *plat_priv = cb_ctx;
  3355. if (!plat_priv) {
  3356. cnss_pr_err("%s: Invalid context\n", __func__);
  3357. return;
  3358. }
  3359. if (status) {
  3360. cnss_pr_info("CNSS Daemon connected\n");
  3361. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3362. complete(&plat_priv->daemon_connected);
  3363. } else {
  3364. cnss_pr_info("CNSS Daemon disconnected\n");
  3365. reinit_completion(&plat_priv->daemon_connected);
  3366. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3367. }
  3368. }
  3369. static ssize_t enable_hds_store(struct device *dev,
  3370. struct device_attribute *attr,
  3371. const char *buf, size_t count)
  3372. {
  3373. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3374. unsigned int enable_hds = 0;
  3375. if (!plat_priv)
  3376. return -ENODEV;
  3377. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3378. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3379. return -EINVAL;
  3380. }
  3381. if (enable_hds)
  3382. plat_priv->hds_enabled = true;
  3383. else
  3384. plat_priv->hds_enabled = false;
  3385. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3386. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3387. return count;
  3388. }
  3389. static ssize_t recovery_show(struct device *dev,
  3390. struct device_attribute *attr,
  3391. char *buf)
  3392. {
  3393. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3394. u32 buf_size = PAGE_SIZE;
  3395. u32 curr_len = 0;
  3396. u32 buf_written = 0;
  3397. if (!plat_priv)
  3398. return -ENODEV;
  3399. buf_written = scnprintf(buf, buf_size,
  3400. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3401. "BIT0 -- wlan fw recovery\n"
  3402. "BIT1 -- wlan pcss recovery\n"
  3403. "---------------------------------\n");
  3404. curr_len += buf_written;
  3405. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3406. "WLAN recovery %s[%d]\n",
  3407. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3408. plat_priv->recovery_enabled);
  3409. curr_len += buf_written;
  3410. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3411. "WLAN PCSS recovery %s[%d]\n",
  3412. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3413. plat_priv->recovery_pcss_enabled);
  3414. curr_len += buf_written;
  3415. /*
  3416. * Now size of curr_len is not over page size for sure,
  3417. * later if new item or none-fixed size item added, need
  3418. * add check to make sure curr_len is not over page size.
  3419. */
  3420. return curr_len;
  3421. }
  3422. static ssize_t time_sync_period_show(struct device *dev,
  3423. struct device_attribute *attr,
  3424. char *buf)
  3425. {
  3426. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3427. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3428. plat_priv->ctrl_params.time_sync_period);
  3429. }
  3430. /**
  3431. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3432. * @plat_priv: Platform data structure
  3433. *
  3434. * Result: return minimum time sync period present in vote from wlan and sys
  3435. */
  3436. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3437. {
  3438. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3439. unsigned int time_sync_period;
  3440. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3441. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3442. if (min_time_sync_period > time_sync_period)
  3443. min_time_sync_period = time_sync_period;
  3444. }
  3445. return min_time_sync_period;
  3446. }
  3447. static ssize_t time_sync_period_store(struct device *dev,
  3448. struct device_attribute *attr,
  3449. const char *buf, size_t count)
  3450. {
  3451. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3452. unsigned int time_sync_period = 0;
  3453. if (!plat_priv)
  3454. return -ENODEV;
  3455. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3456. cnss_pr_err("Invalid time sync sysfs command\n");
  3457. return -EINVAL;
  3458. }
  3459. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3460. cnss_pr_err("Invalid time sync value\n");
  3461. return -EINVAL;
  3462. }
  3463. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3464. time_sync_period;
  3465. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3466. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3467. cnss_pr_err("Invalid min time sync value\n");
  3468. return -EINVAL;
  3469. }
  3470. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3471. return count;
  3472. }
  3473. /**
  3474. * cnss_update_time_sync_period() - Set time sync period given by driver
  3475. * @dev: device structure
  3476. * @time_sync_period: time sync period value
  3477. *
  3478. * Update time sync period vote of driver and set minimum of time sync period
  3479. * from stored vote through wlan and sys config
  3480. * Result: return 0 for success, error in case of invalid value and no dev
  3481. */
  3482. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3483. {
  3484. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3485. if (!plat_priv)
  3486. return -ENODEV;
  3487. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3488. cnss_pr_err("Invalid time sync value\n");
  3489. return -EINVAL;
  3490. }
  3491. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3492. time_sync_period;
  3493. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3494. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3495. cnss_pr_err("Invalid min time sync value\n");
  3496. return -EINVAL;
  3497. }
  3498. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3499. return 0;
  3500. }
  3501. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3502. /**
  3503. * cnss_reset_time_sync_period() - Reset time sync period
  3504. * @dev: device structure
  3505. *
  3506. * Update time sync period vote of driver as invalid
  3507. * and reset minimum of time sync period from
  3508. * stored vote through wlan and sys config
  3509. * Result: return 0 for success, error in case of no dev
  3510. */
  3511. int cnss_reset_time_sync_period(struct device *dev)
  3512. {
  3513. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3514. unsigned int time_sync_period = 0;
  3515. if (!plat_priv)
  3516. return -ENODEV;
  3517. /* Driver vote is set to invalid in case of reset
  3518. * In this case, only vote valid to check is sys config
  3519. */
  3520. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3521. CNSS_TIME_SYNC_PERIOD_INVALID;
  3522. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3523. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3524. cnss_pr_err("Invalid min time sync value\n");
  3525. return -EINVAL;
  3526. }
  3527. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3528. return 0;
  3529. }
  3530. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3531. static ssize_t recovery_store(struct device *dev,
  3532. struct device_attribute *attr,
  3533. const char *buf, size_t count)
  3534. {
  3535. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3536. unsigned int recovery = 0;
  3537. if (!plat_priv)
  3538. return -ENODEV;
  3539. if (sscanf(buf, "%du", &recovery) != 1) {
  3540. cnss_pr_err("Invalid recovery sysfs command\n");
  3541. return -EINVAL;
  3542. }
  3543. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3544. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3545. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3546. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3547. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3548. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3549. cnss_send_subsys_restart_level_msg(plat_priv);
  3550. return count;
  3551. }
  3552. static ssize_t shutdown_store(struct device *dev,
  3553. struct device_attribute *attr,
  3554. const char *buf, size_t count)
  3555. {
  3556. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3557. cnss_pr_dbg("Received shutdown notification\n");
  3558. if (plat_priv) {
  3559. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3560. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3561. del_timer(&plat_priv->fw_boot_timer);
  3562. complete_all(&plat_priv->power_up_complete);
  3563. complete_all(&plat_priv->cal_complete);
  3564. cnss_pr_dbg("Shutdown notification handled\n");
  3565. }
  3566. return count;
  3567. }
  3568. static ssize_t fs_ready_store(struct device *dev,
  3569. struct device_attribute *attr,
  3570. const char *buf, size_t count)
  3571. {
  3572. int fs_ready = 0;
  3573. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3574. if (sscanf(buf, "%du", &fs_ready) != 1)
  3575. return -EINVAL;
  3576. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3577. fs_ready, count);
  3578. if (!plat_priv) {
  3579. cnss_pr_err("plat_priv is NULL\n");
  3580. return count;
  3581. }
  3582. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3583. cnss_pr_dbg("QMI is bypassed\n");
  3584. return count;
  3585. }
  3586. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3587. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3588. cnss_driver_event_post(plat_priv,
  3589. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3590. 0, NULL);
  3591. }
  3592. return count;
  3593. }
  3594. static ssize_t qdss_trace_start_store(struct device *dev,
  3595. struct device_attribute *attr,
  3596. const char *buf, size_t count)
  3597. {
  3598. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3599. wlfw_qdss_trace_start(plat_priv);
  3600. cnss_pr_dbg("Received QDSS start command\n");
  3601. return count;
  3602. }
  3603. static ssize_t qdss_trace_stop_store(struct device *dev,
  3604. struct device_attribute *attr,
  3605. const char *buf, size_t count)
  3606. {
  3607. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3608. u32 option = 0;
  3609. if (sscanf(buf, "%du", &option) != 1)
  3610. return -EINVAL;
  3611. wlfw_qdss_trace_stop(plat_priv, option);
  3612. cnss_pr_dbg("Received QDSS stop command\n");
  3613. return count;
  3614. }
  3615. static ssize_t qdss_conf_download_store(struct device *dev,
  3616. struct device_attribute *attr,
  3617. const char *buf, size_t count)
  3618. {
  3619. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3620. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3621. cnss_pr_dbg("Received QDSS download config command\n");
  3622. return count;
  3623. }
  3624. static ssize_t hw_trace_override_store(struct device *dev,
  3625. struct device_attribute *attr,
  3626. const char *buf, size_t count)
  3627. {
  3628. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3629. int tmp = 0;
  3630. if (sscanf(buf, "%du", &tmp) != 1)
  3631. return -EINVAL;
  3632. plat_priv->hw_trc_override = tmp;
  3633. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3634. return count;
  3635. }
  3636. static ssize_t charger_mode_store(struct device *dev,
  3637. struct device_attribute *attr,
  3638. const char *buf, size_t count)
  3639. {
  3640. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3641. int tmp = 0;
  3642. if (sscanf(buf, "%du", &tmp) != 1)
  3643. return -EINVAL;
  3644. plat_priv->charger_mode = tmp;
  3645. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3646. return count;
  3647. }
  3648. static DEVICE_ATTR_WO(fs_ready);
  3649. static DEVICE_ATTR_WO(shutdown);
  3650. static DEVICE_ATTR_RW(recovery);
  3651. static DEVICE_ATTR_WO(enable_hds);
  3652. static DEVICE_ATTR_WO(qdss_trace_start);
  3653. static DEVICE_ATTR_WO(qdss_trace_stop);
  3654. static DEVICE_ATTR_WO(qdss_conf_download);
  3655. static DEVICE_ATTR_WO(hw_trace_override);
  3656. static DEVICE_ATTR_WO(charger_mode);
  3657. static DEVICE_ATTR_RW(time_sync_period);
  3658. static struct attribute *cnss_attrs[] = {
  3659. &dev_attr_fs_ready.attr,
  3660. &dev_attr_shutdown.attr,
  3661. &dev_attr_recovery.attr,
  3662. &dev_attr_enable_hds.attr,
  3663. &dev_attr_qdss_trace_start.attr,
  3664. &dev_attr_qdss_trace_stop.attr,
  3665. &dev_attr_qdss_conf_download.attr,
  3666. &dev_attr_hw_trace_override.attr,
  3667. &dev_attr_charger_mode.attr,
  3668. &dev_attr_time_sync_period.attr,
  3669. NULL,
  3670. };
  3671. static struct attribute_group cnss_attr_group = {
  3672. .attrs = cnss_attrs,
  3673. };
  3674. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3675. {
  3676. struct device *dev = &plat_priv->plat_dev->dev;
  3677. int ret;
  3678. char cnss_name[CNSS_FS_NAME_SIZE];
  3679. char shutdown_name[32];
  3680. if (cnss_is_dual_wlan_enabled()) {
  3681. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3682. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3683. snprintf(shutdown_name, sizeof(shutdown_name),
  3684. "shutdown_wlan_%d", plat_priv->plat_idx);
  3685. } else {
  3686. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3687. snprintf(shutdown_name, sizeof(shutdown_name),
  3688. "shutdown_wlan");
  3689. }
  3690. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3691. if (ret) {
  3692. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3693. ret);
  3694. goto out;
  3695. }
  3696. /* This is only for backward compatibility. */
  3697. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3698. if (ret) {
  3699. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3700. ret);
  3701. goto rm_cnss_link;
  3702. }
  3703. return 0;
  3704. rm_cnss_link:
  3705. sysfs_remove_link(kernel_kobj, cnss_name);
  3706. out:
  3707. return ret;
  3708. }
  3709. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3710. {
  3711. char cnss_name[CNSS_FS_NAME_SIZE];
  3712. char shutdown_name[32];
  3713. if (cnss_is_dual_wlan_enabled()) {
  3714. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3715. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3716. snprintf(shutdown_name, sizeof(shutdown_name),
  3717. "shutdown_wlan_%d", plat_priv->plat_idx);
  3718. } else {
  3719. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3720. snprintf(shutdown_name, sizeof(shutdown_name),
  3721. "shutdown_wlan");
  3722. }
  3723. sysfs_remove_link(kernel_kobj, shutdown_name);
  3724. sysfs_remove_link(kernel_kobj, cnss_name);
  3725. }
  3726. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3727. {
  3728. int ret = 0;
  3729. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3730. &cnss_attr_group);
  3731. if (ret) {
  3732. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3733. ret);
  3734. goto out;
  3735. }
  3736. cnss_create_sysfs_link(plat_priv);
  3737. return 0;
  3738. out:
  3739. return ret;
  3740. }
  3741. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3742. union cnss_device_group_devres {
  3743. const struct attribute_group *group;
  3744. };
  3745. static void devm_cnss_group_remove(struct device *dev, void *res)
  3746. {
  3747. union cnss_device_group_devres *devres = res;
  3748. const struct attribute_group *group = devres->group;
  3749. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3750. sysfs_remove_group(&dev->kobj, group);
  3751. }
  3752. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3753. {
  3754. return ((union cnss_device_group_devres *)res) == data;
  3755. }
  3756. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3757. {
  3758. cnss_remove_sysfs_link(plat_priv);
  3759. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3760. devm_cnss_group_remove, devm_cnss_group_match,
  3761. (void *)&cnss_attr_group));
  3762. }
  3763. #else
  3764. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3765. {
  3766. cnss_remove_sysfs_link(plat_priv);
  3767. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3768. }
  3769. #endif
  3770. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3771. {
  3772. spin_lock_init(&plat_priv->event_lock);
  3773. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3774. WQ_UNBOUND, 1);
  3775. if (!plat_priv->event_wq) {
  3776. cnss_pr_err("Failed to create event workqueue!\n");
  3777. return -EFAULT;
  3778. }
  3779. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3780. INIT_LIST_HEAD(&plat_priv->event_list);
  3781. return 0;
  3782. }
  3783. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3784. {
  3785. destroy_workqueue(plat_priv->event_wq);
  3786. }
  3787. static int cnss_reboot_notifier(struct notifier_block *nb,
  3788. unsigned long action,
  3789. void *data)
  3790. {
  3791. struct cnss_plat_data *plat_priv =
  3792. container_of(nb, struct cnss_plat_data, reboot_nb);
  3793. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3794. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3795. del_timer(&plat_priv->fw_boot_timer);
  3796. complete_all(&plat_priv->power_up_complete);
  3797. complete_all(&plat_priv->cal_complete);
  3798. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3799. return NOTIFY_DONE;
  3800. }
  3801. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3802. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3803. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3804. {
  3805. uint32_t *peripheralStateInfo = NULL;
  3806. size_t size = 0;
  3807. /* Once this flag is set, secure peripheral feature
  3808. * will not be supported till next reboot
  3809. */
  3810. if (plat_priv->sec_peri_feature_disable)
  3811. return 0;
  3812. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3813. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3814. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3815. CNSS_ASSERT(0);
  3816. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3817. PTR_ERR(peripheralStateInfo));
  3818. plat_priv->sec_peri_feature_disable = true;
  3819. return 0;
  3820. }
  3821. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3822. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3823. set_bit(CNSS_WLAN_HW_DISABLED,
  3824. &plat_priv->driver_state);
  3825. else
  3826. clear_bit(CNSS_WLAN_HW_DISABLED,
  3827. &plat_priv->driver_state);
  3828. return 0;
  3829. }
  3830. #else
  3831. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3832. {
  3833. struct Object client_env;
  3834. struct Object app_object;
  3835. u32 wifi_uid = HW_WIFI_UID;
  3836. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3837. int ret;
  3838. u8 state = 0;
  3839. /* Once this flag is set, secure peripheral feature
  3840. * will not be supported till next reboot
  3841. */
  3842. if (plat_priv->sec_peri_feature_disable)
  3843. return 0;
  3844. /* get rootObj */
  3845. ret = get_client_env_object(&client_env);
  3846. if (ret) {
  3847. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3848. goto end;
  3849. }
  3850. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3851. if (ret) {
  3852. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3853. if (ret == FEATURE_NOT_SUPPORTED) {
  3854. ret = 0; /* Do not Assert */
  3855. plat_priv->sec_peri_feature_disable = true;
  3856. cnss_pr_dbg("Secure HW feature not supported\n");
  3857. }
  3858. goto exit_release_clientenv;
  3859. }
  3860. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3861. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3862. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3863. ObjectCounts_pack(1, 1, 0, 0));
  3864. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3865. if (ret) {
  3866. if (ret == PERIPHERAL_NOT_FOUND) {
  3867. ret = 0; /* Do not Assert */
  3868. plat_priv->sec_peri_feature_disable = true;
  3869. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3870. }
  3871. goto exit_release_app_obj;
  3872. }
  3873. if (state == 1)
  3874. set_bit(CNSS_WLAN_HW_DISABLED,
  3875. &plat_priv->driver_state);
  3876. else
  3877. clear_bit(CNSS_WLAN_HW_DISABLED,
  3878. &plat_priv->driver_state);
  3879. exit_release_app_obj:
  3880. Object_release(app_object);
  3881. exit_release_clientenv:
  3882. Object_release(client_env);
  3883. end:
  3884. if (ret) {
  3885. cnss_pr_err("Unable to get HW disable status\n");
  3886. CNSS_ASSERT(0);
  3887. }
  3888. return ret;
  3889. }
  3890. #endif
  3891. #else
  3892. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3893. {
  3894. return 0;
  3895. }
  3896. #endif
  3897. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3898. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3899. {
  3900. }
  3901. #else
  3902. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3903. {
  3904. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3905. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3906. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3907. }
  3908. #endif
  3909. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3910. static void cnss_initialize_mem_pool(unsigned long device_id)
  3911. {
  3912. cnss_initialize_prealloc_pool(device_id);
  3913. }
  3914. static void cnss_deinitialize_mem_pool(void)
  3915. {
  3916. cnss_deinitialize_prealloc_pool();
  3917. }
  3918. #else
  3919. static void cnss_initialize_mem_pool(unsigned long device_id)
  3920. {
  3921. }
  3922. static void cnss_deinitialize_mem_pool(void)
  3923. {
  3924. }
  3925. #endif
  3926. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3927. {
  3928. int ret;
  3929. ret = cnss_init_sol_gpio(plat_priv);
  3930. if (ret)
  3931. return ret;
  3932. timer_setup(&plat_priv->fw_boot_timer,
  3933. cnss_bus_fw_boot_timeout_hdlr, 0);
  3934. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3935. if (ret)
  3936. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3937. ret);
  3938. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3939. init_completion(&plat_priv->power_up_complete);
  3940. init_completion(&plat_priv->cal_complete);
  3941. init_completion(&plat_priv->rddm_complete);
  3942. init_completion(&plat_priv->recovery_complete);
  3943. init_completion(&plat_priv->daemon_connected);
  3944. mutex_init(&plat_priv->dev_lock);
  3945. mutex_init(&plat_priv->driver_ops_lock);
  3946. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3947. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3948. if (ret)
  3949. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3950. ret);
  3951. plat_priv->recovery_ws =
  3952. wakeup_source_register(&plat_priv->plat_dev->dev,
  3953. "CNSS_FW_RECOVERY");
  3954. if (!plat_priv->recovery_ws)
  3955. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3956. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3957. cnss_daemon_connection_update_cb,
  3958. plat_priv);
  3959. if (ret)
  3960. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3961. ret);
  3962. cnss_sram_dump_init(plat_priv);
  3963. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3964. "qcom,rc-ep-short-channel"))
  3965. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3966. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3967. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3968. return 0;
  3969. }
  3970. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3971. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3972. {
  3973. }
  3974. #else
  3975. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3976. {
  3977. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3978. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3979. kfree(plat_priv->sram_dump);
  3980. }
  3981. #endif
  3982. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3983. {
  3984. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3985. plat_priv);
  3986. complete_all(&plat_priv->recovery_complete);
  3987. complete_all(&plat_priv->rddm_complete);
  3988. complete_all(&plat_priv->cal_complete);
  3989. complete_all(&plat_priv->power_up_complete);
  3990. complete_all(&plat_priv->daemon_connected);
  3991. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3992. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3993. del_timer(&plat_priv->fw_boot_timer);
  3994. wakeup_source_unregister(plat_priv->recovery_ws);
  3995. cnss_deinit_sol_gpio(plat_priv);
  3996. cnss_sram_dump_deinit(plat_priv);
  3997. kfree(plat_priv->on_chip_pmic_board_ids);
  3998. }
  3999. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  4000. {
  4001. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  4002. CNSS_TIME_SYNC_PERIOD_INVALID;
  4003. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  4004. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4005. }
  4006. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  4007. {
  4008. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  4009. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  4010. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4011. "qcom,wlan-cbc-enabled");
  4012. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  4013. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  4014. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  4015. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  4016. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4017. cnss_init_time_sync_period_default(plat_priv);
  4018. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  4019. * enabled by default
  4020. */
  4021. plat_priv->adsp_pc_enabled = true;
  4022. }
  4023. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  4024. {
  4025. struct device *dev = &plat_priv->plat_dev->dev;
  4026. plat_priv->use_pm_domain =
  4027. of_property_read_bool(dev->of_node, "use-pm-domain");
  4028. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  4029. }
  4030. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  4031. {
  4032. struct device *dev = &plat_priv->plat_dev->dev;
  4033. plat_priv->set_wlaon_pwr_ctrl =
  4034. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  4035. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  4036. plat_priv->set_wlaon_pwr_ctrl);
  4037. }
  4038. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  4039. {
  4040. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4041. "qcom,converged-dt") ||
  4042. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4043. "qcom,same-dt-multi-dev") ||
  4044. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4045. "qcom,multi-wlan-exchg"));
  4046. }
  4047. static const struct platform_device_id cnss_platform_id_table[] = {
  4048. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  4049. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  4050. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  4051. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  4052. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  4053. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  4054. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  4055. { .name = "qcaconv", .driver_data = 0, },
  4056. { },
  4057. };
  4058. static const struct of_device_id cnss_of_match_table[] = {
  4059. {
  4060. .compatible = "qcom,cnss",
  4061. .data = (void *)&cnss_platform_id_table[0]},
  4062. {
  4063. .compatible = "qcom,cnss-qca6290",
  4064. .data = (void *)&cnss_platform_id_table[1]},
  4065. {
  4066. .compatible = "qcom,cnss-qca6390",
  4067. .data = (void *)&cnss_platform_id_table[2]},
  4068. {
  4069. .compatible = "qcom,cnss-qca6490",
  4070. .data = (void *)&cnss_platform_id_table[3]},
  4071. {
  4072. .compatible = "qcom,cnss-kiwi",
  4073. .data = (void *)&cnss_platform_id_table[4]},
  4074. {
  4075. .compatible = "qcom,cnss-mango",
  4076. .data = (void *)&cnss_platform_id_table[5]},
  4077. {
  4078. .compatible = "qcom,cnss-peach",
  4079. .data = (void *)&cnss_platform_id_table[6]},
  4080. {
  4081. .compatible = "qcom,cnss-qca-converged",
  4082. .data = (void *)&cnss_platform_id_table[7]},
  4083. { },
  4084. };
  4085. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  4086. static inline bool
  4087. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  4088. {
  4089. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4090. "use-nv-mac");
  4091. }
  4092. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  4093. {
  4094. struct device_node *child;
  4095. u32 id, i;
  4096. int id_n, device_identifier_gpio, ret;
  4097. u8 gpio_value;
  4098. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4099. return 0;
  4100. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4101. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4102. if (ret) {
  4103. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4104. return ret;
  4105. }
  4106. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4107. gpio_value = gpio_get_value(device_identifier_gpio);
  4108. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4109. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4110. child) {
  4111. if (strcmp(child->name, "chip_cfg"))
  4112. continue;
  4113. id_n = of_property_count_u32_elems(child, "supported-ids");
  4114. if (id_n <= 0) {
  4115. cnss_pr_err("Device id is NOT set\n");
  4116. return -EINVAL;
  4117. }
  4118. for (i = 0; i < id_n; i++) {
  4119. ret = of_property_read_u32_index(child,
  4120. "supported-ids",
  4121. i, &id);
  4122. if (ret) {
  4123. cnss_pr_err("Failed to read supported ids\n");
  4124. return -EINVAL;
  4125. }
  4126. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4127. plat_priv->plat_dev->dev.of_node = child;
  4128. plat_priv->device_id = QCA6490_DEVICE_ID;
  4129. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4130. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4131. child->name, i, id);
  4132. return 0;
  4133. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4134. plat_priv->plat_dev->dev.of_node = child;
  4135. plat_priv->device_id = KIWI_DEVICE_ID;
  4136. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4137. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4138. child->name, i, id);
  4139. return 0;
  4140. }
  4141. }
  4142. }
  4143. return -EINVAL;
  4144. }
  4145. static inline u32
  4146. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4147. {
  4148. bool is_converged_dt = of_property_read_bool(
  4149. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4150. bool is_multi_wlan_xchg;
  4151. if (is_converged_dt)
  4152. return CNSS_DTT_CONVERGED;
  4153. is_multi_wlan_xchg = of_property_read_bool(
  4154. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4155. if (is_multi_wlan_xchg)
  4156. return CNSS_DTT_MULTIEXCHG;
  4157. return CNSS_DTT_LEGACY;
  4158. }
  4159. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4160. {
  4161. int ret = 0;
  4162. int retry = 0;
  4163. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4164. return 0;
  4165. retry:
  4166. ret = cnss_power_on_device(plat_priv, true);
  4167. if (ret)
  4168. goto end;
  4169. ret = cnss_bus_init(plat_priv);
  4170. if (ret) {
  4171. if ((ret != -EPROBE_DEFER) &&
  4172. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4173. cnss_power_off_device(plat_priv);
  4174. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4175. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4176. goto retry;
  4177. }
  4178. goto power_off;
  4179. }
  4180. return 0;
  4181. power_off:
  4182. cnss_power_off_device(plat_priv);
  4183. end:
  4184. return ret;
  4185. }
  4186. int cnss_wlan_hw_enable(void)
  4187. {
  4188. struct cnss_plat_data *plat_priv;
  4189. int ret = 0;
  4190. if (cnss_is_dual_wlan_enabled())
  4191. plat_priv = cnss_get_first_plat_priv(NULL);
  4192. else
  4193. plat_priv = cnss_get_plat_priv(NULL);
  4194. if (!plat_priv)
  4195. return -ENODEV;
  4196. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4197. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4198. goto register_driver;
  4199. ret = cnss_wlan_device_init(plat_priv);
  4200. if (ret) {
  4201. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4202. CNSS_ASSERT(0);
  4203. return ret;
  4204. }
  4205. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4206. cnss_driver_event_post(plat_priv,
  4207. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4208. 0, NULL);
  4209. register_driver:
  4210. if (plat_priv->driver_ops)
  4211. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4212. return ret;
  4213. }
  4214. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4215. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4216. {
  4217. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4218. int ret = 0;
  4219. if (!plat_priv)
  4220. return -ENODEV;
  4221. /* If IMS server is connected, return success without QMI send */
  4222. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4223. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4224. return ret;
  4225. }
  4226. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4227. return ret;
  4228. }
  4229. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4230. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4231. unsigned long *thermal_state)
  4232. {
  4233. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4234. if (!tcdev || !tcdev->devdata) {
  4235. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4236. return -EINVAL;
  4237. }
  4238. cnss_tcdev = tcdev->devdata;
  4239. *thermal_state = cnss_tcdev->max_thermal_state;
  4240. return 0;
  4241. }
  4242. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4243. unsigned long *thermal_state)
  4244. {
  4245. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4246. if (!tcdev || !tcdev->devdata) {
  4247. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4248. return -EINVAL;
  4249. }
  4250. cnss_tcdev = tcdev->devdata;
  4251. *thermal_state = cnss_tcdev->curr_thermal_state;
  4252. return 0;
  4253. }
  4254. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4255. unsigned long thermal_state)
  4256. {
  4257. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4258. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4259. int ret = 0;
  4260. if (!tcdev || !tcdev->devdata) {
  4261. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4262. return -EINVAL;
  4263. }
  4264. cnss_tcdev = tcdev->devdata;
  4265. if (thermal_state > cnss_tcdev->max_thermal_state)
  4266. return -EINVAL;
  4267. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4268. thermal_state, cnss_tcdev->tcdev_id);
  4269. mutex_lock(&plat_priv->tcdev_lock);
  4270. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4271. thermal_state,
  4272. cnss_tcdev->tcdev_id);
  4273. if (!ret)
  4274. cnss_tcdev->curr_thermal_state = thermal_state;
  4275. mutex_unlock(&plat_priv->tcdev_lock);
  4276. if (ret) {
  4277. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4278. ret, cnss_tcdev->tcdev_id);
  4279. return ret;
  4280. }
  4281. return 0;
  4282. }
  4283. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4284. .get_max_state = cnss_tcdev_get_max_state,
  4285. .get_cur_state = cnss_tcdev_get_cur_state,
  4286. .set_cur_state = cnss_tcdev_set_cur_state,
  4287. };
  4288. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4289. int tcdev_id)
  4290. {
  4291. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4292. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4293. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4294. struct device_node *dev_node;
  4295. int ret = 0;
  4296. if (!priv) {
  4297. cnss_pr_err("Platform driver is not initialized!\n");
  4298. return -ENODEV;
  4299. }
  4300. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4301. if (!cnss_tcdev) {
  4302. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4303. return -ENOMEM;
  4304. }
  4305. cnss_tcdev->tcdev_id = tcdev_id;
  4306. cnss_tcdev->max_thermal_state = max_state;
  4307. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4308. "qcom,cnss_cdev%d", tcdev_id);
  4309. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4310. if (!dev_node) {
  4311. cnss_pr_err("Failed to get cooling device node\n");
  4312. kfree(cnss_tcdev);
  4313. return -EINVAL;
  4314. }
  4315. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4316. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4317. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4318. cdev_node_name,
  4319. cnss_tcdev,
  4320. &cnss_cooling_ops);
  4321. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4322. ret = PTR_ERR(cnss_tcdev->tcdev);
  4323. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4324. ret, cnss_tcdev->tcdev_id);
  4325. kfree(cnss_tcdev);
  4326. } else {
  4327. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4328. cnss_tcdev->tcdev_id);
  4329. mutex_lock(&priv->tcdev_lock);
  4330. list_add(&cnss_tcdev->tcdev_list,
  4331. &priv->cnss_tcdev_list);
  4332. mutex_unlock(&priv->tcdev_lock);
  4333. }
  4334. } else {
  4335. cnss_pr_dbg("Cooling device registration not supported");
  4336. kfree(cnss_tcdev);
  4337. ret = -EOPNOTSUPP;
  4338. }
  4339. return ret;
  4340. }
  4341. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4342. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4343. {
  4344. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4345. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4346. if (!priv) {
  4347. cnss_pr_err("Platform driver is not initialized!\n");
  4348. return;
  4349. }
  4350. mutex_lock(&priv->tcdev_lock);
  4351. while (!list_empty(&priv->cnss_tcdev_list)) {
  4352. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4353. struct cnss_thermal_cdev,
  4354. tcdev_list);
  4355. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4356. list_del(&cnss_tcdev->tcdev_list);
  4357. kfree(cnss_tcdev);
  4358. }
  4359. mutex_unlock(&priv->tcdev_lock);
  4360. }
  4361. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4362. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4363. unsigned long *thermal_state,
  4364. int tcdev_id)
  4365. {
  4366. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4367. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4368. if (!priv) {
  4369. cnss_pr_err("Platform driver is not initialized!\n");
  4370. return -ENODEV;
  4371. }
  4372. mutex_lock(&priv->tcdev_lock);
  4373. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4374. if (cnss_tcdev->tcdev_id != tcdev_id)
  4375. continue;
  4376. *thermal_state = cnss_tcdev->curr_thermal_state;
  4377. mutex_unlock(&priv->tcdev_lock);
  4378. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4379. cnss_tcdev->curr_thermal_state, tcdev_id);
  4380. return 0;
  4381. }
  4382. mutex_unlock(&priv->tcdev_lock);
  4383. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4384. return -EINVAL;
  4385. }
  4386. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4387. static int cnss_probe(struct platform_device *plat_dev)
  4388. {
  4389. int ret = 0;
  4390. struct cnss_plat_data *plat_priv;
  4391. const struct of_device_id *of_id;
  4392. const struct platform_device_id *device_id;
  4393. if (cnss_get_plat_priv(plat_dev)) {
  4394. cnss_pr_err("Driver is already initialized!\n");
  4395. ret = -EEXIST;
  4396. goto out;
  4397. }
  4398. ret = cnss_plat_env_available();
  4399. if (ret)
  4400. goto out;
  4401. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4402. if (!of_id || !of_id->data) {
  4403. cnss_pr_err("Failed to find of match device!\n");
  4404. ret = -ENODEV;
  4405. goto out;
  4406. }
  4407. device_id = of_id->data;
  4408. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4409. GFP_KERNEL);
  4410. if (!plat_priv) {
  4411. ret = -ENOMEM;
  4412. goto out;
  4413. }
  4414. plat_priv->plat_dev = plat_dev;
  4415. plat_priv->dev_node = NULL;
  4416. plat_priv->device_id = device_id->driver_data;
  4417. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4418. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4419. plat_priv->dt_type);
  4420. plat_priv->use_fw_path_with_prefix =
  4421. cnss_use_fw_path_with_prefix(plat_priv);
  4422. ret = cnss_get_dev_cfg_node(plat_priv);
  4423. if (ret) {
  4424. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4425. goto reset_plat_dev;
  4426. }
  4427. cnss_initialize_mem_pool(plat_priv->device_id);
  4428. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4429. if (ret)
  4430. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4431. ret);
  4432. ret = cnss_get_rc_num(plat_priv);
  4433. if (ret)
  4434. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4435. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4436. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4437. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4438. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4439. cnss_set_plat_priv(plat_dev, plat_priv);
  4440. cnss_set_device_name(plat_priv);
  4441. platform_set_drvdata(plat_dev, plat_priv);
  4442. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4443. INIT_LIST_HEAD(&plat_priv->clk_list);
  4444. cnss_get_pm_domain_info(plat_priv);
  4445. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4446. cnss_power_misc_params_init(plat_priv);
  4447. cnss_get_tcs_info(plat_priv);
  4448. cnss_get_cpr_info(plat_priv);
  4449. cnss_aop_interface_init(plat_priv);
  4450. cnss_init_control_params(plat_priv);
  4451. ret = cnss_get_resources(plat_priv);
  4452. if (ret)
  4453. goto reset_ctx;
  4454. ret = cnss_register_esoc(plat_priv);
  4455. if (ret)
  4456. goto free_res;
  4457. ret = cnss_register_bus_scale(plat_priv);
  4458. if (ret)
  4459. goto unreg_esoc;
  4460. ret = cnss_create_sysfs(plat_priv);
  4461. if (ret)
  4462. goto unreg_bus_scale;
  4463. ret = cnss_event_work_init(plat_priv);
  4464. if (ret)
  4465. goto remove_sysfs;
  4466. ret = cnss_dms_init(plat_priv);
  4467. if (ret)
  4468. goto deinit_event_work;
  4469. ret = cnss_debugfs_create(plat_priv);
  4470. if (ret)
  4471. goto deinit_dms;
  4472. ret = cnss_misc_init(plat_priv);
  4473. if (ret)
  4474. goto destroy_debugfs;
  4475. ret = cnss_wlan_hw_disable_check(plat_priv);
  4476. if (ret)
  4477. goto deinit_misc;
  4478. /* Make sure all platform related init are done before
  4479. * device power on and bus init.
  4480. */
  4481. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4482. ret = cnss_wlan_device_init(plat_priv);
  4483. if (ret)
  4484. goto deinit_misc;
  4485. } else {
  4486. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4487. }
  4488. cnss_register_coex_service(plat_priv);
  4489. cnss_register_ims_service(plat_priv);
  4490. mutex_init(&plat_priv->tcdev_lock);
  4491. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4492. cnss_pr_info("Platform driver probed successfully.\n");
  4493. return 0;
  4494. deinit_misc:
  4495. cnss_misc_deinit(plat_priv);
  4496. destroy_debugfs:
  4497. cnss_debugfs_destroy(plat_priv);
  4498. deinit_dms:
  4499. cnss_dms_deinit(plat_priv);
  4500. deinit_event_work:
  4501. cnss_event_work_deinit(plat_priv);
  4502. remove_sysfs:
  4503. cnss_remove_sysfs(plat_priv);
  4504. unreg_bus_scale:
  4505. cnss_unregister_bus_scale(plat_priv);
  4506. unreg_esoc:
  4507. cnss_unregister_esoc(plat_priv);
  4508. free_res:
  4509. cnss_put_resources(plat_priv);
  4510. reset_ctx:
  4511. cnss_aop_interface_deinit(plat_priv);
  4512. platform_set_drvdata(plat_dev, NULL);
  4513. cnss_deinitialize_mem_pool();
  4514. reset_plat_dev:
  4515. cnss_clear_plat_priv(plat_priv);
  4516. out:
  4517. return ret;
  4518. }
  4519. static int cnss_remove(struct platform_device *plat_dev)
  4520. {
  4521. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4522. plat_priv->audio_iommu_domain = NULL;
  4523. cnss_genl_exit();
  4524. cnss_unregister_ims_service(plat_priv);
  4525. cnss_unregister_coex_service(plat_priv);
  4526. cnss_bus_deinit(plat_priv);
  4527. cnss_misc_deinit(plat_priv);
  4528. cnss_debugfs_destroy(plat_priv);
  4529. cnss_dms_deinit(plat_priv);
  4530. cnss_qmi_deinit(plat_priv);
  4531. cnss_event_work_deinit(plat_priv);
  4532. cnss_cancel_dms_work();
  4533. cnss_remove_sysfs(plat_priv);
  4534. cnss_unregister_bus_scale(plat_priv);
  4535. cnss_unregister_esoc(plat_priv);
  4536. cnss_put_resources(plat_priv);
  4537. cnss_aop_interface_deinit(plat_priv);
  4538. cnss_deinitialize_mem_pool();
  4539. platform_set_drvdata(plat_dev, NULL);
  4540. cnss_clear_plat_priv(plat_priv);
  4541. return 0;
  4542. }
  4543. static struct platform_driver cnss_platform_driver = {
  4544. .probe = cnss_probe,
  4545. .remove = cnss_remove,
  4546. .driver = {
  4547. .name = "cnss2",
  4548. .of_match_table = cnss_of_match_table,
  4549. #ifdef CONFIG_CNSS_ASYNC
  4550. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4551. #endif
  4552. },
  4553. };
  4554. static bool cnss_check_compatible_node(void)
  4555. {
  4556. struct device_node *dn = NULL;
  4557. for_each_matching_node(dn, cnss_of_match_table) {
  4558. if (of_device_is_available(dn)) {
  4559. cnss_allow_driver_loading = true;
  4560. return true;
  4561. }
  4562. }
  4563. return false;
  4564. }
  4565. /**
  4566. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4567. *
  4568. * Valid device tree node means a node with "compatible" property from the
  4569. * device match table and "status" property is not disabled.
  4570. *
  4571. * Return: true if valid device tree node found, false if not found
  4572. */
  4573. static bool cnss_is_valid_dt_node_found(void)
  4574. {
  4575. struct device_node *dn = NULL;
  4576. for_each_matching_node(dn, cnss_of_match_table) {
  4577. if (of_device_is_available(dn))
  4578. break;
  4579. }
  4580. if (dn)
  4581. return true;
  4582. return false;
  4583. }
  4584. static int __init cnss_initialize(void)
  4585. {
  4586. int ret = 0;
  4587. if (!cnss_is_valid_dt_node_found())
  4588. return -ENODEV;
  4589. if (!cnss_check_compatible_node())
  4590. return ret;
  4591. cnss_debug_init();
  4592. ret = platform_driver_register(&cnss_platform_driver);
  4593. if (ret)
  4594. cnss_debug_deinit();
  4595. ret = cnss_genl_init();
  4596. if (ret < 0)
  4597. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4598. return ret;
  4599. }
  4600. static void __exit cnss_exit(void)
  4601. {
  4602. cnss_genl_exit();
  4603. platform_driver_unregister(&cnss_platform_driver);
  4604. cnss_debug_deinit();
  4605. }
  4606. module_init(cnss_initialize);
  4607. module_exit(cnss_exit);
  4608. MODULE_LICENSE("GPL v2");
  4609. MODULE_DESCRIPTION("CNSS2 Platform Driver");