dp_rx.c 24 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_nbuf.h"
  24. #include <ieee80211.h>
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. /*
  30. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  31. * called during dp rx initialization
  32. * and at the end of dp_rx_process.
  33. *
  34. * @soc: core txrx main context
  35. * @mac_id: mac_id which is one of 3 mac_ids
  36. * @desc_list: list of descs if called from dp_rx_process
  37. * or NULL during dp rx initialization or out of buffer
  38. * interrupt.
  39. * @owner: who owns the nbuf (host, NSS etc...)
  40. * Return: return success or failure
  41. */
  42. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  43. uint32_t num_req_buffers,
  44. union dp_rx_desc_list_elem_t **desc_list,
  45. union dp_rx_desc_list_elem_t **tail,
  46. uint8_t owner)
  47. {
  48. uint32_t num_alloc_desc;
  49. uint16_t num_desc_to_free = 0;
  50. struct dp_pdev *dp_pdev = dp_soc->pdev_list[mac_id];
  51. uint32_t num_entries_avail;
  52. uint32_t count;
  53. int sync_hw_ptr = 1;
  54. qdf_dma_addr_t paddr;
  55. qdf_nbuf_t rx_netbuf;
  56. void *rxdma_ring_entry;
  57. union dp_rx_desc_list_elem_t *next;
  58. struct dp_srng *dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  59. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  60. int32_t ret;
  61. if (!rxdma_srng) {
  62. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  63. "rxdma srng not initialized");
  64. DP_STATS_INC(dp_pdev, err.rxdma_unitialized, 1);
  65. return QDF_STATUS_E_FAILURE;
  66. }
  67. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  68. "requested %d buffers for replenish", num_req_buffers);
  69. /*
  70. * if desc_list is NULL, allocate the descs from freelist
  71. */
  72. if (!(*desc_list)) {
  73. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  74. num_req_buffers,
  75. desc_list,
  76. tail);
  77. if (!num_alloc_desc) {
  78. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  79. "no free rx_descs in freelist");
  80. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  81. num_alloc_desc);
  82. return QDF_STATUS_E_NOMEM;
  83. }
  84. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  85. "%d rx desc allocated", num_alloc_desc);
  86. num_req_buffers = num_alloc_desc;
  87. }
  88. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  89. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  90. rxdma_srng,
  91. sync_hw_ptr);
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  93. "no of availble entries in rxdma ring: %d",
  94. num_entries_avail);
  95. if (num_entries_avail < num_req_buffers) {
  96. num_desc_to_free = num_req_buffers - num_entries_avail;
  97. num_req_buffers = num_entries_avail;
  98. }
  99. count = 0;
  100. while (count < num_req_buffers) {
  101. rx_netbuf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  102. RX_BUFFER_SIZE,
  103. RX_BUFFER_RESERVATION,
  104. RX_BUFFER_ALIGNMENT,
  105. FALSE);
  106. if (rx_netbuf == NULL)
  107. continue;
  108. qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  109. QDF_DMA_BIDIRECTIONAL);
  110. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  111. /*
  112. * check if the physical address of nbuf->data is
  113. * less then 0x50000000 then free the nbuf and try
  114. * allocating new nbuf. We can try for 100 times.
  115. * this is a temp WAR till we fix it properly.
  116. */
  117. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  118. if (ret == QDF_STATUS_E_FAILURE)
  119. break;
  120. count++;
  121. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  122. rxdma_srng);
  123. next = (*desc_list)->next;
  124. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  125. DP_STATS_INC_PKT(dp_pdev, replenished, 1,
  126. qdf_nbuf_len(rx_netbuf));
  127. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  128. (*desc_list)->rx_desc.cookie,
  129. owner);
  130. *desc_list = next;
  131. }
  132. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  134. "successfully replenished %d buffers", num_req_buffers);
  135. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  136. "%d rx desc added back to free list", num_desc_to_free);
  137. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  138. /*
  139. * add any available free desc back to the free list
  140. */
  141. if (*desc_list)
  142. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list,
  143. tail, mac_id);
  144. return QDF_STATUS_SUCCESS;
  145. }
  146. /*
  147. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  148. * pkts to RAW mode simulation to
  149. * decapsulate the pkt.
  150. *
  151. * @vdev: vdev on which RAW mode is enabled
  152. * @nbuf_list: list of RAW pkts to process
  153. *
  154. * Return: void
  155. */
  156. static void
  157. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list)
  158. {
  159. qdf_nbuf_t deliver_list_head = NULL;
  160. qdf_nbuf_t deliver_list_tail = NULL;
  161. qdf_nbuf_t nbuf;
  162. nbuf = nbuf_list;
  163. while (nbuf) {
  164. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  165. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  166. /*
  167. * reset the chfrag_start and chfrag_end bits in nbuf cb
  168. * as this is a non-amsdu pkt and RAW mode simulation expects
  169. * these bit s to be 0 for non-amsdu pkt.
  170. */
  171. if (qdf_nbuf_is_chfrag_start(nbuf) &&
  172. qdf_nbuf_is_chfrag_end(nbuf)) {
  173. qdf_nbuf_set_chfrag_start(nbuf, 0);
  174. qdf_nbuf_set_chfrag_end(nbuf, 0);
  175. }
  176. nbuf = next;
  177. }
  178. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  179. &deliver_list_tail);
  180. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  181. }
  182. #ifdef DP_LFR
  183. /*
  184. * In case of LFR, data of a new peer might be sent up
  185. * even before peer is added.
  186. */
  187. static inline struct dp_vdev *
  188. dp_get_vdev_from_peer(struct dp_soc *soc,
  189. uint16_t peer_id,
  190. struct dp_peer *peer,
  191. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  192. {
  193. struct dp_vdev *vdev;
  194. uint8_t vdev_id;
  195. if (unlikely(!peer)) {
  196. if (peer_id != HTT_INVALID_PEER) {
  197. vdev_id = DP_PEER_METADATA_ID_GET(
  198. mpdu_desc_info.peer_meta_data);
  199. QDF_TRACE(QDF_MODULE_ID_DP,
  200. QDF_TRACE_LEVEL_ERROR,
  201. FL("PeerID %d not found use vdevID %d"),
  202. peer_id, vdev_id);
  203. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  204. vdev_id);
  205. } else {
  206. QDF_TRACE(QDF_MODULE_ID_DP,
  207. QDF_TRACE_LEVEL_ERROR,
  208. FL("Invalid PeerID %d"),
  209. peer_id);
  210. return NULL;
  211. }
  212. } else {
  213. vdev = peer->vdev;
  214. }
  215. return vdev;
  216. }
  217. #else
  218. static inline struct dp_vdev *
  219. dp_get_vdev_from_peer(struct dp_soc *soc,
  220. uint16_t peer_id,
  221. struct dp_peer *peer,
  222. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  223. {
  224. if (unlikely(!peer)) {
  225. QDF_TRACE(QDF_MODULE_ID_DP,
  226. QDF_TRACE_LEVEL_ERROR,
  227. FL("Peer not found for peerID %d"),
  228. peer_id);
  229. return NULL;
  230. } else {
  231. return peer->vdev;
  232. }
  233. }
  234. #endif
  235. /**
  236. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  237. *
  238. * @soc: core txrx main context
  239. * @sa_peer : source peer entry
  240. * @rx_tlv_hdr : start address of rx tlvs
  241. * @nbuf : nbuf that has to be intrabss forwarded
  242. *
  243. * Return: bool: true if it is forwarded else false
  244. */
  245. static bool
  246. dp_rx_intrabss_fwd(struct dp_soc *soc,
  247. struct dp_peer *sa_peer,
  248. uint8_t *rx_tlv_hdr,
  249. qdf_nbuf_t nbuf)
  250. {
  251. uint16_t da_idx;
  252. uint16_t len;
  253. struct dp_peer *da_peer;
  254. struct dp_ast_entry *ast_entry;
  255. qdf_nbuf_t nbuf_copy;
  256. /* check if the destination peer is available in peer table
  257. * and also check if the source peer and destination peer
  258. * belong to the same vap and destination peer is not bss peer.
  259. */
  260. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  261. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  262. da_idx = hal_rx_msdu_end_da_idx_get(rx_tlv_hdr);
  263. ast_entry = soc->ast_table[da_idx];
  264. if (!ast_entry)
  265. return false;
  266. da_peer = ast_entry->peer;
  267. if (!da_peer)
  268. return false;
  269. if (da_peer->vdev == sa_peer->vdev && !da_peer->bss_peer) {
  270. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  271. len = qdf_nbuf_len(nbuf);
  272. if (!dp_tx_send(sa_peer->vdev, nbuf)) {
  273. DP_STATS_INC_PKT(sa_peer, rx.intra_bss, 1, len);
  274. return true;
  275. } else
  276. return false;
  277. }
  278. }
  279. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  280. * source, then clone the pkt and send the cloned pkt for
  281. * intra BSS forwarding and original pkt up the network stack
  282. * Note: how do we handle multicast pkts. do we forward
  283. * all multicast pkts as is or let a higher layer module
  284. * like igmpsnoop decide whether to forward or not with
  285. * Mcast enhancement.
  286. */
  287. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  288. !sa_peer->bss_peer))) {
  289. nbuf_copy = qdf_nbuf_copy(nbuf);
  290. if (!nbuf_copy)
  291. return false;
  292. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  293. len = qdf_nbuf_len(nbuf_copy);
  294. if (dp_tx_send(sa_peer->vdev, nbuf_copy))
  295. qdf_nbuf_free(nbuf_copy);
  296. else
  297. DP_STATS_INC_PKT(sa_peer, rx.intra_bss, 1, len);
  298. }
  299. /* return false as we have to still send the original pkt
  300. * up the stack
  301. */
  302. return false;
  303. }
  304. #ifdef MESH_MODE_SUPPORT
  305. /**
  306. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  307. *
  308. * @vdev: DP Virtual device handle
  309. * @nbuf: Buffer pointer
  310. *
  311. * This function allocated memory for mesh receive stats and fill the
  312. * required stats. Stores the memory address in skb cb.
  313. *
  314. * Return: void
  315. */
  316. static
  317. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  318. {
  319. struct mesh_recv_hdr_s *rx_info = NULL;
  320. uint32_t pkt_type;
  321. uint32_t nss;
  322. uint32_t rate_mcs;
  323. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  324. /* fill recv mesh stats */
  325. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  326. /* upper layers are resposible to free this memory */
  327. if (rx_info == NULL) {
  328. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  329. "Memory allocation failed for mesh rx stats");
  330. return;
  331. }
  332. if (qdf_nbuf_is_chfrag_start(nbuf))
  333. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  334. if (qdf_nbuf_is_chfrag_end(nbuf))
  335. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  336. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  337. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  338. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  339. rx_info->rs_flags |= MESH_KEY_NOTFILLED;
  340. }
  341. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  342. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  343. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  344. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  345. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  346. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x4) | (pkt_type << 6);
  347. qdf_nbuf_set_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  348. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  349. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  350. rx_info->rs_flags,
  351. rx_info->rs_rssi,
  352. rx_info->rs_channel,
  353. rx_info->rs_ratephy1,
  354. rx_info->rs_keyix);
  355. }
  356. /**
  357. * dp_rx_fill_mesh_stats() - Filters mesh unwanted packets
  358. *
  359. * @vdev: DP Virtual device handle
  360. * @nbuf: Buffer pointer
  361. *
  362. * This checks if the received packet is matching any filter out
  363. * catogery and and drop the packet if it matches.
  364. *
  365. * Return: status(0 indicates drop, 1 indicate to no drop)
  366. */
  367. static inline
  368. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  369. {
  370. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  371. union dp_align_mac_addr mac_addr;
  372. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  373. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  374. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  375. return QDF_STATUS_SUCCESS;
  376. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  377. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  378. return QDF_STATUS_SUCCESS;
  379. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  380. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  381. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  382. return QDF_STATUS_SUCCESS;
  383. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  384. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  385. &mac_addr.raw[0]))
  386. return QDF_STATUS_E_FAILURE;
  387. if (!qdf_mem_cmp(&mac_addr.raw[0],
  388. &vdev->mac_addr.raw[0],
  389. DP_MAC_ADDR_LEN))
  390. return QDF_STATUS_SUCCESS;
  391. }
  392. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  393. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  394. &mac_addr.raw[0]))
  395. return QDF_STATUS_E_FAILURE;
  396. if (!qdf_mem_cmp(&mac_addr.raw[0],
  397. &vdev->mac_addr.raw[0],
  398. DP_MAC_ADDR_LEN))
  399. return QDF_STATUS_SUCCESS;
  400. }
  401. }
  402. return QDF_STATUS_E_FAILURE;
  403. }
  404. #else
  405. static
  406. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  407. {
  408. }
  409. static inline
  410. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  411. {
  412. return QDF_STATUS_E_FAILURE;
  413. }
  414. #endif
  415. /**
  416. * dp_rx_process() - Brain of the Rx processing functionality
  417. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  418. * @soc: core txrx main context
  419. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  420. * @quota: No. of units (packets) that can be serviced in one shot.
  421. *
  422. * This function implements the core of Rx functionality. This is
  423. * expected to handle only non-error frames.
  424. *
  425. * Return: uint32_t: No. of elements processed
  426. */
  427. uint32_t
  428. dp_rx_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  429. {
  430. void *hal_soc;
  431. void *ring_desc;
  432. struct dp_rx_desc *rx_desc;
  433. qdf_nbuf_t nbuf;
  434. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  435. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  436. uint32_t rx_bufs_used = 0, rx_buf_cookie, l2_hdr_offset;
  437. uint16_t msdu_len;
  438. uint16_t peer_id;
  439. struct dp_peer *peer = NULL;
  440. struct dp_vdev *vdev = NULL;
  441. struct dp_vdev *vdev_list[WLAN_UMAC_PSOC_MAX_VDEVS] = { NULL };
  442. uint32_t pkt_len;
  443. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  444. struct hal_rx_msdu_desc_info msdu_desc_info;
  445. enum hal_reo_error_status error;
  446. static uint32_t peer_mdata;
  447. uint8_t *rx_tlv_hdr;
  448. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  449. uint32_t sgi, rate_mcs, tid, nss, bw, reception_type;
  450. uint64_t vdev_map = 0;
  451. uint8_t mac_id;
  452. uint16_t i, vdev_cnt = 0;
  453. uint32_t ampdu_flag, amsdu_flag;
  454. struct ether_header *eh;
  455. /* Debug -- Remove later */
  456. qdf_assert(soc && hal_ring);
  457. hal_soc = soc->hal_soc;
  458. /* Debug -- Remove later */
  459. qdf_assert(hal_soc);
  460. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  461. /*
  462. * Need API to convert from hal_ring pointer to
  463. * Ring Type / Ring Id combo
  464. */
  465. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  466. FL("HAL RING Access Failed -- %p"), hal_ring);
  467. hal_srng_access_end(hal_soc, hal_ring);
  468. goto done;
  469. }
  470. /*
  471. * start reaping the buffers from reo ring and queue
  472. * them in per vdev queue.
  473. * Process the received pkts in a different per vdev loop.
  474. */
  475. while (qdf_likely((ring_desc =
  476. hal_srng_dst_get_next(hal_soc, hal_ring))
  477. && quota--)) {
  478. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  479. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  480. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  481. FL("HAL RING 0x%p:error %d"), hal_ring, error);
  482. /* Don't know how to deal with this -- assert */
  483. qdf_assert(0);
  484. }
  485. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  486. rx_desc = dp_rx_cookie_2_va(soc, rx_buf_cookie);
  487. qdf_assert(rx_desc);
  488. rx_bufs_reaped[rx_desc->pool_id]++;
  489. /* TODO */
  490. /*
  491. * Need a separate API for unmapping based on
  492. * phyiscal address
  493. */
  494. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  495. QDF_DMA_BIDIRECTIONAL);
  496. /* Get MPDU DESC info */
  497. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  498. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  499. mpdu_desc_info.peer_meta_data);
  500. peer = dp_peer_find_by_id(soc, peer_id);
  501. vdev = dp_get_vdev_from_peer(soc, peer_id, peer,
  502. mpdu_desc_info);
  503. if (!vdev) {
  504. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  505. FL("vdev is NULL"));
  506. qdf_nbuf_free(rx_desc->nbuf);
  507. goto fail;
  508. }
  509. if (!((vdev_map >> vdev->vdev_id) & 1)) {
  510. vdev_map |= 1 << vdev->vdev_id;
  511. vdev_list[vdev_cnt] = vdev;
  512. vdev_cnt++;
  513. }
  514. /* Get MSDU DESC info */
  515. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  516. /*
  517. * save msdu flags first, last and continuation msdu in
  518. * nbuf->cb
  519. */
  520. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  521. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  522. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  523. qdf_nbuf_set_chfrag_cont(rx_desc->nbuf, 1);
  524. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  525. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  526. DP_STATS_INC_PKT(peer, rx.rcvd_reo, 1,
  527. qdf_nbuf_len(rx_desc->nbuf));
  528. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  529. HAL_MPDU_F_AMPDU_FLAG);
  530. DP_STATS_INCC(vdev->pdev, rx.ampdu_cnt, 1, ampdu_flag);
  531. DP_STATS_INCC(vdev->pdev, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  532. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  533. amsdu_flag = ((msdu_desc_info.msdu_flags &
  534. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) &&
  535. (msdu_desc_info.msdu_flags &
  536. HAL_MSDU_F_LAST_MSDU_IN_MPDU));
  537. DP_STATS_INCC(vdev->pdev, rx.non_amsdu_cnt, 1,
  538. amsdu_flag);
  539. DP_STATS_INCC(vdev->pdev, rx.amsdu_cnt, 1,
  540. !(amsdu_flag));
  541. qdf_nbuf_queue_add(&vdev->rxq, rx_desc->nbuf);
  542. fail:
  543. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  544. &tail[rx_desc->pool_id],
  545. rx_desc);
  546. }
  547. done:
  548. hal_srng_access_end(hal_soc, hal_ring);
  549. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  550. /*
  551. * continue with next mac_id if no pkts were reaped
  552. * from that pool
  553. */
  554. if (!rx_bufs_reaped[mac_id])
  555. continue;
  556. dp_rx_buffers_replenish(soc, mac_id,
  557. rx_bufs_reaped[mac_id],
  558. &head[mac_id],
  559. &tail[mac_id],
  560. HAL_RX_BUF_RBM_SW3_BM);
  561. }
  562. for (i = 0; i < vdev_cnt; i++) {
  563. qdf_nbuf_t deliver_list_head = NULL;
  564. qdf_nbuf_t deliver_list_tail = NULL;
  565. vdev = vdev_list[i];
  566. while ((nbuf = qdf_nbuf_queue_remove(&vdev->rxq))) {
  567. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  568. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  569. /*
  570. * Check if DMA completed -- msdu_done is the last bit
  571. * to be written
  572. */
  573. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  574. QDF_TRACE(QDF_MODULE_ID_DP,
  575. QDF_TRACE_LEVEL_ERROR,
  576. FL("MSDU DONE failure"));
  577. hal_rx_dump_pkt_tlvs(rx_tlv_hdr,
  578. QDF_TRACE_LEVEL_INFO);
  579. qdf_assert(0);
  580. }
  581. if (qdf_nbuf_is_chfrag_start(nbuf))
  582. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  583. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  584. peer = dp_peer_find_by_id(soc, peer_id);
  585. /* TODO */
  586. /*
  587. * In case of roaming peer object may not be
  588. * immediately available -- need to handle this
  589. * Cannot drop these packets right away.
  590. */
  591. /* Peer lookup failed */
  592. if (!peer && !vdev) {
  593. /* Drop & free packet */
  594. qdf_nbuf_free(nbuf);
  595. /* Statistics */
  596. continue;
  597. }
  598. if (peer && qdf_unlikely(peer->bss_peer)) {
  599. QDF_TRACE(QDF_MODULE_ID_DP,
  600. QDF_TRACE_LEVEL_INFO,
  601. FL("received pkt with same src MAC"));
  602. /* Drop & free packet */
  603. qdf_nbuf_free(nbuf);
  604. /* Statistics */
  605. continue;
  606. }
  607. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  608. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  609. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  610. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  611. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  612. __func__, __LINE__, sgi, rate_mcs, tid);
  613. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  614. reception_type = hal_rx_msdu_start_reception_type_get(
  615. rx_tlv_hdr);
  616. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  617. DP_STATS_INC(vdev->pdev, rx.bw[bw], 1);
  618. DP_STATS_INC(vdev->pdev,
  619. rx.reception_type[reception_type], 1);
  620. DP_STATS_INCC(vdev->pdev, rx.nss[nss], 1,
  621. ((reception_type == REPT_MU_MIMO) ||
  622. (reception_type == REPT_MU_OFDMA_MIMO))
  623. );
  624. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  625. DP_STATS_INC(peer, rx.mcs_count[rate_mcs], 1);
  626. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  627. hal_rx_mpdu_end_mic_err_get(
  628. rx_tlv_hdr));
  629. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  630. hal_rx_mpdu_end_decrypt_err_get(
  631. rx_tlv_hdr));
  632. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)],
  633. 1);
  634. DP_STATS_INC(peer, rx.bw[bw], 1);
  635. DP_STATS_INC(peer, rx.reception_type[reception_type],
  636. 1);
  637. /*
  638. * HW structures call this L3 header padding --
  639. * even though this is actually the offset from
  640. * the buffer beginning where the L2 header
  641. * begins.
  642. */
  643. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  644. FL("rxhash: flow id toeplitz: 0x%x\n"),
  645. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  646. l2_hdr_offset =
  647. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  648. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  649. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  650. /* Set length in nbuf */
  651. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  652. if (qdf_unlikely(vdev->mesh_vdev)) {
  653. if (dp_rx_filter_mesh_packets(vdev, nbuf)
  654. == QDF_STATUS_SUCCESS) {
  655. QDF_TRACE(QDF_MODULE_ID_DP,
  656. QDF_TRACE_LEVEL_INFO_MED,
  657. FL("mesh pkt filtered"));
  658. qdf_nbuf_free(nbuf);
  659. continue;
  660. }
  661. dp_rx_fill_mesh_stats(vdev, nbuf);
  662. }
  663. /*
  664. * Advance the packet start pointer by total size of
  665. * pre-header TLV's
  666. */
  667. qdf_nbuf_pull_head(nbuf,
  668. RX_PKT_TLVS_LEN + l2_hdr_offset);
  669. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  670. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  671. "p_id %d msdu_len %d hdr_off %d",
  672. peer_id, msdu_len, l2_hdr_offset);
  673. print_hex_dump(KERN_ERR,
  674. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  675. qdf_nbuf_data(nbuf), 128, false);
  676. #endif /* NAPIER_EMULATION */
  677. /* WDS Source Port Learning */
  678. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
  679. /* Intrabss-fwd */
  680. if (vdev->opmode != wlan_op_mode_sta)
  681. if (dp_rx_intrabss_fwd(soc, peer, rx_tlv_hdr,
  682. nbuf))
  683. continue; /* Get next descriptor */
  684. rx_bufs_used++;
  685. DP_RX_LIST_APPEND(deliver_list_head,
  686. deliver_list_tail,
  687. nbuf);
  688. DP_STATS_INCC_PKT(peer, rx.multicast, 1, pkt_len,
  689. DP_FRAME_IS_MULTICAST((eh)->ether_dhost
  690. ));
  691. DP_STATS_INCC_PKT(peer, rx.unicast, 1, pkt_len,
  692. !(DP_FRAME_IS_MULTICAST(
  693. (eh)->ether_dhost)));
  694. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  695. pkt_len);
  696. if (hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  697. if (soc->cdp_soc.ol_ops->update_dp_stats)
  698. soc->cdp_soc.ol_ops->update_dp_stats(
  699. vdev->pdev->osif_pdev,
  700. &peer->stats,
  701. peer_id,
  702. UPDATE_PEER_STATS);
  703. dp_aggregate_vdev_stats(peer->vdev);
  704. if (soc->cdp_soc.ol_ops->update_dp_stats)
  705. soc->cdp_soc.ol_ops->update_dp_stats(
  706. vdev->pdev->osif_pdev,
  707. &peer->vdev->stats,
  708. peer->vdev->vdev_id,
  709. UPDATE_VDEV_STATS);
  710. }
  711. }
  712. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw))
  713. dp_rx_deliver_raw(vdev, deliver_list_head);
  714. else if (qdf_likely(vdev->osif_rx) && deliver_list_head)
  715. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  716. }
  717. return rx_bufs_used; /* Assume no scale factor for now */
  718. }
  719. /**
  720. * dp_rx_detach() - detach dp rx
  721. * @soc: core txrx main context
  722. *
  723. * This function will detach DP RX into main device context
  724. * will free DP Rx resources.
  725. *
  726. * Return: void
  727. */
  728. void
  729. dp_rx_pdev_detach(struct dp_pdev *pdev)
  730. {
  731. uint8_t pdev_id = pdev->pdev_id;
  732. struct dp_soc *soc = pdev->soc;
  733. dp_rx_desc_pool_free(soc, pdev_id);
  734. qdf_spinlock_destroy(&soc->rx_desc_mutex[pdev_id]);
  735. return;
  736. }
  737. /**
  738. * dp_rx_attach() - attach DP RX
  739. * @soc: core txrx main context
  740. *
  741. * This function will attach a DP RX instance into the main
  742. * device (SOC) context. Will allocate dp rx resource and
  743. * initialize resources.
  744. *
  745. * Return: QDF_STATUS_SUCCESS: success
  746. * QDF_STATUS_E_RESOURCES: Error return
  747. */
  748. QDF_STATUS
  749. dp_rx_pdev_attach(struct dp_pdev *pdev)
  750. {
  751. uint8_t pdev_id = pdev->pdev_id;
  752. struct dp_soc *soc = pdev->soc;
  753. struct dp_srng rxdma_srng;
  754. uint32_t rxdma_entries;
  755. union dp_rx_desc_list_elem_t *desc_list = NULL;
  756. union dp_rx_desc_list_elem_t *tail = NULL;
  757. qdf_spinlock_create(&soc->rx_desc_mutex[pdev_id]);
  758. pdev = soc->pdev_list[pdev_id];
  759. rxdma_srng = pdev->rx_refill_buf_ring;
  760. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  761. soc->hal_soc, RXDMA_BUF);
  762. dp_rx_desc_pool_alloc(soc, pdev_id);
  763. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  764. dp_rx_buffers_replenish(soc, pdev_id, rxdma_entries,
  765. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  766. return QDF_STATUS_SUCCESS;
  767. }