cfg_dp.h 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740
  1. /*
  2. * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * DOC: This file contains definitions of Data Path configuration.
  20. */
  21. #ifndef _CFG_DP_H_
  22. #define _CFG_DP_H_
  23. #include "cfg_define.h"
  24. #define WLAN_CFG_MAX_CLIENTS 64
  25. #define WLAN_CFG_MAX_CLIENTS_MIN 8
  26. #define WLAN_CFG_MAX_CLIENTS_MAX 64
  27. /* Change this to a lower value to enforce scattered idle list mode */
  28. #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
  29. #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
  30. #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
  31. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  32. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
  33. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3
  34. #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
  35. defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
  36. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
  37. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
  38. #else
  39. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
  40. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
  41. #endif
  42. #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
  43. #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
  44. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  45. #define WLAN_CFG_PER_PDEV_RX_RING 0
  46. #define WLAN_CFG_PER_PDEV_LMAC_RING 0
  47. #define WLAN_LRO_ENABLE 0
  48. #define WLAN_CFG_MAC_PER_TARGET 2
  49. #ifdef IPA_OFFLOAD
  50. /* Size of TCL TX Ring */
  51. #define WLAN_CFG_TX_RING_SIZE 1024
  52. #define WLAN_CFG_PER_PDEV_TX_RING 0
  53. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
  54. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
  55. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
  56. #else
  57. #define WLAN_CFG_TX_RING_SIZE 512
  58. #define WLAN_CFG_PER_PDEV_TX_RING 1
  59. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
  60. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
  61. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
  62. #endif
  63. #define WLAN_CFG_TX_COMP_RING_SIZE 1024
  64. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  65. #define WLAN_CFG_NUM_TX_DESC 1024
  66. #define WLAN_CFG_NUM_TX_EXT_DESC 1024
  67. /* Interrupt Mitigation - Batch threshold in terms of number of frames */
  68. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
  69. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
  70. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
  71. /* Interrupt Mitigation - Timer threshold in us */
  72. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
  73. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
  74. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
  75. #endif
  76. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
  77. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 256
  78. #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
  79. #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
  80. #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
  81. #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
  82. #define WLAN_CFG_TX_RING_SIZE_MIN 512
  83. #define WLAN_CFG_TX_RING_SIZE_MAX 2048
  84. #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
  85. #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
  86. #define WLAN_CFG_NUM_TX_DESC_MIN 1024
  87. #define WLAN_CFG_NUM_TX_DESC_MAX 32768
  88. #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 1024
  89. #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
  90. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
  91. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
  92. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 1
  93. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
  94. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
  95. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
  96. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
  97. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
  98. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
  99. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
  100. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
  101. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 100
  102. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
  103. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
  104. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
  105. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
  106. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
  107. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 500
  108. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
  109. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
  110. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
  111. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
  112. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
  113. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  114. /* Per vdev pools */
  115. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  116. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  117. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  118. #ifdef TX_PER_PDEV_DESC_POOL
  119. #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
  120. #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
  121. #else /* TX_PER_PDEV_DESC_POOL */
  122. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  123. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  124. #endif /* TX_PER_PDEV_DESC_POOL */
  125. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  126. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
  127. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
  128. #define WLAN_CFG_HTT_PKT_TYPE 2
  129. #define WLAN_CFG_HTT_PKT_TYPE_MIN 2
  130. #define WLAN_CFG_HTT_PKT_TYPE_MAX 2
  131. #define WLAN_CFG_MAX_PEER_ID 64
  132. #define WLAN_CFG_MAX_PEER_ID_MIN 64
  133. #define WLAN_CFG_MAX_PEER_ID_MAX 64
  134. #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
  135. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
  136. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
  137. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  138. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
  139. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3
  140. #define WLAN_CFG_NUM_REO_DEST_RING 4
  141. #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
  142. #define WLAN_CFG_NUM_REO_DEST_RING_MAX 4
  143. #define WLAN_CFG_WBM_RELEASE_RING_SIZE 64
  144. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
  145. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 64
  146. #define WLAN_CFG_TCL_CMD_RING_SIZE 32
  147. #define WLAN_CFG_TCL_CMD_RING_SIZE_MIN 32
  148. #define WLAN_CFG_TCL_CMD_RING_SIZE_MAX 32
  149. #define WLAN_CFG_TCL_STATUS_RING_SIZE 32
  150. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
  151. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
  152. #if defined(QCA_WIFI_QCA6290)
  153. #define WLAN_CFG_REO_DST_RING_SIZE 1024
  154. #else
  155. #define WLAN_CFG_REO_DST_RING_SIZE 2048
  156. #endif
  157. #define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024
  158. #define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048
  159. #define WLAN_CFG_REO_REINJECT_RING_SIZE 32
  160. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
  161. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 32
  162. #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
  163. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
  164. #if defined(QCA_WIFI_QCA6390)
  165. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
  166. #else
  167. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192
  168. #endif
  169. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 128
  170. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
  171. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 128
  172. #define WLAN_CFG_REO_CMD_RING_SIZE 128
  173. #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
  174. #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
  175. #define WLAN_CFG_REO_STATUS_RING_SIZE 256
  176. #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
  177. #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
  178. #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
  179. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
  180. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024
  181. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
  182. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
  183. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
  184. #define WLAN_CFG_TX_DESC_LIMIT_0 0
  185. #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
  186. #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
  187. #define WLAN_CFG_TX_DESC_LIMIT_1 0
  188. #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
  189. #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
  190. #define WLAN_CFG_TX_DESC_LIMIT_2 0
  191. #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
  192. #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
  193. #define WLAN_CFG_TX_DEVICE_LIMIT 65536
  194. #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384
  195. #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536
  196. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
  197. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
  198. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
  199. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
  200. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
  201. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
  202. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
  203. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
  204. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
  205. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
  206. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
  207. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
  208. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
  209. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
  210. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
  211. /* DP INI Declerations */
  212. #define CFG_DP_HTT_PACKET_TYPE \
  213. CFG_INI_UINT("dp_htt_packet_type", \
  214. WLAN_CFG_HTT_PKT_TYPE_MIN, \
  215. WLAN_CFG_HTT_PKT_TYPE_MAX, \
  216. WLAN_CFG_HTT_PKT_TYPE, \
  217. CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
  218. #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
  219. CFG_INI_UINT("dp_int_batch_threshold_other", \
  220. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
  221. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
  222. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
  223. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
  224. #define CFG_DP_INT_BATCH_THRESHOLD_RX \
  225. CFG_INI_UINT("dp_int_batch_threshold_rx", \
  226. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
  227. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
  228. WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
  229. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
  230. #define CFG_DP_INT_BATCH_THRESHOLD_TX \
  231. CFG_INI_UINT("dp_int_batch_threshold_tx", \
  232. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
  233. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
  234. WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
  235. CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
  236. #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
  237. CFG_INI_UINT("dp_int_timer_threshold_other", \
  238. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
  239. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
  240. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
  241. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
  242. #define CFG_DP_INT_TIMER_THRESHOLD_RX \
  243. CFG_INI_UINT("dp_int_timer_threshold_rx", \
  244. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
  245. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
  246. WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
  247. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
  248. #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
  249. CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
  250. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
  251. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
  252. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
  253. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
  254. #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
  255. CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
  256. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
  257. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
  258. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
  259. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
  260. #define CFG_DP_INT_TIMER_THRESHOLD_TX \
  261. CFG_INI_UINT("dp_int_timer_threshold_tx", \
  262. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
  263. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
  264. WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
  265. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
  266. #define CFG_DP_MAX_ALLOC_SIZE \
  267. CFG_INI_UINT("dp_max_alloc_size", \
  268. WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
  269. WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
  270. WLAN_CFG_MAX_ALLOC_SIZE, \
  271. CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
  272. #define CFG_DP_MAX_CLIENTS \
  273. CFG_INI_UINT("dp_max_clients", \
  274. WLAN_CFG_MAX_CLIENTS_MIN, \
  275. WLAN_CFG_MAX_CLIENTS_MAX, \
  276. WLAN_CFG_MAX_CLIENTS, \
  277. CFG_VALUE_OR_DEFAULT, "DP Max Clients")
  278. #define CFG_DP_MAX_PEER_ID \
  279. CFG_INI_UINT("dp_max_peer_id", \
  280. WLAN_CFG_MAX_PEER_ID_MIN, \
  281. WLAN_CFG_MAX_PEER_ID_MAX, \
  282. WLAN_CFG_MAX_PEER_ID, \
  283. CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
  284. #define CFG_DP_REO_DEST_RINGS \
  285. CFG_INI_UINT("dp_reo_dest_rings", \
  286. WLAN_CFG_NUM_REO_DEST_RING_MIN, \
  287. WLAN_CFG_NUM_REO_DEST_RING_MAX, \
  288. WLAN_CFG_NUM_REO_DEST_RING, \
  289. CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
  290. #define CFG_DP_TCL_DATA_RINGS \
  291. CFG_INI_UINT("dp_tcl_data_rings", \
  292. WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
  293. WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
  294. WLAN_CFG_NUM_TCL_DATA_RINGS, \
  295. CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
  296. #define CFG_DP_TX_DESC \
  297. CFG_INI_UINT("dp_tx_desc", \
  298. WLAN_CFG_NUM_TX_DESC_MIN, \
  299. WLAN_CFG_NUM_TX_DESC_MAX, \
  300. WLAN_CFG_NUM_TX_DESC, \
  301. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
  302. #define CFG_DP_TX_EXT_DESC \
  303. CFG_INI_UINT("dp_tx_ext_desc", \
  304. WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
  305. WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
  306. WLAN_CFG_NUM_TX_EXT_DESC, \
  307. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
  308. #define CFG_DP_TX_EXT_DESC_POOLS \
  309. CFG_INI_UINT("dp_tx_ext_desc_pool", \
  310. WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
  311. WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
  312. WLAN_CFG_NUM_TXEXT_DESC_POOL, \
  313. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
  314. #define CFG_DP_PDEV_RX_RING \
  315. CFG_INI_UINT("dp_pdev_rx_ring", \
  316. WLAN_CFG_PER_PDEV_RX_RING_MIN, \
  317. WLAN_CFG_PER_PDEV_RX_RING_MAX, \
  318. WLAN_CFG_PER_PDEV_RX_RING, \
  319. CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
  320. #define CFG_DP_PDEV_TX_RING \
  321. CFG_INI_UINT("dp_pdev_tx_ring", \
  322. WLAN_CFG_PER_PDEV_TX_RING_MIN, \
  323. WLAN_CFG_PER_PDEV_TX_RING_MAX, \
  324. WLAN_CFG_PER_PDEV_TX_RING, \
  325. CFG_VALUE_OR_DEFAULT, \
  326. "DP PDEV Tx Ring")
  327. #define CFG_DP_RX_DEFRAG_TIMEOUT \
  328. CFG_INI_UINT("dp_rx_defrag_timeout", \
  329. WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
  330. WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
  331. WLAN_CFG_RX_DEFRAG_TIMEOUT, \
  332. CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
  333. #define CFG_DP_TX_COMPL_RING_SIZE \
  334. CFG_INI_UINT("dp_tx_compl_ring_size", \
  335. WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
  336. WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
  337. WLAN_CFG_TX_COMP_RING_SIZE, \
  338. CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
  339. #define CFG_DP_TX_RING_SIZE \
  340. CFG_INI_UINT("dp_tx_ring_size", \
  341. WLAN_CFG_TX_RING_SIZE_MIN,\
  342. WLAN_CFG_TX_RING_SIZE_MAX,\
  343. WLAN_CFG_TX_RING_SIZE,\
  344. CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
  345. #define CFG_DP_NSS_COMP_RING_SIZE \
  346. CFG_INI_UINT("dp_nss_comp_ring_size", \
  347. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
  348. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
  349. WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
  350. CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
  351. #define CFG_DP_PDEV_LMAC_RING \
  352. CFG_INI_UINT("dp_pdev_lmac_ring", \
  353. WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
  354. WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
  355. WLAN_CFG_PER_PDEV_LMAC_RING, \
  356. CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
  357. #define CFG_DP_BASE_HW_MAC_ID \
  358. CFG_INI_UINT("dp_base_hw_macid", \
  359. 0, 1, 1, \
  360. CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
  361. #define CFG_DP_RX_HASH \
  362. CFG_INI_BOOL("dp_rx_hash", true, \
  363. "DP Rx Hash")
  364. #define CFG_DP_TSO \
  365. CFG_INI_BOOL("TSOEnable", false, \
  366. "DP TSO Enabled")
  367. #define CFG_DP_LRO \
  368. CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
  369. "DP LRO Enable")
  370. #define CFG_DP_SG \
  371. CFG_INI_BOOL("dp_sg_support", false, \
  372. "DP SG Enable")
  373. #define CFG_DP_GRO \
  374. CFG_INI_BOOL("GROEnable", false, \
  375. "DP GRO Enable")
  376. #define CFG_DP_OL_TX_CSUM \
  377. CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
  378. "DP tx csum Enable")
  379. #define CFG_DP_OL_RX_CSUM \
  380. CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
  381. "DP rx csum Enable")
  382. #define CFG_DP_RAWMODE \
  383. CFG_INI_BOOL("dp_rawmode_support", false, \
  384. "DP rawmode Enable")
  385. #define CFG_DP_PEER_FLOW_CTRL \
  386. CFG_INI_BOOL("dp_peer_flow_control_support", false, \
  387. "DP peer flow ctrl Enable")
  388. #define CFG_DP_NAPI \
  389. CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \
  390. "DP Napi Enabled")
  391. #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
  392. CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
  393. "DP TCP UDP Checksum Offload")
  394. #define CFG_DP_DEFRAG_TIMEOUT_CHECK \
  395. CFG_INI_BOOL("dp_defrag_timeout_check", true, \
  396. "DP Defrag Timeout Check")
  397. #define CFG_DP_WBM_RELEASE_RING \
  398. CFG_INI_UINT("dp_wbm_release_ring", \
  399. WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
  400. WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
  401. WLAN_CFG_WBM_RELEASE_RING_SIZE, \
  402. CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
  403. #define CFG_DP_TCL_CMD_RING \
  404. CFG_INI_UINT("dp_tcl_cmd_ring", \
  405. WLAN_CFG_TCL_CMD_RING_SIZE_MIN, \
  406. WLAN_CFG_TCL_CMD_RING_SIZE_MAX, \
  407. WLAN_CFG_TCL_CMD_RING_SIZE, \
  408. CFG_VALUE_OR_DEFAULT, "DP TCL command ring")
  409. #define CFG_DP_TCL_STATUS_RING \
  410. CFG_INI_UINT("dp_tcl_status_ring",\
  411. WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
  412. WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
  413. WLAN_CFG_TCL_STATUS_RING_SIZE, \
  414. CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
  415. #define CFG_DP_REO_REINJECT_RING \
  416. CFG_INI_UINT("dp_reo_reinject_ring", \
  417. WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
  418. WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
  419. WLAN_CFG_REO_REINJECT_RING_SIZE, \
  420. CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
  421. #define CFG_DP_RX_RELEASE_RING \
  422. CFG_INI_UINT("dp_rx_release_ring", \
  423. WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
  424. WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
  425. WLAN_CFG_RX_RELEASE_RING_SIZE, \
  426. CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
  427. #define CFG_DP_REO_EXCEPTION_RING \
  428. CFG_INI_UINT("dp_reo_exception_ring", \
  429. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
  430. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
  431. WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
  432. CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
  433. #define CFG_DP_REO_CMD_RING \
  434. CFG_INI_UINT("dp_reo_cmd_ring", \
  435. WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
  436. WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
  437. WLAN_CFG_REO_CMD_RING_SIZE, \
  438. CFG_VALUE_OR_DEFAULT, "DP REO command ring")
  439. #define CFG_DP_REO_STATUS_RING \
  440. CFG_INI_UINT("dp_reo_status_ring", \
  441. WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
  442. WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
  443. WLAN_CFG_REO_STATUS_RING_SIZE, \
  444. CFG_VALUE_OR_DEFAULT, "DP REO status ring")
  445. #define CFG_DP_RXDMA_BUF_RING \
  446. CFG_INI_UINT("dp_rxdma_buf_ring", \
  447. WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
  448. WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
  449. WLAN_CFG_RXDMA_BUF_RING_SIZE, \
  450. CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
  451. #define CFG_DP_RXDMA_REFILL_RING \
  452. CFG_INI_UINT("dp_rxdma_refill_ring", \
  453. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
  454. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
  455. WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
  456. CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
  457. #define CFG_DP_TX_DESC_LIMIT_0 \
  458. CFG_INI_UINT("dp_tx_desc_limit_0", \
  459. WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
  460. WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
  461. WLAN_CFG_TX_DESC_LIMIT_0, \
  462. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
  463. #define CFG_DP_TX_DESC_LIMIT_1 \
  464. CFG_INI_UINT("dp_tx_desc_limit_1", \
  465. WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
  466. WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
  467. WLAN_CFG_TX_DESC_LIMIT_1, \
  468. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
  469. #define CFG_DP_TX_DESC_LIMIT_2 \
  470. CFG_INI_UINT("dp_tx_desc_limit_2", \
  471. WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
  472. WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
  473. WLAN_CFG_TX_DESC_LIMIT_2, \
  474. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
  475. #define CFG_DP_TX_DEVICE_LIMIT \
  476. CFG_INI_UINT("dp_tx_device_limit", \
  477. WLAN_CFG_TX_DEVICE_LIMIT_MIN, \
  478. WLAN_CFG_TX_DEVICE_LIMIT_MAX, \
  479. WLAN_CFG_TX_DEVICE_LIMIT, \
  480. CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
  481. #define CFG_DP_RXDMA_MONITOR_BUF_RING \
  482. CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
  483. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
  484. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
  485. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
  486. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
  487. #define CFG_DP_RXDMA_MONITOR_DST_RING \
  488. CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
  489. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
  490. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
  491. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
  492. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  493. #define CFG_DP_RXDMA_MONITOR_STATUS_RING \
  494. CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
  495. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
  496. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
  497. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
  498. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
  499. #define CFG_DP_RXDMA_MONITOR_DESC_RING \
  500. CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
  501. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
  502. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
  503. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
  504. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  505. #define CFG_DP_RXDMA_ERR_DST_RING \
  506. CFG_INI_UINT("dp_rxdma_err_dst_ring", \
  507. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
  508. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
  509. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
  510. CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
  511. #define CFG_DP_PER_PKT_LOGGING \
  512. CFG_INI_UINT("enable_verbose_debug", \
  513. 0, 0xffff, 0, \
  514. CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
  515. #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
  516. CFG_INI_UINT("TxFlowStartQueueOffset", \
  517. 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
  518. CFG_VALUE_OR_DEFAULT, "Start queue offset")
  519. #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
  520. CFG_INI_UINT("TxFlowStopQueueThreshold", \
  521. 0, 50, 15, \
  522. CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
  523. #define CFG_DP_IPA_UC_TX_BUF_SIZE \
  524. CFG_INI_UINT("IpaUcTxBufSize", \
  525. 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
  526. CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
  527. #define CFG_DP_IPA_UC_TX_PARTITION_BASE \
  528. CFG_INI_UINT("IpaUcTxPartitionBase", \
  529. 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
  530. CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
  531. #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
  532. CFG_INI_UINT("IpaUcRxIndRingCount", \
  533. 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
  534. CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
  535. #define CFG_DP_REORDER_OFFLOAD_SUPPORT \
  536. CFG_INI_UINT("gReorderOffloadSupported", \
  537. 0, 1, 1, \
  538. CFG_VALUE_OR_DEFAULT, "Packet reordering offload to firmware")
  539. #define CFG_DP_AP_STA_SECURITY_SEPERATION \
  540. CFG_INI_BOOL("gDisableIntraBssFwd", \
  541. false, "Disable intrs BSS Rx packets")
  542. #define CFG_DP_ENABLE_DATA_STALL_DETECTION \
  543. CFG_INI_BOOL("gEnableDataStallDetection", \
  544. true, "Enable/Disable Data stall detection")
  545. #define CFG_DP \
  546. CFG(CFG_DP_HTT_PACKET_TYPE) \
  547. CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
  548. CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
  549. CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
  550. CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
  551. CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
  552. CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
  553. CFG(CFG_DP_MAX_ALLOC_SIZE) \
  554. CFG(CFG_DP_MAX_CLIENTS) \
  555. CFG(CFG_DP_MAX_PEER_ID) \
  556. CFG(CFG_DP_REO_DEST_RINGS) \
  557. CFG(CFG_DP_TCL_DATA_RINGS) \
  558. CFG(CFG_DP_TX_DESC) \
  559. CFG(CFG_DP_TX_EXT_DESC) \
  560. CFG(CFG_DP_TX_EXT_DESC_POOLS) \
  561. CFG(CFG_DP_PDEV_RX_RING) \
  562. CFG(CFG_DP_PDEV_TX_RING) \
  563. CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
  564. CFG(CFG_DP_TX_COMPL_RING_SIZE) \
  565. CFG(CFG_DP_TX_RING_SIZE) \
  566. CFG(CFG_DP_NSS_COMP_RING_SIZE) \
  567. CFG(CFG_DP_PDEV_LMAC_RING) \
  568. CFG(CFG_DP_BASE_HW_MAC_ID) \
  569. CFG(CFG_DP_RX_HASH) \
  570. CFG(CFG_DP_TSO) \
  571. CFG(CFG_DP_LRO) \
  572. CFG(CFG_DP_SG) \
  573. CFG(CFG_DP_GRO) \
  574. CFG(CFG_DP_OL_TX_CSUM) \
  575. CFG(CFG_DP_OL_RX_CSUM) \
  576. CFG(CFG_DP_RAWMODE) \
  577. CFG(CFG_DP_PEER_FLOW_CTRL) \
  578. CFG(CFG_DP_NAPI) \
  579. CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
  580. CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
  581. CFG(CFG_DP_WBM_RELEASE_RING) \
  582. CFG(CFG_DP_TCL_CMD_RING) \
  583. CFG(CFG_DP_TCL_STATUS_RING) \
  584. CFG(CFG_DP_REO_REINJECT_RING) \
  585. CFG(CFG_DP_RX_RELEASE_RING) \
  586. CFG(CFG_DP_REO_EXCEPTION_RING) \
  587. CFG(CFG_DP_REO_CMD_RING) \
  588. CFG(CFG_DP_REO_STATUS_RING) \
  589. CFG(CFG_DP_RXDMA_BUF_RING) \
  590. CFG(CFG_DP_RXDMA_REFILL_RING) \
  591. CFG(CFG_DP_TX_DESC_LIMIT_0) \
  592. CFG(CFG_DP_TX_DESC_LIMIT_1) \
  593. CFG(CFG_DP_TX_DESC_LIMIT_2) \
  594. CFG(CFG_DP_TX_DEVICE_LIMIT) \
  595. CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
  596. CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
  597. CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
  598. CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
  599. CFG(CFG_DP_RXDMA_ERR_DST_RING) \
  600. CFG(CFG_DP_PER_PKT_LOGGING) \
  601. CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
  602. CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
  603. CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
  604. CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
  605. CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
  606. CFG(CFG_DP_REORDER_OFFLOAD_SUPPORT) \
  607. CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
  608. CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION)
  609. #endif /* _CFG_DP_H_ */