main.c 121 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. if (!priv)
  133. return count;
  134. icnss_pr_dbg("Received shutdown indication");
  135. atomic_set(&priv->is_shutdown, true);
  136. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  137. icnss_wpss_unload(priv);
  138. return count;
  139. }
  140. static struct kobj_attribute icnss_sysfs_attribute =
  141. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  142. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  143. {
  144. if (atomic_inc_return(&priv->pm_count) != 1)
  145. return;
  146. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  147. atomic_read(&priv->pm_count));
  148. pm_stay_awake(&priv->pdev->dev);
  149. priv->stats.pm_stay_awake++;
  150. }
  151. static void icnss_pm_relax(struct icnss_priv *priv)
  152. {
  153. int r = atomic_dec_return(&priv->pm_count);
  154. WARN_ON(r < 0);
  155. if (r != 0)
  156. return;
  157. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  158. atomic_read(&priv->pm_count));
  159. pm_relax(&priv->pdev->dev);
  160. priv->stats.pm_relax++;
  161. }
  162. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  163. {
  164. switch (type) {
  165. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  166. return "SERVER_ARRIVE";
  167. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  168. return "SERVER_EXIT";
  169. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  170. return "FW_READY";
  171. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  172. return "REGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  174. return "UNREGISTER_DRIVER";
  175. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  176. return "PD_SERVICE_DOWN";
  177. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  178. return "FW_EARLY_CRASH_IND";
  179. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  180. return "IDLE_SHUTDOWN";
  181. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  182. return "IDLE_RESTART";
  183. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  184. return "FW_INIT_DONE";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  186. return "QDSS_TRACE_REQ_MEM";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  188. return "QDSS_TRACE_SAVE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  190. return "QDSS_TRACE_FREE";
  191. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  192. return "M3_DUMP_UPLOAD";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  194. return "QDSS_TRACE_REQ_DATA";
  195. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  196. return "SUBSYS_RESTART_LEVEL";
  197. case ICNSS_DRIVER_EVENT_MAX:
  198. return "EVENT_MAX";
  199. }
  200. return "UNKNOWN";
  201. };
  202. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  203. {
  204. switch (type) {
  205. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  206. return "SOC_WAKE_REQUEST";
  207. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  208. return "SOC_WAKE_RELEASE";
  209. case ICNSS_SOC_WAKE_EVENT_MAX:
  210. return "SOC_EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. int icnss_driver_event_post(struct icnss_priv *priv,
  215. enum icnss_driver_event_type type,
  216. u32 flags, void *data)
  217. {
  218. struct icnss_driver_event *event;
  219. unsigned long irq_flags;
  220. int gfp = GFP_KERNEL;
  221. int ret = 0;
  222. if (!priv)
  223. return -ENODEV;
  224. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  225. icnss_driver_event_to_str(type), type, current->comm,
  226. flags, priv->state);
  227. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  228. icnss_pr_err("Invalid Event type: %d, can't post", type);
  229. return -EINVAL;
  230. }
  231. if (in_interrupt() || irqs_disabled())
  232. gfp = GFP_ATOMIC;
  233. event = kzalloc(sizeof(*event), gfp);
  234. if (event == NULL)
  235. return -ENOMEM;
  236. icnss_pm_stay_awake(priv);
  237. event->type = type;
  238. event->data = data;
  239. init_completion(&event->complete);
  240. event->ret = ICNSS_EVENT_PENDING;
  241. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  242. spin_lock_irqsave(&priv->event_lock, irq_flags);
  243. list_add_tail(&event->list, &priv->event_list);
  244. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  245. priv->stats.events[type].posted++;
  246. queue_work(priv->event_wq, &priv->event_work);
  247. if (!(flags & ICNSS_EVENT_SYNC))
  248. goto out;
  249. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  250. wait_for_completion(&event->complete);
  251. else
  252. ret = wait_for_completion_interruptible(&event->complete);
  253. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  254. icnss_driver_event_to_str(type), type, priv->state, ret,
  255. event->ret);
  256. spin_lock_irqsave(&priv->event_lock, irq_flags);
  257. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  258. event->sync = false;
  259. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  260. ret = -EINTR;
  261. goto out;
  262. }
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = event->ret;
  265. kfree(event);
  266. out:
  267. icnss_pm_relax(priv);
  268. return ret;
  269. }
  270. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  271. enum icnss_soc_wake_event_type type,
  272. u32 flags, void *data)
  273. {
  274. struct icnss_soc_wake_event *event;
  275. unsigned long irq_flags;
  276. int gfp = GFP_KERNEL;
  277. int ret = 0;
  278. if (!priv)
  279. return -ENODEV;
  280. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  281. icnss_soc_wake_event_to_str(type),
  282. type, current->comm, flags, priv->state);
  283. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  284. icnss_pr_err("Invalid Event type: %d, can't post", type);
  285. return -EINVAL;
  286. }
  287. if (in_interrupt() || irqs_disabled())
  288. gfp = GFP_ATOMIC;
  289. event = kzalloc(sizeof(*event), gfp);
  290. if (!event)
  291. return -ENOMEM;
  292. icnss_pm_stay_awake(priv);
  293. event->type = type;
  294. event->data = data;
  295. init_completion(&event->complete);
  296. event->ret = ICNSS_EVENT_PENDING;
  297. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  298. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  299. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  300. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  301. priv->stats.soc_wake_events[type].posted++;
  302. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  303. if (!(flags & ICNSS_EVENT_SYNC))
  304. goto out;
  305. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  306. wait_for_completion(&event->complete);
  307. else
  308. ret = wait_for_completion_interruptible(&event->complete);
  309. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  310. icnss_soc_wake_event_to_str(type),
  311. type, priv->state, ret, event->ret);
  312. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  313. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  314. event->sync = false;
  315. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  316. ret = -EINTR;
  317. goto out;
  318. }
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = event->ret;
  321. kfree(event);
  322. out:
  323. icnss_pm_relax(priv);
  324. return ret;
  325. }
  326. bool icnss_is_fw_ready(void)
  327. {
  328. if (!penv)
  329. return false;
  330. else
  331. return test_bit(ICNSS_FW_READY, &penv->state);
  332. }
  333. EXPORT_SYMBOL(icnss_is_fw_ready);
  334. void icnss_block_shutdown(bool status)
  335. {
  336. if (!penv)
  337. return;
  338. if (status) {
  339. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  340. reinit_completion(&penv->unblock_shutdown);
  341. } else {
  342. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  343. complete(&penv->unblock_shutdown);
  344. }
  345. }
  346. EXPORT_SYMBOL(icnss_block_shutdown);
  347. bool icnss_is_fw_down(void)
  348. {
  349. struct icnss_priv *priv = icnss_get_plat_priv();
  350. if (!priv)
  351. return false;
  352. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  353. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  354. test_bit(ICNSS_REJUVENATE, &priv->state);
  355. }
  356. EXPORT_SYMBOL(icnss_is_fw_down);
  357. unsigned long icnss_get_device_config(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return 0;
  362. return priv->device_config;
  363. }
  364. EXPORT_SYMBOL(icnss_get_device_config);
  365. bool icnss_is_rejuvenate(void)
  366. {
  367. if (!penv)
  368. return false;
  369. else
  370. return test_bit(ICNSS_REJUVENATE, &penv->state);
  371. }
  372. EXPORT_SYMBOL(icnss_is_rejuvenate);
  373. bool icnss_is_pdr(void)
  374. {
  375. if (!penv)
  376. return false;
  377. else
  378. return test_bit(ICNSS_PDR, &penv->state);
  379. }
  380. EXPORT_SYMBOL(icnss_is_pdr);
  381. static int icnss_send_smp2p(struct icnss_priv *priv,
  382. enum icnss_smp2p_msg_id msg_id,
  383. enum smp2p_out_entry smp2p_entry)
  384. {
  385. unsigned int value = 0;
  386. int ret;
  387. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  388. return -EINVAL;
  389. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  390. if (msg_id == ICNSS_RESET_MSG) {
  391. priv->smp2p_info[smp2p_entry].seq = 0;
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. 0);
  396. if (ret)
  397. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  398. ret, icnss_smp2p_str[smp2p_entry]);
  399. return ret;
  400. }
  401. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  402. return -ENODEV;
  403. value |= priv->smp2p_info[smp2p_entry].seq++;
  404. value <<= ICNSS_SMEM_SEQ_NO_POS;
  405. value |= msg_id;
  406. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  407. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  408. reinit_completion(&penv->smp2p_soc_wake_wait);
  409. ret = qcom_smem_state_update_bits(
  410. priv->smp2p_info[smp2p_entry].smem_state,
  411. ICNSS_SMEM_VALUE_MASK,
  412. value);
  413. if (ret) {
  414. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  415. icnss_smp2p_str[smp2p_entry]);
  416. } else {
  417. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  418. msg_id == ICNSS_SOC_WAKE_REL) {
  419. if (!wait_for_completion_timeout(
  420. &priv->smp2p_soc_wake_wait,
  421. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  422. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  423. icnss_smp2p_str[smp2p_entry]);
  424. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  425. ICNSS_ASSERT(0);
  426. }
  427. }
  428. }
  429. return ret;
  430. }
  431. bool icnss_is_low_power(void)
  432. {
  433. if (!penv)
  434. return false;
  435. else
  436. return test_bit(ICNSS_LOW_POWER, &penv->state);
  437. }
  438. EXPORT_SYMBOL(icnss_is_low_power);
  439. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  440. {
  441. struct icnss_priv *priv = ctx;
  442. if (priv)
  443. priv->force_err_fatal = true;
  444. icnss_pr_err("Received force error fatal request from FW\n");
  445. return IRQ_HANDLED;
  446. }
  447. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  448. {
  449. struct icnss_priv *priv = ctx;
  450. struct icnss_uevent_fw_down_data fw_down_data = {0};
  451. icnss_pr_err("Received early crash indication from FW\n");
  452. if (priv) {
  453. if (priv->wpss_self_recovery_enabled)
  454. mod_timer(&priv->wpss_ssr_timer,
  455. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  456. set_bit(ICNSS_FW_DOWN, &priv->state);
  457. icnss_ignore_fw_timeout(true);
  458. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  459. clear_bit(ICNSS_FW_READY, &priv->state);
  460. fw_down_data.crashed = true;
  461. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  462. &fw_down_data);
  463. }
  464. }
  465. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  466. 0, NULL);
  467. return IRQ_HANDLED;
  468. }
  469. static void register_fw_error_notifications(struct device *dev)
  470. {
  471. struct icnss_priv *priv = dev_get_drvdata(dev);
  472. struct device_node *dev_node;
  473. int irq = 0, ret = 0;
  474. if (!priv)
  475. return;
  476. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  477. if (!dev_node) {
  478. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  479. return;
  480. }
  481. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  482. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  483. ret = irq = of_irq_get_byname(dev_node,
  484. "qcom,smp2p-force-fatal-error");
  485. if (ret < 0) {
  486. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  487. irq);
  488. return;
  489. }
  490. }
  491. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  492. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  493. "wlanfw-err", priv);
  494. if (ret < 0) {
  495. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  496. irq, ret);
  497. return;
  498. }
  499. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  500. priv->fw_error_fatal_irq = irq;
  501. }
  502. static void register_early_crash_notifications(struct device *dev)
  503. {
  504. struct icnss_priv *priv = dev_get_drvdata(dev);
  505. struct device_node *dev_node;
  506. int irq = 0, ret = 0;
  507. if (!priv)
  508. return;
  509. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  510. if (!dev_node) {
  511. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  512. return;
  513. }
  514. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  515. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  516. ret = irq = of_irq_get_byname(dev_node,
  517. "qcom,smp2p-early-crash-ind");
  518. if (ret < 0) {
  519. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  520. irq);
  521. return;
  522. }
  523. }
  524. ret = devm_request_threaded_irq(dev, irq, NULL,
  525. fw_crash_indication_handler,
  526. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  527. "wlanfw-early-crash-ind", priv);
  528. if (ret < 0) {
  529. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  530. irq, ret);
  531. return;
  532. }
  533. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  534. priv->fw_early_crash_irq = irq;
  535. }
  536. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  537. {
  538. struct thermal_zone_device *thermal_dev;
  539. const char *tsens;
  540. int ret;
  541. ret = of_property_read_string(priv->pdev->dev.of_node,
  542. "tsens",
  543. &tsens);
  544. if (ret)
  545. return ret;
  546. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  547. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  548. if (IS_ERR(thermal_dev)) {
  549. icnss_pr_err("Fail to get thermal zone. ret: %d",
  550. PTR_ERR(thermal_dev));
  551. return PTR_ERR(thermal_dev);
  552. }
  553. ret = thermal_zone_get_temp(thermal_dev, temp);
  554. if (ret)
  555. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  556. return ret;
  557. }
  558. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  559. {
  560. struct icnss_priv *priv = ctx;
  561. if (priv)
  562. complete(&priv->smp2p_soc_wake_wait);
  563. return IRQ_HANDLED;
  564. }
  565. static void register_soc_wake_notif(struct device *dev)
  566. {
  567. struct icnss_priv *priv = dev_get_drvdata(dev);
  568. struct device_node *dev_node;
  569. int irq = 0, ret = 0;
  570. if (!priv)
  571. return;
  572. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  573. if (!dev_node) {
  574. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  575. return;
  576. }
  577. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  578. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  579. ret = irq = of_irq_get_byname(dev_node,
  580. "qcom,smp2p-soc-wake-ack");
  581. if (ret < 0) {
  582. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  583. irq);
  584. return;
  585. }
  586. }
  587. ret = devm_request_threaded_irq(dev, irq, NULL,
  588. fw_soc_wake_ack_handler,
  589. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  590. IRQF_TRIGGER_FALLING,
  591. "wlanfw-soc-wake-ack", priv);
  592. if (ret < 0) {
  593. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  594. irq, ret);
  595. return;
  596. }
  597. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  598. priv->fw_soc_wake_ack_irq = irq;
  599. }
  600. int icnss_call_driver_uevent(struct icnss_priv *priv,
  601. enum icnss_uevent uevent, void *data)
  602. {
  603. struct icnss_uevent_data uevent_data;
  604. if (!priv->ops || !priv->ops->uevent)
  605. return 0;
  606. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  607. priv->state, uevent);
  608. uevent_data.uevent = uevent;
  609. uevent_data.data = data;
  610. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  611. }
  612. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  613. {
  614. int i;
  615. int ret = 0;
  616. ret = icnss_qmi_get_dms_mac(priv);
  617. if (ret == 0 && priv->dms.mac_valid)
  618. goto qmi_send;
  619. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  620. * Thus assert on failure to get MAC from DMS even after retries
  621. */
  622. if (priv->use_nv_mac) {
  623. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  624. if (priv->dms.mac_valid)
  625. break;
  626. ret = icnss_qmi_get_dms_mac(priv);
  627. if (ret != -EAGAIN)
  628. break;
  629. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  630. }
  631. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  632. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  633. ICNSS_ASSERT(0);
  634. return -EINVAL;
  635. }
  636. }
  637. qmi_send:
  638. if (priv->dms.mac_valid)
  639. ret =
  640. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  641. ARRAY_SIZE(priv->dms.mac));
  642. return ret;
  643. }
  644. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  645. enum smp2p_out_entry smp2p_entry)
  646. {
  647. int retry = 0;
  648. int error;
  649. if (priv->smp2p_info[smp2p_entry].smem_state)
  650. return;
  651. retry:
  652. priv->smp2p_info[smp2p_entry].smem_state =
  653. qcom_smem_state_get(&priv->pdev->dev,
  654. icnss_smp2p_str[smp2p_entry],
  655. &priv->smp2p_info[smp2p_entry].smem_bit);
  656. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  657. if (retry++ < SMP2P_GET_MAX_RETRY) {
  658. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  659. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  660. error, icnss_smp2p_str[smp2p_entry]);
  661. msleep(SMP2P_GET_RETRY_DELAY_MS);
  662. goto retry;
  663. }
  664. ICNSS_ASSERT(0);
  665. return;
  666. }
  667. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  668. }
  669. static inline
  670. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  671. {
  672. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  673. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  674. } else {
  675. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  676. }
  677. }
  678. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  679. {
  680. switch (val) {
  681. case WLAN_RF_SLATE:
  682. return WLFW_WLAN_RF_SLATE_V01;
  683. case WLAN_RF_APACHE:
  684. return WLFW_WLAN_RF_APACHE_V01;
  685. default:
  686. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  687. }
  688. }
  689. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  690. void *data)
  691. {
  692. int ret = 0;
  693. int temp = 0;
  694. bool ignore_assert = false;
  695. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  696. if (!priv)
  697. return -ENODEV;
  698. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  699. clear_bit(ICNSS_FW_DOWN, &priv->state);
  700. clear_bit(ICNSS_FW_READY, &priv->state);
  701. icnss_ignore_fw_timeout(false);
  702. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  703. icnss_pr_err("QMI Server already in Connected State\n");
  704. ICNSS_ASSERT(0);
  705. }
  706. ret = icnss_connect_to_fw_server(priv, data);
  707. if (ret)
  708. goto fail;
  709. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  710. if (priv->is_slate_rfa) {
  711. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  712. reinit_completion(&priv->slate_boot_complete);
  713. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  714. priv->state);
  715. wait_for_completion(&priv->slate_boot_complete);
  716. }
  717. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  718. icnss_pr_info("sent wlan boot init command\n");
  719. }
  720. ret = wlfw_ind_register_send_sync_msg(priv);
  721. if (ret < 0) {
  722. if (ret == -EALREADY) {
  723. ret = 0;
  724. goto qmi_registered;
  725. }
  726. ignore_assert = true;
  727. goto fail;
  728. }
  729. if (priv->is_rf_subtype_valid) {
  730. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  731. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  732. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  733. if (ret < 0)
  734. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  735. ret);
  736. } else {
  737. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  738. priv->rf_subtype);
  739. }
  740. }
  741. if (priv->device_id == WCN6750_DEVICE_ID ||
  742. priv->device_id == WCN6450_DEVICE_ID) {
  743. if (!icnss_get_temperature(priv, &temp)) {
  744. icnss_pr_dbg("Temperature: %d\n", temp);
  745. if (temp < WLAN_EN_TEMP_THRESHOLD)
  746. icnss_set_wlan_en_delay(priv);
  747. }
  748. ret = wlfw_host_cap_send_sync(priv);
  749. if (ret < 0)
  750. goto fail;
  751. }
  752. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  753. if (!priv->msa_va) {
  754. icnss_pr_err("Invalid MSA address\n");
  755. ret = -EINVAL;
  756. goto fail;
  757. }
  758. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  759. if (ret < 0) {
  760. ignore_assert = true;
  761. goto fail;
  762. }
  763. ret = wlfw_msa_ready_send_sync_msg(priv);
  764. if (ret < 0) {
  765. ignore_assert = true;
  766. goto fail;
  767. }
  768. }
  769. ret = wlfw_cap_send_sync_msg(priv);
  770. if (ret < 0) {
  771. ignore_assert = true;
  772. goto fail;
  773. }
  774. ret = icnss_hw_power_on(priv);
  775. if (ret)
  776. goto fail;
  777. if (priv->device_id == WCN6750_DEVICE_ID ||
  778. priv->device_id == WCN6450_DEVICE_ID) {
  779. ret = wlfw_device_info_send_msg(priv);
  780. if (ret < 0) {
  781. ignore_assert = true;
  782. goto device_info_failure;
  783. }
  784. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  785. priv->mem_base_pa,
  786. priv->mem_base_size);
  787. if (!priv->mem_base_va) {
  788. icnss_pr_err("Ioremap failed for bar address\n");
  789. goto device_info_failure;
  790. }
  791. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  792. &priv->mem_base_pa,
  793. priv->mem_base_va);
  794. if (priv->mhi_state_info_pa)
  795. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  796. priv->mhi_state_info_pa,
  797. PAGE_SIZE);
  798. if (!priv->mhi_state_info_va)
  799. icnss_pr_err("Ioremap failed for MHI info address\n");
  800. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  801. &priv->mhi_state_info_pa,
  802. priv->mhi_state_info_va);
  803. }
  804. if (priv->bdf_download_support) {
  805. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  806. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  807. priv->ctrl_params.bdf_type);
  808. if (ret < 0)
  809. goto device_info_failure;
  810. }
  811. if (priv->device_id == WCN6750_DEVICE_ID ||
  812. priv->device_id == WCN6450_DEVICE_ID) {
  813. if (!priv->fw_soc_wake_ack_irq)
  814. register_soc_wake_notif(&priv->pdev->dev);
  815. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  816. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  817. }
  818. if (priv->wpss_supported)
  819. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  820. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  821. if (priv->bdf_download_support) {
  822. ret = wlfw_cal_report_req(priv);
  823. if (ret < 0)
  824. goto device_info_failure;
  825. }
  826. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  827. dynamic_feature_mask);
  828. }
  829. if (!priv->fw_error_fatal_irq)
  830. register_fw_error_notifications(&priv->pdev->dev);
  831. if (!priv->fw_early_crash_irq)
  832. register_early_crash_notifications(&priv->pdev->dev);
  833. if (priv->psf_supported)
  834. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  835. return ret;
  836. device_info_failure:
  837. icnss_hw_power_off(priv);
  838. fail:
  839. ICNSS_ASSERT(ignore_assert);
  840. qmi_registered:
  841. return ret;
  842. }
  843. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  844. {
  845. if (!priv)
  846. return -ENODEV;
  847. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  848. icnss_clear_server(priv);
  849. if (priv->psf_supported)
  850. priv->last_updated_voltage = 0;
  851. return 0;
  852. }
  853. static int icnss_call_driver_probe(struct icnss_priv *priv)
  854. {
  855. int ret = 0;
  856. int probe_cnt = 0;
  857. if (!priv->ops || !priv->ops->probe)
  858. return 0;
  859. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  860. return -EINVAL;
  861. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  862. icnss_hw_power_on(priv);
  863. icnss_block_shutdown(true);
  864. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  865. ret = priv->ops->probe(&priv->pdev->dev);
  866. probe_cnt++;
  867. if (ret != -EPROBE_DEFER)
  868. break;
  869. }
  870. if (ret < 0) {
  871. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  872. ret, priv->state, probe_cnt);
  873. icnss_block_shutdown(false);
  874. goto out;
  875. }
  876. icnss_block_shutdown(false);
  877. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  878. return 0;
  879. out:
  880. icnss_hw_power_off(priv);
  881. return ret;
  882. }
  883. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  884. {
  885. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  886. goto out;
  887. if (!priv->ops || !priv->ops->shutdown)
  888. goto out;
  889. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  890. goto out;
  891. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  892. priv->ops->shutdown(&priv->pdev->dev);
  893. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  894. out:
  895. return 0;
  896. }
  897. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  898. {
  899. int ret = 0;
  900. icnss_pm_relax(priv);
  901. icnss_call_driver_shutdown(priv);
  902. clear_bit(ICNSS_PDR, &priv->state);
  903. clear_bit(ICNSS_REJUVENATE, &priv->state);
  904. clear_bit(ICNSS_PD_RESTART, &priv->state);
  905. clear_bit(ICNSS_LOW_POWER, &priv->state);
  906. priv->early_crash_ind = false;
  907. priv->is_ssr = false;
  908. if (!priv->ops || !priv->ops->reinit)
  909. goto out;
  910. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  911. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  912. priv->state);
  913. goto out;
  914. }
  915. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  916. goto call_probe;
  917. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  918. icnss_hw_power_on(priv);
  919. icnss_block_shutdown(true);
  920. ret = priv->ops->reinit(&priv->pdev->dev);
  921. if (ret < 0) {
  922. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  923. ret, priv->state);
  924. if (!priv->allow_recursive_recovery)
  925. ICNSS_ASSERT(false);
  926. icnss_block_shutdown(false);
  927. goto out_power_off;
  928. }
  929. icnss_block_shutdown(false);
  930. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  931. return 0;
  932. call_probe:
  933. return icnss_call_driver_probe(priv);
  934. out_power_off:
  935. icnss_hw_power_off(priv);
  936. out:
  937. return ret;
  938. }
  939. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  940. {
  941. int ret = 0;
  942. if (!priv)
  943. return -ENODEV;
  944. del_timer(&priv->recovery_timer);
  945. set_bit(ICNSS_FW_READY, &priv->state);
  946. clear_bit(ICNSS_MODE_ON, &priv->state);
  947. atomic_set(&priv->soc_wake_ref_count, 0);
  948. if (priv->device_id == WCN6750_DEVICE_ID ||
  949. priv->device_id == WCN6450_DEVICE_ID)
  950. icnss_free_qdss_mem(priv);
  951. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  952. icnss_hw_power_off(priv);
  953. if (!priv->pdev) {
  954. icnss_pr_err("Device is not ready\n");
  955. ret = -ENODEV;
  956. goto out;
  957. }
  958. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  959. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  960. icnss_pr_info("sent wlan boot complete command\n");
  961. }
  962. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  963. ret = icnss_pd_restart_complete(priv);
  964. } else {
  965. if (priv->wpss_supported)
  966. icnss_setup_dms_mac(priv);
  967. ret = icnss_call_driver_probe(priv);
  968. }
  969. icnss_vreg_unvote(priv);
  970. out:
  971. return ret;
  972. }
  973. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  974. {
  975. int ret = 0;
  976. if (!priv)
  977. return -ENODEV;
  978. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  979. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  980. icnss_pr_info("Failed to download qdss configuration file");
  981. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  982. mod_timer(&priv->recovery_timer,
  983. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  984. ret = wlfw_wlan_mode_send_sync_msg(priv,
  985. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  986. } else {
  987. icnss_driver_event_fw_ready_ind(priv, NULL);
  988. }
  989. return ret;
  990. }
  991. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  992. {
  993. struct platform_device *pdev = priv->pdev;
  994. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  995. int i, j;
  996. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  997. if (!qdss_mem[i].va && qdss_mem[i].size) {
  998. qdss_mem[i].va =
  999. dma_alloc_coherent(&pdev->dev,
  1000. qdss_mem[i].size,
  1001. &qdss_mem[i].pa,
  1002. GFP_KERNEL);
  1003. if (!qdss_mem[i].va) {
  1004. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1005. qdss_mem[i].size,
  1006. qdss_mem[i].type, i);
  1007. break;
  1008. }
  1009. }
  1010. }
  1011. /* Best-effort allocation for QDSS trace */
  1012. if (i < priv->qdss_mem_seg_len) {
  1013. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1014. qdss_mem[j].type = 0;
  1015. qdss_mem[j].size = 0;
  1016. }
  1017. priv->qdss_mem_seg_len = i;
  1018. }
  1019. return 0;
  1020. }
  1021. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1022. {
  1023. struct platform_device *pdev = priv->pdev;
  1024. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1025. int i;
  1026. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1027. if (qdss_mem[i].va && qdss_mem[i].size) {
  1028. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1029. &qdss_mem[i].pa, qdss_mem[i].size,
  1030. qdss_mem[i].type);
  1031. dma_free_coherent(&pdev->dev,
  1032. qdss_mem[i].size, qdss_mem[i].va,
  1033. qdss_mem[i].pa);
  1034. qdss_mem[i].va = NULL;
  1035. qdss_mem[i].pa = 0;
  1036. qdss_mem[i].size = 0;
  1037. qdss_mem[i].type = 0;
  1038. }
  1039. }
  1040. priv->qdss_mem_seg_len = 0;
  1041. }
  1042. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1043. {
  1044. int ret = 0;
  1045. ret = icnss_alloc_qdss_mem(priv);
  1046. if (ret < 0)
  1047. return ret;
  1048. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1049. }
  1050. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1051. u64 pa, u32 size, int *seg_id)
  1052. {
  1053. int i = 0;
  1054. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1055. u64 offset = 0;
  1056. void *va = NULL;
  1057. u64 local_pa;
  1058. u32 local_size;
  1059. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1060. local_pa = (u64)qdss_mem[i].pa;
  1061. local_size = (u32)qdss_mem[i].size;
  1062. if (pa == local_pa && size <= local_size) {
  1063. va = qdss_mem[i].va;
  1064. break;
  1065. }
  1066. if (pa > local_pa &&
  1067. pa < local_pa + local_size &&
  1068. pa + size <= local_pa + local_size) {
  1069. offset = pa - local_pa;
  1070. va = qdss_mem[i].va + offset;
  1071. break;
  1072. }
  1073. }
  1074. *seg_id = i;
  1075. return va;
  1076. }
  1077. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1078. void *data)
  1079. {
  1080. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1081. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1082. int ret = 0;
  1083. int i;
  1084. void *va = NULL;
  1085. u64 pa;
  1086. u32 size;
  1087. int seg_id = 0;
  1088. if (!priv->qdss_mem_seg_len) {
  1089. icnss_pr_err("Memory for QDSS trace is not available\n");
  1090. return -ENOMEM;
  1091. }
  1092. if (event_data->mem_seg_len == 0) {
  1093. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1094. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1095. ICNSS_GENL_MSG_TYPE_QDSS,
  1096. event_data->file_name,
  1097. qdss_mem[i].size);
  1098. if (ret < 0) {
  1099. icnss_pr_err("Fail to save QDSS data: %d\n",
  1100. ret);
  1101. break;
  1102. }
  1103. }
  1104. } else {
  1105. for (i = 0; i < event_data->mem_seg_len; i++) {
  1106. pa = event_data->mem_seg[i].addr;
  1107. size = event_data->mem_seg[i].size;
  1108. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1109. size, &seg_id);
  1110. if (!va) {
  1111. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1112. &pa);
  1113. ret = -EINVAL;
  1114. break;
  1115. }
  1116. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1117. event_data->file_name, size);
  1118. if (ret < 0) {
  1119. icnss_pr_err("Fail to save QDSS data: %d\n",
  1120. ret);
  1121. break;
  1122. }
  1123. }
  1124. }
  1125. kfree(data);
  1126. return ret;
  1127. }
  1128. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1129. {
  1130. int dec, c = atomic_read(v);
  1131. do {
  1132. dec = c - 1;
  1133. if (unlikely(dec < 1))
  1134. break;
  1135. } while (!atomic_try_cmpxchg(v, &c, dec));
  1136. return dec;
  1137. }
  1138. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1139. void *data)
  1140. {
  1141. int ret = 0;
  1142. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1143. if (!priv)
  1144. return -ENODEV;
  1145. if (!data)
  1146. return -EINVAL;
  1147. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1148. event_data->total_size);
  1149. kfree(data);
  1150. return ret;
  1151. }
  1152. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1153. {
  1154. int ret = 0;
  1155. if (!priv)
  1156. return -ENODEV;
  1157. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1158. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1159. atomic_read(&priv->soc_wake_ref_count));
  1160. return 0;
  1161. }
  1162. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1163. ICNSS_SMP2P_OUT_SOC_WAKE);
  1164. if (!ret)
  1165. atomic_inc(&priv->soc_wake_ref_count);
  1166. return ret;
  1167. }
  1168. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1169. {
  1170. int ret = 0;
  1171. if (!priv)
  1172. return -ENODEV;
  1173. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1174. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1175. priv->soc_wake_ref_count);
  1176. return 0;
  1177. }
  1178. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1179. ICNSS_SMP2P_OUT_SOC_WAKE);
  1180. return ret;
  1181. }
  1182. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1183. void *data)
  1184. {
  1185. int ret = 0;
  1186. int probe_cnt = 0;
  1187. if (priv->ops)
  1188. return -EEXIST;
  1189. priv->ops = data;
  1190. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1191. set_bit(ICNSS_FW_READY, &priv->state);
  1192. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1193. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1194. priv->state);
  1195. return -ENODEV;
  1196. }
  1197. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1198. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1199. priv->state);
  1200. goto out;
  1201. }
  1202. ret = icnss_hw_power_on(priv);
  1203. if (ret)
  1204. goto out;
  1205. icnss_block_shutdown(true);
  1206. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1207. ret = priv->ops->probe(&priv->pdev->dev);
  1208. probe_cnt++;
  1209. if (ret != -EPROBE_DEFER)
  1210. break;
  1211. }
  1212. if (ret) {
  1213. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1214. ret, priv->state, probe_cnt);
  1215. icnss_block_shutdown(false);
  1216. goto power_off;
  1217. }
  1218. icnss_block_shutdown(false);
  1219. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1220. return 0;
  1221. power_off:
  1222. icnss_hw_power_off(priv);
  1223. out:
  1224. return ret;
  1225. }
  1226. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1227. void *data)
  1228. {
  1229. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1230. priv->ops = NULL;
  1231. goto out;
  1232. }
  1233. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1234. icnss_block_shutdown(true);
  1235. if (priv->ops)
  1236. priv->ops->remove(&priv->pdev->dev);
  1237. icnss_block_shutdown(false);
  1238. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1239. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1240. priv->ops = NULL;
  1241. icnss_hw_power_off(priv);
  1242. out:
  1243. return 0;
  1244. }
  1245. static int icnss_fw_crashed(struct icnss_priv *priv,
  1246. struct icnss_event_pd_service_down_data *event_data)
  1247. {
  1248. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1249. set_bit(ICNSS_PD_RESTART, &priv->state);
  1250. clear_bit(ICNSS_FW_READY, &priv->state);
  1251. icnss_pm_stay_awake(priv);
  1252. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1253. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1254. if (event_data && event_data->fw_rejuvenate)
  1255. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1256. return 0;
  1257. }
  1258. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1259. struct icnss_uevent_hang_data *hang_data)
  1260. {
  1261. if (!priv->hang_event_data_va)
  1262. return -EINVAL;
  1263. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1264. priv->hang_event_data_len,
  1265. GFP_ATOMIC);
  1266. if (!priv->hang_event_data)
  1267. return -ENOMEM;
  1268. // Update the hang event params
  1269. hang_data->hang_event_data = priv->hang_event_data;
  1270. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1271. return 0;
  1272. }
  1273. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1274. {
  1275. struct icnss_uevent_hang_data hang_data = {0};
  1276. int ret = 0xFF;
  1277. if (priv->early_crash_ind) {
  1278. ret = icnss_update_hang_event_data(priv, &hang_data);
  1279. if (ret)
  1280. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1281. }
  1282. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1283. &hang_data);
  1284. if (!ret) {
  1285. kfree(priv->hang_event_data);
  1286. priv->hang_event_data = NULL;
  1287. }
  1288. return 0;
  1289. }
  1290. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1291. void *data)
  1292. {
  1293. struct icnss_event_pd_service_down_data *event_data = data;
  1294. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1295. icnss_ignore_fw_timeout(false);
  1296. goto out;
  1297. }
  1298. if (priv->force_err_fatal)
  1299. ICNSS_ASSERT(0);
  1300. if (priv->device_id == WCN6750_DEVICE_ID ||
  1301. priv->device_id == WCN6450_DEVICE_ID) {
  1302. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1303. ICNSS_SMP2P_OUT_SOC_WAKE);
  1304. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1305. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1306. }
  1307. if (priv->wpss_supported)
  1308. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1309. ICNSS_SMP2P_OUT_POWER_SAVE);
  1310. icnss_send_hang_event_data(priv);
  1311. if (priv->early_crash_ind) {
  1312. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1313. event_data->crashed, priv->state);
  1314. goto out;
  1315. }
  1316. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1317. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1318. event_data->crashed, priv->state);
  1319. if (!priv->allow_recursive_recovery)
  1320. ICNSS_ASSERT(0);
  1321. goto out;
  1322. }
  1323. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1324. icnss_fw_crashed(priv, event_data);
  1325. out:
  1326. kfree(data);
  1327. return 0;
  1328. }
  1329. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1330. void *data)
  1331. {
  1332. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1333. icnss_ignore_fw_timeout(false);
  1334. goto out;
  1335. }
  1336. priv->early_crash_ind = true;
  1337. icnss_fw_crashed(priv, NULL);
  1338. out:
  1339. kfree(data);
  1340. return 0;
  1341. }
  1342. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1343. void *data)
  1344. {
  1345. int ret = 0;
  1346. if (!priv->ops || !priv->ops->idle_shutdown)
  1347. return 0;
  1348. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1349. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1350. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1351. ret = -EBUSY;
  1352. } else {
  1353. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1354. priv->state);
  1355. icnss_block_shutdown(true);
  1356. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1357. icnss_block_shutdown(false);
  1358. }
  1359. return ret;
  1360. }
  1361. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1362. void *data)
  1363. {
  1364. int ret = 0;
  1365. if (!priv->ops || !priv->ops->idle_restart)
  1366. return 0;
  1367. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1368. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1369. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1370. ret = -EBUSY;
  1371. } else {
  1372. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1373. priv->state);
  1374. icnss_block_shutdown(true);
  1375. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1376. icnss_block_shutdown(false);
  1377. }
  1378. return ret;
  1379. }
  1380. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1381. {
  1382. icnss_free_qdss_mem(priv);
  1383. return 0;
  1384. }
  1385. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1386. void *data)
  1387. {
  1388. struct icnss_m3_upload_segments_req_data *event_data = data;
  1389. struct qcom_dump_segment segment;
  1390. int i, status = 0, ret = 0;
  1391. struct list_head head;
  1392. if (!dump_enabled()) {
  1393. icnss_pr_info("Dump collection is not enabled\n");
  1394. return ret;
  1395. }
  1396. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1397. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1398. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1399. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1400. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1401. return ret;
  1402. INIT_LIST_HEAD(&head);
  1403. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1404. memset(&segment, 0, sizeof(segment));
  1405. segment.va = devm_ioremap(&priv->pdev->dev,
  1406. event_data->m3_segment[i].addr,
  1407. event_data->m3_segment[i].size);
  1408. if (!segment.va) {
  1409. icnss_pr_err("Failed to ioremap M3 Dump region");
  1410. ret = -ENOMEM;
  1411. goto send_resp;
  1412. }
  1413. segment.size = event_data->m3_segment[i].size;
  1414. list_add(&segment.node, &head);
  1415. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1416. event_data->m3_segment[i].name);
  1417. switch (event_data->m3_segment[i].type) {
  1418. case QMI_M3_SEGMENT_PHYAREG_V01:
  1419. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1420. break;
  1421. case QMI_M3_SEGMENT_PHYDBG_V01:
  1422. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1423. break;
  1424. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1425. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1426. break;
  1427. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1428. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1429. break;
  1430. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1431. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1432. break;
  1433. default:
  1434. icnss_pr_err("Invalid Segment type: %d",
  1435. event_data->m3_segment[i].type);
  1436. }
  1437. if (ret) {
  1438. status = ret;
  1439. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1440. event_data->m3_segment[i].name, ret);
  1441. }
  1442. list_del(&segment.node);
  1443. }
  1444. send_resp:
  1445. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1446. status);
  1447. return ret;
  1448. }
  1449. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1450. {
  1451. int ret = 0;
  1452. struct icnss_subsys_restart_level_data *event_data = data;
  1453. if (!priv)
  1454. return -ENODEV;
  1455. if (!data)
  1456. return -EINVAL;
  1457. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1458. kfree(data);
  1459. return ret;
  1460. }
  1461. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1462. {
  1463. int ret;
  1464. struct icnss_priv *priv = icnss_get_plat_priv();
  1465. rproc_shutdown(priv->rproc);
  1466. ret = rproc_boot(priv->rproc);
  1467. if (ret) {
  1468. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1469. rproc_put(priv->rproc);
  1470. }
  1471. }
  1472. static void icnss_driver_event_work(struct work_struct *work)
  1473. {
  1474. struct icnss_priv *priv =
  1475. container_of(work, struct icnss_priv, event_work);
  1476. struct icnss_driver_event *event;
  1477. unsigned long flags;
  1478. int ret;
  1479. icnss_pm_stay_awake(priv);
  1480. spin_lock_irqsave(&priv->event_lock, flags);
  1481. while (!list_empty(&priv->event_list)) {
  1482. event = list_first_entry(&priv->event_list,
  1483. struct icnss_driver_event, list);
  1484. list_del(&event->list);
  1485. spin_unlock_irqrestore(&priv->event_lock, flags);
  1486. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1487. icnss_driver_event_to_str(event->type),
  1488. event->sync ? "-sync" : "", event->type,
  1489. priv->state);
  1490. switch (event->type) {
  1491. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1492. ret = icnss_driver_event_server_arrive(priv,
  1493. event->data);
  1494. break;
  1495. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1496. ret = icnss_driver_event_server_exit(priv);
  1497. break;
  1498. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1499. ret = icnss_driver_event_fw_ready_ind(priv,
  1500. event->data);
  1501. break;
  1502. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1503. ret = icnss_driver_event_register_driver(priv,
  1504. event->data);
  1505. break;
  1506. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1507. ret = icnss_driver_event_unregister_driver(priv,
  1508. event->data);
  1509. break;
  1510. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1511. ret = icnss_driver_event_pd_service_down(priv,
  1512. event->data);
  1513. break;
  1514. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1515. ret = icnss_driver_event_early_crash_ind(priv,
  1516. event->data);
  1517. break;
  1518. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1519. ret = icnss_driver_event_idle_shutdown(priv,
  1520. event->data);
  1521. break;
  1522. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1523. ret = icnss_driver_event_idle_restart(priv,
  1524. event->data);
  1525. break;
  1526. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1527. ret = icnss_driver_event_fw_init_done(priv,
  1528. event->data);
  1529. break;
  1530. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1531. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1532. break;
  1533. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1534. ret = icnss_qdss_trace_save_hdlr(priv,
  1535. event->data);
  1536. break;
  1537. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1538. ret = icnss_qdss_trace_free_hdlr(priv);
  1539. break;
  1540. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1541. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1542. break;
  1543. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1544. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1545. event->data);
  1546. break;
  1547. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1548. ret = icnss_subsys_restart_level(priv, event->data);
  1549. break;
  1550. default:
  1551. icnss_pr_err("Invalid Event type: %d", event->type);
  1552. kfree(event);
  1553. continue;
  1554. }
  1555. priv->stats.events[event->type].processed++;
  1556. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1557. icnss_driver_event_to_str(event->type),
  1558. event->sync ? "-sync" : "", event->type, ret,
  1559. priv->state);
  1560. spin_lock_irqsave(&priv->event_lock, flags);
  1561. if (event->sync) {
  1562. event->ret = ret;
  1563. complete(&event->complete);
  1564. continue;
  1565. }
  1566. spin_unlock_irqrestore(&priv->event_lock, flags);
  1567. kfree(event);
  1568. spin_lock_irqsave(&priv->event_lock, flags);
  1569. }
  1570. spin_unlock_irqrestore(&priv->event_lock, flags);
  1571. icnss_pm_relax(priv);
  1572. }
  1573. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1574. {
  1575. struct icnss_priv *priv =
  1576. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1577. struct icnss_soc_wake_event *event;
  1578. unsigned long flags;
  1579. int ret;
  1580. icnss_pm_stay_awake(priv);
  1581. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1582. while (!list_empty(&priv->soc_wake_msg_list)) {
  1583. event = list_first_entry(&priv->soc_wake_msg_list,
  1584. struct icnss_soc_wake_event, list);
  1585. list_del(&event->list);
  1586. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1587. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1588. icnss_soc_wake_event_to_str(event->type),
  1589. event->sync ? "-sync" : "", event->type,
  1590. priv->state);
  1591. switch (event->type) {
  1592. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1593. ret = icnss_event_soc_wake_request(priv,
  1594. event->data);
  1595. break;
  1596. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1597. ret = icnss_event_soc_wake_release(priv,
  1598. event->data);
  1599. break;
  1600. default:
  1601. icnss_pr_err("Invalid Event type: %d", event->type);
  1602. kfree(event);
  1603. continue;
  1604. }
  1605. priv->stats.soc_wake_events[event->type].processed++;
  1606. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1607. icnss_soc_wake_event_to_str(event->type),
  1608. event->sync ? "-sync" : "", event->type, ret,
  1609. priv->state);
  1610. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1611. if (event->sync) {
  1612. event->ret = ret;
  1613. complete(&event->complete);
  1614. continue;
  1615. }
  1616. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1617. kfree(event);
  1618. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1619. }
  1620. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1621. icnss_pm_relax(priv);
  1622. }
  1623. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1624. {
  1625. int ret = 0;
  1626. struct qcom_dump_segment segment;
  1627. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1628. struct list_head head;
  1629. if (!dump_enabled()) {
  1630. icnss_pr_info("Dump collection is not enabled\n");
  1631. return ret;
  1632. }
  1633. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1634. return ret;
  1635. INIT_LIST_HEAD(&head);
  1636. memset(&segment, 0, sizeof(segment));
  1637. segment.va = priv->msa_va;
  1638. segment.size = priv->msa_mem_size;
  1639. list_add(&segment.node, &head);
  1640. if (!msa0_dump_dev->dev) {
  1641. icnss_pr_err("Created Dump Device not found\n");
  1642. return 0;
  1643. }
  1644. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1645. if (ret) {
  1646. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1647. return ret;
  1648. }
  1649. list_del(&segment.node);
  1650. return ret;
  1651. }
  1652. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1653. void *data)
  1654. {
  1655. struct qcom_ssr_notify_data *notif = data;
  1656. int ret = 0;
  1657. if (!notif->crashed) {
  1658. if (atomic_read(&priv->is_shutdown)) {
  1659. atomic_set(&priv->is_shutdown, false);
  1660. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1661. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1662. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1663. clear_bit(ICNSS_FW_READY, &priv->state);
  1664. icnss_driver_event_post(priv,
  1665. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1666. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1667. NULL);
  1668. }
  1669. }
  1670. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1671. if (!wait_for_completion_timeout(
  1672. &priv->unblock_shutdown,
  1673. msecs_to_jiffies(PROBE_TIMEOUT)))
  1674. icnss_pr_err("modem block shutdown timeout\n");
  1675. }
  1676. ret = wlfw_send_modem_shutdown_msg(priv);
  1677. if (ret < 0)
  1678. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1679. ret);
  1680. }
  1681. }
  1682. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1683. {
  1684. switch (code) {
  1685. case QCOM_SSR_BEFORE_POWERUP:
  1686. return "BEFORE_POWERUP";
  1687. case QCOM_SSR_AFTER_POWERUP:
  1688. return "AFTER_POWERUP";
  1689. case QCOM_SSR_BEFORE_SHUTDOWN:
  1690. return "BEFORE_SHUTDOWN";
  1691. case QCOM_SSR_AFTER_SHUTDOWN:
  1692. return "AFTER_SHUTDOWN";
  1693. default:
  1694. return "UNKNOWN";
  1695. }
  1696. };
  1697. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1698. unsigned long code,
  1699. void *data)
  1700. {
  1701. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1702. wpss_early_ssr_nb);
  1703. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1704. icnss_qcom_ssr_notify_state_to_str(code), code);
  1705. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1706. set_bit(ICNSS_FW_DOWN, &priv->state);
  1707. icnss_ignore_fw_timeout(true);
  1708. }
  1709. return NOTIFY_DONE;
  1710. }
  1711. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1712. unsigned long code,
  1713. void *data)
  1714. {
  1715. struct icnss_event_pd_service_down_data *event_data;
  1716. struct qcom_ssr_notify_data *notif = data;
  1717. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1718. wpss_ssr_nb);
  1719. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1720. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1721. icnss_qcom_ssr_notify_state_to_str(code), code);
  1722. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1723. icnss_pr_info("Collecting msa0 segment dump\n");
  1724. icnss_msa0_ramdump(priv);
  1725. goto out;
  1726. }
  1727. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1728. goto out;
  1729. if (priv->wpss_self_recovery_enabled)
  1730. del_timer(&priv->wpss_ssr_timer);
  1731. priv->is_ssr = true;
  1732. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1733. priv->state, notif->crashed);
  1734. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1735. icnss_update_state_send_modem_shutdown(priv, data);
  1736. set_bit(ICNSS_FW_DOWN, &priv->state);
  1737. icnss_ignore_fw_timeout(true);
  1738. if (notif->crashed)
  1739. priv->stats.recovery.root_pd_crash++;
  1740. else
  1741. priv->stats.recovery.root_pd_shutdown++;
  1742. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1743. if (event_data == NULL)
  1744. return notifier_from_errno(-ENOMEM);
  1745. event_data->crashed = notif->crashed;
  1746. fw_down_data.crashed = !!notif->crashed;
  1747. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1748. clear_bit(ICNSS_FW_READY, &priv->state);
  1749. fw_down_data.crashed = !!notif->crashed;
  1750. icnss_call_driver_uevent(priv,
  1751. ICNSS_UEVENT_FW_DOWN,
  1752. &fw_down_data);
  1753. }
  1754. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1755. ICNSS_EVENT_SYNC, event_data);
  1756. if (notif->crashed)
  1757. mod_timer(&priv->recovery_timer,
  1758. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1759. out:
  1760. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1761. return NOTIFY_OK;
  1762. }
  1763. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1764. unsigned long code,
  1765. void *data)
  1766. {
  1767. struct icnss_event_pd_service_down_data *event_data;
  1768. struct qcom_ssr_notify_data *notif = data;
  1769. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1770. modem_ssr_nb);
  1771. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1772. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1773. icnss_qcom_ssr_notify_state_to_str(code), code);
  1774. switch (code) {
  1775. case QCOM_SSR_BEFORE_SHUTDOWN:
  1776. if (!notif->crashed &&
  1777. priv->low_power_support) { /* Hibernate */
  1778. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1779. icnss_driver_event_post(
  1780. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1781. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1782. set_bit(ICNSS_LOW_POWER, &priv->state);
  1783. }
  1784. break;
  1785. case QCOM_SSR_AFTER_SHUTDOWN:
  1786. /* Collect ramdump only when there was a crash. */
  1787. if (notif->crashed) {
  1788. icnss_pr_info("Collecting msa0 segment dump\n");
  1789. icnss_msa0_ramdump(priv);
  1790. }
  1791. goto out;
  1792. default:
  1793. goto out;
  1794. }
  1795. priv->is_ssr = true;
  1796. if (notif->crashed) {
  1797. priv->stats.recovery.root_pd_crash++;
  1798. priv->root_pd_shutdown = false;
  1799. } else {
  1800. priv->stats.recovery.root_pd_shutdown++;
  1801. priv->root_pd_shutdown = true;
  1802. }
  1803. icnss_update_state_send_modem_shutdown(priv, data);
  1804. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1805. set_bit(ICNSS_FW_DOWN, &priv->state);
  1806. icnss_ignore_fw_timeout(true);
  1807. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1808. clear_bit(ICNSS_FW_READY, &priv->state);
  1809. fw_down_data.crashed = !!notif->crashed;
  1810. icnss_call_driver_uevent(priv,
  1811. ICNSS_UEVENT_FW_DOWN,
  1812. &fw_down_data);
  1813. }
  1814. goto out;
  1815. }
  1816. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1817. priv->state, notif->crashed);
  1818. set_bit(ICNSS_FW_DOWN, &priv->state);
  1819. icnss_ignore_fw_timeout(true);
  1820. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1821. if (event_data == NULL)
  1822. return notifier_from_errno(-ENOMEM);
  1823. event_data->crashed = notif->crashed;
  1824. fw_down_data.crashed = !!notif->crashed;
  1825. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1826. clear_bit(ICNSS_FW_READY, &priv->state);
  1827. fw_down_data.crashed = !!notif->crashed;
  1828. icnss_call_driver_uevent(priv,
  1829. ICNSS_UEVENT_FW_DOWN,
  1830. &fw_down_data);
  1831. }
  1832. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1833. ICNSS_EVENT_SYNC, event_data);
  1834. if (notif->crashed)
  1835. mod_timer(&priv->recovery_timer,
  1836. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1837. out:
  1838. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1839. return NOTIFY_OK;
  1840. }
  1841. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1842. {
  1843. int ret = 0;
  1844. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1845. priv->wpss_early_notify_handler =
  1846. qcom_register_early_ssr_notifier("wpss",
  1847. &priv->wpss_early_ssr_nb);
  1848. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1849. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1850. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1851. }
  1852. return ret;
  1853. }
  1854. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1855. {
  1856. int ret = 0;
  1857. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1858. /*
  1859. * Assign priority of icnss wpss notifier callback over IPA
  1860. * modem notifier callback which is 0
  1861. */
  1862. priv->wpss_ssr_nb.priority = 1;
  1863. priv->wpss_notify_handler =
  1864. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1865. if (IS_ERR(priv->wpss_notify_handler)) {
  1866. ret = PTR_ERR(priv->wpss_notify_handler);
  1867. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1868. }
  1869. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1870. return ret;
  1871. }
  1872. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1873. unsigned long code,
  1874. void *data)
  1875. {
  1876. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1877. slate_ssr_nb);
  1878. int ret = 0;
  1879. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1880. if (code == QCOM_SSR_AFTER_POWERUP) {
  1881. set_bit(ICNSS_SLATE_UP, &priv->state);
  1882. complete(&priv->slate_boot_complete);
  1883. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1884. priv->state);
  1885. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1886. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1887. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1888. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1889. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1890. priv->state);
  1891. goto skip_pdr;
  1892. }
  1893. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1894. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1895. if (ret < 0) {
  1896. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1897. ret, priv->state);
  1898. goto skip_pdr;
  1899. }
  1900. }
  1901. skip_pdr:
  1902. return NOTIFY_OK;
  1903. }
  1904. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1905. {
  1906. int ret = 0;
  1907. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1908. priv->slate_notify_handler =
  1909. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1910. if (IS_ERR(priv->slate_notify_handler)) {
  1911. ret = PTR_ERR(priv->slate_notify_handler);
  1912. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1913. }
  1914. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1915. return ret;
  1916. }
  1917. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1918. {
  1919. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1920. return 0;
  1921. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1922. &priv->slate_ssr_nb);
  1923. priv->slate_notify_handler = NULL;
  1924. return 0;
  1925. }
  1926. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1927. {
  1928. int ret = 0;
  1929. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1930. /*
  1931. * Assign priority of icnss modem notifier callback over IPA
  1932. * modem notifier callback which is 0
  1933. */
  1934. priv->modem_ssr_nb.priority = 1;
  1935. priv->modem_notify_handler =
  1936. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1937. if (IS_ERR(priv->modem_notify_handler)) {
  1938. ret = PTR_ERR(priv->modem_notify_handler);
  1939. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1940. }
  1941. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1942. return ret;
  1943. }
  1944. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1945. {
  1946. if (IS_ERR(priv->wpss_early_notify_handler))
  1947. return;
  1948. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1949. &priv->wpss_early_ssr_nb);
  1950. priv->wpss_early_notify_handler = NULL;
  1951. }
  1952. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1953. {
  1954. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1955. return 0;
  1956. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1957. &priv->wpss_ssr_nb);
  1958. priv->wpss_notify_handler = NULL;
  1959. return 0;
  1960. }
  1961. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1962. {
  1963. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1964. return 0;
  1965. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1966. &priv->modem_ssr_nb);
  1967. priv->modem_notify_handler = NULL;
  1968. return 0;
  1969. }
  1970. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1971. {
  1972. struct icnss_priv *priv = priv_cb;
  1973. struct icnss_event_pd_service_down_data *event_data;
  1974. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1975. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1976. if (!priv)
  1977. return;
  1978. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1979. state, priv->state);
  1980. switch (state) {
  1981. case SERVREG_SERVICE_STATE_DOWN:
  1982. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1983. if (!event_data)
  1984. return;
  1985. event_data->crashed = true;
  1986. if (!priv->is_ssr) {
  1987. set_bit(ICNSS_PDR, &penv->state);
  1988. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1989. cause = ICNSS_HOST_ERROR;
  1990. priv->stats.recovery.pdr_host_error++;
  1991. } else {
  1992. cause = ICNSS_FW_CRASH;
  1993. priv->stats.recovery.pdr_fw_crash++;
  1994. }
  1995. } else if (priv->root_pd_shutdown) {
  1996. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1997. event_data->crashed = false;
  1998. }
  1999. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2000. priv->state, icnss_pdr_cause[cause]);
  2001. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2002. set_bit(ICNSS_FW_DOWN, &priv->state);
  2003. icnss_ignore_fw_timeout(true);
  2004. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2005. clear_bit(ICNSS_FW_READY, &priv->state);
  2006. fw_down_data.crashed = event_data->crashed;
  2007. icnss_call_driver_uevent(priv,
  2008. ICNSS_UEVENT_FW_DOWN,
  2009. &fw_down_data);
  2010. }
  2011. }
  2012. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2013. if (event_data->crashed)
  2014. mod_timer(&priv->recovery_timer,
  2015. jiffies +
  2016. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2017. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2018. ICNSS_EVENT_SYNC, event_data);
  2019. break;
  2020. case SERVREG_SERVICE_STATE_UP:
  2021. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2022. break;
  2023. default:
  2024. break;
  2025. }
  2026. return;
  2027. }
  2028. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2029. {
  2030. struct pdr_handle *handle = NULL;
  2031. struct pdr_service *service = NULL;
  2032. int err = 0;
  2033. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2034. if (IS_ERR_OR_NULL(handle)) {
  2035. err = PTR_ERR(handle);
  2036. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2037. goto out;
  2038. }
  2039. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2040. if (IS_ERR_OR_NULL(service)) {
  2041. err = PTR_ERR(service);
  2042. icnss_pr_err("Failed to add lookup, err %d", err);
  2043. goto out;
  2044. }
  2045. priv->pdr_handle = handle;
  2046. priv->pdr_service = service;
  2047. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2048. icnss_pr_info("PDR registration happened");
  2049. out:
  2050. return err;
  2051. }
  2052. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2053. {
  2054. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2055. return;
  2056. pdr_handle_release(priv->pdr_handle);
  2057. }
  2058. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2059. {
  2060. int ret = 0;
  2061. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2062. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2063. ret = PTR_ERR(priv->icnss_ramdump_class);
  2064. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2065. return ret;
  2066. }
  2067. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2068. ICNSS_RAMDUMP_NAME);
  2069. if (ret < 0) {
  2070. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2071. goto fail_alloc_major;
  2072. }
  2073. return 0;
  2074. fail_alloc_major:
  2075. class_destroy(priv->icnss_ramdump_class);
  2076. return ret;
  2077. }
  2078. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2079. {
  2080. int ret = 0;
  2081. struct icnss_ramdump_info *ramdump_info;
  2082. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2083. if (!ramdump_info)
  2084. return ERR_PTR(-ENOMEM);
  2085. if (!dev_name) {
  2086. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2087. return NULL;
  2088. }
  2089. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2090. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2091. if (ramdump_info->minor < 0) {
  2092. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2093. ramdump_info->minor);
  2094. ret = -ENODEV;
  2095. goto fail_out_of_minors;
  2096. }
  2097. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2098. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2099. ramdump_info->minor),
  2100. ramdump_info, ramdump_info->name);
  2101. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2102. ret = PTR_ERR(ramdump_info->dev);
  2103. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2104. ramdump_info->name, ret);
  2105. goto fail_device_create;
  2106. }
  2107. return (void *)ramdump_info;
  2108. fail_device_create:
  2109. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2110. fail_out_of_minors:
  2111. kfree(ramdump_info);
  2112. return ERR_PTR(ret);
  2113. }
  2114. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2115. {
  2116. int ret = 0;
  2117. if (!priv || !priv->pdev) {
  2118. icnss_pr_err("Platform priv or pdev is NULL\n");
  2119. return -EINVAL;
  2120. }
  2121. ret = icnss_ramdump_devnode_init(priv);
  2122. if (ret)
  2123. return ret;
  2124. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2125. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2126. icnss_pr_err("Failed to create msa0 dump device!");
  2127. return -ENOMEM;
  2128. }
  2129. if (priv->device_id == WCN6750_DEVICE_ID ||
  2130. priv->device_id == WCN6450_DEVICE_ID) {
  2131. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2132. ICNSS_M3_SEGMENT(
  2133. ICNSS_M3_SEGMENT_PHYAREG));
  2134. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2135. !priv->m3_dump_phyareg->dev) {
  2136. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2137. return -ENOMEM;
  2138. }
  2139. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2140. ICNSS_M3_SEGMENT(
  2141. ICNSS_M3_SEGMENT_PHYA));
  2142. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2143. !priv->m3_dump_phydbg->dev) {
  2144. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2145. return -ENOMEM;
  2146. }
  2147. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2148. ICNSS_M3_SEGMENT(
  2149. ICNSS_M3_SEGMENT_WMACREG));
  2150. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2151. !priv->m3_dump_wmac0reg->dev) {
  2152. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2153. return -ENOMEM;
  2154. }
  2155. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2156. ICNSS_M3_SEGMENT(
  2157. ICNSS_M3_SEGMENT_WCSSDBG));
  2158. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2159. !priv->m3_dump_wcssdbg->dev) {
  2160. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2161. return -ENOMEM;
  2162. }
  2163. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2164. ICNSS_M3_SEGMENT(
  2165. ICNSS_M3_SEGMENT_PHYAM3));
  2166. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2167. !priv->m3_dump_phyapdmem->dev) {
  2168. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2169. return -ENOMEM;
  2170. }
  2171. }
  2172. return 0;
  2173. }
  2174. static int icnss_enable_recovery(struct icnss_priv *priv)
  2175. {
  2176. int ret;
  2177. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2178. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2179. return 0;
  2180. }
  2181. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2182. icnss_pr_dbg("SSR disabled through module parameter\n");
  2183. goto enable_pdr;
  2184. }
  2185. ret = icnss_register_ramdump_devices(priv);
  2186. if (ret)
  2187. return ret;
  2188. if (priv->wpss_supported) {
  2189. icnss_wpss_early_ssr_register_notifier(priv);
  2190. icnss_wpss_ssr_register_notifier(priv);
  2191. return 0;
  2192. }
  2193. icnss_modem_ssr_register_notifier(priv);
  2194. if (priv->is_slate_rfa)
  2195. icnss_slate_ssr_register_notifier(priv);
  2196. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2197. icnss_pr_dbg("PDR disabled through module parameter\n");
  2198. return 0;
  2199. }
  2200. enable_pdr:
  2201. ret = icnss_pd_restart_enable(priv);
  2202. if (ret)
  2203. return ret;
  2204. return 0;
  2205. }
  2206. static int icnss_dev_id_match(struct icnss_priv *priv,
  2207. struct device_info *dev_info)
  2208. {
  2209. while (dev_info->device_id) {
  2210. if (priv->device_id == dev_info->device_id)
  2211. return 1;
  2212. dev_info++;
  2213. }
  2214. return 0;
  2215. }
  2216. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2217. unsigned long *thermal_state)
  2218. {
  2219. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2220. *thermal_state = icnss_tcdev->max_thermal_state;
  2221. return 0;
  2222. }
  2223. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2224. unsigned long *thermal_state)
  2225. {
  2226. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2227. *thermal_state = icnss_tcdev->curr_thermal_state;
  2228. return 0;
  2229. }
  2230. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2231. unsigned long thermal_state)
  2232. {
  2233. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2234. struct device *dev = &penv->pdev->dev;
  2235. int ret = 0;
  2236. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2237. return 0;
  2238. if (thermal_state > icnss_tcdev->max_thermal_state)
  2239. return -EINVAL;
  2240. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2241. thermal_state, icnss_tcdev->tcdev_id);
  2242. mutex_lock(&penv->tcdev_lock);
  2243. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2244. icnss_tcdev->tcdev_id);
  2245. if (!ret)
  2246. icnss_tcdev->curr_thermal_state = thermal_state;
  2247. mutex_unlock(&penv->tcdev_lock);
  2248. if (ret) {
  2249. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2250. ret, icnss_tcdev->tcdev_id);
  2251. return ret;
  2252. }
  2253. return 0;
  2254. }
  2255. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2256. .get_max_state = icnss_tcdev_get_max_state,
  2257. .get_cur_state = icnss_tcdev_get_cur_state,
  2258. .set_cur_state = icnss_tcdev_set_cur_state,
  2259. };
  2260. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2261. int tcdev_id)
  2262. {
  2263. struct icnss_priv *priv = dev_get_drvdata(dev);
  2264. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2265. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2266. struct device_node *dev_node;
  2267. int ret = 0;
  2268. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2269. if (!icnss_tcdev)
  2270. return -ENOMEM;
  2271. icnss_tcdev->tcdev_id = tcdev_id;
  2272. icnss_tcdev->max_thermal_state = max_state;
  2273. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2274. "qcom,icnss_cdev%d", tcdev_id);
  2275. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2276. if (!dev_node) {
  2277. icnss_pr_err("Failed to get cooling device node\n");
  2278. return -EINVAL;
  2279. }
  2280. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2281. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2282. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2283. dev_node,
  2284. cdev_node_name, icnss_tcdev,
  2285. &icnss_cooling_ops);
  2286. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2287. ret = PTR_ERR(icnss_tcdev->tcdev);
  2288. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2289. ret, icnss_tcdev->tcdev_id);
  2290. } else {
  2291. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2292. icnss_tcdev->tcdev_id);
  2293. list_add(&icnss_tcdev->tcdev_list,
  2294. &priv->icnss_tcdev_list);
  2295. }
  2296. } else {
  2297. icnss_pr_dbg("Cooling device registration not supported");
  2298. ret = -EOPNOTSUPP;
  2299. }
  2300. return ret;
  2301. }
  2302. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2303. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2304. {
  2305. struct icnss_priv *priv = dev_get_drvdata(dev);
  2306. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2307. while (!list_empty(&priv->icnss_tcdev_list)) {
  2308. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2309. struct icnss_thermal_cdev,
  2310. tcdev_list);
  2311. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2312. list_del(&icnss_tcdev->tcdev_list);
  2313. kfree(icnss_tcdev);
  2314. }
  2315. }
  2316. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2317. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2318. unsigned long *thermal_state,
  2319. int tcdev_id)
  2320. {
  2321. struct icnss_priv *priv = dev_get_drvdata(dev);
  2322. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2323. mutex_lock(&priv->tcdev_lock);
  2324. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2325. if (icnss_tcdev->tcdev_id != tcdev_id)
  2326. continue;
  2327. *thermal_state = icnss_tcdev->curr_thermal_state;
  2328. mutex_unlock(&priv->tcdev_lock);
  2329. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2330. icnss_tcdev->curr_thermal_state, tcdev_id);
  2331. return 0;
  2332. }
  2333. mutex_unlock(&priv->tcdev_lock);
  2334. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2335. return -EINVAL;
  2336. }
  2337. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2338. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2339. int cmd_len, void *cb_ctx,
  2340. int (*cb)(void *ctx, void *event, int event_len))
  2341. {
  2342. struct icnss_priv *priv = icnss_get_plat_priv();
  2343. int ret;
  2344. if (!priv)
  2345. return -ENODEV;
  2346. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2347. return -EINVAL;
  2348. priv->get_info_cb = cb;
  2349. priv->get_info_cb_ctx = cb_ctx;
  2350. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2351. if (ret) {
  2352. priv->get_info_cb = NULL;
  2353. priv->get_info_cb_ctx = NULL;
  2354. }
  2355. return ret;
  2356. }
  2357. EXPORT_SYMBOL(icnss_qmi_send);
  2358. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2359. struct module *owner, const char *mod_name)
  2360. {
  2361. int ret = 0;
  2362. struct icnss_priv *priv = icnss_get_plat_priv();
  2363. if (!priv || !priv->pdev) {
  2364. ret = -ENODEV;
  2365. goto out;
  2366. }
  2367. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2368. if (priv->ops) {
  2369. icnss_pr_err("Driver already registered\n");
  2370. ret = -EEXIST;
  2371. goto out;
  2372. }
  2373. if (!ops->dev_info) {
  2374. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2375. return -EINVAL;
  2376. }
  2377. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2378. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2379. ops->dev_info->name);
  2380. return -ENODEV;
  2381. }
  2382. if (!ops->probe || !ops->remove) {
  2383. ret = -EINVAL;
  2384. goto out;
  2385. }
  2386. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2387. 0, ops);
  2388. if (ret == -EINTR)
  2389. ret = 0;
  2390. out:
  2391. return ret;
  2392. }
  2393. EXPORT_SYMBOL(__icnss_register_driver);
  2394. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2395. {
  2396. int ret;
  2397. struct icnss_priv *priv = icnss_get_plat_priv();
  2398. if (!priv || !priv->pdev) {
  2399. ret = -ENODEV;
  2400. goto out;
  2401. }
  2402. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2403. if (!priv->ops) {
  2404. icnss_pr_err("Driver not registered\n");
  2405. ret = -ENOENT;
  2406. goto out;
  2407. }
  2408. ret = icnss_driver_event_post(priv,
  2409. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2410. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2411. out:
  2412. return ret;
  2413. }
  2414. EXPORT_SYMBOL(icnss_unregister_driver);
  2415. static struct icnss_msi_config msi_config_wcn6750 = {
  2416. .total_vectors = 28,
  2417. .total_users = 2,
  2418. .users = (struct icnss_msi_user[]) {
  2419. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2420. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2421. },
  2422. };
  2423. static struct icnss_msi_config msi_config_wcn6450 = {
  2424. .total_vectors = 10,
  2425. .total_users = 1,
  2426. .users = (struct icnss_msi_user[]) {
  2427. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2428. },
  2429. };
  2430. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2431. {
  2432. if (priv->device_id == WCN6750_DEVICE_ID)
  2433. priv->msi_config = &msi_config_wcn6750;
  2434. else
  2435. priv->msi_config = &msi_config_wcn6450;
  2436. return 0;
  2437. }
  2438. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2439. int *num_vectors, u32 *user_base_data,
  2440. u32 *base_vector)
  2441. {
  2442. struct icnss_priv *priv = dev_get_drvdata(dev);
  2443. struct icnss_msi_config *msi_config;
  2444. int idx;
  2445. if (!priv)
  2446. return -ENODEV;
  2447. msi_config = priv->msi_config;
  2448. if (!msi_config) {
  2449. icnss_pr_err("MSI is not supported.\n");
  2450. return -EINVAL;
  2451. }
  2452. for (idx = 0; idx < msi_config->total_users; idx++) {
  2453. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2454. *num_vectors = msi_config->users[idx].num_vectors;
  2455. *user_base_data = msi_config->users[idx].base_vector
  2456. + priv->msi_base_data;
  2457. *base_vector = msi_config->users[idx].base_vector;
  2458. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2459. user_name, *num_vectors, *user_base_data,
  2460. *base_vector);
  2461. return 0;
  2462. }
  2463. }
  2464. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2465. return -EINVAL;
  2466. }
  2467. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2468. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2469. {
  2470. struct icnss_priv *priv = dev_get_drvdata(dev);
  2471. int irq_num;
  2472. irq_num = priv->srng_irqs[vector];
  2473. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2474. irq_num, vector);
  2475. return irq_num;
  2476. }
  2477. EXPORT_SYMBOL(icnss_get_msi_irq);
  2478. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2479. u32 *msi_addr_high)
  2480. {
  2481. struct icnss_priv *priv = dev_get_drvdata(dev);
  2482. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2483. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2484. }
  2485. EXPORT_SYMBOL(icnss_get_msi_address);
  2486. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2487. irqreturn_t (*handler)(int, void *),
  2488. unsigned long flags, const char *name, void *ctx)
  2489. {
  2490. int ret = 0;
  2491. unsigned int irq;
  2492. struct ce_irq_list *irq_entry;
  2493. struct icnss_priv *priv = dev_get_drvdata(dev);
  2494. if (!priv || !priv->pdev) {
  2495. ret = -ENODEV;
  2496. goto out;
  2497. }
  2498. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2499. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2500. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2501. ret = -EINVAL;
  2502. goto out;
  2503. }
  2504. irq = priv->ce_irqs[ce_id];
  2505. irq_entry = &priv->ce_irq_list[ce_id];
  2506. if (irq_entry->handler || irq_entry->irq) {
  2507. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2508. irq, ce_id);
  2509. ret = -EEXIST;
  2510. goto out;
  2511. }
  2512. ret = request_irq(irq, handler, flags, name, ctx);
  2513. if (ret) {
  2514. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2515. irq, ce_id, ret);
  2516. goto out;
  2517. }
  2518. irq_entry->irq = irq;
  2519. irq_entry->handler = handler;
  2520. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2521. penv->stats.ce_irqs[ce_id].request++;
  2522. out:
  2523. return ret;
  2524. }
  2525. EXPORT_SYMBOL(icnss_ce_request_irq);
  2526. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2527. {
  2528. int ret = 0;
  2529. unsigned int irq;
  2530. struct ce_irq_list *irq_entry;
  2531. if (!penv || !penv->pdev || !dev) {
  2532. ret = -ENODEV;
  2533. goto out;
  2534. }
  2535. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2536. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2537. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2538. ret = -EINVAL;
  2539. goto out;
  2540. }
  2541. irq = penv->ce_irqs[ce_id];
  2542. irq_entry = &penv->ce_irq_list[ce_id];
  2543. if (!irq_entry->handler || !irq_entry->irq) {
  2544. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2545. ret = -EEXIST;
  2546. goto out;
  2547. }
  2548. free_irq(irq, ctx);
  2549. irq_entry->irq = 0;
  2550. irq_entry->handler = NULL;
  2551. penv->stats.ce_irqs[ce_id].free++;
  2552. out:
  2553. return ret;
  2554. }
  2555. EXPORT_SYMBOL(icnss_ce_free_irq);
  2556. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2557. {
  2558. unsigned int irq;
  2559. if (!penv || !penv->pdev || !dev) {
  2560. icnss_pr_err("Platform driver not initialized\n");
  2561. return;
  2562. }
  2563. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2564. penv->state);
  2565. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2566. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2567. return;
  2568. }
  2569. penv->stats.ce_irqs[ce_id].enable++;
  2570. irq = penv->ce_irqs[ce_id];
  2571. enable_irq(irq);
  2572. }
  2573. EXPORT_SYMBOL(icnss_enable_irq);
  2574. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2575. {
  2576. unsigned int irq;
  2577. if (!penv || !penv->pdev || !dev) {
  2578. icnss_pr_err("Platform driver not initialized\n");
  2579. return;
  2580. }
  2581. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2582. penv->state);
  2583. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2584. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2585. ce_id);
  2586. return;
  2587. }
  2588. irq = penv->ce_irqs[ce_id];
  2589. disable_irq(irq);
  2590. penv->stats.ce_irqs[ce_id].disable++;
  2591. }
  2592. EXPORT_SYMBOL(icnss_disable_irq);
  2593. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2594. {
  2595. char *fw_build_timestamp = NULL;
  2596. struct icnss_priv *priv = dev_get_drvdata(dev);
  2597. if (!priv) {
  2598. icnss_pr_err("Platform driver not initialized\n");
  2599. return -EINVAL;
  2600. }
  2601. info->v_addr = priv->mem_base_va;
  2602. info->p_addr = priv->mem_base_pa;
  2603. info->chip_id = priv->chip_info.chip_id;
  2604. info->chip_family = priv->chip_info.chip_family;
  2605. info->board_id = priv->board_id;
  2606. info->soc_id = priv->soc_id;
  2607. info->fw_version = priv->fw_version_info.fw_version;
  2608. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2609. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2610. strlcpy(info->fw_build_timestamp,
  2611. priv->fw_version_info.fw_build_timestamp,
  2612. WLFW_MAX_TIMESTAMP_LEN + 1);
  2613. strlcpy(info->fw_build_id, priv->fw_build_id,
  2614. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2615. return 0;
  2616. }
  2617. EXPORT_SYMBOL(icnss_get_soc_info);
  2618. int icnss_get_mhi_state(struct device *dev)
  2619. {
  2620. struct icnss_priv *priv = dev_get_drvdata(dev);
  2621. if (!priv) {
  2622. icnss_pr_err("Platform driver not initialized\n");
  2623. return -EINVAL;
  2624. }
  2625. if (!priv->mhi_state_info_va)
  2626. return -ENOMEM;
  2627. return ioread32(priv->mhi_state_info_va);
  2628. }
  2629. EXPORT_SYMBOL(icnss_get_mhi_state);
  2630. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2631. {
  2632. int ret;
  2633. struct icnss_priv *priv;
  2634. if (!dev)
  2635. return -ENODEV;
  2636. priv = dev_get_drvdata(dev);
  2637. if (!priv) {
  2638. icnss_pr_err("Platform driver not initialized\n");
  2639. return -EINVAL;
  2640. }
  2641. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2642. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2643. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2644. priv->state);
  2645. return -EINVAL;
  2646. }
  2647. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2648. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2649. if (ret)
  2650. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2651. ret, fw_log_mode);
  2652. return ret;
  2653. }
  2654. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2655. int icnss_force_wake_request(struct device *dev)
  2656. {
  2657. struct icnss_priv *priv;
  2658. if (!dev)
  2659. return -ENODEV;
  2660. priv = dev_get_drvdata(dev);
  2661. if (!priv) {
  2662. icnss_pr_err("Platform driver not initialized\n");
  2663. return -EINVAL;
  2664. }
  2665. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2666. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2667. atomic_read(&priv->soc_wake_ref_count));
  2668. return 0;
  2669. }
  2670. icnss_pr_soc_wake("Calling SOC Wake request");
  2671. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2672. 0, NULL);
  2673. return 0;
  2674. }
  2675. EXPORT_SYMBOL(icnss_force_wake_request);
  2676. int icnss_force_wake_release(struct device *dev)
  2677. {
  2678. struct icnss_priv *priv;
  2679. if (!dev)
  2680. return -ENODEV;
  2681. priv = dev_get_drvdata(dev);
  2682. if (!priv) {
  2683. icnss_pr_err("Platform driver not initialized\n");
  2684. return -EINVAL;
  2685. }
  2686. icnss_pr_soc_wake("Calling SOC Wake response");
  2687. if (atomic_read(&priv->soc_wake_ref_count) &&
  2688. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2689. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2690. atomic_read(&priv->soc_wake_ref_count));
  2691. return 0;
  2692. }
  2693. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2694. 0, NULL);
  2695. return 0;
  2696. }
  2697. EXPORT_SYMBOL(icnss_force_wake_release);
  2698. int icnss_is_device_awake(struct device *dev)
  2699. {
  2700. struct icnss_priv *priv = dev_get_drvdata(dev);
  2701. if (!priv) {
  2702. icnss_pr_err("Platform driver not initialized\n");
  2703. return -EINVAL;
  2704. }
  2705. return atomic_read(&priv->soc_wake_ref_count);
  2706. }
  2707. EXPORT_SYMBOL(icnss_is_device_awake);
  2708. int icnss_is_pci_ep_awake(struct device *dev)
  2709. {
  2710. struct icnss_priv *priv = dev_get_drvdata(dev);
  2711. if (!priv) {
  2712. icnss_pr_err("Platform driver not initialized\n");
  2713. return -EINVAL;
  2714. }
  2715. if (!priv->mhi_state_info_va)
  2716. return -ENOMEM;
  2717. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2718. }
  2719. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2720. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2721. uint32_t mem_type, uint32_t data_len,
  2722. uint8_t *output)
  2723. {
  2724. int ret = 0;
  2725. struct icnss_priv *priv = dev_get_drvdata(dev);
  2726. if (priv->magic != ICNSS_MAGIC) {
  2727. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2728. dev, priv, priv->magic);
  2729. return -EINVAL;
  2730. }
  2731. if (!output || data_len == 0
  2732. || data_len > WLFW_MAX_DATA_SIZE) {
  2733. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2734. output, data_len);
  2735. ret = -EINVAL;
  2736. goto out;
  2737. }
  2738. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2739. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2740. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2741. priv->state);
  2742. ret = -EINVAL;
  2743. goto out;
  2744. }
  2745. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2746. data_len, output);
  2747. out:
  2748. return ret;
  2749. }
  2750. EXPORT_SYMBOL(icnss_athdiag_read);
  2751. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2752. uint32_t mem_type, uint32_t data_len,
  2753. uint8_t *input)
  2754. {
  2755. int ret = 0;
  2756. struct icnss_priv *priv = dev_get_drvdata(dev);
  2757. if (priv->magic != ICNSS_MAGIC) {
  2758. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2759. dev, priv, priv->magic);
  2760. return -EINVAL;
  2761. }
  2762. if (!input || data_len == 0
  2763. || data_len > WLFW_MAX_DATA_SIZE) {
  2764. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2765. input, data_len);
  2766. ret = -EINVAL;
  2767. goto out;
  2768. }
  2769. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2770. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2771. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2772. priv->state);
  2773. ret = -EINVAL;
  2774. goto out;
  2775. }
  2776. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2777. data_len, input);
  2778. out:
  2779. return ret;
  2780. }
  2781. EXPORT_SYMBOL(icnss_athdiag_write);
  2782. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2783. enum icnss_driver_mode mode,
  2784. const char *host_version)
  2785. {
  2786. struct icnss_priv *priv = dev_get_drvdata(dev);
  2787. int temp = 0;
  2788. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2789. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2790. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2791. priv->state);
  2792. return -EINVAL;
  2793. }
  2794. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2795. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2796. priv->state);
  2797. return -EINVAL;
  2798. }
  2799. if (priv->wpss_supported &&
  2800. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2801. icnss_setup_dms_mac(priv);
  2802. if (priv->device_id == WCN6750_DEVICE_ID) {
  2803. if (!icnss_get_temperature(priv, &temp)) {
  2804. icnss_pr_dbg("Temperature: %d\n", temp);
  2805. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2806. icnss_set_wlan_en_delay(priv);
  2807. }
  2808. }
  2809. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2810. }
  2811. EXPORT_SYMBOL(icnss_wlan_enable);
  2812. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2813. {
  2814. struct icnss_priv *priv = dev_get_drvdata(dev);
  2815. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2816. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2817. priv->state);
  2818. return 0;
  2819. }
  2820. return icnss_send_wlan_disable_to_fw(priv);
  2821. }
  2822. EXPORT_SYMBOL(icnss_wlan_disable);
  2823. bool icnss_is_qmi_disable(struct device *dev)
  2824. {
  2825. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2826. }
  2827. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2828. int icnss_get_ce_id(struct device *dev, int irq)
  2829. {
  2830. int i;
  2831. if (!penv || !penv->pdev || !dev)
  2832. return -ENODEV;
  2833. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2834. if (penv->ce_irqs[i] == irq)
  2835. return i;
  2836. }
  2837. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2838. return -EINVAL;
  2839. }
  2840. EXPORT_SYMBOL(icnss_get_ce_id);
  2841. int icnss_get_irq(struct device *dev, int ce_id)
  2842. {
  2843. int irq;
  2844. if (!penv || !penv->pdev || !dev)
  2845. return -ENODEV;
  2846. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2847. return -EINVAL;
  2848. irq = penv->ce_irqs[ce_id];
  2849. return irq;
  2850. }
  2851. EXPORT_SYMBOL(icnss_get_irq);
  2852. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2853. {
  2854. struct icnss_priv *priv = dev_get_drvdata(dev);
  2855. if (!priv) {
  2856. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2857. return NULL;
  2858. }
  2859. return priv->iommu_domain;
  2860. }
  2861. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2862. int icnss_smmu_map(struct device *dev,
  2863. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2864. {
  2865. struct icnss_priv *priv = dev_get_drvdata(dev);
  2866. int flag = IOMMU_READ | IOMMU_WRITE;
  2867. bool dma_coherent = false;
  2868. unsigned long iova;
  2869. int prop_len = 0;
  2870. size_t len;
  2871. int ret = 0;
  2872. if (!priv) {
  2873. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2874. dev, priv);
  2875. return -EINVAL;
  2876. }
  2877. if (!iova_addr) {
  2878. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2879. &paddr, size);
  2880. return -EINVAL;
  2881. }
  2882. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2883. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2884. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2885. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2886. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2887. iova,
  2888. &priv->smmu_iova_ipa_start,
  2889. priv->smmu_iova_ipa_len);
  2890. return -ENOMEM;
  2891. }
  2892. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2893. icnss_pr_dbg("dma-coherent is %s\n",
  2894. dma_coherent ? "enabled" : "disabled");
  2895. if (dma_coherent)
  2896. flag |= IOMMU_CACHE;
  2897. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2898. ret = iommu_map(priv->iommu_domain, iova,
  2899. rounddown(paddr, PAGE_SIZE), len,
  2900. flag);
  2901. if (ret) {
  2902. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2903. return ret;
  2904. }
  2905. priv->smmu_iova_ipa_current = iova + len;
  2906. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2907. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2908. return 0;
  2909. }
  2910. EXPORT_SYMBOL(icnss_smmu_map);
  2911. int icnss_smmu_unmap(struct device *dev,
  2912. uint32_t iova_addr, size_t size)
  2913. {
  2914. struct icnss_priv *priv = dev_get_drvdata(dev);
  2915. unsigned long iova;
  2916. size_t len, unmapped_len;
  2917. if (!priv) {
  2918. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2919. dev, priv);
  2920. return -EINVAL;
  2921. }
  2922. if (!iova_addr) {
  2923. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2924. size);
  2925. return -EINVAL;
  2926. }
  2927. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2928. PAGE_SIZE);
  2929. iova = rounddown(iova_addr, PAGE_SIZE);
  2930. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2931. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2932. iova,
  2933. &priv->smmu_iova_ipa_start,
  2934. priv->smmu_iova_ipa_len);
  2935. return -ENOMEM;
  2936. }
  2937. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2938. iova, len);
  2939. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2940. if (unmapped_len != len) {
  2941. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2942. return -EINVAL;
  2943. }
  2944. priv->smmu_iova_ipa_current = iova;
  2945. return 0;
  2946. }
  2947. EXPORT_SYMBOL(icnss_smmu_unmap);
  2948. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2949. {
  2950. return socinfo_get_serial_number();
  2951. }
  2952. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2953. int icnss_trigger_recovery(struct device *dev)
  2954. {
  2955. int ret = 0;
  2956. struct icnss_priv *priv = dev_get_drvdata(dev);
  2957. if (priv->magic != ICNSS_MAGIC) {
  2958. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2959. ret = -EINVAL;
  2960. goto out;
  2961. }
  2962. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2963. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2964. priv->state);
  2965. ret = -EPERM;
  2966. goto out;
  2967. }
  2968. if (priv->wpss_supported) {
  2969. icnss_pr_vdbg("Initiate Root PD restart");
  2970. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2971. ICNSS_SMP2P_OUT_POWER_SAVE);
  2972. if (!ret)
  2973. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2974. return ret;
  2975. }
  2976. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2977. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2978. priv->state);
  2979. ret = -EOPNOTSUPP;
  2980. goto out;
  2981. }
  2982. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2983. priv->state);
  2984. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2985. if (!ret)
  2986. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2987. out:
  2988. return ret;
  2989. }
  2990. EXPORT_SYMBOL(icnss_trigger_recovery);
  2991. int icnss_idle_shutdown(struct device *dev)
  2992. {
  2993. struct icnss_priv *priv = dev_get_drvdata(dev);
  2994. if (!priv) {
  2995. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2996. return -EINVAL;
  2997. }
  2998. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2999. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3000. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3001. return -EBUSY;
  3002. }
  3003. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3004. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3005. }
  3006. EXPORT_SYMBOL(icnss_idle_shutdown);
  3007. int icnss_idle_restart(struct device *dev)
  3008. {
  3009. struct icnss_priv *priv = dev_get_drvdata(dev);
  3010. if (!priv) {
  3011. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3012. return -EINVAL;
  3013. }
  3014. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3015. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3016. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3017. return -EBUSY;
  3018. }
  3019. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3020. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3021. }
  3022. EXPORT_SYMBOL(icnss_idle_restart);
  3023. int icnss_exit_power_save(struct device *dev)
  3024. {
  3025. struct icnss_priv *priv = dev_get_drvdata(dev);
  3026. icnss_pr_vdbg("Calling Exit Power Save\n");
  3027. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3028. !test_bit(ICNSS_MODE_ON, &priv->state))
  3029. return 0;
  3030. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3031. ICNSS_SMP2P_OUT_POWER_SAVE);
  3032. }
  3033. EXPORT_SYMBOL(icnss_exit_power_save);
  3034. int icnss_prevent_l1(struct device *dev)
  3035. {
  3036. struct icnss_priv *priv = dev_get_drvdata(dev);
  3037. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3038. !test_bit(ICNSS_MODE_ON, &priv->state))
  3039. return 0;
  3040. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3041. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3042. }
  3043. EXPORT_SYMBOL(icnss_prevent_l1);
  3044. void icnss_allow_l1(struct device *dev)
  3045. {
  3046. struct icnss_priv *priv = dev_get_drvdata(dev);
  3047. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3048. !test_bit(ICNSS_MODE_ON, &priv->state))
  3049. return;
  3050. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3051. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3052. }
  3053. EXPORT_SYMBOL(icnss_allow_l1);
  3054. void icnss_allow_recursive_recovery(struct device *dev)
  3055. {
  3056. struct icnss_priv *priv = dev_get_drvdata(dev);
  3057. priv->allow_recursive_recovery = true;
  3058. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3059. }
  3060. void icnss_disallow_recursive_recovery(struct device *dev)
  3061. {
  3062. struct icnss_priv *priv = dev_get_drvdata(dev);
  3063. priv->allow_recursive_recovery = false;
  3064. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3065. }
  3066. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3067. {
  3068. struct kobject *icnss_kobject;
  3069. int ret = 0;
  3070. atomic_set(&priv->is_shutdown, false);
  3071. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3072. if (!icnss_kobject) {
  3073. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3074. return -EINVAL;
  3075. }
  3076. priv->icnss_kobject = icnss_kobject;
  3077. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3078. if (ret) {
  3079. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3080. return ret;
  3081. }
  3082. return ret;
  3083. }
  3084. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3085. {
  3086. struct kobject *icnss_kobject;
  3087. icnss_kobject = priv->icnss_kobject;
  3088. if (icnss_kobject)
  3089. kobject_put(icnss_kobject);
  3090. }
  3091. static ssize_t qdss_tr_start_store(struct device *dev,
  3092. struct device_attribute *attr,
  3093. const char *buf, size_t count)
  3094. {
  3095. struct icnss_priv *priv = dev_get_drvdata(dev);
  3096. wlfw_qdss_trace_start(priv);
  3097. icnss_pr_dbg("Received QDSS start command\n");
  3098. return count;
  3099. }
  3100. static ssize_t qdss_tr_stop_store(struct device *dev,
  3101. struct device_attribute *attr,
  3102. const char *user_buf, size_t count)
  3103. {
  3104. struct icnss_priv *priv = dev_get_drvdata(dev);
  3105. u32 option = 0;
  3106. if (sscanf(user_buf, "%du", &option) != 1)
  3107. return -EINVAL;
  3108. wlfw_qdss_trace_stop(priv, option);
  3109. icnss_pr_dbg("Received QDSS stop command\n");
  3110. return count;
  3111. }
  3112. static ssize_t qdss_conf_download_store(struct device *dev,
  3113. struct device_attribute *attr,
  3114. const char *buf, size_t count)
  3115. {
  3116. struct icnss_priv *priv = dev_get_drvdata(dev);
  3117. icnss_wlfw_qdss_dnld_send_sync(priv);
  3118. icnss_pr_dbg("Received QDSS download config command\n");
  3119. return count;
  3120. }
  3121. static ssize_t hw_trc_override_store(struct device *dev,
  3122. struct device_attribute *attr,
  3123. const char *buf, size_t count)
  3124. {
  3125. struct icnss_priv *priv = dev_get_drvdata(dev);
  3126. int tmp = 0;
  3127. if (sscanf(buf, "%du", &tmp) != 1)
  3128. return -EINVAL;
  3129. priv->hw_trc_override = tmp;
  3130. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3131. return count;
  3132. }
  3133. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3134. {
  3135. struct icnss_priv *priv = icnss_get_plat_priv();
  3136. phandle rproc_phandle;
  3137. int ret;
  3138. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3139. &rproc_phandle)) {
  3140. icnss_pr_err("error reading rproc phandle\n");
  3141. return;
  3142. }
  3143. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3144. if (IS_ERR_OR_NULL(priv->rproc)) {
  3145. icnss_pr_err("rproc not found");
  3146. return;
  3147. }
  3148. ret = rproc_boot(priv->rproc);
  3149. if (ret) {
  3150. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3151. rproc_put(priv->rproc);
  3152. }
  3153. }
  3154. static ssize_t wpss_boot_store(struct device *dev,
  3155. struct device_attribute *attr,
  3156. const char *buf, size_t count)
  3157. {
  3158. struct icnss_priv *priv = dev_get_drvdata(dev);
  3159. int wpss_rproc = 0;
  3160. if (!priv->wpss_supported)
  3161. return count;
  3162. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3163. icnss_pr_err("Failed to read wpss rproc info");
  3164. return -EINVAL;
  3165. }
  3166. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3167. if (wpss_rproc == 1)
  3168. schedule_work(&wpss_loader);
  3169. else if (wpss_rproc == 0)
  3170. icnss_wpss_unload(priv);
  3171. return count;
  3172. }
  3173. static ssize_t wlan_en_delay_store(struct device *dev,
  3174. struct device_attribute *attr,
  3175. const char *buf, size_t count)
  3176. {
  3177. struct icnss_priv *priv = dev_get_drvdata(dev);
  3178. uint32_t wlan_en_delay = 0;
  3179. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3180. return count;
  3181. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3182. icnss_pr_err("Failed to read wlan_en_delay");
  3183. return -EINVAL;
  3184. }
  3185. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3186. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3187. return count;
  3188. }
  3189. static DEVICE_ATTR_WO(qdss_tr_start);
  3190. static DEVICE_ATTR_WO(qdss_tr_stop);
  3191. static DEVICE_ATTR_WO(qdss_conf_download);
  3192. static DEVICE_ATTR_WO(hw_trc_override);
  3193. static DEVICE_ATTR_WO(wpss_boot);
  3194. static DEVICE_ATTR_WO(wlan_en_delay);
  3195. static struct attribute *icnss_attrs[] = {
  3196. &dev_attr_qdss_tr_start.attr,
  3197. &dev_attr_qdss_tr_stop.attr,
  3198. &dev_attr_qdss_conf_download.attr,
  3199. &dev_attr_hw_trc_override.attr,
  3200. &dev_attr_wpss_boot.attr,
  3201. &dev_attr_wlan_en_delay.attr,
  3202. NULL,
  3203. };
  3204. static struct attribute_group icnss_attr_group = {
  3205. .attrs = icnss_attrs,
  3206. };
  3207. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3208. {
  3209. struct device *dev = &priv->pdev->dev;
  3210. int ret;
  3211. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3212. if (ret) {
  3213. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3214. ret);
  3215. goto out;
  3216. }
  3217. return 0;
  3218. out:
  3219. return ret;
  3220. }
  3221. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3222. {
  3223. sysfs_remove_link(kernel_kobj, "icnss");
  3224. }
  3225. static int icnss_sysfs_create(struct icnss_priv *priv)
  3226. {
  3227. int ret = 0;
  3228. ret = devm_device_add_group(&priv->pdev->dev,
  3229. &icnss_attr_group);
  3230. if (ret) {
  3231. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3232. ret);
  3233. goto out;
  3234. }
  3235. icnss_create_sysfs_link(priv);
  3236. ret = icnss_create_shutdown_sysfs(priv);
  3237. if (ret)
  3238. goto remove_icnss_group;
  3239. return 0;
  3240. remove_icnss_group:
  3241. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3242. out:
  3243. return ret;
  3244. }
  3245. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3246. {
  3247. icnss_destroy_shutdown_sysfs(priv);
  3248. icnss_remove_sysfs_link(priv);
  3249. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3250. }
  3251. static int icnss_resource_parse(struct icnss_priv *priv)
  3252. {
  3253. int ret = 0, i = 0;
  3254. struct platform_device *pdev = priv->pdev;
  3255. struct device *dev = &pdev->dev;
  3256. struct resource *res;
  3257. u32 int_prop;
  3258. ret = icnss_get_vreg(priv);
  3259. if (ret) {
  3260. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3261. goto out;
  3262. }
  3263. ret = icnss_get_clk(priv);
  3264. if (ret) {
  3265. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3266. goto put_vreg;
  3267. }
  3268. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3269. ret = icnss_get_psf_info(priv);
  3270. if (ret < 0)
  3271. goto out;
  3272. priv->psf_supported = true;
  3273. }
  3274. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3275. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3276. "membase");
  3277. if (!res) {
  3278. icnss_pr_err("Memory base not found in DT\n");
  3279. ret = -EINVAL;
  3280. goto put_clk;
  3281. }
  3282. priv->mem_base_pa = res->start;
  3283. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3284. resource_size(res));
  3285. if (!priv->mem_base_va) {
  3286. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3287. &priv->mem_base_pa);
  3288. ret = -EINVAL;
  3289. goto put_clk;
  3290. }
  3291. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3292. &priv->mem_base_pa,
  3293. priv->mem_base_va);
  3294. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3295. res = platform_get_resource(priv->pdev,
  3296. IORESOURCE_IRQ, i);
  3297. if (!res) {
  3298. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3299. ret = -ENODEV;
  3300. goto put_clk;
  3301. } else {
  3302. priv->ce_irqs[i] = res->start;
  3303. }
  3304. }
  3305. if (of_property_read_bool(pdev->dev.of_node,
  3306. "qcom,is_low_power")) {
  3307. priv->low_power_support = true;
  3308. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3309. }
  3310. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3311. &priv->rf_subtype) == 0) {
  3312. priv->is_rf_subtype_valid = true;
  3313. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3314. }
  3315. if (of_property_read_bool(pdev->dev.of_node,
  3316. "qcom,is_slate_rfa")) {
  3317. priv->is_slate_rfa = true;
  3318. icnss_pr_err("SLATE rfa is enabled\n");
  3319. }
  3320. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3321. priv->device_id == WCN6450_DEVICE_ID) {
  3322. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3323. "msi_addr");
  3324. if (!res) {
  3325. icnss_pr_err("MSI address not found in DT\n");
  3326. ret = -EINVAL;
  3327. goto put_clk;
  3328. }
  3329. priv->msi_addr_pa = res->start;
  3330. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3331. PAGE_SIZE,
  3332. DMA_FROM_DEVICE, 0);
  3333. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3334. icnss_pr_err("MSI: failed to map msi address\n");
  3335. priv->msi_addr_iova = 0;
  3336. ret = -ENOMEM;
  3337. goto put_clk;
  3338. }
  3339. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3340. &priv->msi_addr_pa,
  3341. priv->msi_addr_iova);
  3342. ret = of_property_read_u32_index(dev->of_node,
  3343. "interrupts",
  3344. 1,
  3345. &int_prop);
  3346. if (ret) {
  3347. icnss_pr_dbg("Read interrupt prop failed");
  3348. goto put_clk;
  3349. }
  3350. priv->msi_base_data = int_prop + 32;
  3351. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3352. priv->msi_base_data, int_prop);
  3353. icnss_get_msi_assignment(priv);
  3354. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3355. res = platform_get_resource(priv->pdev,
  3356. IORESOURCE_IRQ, i);
  3357. if (!res) {
  3358. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3359. ret = -ENODEV;
  3360. goto put_clk;
  3361. } else {
  3362. priv->srng_irqs[i] = res->start;
  3363. }
  3364. }
  3365. }
  3366. return 0;
  3367. put_clk:
  3368. icnss_put_clk(priv);
  3369. put_vreg:
  3370. icnss_put_vreg(priv);
  3371. out:
  3372. return ret;
  3373. }
  3374. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3375. {
  3376. int ret = 0;
  3377. struct platform_device *pdev = priv->pdev;
  3378. struct device *dev = &pdev->dev;
  3379. struct device_node *np = NULL;
  3380. u64 prop_size = 0;
  3381. const __be32 *addrp = NULL;
  3382. np = of_parse_phandle(dev->of_node,
  3383. "qcom,wlan-msa-fixed-region", 0);
  3384. if (np) {
  3385. addrp = of_get_address(np, 0, &prop_size, NULL);
  3386. if (!addrp) {
  3387. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3388. ret = -EINVAL;
  3389. of_node_put(np);
  3390. goto out;
  3391. }
  3392. priv->msa_pa = of_translate_address(np, addrp);
  3393. if (priv->msa_pa == OF_BAD_ADDR) {
  3394. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3395. ret = -EINVAL;
  3396. of_node_put(np);
  3397. goto out;
  3398. }
  3399. of_node_put(np);
  3400. priv->msa_va = memremap(priv->msa_pa,
  3401. (unsigned long)prop_size, MEMREMAP_WT);
  3402. if (!priv->msa_va) {
  3403. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3404. &priv->msa_pa);
  3405. ret = -EINVAL;
  3406. goto out;
  3407. }
  3408. priv->msa_mem_size = prop_size;
  3409. } else {
  3410. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3411. &priv->msa_mem_size);
  3412. if (ret || priv->msa_mem_size == 0) {
  3413. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3414. priv->msa_mem_size, ret);
  3415. goto out;
  3416. }
  3417. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3418. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3419. if (!priv->msa_va) {
  3420. icnss_pr_err("DMA alloc failed for MSA\n");
  3421. ret = -ENOMEM;
  3422. goto out;
  3423. }
  3424. }
  3425. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3426. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3427. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3428. "qcom,fw-prefix");
  3429. return 0;
  3430. out:
  3431. return ret;
  3432. }
  3433. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3434. struct device *dev, unsigned long iova,
  3435. int flags, void *handler_token)
  3436. {
  3437. struct icnss_priv *priv = handler_token;
  3438. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3439. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3440. if (!priv) {
  3441. icnss_pr_err("priv is NULL\n");
  3442. return -ENODEV;
  3443. }
  3444. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3445. fw_down_data.crashed = true;
  3446. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3447. &fw_down_data);
  3448. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3449. &fw_down_data);
  3450. }
  3451. icnss_trigger_recovery(&priv->pdev->dev);
  3452. /* IOMMU driver requires non-zero return value to print debug info. */
  3453. return -EINVAL;
  3454. }
  3455. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3456. {
  3457. int ret = 0;
  3458. struct platform_device *pdev = priv->pdev;
  3459. struct device *dev = &pdev->dev;
  3460. const char *iommu_dma_type;
  3461. struct resource *res;
  3462. u32 addr_win[2];
  3463. ret = of_property_read_u32_array(dev->of_node,
  3464. "qcom,iommu-dma-addr-pool",
  3465. addr_win,
  3466. ARRAY_SIZE(addr_win));
  3467. if (ret) {
  3468. icnss_pr_err("SMMU IOVA base not found\n");
  3469. } else {
  3470. priv->smmu_iova_start = addr_win[0];
  3471. priv->smmu_iova_len = addr_win[1];
  3472. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3473. &priv->smmu_iova_start,
  3474. priv->smmu_iova_len);
  3475. priv->iommu_domain =
  3476. iommu_get_domain_for_dev(&pdev->dev);
  3477. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3478. &iommu_dma_type);
  3479. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3480. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3481. priv->smmu_s1_enable = true;
  3482. if (priv->device_id == WCN6750_DEVICE_ID ||
  3483. priv->device_id == WCN6450_DEVICE_ID)
  3484. iommu_set_fault_handler(priv->iommu_domain,
  3485. icnss_smmu_fault_handler,
  3486. priv);
  3487. }
  3488. res = platform_get_resource_byname(pdev,
  3489. IORESOURCE_MEM,
  3490. "smmu_iova_ipa");
  3491. if (!res) {
  3492. icnss_pr_err("SMMU IOVA IPA not found\n");
  3493. } else {
  3494. priv->smmu_iova_ipa_start = res->start;
  3495. priv->smmu_iova_ipa_current = res->start;
  3496. priv->smmu_iova_ipa_len = resource_size(res);
  3497. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3498. &priv->smmu_iova_ipa_start,
  3499. priv->smmu_iova_ipa_len);
  3500. }
  3501. }
  3502. return 0;
  3503. }
  3504. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3505. {
  3506. if (!priv)
  3507. return -ENODEV;
  3508. if (!priv->smmu_iova_len)
  3509. return -EINVAL;
  3510. *addr = priv->smmu_iova_start;
  3511. *size = priv->smmu_iova_len;
  3512. return 0;
  3513. }
  3514. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3515. {
  3516. if (!priv)
  3517. return -ENODEV;
  3518. if (!priv->smmu_iova_ipa_len)
  3519. return -EINVAL;
  3520. *addr = priv->smmu_iova_ipa_start;
  3521. *size = priv->smmu_iova_ipa_len;
  3522. return 0;
  3523. }
  3524. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3525. char *name)
  3526. {
  3527. if (!priv)
  3528. return;
  3529. if (!priv->use_prefix_path) {
  3530. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3531. return;
  3532. }
  3533. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3534. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3535. ADRASTEA_PATH_PREFIX "%s", name);
  3536. else if (priv->device_id == WCN6750_DEVICE_ID)
  3537. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3538. QCA6750_PATH_PREFIX "%s", name);
  3539. else if (priv->device_id == WCN6450_DEVICE_ID)
  3540. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3541. WCN6450_PATH_PREFIX "%s", name);
  3542. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3543. }
  3544. static const struct platform_device_id icnss_platform_id_table[] = {
  3545. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3546. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3547. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3548. { },
  3549. };
  3550. static const struct of_device_id icnss_dt_match[] = {
  3551. {
  3552. .compatible = "qcom,wcn6750",
  3553. .data = (void *)&icnss_platform_id_table[0]},
  3554. {
  3555. .compatible = "qcom,icnss",
  3556. .data = (void *)&icnss_platform_id_table[1]},
  3557. {
  3558. .compatible = "qcom,wcn6450",
  3559. .data = (void *)&icnss_platform_id_table[2]},
  3560. { },
  3561. };
  3562. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3563. static void icnss_init_control_params(struct icnss_priv *priv)
  3564. {
  3565. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3566. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3567. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3568. if (priv->device_id == WCN6750_DEVICE_ID ||
  3569. of_property_read_bool(priv->pdev->dev.of_node,
  3570. "wpss-support-enable"))
  3571. priv->wpss_supported = true;
  3572. if (of_property_read_bool(priv->pdev->dev.of_node,
  3573. "bdf-download-support"))
  3574. priv->bdf_download_support = true;
  3575. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3576. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3577. }
  3578. static void icnss_read_device_configs(struct icnss_priv *priv)
  3579. {
  3580. if (of_property_read_bool(priv->pdev->dev.of_node,
  3581. "wlan-ipa-disabled")) {
  3582. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3583. }
  3584. if (of_property_read_bool(priv->pdev->dev.of_node,
  3585. "qcom,wpss-self-recovery"))
  3586. priv->wpss_self_recovery_enabled = true;
  3587. }
  3588. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3589. {
  3590. pm_runtime_get_sync(&priv->pdev->dev);
  3591. pm_runtime_forbid(&priv->pdev->dev);
  3592. pm_runtime_set_active(&priv->pdev->dev);
  3593. pm_runtime_enable(&priv->pdev->dev);
  3594. }
  3595. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3596. {
  3597. pm_runtime_disable(&priv->pdev->dev);
  3598. pm_runtime_allow(&priv->pdev->dev);
  3599. pm_runtime_put_sync(&priv->pdev->dev);
  3600. }
  3601. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3602. {
  3603. return of_property_read_bool(priv->pdev->dev.of_node,
  3604. "use-nv-mac");
  3605. }
  3606. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3607. {
  3608. struct icnss_subsys_restart_level_data *restart_level_data;
  3609. icnss_pr_info("rproc name: %s recovery disable: %d",
  3610. rproc->name, rproc->recovery_disabled);
  3611. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3612. if (!restart_level_data)
  3613. return;
  3614. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3615. if (rproc->recovery_disabled)
  3616. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3617. else
  3618. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3619. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3620. 0, restart_level_data);
  3621. }
  3622. }
  3623. static int icnss_probe(struct platform_device *pdev)
  3624. {
  3625. int ret = 0;
  3626. struct device *dev = &pdev->dev;
  3627. struct icnss_priv *priv;
  3628. const struct of_device_id *of_id;
  3629. const struct platform_device_id *device_id;
  3630. if (dev_get_drvdata(dev)) {
  3631. icnss_pr_err("Driver is already initialized\n");
  3632. return -EEXIST;
  3633. }
  3634. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3635. if (!of_id || !of_id->data) {
  3636. icnss_pr_err("Failed to find of match device!\n");
  3637. ret = -ENODEV;
  3638. goto out_reset_drvdata;
  3639. }
  3640. device_id = of_id->data;
  3641. icnss_pr_dbg("Platform driver probe\n");
  3642. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3643. if (!priv)
  3644. return -ENOMEM;
  3645. priv->magic = ICNSS_MAGIC;
  3646. dev_set_drvdata(dev, priv);
  3647. priv->pdev = pdev;
  3648. priv->device_id = device_id->driver_data;
  3649. priv->is_chain1_supported = true;
  3650. INIT_LIST_HEAD(&priv->vreg_list);
  3651. INIT_LIST_HEAD(&priv->clk_list);
  3652. icnss_allow_recursive_recovery(dev);
  3653. icnss_init_control_params(priv);
  3654. icnss_read_device_configs(priv);
  3655. ret = icnss_resource_parse(priv);
  3656. if (ret)
  3657. goto out_reset_drvdata;
  3658. ret = icnss_msa_dt_parse(priv);
  3659. if (ret)
  3660. goto out_free_resources;
  3661. ret = icnss_smmu_dt_parse(priv);
  3662. if (ret)
  3663. goto out_free_resources;
  3664. spin_lock_init(&priv->event_lock);
  3665. spin_lock_init(&priv->on_off_lock);
  3666. spin_lock_init(&priv->soc_wake_msg_lock);
  3667. mutex_init(&priv->dev_lock);
  3668. mutex_init(&priv->tcdev_lock);
  3669. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3670. if (!priv->event_wq) {
  3671. icnss_pr_err("Workqueue creation failed\n");
  3672. ret = -EFAULT;
  3673. goto smmu_cleanup;
  3674. }
  3675. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3676. INIT_LIST_HEAD(&priv->event_list);
  3677. ret = icnss_register_fw_service(priv);
  3678. if (ret < 0) {
  3679. icnss_pr_err("fw service registration failed: %d\n", ret);
  3680. goto out_destroy_wq;
  3681. }
  3682. icnss_enable_recovery(priv);
  3683. icnss_debugfs_create(priv);
  3684. icnss_sysfs_create(priv);
  3685. ret = device_init_wakeup(&priv->pdev->dev, true);
  3686. if (ret)
  3687. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3688. ret);
  3689. icnss_set_plat_priv(priv);
  3690. init_completion(&priv->unblock_shutdown);
  3691. if (priv->is_slate_rfa)
  3692. init_completion(&priv->slate_boot_complete);
  3693. if (priv->device_id == WCN6750_DEVICE_ID ||
  3694. priv->device_id == WCN6450_DEVICE_ID) {
  3695. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3696. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3697. if (!priv->soc_wake_wq) {
  3698. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3699. ret = -EFAULT;
  3700. goto out_unregister_fw_service;
  3701. }
  3702. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3703. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3704. ret = icnss_genl_init();
  3705. if (ret < 0)
  3706. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3707. init_completion(&priv->smp2p_soc_wake_wait);
  3708. icnss_runtime_pm_init(priv);
  3709. icnss_aop_mbox_init(priv);
  3710. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3711. priv->bdf_download_support = true;
  3712. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3713. }
  3714. if (priv->wpss_supported) {
  3715. ret = icnss_dms_init(priv);
  3716. if (ret)
  3717. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3718. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3719. icnss_pr_dbg("NV MAC feature is %s\n",
  3720. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3721. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3722. }
  3723. timer_setup(&priv->recovery_timer,
  3724. icnss_recovery_timeout_hdlr, 0);
  3725. if (priv->wpss_self_recovery_enabled) {
  3726. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3727. timer_setup(&priv->wpss_ssr_timer,
  3728. icnss_wpss_ssr_timeout_hdlr, 0);
  3729. }
  3730. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3731. icnss_pr_info("Platform driver probed successfully\n");
  3732. return 0;
  3733. out_unregister_fw_service:
  3734. icnss_unregister_fw_service(priv);
  3735. out_destroy_wq:
  3736. destroy_workqueue(priv->event_wq);
  3737. smmu_cleanup:
  3738. priv->iommu_domain = NULL;
  3739. out_free_resources:
  3740. icnss_put_resources(priv);
  3741. out_reset_drvdata:
  3742. dev_set_drvdata(dev, NULL);
  3743. return ret;
  3744. }
  3745. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3746. {
  3747. if (IS_ERR_OR_NULL(ramdump_info))
  3748. return;
  3749. device_unregister(ramdump_info->dev);
  3750. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3751. kfree(ramdump_info);
  3752. }
  3753. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3754. {
  3755. if (priv->batt_psy)
  3756. power_supply_put(penv->batt_psy);
  3757. if (priv->psf_supported) {
  3758. flush_workqueue(priv->soc_update_wq);
  3759. destroy_workqueue(priv->soc_update_wq);
  3760. power_supply_unreg_notifier(&priv->psf_nb);
  3761. }
  3762. }
  3763. static int icnss_remove(struct platform_device *pdev)
  3764. {
  3765. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3766. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3767. del_timer(&priv->recovery_timer);
  3768. if (priv->wpss_self_recovery_enabled)
  3769. del_timer(&priv->wpss_ssr_timer);
  3770. device_init_wakeup(&priv->pdev->dev, false);
  3771. icnss_debugfs_destroy(priv);
  3772. icnss_unregister_power_supply_notifier(penv);
  3773. icnss_sysfs_destroy(priv);
  3774. complete_all(&priv->unblock_shutdown);
  3775. if (priv->is_slate_rfa)
  3776. icnss_slate_ssr_unregister_notifier(priv);
  3777. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3778. if (priv->wpss_supported) {
  3779. icnss_dms_deinit(priv);
  3780. icnss_wpss_early_ssr_unregister_notifier(priv);
  3781. icnss_wpss_ssr_unregister_notifier(priv);
  3782. } else {
  3783. icnss_modem_ssr_unregister_notifier(priv);
  3784. icnss_pdr_unregister_notifier(priv);
  3785. }
  3786. if (priv->device_id == WCN6750_DEVICE_ID ||
  3787. priv->device_id == WCN6450_DEVICE_ID) {
  3788. icnss_genl_exit();
  3789. icnss_runtime_pm_deinit(priv);
  3790. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3791. mbox_free_channel(priv->mbox_chan);
  3792. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3793. complete_all(&priv->smp2p_soc_wake_wait);
  3794. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3795. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3796. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3797. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3798. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3799. if (priv->soc_wake_wq)
  3800. destroy_workqueue(priv->soc_wake_wq);
  3801. }
  3802. class_destroy(priv->icnss_ramdump_class);
  3803. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3804. icnss_unregister_fw_service(priv);
  3805. if (priv->event_wq)
  3806. destroy_workqueue(priv->event_wq);
  3807. priv->iommu_domain = NULL;
  3808. icnss_hw_power_off(priv);
  3809. icnss_put_resources(priv);
  3810. dev_set_drvdata(&pdev->dev, NULL);
  3811. return 0;
  3812. }
  3813. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3814. {
  3815. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3816. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3817. ICNSS_ASSERT(0);
  3818. }
  3819. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3820. {
  3821. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3822. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3823. priv->state);
  3824. schedule_work(&wpss_ssr_work);
  3825. }
  3826. #ifdef CONFIG_PM_SLEEP
  3827. static int icnss_pm_suspend(struct device *dev)
  3828. {
  3829. struct icnss_priv *priv = dev_get_drvdata(dev);
  3830. int ret = 0;
  3831. if (priv->magic != ICNSS_MAGIC) {
  3832. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3833. dev, priv, priv->magic);
  3834. return -EINVAL;
  3835. }
  3836. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3837. if (!priv->ops || !priv->ops->pm_suspend ||
  3838. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3839. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3840. return 0;
  3841. ret = priv->ops->pm_suspend(dev);
  3842. if (ret == 0) {
  3843. if (priv->device_id == WCN6750_DEVICE_ID ||
  3844. priv->device_id == WCN6450_DEVICE_ID) {
  3845. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3846. !test_bit(ICNSS_MODE_ON, &priv->state))
  3847. return 0;
  3848. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3849. ICNSS_SMP2P_OUT_POWER_SAVE);
  3850. }
  3851. priv->stats.pm_suspend++;
  3852. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3853. } else {
  3854. priv->stats.pm_suspend_err++;
  3855. }
  3856. return ret;
  3857. }
  3858. static int icnss_pm_resume(struct device *dev)
  3859. {
  3860. struct icnss_priv *priv = dev_get_drvdata(dev);
  3861. int ret = 0;
  3862. if (priv->magic != ICNSS_MAGIC) {
  3863. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3864. dev, priv, priv->magic);
  3865. return -EINVAL;
  3866. }
  3867. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3868. if (!priv->ops || !priv->ops->pm_resume ||
  3869. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3870. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3871. goto out;
  3872. ret = priv->ops->pm_resume(dev);
  3873. out:
  3874. if (ret == 0) {
  3875. priv->stats.pm_resume++;
  3876. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3877. } else {
  3878. priv->stats.pm_resume_err++;
  3879. }
  3880. return ret;
  3881. }
  3882. static int icnss_pm_suspend_noirq(struct device *dev)
  3883. {
  3884. struct icnss_priv *priv = dev_get_drvdata(dev);
  3885. int ret = 0;
  3886. if (priv->magic != ICNSS_MAGIC) {
  3887. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3888. dev, priv, priv->magic);
  3889. return -EINVAL;
  3890. }
  3891. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3892. if (!priv->ops || !priv->ops->suspend_noirq ||
  3893. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3894. goto out;
  3895. ret = priv->ops->suspend_noirq(dev);
  3896. out:
  3897. if (ret == 0) {
  3898. priv->stats.pm_suspend_noirq++;
  3899. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3900. } else {
  3901. priv->stats.pm_suspend_noirq_err++;
  3902. }
  3903. return ret;
  3904. }
  3905. static int icnss_pm_resume_noirq(struct device *dev)
  3906. {
  3907. struct icnss_priv *priv = dev_get_drvdata(dev);
  3908. int ret = 0;
  3909. if (priv->magic != ICNSS_MAGIC) {
  3910. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3911. dev, priv, priv->magic);
  3912. return -EINVAL;
  3913. }
  3914. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3915. if (!priv->ops || !priv->ops->resume_noirq ||
  3916. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3917. goto out;
  3918. ret = priv->ops->resume_noirq(dev);
  3919. out:
  3920. if (ret == 0) {
  3921. priv->stats.pm_resume_noirq++;
  3922. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3923. } else {
  3924. priv->stats.pm_resume_noirq_err++;
  3925. }
  3926. return ret;
  3927. }
  3928. static int icnss_pm_runtime_suspend(struct device *dev)
  3929. {
  3930. struct icnss_priv *priv = dev_get_drvdata(dev);
  3931. int ret = 0;
  3932. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3933. icnss_pr_err("Ignore runtime suspend:\n");
  3934. goto out;
  3935. }
  3936. if (priv->magic != ICNSS_MAGIC) {
  3937. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3938. dev, priv, priv->magic);
  3939. return -EINVAL;
  3940. }
  3941. if (!priv->ops || !priv->ops->runtime_suspend ||
  3942. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3943. goto out;
  3944. icnss_pr_vdbg("Runtime suspend\n");
  3945. ret = priv->ops->runtime_suspend(dev);
  3946. if (!ret) {
  3947. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3948. !test_bit(ICNSS_MODE_ON, &priv->state))
  3949. return 0;
  3950. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3951. ICNSS_SMP2P_OUT_POWER_SAVE);
  3952. }
  3953. out:
  3954. return ret;
  3955. }
  3956. static int icnss_pm_runtime_resume(struct device *dev)
  3957. {
  3958. struct icnss_priv *priv = dev_get_drvdata(dev);
  3959. int ret = 0;
  3960. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3961. icnss_pr_err("Ignore runtime resume\n");
  3962. goto out;
  3963. }
  3964. if (priv->magic != ICNSS_MAGIC) {
  3965. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3966. dev, priv, priv->magic);
  3967. return -EINVAL;
  3968. }
  3969. if (!priv->ops || !priv->ops->runtime_resume ||
  3970. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3971. goto out;
  3972. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3973. ret = priv->ops->runtime_resume(dev);
  3974. out:
  3975. return ret;
  3976. }
  3977. static int icnss_pm_runtime_idle(struct device *dev)
  3978. {
  3979. struct icnss_priv *priv = dev_get_drvdata(dev);
  3980. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3981. icnss_pr_err("Ignore runtime idle\n");
  3982. goto out;
  3983. }
  3984. icnss_pr_vdbg("Runtime idle\n");
  3985. pm_request_autosuspend(dev);
  3986. out:
  3987. return -EBUSY;
  3988. }
  3989. #endif
  3990. static const struct dev_pm_ops icnss_pm_ops = {
  3991. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3992. icnss_pm_resume)
  3993. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3994. icnss_pm_resume_noirq)
  3995. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3996. icnss_pm_runtime_idle)
  3997. };
  3998. static struct platform_driver icnss_driver = {
  3999. .probe = icnss_probe,
  4000. .remove = icnss_remove,
  4001. .driver = {
  4002. .name = "icnss2",
  4003. .pm = &icnss_pm_ops,
  4004. .of_match_table = icnss_dt_match,
  4005. },
  4006. };
  4007. static int __init icnss_initialize(void)
  4008. {
  4009. icnss_debug_init();
  4010. return platform_driver_register(&icnss_driver);
  4011. }
  4012. static void __exit icnss_exit(void)
  4013. {
  4014. platform_driver_unregister(&icnss_driver);
  4015. icnss_debug_deinit();
  4016. }
  4017. module_init(icnss_initialize);
  4018. module_exit(icnss_exit);
  4019. MODULE_LICENSE("GPL v2");
  4020. MODULE_DESCRIPTION("iWCN CORE platform driver");