hif_napi.c 48 KB

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  1. /*
  2. * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * DOC: hif_napi.c
  20. *
  21. * HIF NAPI interface implementation
  22. */
  23. #include <linux/string.h> /* memset */
  24. /* Linux headers */
  25. #include <linux/cpumask.h>
  26. #include <linux/cpufreq.h>
  27. #include <linux/cpu.h>
  28. #include <linux/topology.h>
  29. #include <linux/interrupt.h>
  30. #ifdef CONFIG_SCHED_CORE_CTL
  31. #include <linux/sched/core_ctl.h>
  32. #endif
  33. #include <pld_common.h>
  34. #include <linux/pm.h>
  35. /* Driver headers */
  36. #include <hif_napi.h>
  37. #include <hif_debug.h>
  38. #include <hif_io32.h>
  39. #include <ce_api.h>
  40. #include <ce_internal.h>
  41. #include <hif_irq_affinity.h>
  42. #include "qdf_cpuhp.h"
  43. #include "qdf_module.h"
  44. #include "qdf_net_if.h"
  45. #include "qdf_dev.h"
  46. #include "qdf_irq.h"
  47. enum napi_decision_vector {
  48. HIF_NAPI_NOEVENT = 0,
  49. HIF_NAPI_INITED = 1,
  50. HIF_NAPI_CONF_UP = 2
  51. };
  52. #define ENABLE_NAPI_MASK (HIF_NAPI_INITED | HIF_NAPI_CONF_UP)
  53. #ifdef RECEIVE_OFFLOAD
  54. /**
  55. * hif_rxthread_napi_poll() - dummy napi poll for rx_thread NAPI
  56. * @napi: Rx_thread NAPI
  57. * @budget: NAPI BUDGET
  58. *
  59. * Return: 0 as it is not supposed to be polled at all as it is not scheduled.
  60. */
  61. static int hif_rxthread_napi_poll(struct napi_struct *napi, int budget)
  62. {
  63. hif_err("This napi_poll should not be polled as we don't schedule it");
  64. QDF_ASSERT(0);
  65. return 0;
  66. }
  67. /**
  68. * hif_init_rx_thread_napi() - Initialize dummy Rx_thread NAPI
  69. * @napii: Handle to napi_info holding rx_thread napi
  70. *
  71. * Return: None
  72. */
  73. static void hif_init_rx_thread_napi(struct qca_napi_info *napii)
  74. {
  75. struct qdf_net_if *nd = (struct qdf_net_if *)&napii->rx_thread_netdev;
  76. qdf_net_if_create_dummy_if(nd);
  77. netif_napi_add(&napii->rx_thread_netdev, &napii->rx_thread_napi,
  78. hif_rxthread_napi_poll, 64);
  79. napi_enable(&napii->rx_thread_napi);
  80. }
  81. /**
  82. * hif_deinit_rx_thread_napi() - Deinitialize dummy Rx_thread NAPI
  83. * @napii: Handle to napi_info holding rx_thread napi
  84. *
  85. * Return: None
  86. */
  87. static void hif_deinit_rx_thread_napi(struct qca_napi_info *napii)
  88. {
  89. netif_napi_del(&napii->rx_thread_napi);
  90. }
  91. #else /* RECEIVE_OFFLOAD */
  92. static void hif_init_rx_thread_napi(struct qca_napi_info *napii)
  93. {
  94. }
  95. static void hif_deinit_rx_thread_napi(struct qca_napi_info *napii)
  96. {
  97. }
  98. #endif
  99. /**
  100. * hif_napi_create() - creates the NAPI structures for a given CE
  101. * @hif : pointer to hif context
  102. * @pipe_id: the CE id on which the instance will be created
  103. * @poll : poll function to be used for this NAPI instance
  104. * @budget : budget to be registered with the NAPI instance
  105. * @scale : scale factor on the weight (to scaler budget to 1000)
  106. * @flags : feature flags
  107. *
  108. * Description:
  109. * Creates NAPI instances. This function is called
  110. * unconditionally during initialization. It creates
  111. * napi structures through the proper HTC/HIF calls.
  112. * The structures are disabled on creation.
  113. * Note that for each NAPI instance a separate dummy netdev is used
  114. *
  115. * Return:
  116. * < 0: error
  117. * = 0: <should never happen>
  118. * > 0: id of the created object (for multi-NAPI, number of objects created)
  119. */
  120. int hif_napi_create(struct hif_opaque_softc *hif_ctx,
  121. int (*poll)(struct napi_struct *, int),
  122. int budget,
  123. int scale,
  124. uint8_t flags)
  125. {
  126. int i;
  127. struct qca_napi_data *napid;
  128. struct qca_napi_info *napii;
  129. struct CE_state *ce_state;
  130. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  131. int rc = 0;
  132. NAPI_DEBUG("-->(budget=%d, scale=%d)",
  133. budget, scale);
  134. NAPI_DEBUG("hif->napi_data.state = 0x%08x",
  135. hif->napi_data.state);
  136. NAPI_DEBUG("hif->napi_data.ce_map = 0x%08x",
  137. hif->napi_data.ce_map);
  138. napid = &(hif->napi_data);
  139. if (0 == (napid->state & HIF_NAPI_INITED)) {
  140. memset(napid, 0, sizeof(struct qca_napi_data));
  141. qdf_spinlock_create(&(napid->lock));
  142. napid->state |= HIF_NAPI_INITED;
  143. napid->flags = flags;
  144. rc = hif_napi_cpu_init(hif_ctx);
  145. if (rc != 0 && rc != -EALREADY) {
  146. hif_err("NAPI_initialization failed(rc=%d)", rc);
  147. rc = napid->ce_map;
  148. goto hnc_err;
  149. } else
  150. rc = 0;
  151. hif_debug("NAPI structures initialized, rc=%d", rc);
  152. }
  153. for (i = 0; i < hif->ce_count; i++) {
  154. ce_state = hif->ce_id_to_state[i];
  155. NAPI_DEBUG("ce %d: htt_rx=%d htt_tx=%d",
  156. i, ce_state->htt_rx_data,
  157. ce_state->htt_tx_data);
  158. if (ce_srng_based(hif))
  159. continue;
  160. if (!ce_state->htt_rx_data)
  161. continue;
  162. /* Now this is a CE where we need NAPI on */
  163. NAPI_DEBUG("Creating NAPI on pipe %d", i);
  164. napii = qdf_mem_malloc(sizeof(*napii));
  165. napid->napis[i] = napii;
  166. if (!napii) {
  167. rc = -ENOMEM;
  168. goto napii_free;
  169. }
  170. }
  171. for (i = 0; i < hif->ce_count; i++) {
  172. napii = napid->napis[i];
  173. if (!napii)
  174. continue;
  175. NAPI_DEBUG("initializing NAPI for pipe %d", i);
  176. memset(napii, 0, sizeof(struct qca_napi_info));
  177. napii->scale = scale;
  178. napii->id = NAPI_PIPE2ID(i);
  179. napii->hif_ctx = hif_ctx;
  180. napii->irq = pld_get_irq(hif->qdf_dev->dev, i);
  181. if (napii->irq < 0)
  182. hif_warn("bad IRQ value for CE %d: %d", i, napii->irq);
  183. qdf_net_if_create_dummy_if((struct qdf_net_if *)&napii->netdev);
  184. NAPI_DEBUG("adding napi=%pK to netdev=%pK (poll=%pK, bdgt=%d)",
  185. &(napii->napi), &(napii->netdev), poll, budget);
  186. netif_napi_add(&(napii->netdev), &(napii->napi), poll, budget);
  187. NAPI_DEBUG("after napi_add");
  188. NAPI_DEBUG("napi=0x%pK, netdev=0x%pK",
  189. &(napii->napi), &(napii->netdev));
  190. NAPI_DEBUG("napi.dev_list.prev=0x%pK, next=0x%pK",
  191. napii->napi.dev_list.prev,
  192. napii->napi.dev_list.next);
  193. NAPI_DEBUG("dev.napi_list.prev=0x%pK, next=0x%pK",
  194. napii->netdev.napi_list.prev,
  195. napii->netdev.napi_list.next);
  196. hif_init_rx_thread_napi(napii);
  197. napii->lro_ctx = qdf_lro_init();
  198. NAPI_DEBUG("Registering LRO for ce_id %d NAPI callback for %d lro_ctx %pK\n",
  199. i, napii->id, napii->lro_ctx);
  200. /* It is OK to change the state variable below without
  201. * protection as there should be no-one around yet
  202. */
  203. napid->ce_map |= (0x01 << i);
  204. hif_debug("NAPI id %d created for pipe %d", napii->id, i);
  205. }
  206. /* no ces registered with the napi */
  207. if (!ce_srng_based(hif) && napid->ce_map == 0) {
  208. hif_warn("no napis created for copy engines");
  209. rc = -EFAULT;
  210. goto napii_free;
  211. }
  212. NAPI_DEBUG("napi map = %x", napid->ce_map);
  213. NAPI_DEBUG("NAPI ids created for all applicable pipes");
  214. return napid->ce_map;
  215. napii_free:
  216. for (i = 0; i < hif->ce_count; i++) {
  217. napii = napid->napis[i];
  218. napid->napis[i] = NULL;
  219. if (napii)
  220. qdf_mem_free(napii);
  221. }
  222. hnc_err:
  223. NAPI_DEBUG("<--napi_instances_map=%x]", napid->ce_map);
  224. return rc;
  225. }
  226. qdf_export_symbol(hif_napi_create);
  227. #ifdef RECEIVE_OFFLOAD
  228. void hif_napi_rx_offld_flush_cb_register(struct hif_opaque_softc *hif_hdl,
  229. void (offld_flush_handler)(void *))
  230. {
  231. int i;
  232. struct CE_state *ce_state;
  233. struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl);
  234. struct qca_napi_data *napid;
  235. struct qca_napi_info *napii;
  236. if (!scn) {
  237. hif_err("hif_state NULL!");
  238. QDF_ASSERT(0);
  239. return;
  240. }
  241. napid = hif_napi_get_all(hif_hdl);
  242. for (i = 0; i < scn->ce_count; i++) {
  243. ce_state = scn->ce_id_to_state[i];
  244. if (ce_state && (ce_state->htt_rx_data)) {
  245. napii = napid->napis[i];
  246. napii->offld_flush_cb = offld_flush_handler;
  247. hif_debug("Registering offload for ce_id %d NAPI callback for %d flush_cb %pK",
  248. i, napii->id, napii->offld_flush_cb);
  249. }
  250. }
  251. }
  252. void hif_napi_rx_offld_flush_cb_deregister(struct hif_opaque_softc *hif_hdl)
  253. {
  254. int i;
  255. struct CE_state *ce_state;
  256. struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl);
  257. struct qca_napi_data *napid;
  258. struct qca_napi_info *napii;
  259. if (!scn) {
  260. hif_err("hif_state NULL!");
  261. QDF_ASSERT(0);
  262. return;
  263. }
  264. napid = hif_napi_get_all(hif_hdl);
  265. for (i = 0; i < scn->ce_count; i++) {
  266. ce_state = scn->ce_id_to_state[i];
  267. if (ce_state && (ce_state->htt_rx_data)) {
  268. napii = napid->napis[i];
  269. hif_debug("deRegistering offld for ce_id %d NAPI callback for %d flush_cb %pK",
  270. i, napii->id, napii->offld_flush_cb);
  271. /* Not required */
  272. napii->offld_flush_cb = NULL;
  273. }
  274. }
  275. }
  276. #endif /* RECEIVE_OFFLOAD */
  277. /**
  278. *
  279. * hif_napi_destroy() - destroys the NAPI structures for a given instance
  280. * @hif : pointer to hif context
  281. * @ce_id : the CE id whose napi instance will be destroyed
  282. * @force : if set, will destroy even if entry is active (de-activates)
  283. *
  284. * Description:
  285. * Destroy a given NAPI instance. This function is called
  286. * unconditionally during cleanup.
  287. * Refuses to destroy an entry of it is still enabled (unless force=1)
  288. * Marks the whole napi_data invalid if all instances are destroyed.
  289. *
  290. * Return:
  291. * -EINVAL: specific entry has not been created
  292. * -EPERM : specific entry is still active
  293. * 0 < : error
  294. * 0 = : success
  295. */
  296. int hif_napi_destroy(struct hif_opaque_softc *hif_ctx,
  297. uint8_t id,
  298. int force)
  299. {
  300. uint8_t ce = NAPI_ID2PIPE(id);
  301. int rc = 0;
  302. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  303. NAPI_DEBUG("-->(id=%d, force=%d)", id, force);
  304. if (0 == (hif->napi_data.state & HIF_NAPI_INITED)) {
  305. hif_err("NAPI not initialized or entry %d not created", id);
  306. rc = -EINVAL;
  307. } else if (0 == (hif->napi_data.ce_map & (0x01 << ce))) {
  308. hif_err("NAPI instance %d (pipe %d) not created", id, ce);
  309. if (hif->napi_data.napis[ce])
  310. hif_err("memory allocated but ce_map not set %d (pipe %d)",
  311. id, ce);
  312. rc = -EINVAL;
  313. } else {
  314. struct qca_napi_data *napid;
  315. struct qca_napi_info *napii;
  316. napid = &(hif->napi_data);
  317. napii = napid->napis[ce];
  318. if (!napii) {
  319. if (napid->ce_map & (0x01 << ce))
  320. hif_err("napii & ce_map out of sync(ce %d)", ce);
  321. return -EINVAL;
  322. }
  323. if (hif->napi_data.state == HIF_NAPI_CONF_UP) {
  324. if (force) {
  325. napi_disable(&(napii->napi));
  326. hif_debug("NAPI entry %d force disabled", id);
  327. NAPI_DEBUG("NAPI %d force disabled", id);
  328. } else {
  329. hif_err("Cannot destroy active NAPI %d", id);
  330. rc = -EPERM;
  331. }
  332. }
  333. if (0 == rc) {
  334. NAPI_DEBUG("before napi_del");
  335. NAPI_DEBUG("napi.dlist.prv=0x%pK, next=0x%pK",
  336. napii->napi.dev_list.prev,
  337. napii->napi.dev_list.next);
  338. NAPI_DEBUG("dev.napi_l.prv=0x%pK, next=0x%pK",
  339. napii->netdev.napi_list.prev,
  340. napii->netdev.napi_list.next);
  341. qdf_lro_deinit(napii->lro_ctx);
  342. netif_napi_del(&(napii->napi));
  343. hif_deinit_rx_thread_napi(napii);
  344. napid->ce_map &= ~(0x01 << ce);
  345. napid->napis[ce] = NULL;
  346. napii->scale = 0;
  347. qdf_mem_free(napii);
  348. hif_debug("NAPI %d destroyed", id);
  349. /* if there are no active instances and
  350. * if they are all destroyed,
  351. * set the whole structure to uninitialized state
  352. */
  353. if (napid->ce_map == 0) {
  354. rc = hif_napi_cpu_deinit(hif_ctx);
  355. /* caller is tolerant to receiving !=0 rc */
  356. qdf_spinlock_destroy(&(napid->lock));
  357. memset(napid,
  358. 0, sizeof(struct qca_napi_data));
  359. hif_debug("no NAPI instances. Zapped");
  360. }
  361. }
  362. }
  363. return rc;
  364. }
  365. qdf_export_symbol(hif_napi_destroy);
  366. #ifdef FEATURE_LRO
  367. void *hif_napi_get_lro_info(struct hif_opaque_softc *hif_hdl, int napi_id)
  368. {
  369. struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl);
  370. struct qca_napi_data *napid;
  371. struct qca_napi_info *napii;
  372. napid = &(scn->napi_data);
  373. napii = napid->napis[NAPI_ID2PIPE(napi_id)];
  374. if (napii)
  375. return napii->lro_ctx;
  376. return 0;
  377. }
  378. #endif
  379. /**
  380. *
  381. * hif_napi_get_all() - returns the address of the whole HIF NAPI structure
  382. * @hif: pointer to hif context
  383. *
  384. * Description:
  385. * Returns the address of the whole structure
  386. *
  387. * Return:
  388. * <addr>: address of the whole HIF NAPI structure
  389. */
  390. inline struct qca_napi_data *hif_napi_get_all(struct hif_opaque_softc *hif_ctx)
  391. {
  392. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  393. return &(hif->napi_data);
  394. }
  395. struct qca_napi_info *hif_get_napi(int napi_id, struct qca_napi_data *napid)
  396. {
  397. int id = NAPI_ID2PIPE(napi_id);
  398. return napid->napis[id];
  399. }
  400. /**
  401. *
  402. * hif_napi_event() - reacts to events that impact NAPI
  403. * @hif : pointer to hif context
  404. * @evnt: event that has been detected
  405. * @data: more data regarding the event
  406. *
  407. * Description:
  408. * This function handles two types of events:
  409. * 1- Events that change the state of NAPI (enabled/disabled):
  410. * {NAPI_EVT_INI_FILE, NAPI_EVT_CMD_STATE}
  411. * The state is retrievable by "hdd_napi_enabled(-1)"
  412. * - NAPI will be on if either INI file is on and it has not been disabled
  413. * by a subsequent vendor CMD,
  414. * or it has been enabled by a vendor CMD.
  415. * 2- Events that change the CPU affinity of a NAPI instance/IRQ:
  416. * {NAPI_EVT_TPUT_STATE, NAPI_EVT_CPU_STATE}
  417. * - NAPI will support a throughput mode (HI/LO), kept at napid->napi_mode
  418. * - NAPI will switch throughput mode based on hdd_napi_throughput_policy()
  419. * - In LO tput mode, NAPI will yield control if its interrupts to the system
  420. * management functions. However in HI throughput mode, NAPI will actively
  421. * manage its interrupts/instances (by trying to disperse them out to
  422. * separate performance cores).
  423. * - CPU eligibility is kept up-to-date by NAPI_EVT_CPU_STATE events.
  424. *
  425. * + In some cases (roaming peer management is the only case so far), a
  426. * a client can trigger a "SERIALIZE" event. Basically, this means that the
  427. * users is asking NAPI to go into a truly single execution context state.
  428. * So, NAPI indicates to msm-irqbalancer that it wants to be blacklisted,
  429. * (if called for the first time) and then moves all IRQs (for NAPI
  430. * instances) to be collapsed to a single core. If called multiple times,
  431. * it will just re-collapse the CPUs. This is because blacklist-on() API
  432. * is reference-counted, and because the API has already been called.
  433. *
  434. * Such a user, should call "DESERIALIZE" (NORMAL) event, to set NAPI to go
  435. * to its "normal" operation. Optionally, they can give a timeout value (in
  436. * multiples of BusBandwidthCheckPeriod -- 100 msecs by default). In this
  437. * case, NAPI will just set the current throughput state to uninitialized
  438. * and set the delay period. Once policy handler is called, it would skip
  439. * applying the policy delay period times, and otherwise apply the policy.
  440. *
  441. * Return:
  442. * < 0: some error
  443. * = 0: event handled successfully
  444. */
  445. int hif_napi_event(struct hif_opaque_softc *hif_ctx, enum qca_napi_event event,
  446. void *data)
  447. {
  448. int rc = 0;
  449. uint32_t prev_state;
  450. int i;
  451. bool state_changed;
  452. struct napi_struct *napi;
  453. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  454. struct qca_napi_data *napid = &(hif->napi_data);
  455. enum qca_napi_tput_state tput_mode = QCA_NAPI_TPUT_UNINITIALIZED;
  456. enum {
  457. BLACKLIST_NOT_PENDING,
  458. BLACKLIST_ON_PENDING,
  459. BLACKLIST_OFF_PENDING
  460. } blacklist_pending = BLACKLIST_NOT_PENDING;
  461. NAPI_DEBUG("%s: -->(event=%d, aux=%pK)", __func__, event, data);
  462. if (ce_srng_based(hif))
  463. return hif_exec_event(hif_ctx, event, data);
  464. if ((napid->state & HIF_NAPI_INITED) == 0) {
  465. NAPI_DEBUG("%s: got event when NAPI not initialized",
  466. __func__);
  467. return -EINVAL;
  468. }
  469. qdf_spin_lock_bh(&(napid->lock));
  470. prev_state = napid->state;
  471. switch (event) {
  472. case NAPI_EVT_INI_FILE:
  473. case NAPI_EVT_CMD_STATE:
  474. case NAPI_EVT_INT_STATE: {
  475. int on = (data != ((void *)0));
  476. hif_debug("recved evnt: STATE_CMD %d; v = %d (state=0x%0x)",
  477. event, on, prev_state);
  478. if (on)
  479. if (prev_state & HIF_NAPI_CONF_UP) {
  480. hif_debug("Duplicate NAPI conf ON msg");
  481. } else {
  482. hif_debug("Setting state to ON");
  483. napid->state |= HIF_NAPI_CONF_UP;
  484. }
  485. else /* off request */
  486. if (prev_state & HIF_NAPI_CONF_UP) {
  487. hif_debug("Setting state to OFF");
  488. napid->state &= ~HIF_NAPI_CONF_UP;
  489. } else {
  490. hif_debug("Duplicate NAPI conf OFF msg");
  491. }
  492. break;
  493. }
  494. /* case NAPI_INIT_FILE/CMD_STATE */
  495. case NAPI_EVT_CPU_STATE: {
  496. int cpu = ((unsigned long int)data >> 16);
  497. int val = ((unsigned long int)data & 0x0ff);
  498. NAPI_DEBUG("%s: evt=CPU_STATE on CPU %d value=%d",
  499. __func__, cpu, val);
  500. /* state has already been set by hnc_cpu_notify_cb */
  501. if ((val == QCA_NAPI_CPU_DOWN) &&
  502. (napid->napi_mode == QCA_NAPI_TPUT_HI) && /* we manage */
  503. (napid->napi_cpu[cpu].napis != 0)) {
  504. NAPI_DEBUG("%s: Migrating NAPIs out of cpu %d",
  505. __func__, cpu);
  506. rc = hif_napi_cpu_migrate(napid,
  507. cpu,
  508. HNC_ACT_RELOCATE);
  509. napid->napi_cpu[cpu].napis = 0;
  510. }
  511. /* in QCA_NAPI_TPUT_LO case, napis MUST == 0 */
  512. break;
  513. }
  514. case NAPI_EVT_TPUT_STATE: {
  515. tput_mode = (enum qca_napi_tput_state)data;
  516. if (tput_mode == QCA_NAPI_TPUT_LO) {
  517. /* from TPUT_HI -> TPUT_LO */
  518. NAPI_DEBUG("%s: Moving to napi_tput_LO state",
  519. __func__);
  520. blacklist_pending = BLACKLIST_OFF_PENDING;
  521. /*
  522. * Ideally we should "collapse" interrupts here, since
  523. * we are "dispersing" interrupts in the "else" case.
  524. * This allows the possibility that our interrupts may
  525. * still be on the perf cluster the next time we enter
  526. * high tput mode. However, the irq_balancer is free
  527. * to move our interrupts to power cluster once
  528. * blacklisting has been turned off in the "else" case.
  529. */
  530. } else {
  531. /* from TPUT_LO -> TPUT->HI */
  532. NAPI_DEBUG("%s: Moving to napi_tput_HI state",
  533. __func__);
  534. rc = hif_napi_cpu_migrate(napid,
  535. HNC_ANY_CPU,
  536. HNC_ACT_DISPERSE);
  537. blacklist_pending = BLACKLIST_ON_PENDING;
  538. }
  539. napid->napi_mode = tput_mode;
  540. break;
  541. }
  542. case NAPI_EVT_USR_SERIAL: {
  543. unsigned long users = (unsigned long)data;
  544. NAPI_DEBUG("%s: User forced SERIALIZATION; users=%ld",
  545. __func__, users);
  546. rc = hif_napi_cpu_migrate(napid,
  547. HNC_ANY_CPU,
  548. HNC_ACT_COLLAPSE);
  549. if ((users == 0) && (rc == 0))
  550. blacklist_pending = BLACKLIST_ON_PENDING;
  551. break;
  552. }
  553. case NAPI_EVT_USR_NORMAL: {
  554. NAPI_DEBUG("%s: User forced DE-SERIALIZATION", __func__);
  555. if (!napid->user_cpu_affin_mask)
  556. blacklist_pending = BLACKLIST_OFF_PENDING;
  557. /*
  558. * Deserialization timeout is handled at hdd layer;
  559. * just mark current mode to uninitialized to ensure
  560. * it will be set when the delay is over
  561. */
  562. napid->napi_mode = QCA_NAPI_TPUT_UNINITIALIZED;
  563. break;
  564. }
  565. default: {
  566. hif_err("Unknown event: %d (data=0x%0lx)",
  567. event, (unsigned long) data);
  568. break;
  569. } /* default */
  570. }; /* switch */
  571. switch (blacklist_pending) {
  572. case BLACKLIST_ON_PENDING:
  573. /* assume the control of WLAN IRQs */
  574. hif_napi_cpu_blacklist(napid, BLACKLIST_ON);
  575. break;
  576. case BLACKLIST_OFF_PENDING:
  577. /* yield the control of WLAN IRQs */
  578. hif_napi_cpu_blacklist(napid, BLACKLIST_OFF);
  579. break;
  580. default: /* nothing to do */
  581. break;
  582. } /* switch blacklist_pending */
  583. /* we want to perform the comparison in lock:
  584. * there is a possiblity of hif_napi_event get called
  585. * from two different contexts (driver unload and cpu hotplug
  586. * notification) and napid->state get changed
  587. * in driver unload context and can lead to race condition
  588. * in cpu hotplug context. Therefore, perform the napid->state
  589. * comparison before releasing lock.
  590. */
  591. state_changed = (prev_state != napid->state);
  592. qdf_spin_unlock_bh(&(napid->lock));
  593. if (state_changed) {
  594. if (napid->state == ENABLE_NAPI_MASK) {
  595. rc = 1;
  596. for (i = 0; i < CE_COUNT_MAX; i++) {
  597. struct qca_napi_info *napii = napid->napis[i];
  598. if (napii) {
  599. napi = &(napii->napi);
  600. NAPI_DEBUG("%s: enabling NAPI %d",
  601. __func__, i);
  602. napi_enable(napi);
  603. }
  604. }
  605. } else {
  606. rc = 0;
  607. for (i = 0; i < CE_COUNT_MAX; i++) {
  608. struct qca_napi_info *napii = napid->napis[i];
  609. if (napii) {
  610. napi = &(napii->napi);
  611. NAPI_DEBUG("%s: disabling NAPI %d",
  612. __func__, i);
  613. napi_disable(napi);
  614. /* in case it is affined, remove it */
  615. qdf_dev_set_irq_affinity(napii->irq,
  616. NULL);
  617. }
  618. }
  619. }
  620. } else {
  621. hif_debug("no change in hif napi state (still %d)", prev_state);
  622. }
  623. NAPI_DEBUG("<--[rc=%d]", rc);
  624. return rc;
  625. }
  626. qdf_export_symbol(hif_napi_event);
  627. /**
  628. * hif_napi_enabled() - checks whether NAPI is enabled for given ce or not
  629. * @hif: hif context
  630. * @ce : CE instance (or -1, to check if any CEs are enabled)
  631. *
  632. * Return: bool
  633. */
  634. int hif_napi_enabled(struct hif_opaque_softc *hif_ctx, int ce)
  635. {
  636. int rc;
  637. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  638. if (-1 == ce)
  639. rc = ((hif->napi_data.state == ENABLE_NAPI_MASK));
  640. else
  641. rc = ((hif->napi_data.state == ENABLE_NAPI_MASK) &&
  642. (hif->napi_data.ce_map & (0x01 << ce)));
  643. return rc;
  644. }
  645. qdf_export_symbol(hif_napi_enabled);
  646. /**
  647. * hif_napi_created() - checks whether NAPI is created for given ce or not
  648. * @hif: hif context
  649. * @ce : CE instance
  650. *
  651. * Return: bool
  652. */
  653. bool hif_napi_created(struct hif_opaque_softc *hif_ctx, int ce)
  654. {
  655. int rc;
  656. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  657. rc = (hif->napi_data.ce_map & (0x01 << ce));
  658. return !!rc;
  659. }
  660. qdf_export_symbol(hif_napi_created);
  661. /**
  662. * hif_napi_enable_irq() - enables bus interrupts after napi_complete
  663. *
  664. * @hif: hif context
  665. * @id : id of NAPI instance calling this (used to determine the CE)
  666. *
  667. * Return: void
  668. */
  669. inline void hif_napi_enable_irq(struct hif_opaque_softc *hif, int id)
  670. {
  671. struct hif_softc *scn = HIF_GET_SOFTC(hif);
  672. hif_irq_enable(scn, NAPI_ID2PIPE(id));
  673. }
  674. /**
  675. * hif_napi_schedule() - schedules napi, updates stats
  676. * @scn: hif context
  677. * @ce_id: index of napi instance
  678. *
  679. * Return: false if napi didn't enable or already scheduled, otherwise true
  680. */
  681. bool hif_napi_schedule(struct hif_opaque_softc *hif_ctx, int ce_id)
  682. {
  683. int cpu = smp_processor_id();
  684. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  685. struct qca_napi_info *napii;
  686. napii = scn->napi_data.napis[ce_id];
  687. if (qdf_unlikely(!napii)) {
  688. hif_err("scheduling unallocated napi (ce:%d)", ce_id);
  689. qdf_atomic_dec(&scn->active_tasklet_cnt);
  690. return false;
  691. }
  692. if (test_bit(NAPI_STATE_SCHED, &napii->napi.state)) {
  693. NAPI_DEBUG("napi scheduled, return");
  694. qdf_atomic_dec(&scn->active_tasklet_cnt);
  695. return false;
  696. }
  697. hif_record_ce_desc_event(scn, ce_id, NAPI_SCHEDULE,
  698. NULL, NULL, 0, 0);
  699. napii->stats[cpu].napi_schedules++;
  700. NAPI_DEBUG("scheduling napi %d (ce:%d)", napii->id, ce_id);
  701. napi_schedule(&(napii->napi));
  702. return true;
  703. }
  704. qdf_export_symbol(hif_napi_schedule);
  705. /**
  706. * hif_napi_correct_cpu() - correct the interrupt affinity for napi if needed
  707. * @napi_info: pointer to qca_napi_info for the napi instance
  708. *
  709. * Return: true => interrupt already on correct cpu, no correction needed
  710. * false => interrupt on wrong cpu, correction done for cpu affinity
  711. * of the interrupt
  712. */
  713. static inline
  714. bool hif_napi_correct_cpu(struct qca_napi_info *napi_info)
  715. {
  716. bool right_cpu = true;
  717. int rc = 0;
  718. int cpu;
  719. struct qca_napi_data *napid;
  720. QDF_STATUS ret;
  721. napid = hif_napi_get_all(GET_HIF_OPAQUE_HDL(napi_info->hif_ctx));
  722. if (napid->flags & QCA_NAPI_FEATURE_CPU_CORRECTION) {
  723. cpu = qdf_get_cpu();
  724. if (unlikely((hif_napi_cpu_blacklist(napid,
  725. BLACKLIST_QUERY) > 0) &&
  726. (cpu != napi_info->cpu))) {
  727. right_cpu = false;
  728. NAPI_DEBUG("interrupt on wrong CPU, correcting");
  729. napi_info->cpumask.bits[0] = (0x01 << napi_info->cpu);
  730. qdf_dev_modify_irq_status(napi_info->irq,
  731. QDF_IRQ_NO_BALANCING, 0);
  732. ret = qdf_dev_set_irq_affinity(napi_info->irq,
  733. (struct qdf_cpu_mask *)
  734. &napi_info->cpumask);
  735. rc = qdf_status_to_os_return(ret);
  736. qdf_dev_modify_irq_status(napi_info->irq, 0,
  737. QDF_IRQ_NO_BALANCING);
  738. if (rc)
  739. hif_err("Setting irq affinity hint: %d", rc);
  740. else
  741. napi_info->stats[cpu].cpu_corrected++;
  742. }
  743. }
  744. return right_cpu;
  745. }
  746. #ifdef RECEIVE_OFFLOAD
  747. /**
  748. * hif_napi_offld_flush_cb() - Call upper layer flush callback
  749. * @napi_info: Handle to hif_napi_info
  750. *
  751. * Return: None
  752. */
  753. static void hif_napi_offld_flush_cb(struct qca_napi_info *napi_info)
  754. {
  755. if (napi_info->offld_flush_cb)
  756. napi_info->offld_flush_cb(napi_info);
  757. }
  758. #else
  759. static void hif_napi_offld_flush_cb(struct qca_napi_info *napi_info)
  760. {
  761. }
  762. #endif
  763. /**
  764. * hif_napi_poll() - NAPI poll routine
  765. * @napi : pointer to NAPI struct as kernel holds it
  766. * @budget:
  767. *
  768. * This is the body of the poll function.
  769. * The poll function is called by kernel. So, there is a wrapper
  770. * function in HDD, which in turn calls this function.
  771. * Two main reasons why the whole thing is not implemented in HDD:
  772. * a) references to things like ce_service that HDD is not aware of
  773. * b) proximity to the implementation of ce_tasklet, which the body
  774. * of this function should be very close to.
  775. *
  776. * NOTE TO THE MAINTAINER:
  777. * Consider this function and ce_tasklet very tightly coupled pairs.
  778. * Any changes to ce_tasklet or this function may likely need to be
  779. * reflected in the counterpart.
  780. *
  781. * Returns:
  782. * int: the amount of work done in this poll (<= budget)
  783. */
  784. int hif_napi_poll(struct hif_opaque_softc *hif_ctx,
  785. struct napi_struct *napi,
  786. int budget)
  787. {
  788. int rc = 0; /* default: no work done, also takes care of error */
  789. int normalized = 0;
  790. int bucket;
  791. int cpu = smp_processor_id();
  792. bool poll_on_right_cpu;
  793. struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
  794. struct qca_napi_info *napi_info;
  795. struct CE_state *ce_state = NULL;
  796. if (unlikely(!hif)) {
  797. hif_err("hif context is NULL");
  798. QDF_ASSERT(0);
  799. goto out;
  800. }
  801. napi_info = (struct qca_napi_info *)
  802. container_of(napi, struct qca_napi_info, napi);
  803. NAPI_DEBUG("%s -->(napi(%d, irq=%d), budget=%d)",
  804. __func__, napi_info->id, napi_info->irq, budget);
  805. napi_info->stats[cpu].napi_polls++;
  806. hif_record_ce_desc_event(hif, NAPI_ID2PIPE(napi_info->id),
  807. NAPI_POLL_ENTER, NULL, NULL, cpu, 0);
  808. rc = ce_per_engine_service(hif, NAPI_ID2PIPE(napi_info->id));
  809. NAPI_DEBUG("%s: ce_per_engine_service processed %d msgs",
  810. __func__, rc);
  811. hif_napi_offld_flush_cb(napi_info);
  812. /* do not return 0, if there was some work done,
  813. * even if it is below the scale
  814. */
  815. if (rc) {
  816. napi_info->stats[cpu].napi_workdone += rc;
  817. normalized = (rc / napi_info->scale);
  818. if (normalized == 0)
  819. normalized++;
  820. bucket = (normalized - 1) /
  821. (QCA_NAPI_BUDGET / QCA_NAPI_NUM_BUCKETS);
  822. if (bucket >= QCA_NAPI_NUM_BUCKETS) {
  823. bucket = QCA_NAPI_NUM_BUCKETS - 1;
  824. hif_err("Bad bucket#(%d) > QCA_NAPI_NUM_BUCKETS(%d)"
  825. " normalized %d, napi budget %d",
  826. bucket, QCA_NAPI_NUM_BUCKETS,
  827. normalized, QCA_NAPI_BUDGET);
  828. }
  829. napi_info->stats[cpu].napi_budget_uses[bucket]++;
  830. } else {
  831. /* if ce_per engine reports 0, then poll should be terminated */
  832. NAPI_DEBUG("%s:%d: nothing processed by CE. Completing NAPI",
  833. __func__, __LINE__);
  834. }
  835. ce_state = hif->ce_id_to_state[NAPI_ID2PIPE(napi_info->id)];
  836. /*
  837. * Not using the API hif_napi_correct_cpu directly in the if statement
  838. * below since the API may not get evaluated if put at the end if any
  839. * prior condition would evaluate to be true. The CPU correction
  840. * check should kick in every poll.
  841. */
  842. #ifdef NAPI_YIELD_BUDGET_BASED
  843. if (ce_state && (ce_state->force_break || 0 == rc)) {
  844. #else
  845. poll_on_right_cpu = hif_napi_correct_cpu(napi_info);
  846. if ((ce_state) &&
  847. (!ce_check_rx_pending(ce_state) || (0 == rc) ||
  848. !poll_on_right_cpu)) {
  849. #endif
  850. napi_info->stats[cpu].napi_completes++;
  851. #ifdef NAPI_YIELD_BUDGET_BASED
  852. ce_state->force_break = 0;
  853. #endif
  854. hif_record_ce_desc_event(hif, ce_state->id, NAPI_COMPLETE,
  855. NULL, NULL, 0, 0);
  856. if (normalized >= budget)
  857. normalized = budget - 1;
  858. napi_complete(napi);
  859. /* enable interrupts */
  860. hif_napi_enable_irq(hif_ctx, napi_info->id);
  861. /* support suspend/resume */
  862. qdf_atomic_dec(&(hif->active_tasklet_cnt));
  863. NAPI_DEBUG("%s:%d: napi_complete + enabling the interrupts",
  864. __func__, __LINE__);
  865. } else {
  866. /* 4.4 kernel NAPI implementation requires drivers to
  867. * return full work when they ask to be re-scheduled,
  868. * or napi_complete and re-start with a fresh interrupt
  869. */
  870. normalized = budget;
  871. }
  872. hif_record_ce_desc_event(hif, NAPI_ID2PIPE(napi_info->id),
  873. NAPI_POLL_EXIT, NULL, NULL, normalized, 0);
  874. NAPI_DEBUG("%s <--[normalized=%d]", __func__, normalized);
  875. return normalized;
  876. out:
  877. return rc;
  878. }
  879. qdf_export_symbol(hif_napi_poll);
  880. void hif_update_napi_max_poll_time(struct CE_state *ce_state,
  881. int ce_id,
  882. int cpu_id)
  883. {
  884. struct hif_softc *hif;
  885. struct qca_napi_info *napi_info;
  886. unsigned long long napi_poll_time = qdf_time_sched_clock() -
  887. ce_state->ce_service_start_time;
  888. hif = ce_state->scn;
  889. napi_info = hif->napi_data.napis[ce_id];
  890. if (napi_poll_time >
  891. napi_info->stats[cpu_id].napi_max_poll_time)
  892. napi_info->stats[cpu_id].napi_max_poll_time = napi_poll_time;
  893. }
  894. qdf_export_symbol(hif_update_napi_max_poll_time);
  895. #ifdef HIF_IRQ_AFFINITY
  896. /**
  897. *
  898. * hif_napi_update_yield_stats() - update NAPI yield related stats
  899. * @cpu_id: CPU ID for which stats needs to be updates
  900. * @ce_id: Copy Engine ID for which yield stats needs to be updates
  901. * @time_limit_reached: indicates whether the time limit was reached
  902. * @rxpkt_thresh_reached: indicates whether rx packet threshold was reached
  903. *
  904. * Return: None
  905. */
  906. void hif_napi_update_yield_stats(struct CE_state *ce_state,
  907. bool time_limit_reached,
  908. bool rxpkt_thresh_reached)
  909. {
  910. struct hif_softc *hif;
  911. struct qca_napi_data *napi_data = NULL;
  912. int ce_id = 0;
  913. int cpu_id = 0;
  914. if (unlikely(!ce_state)) {
  915. QDF_ASSERT(ce_state);
  916. return;
  917. }
  918. hif = ce_state->scn;
  919. if (unlikely(!hif)) {
  920. QDF_ASSERT(hif);
  921. return;
  922. }
  923. napi_data = &(hif->napi_data);
  924. if (unlikely(!napi_data)) {
  925. QDF_ASSERT(napi_data);
  926. return;
  927. }
  928. ce_id = ce_state->id;
  929. cpu_id = qdf_get_cpu();
  930. if (unlikely(!napi_data->napis[ce_id])) {
  931. return;
  932. }
  933. if (time_limit_reached)
  934. napi_data->napis[ce_id]->stats[cpu_id].time_limit_reached++;
  935. else
  936. napi_data->napis[ce_id]->stats[cpu_id].rxpkt_thresh_reached++;
  937. hif_update_napi_max_poll_time(ce_state, ce_id,
  938. cpu_id);
  939. }
  940. /**
  941. *
  942. * hif_napi_stats() - display NAPI CPU statistics
  943. * @napid: pointer to qca_napi_data
  944. *
  945. * Description:
  946. * Prints the various CPU cores on which the NAPI instances /CEs interrupts
  947. * are being executed. Can be called from outside NAPI layer.
  948. *
  949. * Return: None
  950. */
  951. void hif_napi_stats(struct qca_napi_data *napid)
  952. {
  953. int i;
  954. struct qca_napi_cpu *cpu;
  955. if (!napid) {
  956. qdf_debug("%s: napiid struct is null", __func__);
  957. return;
  958. }
  959. cpu = napid->napi_cpu;
  960. qdf_debug("NAPI CPU TABLE");
  961. qdf_debug("lilclhead=%d, bigclhead=%d",
  962. napid->lilcl_head, napid->bigcl_head);
  963. for (i = 0; i < NR_CPUS; i++) {
  964. qdf_debug("CPU[%02d]: state:%d crid=%02d clid=%02d crmk:0x%0lx thmk:0x%0lx frq:%d napi = 0x%08x lnk:%d",
  965. i,
  966. cpu[i].state, cpu[i].core_id, cpu[i].cluster_id,
  967. cpu[i].core_mask.bits[0],
  968. cpu[i].thread_mask.bits[0],
  969. cpu[i].max_freq, cpu[i].napis,
  970. cpu[i].cluster_nxt);
  971. }
  972. }
  973. #ifdef FEATURE_NAPI_DEBUG
  974. /*
  975. * Local functions
  976. * - no argument checks, all internal/trusted callers
  977. */
  978. static void hnc_dump_cpus(struct qca_napi_data *napid)
  979. {
  980. hif_napi_stats(napid);
  981. }
  982. #else
  983. static void hnc_dump_cpus(struct qca_napi_data *napid) { /* no-op */ };
  984. #endif /* FEATURE_NAPI_DEBUG */
  985. /**
  986. * hnc_link_clusters() - partitions to cpu table into clusters
  987. * @napid: pointer to NAPI data
  988. *
  989. * Takes in a CPU topology table and builds two linked lists
  990. * (big cluster cores, list-head at bigcl_head, and little cluster
  991. * cores, list-head at lilcl_head) out of it.
  992. *
  993. * If there are more than two clusters:
  994. * - bigcl_head and lilcl_head will be different,
  995. * - the cluster with highest cpufreq will be considered the "big" cluster.
  996. * If there are more than one with the highest frequency, the *last* of such
  997. * clusters will be designated as the "big cluster"
  998. * - the cluster with lowest cpufreq will be considered the "li'l" cluster.
  999. * If there are more than one clusters with the lowest cpu freq, the *first*
  1000. * of such clusters will be designated as the "little cluster"
  1001. * - We only support up to 32 clusters
  1002. * Return: 0 : OK
  1003. * !0: error (at least one of lil/big clusters could not be found)
  1004. */
  1005. #define HNC_MIN_CLUSTER 0
  1006. #define HNC_MAX_CLUSTER 1
  1007. static int hnc_link_clusters(struct qca_napi_data *napid)
  1008. {
  1009. int rc = 0;
  1010. int i;
  1011. int it = 0;
  1012. uint32_t cl_done = 0x0;
  1013. int cl, curcl, curclhead = 0;
  1014. int more;
  1015. unsigned int lilfrq = INT_MAX;
  1016. unsigned int bigfrq = 0;
  1017. unsigned int clfrq = 0;
  1018. int prev = 0;
  1019. struct qca_napi_cpu *cpus = napid->napi_cpu;
  1020. napid->lilcl_head = napid->bigcl_head = -1;
  1021. do {
  1022. more = 0;
  1023. it++; curcl = -1;
  1024. for (i = 0; i < NR_CPUS; i++) {
  1025. cl = cpus[i].cluster_id;
  1026. NAPI_DEBUG("Processing cpu[%d], cluster=%d\n",
  1027. i, cl);
  1028. if ((cl < HNC_MIN_CLUSTER) || (cl > HNC_MAX_CLUSTER)) {
  1029. NAPI_DEBUG("Bad cluster (%d). SKIPPED\n", cl);
  1030. /* continue if ASSERTs are disabled */
  1031. continue;
  1032. };
  1033. if (cpumask_weight(&(cpus[i].core_mask)) == 0) {
  1034. NAPI_DEBUG("Core mask 0. SKIPPED\n");
  1035. continue;
  1036. }
  1037. if (cl_done & (0x01 << cl)) {
  1038. NAPI_DEBUG("Cluster already processed. SKIPPED\n");
  1039. continue;
  1040. } else {
  1041. if (more == 0) {
  1042. more = 1;
  1043. curcl = cl;
  1044. curclhead = i; /* row */
  1045. clfrq = cpus[i].max_freq;
  1046. prev = -1;
  1047. };
  1048. if ((curcl >= 0) && (curcl != cl)) {
  1049. NAPI_DEBUG("Entry cl(%d) != curcl(%d). SKIPPED\n",
  1050. cl, curcl);
  1051. continue;
  1052. }
  1053. if (cpus[i].max_freq != clfrq)
  1054. NAPI_DEBUG("WARN: frq(%d)!=clfrq(%d)\n",
  1055. cpus[i].max_freq, clfrq);
  1056. if (clfrq >= bigfrq) {
  1057. bigfrq = clfrq;
  1058. napid->bigcl_head = curclhead;
  1059. NAPI_DEBUG("bigcl=%d\n", curclhead);
  1060. }
  1061. if (clfrq < lilfrq) {
  1062. lilfrq = clfrq;
  1063. napid->lilcl_head = curclhead;
  1064. NAPI_DEBUG("lilcl=%d\n", curclhead);
  1065. }
  1066. if (prev != -1)
  1067. cpus[prev].cluster_nxt = i;
  1068. prev = i;
  1069. }
  1070. }
  1071. if (curcl >= 0)
  1072. cl_done |= (0x01 << curcl);
  1073. } while (more);
  1074. if (qdf_unlikely((napid->lilcl_head < 0) && (napid->bigcl_head < 0)))
  1075. rc = -EFAULT;
  1076. hnc_dump_cpus(napid); /* if NAPI_DEBUG */
  1077. return rc;
  1078. }
  1079. #undef HNC_MIN_CLUSTER
  1080. #undef HNC_MAX_CLUSTER
  1081. /*
  1082. * hotplug function group
  1083. */
  1084. /**
  1085. * hnc_cpu_online_cb() - handles CPU hotplug "up" events
  1086. * @context: the associated HIF context
  1087. * @cpu: the CPU Id of the CPU the event happened on
  1088. *
  1089. * Return: None
  1090. */
  1091. static void hnc_cpu_online_cb(void *context, uint32_t cpu)
  1092. {
  1093. struct hif_softc *hif = context;
  1094. struct qca_napi_data *napid = &hif->napi_data;
  1095. if (cpu >= NR_CPUS)
  1096. return;
  1097. NAPI_DEBUG("-->%s(act=online, cpu=%u)", __func__, cpu);
  1098. napid->napi_cpu[cpu].state = QCA_NAPI_CPU_UP;
  1099. NAPI_DEBUG("%s: CPU %u marked %d",
  1100. __func__, cpu, napid->napi_cpu[cpu].state);
  1101. NAPI_DEBUG("<--%s", __func__);
  1102. }
  1103. /**
  1104. * hnc_cpu_before_offline_cb() - handles CPU hotplug "prepare down" events
  1105. * @context: the associated HIF context
  1106. * @cpu: the CPU Id of the CPU the event happened on
  1107. *
  1108. * On transtion to offline, we act on PREP events, because we may need to move
  1109. * the irqs/NAPIs to another CPU before it is actually off-lined.
  1110. *
  1111. * Return: None
  1112. */
  1113. static void hnc_cpu_before_offline_cb(void *context, uint32_t cpu)
  1114. {
  1115. struct hif_softc *hif = context;
  1116. struct qca_napi_data *napid = &hif->napi_data;
  1117. if (cpu >= NR_CPUS)
  1118. return;
  1119. NAPI_DEBUG("-->%s(act=before_offline, cpu=%u)", __func__, cpu);
  1120. napid->napi_cpu[cpu].state = QCA_NAPI_CPU_DOWN;
  1121. NAPI_DEBUG("%s: CPU %u marked %d; updating affinity",
  1122. __func__, cpu, napid->napi_cpu[cpu].state);
  1123. /**
  1124. * we need to move any NAPIs on this CPU out.
  1125. * if we are in LO throughput mode, then this is valid
  1126. * if the CPU is the the low designated CPU.
  1127. */
  1128. hif_napi_event(GET_HIF_OPAQUE_HDL(hif),
  1129. NAPI_EVT_CPU_STATE,
  1130. (void *)
  1131. ((size_t)cpu << 16 | napid->napi_cpu[cpu].state));
  1132. NAPI_DEBUG("<--%s", __func__);
  1133. }
  1134. static int hnc_hotplug_register(struct hif_softc *hif_sc)
  1135. {
  1136. QDF_STATUS status;
  1137. NAPI_DEBUG("-->%s", __func__);
  1138. status = qdf_cpuhp_register(&hif_sc->napi_data.cpuhp_handler,
  1139. hif_sc,
  1140. hnc_cpu_online_cb,
  1141. hnc_cpu_before_offline_cb);
  1142. NAPI_DEBUG("<--%s [%d]", __func__, status);
  1143. return qdf_status_to_os_return(status);
  1144. }
  1145. static void hnc_hotplug_unregister(struct hif_softc *hif_sc)
  1146. {
  1147. NAPI_DEBUG("-->%s", __func__);
  1148. if (hif_sc->napi_data.cpuhp_handler)
  1149. qdf_cpuhp_unregister(&hif_sc->napi_data.cpuhp_handler);
  1150. NAPI_DEBUG("<--%s", __func__);
  1151. }
  1152. /**
  1153. * hnc_install_tput() - installs a callback in the throughput detector
  1154. * @register: !0 => register; =0: unregister
  1155. *
  1156. * installs a callback to be called when wifi driver throughput (tx+rx)
  1157. * crosses a threshold. Currently, we are using the same criteria as
  1158. * TCP ack suppression (500 packets/100ms by default).
  1159. *
  1160. * Return: 0 : success
  1161. * <0: failure
  1162. */
  1163. static int hnc_tput_hook(int install)
  1164. {
  1165. int rc = 0;
  1166. /*
  1167. * Nothing, until the bw_calculation accepts registration
  1168. * it is now hardcoded in the wlan_hdd_main.c::hdd_bus_bw_compute_cbk
  1169. * hdd_napi_throughput_policy(...)
  1170. */
  1171. return rc;
  1172. }
  1173. /*
  1174. * Implementation of hif_napi_cpu API
  1175. */
  1176. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0))
  1177. static inline void record_sibling_cpumask(struct qca_napi_cpu *cpus, int i)
  1178. {
  1179. cpumask_copy(&(cpus[i].thread_mask),
  1180. topology_sibling_cpumask(i));
  1181. }
  1182. #else
  1183. static inline void record_sibling_cpumask(struct qca_napi_cpu *cpus, int i)
  1184. {
  1185. }
  1186. #endif
  1187. /**
  1188. * hif_napi_cpu_init() - initialization of irq affinity block
  1189. * @ctx: pointer to qca_napi_data
  1190. *
  1191. * called by hif_napi_create, after the first instance is called
  1192. * - builds napi_rss_cpus table from cpu topology
  1193. * - links cores of the same clusters together
  1194. * - installs hot-plug notifier
  1195. * - installs throughput trigger notifier (when such mechanism exists)
  1196. *
  1197. * Return: 0: OK
  1198. * <0: error code
  1199. */
  1200. int hif_napi_cpu_init(struct hif_opaque_softc *hif)
  1201. {
  1202. int rc = 0;
  1203. int i;
  1204. struct qca_napi_data *napid = &HIF_GET_SOFTC(hif)->napi_data;
  1205. struct qca_napi_cpu *cpus = napid->napi_cpu;
  1206. NAPI_DEBUG("--> ");
  1207. if (cpus[0].state != QCA_NAPI_CPU_UNINITIALIZED) {
  1208. NAPI_DEBUG("NAPI RSS table already initialized.\n");
  1209. rc = -EALREADY;
  1210. goto lab_rss_init;
  1211. }
  1212. /* build CPU topology table */
  1213. for_each_possible_cpu(i) {
  1214. cpus[i].state = ((cpumask_test_cpu(i, cpu_online_mask)
  1215. ? QCA_NAPI_CPU_UP
  1216. : QCA_NAPI_CPU_DOWN));
  1217. cpus[i].core_id = topology_core_id(i);
  1218. cpus[i].cluster_id = topology_physical_package_id(i);
  1219. cpumask_copy(&(cpus[i].core_mask),
  1220. topology_core_cpumask(i));
  1221. record_sibling_cpumask(cpus, i);
  1222. cpus[i].max_freq = cpufreq_quick_get_max(i);
  1223. cpus[i].napis = 0x0;
  1224. cpus[i].cluster_nxt = -1; /* invalid */
  1225. }
  1226. /* link clusters together */
  1227. rc = hnc_link_clusters(napid);
  1228. if (0 != rc)
  1229. goto lab_err_topology;
  1230. /* install hotplug notifier */
  1231. rc = hnc_hotplug_register(HIF_GET_SOFTC(hif));
  1232. if (0 != rc)
  1233. goto lab_err_hotplug;
  1234. /* install throughput notifier */
  1235. rc = hnc_tput_hook(1);
  1236. if (0 == rc)
  1237. goto lab_rss_init;
  1238. lab_err_hotplug:
  1239. hnc_tput_hook(0);
  1240. hnc_hotplug_unregister(HIF_GET_SOFTC(hif));
  1241. lab_err_topology:
  1242. memset(napid->napi_cpu, 0, sizeof(struct qca_napi_cpu) * NR_CPUS);
  1243. lab_rss_init:
  1244. NAPI_DEBUG("<-- [rc=%d]", rc);
  1245. return rc;
  1246. }
  1247. /**
  1248. * hif_napi_cpu_deinit() - clean-up of irq affinity block
  1249. *
  1250. * called by hif_napi_destroy, when the last instance is removed
  1251. * - uninstalls throughput and hotplug notifiers
  1252. * - clears cpu topology table
  1253. * Return: 0: OK
  1254. */
  1255. int hif_napi_cpu_deinit(struct hif_opaque_softc *hif)
  1256. {
  1257. int rc = 0;
  1258. struct qca_napi_data *napid = &HIF_GET_SOFTC(hif)->napi_data;
  1259. NAPI_DEBUG("-->%s(...)", __func__);
  1260. /* uninstall tput notifier */
  1261. rc = hnc_tput_hook(0);
  1262. /* uninstall hotplug notifier */
  1263. hnc_hotplug_unregister(HIF_GET_SOFTC(hif));
  1264. /* clear the topology table */
  1265. memset(napid->napi_cpu, 0, sizeof(struct qca_napi_cpu) * NR_CPUS);
  1266. NAPI_DEBUG("<--%s[rc=%d]", __func__, rc);
  1267. return rc;
  1268. }
  1269. /**
  1270. * hncm_migrate_to() - migrates a NAPI to a CPU
  1271. * @napid: pointer to NAPI block
  1272. * @ce_id: CE_id of the NAPI instance
  1273. * @didx : index in the CPU topology table for the CPU to migrate to
  1274. *
  1275. * Migrates NAPI (identified by the CE_id) to the destination core
  1276. * Updates the napi_map of the destination entry
  1277. *
  1278. * Return:
  1279. * =0 : success
  1280. * <0 : error
  1281. */
  1282. static int hncm_migrate_to(struct qca_napi_data *napid,
  1283. int napi_ce,
  1284. int didx)
  1285. {
  1286. int rc = 0;
  1287. QDF_STATUS status;
  1288. NAPI_DEBUG("-->%s(napi_cd=%d, didx=%d)", __func__, napi_ce, didx);
  1289. if (!napid->napis[napi_ce])
  1290. return -EINVAL;
  1291. napid->napis[napi_ce]->cpumask.bits[0] = (1 << didx);
  1292. qdf_dev_modify_irq_status(napid->napis[napi_ce]->irq,
  1293. QDF_IRQ_NO_BALANCING, 0);
  1294. status = qdf_dev_set_irq_affinity(napid->napis[napi_ce]->irq,
  1295. (struct qdf_cpu_mask *)
  1296. &napid->napis[napi_ce]->cpumask);
  1297. rc = qdf_status_to_os_return(status);
  1298. /* unmark the napis bitmap in the cpu table */
  1299. napid->napi_cpu[napid->napis[napi_ce]->cpu].napis &= ~(0x01 << napi_ce);
  1300. /* mark the napis bitmap for the new designated cpu */
  1301. napid->napi_cpu[didx].napis |= (0x01 << napi_ce);
  1302. napid->napis[napi_ce]->cpu = didx;
  1303. NAPI_DEBUG("<--%s[%d]", __func__, rc);
  1304. return rc;
  1305. }
  1306. /**
  1307. * hncm_dest_cpu() - finds a destination CPU for NAPI
  1308. * @napid: pointer to NAPI block
  1309. * @act : RELOCATE | COLLAPSE | DISPERSE
  1310. *
  1311. * Finds the designated destionation for the next IRQ.
  1312. * RELOCATE: translated to either COLLAPSE or DISPERSE based
  1313. * on napid->napi_mode (throughput state)
  1314. * COLLAPSE: All have the same destination: the first online CPU in lilcl
  1315. * DISPERSE: One of the CPU in bigcl, which has the smallest number of
  1316. * NAPIs on it
  1317. *
  1318. * Return: >=0 : index in the cpu topology table
  1319. * : < 0 : error
  1320. */
  1321. static int hncm_dest_cpu(struct qca_napi_data *napid, int act)
  1322. {
  1323. int destidx = -1;
  1324. int head, i;
  1325. NAPI_DEBUG("-->%s(act=%d)", __func__, act);
  1326. if (act == HNC_ACT_RELOCATE) {
  1327. if (napid->napi_mode == QCA_NAPI_TPUT_LO)
  1328. act = HNC_ACT_COLLAPSE;
  1329. else
  1330. act = HNC_ACT_DISPERSE;
  1331. NAPI_DEBUG("%s: act changed from HNC_ACT_RELOCATE to %d",
  1332. __func__, act);
  1333. }
  1334. if (act == HNC_ACT_COLLAPSE) {
  1335. head = i = napid->lilcl_head;
  1336. retry_collapse:
  1337. while (i >= 0) {
  1338. if (napid->napi_cpu[i].state == QCA_NAPI_CPU_UP) {
  1339. destidx = i;
  1340. break;
  1341. }
  1342. i = napid->napi_cpu[i].cluster_nxt;
  1343. }
  1344. if ((destidx < 0) && (head == napid->lilcl_head)) {
  1345. NAPI_DEBUG("%s: COLLAPSE: no lilcl dest, try bigcl",
  1346. __func__);
  1347. head = i = napid->bigcl_head;
  1348. goto retry_collapse;
  1349. }
  1350. } else { /* HNC_ACT_DISPERSE */
  1351. int smallest = 99; /* all 32 bits full */
  1352. int smallidx = -1;
  1353. head = i = napid->bigcl_head;
  1354. retry_disperse:
  1355. while (i >= 0) {
  1356. if ((napid->napi_cpu[i].state == QCA_NAPI_CPU_UP) &&
  1357. (hweight32(napid->napi_cpu[i].napis) <= smallest)) {
  1358. smallest = napid->napi_cpu[i].napis;
  1359. smallidx = i;
  1360. }
  1361. i = napid->napi_cpu[i].cluster_nxt;
  1362. }
  1363. /* Check if matches with user sepecified CPU mask */
  1364. smallidx = ((1 << smallidx) & napid->user_cpu_affin_mask) ?
  1365. smallidx : -1;
  1366. if ((smallidx < 0) && (head == napid->bigcl_head)) {
  1367. NAPI_DEBUG("%s: DISPERSE: no bigcl dest, try lilcl",
  1368. __func__);
  1369. head = i = napid->lilcl_head;
  1370. goto retry_disperse;
  1371. }
  1372. destidx = smallidx;
  1373. }
  1374. NAPI_DEBUG("<--%s[dest=%d]", __func__, destidx);
  1375. return destidx;
  1376. }
  1377. /**
  1378. * hif_napi_cpu_migrate() - migrate IRQs away
  1379. * @cpu: -1: all CPUs <n> specific CPU
  1380. * @act: COLLAPSE | DISPERSE
  1381. *
  1382. * Moves IRQs/NAPIs from specific or all CPUs (specified by @cpu) to eligible
  1383. * cores. Eligible cores are:
  1384. * act=COLLAPSE -> the first online core of the little cluster
  1385. * act=DISPERSE -> separate cores of the big cluster, so that each core will
  1386. * host minimum number of NAPIs/IRQs (napid->cpus[cpu].napis)
  1387. *
  1388. * Note that this function is called with a spinlock acquired already.
  1389. *
  1390. * Return: =0: success
  1391. * <0: error
  1392. */
  1393. int hif_napi_cpu_migrate(struct qca_napi_data *napid, int cpu, int action)
  1394. {
  1395. int rc = 0;
  1396. struct qca_napi_cpu *cpup;
  1397. int i, dind;
  1398. uint32_t napis;
  1399. NAPI_DEBUG("-->%s(.., cpu=%d, act=%d)",
  1400. __func__, cpu, action);
  1401. /* the following is really: hif_napi_enabled() with less overhead */
  1402. if (napid->ce_map == 0) {
  1403. NAPI_DEBUG("%s: NAPI disabled. Not migrating.", __func__);
  1404. goto hncm_return;
  1405. }
  1406. cpup = napid->napi_cpu;
  1407. switch (action) {
  1408. case HNC_ACT_RELOCATE:
  1409. case HNC_ACT_DISPERSE:
  1410. case HNC_ACT_COLLAPSE: {
  1411. /* first find the src napi set */
  1412. if (cpu == HNC_ANY_CPU)
  1413. napis = napid->ce_map;
  1414. else
  1415. napis = cpup[cpu].napis;
  1416. /* then clear the napi bitmap on each CPU */
  1417. for (i = 0; i < NR_CPUS; i++)
  1418. cpup[i].napis = 0;
  1419. /* then for each of the NAPIs to disperse: */
  1420. for (i = 0; i < CE_COUNT_MAX; i++)
  1421. if (napis & (1 << i)) {
  1422. /* find a destination CPU */
  1423. dind = hncm_dest_cpu(napid, action);
  1424. if (dind >= 0) {
  1425. NAPI_DEBUG("Migrating NAPI ce%d to %d",
  1426. i, dind);
  1427. rc = hncm_migrate_to(napid, i, dind);
  1428. } else {
  1429. NAPI_DEBUG("No dest for NAPI ce%d", i);
  1430. hnc_dump_cpus(napid);
  1431. rc = -1;
  1432. }
  1433. }
  1434. break;
  1435. }
  1436. default: {
  1437. NAPI_DEBUG("%s: bad action: %d\n", __func__, action);
  1438. QDF_BUG(0);
  1439. break;
  1440. }
  1441. } /* switch action */
  1442. hncm_return:
  1443. hnc_dump_cpus(napid);
  1444. return rc;
  1445. }
  1446. /**
  1447. * hif_napi_bl_irq() - calls irq_modify_status to enable/disable blacklisting
  1448. * @napid: pointer to qca_napi_data structure
  1449. * @bl_flag: blacklist flag to enable/disable blacklisting
  1450. *
  1451. * The function enables/disables blacklisting for all the copy engine
  1452. * interrupts on which NAPI is enabled.
  1453. *
  1454. * Return: None
  1455. */
  1456. static inline void hif_napi_bl_irq(struct qca_napi_data *napid, bool bl_flag)
  1457. {
  1458. int i;
  1459. struct qca_napi_info *napii;
  1460. for (i = 0; i < CE_COUNT_MAX; i++) {
  1461. /* check if NAPI is enabled on the CE */
  1462. if (!(napid->ce_map & (0x01 << i)))
  1463. continue;
  1464. /*double check that NAPI is allocated for the CE */
  1465. napii = napid->napis[i];
  1466. if (!(napii))
  1467. continue;
  1468. if (bl_flag == true)
  1469. qdf_dev_modify_irq_status(napii->irq,
  1470. 0, QDF_IRQ_NO_BALANCING);
  1471. else
  1472. qdf_dev_modify_irq_status(napii->irq,
  1473. QDF_IRQ_NO_BALANCING, 0);
  1474. hif_debug("bl_flag %d CE %d", bl_flag, i);
  1475. }
  1476. }
  1477. /**
  1478. * hif_napi_cpu_blacklist() - en(dis)ables blacklisting for NAPI RX interrupts.
  1479. * @napid: pointer to qca_napi_data structure
  1480. * @op: blacklist operation to perform
  1481. *
  1482. * The function enables/disables/queries blacklisting for all CE RX
  1483. * interrupts with NAPI enabled. Besides blacklisting, it also enables/disables
  1484. * core_ctl_set_boost.
  1485. * Once blacklisting is enabled, the interrupts will not be managed by the IRQ
  1486. * balancer.
  1487. *
  1488. * Return: -EINVAL, in case IRQ_BLACKLISTING and CORE_CTL_BOOST is not enabled
  1489. * for BLACKLIST_QUERY op - blacklist refcount
  1490. * for BLACKLIST_ON op - return value from core_ctl_set_boost API
  1491. * for BLACKLIST_OFF op - return value from core_ctl_set_boost API
  1492. */
  1493. int hif_napi_cpu_blacklist(struct qca_napi_data *napid,
  1494. enum qca_blacklist_op op)
  1495. {
  1496. int rc = 0;
  1497. static int ref_count; /* = 0 by the compiler */
  1498. uint8_t flags = napid->flags;
  1499. bool bl_en = flags & QCA_NAPI_FEATURE_IRQ_BLACKLISTING;
  1500. bool ccb_en = flags & QCA_NAPI_FEATURE_CORE_CTL_BOOST;
  1501. NAPI_DEBUG("-->%s(%d %d)", __func__, flags, op);
  1502. if (!(bl_en && ccb_en)) {
  1503. rc = -EINVAL;
  1504. goto out;
  1505. }
  1506. switch (op) {
  1507. case BLACKLIST_QUERY:
  1508. rc = ref_count;
  1509. break;
  1510. case BLACKLIST_ON:
  1511. ref_count++;
  1512. rc = 0;
  1513. if (ref_count == 1) {
  1514. rc = hif_napi_core_ctl_set_boost(true);
  1515. NAPI_DEBUG("boost_on() returns %d - refcnt=%d",
  1516. rc, ref_count);
  1517. hif_napi_bl_irq(napid, true);
  1518. }
  1519. break;
  1520. case BLACKLIST_OFF:
  1521. if (ref_count) {
  1522. ref_count--;
  1523. rc = 0;
  1524. if (ref_count == 0) {
  1525. rc = hif_napi_core_ctl_set_boost(false);
  1526. NAPI_DEBUG("boost_off() returns %d - refcnt=%d",
  1527. rc, ref_count);
  1528. hif_napi_bl_irq(napid, false);
  1529. }
  1530. }
  1531. break;
  1532. default:
  1533. NAPI_DEBUG("Invalid blacklist op: %d", op);
  1534. rc = -EINVAL;
  1535. } /* switch */
  1536. out:
  1537. NAPI_DEBUG("<--%s[%d]", __func__, rc);
  1538. return rc;
  1539. }
  1540. /**
  1541. * hif_napi_serialize() - [de-]serialize NAPI operations
  1542. * @hif: context
  1543. * @is_on: 1: serialize, 0: deserialize
  1544. *
  1545. * hif_napi_serialize(hif, 1) can be called multiple times. It will perform the
  1546. * following steps (see hif_napi_event for code):
  1547. * - put irqs of all NAPI instances on the same CPU
  1548. * - only for the first serialize call: blacklist
  1549. *
  1550. * hif_napi_serialize(hif, 0):
  1551. * - start a timer (multiple of BusBandwidthTimer -- default: 100 msec)
  1552. * - at the end of the timer, check the current throughput state and
  1553. * implement it.
  1554. */
  1555. static unsigned long napi_serialize_reqs;
  1556. int hif_napi_serialize(struct hif_opaque_softc *hif, int is_on)
  1557. {
  1558. int rc = -EINVAL;
  1559. if (hif)
  1560. switch (is_on) {
  1561. case 0: { /* de-serialize */
  1562. rc = hif_napi_event(hif, NAPI_EVT_USR_NORMAL,
  1563. (void *) 0);
  1564. napi_serialize_reqs = 0;
  1565. break;
  1566. } /* end de-serialize */
  1567. case 1: { /* serialize */
  1568. rc = hif_napi_event(hif, NAPI_EVT_USR_SERIAL,
  1569. (void *)napi_serialize_reqs++);
  1570. break;
  1571. } /* end serialize */
  1572. default:
  1573. break; /* no-op */
  1574. } /* switch */
  1575. return rc;
  1576. }
  1577. #endif /* ifdef HIF_IRQ_AFFINITY */