cam_sync_dma_fence.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #include "cam_sync_dma_fence.h"
  6. #include "cam_sync_util.h"
  7. extern unsigned long cam_sync_monitor_mask;
  8. /**
  9. * struct cam_dma_fence_row - DMA fence row
  10. */
  11. struct cam_dma_fence_row {
  12. char name[CAM_DMA_FENCE_NAME_LEN];
  13. struct dma_fence *fence;
  14. int32_t fd;
  15. enum cam_dma_fence_state state;
  16. struct dma_fence_cb fence_cb;
  17. int32_t sync_obj;
  18. cam_sync_callback_for_dma_fence sync_cb;
  19. bool cb_registered_for_sync;
  20. bool ext_dma_fence;
  21. bool sync_signal_dma;
  22. };
  23. /**
  24. * struct cam_dma_fence_device - DMA fence device
  25. */
  26. struct cam_dma_fence_device {
  27. uint64_t dma_fence_context;
  28. struct cam_dma_fence_row rows[CAM_DMA_FENCE_MAX_FENCES];
  29. spinlock_t row_spinlocks[CAM_DMA_FENCE_MAX_FENCES];
  30. struct mutex dev_lock;
  31. DECLARE_BITMAP(bitmap, CAM_DMA_FENCE_MAX_FENCES);
  32. struct cam_generic_fence_monitor_data **monitor_data;
  33. };
  34. static atomic64_t g_cam_dma_fence_seq_no;
  35. static struct cam_dma_fence_device *g_cam_dma_fence_dev;
  36. bool __cam_dma_fence_enable_signaling(
  37. struct dma_fence *fence)
  38. {
  39. return true;
  40. }
  41. const char *__cam_dma_fence_get_driver_name(
  42. struct dma_fence *fence)
  43. {
  44. return "Camera DMA fence driver";
  45. }
  46. void __cam_dma_fence_free(struct dma_fence *fence)
  47. {
  48. CAM_DBG(CAM_DMA_FENCE,
  49. "Free memory for dma fence context: %llu seqno: %llu",
  50. fence->context, fence->seqno);
  51. kfree(fence->lock);
  52. kfree(fence);
  53. }
  54. static struct dma_fence_ops cam_sync_dma_fence_ops = {
  55. .enable_signaling = __cam_dma_fence_enable_signaling,
  56. .get_driver_name = __cam_dma_fence_get_driver_name,
  57. .get_timeline_name = __cam_dma_fence_get_driver_name,
  58. .release = __cam_dma_fence_free,
  59. };
  60. static inline struct cam_generic_fence_monitor_entry *
  61. __cam_dma_fence_get_monitor_entries(int idx)
  62. {
  63. struct cam_generic_fence_monitor_data *monitor_data;
  64. monitor_data = CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data, idx);
  65. if (monitor_data->swap_monitor_entries)
  66. return monitor_data->prev_monitor_entries;
  67. else
  68. return monitor_data->monitor_entries;
  69. }
  70. static inline struct cam_generic_fence_monitor_entry *
  71. __cam_dma_fence_get_prev_monitor_entries(int idx)
  72. {
  73. struct cam_generic_fence_monitor_data *monitor_data;
  74. monitor_data = CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data, idx);
  75. if (monitor_data->swap_monitor_entries)
  76. return monitor_data->monitor_entries;
  77. else
  78. return monitor_data->prev_monitor_entries;
  79. }
  80. static void __cam_dma_fence_print_table(void)
  81. {
  82. int i;
  83. struct cam_dma_fence_row *row;
  84. struct dma_fence *fence;
  85. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  86. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  87. row = &g_cam_dma_fence_dev->rows[i];
  88. fence = row->fence;
  89. CAM_INFO(CAM_DMA_FENCE,
  90. "Idx: %d seqno: %llu name: %s state: %d",
  91. i, fence->seqno, row->name, row->state);
  92. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  93. }
  94. }
  95. static int __cam_dma_fence_find_free_idx(uint32_t *idx)
  96. {
  97. int rc = 0;
  98. bool bit;
  99. do {
  100. *idx = find_first_zero_bit(g_cam_dma_fence_dev->bitmap, CAM_DMA_FENCE_MAX_FENCES);
  101. if (*idx >= CAM_DMA_FENCE_MAX_FENCES) {
  102. rc = -ENOMEM;
  103. break;
  104. }
  105. bit = test_and_set_bit(*idx, g_cam_dma_fence_dev->bitmap);
  106. } while (bit);
  107. if (rc) {
  108. CAM_ERR(CAM_DMA_FENCE, "No free idx, printing dma fence table......");
  109. __cam_dma_fence_print_table();
  110. }
  111. return rc;
  112. }
  113. static struct dma_fence *__cam_dma_fence_find_fence_in_table(
  114. int32_t fd, int32_t *idx)
  115. {
  116. int i;
  117. struct dma_fence *fence = NULL;
  118. struct cam_dma_fence_row *row = NULL;
  119. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  120. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  121. row = &g_cam_dma_fence_dev->rows[i];
  122. if ((row->state != CAM_DMA_FENCE_STATE_INVALID) && (row->fd == fd)) {
  123. *idx = i;
  124. fence = row->fence;
  125. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  126. break;
  127. }
  128. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  129. }
  130. return fence;
  131. }
  132. static void __cam_dma_fence_init_row(const char *name,
  133. struct dma_fence *dma_fence, int32_t fd, uint32_t idx,
  134. bool ext_dma_fence)
  135. {
  136. struct cam_dma_fence_row *row;
  137. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  138. row = &g_cam_dma_fence_dev->rows[idx];
  139. row->fence = dma_fence;
  140. row->fd = fd;
  141. row->state = CAM_DMA_FENCE_STATE_ACTIVE;
  142. row->ext_dma_fence = ext_dma_fence;
  143. strscpy(row->name, name, CAM_DMA_FENCE_NAME_LEN);
  144. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  145. cam_generic_fence_update_monitor_array(idx,
  146. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  147. CAM_FENCE_OP_CREATE);
  148. }
  149. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  150. }
  151. void __cam_dma_fence_signal_cb(
  152. struct dma_fence *fence, struct dma_fence_cb *cb)
  153. {
  154. struct cam_dma_fence_signal_sync_obj signal_sync_obj;
  155. struct cam_dma_fence_row *dma_fence_row =
  156. container_of(cb, struct cam_dma_fence_row, fence_cb);
  157. uint32_t idx;
  158. if (dma_fence_row->state == CAM_DMA_FENCE_STATE_INVALID) {
  159. CAM_ERR(CAM_DMA_FENCE, "dma fence seqno: %llu is in invalid state: %d",
  160. fence->seqno, dma_fence_row->state);
  161. return;
  162. }
  163. /* If this dma fence is signaled by sync obj, skip cb */
  164. if (dma_fence_row->sync_signal_dma)
  165. return;
  166. CAM_DBG(CAM_DMA_FENCE, "dma fence seqno: %llu fd: %d signaled, signal sync obj: %d",
  167. fence->seqno, dma_fence_row->fd, dma_fence_row->sync_obj);
  168. if ((dma_fence_row->cb_registered_for_sync) && (dma_fence_row->sync_cb)) {
  169. signal_sync_obj.fd = dma_fence_row->fd;
  170. /*
  171. * Signal is invoked with the fence lock held,
  172. * lock not needed to query status
  173. */
  174. signal_sync_obj.status = dma_fence_get_status_locked(fence);
  175. dma_fence_row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  176. dma_fence_row->sync_cb(dma_fence_row->sync_obj, &signal_sync_obj);
  177. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  178. &cam_sync_monitor_mask)) {
  179. __cam_dma_fence_find_fence_in_table(dma_fence_row->fd, &idx);
  180. cam_generic_fence_update_monitor_array(idx,
  181. &g_cam_dma_fence_dev->dev_lock,
  182. g_cam_dma_fence_dev->monitor_data,
  183. CAM_FENCE_OP_UNREGISTER_ON_SIGNAL);
  184. }
  185. }
  186. }
  187. static void __cam_dma_fence_dump_monitor_array(int dma_row_idx)
  188. {
  189. struct dma_fence *fence;
  190. struct cam_generic_fence_monitor_obj_info obj_info;
  191. struct cam_dma_fence_row *row;
  192. if (!g_cam_dma_fence_dev->monitor_data ||
  193. !test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  194. return;
  195. if (!CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data,
  196. dma_row_idx)->prev_obj_id)
  197. return;
  198. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  199. fence = row->fence;
  200. obj_info.name = row->name;
  201. obj_info.obj_id = row->fd;
  202. obj_info.state = row->state;
  203. obj_info.ref_cnt = kref_read(&fence->refcount);
  204. obj_info.monitor_data = CAM_GENERIC_MONITOR_GET_DATA(
  205. g_cam_dma_fence_dev->monitor_data, dma_row_idx);
  206. obj_info.fence_type = CAM_GENERIC_FENCE_TYPE_DMA_FENCE;
  207. obj_info.sync_id = row->sync_obj;
  208. obj_info.monitor_entries =
  209. __cam_dma_fence_get_monitor_entries(dma_row_idx);
  210. obj_info.prev_monitor_entries =
  211. __cam_dma_fence_get_prev_monitor_entries(dma_row_idx);
  212. cam_generic_fence_dump_monitor_array(&obj_info);
  213. }
  214. int cam_dma_fence_get_put_ref(
  215. bool get_or_put, int32_t dma_fence_row_idx)
  216. {
  217. struct dma_fence *dma_fence;
  218. struct cam_dma_fence_row *row;
  219. int rc = 0;
  220. if ((dma_fence_row_idx < 0) ||
  221. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  222. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  223. dma_fence_row_idx);
  224. return -EINVAL;
  225. }
  226. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  227. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  228. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  229. CAM_ERR(CAM_DMA_FENCE,
  230. "dma fence at idx: %d is in invalid state: %d",
  231. dma_fence_row_idx, row->state);
  232. rc = -EINVAL;
  233. goto monitor_dump;
  234. }
  235. dma_fence = row->fence;
  236. if (get_or_put)
  237. dma_fence_get(dma_fence);
  238. else
  239. dma_fence_put(dma_fence);
  240. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  241. CAM_DBG(CAM_DMA_FENCE, "Refcnt: %u after %s for dma fence with seqno: %llu",
  242. kref_read(&dma_fence->refcount), (get_or_put ? "getref" : "putref"),
  243. dma_fence->seqno);
  244. return rc;
  245. monitor_dump:
  246. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  247. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  248. return rc;
  249. }
  250. static struct dma_fence *cam_dma_fence_get_fence_from_sync_file(
  251. int32_t fd, int32_t *dma_fence_row_idx)
  252. {
  253. uint32_t idx;
  254. struct dma_fence *dma_fence = NULL;
  255. dma_fence = sync_file_get_fence(fd);
  256. if (IS_ERR_OR_NULL(dma_fence)) {
  257. CAM_ERR(CAM_DMA_FENCE, "Invalid fd: %d no dma fence found", fd);
  258. return ERR_PTR(-EINVAL);
  259. }
  260. if (__cam_dma_fence_find_free_idx(&idx)) {
  261. CAM_ERR(CAM_DMA_FENCE, "No free idx");
  262. goto end;
  263. }
  264. __cam_dma_fence_init_row(dma_fence->ops->get_driver_name(dma_fence),
  265. dma_fence, fd, idx, true);
  266. *dma_fence_row_idx = idx;
  267. CAM_DBG(CAM_DMA_FENCE,
  268. "External dma fence with fd: %d seqno: %llu ref_cnt: %u updated in tbl",
  269. fd, dma_fence->seqno, kref_read(&dma_fence->refcount));
  270. return dma_fence;
  271. end:
  272. dma_fence_put(dma_fence);
  273. return NULL;
  274. }
  275. struct dma_fence *cam_dma_fence_get_fence_from_fd(
  276. int32_t fd, int32_t *dma_fence_row_idx)
  277. {
  278. struct dma_fence *dma_fence = NULL;
  279. dma_fence = __cam_dma_fence_find_fence_in_table(fd, dma_fence_row_idx);
  280. if (IS_ERR_OR_NULL(dma_fence)) {
  281. CAM_WARN(CAM_DMA_FENCE,
  282. "dma fence with fd: %d is an external fence, querying sync file",
  283. fd);
  284. return cam_dma_fence_get_fence_from_sync_file(fd, dma_fence_row_idx);
  285. }
  286. dma_fence_get(dma_fence);
  287. CAM_DBG(CAM_DMA_FENCE, "dma fence found for fd: %d with seqno: %llu ref_cnt: %u",
  288. fd, dma_fence->seqno, kref_read(&dma_fence->refcount));
  289. return dma_fence;
  290. }
  291. int cam_dma_fence_register_cb(int32_t *sync_obj, int32_t *dma_fence_idx,
  292. cam_sync_callback_for_dma_fence sync_cb)
  293. {
  294. int rc = 0, dma_fence_row_idx;
  295. struct cam_dma_fence_row *row = NULL;
  296. struct dma_fence *dma_fence = NULL;
  297. if (!sync_obj || !dma_fence_idx || !sync_cb) {
  298. CAM_ERR(CAM_DMA_FENCE,
  299. "Invalid args sync_obj: %p dma_fence_idx: %p sync_cb: %p",
  300. sync_obj, dma_fence_idx, sync_cb);
  301. return -EINVAL;
  302. }
  303. dma_fence_row_idx = *dma_fence_idx;
  304. if ((dma_fence_row_idx < 0) ||
  305. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  306. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  307. dma_fence_row_idx);
  308. return -EINVAL;
  309. }
  310. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  311. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  312. dma_fence = row->fence;
  313. if (row->state != CAM_DMA_FENCE_STATE_ACTIVE) {
  314. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  315. &cam_sync_monitor_mask))
  316. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  317. &g_cam_dma_fence_dev->dev_lock,
  318. g_cam_dma_fence_dev->monitor_data,
  319. CAM_FENCE_OP_SKIP_REGISTER_CB);
  320. CAM_ERR(CAM_DMA_FENCE,
  321. "dma fence at idx: %d fd: %d seqno: %llu is not active, current state: %d",
  322. dma_fence_row_idx, row->fd, dma_fence->seqno, row->state);
  323. rc = -EINVAL;
  324. goto monitor_dump;
  325. }
  326. /**
  327. * If the cb is already registered, return
  328. * If a fd is closed by userspace without releasing the dma fence, it is
  329. * possible that same fd is returned to a new fence.
  330. */
  331. if (row->cb_registered_for_sync) {
  332. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  333. &cam_sync_monitor_mask))
  334. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  335. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  336. CAM_FENCE_OP_ALREADY_REGISTERED_CB);
  337. CAM_WARN(CAM_DMA_FENCE,
  338. "dma fence at idx: %d fd: %d seqno: %llu has already registered a cb for sync: %d - same fd for 2 fences?",
  339. dma_fence_row_idx, row->fd, dma_fence->seqno, row->sync_obj);
  340. goto monitor_dump;
  341. }
  342. rc = dma_fence_add_callback(row->fence, &row->fence_cb,
  343. __cam_dma_fence_signal_cb);
  344. if (rc) {
  345. CAM_ERR(CAM_DMA_FENCE,
  346. "Failed to register cb for dma fence fd: %d seqno: %llu rc: %d",
  347. row->fd, dma_fence->seqno, rc);
  348. goto monitor_dump;
  349. }
  350. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  351. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  352. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  353. CAM_FENCE_OP_REGISTER_CB);
  354. row->cb_registered_for_sync = true;
  355. row->sync_obj = *sync_obj;
  356. row->sync_cb = sync_cb;
  357. CAM_DBG(CAM_DMA_FENCE,
  358. "CB successfully registered for dma fence fd: %d seqno: %llu for sync_obj: %d",
  359. row->fd, dma_fence->seqno, *sync_obj);
  360. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  361. return rc;
  362. monitor_dump:
  363. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  364. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  365. return rc;
  366. }
  367. static int __cam_dma_fence_signal_fence(
  368. struct dma_fence *dma_fence,
  369. int32_t status)
  370. {
  371. int rc;
  372. unsigned long flags;
  373. bool fence_signaled = false;
  374. spin_lock_irqsave(dma_fence->lock, flags);
  375. fence_signaled = dma_fence_is_signaled_locked(dma_fence);
  376. if (fence_signaled) {
  377. rc = -EPERM;
  378. goto end;
  379. }
  380. if (status)
  381. dma_fence_set_error(dma_fence, status);
  382. rc = dma_fence_signal_locked(dma_fence);
  383. end:
  384. spin_unlock_irqrestore(dma_fence->lock, flags);
  385. if (fence_signaled)
  386. CAM_DBG(CAM_DMA_FENCE, "dma fence seqno: %llu is already signaled",
  387. dma_fence->seqno);
  388. return rc;
  389. }
  390. int cam_dma_fence_internal_signal(
  391. int32_t dma_fence_row_idx,
  392. struct cam_dma_fence_signal *signal_dma_fence)
  393. {
  394. int rc;
  395. struct dma_fence *dma_fence = NULL;
  396. struct cam_dma_fence_row *row = NULL;
  397. if ((dma_fence_row_idx < 0) ||
  398. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  399. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  400. dma_fence_row_idx);
  401. return -EINVAL;
  402. }
  403. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  404. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  405. /* Ensures sync obj cb is not invoked */
  406. row->sync_signal_dma = true;
  407. dma_fence = row->fence;
  408. if (IS_ERR_OR_NULL(dma_fence)) {
  409. CAM_ERR(CAM_DMA_FENCE, "DMA fence in row: %d is invalid",
  410. dma_fence_row_idx);
  411. rc = -EINVAL;
  412. goto monitor_dump;
  413. }
  414. if (row->state == CAM_DMA_FENCE_STATE_SIGNALED) {
  415. CAM_WARN(CAM_DMA_FENCE,
  416. "dma fence fd: %d[seqno: %llu] already in signaled state",
  417. signal_dma_fence->dma_fence_fd, dma_fence->seqno);
  418. rc = 0;
  419. goto monitor_dump;
  420. }
  421. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  422. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  423. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  424. CAM_FENCE_OP_SIGNAL);
  425. if (row->cb_registered_for_sync) {
  426. if (!dma_fence_remove_callback(row->fence, &row->fence_cb)) {
  427. CAM_ERR(CAM_DMA_FENCE,
  428. "Failed to remove cb for dma fence seqno: %llu fd: %d",
  429. dma_fence->seqno, row->fd);
  430. rc = -EINVAL;
  431. goto monitor_dump;
  432. }
  433. }
  434. rc = __cam_dma_fence_signal_fence(dma_fence, signal_dma_fence->status);
  435. if (rc)
  436. CAM_WARN(CAM_DMA_FENCE,
  437. "dma fence seqno: %llu fd: %d already signaled rc: %d",
  438. dma_fence->seqno, row->fd, rc);
  439. row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  440. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  441. CAM_DBG(CAM_DMA_FENCE,
  442. "dma fence fd: %d[seqno: %llu] signaled with status: %d rc: %d",
  443. signal_dma_fence->dma_fence_fd, dma_fence->seqno,
  444. signal_dma_fence->status, rc);
  445. return rc;
  446. monitor_dump:
  447. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  448. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  449. return rc;
  450. }
  451. int cam_dma_fence_signal_fd(struct cam_dma_fence_signal *signal_dma_fence)
  452. {
  453. uint32_t idx;
  454. struct dma_fence *dma_fence = NULL;
  455. dma_fence = __cam_dma_fence_find_fence_in_table(
  456. signal_dma_fence->dma_fence_fd, &idx);
  457. if (IS_ERR_OR_NULL(dma_fence)) {
  458. CAM_ERR(CAM_DMA_FENCE, "Failed to find dma fence for fd: %d",
  459. signal_dma_fence->dma_fence_fd);
  460. return -EINVAL;
  461. }
  462. return cam_dma_fence_internal_signal(idx, signal_dma_fence);
  463. }
  464. static int __cam_dma_fence_get_fd(int32_t *row_idx,
  465. const char *name)
  466. {
  467. int fd = -1;
  468. uint32_t idx;
  469. struct dma_fence *dma_fence = NULL;
  470. spinlock_t *dma_fence_lock = NULL;
  471. struct sync_file *sync_file = NULL;
  472. if (__cam_dma_fence_find_free_idx(&idx))
  473. goto end;
  474. dma_fence_lock = kzalloc(sizeof(spinlock_t), GFP_KERNEL);
  475. if (!dma_fence_lock)
  476. goto free_idx;
  477. dma_fence = kzalloc(sizeof(struct dma_fence), GFP_KERNEL);
  478. if (!dma_fence) {
  479. kfree(dma_fence_lock);
  480. goto free_idx;
  481. }
  482. spin_lock_init(dma_fence_lock);
  483. dma_fence_init(dma_fence, &cam_sync_dma_fence_ops, dma_fence_lock,
  484. g_cam_dma_fence_dev->dma_fence_context,
  485. atomic64_inc_return(&g_cam_dma_fence_seq_no));
  486. fd = get_unused_fd_flags(O_CLOEXEC);
  487. if (fd < 0) {
  488. CAM_ERR(CAM_DMA_FENCE, "failed to get a unused fd: %d", fd);
  489. dma_fence_put(dma_fence);
  490. goto free_idx;
  491. }
  492. sync_file = sync_file_create(dma_fence);
  493. if (!sync_file) {
  494. put_unused_fd(fd);
  495. fd = -1;
  496. dma_fence_put(dma_fence);
  497. goto free_idx;
  498. }
  499. fd_install(fd, sync_file->file);
  500. *row_idx = idx;
  501. __cam_dma_fence_init_row(name, dma_fence, fd, idx, false);
  502. CAM_DBG(CAM_DMA_FENCE, "Created dma fence fd: %d[%s] seqno: %llu row_idx: %u ref_cnt: %u",
  503. fd, name, dma_fence->seqno, idx, kref_read(&dma_fence->refcount));
  504. return fd;
  505. free_idx:
  506. clear_bit(idx, g_cam_dma_fence_dev->bitmap);
  507. end:
  508. return fd;
  509. }
  510. int cam_dma_fence_create_fd(
  511. int32_t *dma_fence_fd, int32_t *dma_fence_row_idx, const char *name)
  512. {
  513. int fd = -1, rc = 0;
  514. if (!dma_fence_fd || !dma_fence_row_idx) {
  515. CAM_ERR(CAM_DMA_FENCE, "Invalid args fd: %pK dma_fence_row_idx: %pK",
  516. dma_fence_fd, dma_fence_row_idx);
  517. return -EINVAL;
  518. }
  519. fd = __cam_dma_fence_get_fd(dma_fence_row_idx, name);
  520. if (fd < 0) {
  521. rc = -EBADFD;
  522. goto end;
  523. }
  524. *dma_fence_fd = fd;
  525. end:
  526. return rc;
  527. }
  528. void __cam_dma_fence_save_previous_monitor_data(int dma_row_idx)
  529. {
  530. struct cam_generic_fence_monitor_data *row_mon_data;
  531. struct cam_dma_fence_row *row;
  532. if (!g_cam_dma_fence_dev->monitor_data)
  533. return;
  534. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  535. row_mon_data = CAM_GENERIC_MONITOR_GET_DATA(
  536. g_cam_dma_fence_dev->monitor_data, dma_row_idx);
  537. /* save current usage details into prev variables */
  538. strscpy(row_mon_data->prev_name, row->name, CAM_DMA_FENCE_NAME_LEN);
  539. row_mon_data->prev_obj_id = row->fd;
  540. row_mon_data->prev_sync_id = row->sync_obj;
  541. row_mon_data->prev_state = row->state;
  542. row_mon_data->swap_monitor_entries = !row_mon_data->swap_monitor_entries;
  543. row_mon_data->prev_monitor_head = atomic64_read(&row_mon_data->monitor_head);
  544. }
  545. static int __cam_dma_fence_release(int32_t dma_row_idx)
  546. {
  547. struct dma_fence *dma_fence = NULL;
  548. struct cam_dma_fence_row *row = NULL;
  549. int rc;
  550. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  551. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  552. dma_fence = row->fence;
  553. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  554. CAM_ERR(CAM_DMA_FENCE, "Invalid row index: %u, state: %u",
  555. dma_row_idx, row->state);
  556. rc = -EINVAL;
  557. goto monitor_dump;
  558. }
  559. if (row->state == CAM_DMA_FENCE_STATE_ACTIVE) {
  560. CAM_WARN(CAM_DMA_FENCE,
  561. "Unsignaled fence being released name: %s seqno: %llu fd:%d",
  562. row->name, dma_fence->seqno, row->fd);
  563. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  564. &cam_sync_monitor_mask))
  565. cam_generic_fence_update_monitor_array(dma_row_idx,
  566. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  567. CAM_FENCE_OP_SIGNAL);
  568. __cam_dma_fence_signal_fence(dma_fence, -ECANCELED);
  569. }
  570. CAM_DBG(CAM_DMA_FENCE,
  571. "Releasing dma fence with fd: %d[%s] row_idx: %u current ref_cnt: %u",
  572. row->fd, row->name, dma_row_idx, kref_read(&dma_fence->refcount));
  573. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  574. /* Update monitor entries & save data before row memset to 0 */
  575. cam_generic_fence_update_monitor_array(dma_row_idx,
  576. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  577. CAM_FENCE_OP_DESTROY);
  578. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE_DUMP, &cam_sync_monitor_mask))
  579. __cam_dma_fence_dump_monitor_array(dma_row_idx);
  580. __cam_dma_fence_save_previous_monitor_data(dma_row_idx);
  581. }
  582. /* putref on dma fence */
  583. dma_fence_put(dma_fence);
  584. /* deinit row */
  585. memset(row, 0, sizeof(struct cam_dma_fence_row));
  586. clear_bit(dma_row_idx, g_cam_dma_fence_dev->bitmap);
  587. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  588. return 0;
  589. monitor_dump:
  590. __cam_dma_fence_dump_monitor_array(dma_row_idx);
  591. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  592. return rc;
  593. }
  594. static int __cam_dma_fence_release_fd(int fd)
  595. {
  596. int32_t idx;
  597. struct dma_fence *dma_fence = NULL;
  598. dma_fence = __cam_dma_fence_find_fence_in_table(fd, &idx);
  599. if (IS_ERR_OR_NULL(dma_fence)) {
  600. CAM_ERR(CAM_DMA_FENCE, "Failed to find dma fence for fd: %d", fd);
  601. return -EINVAL;
  602. }
  603. return __cam_dma_fence_release(idx);
  604. }
  605. static int __cam_dma_fence_release_row(
  606. int32_t dma_fence_row_idx)
  607. {
  608. if ((dma_fence_row_idx < 0) ||
  609. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  610. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  611. dma_fence_row_idx);
  612. return -EINVAL;
  613. }
  614. return __cam_dma_fence_release(dma_fence_row_idx);
  615. }
  616. int cam_dma_fence_release(
  617. struct cam_dma_fence_release_params *release_params)
  618. {
  619. if (release_params->use_row_idx)
  620. return __cam_dma_fence_release_row(release_params->u.dma_row_idx);
  621. else
  622. return __cam_dma_fence_release_fd(release_params->u.dma_fence_fd);
  623. }
  624. void cam_dma_fence_close(void)
  625. {
  626. int i;
  627. struct cam_dma_fence_row *row = NULL;
  628. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  629. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  630. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  631. row = &g_cam_dma_fence_dev->rows[i];
  632. if (row->state != CAM_DMA_FENCE_STATE_INVALID) {
  633. CAM_DBG(CAM_DMA_FENCE,
  634. "Releasing dma fence seqno: %llu associated with fd: %d[%s] ref_cnt: %u",
  635. row->fence->seqno, row->fd, row->name,
  636. kref_read(&row->fence->refcount));
  637. /* If registered for cb, remove cb */
  638. if (row->cb_registered_for_sync) {
  639. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  640. &cam_sync_monitor_mask))
  641. cam_generic_fence_update_monitor_array(i,
  642. &g_cam_dma_fence_dev->dev_lock,
  643. g_cam_dma_fence_dev->monitor_data,
  644. CAM_FENCE_OP_UNREGISTER_CB);
  645. dma_fence_remove_callback(row->fence, &row->fence_cb);
  646. }
  647. /* Signal and put if the dma fence is created from camera */
  648. if (!row->ext_dma_fence) {
  649. if (row->state != CAM_DMA_FENCE_STATE_SIGNALED) {
  650. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  651. &cam_sync_monitor_mask))
  652. cam_generic_fence_update_monitor_array(i,
  653. &g_cam_dma_fence_dev->dev_lock,
  654. g_cam_dma_fence_dev->monitor_data,
  655. CAM_FENCE_OP_SIGNAL);
  656. __cam_dma_fence_signal_fence(row->fence, -EADV);
  657. }
  658. dma_fence_put(row->fence);
  659. }
  660. memset(row, 0, sizeof(struct cam_dma_fence_row));
  661. clear_bit(i, g_cam_dma_fence_dev->bitmap);
  662. }
  663. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  664. }
  665. if (g_cam_dma_fence_dev->monitor_data) {
  666. for (i = 0; i < CAM_DMA_FENCE_TABLE_SZ; i++)
  667. kfree(g_cam_dma_fence_dev->monitor_data[i]);
  668. }
  669. kfree(g_cam_dma_fence_dev->monitor_data);
  670. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  671. CAM_DBG(CAM_DMA_FENCE, "Close on Camera DMA fence driver");
  672. }
  673. void cam_dma_fence_open(void)
  674. {
  675. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  676. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  677. g_cam_dma_fence_dev->monitor_data = kzalloc(
  678. sizeof(struct cam_generic_fence_monitor_data *) *
  679. CAM_DMA_FENCE_TABLE_SZ, GFP_KERNEL);
  680. if (!g_cam_dma_fence_dev->monitor_data) {
  681. CAM_WARN(CAM_DMA_FENCE, "Failed to allocate memory %d",
  682. sizeof(struct cam_generic_fence_monitor_data *) *
  683. CAM_DMA_FENCE_TABLE_SZ);
  684. }
  685. }
  686. /* DMA fence seqno reset */
  687. atomic64_set(&g_cam_dma_fence_seq_no, 0);
  688. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  689. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver opened");
  690. }
  691. int cam_dma_fence_driver_init(void)
  692. {
  693. int i;
  694. g_cam_dma_fence_dev = kzalloc(sizeof(struct cam_dma_fence_device), GFP_KERNEL);
  695. if (!g_cam_dma_fence_dev)
  696. return -ENOMEM;
  697. mutex_init(&g_cam_dma_fence_dev->dev_lock);
  698. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++)
  699. spin_lock_init(&g_cam_dma_fence_dev->row_spinlocks[i]);
  700. bitmap_zero(g_cam_dma_fence_dev->bitmap, CAM_DMA_FENCE_MAX_FENCES);
  701. /* zero will be considered an invalid slot */
  702. set_bit(0, g_cam_dma_fence_dev->bitmap);
  703. g_cam_dma_fence_dev->dma_fence_context = dma_fence_context_alloc(1);
  704. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver initialized");
  705. return 0;
  706. }
  707. void cam_dma_fence_driver_deinit(void)
  708. {
  709. kfree(g_cam_dma_fence_dev);
  710. g_cam_dma_fence_dev = NULL;
  711. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver deinitialized");
  712. }