dp_main.c 210 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /**
  92. * default_dscp_tid_map - Default DSCP-TID mapping
  93. *
  94. * DSCP TID
  95. * 000000 0
  96. * 001000 1
  97. * 010000 2
  98. * 011000 3
  99. * 100000 4
  100. * 101000 5
  101. * 110000 6
  102. * 111000 7
  103. */
  104. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  105. 0, 0, 0, 0, 0, 0, 0, 0,
  106. 1, 1, 1, 1, 1, 1, 1, 1,
  107. 2, 2, 2, 2, 2, 2, 2, 2,
  108. 3, 3, 3, 3, 3, 3, 3, 3,
  109. 4, 4, 4, 4, 4, 4, 4, 4,
  110. 5, 5, 5, 5, 5, 5, 5, 5,
  111. 6, 6, 6, 6, 6, 6, 6, 6,
  112. 7, 7, 7, 7, 7, 7, 7, 7,
  113. };
  114. /*
  115. * struct dp_rate_debug
  116. *
  117. * @mcs_type: print string for a given mcs
  118. * @valid: valid mcs rate?
  119. */
  120. struct dp_rate_debug {
  121. char mcs_type[DP_MAX_MCS_STRING_LEN];
  122. uint8_t valid;
  123. };
  124. #define MCS_VALID 1
  125. #define MCS_INVALID 0
  126. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  127. {
  128. {"OFDM 48 Mbps", MCS_VALID},
  129. {"OFDM 24 Mbps", MCS_VALID},
  130. {"OFDM 12 Mbps", MCS_VALID},
  131. {"OFDM 6 Mbps ", MCS_VALID},
  132. {"OFDM 54 Mbps", MCS_VALID},
  133. {"OFDM 36 Mbps", MCS_VALID},
  134. {"OFDM 18 Mbps", MCS_VALID},
  135. {"OFDM 9 Mbps ", MCS_VALID},
  136. {"INVALID ", MCS_INVALID},
  137. {"INVALID ", MCS_INVALID},
  138. {"INVALID ", MCS_INVALID},
  139. {"INVALID ", MCS_INVALID},
  140. {"INVALID ", MCS_VALID},
  141. },
  142. {
  143. {"CCK 11 Mbps Long ", MCS_VALID},
  144. {"CCK 5.5 Mbps Long ", MCS_VALID},
  145. {"CCK 2 Mbps Long ", MCS_VALID},
  146. {"CCK 1 Mbps Long ", MCS_VALID},
  147. {"CCK 11 Mbps Short ", MCS_VALID},
  148. {"CCK 5.5 Mbps Short", MCS_VALID},
  149. {"CCK 2 Mbps Short ", MCS_VALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_INVALID},
  153. {"INVALID ", MCS_INVALID},
  154. {"INVALID ", MCS_INVALID},
  155. {"INVALID ", MCS_VALID},
  156. },
  157. {
  158. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  159. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  160. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  161. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  162. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  163. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  164. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  165. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_INVALID},
  170. {"INVALID ", MCS_VALID},
  171. },
  172. {
  173. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  174. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  175. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  176. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  177. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  178. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  179. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  180. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  181. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  182. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  183. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  184. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  185. {"INVALID ", MCS_VALID},
  186. },
  187. {
  188. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  189. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  190. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  191. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  192. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  193. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  194. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  195. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  196. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  197. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  198. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  199. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  200. {"INVALID ", MCS_VALID},
  201. }
  202. };
  203. /**
  204. * @brief Cpu ring map types
  205. */
  206. enum dp_cpu_ring_map_types {
  207. DP_DEFAULT_MAP,
  208. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  209. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  210. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  211. DP_CPU_RING_MAP_MAX
  212. };
  213. /**
  214. * @brief Cpu to tx ring map
  215. */
  216. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  217. {0x0, 0x1, 0x2, 0x0},
  218. {0x1, 0x2, 0x1, 0x2},
  219. {0x0, 0x2, 0x0, 0x2},
  220. {0x2, 0x2, 0x2, 0x2}
  221. };
  222. /**
  223. * @brief Select the type of statistics
  224. */
  225. enum dp_stats_type {
  226. STATS_FW = 0,
  227. STATS_HOST = 1,
  228. STATS_TYPE_MAX = 2,
  229. };
  230. /**
  231. * @brief General Firmware statistics options
  232. *
  233. */
  234. enum dp_fw_stats {
  235. TXRX_FW_STATS_INVALID = -1,
  236. };
  237. /**
  238. * dp_stats_mapping_table - Firmware and Host statistics
  239. * currently supported
  240. */
  241. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  242. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  253. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  261. /* Last ENUM for HTT FW STATS */
  262. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  263. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  264. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  265. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  266. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  267. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  268. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  269. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  270. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  271. };
  272. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  273. struct cdp_peer *peer_hdl,
  274. uint8_t *mac_addr,
  275. enum cdp_txrx_ast_entry_type type,
  276. uint32_t flags)
  277. {
  278. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  279. (struct dp_peer *)peer_hdl,
  280. mac_addr,
  281. type,
  282. flags);
  283. }
  284. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  285. void *ast_entry_hdl)
  286. {
  287. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  288. qdf_spin_lock_bh(&soc->ast_lock);
  289. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  290. (struct dp_ast_entry *)ast_entry_hdl);
  291. qdf_spin_unlock_bh(&soc->ast_lock);
  292. }
  293. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  294. struct cdp_peer *peer_hdl,
  295. uint8_t *wds_macaddr,
  296. uint32_t flags)
  297. {
  298. int status;
  299. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  300. struct dp_ast_entry *ast_entry = NULL;
  301. qdf_spin_lock_bh(&soc->ast_lock);
  302. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  303. status = dp_peer_update_ast(soc,
  304. (struct dp_peer *)peer_hdl,
  305. ast_entry,
  306. flags);
  307. qdf_spin_unlock_bh(&soc->ast_lock);
  308. return status;
  309. }
  310. /*
  311. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  312. * @soc_handle: Datapath SOC handle
  313. * @wds_macaddr: MAC address of the WDS entry to be added
  314. * @vdev_hdl: vdev handle
  315. * Return: None
  316. */
  317. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  318. uint8_t *wds_macaddr, void *vdev_hdl)
  319. {
  320. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  321. struct dp_ast_entry *ast_entry = NULL;
  322. qdf_spin_lock_bh(&soc->ast_lock);
  323. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  324. if (ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) {
  325. ast_entry->is_active = TRUE;
  326. }
  327. qdf_spin_unlock_bh(&soc->ast_lock);
  328. }
  329. /*
  330. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  331. * @soc: Datapath SOC handle
  332. * @vdev_hdl: vdev handle
  333. *
  334. * Return: None
  335. */
  336. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  337. void *vdev_hdl)
  338. {
  339. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  340. struct dp_pdev *pdev;
  341. struct dp_vdev *vdev;
  342. struct dp_peer *peer;
  343. struct dp_ast_entry *ase, *temp_ase;
  344. int i;
  345. qdf_spin_lock_bh(&soc->ast_lock);
  346. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  347. pdev = soc->pdev_list[i];
  348. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  349. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  350. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  351. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  352. if (ase->type ==
  353. CDP_TXRX_AST_TYPE_STATIC)
  354. continue;
  355. ase->is_active = TRUE;
  356. }
  357. }
  358. }
  359. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  360. }
  361. qdf_spin_unlock_bh(&soc->ast_lock);
  362. }
  363. /*
  364. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  365. * @soc: Datapath SOC handle
  366. *
  367. * Return: None
  368. */
  369. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  370. {
  371. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  372. struct dp_pdev *pdev;
  373. struct dp_vdev *vdev;
  374. struct dp_peer *peer;
  375. struct dp_ast_entry *ase, *temp_ase;
  376. int i;
  377. qdf_spin_lock_bh(&soc->ast_lock);
  378. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  379. pdev = soc->pdev_list[i];
  380. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  381. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  382. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  383. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  384. if (ase->type ==
  385. CDP_TXRX_AST_TYPE_STATIC)
  386. continue;
  387. dp_peer_del_ast(soc, ase);
  388. }
  389. }
  390. }
  391. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  392. }
  393. qdf_spin_unlock_bh(&soc->ast_lock);
  394. }
  395. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  396. uint8_t *ast_mac_addr)
  397. {
  398. struct dp_ast_entry *ast_entry;
  399. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  400. qdf_spin_lock_bh(&soc->ast_lock);
  401. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  402. qdf_spin_unlock_bh(&soc->ast_lock);
  403. return (void *)ast_entry;
  404. }
  405. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  406. void *ast_entry_hdl)
  407. {
  408. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  409. (struct dp_ast_entry *)ast_entry_hdl);
  410. }
  411. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  412. void *ast_entry_hdl)
  413. {
  414. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  415. (struct dp_ast_entry *)ast_entry_hdl);
  416. }
  417. static void dp_peer_ast_set_type_wifi3(
  418. struct cdp_soc_t *soc_hdl,
  419. void *ast_entry_hdl,
  420. enum cdp_txrx_ast_entry_type type)
  421. {
  422. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  423. (struct dp_ast_entry *)ast_entry_hdl,
  424. type);
  425. }
  426. /**
  427. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  428. * @ring_num: ring num of the ring being queried
  429. * @grp_mask: the grp_mask array for the ring type in question.
  430. *
  431. * The grp_mask array is indexed by group number and the bit fields correspond
  432. * to ring numbers. We are finding which interrupt group a ring belongs to.
  433. *
  434. * Return: the index in the grp_mask array with the ring number.
  435. * -QDF_STATUS_E_NOENT if no entry is found
  436. */
  437. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  438. {
  439. int ext_group_num;
  440. int mask = 1 << ring_num;
  441. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  442. ext_group_num++) {
  443. if (mask & grp_mask[ext_group_num])
  444. return ext_group_num;
  445. }
  446. return -QDF_STATUS_E_NOENT;
  447. }
  448. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  449. enum hal_ring_type ring_type,
  450. int ring_num)
  451. {
  452. int *grp_mask;
  453. switch (ring_type) {
  454. case WBM2SW_RELEASE:
  455. /* dp_tx_comp_handler - soc->tx_comp_ring */
  456. if (ring_num < 3)
  457. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  458. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  459. else if (ring_num == 3) {
  460. /* sw treats this as a separate ring type */
  461. grp_mask = &soc->wlan_cfg_ctx->
  462. int_rx_wbm_rel_ring_mask[0];
  463. ring_num = 0;
  464. } else {
  465. qdf_assert(0);
  466. return -QDF_STATUS_E_NOENT;
  467. }
  468. break;
  469. case REO_EXCEPTION:
  470. /* dp_rx_err_process - &soc->reo_exception_ring */
  471. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  472. break;
  473. case REO_DST:
  474. /* dp_rx_process - soc->reo_dest_ring */
  475. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  476. break;
  477. case REO_STATUS:
  478. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  479. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  480. break;
  481. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  482. case RXDMA_MONITOR_STATUS:
  483. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  484. case RXDMA_MONITOR_DST:
  485. /* dp_mon_process */
  486. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  487. break;
  488. case RXDMA_DST:
  489. /* dp_rxdma_err_process */
  490. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  491. break;
  492. case RXDMA_BUF:
  493. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  494. break;
  495. case RXDMA_MONITOR_BUF:
  496. /* TODO: support low_thresh interrupt */
  497. return -QDF_STATUS_E_NOENT;
  498. break;
  499. case TCL_DATA:
  500. case TCL_CMD:
  501. case REO_CMD:
  502. case SW2WBM_RELEASE:
  503. case WBM_IDLE_LINK:
  504. /* normally empty SW_TO_HW rings */
  505. return -QDF_STATUS_E_NOENT;
  506. break;
  507. case TCL_STATUS:
  508. case REO_REINJECT:
  509. /* misc unused rings */
  510. return -QDF_STATUS_E_NOENT;
  511. break;
  512. case CE_SRC:
  513. case CE_DST:
  514. case CE_DST_STATUS:
  515. /* CE_rings - currently handled by hif */
  516. default:
  517. return -QDF_STATUS_E_NOENT;
  518. break;
  519. }
  520. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  521. }
  522. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  523. *ring_params, int ring_type, int ring_num)
  524. {
  525. int msi_group_number;
  526. int msi_data_count;
  527. int ret;
  528. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  529. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  530. &msi_data_count, &msi_data_start,
  531. &msi_irq_start);
  532. if (ret)
  533. return;
  534. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  535. ring_num);
  536. if (msi_group_number < 0) {
  537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  538. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  539. ring_type, ring_num);
  540. ring_params->msi_addr = 0;
  541. ring_params->msi_data = 0;
  542. return;
  543. }
  544. if (msi_group_number > msi_data_count) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  546. FL("2 msi_groups will share an msi; msi_group_num %d"),
  547. msi_group_number);
  548. QDF_ASSERT(0);
  549. }
  550. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  551. ring_params->msi_addr = addr_low;
  552. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  553. ring_params->msi_data = (msi_group_number % msi_data_count)
  554. + msi_data_start;
  555. ring_params->flags |= HAL_SRNG_MSI_INTR;
  556. }
  557. /**
  558. * dp_print_ast_stats() - Dump AST table contents
  559. * @soc: Datapath soc handle
  560. *
  561. * return void
  562. */
  563. #ifdef FEATURE_AST
  564. static void dp_print_ast_stats(struct dp_soc *soc)
  565. {
  566. uint8_t i;
  567. uint8_t num_entries = 0;
  568. struct dp_vdev *vdev;
  569. struct dp_pdev *pdev;
  570. struct dp_peer *peer;
  571. struct dp_ast_entry *ase, *tmp_ase;
  572. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  573. DP_PRINT_STATS("AST Stats:");
  574. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  575. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  576. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  577. DP_PRINT_STATS("AST Table:");
  578. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  579. pdev = soc->pdev_list[i];
  580. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  581. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  582. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  583. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  584. DP_PRINT_STATS("%6d mac_addr = %pM"
  585. " peer_mac_addr = %pM"
  586. " type = %s"
  587. " next_hop = %d"
  588. " is_active = %d"
  589. " is_bss = %d"
  590. " ast_idx = %d"
  591. " pdev_id = %d"
  592. " vdev_id = %d",
  593. ++num_entries,
  594. ase->mac_addr.raw,
  595. ase->peer->mac_addr.raw,
  596. type[ase->type],
  597. ase->next_hop,
  598. ase->is_active,
  599. ase->is_bss,
  600. ase->ast_idx,
  601. ase->pdev_id,
  602. ase->vdev_id);
  603. }
  604. }
  605. }
  606. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  607. }
  608. }
  609. #else
  610. static void dp_print_ast_stats(struct dp_soc *soc)
  611. {
  612. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  613. return;
  614. }
  615. #endif
  616. static void dp_print_peer_table(struct dp_vdev *vdev)
  617. {
  618. struct dp_peer *peer = NULL;
  619. DP_PRINT_STATS("Dumping Peer Table Stats:");
  620. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  621. if (!peer) {
  622. DP_PRINT_STATS("Invalid Peer");
  623. return;
  624. }
  625. DP_PRINT_STATS(" peer_mac_addr = %pM"
  626. " nawds_enabled = %d"
  627. " bss_peer = %d"
  628. " wapi = %d"
  629. " wds_enabled = %d"
  630. " delete in progress = %d",
  631. peer->mac_addr.raw,
  632. peer->nawds_enabled,
  633. peer->bss_peer,
  634. peer->wapi,
  635. peer->wds_enabled,
  636. peer->delete_in_progress);
  637. }
  638. }
  639. /*
  640. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  641. */
  642. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  643. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  644. {
  645. void *hal_soc = soc->hal_soc;
  646. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  647. /* TODO: See if we should get align size from hal */
  648. uint32_t ring_base_align = 8;
  649. struct hal_srng_params ring_params;
  650. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  651. /* TODO: Currently hal layer takes care of endianness related settings.
  652. * See if these settings need to passed from DP layer
  653. */
  654. ring_params.flags = 0;
  655. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  656. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  657. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  658. srng->hal_srng = NULL;
  659. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  660. srng->num_entries = num_entries;
  661. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  662. soc->osdev, soc->osdev->dev, srng->alloc_size,
  663. &(srng->base_paddr_unaligned));
  664. if (!srng->base_vaddr_unaligned) {
  665. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  666. FL("alloc failed - ring_type: %d, ring_num %d"),
  667. ring_type, ring_num);
  668. return QDF_STATUS_E_NOMEM;
  669. }
  670. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  671. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  672. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  673. ((unsigned long)(ring_params.ring_base_vaddr) -
  674. (unsigned long)srng->base_vaddr_unaligned);
  675. ring_params.num_entries = num_entries;
  676. if (soc->intr_mode == DP_INTR_MSI) {
  677. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  679. FL("Using MSI for ring_type: %d, ring_num %d"),
  680. ring_type, ring_num);
  681. } else {
  682. ring_params.msi_data = 0;
  683. ring_params.msi_addr = 0;
  684. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  685. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  686. ring_type, ring_num);
  687. }
  688. /*
  689. * Setup interrupt timer and batch counter thresholds for
  690. * interrupt mitigation based on ring type
  691. */
  692. if (ring_type == REO_DST) {
  693. ring_params.intr_timer_thres_us =
  694. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  695. ring_params.intr_batch_cntr_thres_entries =
  696. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  697. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  698. ring_params.intr_timer_thres_us =
  699. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  700. ring_params.intr_batch_cntr_thres_entries =
  701. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  702. } else {
  703. ring_params.intr_timer_thres_us =
  704. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  705. ring_params.intr_batch_cntr_thres_entries =
  706. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  707. }
  708. /* Enable low threshold interrupts for rx buffer rings (regular and
  709. * monitor buffer rings.
  710. * TODO: See if this is required for any other ring
  711. */
  712. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  713. (ring_type == RXDMA_MONITOR_STATUS)) {
  714. /* TODO: Setting low threshold to 1/8th of ring size
  715. * see if this needs to be configurable
  716. */
  717. ring_params.low_threshold = num_entries >> 3;
  718. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  719. ring_params.intr_timer_thres_us =
  720. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  721. ring_params.intr_batch_cntr_thres_entries = 0;
  722. }
  723. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  724. mac_id, &ring_params);
  725. if (!srng->hal_srng) {
  726. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  727. srng->alloc_size,
  728. srng->base_vaddr_unaligned,
  729. srng->base_paddr_unaligned, 0);
  730. }
  731. return 0;
  732. }
  733. /**
  734. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  735. * Any buffers allocated and attached to ring entries are expected to be freed
  736. * before calling this function.
  737. */
  738. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  739. int ring_type, int ring_num)
  740. {
  741. if (!srng->hal_srng) {
  742. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  743. FL("Ring type: %d, num:%d not setup"),
  744. ring_type, ring_num);
  745. return;
  746. }
  747. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  748. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  749. srng->alloc_size,
  750. srng->base_vaddr_unaligned,
  751. srng->base_paddr_unaligned, 0);
  752. srng->hal_srng = NULL;
  753. }
  754. /* TODO: Need this interface from HIF */
  755. void *hif_get_hal_handle(void *hif_handle);
  756. /*
  757. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  758. * @dp_ctx: DP SOC handle
  759. * @budget: Number of frames/descriptors that can be processed in one shot
  760. *
  761. * Return: remaining budget/quota for the soc device
  762. */
  763. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  764. {
  765. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  766. struct dp_soc *soc = int_ctx->soc;
  767. int ring = 0;
  768. uint32_t work_done = 0;
  769. int budget = dp_budget;
  770. uint8_t tx_mask = int_ctx->tx_ring_mask;
  771. uint8_t rx_mask = int_ctx->rx_ring_mask;
  772. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  773. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  774. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  775. uint32_t remaining_quota = dp_budget;
  776. struct dp_pdev *pdev = NULL;
  777. int mac_id;
  778. /* Process Tx completion interrupts first to return back buffers */
  779. while (tx_mask) {
  780. if (tx_mask & 0x1) {
  781. work_done = dp_tx_comp_handler(soc,
  782. soc->tx_comp_ring[ring].hal_srng,
  783. remaining_quota);
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  785. "tx mask 0x%x ring %d, budget %d, work_done %d",
  786. tx_mask, ring, budget, work_done);
  787. budget -= work_done;
  788. if (budget <= 0)
  789. goto budget_done;
  790. remaining_quota = budget;
  791. }
  792. tx_mask = tx_mask >> 1;
  793. ring++;
  794. }
  795. /* Process REO Exception ring interrupt */
  796. if (rx_err_mask) {
  797. work_done = dp_rx_err_process(soc,
  798. soc->reo_exception_ring.hal_srng,
  799. remaining_quota);
  800. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  801. "REO Exception Ring: work_done %d budget %d",
  802. work_done, budget);
  803. budget -= work_done;
  804. if (budget <= 0) {
  805. goto budget_done;
  806. }
  807. remaining_quota = budget;
  808. }
  809. /* Process Rx WBM release ring interrupt */
  810. if (rx_wbm_rel_mask) {
  811. work_done = dp_rx_wbm_err_process(soc,
  812. soc->rx_rel_ring.hal_srng, remaining_quota);
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  814. "WBM Release Ring: work_done %d budget %d",
  815. work_done, budget);
  816. budget -= work_done;
  817. if (budget <= 0) {
  818. goto budget_done;
  819. }
  820. remaining_quota = budget;
  821. }
  822. /* Process Rx interrupts */
  823. if (rx_mask) {
  824. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  825. if (rx_mask & (1 << ring)) {
  826. work_done = dp_rx_process(int_ctx,
  827. soc->reo_dest_ring[ring].hal_srng,
  828. remaining_quota);
  829. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  830. "rx mask 0x%x ring %d, work_done %d budget %d",
  831. rx_mask, ring, work_done, budget);
  832. budget -= work_done;
  833. if (budget <= 0)
  834. goto budget_done;
  835. remaining_quota = budget;
  836. }
  837. }
  838. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  839. work_done = dp_rxdma_err_process(soc, ring,
  840. remaining_quota);
  841. budget -= work_done;
  842. }
  843. }
  844. if (reo_status_mask)
  845. dp_reo_status_ring_handler(soc);
  846. /* Process LMAC interrupts */
  847. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  848. pdev = soc->pdev_list[ring];
  849. if (pdev == NULL)
  850. continue;
  851. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  852. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  853. pdev->pdev_id);
  854. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  855. work_done = dp_mon_process(soc, mac_for_pdev,
  856. remaining_quota);
  857. budget -= work_done;
  858. if (budget <= 0)
  859. goto budget_done;
  860. remaining_quota = budget;
  861. }
  862. if (int_ctx->rxdma2host_ring_mask &
  863. (1 << mac_for_pdev)) {
  864. work_done = dp_rxdma_err_process(soc,
  865. mac_for_pdev,
  866. remaining_quota);
  867. budget -= work_done;
  868. if (budget <= 0)
  869. goto budget_done;
  870. remaining_quota = budget;
  871. }
  872. if (int_ctx->host2rxdma_ring_mask &
  873. (1 << mac_for_pdev)) {
  874. union dp_rx_desc_list_elem_t *desc_list = NULL;
  875. union dp_rx_desc_list_elem_t *tail = NULL;
  876. struct dp_srng *rx_refill_buf_ring =
  877. &pdev->rx_refill_buf_ring;
  878. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  879. 1);
  880. dp_rx_buffers_replenish(soc, mac_for_pdev,
  881. rx_refill_buf_ring,
  882. &soc->rx_desc_buf[mac_for_pdev], 0,
  883. &desc_list, &tail);
  884. }
  885. }
  886. }
  887. qdf_lro_flush(int_ctx->lro_ctx);
  888. budget_done:
  889. return dp_budget - budget;
  890. }
  891. #ifdef DP_INTR_POLL_BASED
  892. /* dp_interrupt_timer()- timer poll for interrupts
  893. *
  894. * @arg: SoC Handle
  895. *
  896. * Return:
  897. *
  898. */
  899. static void dp_interrupt_timer(void *arg)
  900. {
  901. struct dp_soc *soc = (struct dp_soc *) arg;
  902. int i;
  903. if (qdf_atomic_read(&soc->cmn_init_done)) {
  904. for (i = 0;
  905. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  906. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  907. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  908. }
  909. }
  910. /*
  911. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  912. * @txrx_soc: DP SOC handle
  913. *
  914. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  915. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  916. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  917. *
  918. * Return: 0 for success. nonzero for failure.
  919. */
  920. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  921. {
  922. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  923. int i;
  924. soc->intr_mode = DP_INTR_POLL;
  925. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  926. soc->intr_ctx[i].dp_intr_id = i;
  927. soc->intr_ctx[i].tx_ring_mask =
  928. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  929. soc->intr_ctx[i].rx_ring_mask =
  930. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  931. soc->intr_ctx[i].rx_mon_ring_mask =
  932. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  933. soc->intr_ctx[i].rx_err_ring_mask =
  934. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  935. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  936. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  937. soc->intr_ctx[i].reo_status_ring_mask =
  938. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  939. soc->intr_ctx[i].rxdma2host_ring_mask =
  940. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  941. soc->intr_ctx[i].soc = soc;
  942. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  943. }
  944. qdf_timer_init(soc->osdev, &soc->int_timer,
  945. dp_interrupt_timer, (void *)soc,
  946. QDF_TIMER_TYPE_WAKE_APPS);
  947. return QDF_STATUS_SUCCESS;
  948. }
  949. #if defined(CONFIG_MCL)
  950. extern int con_mode_monitor;
  951. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  952. /*
  953. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  954. * @txrx_soc: DP SOC handle
  955. *
  956. * Call the appropriate attach function based on the mode of operation.
  957. * This is a WAR for enabling monitor mode.
  958. *
  959. * Return: 0 for success. nonzero for failure.
  960. */
  961. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  962. {
  963. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  964. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  965. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  966. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  967. "%s: Poll mode", __func__);
  968. return dp_soc_interrupt_attach_poll(txrx_soc);
  969. } else {
  970. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  971. "%s: Interrupt mode", __func__);
  972. return dp_soc_interrupt_attach(txrx_soc);
  973. }
  974. }
  975. #else
  976. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  977. {
  978. return dp_soc_interrupt_attach_poll(txrx_soc);
  979. }
  980. #endif
  981. #endif
  982. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  983. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  984. {
  985. int j;
  986. int num_irq = 0;
  987. int tx_mask =
  988. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  989. int rx_mask =
  990. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  991. int rx_mon_mask =
  992. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  993. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  994. soc->wlan_cfg_ctx, intr_ctx_num);
  995. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  996. soc->wlan_cfg_ctx, intr_ctx_num);
  997. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  998. soc->wlan_cfg_ctx, intr_ctx_num);
  999. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1000. soc->wlan_cfg_ctx, intr_ctx_num);
  1001. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1002. soc->wlan_cfg_ctx, intr_ctx_num);
  1003. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1004. if (tx_mask & (1 << j)) {
  1005. irq_id_map[num_irq++] =
  1006. (wbm2host_tx_completions_ring1 - j);
  1007. }
  1008. if (rx_mask & (1 << j)) {
  1009. irq_id_map[num_irq++] =
  1010. (reo2host_destination_ring1 - j);
  1011. }
  1012. if (rxdma2host_ring_mask & (1 << j)) {
  1013. irq_id_map[num_irq++] =
  1014. rxdma2host_destination_ring_mac1 -
  1015. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1016. }
  1017. if (host2rxdma_ring_mask & (1 << j)) {
  1018. irq_id_map[num_irq++] =
  1019. host2rxdma_host_buf_ring_mac1 -
  1020. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1021. }
  1022. if (rx_mon_mask & (1 << j)) {
  1023. irq_id_map[num_irq++] =
  1024. ppdu_end_interrupts_mac1 -
  1025. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1026. irq_id_map[num_irq++] =
  1027. rxdma2host_monitor_status_ring_mac1 -
  1028. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1029. }
  1030. if (rx_wbm_rel_ring_mask & (1 << j))
  1031. irq_id_map[num_irq++] = wbm2host_rx_release;
  1032. if (rx_err_ring_mask & (1 << j))
  1033. irq_id_map[num_irq++] = reo2host_exception;
  1034. if (reo_status_ring_mask & (1 << j))
  1035. irq_id_map[num_irq++] = reo2host_status;
  1036. }
  1037. *num_irq_r = num_irq;
  1038. }
  1039. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1040. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1041. int msi_vector_count, int msi_vector_start)
  1042. {
  1043. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1044. soc->wlan_cfg_ctx, intr_ctx_num);
  1045. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1046. soc->wlan_cfg_ctx, intr_ctx_num);
  1047. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1048. soc->wlan_cfg_ctx, intr_ctx_num);
  1049. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1050. soc->wlan_cfg_ctx, intr_ctx_num);
  1051. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1052. soc->wlan_cfg_ctx, intr_ctx_num);
  1053. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1054. soc->wlan_cfg_ctx, intr_ctx_num);
  1055. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1056. soc->wlan_cfg_ctx, intr_ctx_num);
  1057. unsigned int vector =
  1058. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1059. int num_irq = 0;
  1060. soc->intr_mode = DP_INTR_MSI;
  1061. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1062. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1063. irq_id_map[num_irq++] =
  1064. pld_get_msi_irq(soc->osdev->dev, vector);
  1065. *num_irq_r = num_irq;
  1066. }
  1067. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1068. int *irq_id_map, int *num_irq)
  1069. {
  1070. int msi_vector_count, ret;
  1071. uint32_t msi_base_data, msi_vector_start;
  1072. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1073. &msi_vector_count,
  1074. &msi_base_data,
  1075. &msi_vector_start);
  1076. if (ret)
  1077. return dp_soc_interrupt_map_calculate_integrated(soc,
  1078. intr_ctx_num, irq_id_map, num_irq);
  1079. else
  1080. dp_soc_interrupt_map_calculate_msi(soc,
  1081. intr_ctx_num, irq_id_map, num_irq,
  1082. msi_vector_count, msi_vector_start);
  1083. }
  1084. /*
  1085. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1086. * @txrx_soc: DP SOC handle
  1087. *
  1088. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1089. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1090. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1091. *
  1092. * Return: 0 for success. nonzero for failure.
  1093. */
  1094. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1095. {
  1096. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1097. int i = 0;
  1098. int num_irq = 0;
  1099. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1100. int ret = 0;
  1101. /* Map of IRQ ids registered with one interrupt context */
  1102. int irq_id_map[HIF_MAX_GRP_IRQ];
  1103. int tx_mask =
  1104. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1105. int rx_mask =
  1106. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1107. int rx_mon_mask =
  1108. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1109. int rx_err_ring_mask =
  1110. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1111. int rx_wbm_rel_ring_mask =
  1112. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1113. int reo_status_ring_mask =
  1114. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1115. int rxdma2host_ring_mask =
  1116. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1117. int host2rxdma_ring_mask =
  1118. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1119. soc->intr_ctx[i].dp_intr_id = i;
  1120. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1121. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1122. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1123. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1124. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1125. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1126. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1127. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1128. soc->intr_ctx[i].soc = soc;
  1129. num_irq = 0;
  1130. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1131. &num_irq);
  1132. ret = hif_register_ext_group(soc->hif_handle,
  1133. num_irq, irq_id_map, dp_service_srngs,
  1134. &soc->intr_ctx[i], "dp_intr",
  1135. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1136. if (ret) {
  1137. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1138. FL("failed, ret = %d"), ret);
  1139. return QDF_STATUS_E_FAILURE;
  1140. }
  1141. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1142. }
  1143. hif_configure_ext_group_interrupts(soc->hif_handle);
  1144. return QDF_STATUS_SUCCESS;
  1145. }
  1146. /*
  1147. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1148. * @txrx_soc: DP SOC handle
  1149. *
  1150. * Return: void
  1151. */
  1152. static void dp_soc_interrupt_detach(void *txrx_soc)
  1153. {
  1154. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1155. int i;
  1156. if (soc->intr_mode == DP_INTR_POLL) {
  1157. qdf_timer_stop(&soc->int_timer);
  1158. qdf_timer_free(&soc->int_timer);
  1159. } else {
  1160. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1161. }
  1162. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1163. soc->intr_ctx[i].tx_ring_mask = 0;
  1164. soc->intr_ctx[i].rx_ring_mask = 0;
  1165. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1166. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1167. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1168. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1169. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1170. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1171. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1172. }
  1173. }
  1174. #define AVG_MAX_MPDUS_PER_TID 128
  1175. #define AVG_TIDS_PER_CLIENT 2
  1176. #define AVG_FLOWS_PER_TID 2
  1177. #define AVG_MSDUS_PER_FLOW 128
  1178. #define AVG_MSDUS_PER_MPDU 4
  1179. /*
  1180. * Allocate and setup link descriptor pool that will be used by HW for
  1181. * various link and queue descriptors and managed by WBM
  1182. */
  1183. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1184. {
  1185. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1186. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1187. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1188. uint32_t num_mpdus_per_link_desc =
  1189. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1190. uint32_t num_msdus_per_link_desc =
  1191. hal_num_msdus_per_link_desc(soc->hal_soc);
  1192. uint32_t num_mpdu_links_per_queue_desc =
  1193. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1194. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1195. uint32_t total_link_descs, total_mem_size;
  1196. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1197. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1198. uint32_t num_link_desc_banks;
  1199. uint32_t last_bank_size = 0;
  1200. uint32_t entry_size, num_entries;
  1201. int i;
  1202. uint32_t desc_id = 0;
  1203. /* Only Tx queue descriptors are allocated from common link descriptor
  1204. * pool Rx queue descriptors are not included in this because (REO queue
  1205. * extension descriptors) they are expected to be allocated contiguously
  1206. * with REO queue descriptors
  1207. */
  1208. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1209. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1210. num_mpdu_queue_descs = num_mpdu_link_descs /
  1211. num_mpdu_links_per_queue_desc;
  1212. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1213. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1214. num_msdus_per_link_desc;
  1215. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1216. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1217. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1218. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1219. /* Round up to power of 2 */
  1220. total_link_descs = 1;
  1221. while (total_link_descs < num_entries)
  1222. total_link_descs <<= 1;
  1223. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1224. FL("total_link_descs: %u, link_desc_size: %d"),
  1225. total_link_descs, link_desc_size);
  1226. total_mem_size = total_link_descs * link_desc_size;
  1227. total_mem_size += link_desc_align;
  1228. if (total_mem_size <= max_alloc_size) {
  1229. num_link_desc_banks = 0;
  1230. last_bank_size = total_mem_size;
  1231. } else {
  1232. num_link_desc_banks = (total_mem_size) /
  1233. (max_alloc_size - link_desc_align);
  1234. last_bank_size = total_mem_size %
  1235. (max_alloc_size - link_desc_align);
  1236. }
  1237. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1238. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1239. total_mem_size, num_link_desc_banks);
  1240. for (i = 0; i < num_link_desc_banks; i++) {
  1241. soc->link_desc_banks[i].base_vaddr_unaligned =
  1242. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1243. max_alloc_size,
  1244. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1245. soc->link_desc_banks[i].size = max_alloc_size;
  1246. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1247. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1248. ((unsigned long)(
  1249. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1250. link_desc_align));
  1251. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1252. soc->link_desc_banks[i].base_paddr_unaligned) +
  1253. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1254. (unsigned long)(
  1255. soc->link_desc_banks[i].base_vaddr_unaligned));
  1256. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1257. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1258. FL("Link descriptor memory alloc failed"));
  1259. goto fail;
  1260. }
  1261. }
  1262. if (last_bank_size) {
  1263. /* Allocate last bank in case total memory required is not exact
  1264. * multiple of max_alloc_size
  1265. */
  1266. soc->link_desc_banks[i].base_vaddr_unaligned =
  1267. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1268. last_bank_size,
  1269. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1270. soc->link_desc_banks[i].size = last_bank_size;
  1271. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1272. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1273. ((unsigned long)(
  1274. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1275. link_desc_align));
  1276. soc->link_desc_banks[i].base_paddr =
  1277. (unsigned long)(
  1278. soc->link_desc_banks[i].base_paddr_unaligned) +
  1279. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1280. (unsigned long)(
  1281. soc->link_desc_banks[i].base_vaddr_unaligned));
  1282. }
  1283. /* Allocate and setup link descriptor idle list for HW internal use */
  1284. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1285. total_mem_size = entry_size * total_link_descs;
  1286. if (total_mem_size <= max_alloc_size) {
  1287. void *desc;
  1288. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1289. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1290. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1291. FL("Link desc idle ring setup failed"));
  1292. goto fail;
  1293. }
  1294. hal_srng_access_start_unlocked(soc->hal_soc,
  1295. soc->wbm_idle_link_ring.hal_srng);
  1296. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1297. soc->link_desc_banks[i].base_paddr; i++) {
  1298. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1299. ((unsigned long)(
  1300. soc->link_desc_banks[i].base_vaddr) -
  1301. (unsigned long)(
  1302. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1303. / link_desc_size;
  1304. unsigned long paddr = (unsigned long)(
  1305. soc->link_desc_banks[i].base_paddr);
  1306. while (num_entries && (desc = hal_srng_src_get_next(
  1307. soc->hal_soc,
  1308. soc->wbm_idle_link_ring.hal_srng))) {
  1309. hal_set_link_desc_addr(desc,
  1310. LINK_DESC_COOKIE(desc_id, i), paddr);
  1311. num_entries--;
  1312. desc_id++;
  1313. paddr += link_desc_size;
  1314. }
  1315. }
  1316. hal_srng_access_end_unlocked(soc->hal_soc,
  1317. soc->wbm_idle_link_ring.hal_srng);
  1318. } else {
  1319. uint32_t num_scatter_bufs;
  1320. uint32_t num_entries_per_buf;
  1321. uint32_t rem_entries;
  1322. uint8_t *scatter_buf_ptr;
  1323. uint16_t scatter_buf_num;
  1324. soc->wbm_idle_scatter_buf_size =
  1325. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1326. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1327. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1328. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1329. soc->hal_soc, total_mem_size,
  1330. soc->wbm_idle_scatter_buf_size);
  1331. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1332. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1333. FL("scatter bufs size out of bounds"));
  1334. goto fail;
  1335. }
  1336. for (i = 0; i < num_scatter_bufs; i++) {
  1337. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1338. qdf_mem_alloc_consistent(soc->osdev,
  1339. soc->osdev->dev,
  1340. soc->wbm_idle_scatter_buf_size,
  1341. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1342. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1343. QDF_TRACE(QDF_MODULE_ID_DP,
  1344. QDF_TRACE_LEVEL_ERROR,
  1345. FL("Scatter list memory alloc failed"));
  1346. goto fail;
  1347. }
  1348. }
  1349. /* Populate idle list scatter buffers with link descriptor
  1350. * pointers
  1351. */
  1352. scatter_buf_num = 0;
  1353. scatter_buf_ptr = (uint8_t *)(
  1354. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1355. rem_entries = num_entries_per_buf;
  1356. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1357. soc->link_desc_banks[i].base_paddr; i++) {
  1358. uint32_t num_link_descs =
  1359. (soc->link_desc_banks[i].size -
  1360. ((unsigned long)(
  1361. soc->link_desc_banks[i].base_vaddr) -
  1362. (unsigned long)(
  1363. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1364. / link_desc_size;
  1365. unsigned long paddr = (unsigned long)(
  1366. soc->link_desc_banks[i].base_paddr);
  1367. while (num_link_descs) {
  1368. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1369. LINK_DESC_COOKIE(desc_id, i), paddr);
  1370. num_link_descs--;
  1371. desc_id++;
  1372. paddr += link_desc_size;
  1373. rem_entries--;
  1374. if (rem_entries) {
  1375. scatter_buf_ptr += entry_size;
  1376. } else {
  1377. rem_entries = num_entries_per_buf;
  1378. scatter_buf_num++;
  1379. if (scatter_buf_num >= num_scatter_bufs)
  1380. break;
  1381. scatter_buf_ptr = (uint8_t *)(
  1382. soc->wbm_idle_scatter_buf_base_vaddr[
  1383. scatter_buf_num]);
  1384. }
  1385. }
  1386. }
  1387. /* Setup link descriptor idle list in HW */
  1388. hal_setup_link_idle_list(soc->hal_soc,
  1389. soc->wbm_idle_scatter_buf_base_paddr,
  1390. soc->wbm_idle_scatter_buf_base_vaddr,
  1391. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1392. (uint32_t)(scatter_buf_ptr -
  1393. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1394. scatter_buf_num-1])), total_link_descs);
  1395. }
  1396. return 0;
  1397. fail:
  1398. if (soc->wbm_idle_link_ring.hal_srng) {
  1399. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1400. WBM_IDLE_LINK, 0);
  1401. }
  1402. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1403. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1404. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1405. soc->wbm_idle_scatter_buf_size,
  1406. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1407. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1408. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1409. }
  1410. }
  1411. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1412. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1413. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1414. soc->link_desc_banks[i].size,
  1415. soc->link_desc_banks[i].base_vaddr_unaligned,
  1416. soc->link_desc_banks[i].base_paddr_unaligned,
  1417. 0);
  1418. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1419. }
  1420. }
  1421. return QDF_STATUS_E_FAILURE;
  1422. }
  1423. /*
  1424. * Free link descriptor pool that was setup HW
  1425. */
  1426. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1427. {
  1428. int i;
  1429. if (soc->wbm_idle_link_ring.hal_srng) {
  1430. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1431. WBM_IDLE_LINK, 0);
  1432. }
  1433. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1434. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1435. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1436. soc->wbm_idle_scatter_buf_size,
  1437. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1438. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1439. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1440. }
  1441. }
  1442. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1443. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1444. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1445. soc->link_desc_banks[i].size,
  1446. soc->link_desc_banks[i].base_vaddr_unaligned,
  1447. soc->link_desc_banks[i].base_paddr_unaligned,
  1448. 0);
  1449. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1450. }
  1451. }
  1452. }
  1453. /* TODO: Following should be configurable */
  1454. #define WBM_RELEASE_RING_SIZE 64
  1455. #define TCL_CMD_RING_SIZE 32
  1456. #define TCL_STATUS_RING_SIZE 32
  1457. #if defined(QCA_WIFI_QCA6290)
  1458. #define REO_DST_RING_SIZE 1024
  1459. #else
  1460. #define REO_DST_RING_SIZE 2048
  1461. #endif
  1462. #define REO_REINJECT_RING_SIZE 32
  1463. #define RX_RELEASE_RING_SIZE 1024
  1464. #define REO_EXCEPTION_RING_SIZE 128
  1465. #define REO_CMD_RING_SIZE 64
  1466. #define REO_STATUS_RING_SIZE 128
  1467. #define RXDMA_BUF_RING_SIZE 1024
  1468. #define RXDMA_REFILL_RING_SIZE 4096
  1469. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1470. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1471. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1472. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1473. #define RXDMA_ERR_DST_RING_SIZE 1024
  1474. /*
  1475. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1476. * @soc: Datapath SOC handle
  1477. *
  1478. * This is a timer function used to age out stale AST nodes from
  1479. * AST table
  1480. */
  1481. #ifdef FEATURE_WDS
  1482. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1483. {
  1484. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1485. struct dp_pdev *pdev;
  1486. struct dp_vdev *vdev;
  1487. struct dp_peer *peer;
  1488. struct dp_ast_entry *ase, *temp_ase;
  1489. int i;
  1490. qdf_spin_lock_bh(&soc->ast_lock);
  1491. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1492. pdev = soc->pdev_list[i];
  1493. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1494. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1495. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1496. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1497. /*
  1498. * Do not expire static ast entries
  1499. * and HM WDS entries
  1500. */
  1501. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1502. continue;
  1503. if (ase->is_active) {
  1504. ase->is_active = FALSE;
  1505. continue;
  1506. }
  1507. DP_STATS_INC(soc, ast.aged_out, 1);
  1508. dp_peer_del_ast(soc, ase);
  1509. }
  1510. }
  1511. }
  1512. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1513. }
  1514. qdf_spin_unlock_bh(&soc->ast_lock);
  1515. if (qdf_atomic_read(&soc->cmn_init_done))
  1516. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1517. }
  1518. /*
  1519. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1520. * @soc: Datapath SOC handle
  1521. *
  1522. * Return: None
  1523. */
  1524. static void dp_soc_wds_attach(struct dp_soc *soc)
  1525. {
  1526. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1527. dp_wds_aging_timer_fn, (void *)soc,
  1528. QDF_TIMER_TYPE_WAKE_APPS);
  1529. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1530. }
  1531. /*
  1532. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1533. * @txrx_soc: DP SOC handle
  1534. *
  1535. * Return: None
  1536. */
  1537. static void dp_soc_wds_detach(struct dp_soc *soc)
  1538. {
  1539. qdf_timer_stop(&soc->wds_aging_timer);
  1540. qdf_timer_free(&soc->wds_aging_timer);
  1541. }
  1542. #else
  1543. static void dp_soc_wds_attach(struct dp_soc *soc)
  1544. {
  1545. }
  1546. static void dp_soc_wds_detach(struct dp_soc *soc)
  1547. {
  1548. }
  1549. #endif
  1550. /*
  1551. * dp_soc_reset_ring_map() - Reset cpu ring map
  1552. * @soc: Datapath soc handler
  1553. *
  1554. * This api resets the default cpu ring map
  1555. */
  1556. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1557. {
  1558. uint8_t i;
  1559. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1560. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1561. if (nss_config == 1) {
  1562. /*
  1563. * Setting Tx ring map for one nss offloaded radio
  1564. */
  1565. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1566. } else if (nss_config == 2) {
  1567. /*
  1568. * Setting Tx ring for two nss offloaded radios
  1569. */
  1570. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1571. } else {
  1572. /*
  1573. * Setting Tx ring map for all nss offloaded radios
  1574. */
  1575. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1576. }
  1577. }
  1578. }
  1579. /*
  1580. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1581. * @dp_soc - DP soc handle
  1582. * @ring_type - ring type
  1583. * @ring_num - ring_num
  1584. *
  1585. * return 0 or 1
  1586. */
  1587. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1588. {
  1589. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1590. uint8_t status = 0;
  1591. switch (ring_type) {
  1592. case WBM2SW_RELEASE:
  1593. case REO_DST:
  1594. case RXDMA_BUF:
  1595. status = ((nss_config) & (1 << ring_num));
  1596. break;
  1597. default:
  1598. break;
  1599. }
  1600. return status;
  1601. }
  1602. /*
  1603. * dp_soc_reset_intr_mask() - reset interrupt mask
  1604. * @dp_soc - DP Soc handle
  1605. *
  1606. * Return: Return void
  1607. */
  1608. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1609. {
  1610. uint8_t j;
  1611. int *grp_mask = NULL;
  1612. int group_number, mask, num_ring;
  1613. /* number of tx ring */
  1614. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1615. /*
  1616. * group mask for tx completion ring.
  1617. */
  1618. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1619. /* loop and reset the mask for only offloaded ring */
  1620. for (j = 0; j < num_ring; j++) {
  1621. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1622. continue;
  1623. }
  1624. /*
  1625. * Group number corresponding to tx offloaded ring.
  1626. */
  1627. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1628. if (group_number < 0) {
  1629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1630. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1631. WBM2SW_RELEASE, j);
  1632. return;
  1633. }
  1634. /* reset the tx mask for offloaded ring */
  1635. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1636. mask &= (~(1 << j));
  1637. /*
  1638. * reset the interrupt mask for offloaded ring.
  1639. */
  1640. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1641. }
  1642. /* number of rx rings */
  1643. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1644. /*
  1645. * group mask for reo destination ring.
  1646. */
  1647. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1648. /* loop and reset the mask for only offloaded ring */
  1649. for (j = 0; j < num_ring; j++) {
  1650. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1651. continue;
  1652. }
  1653. /*
  1654. * Group number corresponding to rx offloaded ring.
  1655. */
  1656. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1657. if (group_number < 0) {
  1658. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1659. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1660. REO_DST, j);
  1661. return;
  1662. }
  1663. /* set the interrupt mask for offloaded ring */
  1664. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1665. mask &= (~(1 << j));
  1666. /*
  1667. * set the interrupt mask to zero for rx offloaded radio.
  1668. */
  1669. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1670. }
  1671. /*
  1672. * group mask for Rx buffer refill ring
  1673. */
  1674. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1675. /* loop and reset the mask for only offloaded ring */
  1676. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1677. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1678. continue;
  1679. }
  1680. /*
  1681. * Group number corresponding to rx offloaded ring.
  1682. */
  1683. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1684. if (group_number < 0) {
  1685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1686. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1687. REO_DST, j);
  1688. return;
  1689. }
  1690. /* set the interrupt mask for offloaded ring */
  1691. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1692. group_number);
  1693. mask &= (~(1 << j));
  1694. /*
  1695. * set the interrupt mask to zero for rx offloaded radio.
  1696. */
  1697. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1698. group_number, mask);
  1699. }
  1700. }
  1701. #ifdef IPA_OFFLOAD
  1702. /**
  1703. * dp_reo_remap_config() - configure reo remap register value based
  1704. * nss configuration.
  1705. * based on offload_radio value below remap configuration
  1706. * get applied.
  1707. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1708. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1709. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1710. * 3 - both Radios handled by NSS (remap not required)
  1711. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1712. *
  1713. * @remap1: output parameter indicates reo remap 1 register value
  1714. * @remap2: output parameter indicates reo remap 2 register value
  1715. * Return: bool type, true if remap is configured else false.
  1716. */
  1717. static bool dp_reo_remap_config(struct dp_soc *soc,
  1718. uint32_t *remap1,
  1719. uint32_t *remap2)
  1720. {
  1721. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1722. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1723. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1724. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1725. return true;
  1726. }
  1727. #else
  1728. static bool dp_reo_remap_config(struct dp_soc *soc,
  1729. uint32_t *remap1,
  1730. uint32_t *remap2)
  1731. {
  1732. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1733. switch (offload_radio) {
  1734. case 0:
  1735. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1736. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1737. (0x3 << 18) | (0x4 << 21)) << 8;
  1738. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1739. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1740. (0x3 << 18) | (0x4 << 21)) << 8;
  1741. break;
  1742. case 1:
  1743. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1744. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1745. (0x2 << 18) | (0x3 << 21)) << 8;
  1746. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1747. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1748. (0x4 << 18) | (0x2 << 21)) << 8;
  1749. break;
  1750. case 2:
  1751. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1752. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1753. (0x1 << 18) | (0x3 << 21)) << 8;
  1754. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1755. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1756. (0x4 << 18) | (0x1 << 21)) << 8;
  1757. break;
  1758. case 3:
  1759. /* return false if both radios are offloaded to NSS */
  1760. return false;
  1761. }
  1762. return true;
  1763. }
  1764. #endif
  1765. /*
  1766. * dp_reo_frag_dst_set() - configure reo register to set the
  1767. * fragment destination ring
  1768. * @soc : Datapath soc
  1769. * @frag_dst_ring : output parameter to set fragment destination ring
  1770. *
  1771. * Based on offload_radio below fragment destination rings is selected
  1772. * 0 - TCL
  1773. * 1 - SW1
  1774. * 2 - SW2
  1775. * 3 - SW3
  1776. * 4 - SW4
  1777. * 5 - Release
  1778. * 6 - FW
  1779. * 7 - alternate select
  1780. *
  1781. * return: void
  1782. */
  1783. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1784. {
  1785. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1786. switch (offload_radio) {
  1787. case 0:
  1788. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1789. break;
  1790. case 3:
  1791. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1792. break;
  1793. default:
  1794. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1795. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1796. break;
  1797. }
  1798. }
  1799. /*
  1800. * dp_soc_cmn_setup() - Common SoC level initializion
  1801. * @soc: Datapath SOC handle
  1802. *
  1803. * This is an internal function used to setup common SOC data structures,
  1804. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1805. */
  1806. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1807. {
  1808. int i;
  1809. struct hal_reo_params reo_params;
  1810. int tx_ring_size;
  1811. int tx_comp_ring_size;
  1812. if (qdf_atomic_read(&soc->cmn_init_done))
  1813. return 0;
  1814. if (dp_hw_link_desc_pool_setup(soc))
  1815. goto fail1;
  1816. /* Setup SRNG rings */
  1817. /* Common rings */
  1818. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1819. WBM_RELEASE_RING_SIZE)) {
  1820. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1821. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1822. goto fail1;
  1823. }
  1824. soc->num_tcl_data_rings = 0;
  1825. /* Tx data rings */
  1826. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1827. soc->num_tcl_data_rings =
  1828. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1829. tx_comp_ring_size =
  1830. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1831. tx_ring_size =
  1832. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1833. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1834. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1835. TCL_DATA, i, 0, tx_ring_size)) {
  1836. QDF_TRACE(QDF_MODULE_ID_DP,
  1837. QDF_TRACE_LEVEL_ERROR,
  1838. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1839. goto fail1;
  1840. }
  1841. /*
  1842. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1843. * count
  1844. */
  1845. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1846. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1847. QDF_TRACE(QDF_MODULE_ID_DP,
  1848. QDF_TRACE_LEVEL_ERROR,
  1849. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1850. goto fail1;
  1851. }
  1852. }
  1853. } else {
  1854. /* This will be incremented during per pdev ring setup */
  1855. soc->num_tcl_data_rings = 0;
  1856. }
  1857. if (dp_tx_soc_attach(soc)) {
  1858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1859. FL("dp_tx_soc_attach failed"));
  1860. goto fail1;
  1861. }
  1862. /* TCL command and status rings */
  1863. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1864. TCL_CMD_RING_SIZE)) {
  1865. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1866. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1867. goto fail1;
  1868. }
  1869. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1870. TCL_STATUS_RING_SIZE)) {
  1871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1872. FL("dp_srng_setup failed for tcl_status_ring"));
  1873. goto fail1;
  1874. }
  1875. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1876. * descriptors
  1877. */
  1878. /* Rx data rings */
  1879. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1880. soc->num_reo_dest_rings =
  1881. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1882. QDF_TRACE(QDF_MODULE_ID_DP,
  1883. QDF_TRACE_LEVEL_ERROR,
  1884. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1885. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1886. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1887. i, 0, REO_DST_RING_SIZE)) {
  1888. QDF_TRACE(QDF_MODULE_ID_DP,
  1889. QDF_TRACE_LEVEL_ERROR,
  1890. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1891. goto fail1;
  1892. }
  1893. }
  1894. } else {
  1895. /* This will be incremented during per pdev ring setup */
  1896. soc->num_reo_dest_rings = 0;
  1897. }
  1898. /* LMAC RxDMA to SW Rings configuration */
  1899. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1900. /* Only valid for MCL */
  1901. struct dp_pdev *pdev = soc->pdev_list[0];
  1902. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1903. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1904. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1905. QDF_TRACE(QDF_MODULE_ID_DP,
  1906. QDF_TRACE_LEVEL_ERROR,
  1907. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1908. goto fail1;
  1909. }
  1910. }
  1911. }
  1912. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1913. /* REO reinjection ring */
  1914. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1915. REO_REINJECT_RING_SIZE)) {
  1916. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1917. FL("dp_srng_setup failed for reo_reinject_ring"));
  1918. goto fail1;
  1919. }
  1920. /* Rx release ring */
  1921. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1922. RX_RELEASE_RING_SIZE)) {
  1923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1924. FL("dp_srng_setup failed for rx_rel_ring"));
  1925. goto fail1;
  1926. }
  1927. /* Rx exception ring */
  1928. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1929. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1930. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1931. FL("dp_srng_setup failed for reo_exception_ring"));
  1932. goto fail1;
  1933. }
  1934. /* REO command and status rings */
  1935. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1936. REO_CMD_RING_SIZE)) {
  1937. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1938. FL("dp_srng_setup failed for reo_cmd_ring"));
  1939. goto fail1;
  1940. }
  1941. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1942. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1943. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1944. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1945. REO_STATUS_RING_SIZE)) {
  1946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1947. FL("dp_srng_setup failed for reo_status_ring"));
  1948. goto fail1;
  1949. }
  1950. qdf_spinlock_create(&soc->ast_lock);
  1951. dp_soc_wds_attach(soc);
  1952. /* Reset the cpu ring map if radio is NSS offloaded */
  1953. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1954. dp_soc_reset_cpu_ring_map(soc);
  1955. dp_soc_reset_intr_mask(soc);
  1956. }
  1957. /* Setup HW REO */
  1958. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1959. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1960. /*
  1961. * Reo ring remap is not required if both radios
  1962. * are offloaded to NSS
  1963. */
  1964. if (!dp_reo_remap_config(soc,
  1965. &reo_params.remap1,
  1966. &reo_params.remap2))
  1967. goto out;
  1968. reo_params.rx_hash_enabled = true;
  1969. }
  1970. /* setup the global rx defrag waitlist */
  1971. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1972. soc->rx.defrag.timeout_ms =
  1973. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1974. soc->rx.flags.defrag_timeout_check =
  1975. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1976. out:
  1977. /*
  1978. * set the fragment destination ring
  1979. */
  1980. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1981. hal_reo_setup(soc->hal_soc, &reo_params);
  1982. qdf_atomic_set(&soc->cmn_init_done, 1);
  1983. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1984. return 0;
  1985. fail1:
  1986. /*
  1987. * Cleanup will be done as part of soc_detach, which will
  1988. * be called on pdev attach failure
  1989. */
  1990. return QDF_STATUS_E_FAILURE;
  1991. }
  1992. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1993. static void dp_lro_hash_setup(struct dp_soc *soc)
  1994. {
  1995. struct cdp_lro_hash_config lro_hash;
  1996. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1997. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1999. FL("LRO disabled RX hash disabled"));
  2000. return;
  2001. }
  2002. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2003. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2004. lro_hash.lro_enable = 1;
  2005. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2006. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2007. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2008. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2009. }
  2010. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2011. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2012. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2013. LRO_IPV4_SEED_ARR_SZ));
  2014. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2015. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2016. LRO_IPV6_SEED_ARR_SZ));
  2017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2018. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2019. lro_hash.lro_enable, lro_hash.tcp_flag,
  2020. lro_hash.tcp_flag_mask);
  2021. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2022. QDF_TRACE_LEVEL_ERROR,
  2023. (void *)lro_hash.toeplitz_hash_ipv4,
  2024. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2025. LRO_IPV4_SEED_ARR_SZ));
  2026. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2027. QDF_TRACE_LEVEL_ERROR,
  2028. (void *)lro_hash.toeplitz_hash_ipv6,
  2029. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2030. LRO_IPV6_SEED_ARR_SZ));
  2031. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2032. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2033. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2034. (soc->ctrl_psoc, &lro_hash);
  2035. }
  2036. /*
  2037. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2038. * @soc: data path SoC handle
  2039. * @pdev: Physical device handle
  2040. *
  2041. * Return: 0 - success, > 0 - failure
  2042. */
  2043. #ifdef QCA_HOST2FW_RXBUF_RING
  2044. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2045. struct dp_pdev *pdev)
  2046. {
  2047. int max_mac_rings =
  2048. wlan_cfg_get_num_mac_rings
  2049. (pdev->wlan_cfg_ctx);
  2050. int i;
  2051. for (i = 0; i < max_mac_rings; i++) {
  2052. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2053. "%s: pdev_id %d mac_id %d\n",
  2054. __func__, pdev->pdev_id, i);
  2055. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2056. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  2057. QDF_TRACE(QDF_MODULE_ID_DP,
  2058. QDF_TRACE_LEVEL_ERROR,
  2059. FL("failed rx mac ring setup"));
  2060. return QDF_STATUS_E_FAILURE;
  2061. }
  2062. }
  2063. return QDF_STATUS_SUCCESS;
  2064. }
  2065. #else
  2066. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2067. struct dp_pdev *pdev)
  2068. {
  2069. return QDF_STATUS_SUCCESS;
  2070. }
  2071. #endif
  2072. /**
  2073. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2074. * @pdev - DP_PDEV handle
  2075. *
  2076. * Return: void
  2077. */
  2078. static inline void
  2079. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2080. {
  2081. uint8_t map_id;
  2082. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2083. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2084. sizeof(default_dscp_tid_map));
  2085. }
  2086. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2087. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2088. pdev->dscp_tid_map[map_id],
  2089. map_id);
  2090. }
  2091. }
  2092. #ifdef QCA_SUPPORT_SON
  2093. /**
  2094. * dp_mark_peer_inact(): Update peer inactivity status
  2095. * @peer_handle - datapath peer handle
  2096. *
  2097. * Return: void
  2098. */
  2099. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2100. {
  2101. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2102. struct dp_pdev *pdev;
  2103. struct dp_soc *soc;
  2104. bool inactive_old;
  2105. if (!peer)
  2106. return;
  2107. pdev = peer->vdev->pdev;
  2108. soc = pdev->soc;
  2109. inactive_old = peer->peer_bs_inact_flag == 1;
  2110. if (!inactive)
  2111. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2112. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2113. if (inactive_old != inactive) {
  2114. /**
  2115. * Note: a node lookup can happen in RX datapath context
  2116. * when a node changes from inactive to active (at most once
  2117. * per inactivity timeout threshold)
  2118. */
  2119. if (soc->cdp_soc.ol_ops->record_act_change) {
  2120. soc->cdp_soc.ol_ops->record_act_change(pdev->osif_pdev,
  2121. peer->mac_addr.raw, !inactive);
  2122. }
  2123. }
  2124. }
  2125. /**
  2126. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2127. *
  2128. * Periodically checks the inactivity status
  2129. */
  2130. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2131. {
  2132. struct dp_pdev *pdev;
  2133. struct dp_vdev *vdev;
  2134. struct dp_peer *peer;
  2135. struct dp_soc *soc;
  2136. int i;
  2137. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2138. qdf_spin_lock(&soc->peer_ref_mutex);
  2139. for (i = 0; i < soc->pdev_count; i++) {
  2140. pdev = soc->pdev_list[i];
  2141. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2142. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2143. if (vdev->opmode != wlan_op_mode_ap)
  2144. continue;
  2145. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2146. if (!peer->authorize) {
  2147. /**
  2148. * Inactivity check only interested in
  2149. * connected node
  2150. */
  2151. continue;
  2152. }
  2153. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2154. /**
  2155. * This check ensures we do not wait extra long
  2156. * due to the potential race condition
  2157. */
  2158. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2159. }
  2160. if (peer->peer_bs_inact > 0) {
  2161. /* Do not let it wrap around */
  2162. peer->peer_bs_inact--;
  2163. }
  2164. if (peer->peer_bs_inact == 0)
  2165. dp_mark_peer_inact(peer, true);
  2166. }
  2167. }
  2168. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2169. }
  2170. qdf_spin_unlock(&soc->peer_ref_mutex);
  2171. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2172. soc->pdev_bs_inact_interval * 1000);
  2173. }
  2174. /**
  2175. * dp_free_inact_timer(): free inact timer
  2176. * @timer - inact timer handle
  2177. *
  2178. * Return: bool
  2179. */
  2180. void dp_free_inact_timer(struct dp_soc *soc)
  2181. {
  2182. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2183. }
  2184. #else
  2185. void dp_mark_peer_inact(void *peer, bool inactive)
  2186. {
  2187. return;
  2188. }
  2189. void dp_free_inact_timer(struct dp_soc *soc)
  2190. {
  2191. return;
  2192. }
  2193. #endif
  2194. #ifdef IPA_OFFLOAD
  2195. /**
  2196. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2197. * @soc: data path instance
  2198. * @pdev: core txrx pdev context
  2199. *
  2200. * Return: QDF_STATUS_SUCCESS: success
  2201. * QDF_STATUS_E_RESOURCES: Error return
  2202. */
  2203. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2204. struct dp_pdev *pdev)
  2205. {
  2206. /* Setup second Rx refill buffer ring */
  2207. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2208. IPA_RX_REFILL_BUF_RING_IDX,
  2209. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2210. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2211. FL("dp_srng_setup failed second rx refill ring"));
  2212. return QDF_STATUS_E_FAILURE;
  2213. }
  2214. return QDF_STATUS_SUCCESS;
  2215. }
  2216. /**
  2217. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2218. * @soc: data path instance
  2219. * @pdev: core txrx pdev context
  2220. *
  2221. * Return: void
  2222. */
  2223. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2224. struct dp_pdev *pdev)
  2225. {
  2226. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2227. IPA_RX_REFILL_BUF_RING_IDX);
  2228. }
  2229. #else
  2230. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2231. struct dp_pdev *pdev)
  2232. {
  2233. return QDF_STATUS_SUCCESS;
  2234. }
  2235. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2236. struct dp_pdev *pdev)
  2237. {
  2238. }
  2239. #endif
  2240. /*
  2241. * dp_pdev_attach_wifi3() - attach txrx pdev
  2242. * @ctrl_pdev: Opaque PDEV object
  2243. * @txrx_soc: Datapath SOC handle
  2244. * @htc_handle: HTC handle for host-target interface
  2245. * @qdf_osdev: QDF OS device
  2246. * @pdev_id: PDEV ID
  2247. *
  2248. * Return: DP PDEV handle on success, NULL on failure
  2249. */
  2250. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2251. struct cdp_cfg *ctrl_pdev,
  2252. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2253. {
  2254. int tx_ring_size;
  2255. int tx_comp_ring_size;
  2256. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2257. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2258. int mac_id;
  2259. if (!pdev) {
  2260. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2261. FL("DP PDEV memory allocation failed"));
  2262. goto fail0;
  2263. }
  2264. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2265. if (!pdev->wlan_cfg_ctx) {
  2266. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2267. FL("pdev cfg_attach failed"));
  2268. qdf_mem_free(pdev);
  2269. goto fail0;
  2270. }
  2271. /*
  2272. * set nss pdev config based on soc config
  2273. */
  2274. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2275. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2276. pdev->soc = soc;
  2277. pdev->osif_pdev = ctrl_pdev;
  2278. pdev->pdev_id = pdev_id;
  2279. soc->pdev_list[pdev_id] = pdev;
  2280. soc->pdev_count++;
  2281. TAILQ_INIT(&pdev->vdev_list);
  2282. qdf_spinlock_create(&pdev->vdev_list_lock);
  2283. pdev->vdev_count = 0;
  2284. qdf_spinlock_create(&pdev->tx_mutex);
  2285. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2286. TAILQ_INIT(&pdev->neighbour_peers_list);
  2287. if (dp_soc_cmn_setup(soc)) {
  2288. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2289. FL("dp_soc_cmn_setup failed"));
  2290. goto fail1;
  2291. }
  2292. /* Setup per PDEV TCL rings if configured */
  2293. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2294. tx_ring_size =
  2295. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2296. tx_comp_ring_size =
  2297. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2298. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2299. pdev_id, pdev_id, tx_ring_size)) {
  2300. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2301. FL("dp_srng_setup failed for tcl_data_ring"));
  2302. goto fail1;
  2303. }
  2304. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2305. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2306. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2307. FL("dp_srng_setup failed for tx_comp_ring"));
  2308. goto fail1;
  2309. }
  2310. soc->num_tcl_data_rings++;
  2311. }
  2312. /* Tx specific init */
  2313. if (dp_tx_pdev_attach(pdev)) {
  2314. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2315. FL("dp_tx_pdev_attach failed"));
  2316. goto fail1;
  2317. }
  2318. /* Setup per PDEV REO rings if configured */
  2319. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2320. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2321. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2322. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2323. FL("dp_srng_setup failed for reo_dest_ringn"));
  2324. goto fail1;
  2325. }
  2326. soc->num_reo_dest_rings++;
  2327. }
  2328. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2329. RXDMA_REFILL_RING_SIZE)) {
  2330. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2331. FL("dp_srng_setup failed rx refill ring"));
  2332. goto fail1;
  2333. }
  2334. if (dp_rxdma_ring_setup(soc, pdev)) {
  2335. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2336. FL("RXDMA ring config failed"));
  2337. goto fail1;
  2338. }
  2339. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2340. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2341. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2342. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2343. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2344. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2345. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2346. goto fail1;
  2347. }
  2348. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2349. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2350. RXDMA_MONITOR_DST_RING_SIZE)) {
  2351. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2352. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2353. goto fail1;
  2354. }
  2355. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2356. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2357. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2358. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2359. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2360. goto fail1;
  2361. }
  2362. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2363. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2364. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2365. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2366. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2367. goto fail1;
  2368. }
  2369. }
  2370. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2371. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2372. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2374. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2375. goto fail1;
  2376. }
  2377. }
  2378. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2379. goto fail1;
  2380. if (dp_ipa_ring_resource_setup(soc, pdev))
  2381. goto fail1;
  2382. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2383. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2384. FL("dp_ipa_uc_attach failed"));
  2385. goto fail1;
  2386. }
  2387. /* Rx specific init */
  2388. if (dp_rx_pdev_attach(pdev)) {
  2389. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2390. FL("dp_rx_pdev_attach failed"));
  2391. goto fail0;
  2392. }
  2393. DP_STATS_INIT(pdev);
  2394. /* Monitor filter init */
  2395. pdev->mon_filter_mode = MON_FILTER_ALL;
  2396. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2397. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2398. pdev->fp_data_filter = FILTER_DATA_ALL;
  2399. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2400. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2401. pdev->mo_data_filter = FILTER_DATA_ALL;
  2402. #ifndef CONFIG_WIN
  2403. /* MCL */
  2404. dp_local_peer_id_pool_init(pdev);
  2405. #endif
  2406. dp_dscp_tid_map_setup(pdev);
  2407. /* Rx monitor mode specific init */
  2408. if (dp_rx_pdev_mon_attach(pdev)) {
  2409. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2410. "dp_rx_pdev_attach failed\n");
  2411. goto fail1;
  2412. }
  2413. if (dp_wdi_event_attach(pdev)) {
  2414. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2415. "dp_wdi_evet_attach failed\n");
  2416. goto fail1;
  2417. }
  2418. /* set the reo destination during initialization */
  2419. pdev->reo_dest = pdev->pdev_id + 1;
  2420. /*
  2421. * initialize ppdu tlv list
  2422. */
  2423. TAILQ_INIT(&pdev->ppdu_info_list);
  2424. pdev->tlv_count = 0;
  2425. pdev->list_depth = 0;
  2426. return (struct cdp_pdev *)pdev;
  2427. fail1:
  2428. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2429. fail0:
  2430. return NULL;
  2431. }
  2432. /*
  2433. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2434. * @soc: data path SoC handle
  2435. * @pdev: Physical device handle
  2436. *
  2437. * Return: void
  2438. */
  2439. #ifdef QCA_HOST2FW_RXBUF_RING
  2440. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2441. struct dp_pdev *pdev)
  2442. {
  2443. int max_mac_rings =
  2444. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2445. int i;
  2446. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2447. max_mac_rings : MAX_RX_MAC_RINGS;
  2448. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2449. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2450. RXDMA_BUF, 1);
  2451. qdf_timer_free(&soc->mon_reap_timer);
  2452. }
  2453. #else
  2454. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2455. struct dp_pdev *pdev)
  2456. {
  2457. }
  2458. #endif
  2459. /*
  2460. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2461. * @pdev: device object
  2462. *
  2463. * Return: void
  2464. */
  2465. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2466. {
  2467. struct dp_neighbour_peer *peer = NULL;
  2468. struct dp_neighbour_peer *temp_peer = NULL;
  2469. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2470. neighbour_peer_list_elem, temp_peer) {
  2471. /* delete this peer from the list */
  2472. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2473. peer, neighbour_peer_list_elem);
  2474. qdf_mem_free(peer);
  2475. }
  2476. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2477. }
  2478. /**
  2479. * dp_htt_ppdu_stats_detach() - detach stats resources
  2480. * @pdev: Datapath PDEV handle
  2481. *
  2482. * Return: void
  2483. */
  2484. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2485. {
  2486. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2487. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2488. ppdu_info_list_elem, ppdu_info_next) {
  2489. if (!ppdu_info)
  2490. break;
  2491. qdf_assert_always(ppdu_info->nbuf);
  2492. qdf_nbuf_free(ppdu_info->nbuf);
  2493. qdf_mem_free(ppdu_info);
  2494. }
  2495. }
  2496. /*
  2497. * dp_pdev_detach_wifi3() - detach txrx pdev
  2498. * @txrx_pdev: Datapath PDEV handle
  2499. * @force: Force detach
  2500. *
  2501. */
  2502. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2503. {
  2504. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2505. struct dp_soc *soc = pdev->soc;
  2506. qdf_nbuf_t curr_nbuf, next_nbuf;
  2507. int mac_id;
  2508. dp_wdi_event_detach(pdev);
  2509. dp_tx_pdev_detach(pdev);
  2510. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2511. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2512. TCL_DATA, pdev->pdev_id);
  2513. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2514. WBM2SW_RELEASE, pdev->pdev_id);
  2515. }
  2516. dp_pktlogmod_exit(pdev);
  2517. dp_rx_pdev_detach(pdev);
  2518. dp_rx_pdev_mon_detach(pdev);
  2519. dp_neighbour_peers_detach(pdev);
  2520. qdf_spinlock_destroy(&pdev->tx_mutex);
  2521. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2522. dp_ipa_uc_detach(soc, pdev);
  2523. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2524. /* Cleanup per PDEV REO rings if configured */
  2525. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2526. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2527. REO_DST, pdev->pdev_id);
  2528. }
  2529. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2530. dp_rxdma_ring_cleanup(soc, pdev);
  2531. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2532. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2533. RXDMA_MONITOR_BUF, 0);
  2534. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2535. RXDMA_MONITOR_DST, 0);
  2536. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2537. RXDMA_MONITOR_STATUS, 0);
  2538. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2539. RXDMA_MONITOR_DESC, 0);
  2540. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2541. RXDMA_DST, 0);
  2542. }
  2543. curr_nbuf = pdev->invalid_peer_head_msdu;
  2544. while (curr_nbuf) {
  2545. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2546. qdf_nbuf_free(curr_nbuf);
  2547. curr_nbuf = next_nbuf;
  2548. }
  2549. dp_htt_ppdu_stats_detach(pdev);
  2550. soc->pdev_list[pdev->pdev_id] = NULL;
  2551. soc->pdev_count--;
  2552. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2553. qdf_mem_free(pdev->dp_txrx_handle);
  2554. qdf_mem_free(pdev);
  2555. }
  2556. /*
  2557. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2558. * @soc: DP SOC handle
  2559. */
  2560. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2561. {
  2562. struct reo_desc_list_node *desc;
  2563. struct dp_rx_tid *rx_tid;
  2564. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2565. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2566. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2567. rx_tid = &desc->rx_tid;
  2568. qdf_mem_unmap_nbytes_single(soc->osdev,
  2569. rx_tid->hw_qdesc_paddr,
  2570. QDF_DMA_BIDIRECTIONAL,
  2571. rx_tid->hw_qdesc_alloc_size);
  2572. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2573. qdf_mem_free(desc);
  2574. }
  2575. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2576. qdf_list_destroy(&soc->reo_desc_freelist);
  2577. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2578. }
  2579. /*
  2580. * dp_soc_detach_wifi3() - Detach txrx SOC
  2581. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2582. */
  2583. static void dp_soc_detach_wifi3(void *txrx_soc)
  2584. {
  2585. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2586. int i;
  2587. qdf_atomic_set(&soc->cmn_init_done, 0);
  2588. qdf_flush_work(&soc->htt_stats.work);
  2589. qdf_disable_work(&soc->htt_stats.work);
  2590. /* Free pending htt stats messages */
  2591. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2592. dp_free_inact_timer(soc);
  2593. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2594. if (soc->pdev_list[i])
  2595. dp_pdev_detach_wifi3(
  2596. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2597. }
  2598. dp_peer_find_detach(soc);
  2599. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2600. * SW descriptors
  2601. */
  2602. /* Free the ring memories */
  2603. /* Common rings */
  2604. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2605. dp_tx_soc_detach(soc);
  2606. /* Tx data rings */
  2607. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2608. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2609. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2610. TCL_DATA, i);
  2611. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2612. WBM2SW_RELEASE, i);
  2613. }
  2614. }
  2615. /* TCL command and status rings */
  2616. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2617. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2618. /* Rx data rings */
  2619. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2620. soc->num_reo_dest_rings =
  2621. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2622. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2623. /* TODO: Get number of rings and ring sizes
  2624. * from wlan_cfg
  2625. */
  2626. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2627. REO_DST, i);
  2628. }
  2629. }
  2630. /* REO reinjection ring */
  2631. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2632. /* Rx release ring */
  2633. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2634. /* Rx exception ring */
  2635. /* TODO: Better to store ring_type and ring_num in
  2636. * dp_srng during setup
  2637. */
  2638. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2639. /* REO command and status rings */
  2640. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2641. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2642. dp_hw_link_desc_pool_cleanup(soc);
  2643. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2644. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2645. htt_soc_detach(soc->htt_handle);
  2646. dp_reo_cmdlist_destroy(soc);
  2647. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2648. dp_reo_desc_freelist_destroy(soc);
  2649. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2650. dp_soc_wds_detach(soc);
  2651. qdf_spinlock_destroy(&soc->ast_lock);
  2652. qdf_mem_free(soc);
  2653. }
  2654. /*
  2655. * dp_rxdma_ring_config() - configure the RX DMA rings
  2656. *
  2657. * This function is used to configure the MAC rings.
  2658. * On MCL host provides buffers in Host2FW ring
  2659. * FW refills (copies) buffers to the ring and updates
  2660. * ring_idx in register
  2661. *
  2662. * @soc: data path SoC handle
  2663. *
  2664. * Return: void
  2665. */
  2666. #ifdef QCA_HOST2FW_RXBUF_RING
  2667. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2668. {
  2669. int i;
  2670. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2671. struct dp_pdev *pdev = soc->pdev_list[i];
  2672. if (pdev) {
  2673. int mac_id;
  2674. bool dbs_enable = 0;
  2675. int max_mac_rings =
  2676. wlan_cfg_get_num_mac_rings
  2677. (pdev->wlan_cfg_ctx);
  2678. htt_srng_setup(soc->htt_handle, 0,
  2679. pdev->rx_refill_buf_ring.hal_srng,
  2680. RXDMA_BUF);
  2681. if (pdev->rx_refill_buf_ring2.hal_srng)
  2682. htt_srng_setup(soc->htt_handle, 0,
  2683. pdev->rx_refill_buf_ring2.hal_srng,
  2684. RXDMA_BUF);
  2685. if (soc->cdp_soc.ol_ops->
  2686. is_hw_dbs_2x2_capable) {
  2687. dbs_enable = soc->cdp_soc.ol_ops->
  2688. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2689. }
  2690. if (dbs_enable) {
  2691. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2692. QDF_TRACE_LEVEL_ERROR,
  2693. FL("DBS enabled max_mac_rings %d\n"),
  2694. max_mac_rings);
  2695. } else {
  2696. max_mac_rings = 1;
  2697. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2698. QDF_TRACE_LEVEL_ERROR,
  2699. FL("DBS disabled, max_mac_rings %d\n"),
  2700. max_mac_rings);
  2701. }
  2702. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2703. FL("pdev_id %d max_mac_rings %d\n"),
  2704. pdev->pdev_id, max_mac_rings);
  2705. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2706. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2707. mac_id, pdev->pdev_id);
  2708. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2709. QDF_TRACE_LEVEL_ERROR,
  2710. FL("mac_id %d\n"), mac_for_pdev);
  2711. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2712. pdev->rx_mac_buf_ring[mac_id]
  2713. .hal_srng,
  2714. RXDMA_BUF);
  2715. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2716. pdev->rxdma_err_dst_ring[mac_id]
  2717. .hal_srng,
  2718. RXDMA_DST);
  2719. /* Configure monitor mode rings */
  2720. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2721. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2722. RXDMA_MONITOR_BUF);
  2723. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2724. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2725. RXDMA_MONITOR_DST);
  2726. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2727. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2728. RXDMA_MONITOR_STATUS);
  2729. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2730. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2731. RXDMA_MONITOR_DESC);
  2732. }
  2733. }
  2734. }
  2735. /*
  2736. * Timer to reap rxdma status rings.
  2737. * Needed until we enable ppdu end interrupts
  2738. */
  2739. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2740. dp_service_mon_rings, (void *)soc,
  2741. QDF_TIMER_TYPE_WAKE_APPS);
  2742. soc->reap_timer_init = 1;
  2743. }
  2744. #else
  2745. /* This is only for WIN */
  2746. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2747. {
  2748. int i;
  2749. int mac_id;
  2750. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2751. struct dp_pdev *pdev = soc->pdev_list[i];
  2752. if (pdev == NULL)
  2753. continue;
  2754. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2755. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2756. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2757. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2758. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2759. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2760. RXDMA_MONITOR_BUF);
  2761. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2762. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2763. RXDMA_MONITOR_DST);
  2764. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2765. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2766. RXDMA_MONITOR_STATUS);
  2767. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2768. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2769. RXDMA_MONITOR_DESC);
  2770. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2771. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2772. RXDMA_DST);
  2773. }
  2774. }
  2775. }
  2776. #endif
  2777. /*
  2778. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2779. * @txrx_soc: Datapath SOC handle
  2780. */
  2781. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2782. {
  2783. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2784. htt_soc_attach_target(soc->htt_handle);
  2785. dp_rxdma_ring_config(soc);
  2786. DP_STATS_INIT(soc);
  2787. /* initialize work queue for stats processing */
  2788. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2789. return 0;
  2790. }
  2791. /*
  2792. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2793. * @txrx_soc: Datapath SOC handle
  2794. */
  2795. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2796. {
  2797. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2798. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2799. }
  2800. /*
  2801. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2802. * @txrx_soc: Datapath SOC handle
  2803. * @nss_cfg: nss config
  2804. */
  2805. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2806. {
  2807. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2808. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2809. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2810. /*
  2811. * TODO: masked out based on the per offloaded radio
  2812. */
  2813. if (config == dp_nss_cfg_dbdc) {
  2814. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2815. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2816. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2817. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2818. }
  2819. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2820. FL("nss-wifi<0> nss config is enabled"));
  2821. }
  2822. /*
  2823. * dp_vdev_attach_wifi3() - attach txrx vdev
  2824. * @txrx_pdev: Datapath PDEV handle
  2825. * @vdev_mac_addr: MAC address of the virtual interface
  2826. * @vdev_id: VDEV Id
  2827. * @wlan_op_mode: VDEV operating mode
  2828. *
  2829. * Return: DP VDEV handle on success, NULL on failure
  2830. */
  2831. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2832. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2833. {
  2834. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2835. struct dp_soc *soc = pdev->soc;
  2836. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2837. if (!vdev) {
  2838. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2839. FL("DP VDEV memory allocation failed"));
  2840. goto fail0;
  2841. }
  2842. vdev->pdev = pdev;
  2843. vdev->vdev_id = vdev_id;
  2844. vdev->opmode = op_mode;
  2845. vdev->osdev = soc->osdev;
  2846. vdev->osif_rx = NULL;
  2847. vdev->osif_rsim_rx_decap = NULL;
  2848. vdev->osif_get_key = NULL;
  2849. vdev->osif_rx_mon = NULL;
  2850. vdev->osif_tx_free_ext = NULL;
  2851. vdev->osif_vdev = NULL;
  2852. vdev->delete.pending = 0;
  2853. vdev->safemode = 0;
  2854. vdev->drop_unenc = 1;
  2855. vdev->sec_type = cdp_sec_type_none;
  2856. #ifdef notyet
  2857. vdev->filters_num = 0;
  2858. #endif
  2859. qdf_mem_copy(
  2860. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2861. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2862. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2863. vdev->dscp_tid_map_id = 0;
  2864. vdev->mcast_enhancement_en = 0;
  2865. /* TODO: Initialize default HTT meta data that will be used in
  2866. * TCL descriptors for packets transmitted from this VDEV
  2867. */
  2868. TAILQ_INIT(&vdev->peer_list);
  2869. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2870. /* add this vdev into the pdev's list */
  2871. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2872. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2873. pdev->vdev_count++;
  2874. dp_tx_vdev_attach(vdev);
  2875. if ((soc->intr_mode == DP_INTR_POLL) &&
  2876. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2877. if (pdev->vdev_count == 1)
  2878. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2879. }
  2880. dp_lro_hash_setup(soc);
  2881. /* LRO */
  2882. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2883. wlan_op_mode_sta == vdev->opmode)
  2884. vdev->lro_enable = true;
  2885. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2886. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2887. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2888. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2889. DP_STATS_INIT(vdev);
  2890. if (wlan_op_mode_sta == vdev->opmode)
  2891. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2892. vdev->mac_addr.raw);
  2893. return (struct cdp_vdev *)vdev;
  2894. fail0:
  2895. return NULL;
  2896. }
  2897. /**
  2898. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2899. * @vdev: Datapath VDEV handle
  2900. * @osif_vdev: OSIF vdev handle
  2901. * @txrx_ops: Tx and Rx operations
  2902. *
  2903. * Return: DP VDEV handle on success, NULL on failure
  2904. */
  2905. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2906. void *osif_vdev,
  2907. struct ol_txrx_ops *txrx_ops)
  2908. {
  2909. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2910. vdev->osif_vdev = osif_vdev;
  2911. vdev->osif_rx = txrx_ops->rx.rx;
  2912. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2913. vdev->osif_get_key = txrx_ops->get_key;
  2914. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2915. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2916. #ifdef notyet
  2917. #if ATH_SUPPORT_WAPI
  2918. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2919. #endif
  2920. #endif
  2921. #ifdef UMAC_SUPPORT_PROXY_ARP
  2922. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2923. #endif
  2924. vdev->me_convert = txrx_ops->me_convert;
  2925. /* TODO: Enable the following once Tx code is integrated */
  2926. if (vdev->mesh_vdev)
  2927. txrx_ops->tx.tx = dp_tx_send_mesh;
  2928. else
  2929. txrx_ops->tx.tx = dp_tx_send;
  2930. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2932. "DP Vdev Register success");
  2933. }
  2934. /**
  2935. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2936. * @vdev: Datapath VDEV handle
  2937. *
  2938. * Return: void
  2939. */
  2940. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2941. {
  2942. struct dp_pdev *pdev = vdev->pdev;
  2943. struct dp_soc *soc = pdev->soc;
  2944. struct dp_peer *peer;
  2945. uint16_t *peer_ids;
  2946. uint8_t i = 0, j = 0;
  2947. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2948. if (!peer_ids) {
  2949. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2950. "DP alloc failure - unable to flush peers");
  2951. return;
  2952. }
  2953. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2954. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2955. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2956. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2957. if (j < soc->max_peers)
  2958. peer_ids[j++] = peer->peer_ids[i];
  2959. }
  2960. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2961. for (i = 0; i < j ; i++)
  2962. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2963. qdf_mem_free(peer_ids);
  2964. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2965. FL("Flushed peers for vdev object %pK "), vdev);
  2966. }
  2967. /*
  2968. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2969. * @txrx_vdev: Datapath VDEV handle
  2970. * @callback: Callback OL_IF on completion of detach
  2971. * @cb_context: Callback context
  2972. *
  2973. */
  2974. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2975. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2976. {
  2977. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2978. struct dp_pdev *pdev = vdev->pdev;
  2979. struct dp_soc *soc = pdev->soc;
  2980. /* preconditions */
  2981. qdf_assert(vdev);
  2982. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2983. /* remove the vdev from its parent pdev's list */
  2984. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2985. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2986. if (wlan_op_mode_sta == vdev->opmode)
  2987. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2988. /*
  2989. * If Target is hung, flush all peers before detaching vdev
  2990. * this will free all references held due to missing
  2991. * unmap commands from Target
  2992. */
  2993. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  2994. dp_vdev_flush_peers(vdev);
  2995. /*
  2996. * Use peer_ref_mutex while accessing peer_list, in case
  2997. * a peer is in the process of being removed from the list.
  2998. */
  2999. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3000. /* check that the vdev has no peers allocated */
  3001. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3002. /* debug print - will be removed later */
  3003. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3004. FL("not deleting vdev object %pK (%pM)"
  3005. "until deletion finishes for all its peers"),
  3006. vdev, vdev->mac_addr.raw);
  3007. /* indicate that the vdev needs to be deleted */
  3008. vdev->delete.pending = 1;
  3009. vdev->delete.callback = callback;
  3010. vdev->delete.context = cb_context;
  3011. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3012. return;
  3013. }
  3014. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3015. dp_tx_vdev_detach(vdev);
  3016. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3017. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3018. qdf_mem_free(vdev);
  3019. if (callback)
  3020. callback(cb_context);
  3021. }
  3022. /*
  3023. * dp_peer_create_wifi3() - attach txrx peer
  3024. * @txrx_vdev: Datapath VDEV handle
  3025. * @peer_mac_addr: Peer MAC address
  3026. *
  3027. * Return: DP peeer handle on success, NULL on failure
  3028. */
  3029. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3030. uint8_t *peer_mac_addr)
  3031. {
  3032. struct dp_peer *peer;
  3033. int i;
  3034. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3035. struct dp_pdev *pdev;
  3036. struct dp_soc *soc;
  3037. /* preconditions */
  3038. qdf_assert(vdev);
  3039. qdf_assert(peer_mac_addr);
  3040. pdev = vdev->pdev;
  3041. soc = pdev->soc;
  3042. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr,
  3043. 0, vdev->vdev_id);
  3044. if (peer) {
  3045. peer->delete_in_progress = false;
  3046. qdf_spin_lock_bh(&soc->ast_lock);
  3047. TAILQ_INIT(&peer->ast_entry_list);
  3048. qdf_spin_unlock_bh(&soc->ast_lock);
  3049. /*
  3050. * on peer create, peer ref count decrements, sice new peer is not
  3051. * getting created earlier reference is reused, peer_unref_delete will
  3052. * take care of incrementing count
  3053. * */
  3054. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3055. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3056. vdev->vdev_id, peer->mac_addr.raw);
  3057. }
  3058. DP_STATS_INIT(peer);
  3059. return (void *)peer;
  3060. }
  3061. #ifdef notyet
  3062. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3063. soc->mempool_ol_ath_peer);
  3064. #else
  3065. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3066. #endif
  3067. if (!peer)
  3068. return NULL; /* failure */
  3069. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3070. TAILQ_INIT(&peer->ast_entry_list);
  3071. /* store provided params */
  3072. peer->vdev = vdev;
  3073. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  3074. qdf_spinlock_create(&peer->peer_info_lock);
  3075. qdf_mem_copy(
  3076. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3077. /* TODO: See of rx_opt_proc is really required */
  3078. peer->rx_opt_proc = soc->rx_opt_proc;
  3079. /* initialize the peer_id */
  3080. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3081. peer->peer_ids[i] = HTT_INVALID_PEER;
  3082. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3083. qdf_atomic_init(&peer->ref_cnt);
  3084. /* keep one reference for attach */
  3085. qdf_atomic_inc(&peer->ref_cnt);
  3086. /* add this peer into the vdev's list */
  3087. if (wlan_op_mode_sta == vdev->opmode)
  3088. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3089. else
  3090. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3091. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3092. /* TODO: See if hash based search is required */
  3093. dp_peer_find_hash_add(soc, peer);
  3094. /* Initialize the peer state */
  3095. peer->state = OL_TXRX_PEER_STATE_DISC;
  3096. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3097. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3098. vdev, peer, peer->mac_addr.raw,
  3099. qdf_atomic_read(&peer->ref_cnt));
  3100. /*
  3101. * For every peer MAp message search and set if bss_peer
  3102. */
  3103. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3105. "vdev bss_peer!!!!");
  3106. peer->bss_peer = 1;
  3107. vdev->vap_bss_peer = peer;
  3108. }
  3109. #ifndef CONFIG_WIN
  3110. dp_local_peer_id_alloc(pdev, peer);
  3111. #endif
  3112. DP_STATS_INIT(peer);
  3113. return (void *)peer;
  3114. }
  3115. /*
  3116. * dp_peer_setup_wifi3() - initialize the peer
  3117. * @vdev_hdl: virtual device object
  3118. * @peer: Peer object
  3119. *
  3120. * Return: void
  3121. */
  3122. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3123. {
  3124. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3125. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3126. struct dp_pdev *pdev;
  3127. struct dp_soc *soc;
  3128. bool hash_based = 0;
  3129. enum cdp_host_reo_dest_ring reo_dest;
  3130. /* preconditions */
  3131. qdf_assert(vdev);
  3132. qdf_assert(peer);
  3133. pdev = vdev->pdev;
  3134. soc = pdev->soc;
  3135. peer->last_assoc_rcvd = 0;
  3136. peer->last_disassoc_rcvd = 0;
  3137. peer->last_deauth_rcvd = 0;
  3138. /*
  3139. * hash based steering is disabled for Radios which are offloaded
  3140. * to NSS
  3141. */
  3142. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3143. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3144. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3145. FL("hash based steering for pdev: %d is %d\n"),
  3146. pdev->pdev_id, hash_based);
  3147. /*
  3148. * Below line of code will ensure the proper reo_dest ring is chosen
  3149. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3150. */
  3151. reo_dest = pdev->reo_dest;
  3152. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3153. /* TODO: Check the destination ring number to be passed to FW */
  3154. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3155. pdev->osif_pdev, peer->mac_addr.raw,
  3156. peer->vdev->vdev_id, hash_based, reo_dest);
  3157. }
  3158. dp_peer_rx_init(pdev, peer);
  3159. return;
  3160. }
  3161. /*
  3162. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3163. * @vdev_handle: virtual device object
  3164. * @htt_pkt_type: type of pkt
  3165. *
  3166. * Return: void
  3167. */
  3168. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3169. enum htt_cmn_pkt_type val)
  3170. {
  3171. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3172. vdev->tx_encap_type = val;
  3173. }
  3174. /*
  3175. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3176. * @vdev_handle: virtual device object
  3177. * @htt_pkt_type: type of pkt
  3178. *
  3179. * Return: void
  3180. */
  3181. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3182. enum htt_cmn_pkt_type val)
  3183. {
  3184. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3185. vdev->rx_decap_type = val;
  3186. }
  3187. /*
  3188. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3189. * @pdev_handle: physical device object
  3190. * @val: reo destination ring index (1 - 4)
  3191. *
  3192. * Return: void
  3193. */
  3194. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3195. enum cdp_host_reo_dest_ring val)
  3196. {
  3197. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3198. if (pdev)
  3199. pdev->reo_dest = val;
  3200. }
  3201. /*
  3202. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3203. * @pdev_handle: physical device object
  3204. *
  3205. * Return: reo destination ring index
  3206. */
  3207. static enum cdp_host_reo_dest_ring
  3208. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3209. {
  3210. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3211. if (pdev)
  3212. return pdev->reo_dest;
  3213. else
  3214. return cdp_host_reo_dest_ring_unknown;
  3215. }
  3216. #ifdef QCA_SUPPORT_SON
  3217. static void dp_son_peer_authorize(struct dp_peer *peer)
  3218. {
  3219. struct dp_soc *soc;
  3220. soc = peer->vdev->pdev->soc;
  3221. peer->peer_bs_inact_flag = 0;
  3222. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3223. return;
  3224. }
  3225. #else
  3226. static void dp_son_peer_authorize(struct dp_peer *peer)
  3227. {
  3228. return;
  3229. }
  3230. #endif
  3231. /*
  3232. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3233. * @pdev_handle: device object
  3234. * @val: value to be set
  3235. *
  3236. * Return: void
  3237. */
  3238. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3239. uint32_t val)
  3240. {
  3241. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3242. /* Enable/Disable smart mesh filtering. This flag will be checked
  3243. * during rx processing to check if packets are from NAC clients.
  3244. */
  3245. pdev->filter_neighbour_peers = val;
  3246. return 0;
  3247. }
  3248. /*
  3249. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3250. * address for smart mesh filtering
  3251. * @pdev_handle: device object
  3252. * @cmd: Add/Del command
  3253. * @macaddr: nac client mac address
  3254. *
  3255. * Return: void
  3256. */
  3257. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3258. uint32_t cmd, uint8_t *macaddr)
  3259. {
  3260. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3261. struct dp_neighbour_peer *peer = NULL;
  3262. if (!macaddr)
  3263. goto fail0;
  3264. /* Store address of NAC (neighbour peer) which will be checked
  3265. * against TA of received packets.
  3266. */
  3267. if (cmd == DP_NAC_PARAM_ADD) {
  3268. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3269. sizeof(*peer));
  3270. if (!peer) {
  3271. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3272. FL("DP neighbour peer node memory allocation failed"));
  3273. goto fail0;
  3274. }
  3275. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3276. macaddr, DP_MAC_ADDR_LEN);
  3277. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3278. /* add this neighbour peer into the list */
  3279. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3280. neighbour_peer_list_elem);
  3281. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3282. return 1;
  3283. } else if (cmd == DP_NAC_PARAM_DEL) {
  3284. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3285. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3286. neighbour_peer_list_elem) {
  3287. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3288. macaddr, DP_MAC_ADDR_LEN)) {
  3289. /* delete this peer from the list */
  3290. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3291. peer, neighbour_peer_list_elem);
  3292. qdf_mem_free(peer);
  3293. break;
  3294. }
  3295. }
  3296. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3297. return 1;
  3298. }
  3299. fail0:
  3300. return 0;
  3301. }
  3302. /*
  3303. * dp_get_sec_type() - Get the security type
  3304. * @peer: Datapath peer handle
  3305. * @sec_idx: Security id (mcast, ucast)
  3306. *
  3307. * return sec_type: Security type
  3308. */
  3309. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3310. {
  3311. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3312. return dpeer->security[sec_idx].sec_type;
  3313. }
  3314. /*
  3315. * dp_peer_authorize() - authorize txrx peer
  3316. * @peer_handle: Datapath peer handle
  3317. * @authorize
  3318. *
  3319. */
  3320. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3321. {
  3322. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3323. struct dp_soc *soc;
  3324. if (peer != NULL) {
  3325. soc = peer->vdev->pdev->soc;
  3326. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3327. dp_son_peer_authorize(peer);
  3328. peer->authorize = authorize ? 1 : 0;
  3329. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3330. }
  3331. }
  3332. #ifdef QCA_SUPPORT_SON
  3333. /*
  3334. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3335. * @pdev_handle: Device handle
  3336. * @new_threshold : updated threshold value
  3337. *
  3338. */
  3339. static void
  3340. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3341. u_int16_t new_threshold)
  3342. {
  3343. struct dp_vdev *vdev;
  3344. struct dp_peer *peer;
  3345. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3346. struct dp_soc *soc = pdev->soc;
  3347. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3348. if (old_threshold == new_threshold)
  3349. return;
  3350. soc->pdev_bs_inact_reload = new_threshold;
  3351. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3352. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3353. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3354. if (vdev->opmode != wlan_op_mode_ap)
  3355. continue;
  3356. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3357. if (!peer->authorize)
  3358. continue;
  3359. if (old_threshold - peer->peer_bs_inact >=
  3360. new_threshold) {
  3361. dp_mark_peer_inact((void *)peer, true);
  3362. peer->peer_bs_inact = 0;
  3363. } else {
  3364. peer->peer_bs_inact = new_threshold -
  3365. (old_threshold - peer->peer_bs_inact);
  3366. }
  3367. }
  3368. }
  3369. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3370. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3371. }
  3372. /**
  3373. * dp_txrx_reset_inact_count(): Reset inact count
  3374. * @pdev_handle - device handle
  3375. *
  3376. * Return: void
  3377. */
  3378. static void
  3379. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3380. {
  3381. struct dp_vdev *vdev = NULL;
  3382. struct dp_peer *peer = NULL;
  3383. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3384. struct dp_soc *soc = pdev->soc;
  3385. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3386. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3387. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3388. if (vdev->opmode != wlan_op_mode_ap)
  3389. continue;
  3390. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3391. if (!peer->authorize)
  3392. continue;
  3393. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3394. }
  3395. }
  3396. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3397. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3398. }
  3399. /**
  3400. * dp_set_inact_params(): set inactivity params
  3401. * @pdev_handle - device handle
  3402. * @inact_check_interval - inactivity interval
  3403. * @inact_normal - Inactivity normal
  3404. * @inact_overload - Inactivity overload
  3405. *
  3406. * Return: bool
  3407. */
  3408. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3409. u_int16_t inact_check_interval,
  3410. u_int16_t inact_normal, u_int16_t inact_overload)
  3411. {
  3412. struct dp_soc *soc;
  3413. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3414. if (!pdev)
  3415. return false;
  3416. soc = pdev->soc;
  3417. if (!soc)
  3418. return false;
  3419. soc->pdev_bs_inact_interval = inact_check_interval;
  3420. soc->pdev_bs_inact_normal = inact_normal;
  3421. soc->pdev_bs_inact_overload = inact_overload;
  3422. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3423. soc->pdev_bs_inact_normal);
  3424. return true;
  3425. }
  3426. /**
  3427. * dp_start_inact_timer(): Inactivity timer start
  3428. * @pdev_handle - device handle
  3429. * @enable - Inactivity timer start/stop
  3430. *
  3431. * Return: bool
  3432. */
  3433. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3434. {
  3435. struct dp_soc *soc;
  3436. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3437. if (!pdev)
  3438. return false;
  3439. soc = pdev->soc;
  3440. if (!soc)
  3441. return false;
  3442. if (enable) {
  3443. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3444. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3445. soc->pdev_bs_inact_interval * 1000);
  3446. } else {
  3447. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3448. }
  3449. return true;
  3450. }
  3451. /**
  3452. * dp_set_overload(): Set inactivity overload
  3453. * @pdev_handle - device handle
  3454. * @overload - overload status
  3455. *
  3456. * Return: void
  3457. */
  3458. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3459. {
  3460. struct dp_soc *soc;
  3461. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3462. if (!pdev)
  3463. return;
  3464. soc = pdev->soc;
  3465. if (!soc)
  3466. return;
  3467. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3468. overload ? soc->pdev_bs_inact_overload :
  3469. soc->pdev_bs_inact_normal);
  3470. }
  3471. /**
  3472. * dp_peer_is_inact(): check whether peer is inactive
  3473. * @peer_handle - datapath peer handle
  3474. *
  3475. * Return: bool
  3476. */
  3477. bool dp_peer_is_inact(void *peer_handle)
  3478. {
  3479. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3480. if (!peer)
  3481. return false;
  3482. return peer->peer_bs_inact_flag == 1;
  3483. }
  3484. /**
  3485. * dp_init_inact_timer: initialize the inact timer
  3486. * @soc - SOC handle
  3487. *
  3488. * Return: void
  3489. */
  3490. void dp_init_inact_timer(struct dp_soc *soc)
  3491. {
  3492. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3493. dp_txrx_peer_find_inact_timeout_handler,
  3494. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3495. }
  3496. #else
  3497. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3498. u_int16_t inact_normal, u_int16_t inact_overload)
  3499. {
  3500. return false;
  3501. }
  3502. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3503. {
  3504. return false;
  3505. }
  3506. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3507. {
  3508. return;
  3509. }
  3510. void dp_init_inact_timer(struct dp_soc *soc)
  3511. {
  3512. return;
  3513. }
  3514. bool dp_peer_is_inact(void *peer)
  3515. {
  3516. return false;
  3517. }
  3518. #endif
  3519. /*
  3520. * dp_peer_unref_delete() - unref and delete peer
  3521. * @peer_handle: Datapath peer handle
  3522. *
  3523. */
  3524. void dp_peer_unref_delete(void *peer_handle)
  3525. {
  3526. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3527. struct dp_peer *bss_peer = NULL;
  3528. struct dp_vdev *vdev = peer->vdev;
  3529. struct dp_pdev *pdev = vdev->pdev;
  3530. struct dp_soc *soc = pdev->soc;
  3531. struct dp_peer *tmppeer;
  3532. int found = 0;
  3533. uint16_t peer_id;
  3534. uint16_t vdev_id;
  3535. /*
  3536. * Hold the lock all the way from checking if the peer ref count
  3537. * is zero until the peer references are removed from the hash
  3538. * table and vdev list (if the peer ref count is zero).
  3539. * This protects against a new HL tx operation starting to use the
  3540. * peer object just after this function concludes it's done being used.
  3541. * Furthermore, the lock needs to be held while checking whether the
  3542. * vdev's list of peers is empty, to make sure that list is not modified
  3543. * concurrently with the empty check.
  3544. */
  3545. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3546. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3547. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3548. peer, qdf_atomic_read(&peer->ref_cnt));
  3549. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3550. peer_id = peer->peer_ids[0];
  3551. vdev_id = vdev->vdev_id;
  3552. /*
  3553. * Make sure that the reference to the peer in
  3554. * peer object map is removed
  3555. */
  3556. if (peer_id != HTT_INVALID_PEER)
  3557. soc->peer_id_to_obj_map[peer_id] = NULL;
  3558. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3559. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3560. /* remove the reference to the peer from the hash table */
  3561. dp_peer_find_hash_remove(soc, peer);
  3562. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3563. if (tmppeer == peer) {
  3564. found = 1;
  3565. break;
  3566. }
  3567. }
  3568. if (found) {
  3569. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3570. peer_list_elem);
  3571. } else {
  3572. /*Ignoring the remove operation as peer not found*/
  3573. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3574. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3575. peer, vdev, &peer->vdev->peer_list);
  3576. }
  3577. /* cleanup the peer data */
  3578. dp_peer_cleanup(vdev, peer);
  3579. /* check whether the parent vdev has no peers left */
  3580. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3581. /*
  3582. * Now that there are no references to the peer, we can
  3583. * release the peer reference lock.
  3584. */
  3585. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3586. /*
  3587. * Check if the parent vdev was waiting for its peers
  3588. * to be deleted, in order for it to be deleted too.
  3589. */
  3590. if (vdev->delete.pending) {
  3591. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3592. vdev->delete.callback;
  3593. void *vdev_delete_context =
  3594. vdev->delete.context;
  3595. QDF_TRACE(QDF_MODULE_ID_DP,
  3596. QDF_TRACE_LEVEL_INFO_HIGH,
  3597. FL("deleting vdev object %pK (%pM)"
  3598. " - its last peer is done"),
  3599. vdev, vdev->mac_addr.raw);
  3600. /* all peers are gone, go ahead and delete it */
  3601. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3602. FLOW_TYPE_VDEV,
  3603. vdev_id);
  3604. dp_tx_vdev_detach(vdev);
  3605. QDF_TRACE(QDF_MODULE_ID_DP,
  3606. QDF_TRACE_LEVEL_INFO_HIGH,
  3607. FL("deleting vdev object %pK (%pM)"),
  3608. vdev, vdev->mac_addr.raw);
  3609. qdf_mem_free(vdev);
  3610. vdev = NULL;
  3611. if (vdev_delete_cb)
  3612. vdev_delete_cb(vdev_delete_context);
  3613. }
  3614. } else {
  3615. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3616. }
  3617. if (vdev) {
  3618. if (vdev->vap_bss_peer == peer) {
  3619. vdev->vap_bss_peer = NULL;
  3620. }
  3621. }
  3622. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3623. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3624. vdev_id, peer->mac_addr.raw);
  3625. }
  3626. if (!vdev || !vdev->vap_bss_peer) {
  3627. goto free_peer;
  3628. }
  3629. #ifdef notyet
  3630. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3631. #else
  3632. bss_peer = vdev->vap_bss_peer;
  3633. DP_UPDATE_STATS(bss_peer, peer);
  3634. free_peer:
  3635. qdf_mem_free(peer);
  3636. #endif
  3637. } else {
  3638. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3639. }
  3640. }
  3641. /*
  3642. * dp_peer_detach_wifi3() – Detach txrx peer
  3643. * @peer_handle: Datapath peer handle
  3644. * @bitmap: bitmap indicating special handling of request.
  3645. *
  3646. */
  3647. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3648. {
  3649. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3650. /* redirect the peer's rx delivery function to point to a
  3651. * discard func
  3652. */
  3653. peer->rx_opt_proc = dp_rx_discard;
  3654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3655. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3656. #ifndef CONFIG_WIN
  3657. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3658. #endif
  3659. qdf_spinlock_destroy(&peer->peer_info_lock);
  3660. /*
  3661. * Remove the reference added during peer_attach.
  3662. * The peer will still be left allocated until the
  3663. * PEER_UNMAP message arrives to remove the other
  3664. * reference, added by the PEER_MAP message.
  3665. */
  3666. dp_peer_unref_delete(peer_handle);
  3667. }
  3668. /*
  3669. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3670. * @peer_handle: Datapath peer handle
  3671. *
  3672. */
  3673. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3674. {
  3675. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3676. return vdev->mac_addr.raw;
  3677. }
  3678. /*
  3679. * dp_vdev_set_wds() - Enable per packet stats
  3680. * @vdev_handle: DP VDEV handle
  3681. * @val: value
  3682. *
  3683. * Return: none
  3684. */
  3685. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3686. {
  3687. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3688. vdev->wds_enabled = val;
  3689. return 0;
  3690. }
  3691. /*
  3692. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3693. * @peer_handle: Datapath peer handle
  3694. *
  3695. */
  3696. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3697. uint8_t vdev_id)
  3698. {
  3699. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3700. struct dp_vdev *vdev = NULL;
  3701. if (qdf_unlikely(!pdev))
  3702. return NULL;
  3703. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3704. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3705. if (vdev->vdev_id == vdev_id)
  3706. break;
  3707. }
  3708. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3709. return (struct cdp_vdev *)vdev;
  3710. }
  3711. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3712. {
  3713. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3714. return vdev->opmode;
  3715. }
  3716. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3717. {
  3718. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3719. struct dp_pdev *pdev = vdev->pdev;
  3720. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3721. }
  3722. /**
  3723. * dp_reset_monitor_mode() - Disable monitor mode
  3724. * @pdev_handle: Datapath PDEV handle
  3725. *
  3726. * Return: 0 on success, not 0 on failure
  3727. */
  3728. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3729. {
  3730. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3731. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3732. struct dp_soc *soc = pdev->soc;
  3733. uint8_t pdev_id;
  3734. int mac_id;
  3735. pdev_id = pdev->pdev_id;
  3736. soc = pdev->soc;
  3737. qdf_spin_lock_bh(&pdev->mon_lock);
  3738. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3739. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3740. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3741. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3742. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3743. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3744. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3745. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3746. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3747. }
  3748. pdev->monitor_vdev = NULL;
  3749. qdf_spin_unlock_bh(&pdev->mon_lock);
  3750. return 0;
  3751. }
  3752. /**
  3753. * dp_set_nac() - set peer_nac
  3754. * @peer_handle: Datapath PEER handle
  3755. *
  3756. * Return: void
  3757. */
  3758. static void dp_set_nac(struct cdp_peer *peer_handle)
  3759. {
  3760. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3761. peer->nac = 1;
  3762. }
  3763. /**
  3764. * dp_get_tx_pending() - read pending tx
  3765. * @pdev_handle: Datapath PDEV handle
  3766. *
  3767. * Return: outstanding tx
  3768. */
  3769. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3770. {
  3771. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3772. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3773. }
  3774. /**
  3775. * dp_get_peer_mac_from_peer_id() - get peer mac
  3776. * @pdev_handle: Datapath PDEV handle
  3777. * @peer_id: Peer ID
  3778. * @peer_mac: MAC addr of PEER
  3779. *
  3780. * Return: void
  3781. */
  3782. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3783. uint32_t peer_id, uint8_t *peer_mac)
  3784. {
  3785. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3786. struct dp_peer *peer;
  3787. if (pdev && peer_mac) {
  3788. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3789. if (peer && peer->mac_addr.raw) {
  3790. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3791. DP_MAC_ADDR_LEN);
  3792. }
  3793. }
  3794. }
  3795. /**
  3796. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3797. * @vdev_handle: Datapath VDEV handle
  3798. * @smart_monitor: Flag to denote if its smart monitor mode
  3799. *
  3800. * Return: 0 on success, not 0 on failure
  3801. */
  3802. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3803. uint8_t smart_monitor)
  3804. {
  3805. /* Many monitor VAPs can exists in a system but only one can be up at
  3806. * anytime
  3807. */
  3808. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3809. struct dp_pdev *pdev;
  3810. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3811. struct dp_soc *soc;
  3812. uint8_t pdev_id;
  3813. int mac_id;
  3814. qdf_assert(vdev);
  3815. pdev = vdev->pdev;
  3816. pdev_id = pdev->pdev_id;
  3817. soc = pdev->soc;
  3818. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3819. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3820. pdev, pdev_id, soc, vdev);
  3821. /*Check if current pdev's monitor_vdev exists */
  3822. if (pdev->monitor_vdev) {
  3823. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3824. "vdev=%pK\n", vdev);
  3825. qdf_assert(vdev);
  3826. }
  3827. pdev->monitor_vdev = vdev;
  3828. /* If smart monitor mode, do not configure monitor ring */
  3829. if (smart_monitor)
  3830. return QDF_STATUS_SUCCESS;
  3831. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3832. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3833. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3834. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3835. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3836. pdev->mo_data_filter);
  3837. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3838. htt_tlv_filter.mpdu_start = 1;
  3839. htt_tlv_filter.msdu_start = 1;
  3840. htt_tlv_filter.packet = 1;
  3841. htt_tlv_filter.msdu_end = 1;
  3842. htt_tlv_filter.mpdu_end = 1;
  3843. htt_tlv_filter.packet_header = 1;
  3844. htt_tlv_filter.attention = 1;
  3845. htt_tlv_filter.ppdu_start = 0;
  3846. htt_tlv_filter.ppdu_end = 0;
  3847. htt_tlv_filter.ppdu_end_user_stats = 0;
  3848. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3849. htt_tlv_filter.ppdu_end_status_done = 0;
  3850. htt_tlv_filter.header_per_msdu = 1;
  3851. htt_tlv_filter.enable_fp =
  3852. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3853. htt_tlv_filter.enable_md = 0;
  3854. htt_tlv_filter.enable_mo =
  3855. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3856. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3857. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3858. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3859. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3860. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3861. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3862. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3863. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3864. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3865. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3866. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3867. }
  3868. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3869. htt_tlv_filter.mpdu_start = 1;
  3870. htt_tlv_filter.msdu_start = 0;
  3871. htt_tlv_filter.packet = 0;
  3872. htt_tlv_filter.msdu_end = 0;
  3873. htt_tlv_filter.mpdu_end = 0;
  3874. htt_tlv_filter.attention = 0;
  3875. htt_tlv_filter.ppdu_start = 1;
  3876. htt_tlv_filter.ppdu_end = 1;
  3877. htt_tlv_filter.ppdu_end_user_stats = 1;
  3878. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3879. htt_tlv_filter.ppdu_end_status_done = 1;
  3880. htt_tlv_filter.enable_fp = 1;
  3881. htt_tlv_filter.enable_md = 0;
  3882. htt_tlv_filter.enable_mo = 1;
  3883. if (pdev->mcopy_mode) {
  3884. htt_tlv_filter.packet_header = 1;
  3885. }
  3886. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  3887. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  3888. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  3889. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  3890. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  3891. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  3892. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3893. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3894. pdev->pdev_id);
  3895. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3896. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3897. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3898. }
  3899. return QDF_STATUS_SUCCESS;
  3900. }
  3901. /**
  3902. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3903. * @pdev_handle: Datapath PDEV handle
  3904. * @filter_val: Flag to select Filter for monitor mode
  3905. * Return: 0 on success, not 0 on failure
  3906. */
  3907. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3908. struct cdp_monitor_filter *filter_val)
  3909. {
  3910. /* Many monitor VAPs can exists in a system but only one can be up at
  3911. * anytime
  3912. */
  3913. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3914. struct dp_vdev *vdev = pdev->monitor_vdev;
  3915. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3916. struct dp_soc *soc;
  3917. uint8_t pdev_id;
  3918. int mac_id;
  3919. pdev_id = pdev->pdev_id;
  3920. soc = pdev->soc;
  3921. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3922. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3923. pdev, pdev_id, soc, vdev);
  3924. /*Check if current pdev's monitor_vdev exists */
  3925. if (!pdev->monitor_vdev) {
  3926. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3927. "vdev=%pK\n", vdev);
  3928. qdf_assert(vdev);
  3929. }
  3930. /* update filter mode, type in pdev structure */
  3931. pdev->mon_filter_mode = filter_val->mode;
  3932. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3933. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3934. pdev->fp_data_filter = filter_val->fp_data;
  3935. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3936. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3937. pdev->mo_data_filter = filter_val->mo_data;
  3938. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3939. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3940. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3941. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3942. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3943. pdev->mo_data_filter);
  3944. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3945. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3946. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3947. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3948. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3949. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3950. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3951. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3952. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3953. }
  3954. htt_tlv_filter.mpdu_start = 1;
  3955. htt_tlv_filter.msdu_start = 1;
  3956. htt_tlv_filter.packet = 1;
  3957. htt_tlv_filter.msdu_end = 1;
  3958. htt_tlv_filter.mpdu_end = 1;
  3959. htt_tlv_filter.packet_header = 1;
  3960. htt_tlv_filter.attention = 1;
  3961. htt_tlv_filter.ppdu_start = 0;
  3962. htt_tlv_filter.ppdu_end = 0;
  3963. htt_tlv_filter.ppdu_end_user_stats = 0;
  3964. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3965. htt_tlv_filter.ppdu_end_status_done = 0;
  3966. htt_tlv_filter.header_per_msdu = 1;
  3967. htt_tlv_filter.enable_fp =
  3968. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3969. htt_tlv_filter.enable_md = 0;
  3970. htt_tlv_filter.enable_mo =
  3971. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3972. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3973. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3974. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3975. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3976. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3977. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3978. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3979. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3980. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3981. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3982. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3983. }
  3984. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3985. htt_tlv_filter.mpdu_start = 1;
  3986. htt_tlv_filter.msdu_start = 0;
  3987. htt_tlv_filter.packet = 0;
  3988. htt_tlv_filter.msdu_end = 0;
  3989. htt_tlv_filter.mpdu_end = 0;
  3990. htt_tlv_filter.attention = 0;
  3991. htt_tlv_filter.ppdu_start = 1;
  3992. htt_tlv_filter.ppdu_end = 1;
  3993. htt_tlv_filter.ppdu_end_user_stats = 1;
  3994. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3995. htt_tlv_filter.ppdu_end_status_done = 1;
  3996. htt_tlv_filter.enable_fp = 1;
  3997. htt_tlv_filter.enable_md = 0;
  3998. htt_tlv_filter.enable_mo = 1;
  3999. if (pdev->mcopy_mode) {
  4000. htt_tlv_filter.packet_header = 1;
  4001. }
  4002. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4003. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4004. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4005. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4006. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4007. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4008. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4009. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4010. pdev->pdev_id);
  4011. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4012. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4013. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4014. }
  4015. return QDF_STATUS_SUCCESS;
  4016. }
  4017. /**
  4018. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4019. * @pdev_handle: Datapath PDEV handle
  4020. *
  4021. * Return: pdev_id
  4022. */
  4023. static
  4024. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4025. {
  4026. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4027. return pdev->pdev_id;
  4028. }
  4029. /**
  4030. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4031. * @vdev_handle: Datapath VDEV handle
  4032. * Return: true on ucast filter flag set
  4033. */
  4034. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4035. {
  4036. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4037. struct dp_pdev *pdev;
  4038. pdev = vdev->pdev;
  4039. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4040. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4041. return true;
  4042. return false;
  4043. }
  4044. /**
  4045. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4046. * @vdev_handle: Datapath VDEV handle
  4047. * Return: true on mcast filter flag set
  4048. */
  4049. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4050. {
  4051. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4052. struct dp_pdev *pdev;
  4053. pdev = vdev->pdev;
  4054. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4055. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4056. return true;
  4057. return false;
  4058. }
  4059. /**
  4060. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4061. * @vdev_handle: Datapath VDEV handle
  4062. * Return: true on non data filter flag set
  4063. */
  4064. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4065. {
  4066. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4067. struct dp_pdev *pdev;
  4068. pdev = vdev->pdev;
  4069. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4070. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4071. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4072. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4073. return true;
  4074. }
  4075. }
  4076. return false;
  4077. }
  4078. #ifdef MESH_MODE_SUPPORT
  4079. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4080. {
  4081. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4082. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4083. FL("val %d"), val);
  4084. vdev->mesh_vdev = val;
  4085. }
  4086. /*
  4087. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4088. * @vdev_hdl: virtual device object
  4089. * @val: value to be set
  4090. *
  4091. * Return: void
  4092. */
  4093. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4094. {
  4095. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4096. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4097. FL("val %d"), val);
  4098. vdev->mesh_rx_filter = val;
  4099. }
  4100. #endif
  4101. /*
  4102. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4103. * Current scope is bar received count
  4104. *
  4105. * @pdev_handle: DP_PDEV handle
  4106. *
  4107. * Return: void
  4108. */
  4109. #define STATS_PROC_TIMEOUT (HZ/1000)
  4110. static void
  4111. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4112. {
  4113. struct dp_vdev *vdev;
  4114. struct dp_peer *peer;
  4115. uint32_t waitcnt;
  4116. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4117. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4118. if (!peer) {
  4119. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4120. FL("DP Invalid Peer refernce"));
  4121. return;
  4122. }
  4123. if (peer->delete_in_progress) {
  4124. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4125. FL("DP Peer deletion in progress"));
  4126. continue;
  4127. }
  4128. qdf_atomic_inc(&peer->ref_cnt);
  4129. waitcnt = 0;
  4130. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4131. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4132. && waitcnt < 10) {
  4133. schedule_timeout_interruptible(
  4134. STATS_PROC_TIMEOUT);
  4135. waitcnt++;
  4136. }
  4137. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4138. dp_peer_unref_delete(peer);
  4139. }
  4140. }
  4141. }
  4142. /**
  4143. * dp_rx_bar_stats_cb(): BAR received stats callback
  4144. * @soc: SOC handle
  4145. * @cb_ctxt: Call back context
  4146. * @reo_status: Reo status
  4147. *
  4148. * return: void
  4149. */
  4150. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4151. union hal_reo_status *reo_status)
  4152. {
  4153. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4154. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4155. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4156. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4157. queue_status->header.status);
  4158. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4159. return;
  4160. }
  4161. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4162. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4163. }
  4164. /**
  4165. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4166. * @vdev: DP VDEV handle
  4167. *
  4168. * return: void
  4169. */
  4170. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4171. {
  4172. struct dp_peer *peer = NULL;
  4173. struct dp_soc *soc = vdev->pdev->soc;
  4174. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4175. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4176. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4177. DP_UPDATE_STATS(vdev, peer);
  4178. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4179. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4180. &vdev->stats, (uint16_t) vdev->vdev_id,
  4181. UPDATE_VDEV_STATS);
  4182. }
  4183. /**
  4184. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4185. * @pdev: DP PDEV handle
  4186. *
  4187. * return: void
  4188. */
  4189. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4190. {
  4191. struct dp_vdev *vdev = NULL;
  4192. struct dp_soc *soc = pdev->soc;
  4193. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4194. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4195. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4196. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4197. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4198. dp_aggregate_vdev_stats(vdev);
  4199. DP_UPDATE_STATS(pdev, vdev);
  4200. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4201. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4202. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4203. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4204. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4205. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4206. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4207. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4208. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4209. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4210. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4211. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4212. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4213. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4214. DP_STATS_AGGR(pdev, vdev,
  4215. tx_i.mcast_en.dropped_map_error);
  4216. DP_STATS_AGGR(pdev, vdev,
  4217. tx_i.mcast_en.dropped_self_mac);
  4218. DP_STATS_AGGR(pdev, vdev,
  4219. tx_i.mcast_en.dropped_send_fail);
  4220. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4221. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4222. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4223. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4224. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4225. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4226. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4227. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4228. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4229. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4230. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4231. pdev->stats.tx_i.dropped.dma_error +
  4232. pdev->stats.tx_i.dropped.ring_full +
  4233. pdev->stats.tx_i.dropped.enqueue_fail +
  4234. pdev->stats.tx_i.dropped.desc_na +
  4235. pdev->stats.tx_i.dropped.res_full;
  4236. pdev->stats.tx.last_ack_rssi =
  4237. vdev->stats.tx.last_ack_rssi;
  4238. pdev->stats.tx_i.tso.num_seg =
  4239. vdev->stats.tx_i.tso.num_seg;
  4240. }
  4241. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4242. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4243. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  4244. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4245. }
  4246. /**
  4247. * dp_vdev_getstats() - get vdev packet level stats
  4248. * @vdev_handle: Datapath VDEV handle
  4249. * @stats: cdp network device stats structure
  4250. *
  4251. * Return: void
  4252. */
  4253. static void dp_vdev_getstats(void *vdev_handle,
  4254. struct cdp_dev_stats *stats)
  4255. {
  4256. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4257. dp_aggregate_vdev_stats(vdev);
  4258. }
  4259. /**
  4260. * dp_pdev_getstats() - get pdev packet level stats
  4261. * @pdev_handle: Datapath PDEV handle
  4262. * @stats: cdp network device stats structure
  4263. *
  4264. * Return: void
  4265. */
  4266. static void dp_pdev_getstats(void *pdev_handle,
  4267. struct cdp_dev_stats *stats)
  4268. {
  4269. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4270. dp_aggregate_pdev_stats(pdev);
  4271. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4272. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4273. stats->tx_errors = pdev->stats.tx.tx_failed +
  4274. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4275. stats->tx_dropped = stats->tx_errors;
  4276. stats->rx_packets = pdev->stats.rx.unicast.num +
  4277. pdev->stats.rx.multicast.num +
  4278. pdev->stats.rx.bcast.num;
  4279. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4280. pdev->stats.rx.multicast.bytes +
  4281. pdev->stats.rx.bcast.bytes;
  4282. }
  4283. /**
  4284. * dp_get_device_stats() - get interface level packet stats
  4285. * @handle: device handle
  4286. * @stats: cdp network device stats structure
  4287. * @type: device type pdev/vdev
  4288. *
  4289. * Return: void
  4290. */
  4291. static void dp_get_device_stats(void *handle,
  4292. struct cdp_dev_stats *stats, uint8_t type)
  4293. {
  4294. switch (type) {
  4295. case UPDATE_VDEV_STATS:
  4296. dp_vdev_getstats(handle, stats);
  4297. break;
  4298. case UPDATE_PDEV_STATS:
  4299. dp_pdev_getstats(handle, stats);
  4300. break;
  4301. default:
  4302. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4303. "apstats cannot be updated for this input "
  4304. "type %d\n", type);
  4305. break;
  4306. }
  4307. }
  4308. /**
  4309. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4310. * @pdev: DP_PDEV Handle
  4311. *
  4312. * Return:void
  4313. */
  4314. static inline void
  4315. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4316. {
  4317. uint8_t index = 0;
  4318. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4319. DP_PRINT_STATS("Received From Stack:");
  4320. DP_PRINT_STATS(" Packets = %d",
  4321. pdev->stats.tx_i.rcvd.num);
  4322. DP_PRINT_STATS(" Bytes = %llu",
  4323. pdev->stats.tx_i.rcvd.bytes);
  4324. DP_PRINT_STATS("Processed:");
  4325. DP_PRINT_STATS(" Packets = %d",
  4326. pdev->stats.tx_i.processed.num);
  4327. DP_PRINT_STATS(" Bytes = %llu",
  4328. pdev->stats.tx_i.processed.bytes);
  4329. DP_PRINT_STATS("Total Completions:");
  4330. DP_PRINT_STATS(" Packets = %u",
  4331. pdev->stats.tx.comp_pkt.num);
  4332. DP_PRINT_STATS(" Bytes = %llu",
  4333. pdev->stats.tx.comp_pkt.bytes);
  4334. DP_PRINT_STATS("Successful Completions:");
  4335. DP_PRINT_STATS(" Packets = %u",
  4336. pdev->stats.tx.tx_success.num);
  4337. DP_PRINT_STATS(" Bytes = %llu",
  4338. pdev->stats.tx.tx_success.bytes);
  4339. DP_PRINT_STATS("Dropped:");
  4340. DP_PRINT_STATS(" Total = %d",
  4341. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4342. DP_PRINT_STATS(" Dma_map_error = %d",
  4343. pdev->stats.tx_i.dropped.dma_error);
  4344. DP_PRINT_STATS(" Ring Full = %d",
  4345. pdev->stats.tx_i.dropped.ring_full);
  4346. DP_PRINT_STATS(" Descriptor Not available = %d",
  4347. pdev->stats.tx_i.dropped.desc_na);
  4348. DP_PRINT_STATS(" HW enqueue failed= %d",
  4349. pdev->stats.tx_i.dropped.enqueue_fail);
  4350. DP_PRINT_STATS(" Resources Full = %d",
  4351. pdev->stats.tx_i.dropped.res_full);
  4352. DP_PRINT_STATS(" FW removed = %d",
  4353. pdev->stats.tx.dropped.fw_rem);
  4354. DP_PRINT_STATS(" FW removed transmitted = %d",
  4355. pdev->stats.tx.dropped.fw_rem_tx);
  4356. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4357. pdev->stats.tx.dropped.fw_rem_notx);
  4358. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4359. pdev->stats.tx.dropped.fw_reason1);
  4360. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4361. pdev->stats.tx.dropped.fw_reason2);
  4362. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4363. pdev->stats.tx.dropped.fw_reason3);
  4364. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4365. pdev->stats.tx.dropped.age_out);
  4366. DP_PRINT_STATS("Scatter Gather:");
  4367. DP_PRINT_STATS(" Packets = %d",
  4368. pdev->stats.tx_i.sg.sg_pkt.num);
  4369. DP_PRINT_STATS(" Bytes = %llu",
  4370. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4371. DP_PRINT_STATS(" Dropped By Host = %d",
  4372. pdev->stats.tx_i.sg.dropped_host);
  4373. DP_PRINT_STATS(" Dropped By Target = %d",
  4374. pdev->stats.tx_i.sg.dropped_target);
  4375. DP_PRINT_STATS("TSO:");
  4376. DP_PRINT_STATS(" Number of Segments = %d",
  4377. pdev->stats.tx_i.tso.num_seg);
  4378. DP_PRINT_STATS(" Packets = %d",
  4379. pdev->stats.tx_i.tso.tso_pkt.num);
  4380. DP_PRINT_STATS(" Bytes = %llu",
  4381. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4382. DP_PRINT_STATS(" Dropped By Host = %d",
  4383. pdev->stats.tx_i.tso.dropped_host);
  4384. DP_PRINT_STATS("Mcast Enhancement:");
  4385. DP_PRINT_STATS(" Packets = %d",
  4386. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4387. DP_PRINT_STATS(" Bytes = %llu",
  4388. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4389. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4390. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4391. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4392. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4393. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4394. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4395. DP_PRINT_STATS(" Unicast sent = %d",
  4396. pdev->stats.tx_i.mcast_en.ucast);
  4397. DP_PRINT_STATS("Raw:");
  4398. DP_PRINT_STATS(" Packets = %d",
  4399. pdev->stats.tx_i.raw.raw_pkt.num);
  4400. DP_PRINT_STATS(" Bytes = %llu",
  4401. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4402. DP_PRINT_STATS(" DMA map error = %d",
  4403. pdev->stats.tx_i.raw.dma_map_error);
  4404. DP_PRINT_STATS("Reinjected:");
  4405. DP_PRINT_STATS(" Packets = %d",
  4406. pdev->stats.tx_i.reinject_pkts.num);
  4407. DP_PRINT_STATS("Bytes = %llu\n",
  4408. pdev->stats.tx_i.reinject_pkts.bytes);
  4409. DP_PRINT_STATS("Inspected:");
  4410. DP_PRINT_STATS(" Packets = %d",
  4411. pdev->stats.tx_i.inspect_pkts.num);
  4412. DP_PRINT_STATS(" Bytes = %llu",
  4413. pdev->stats.tx_i.inspect_pkts.bytes);
  4414. DP_PRINT_STATS("Nawds Multicast:");
  4415. DP_PRINT_STATS(" Packets = %d",
  4416. pdev->stats.tx_i.nawds_mcast.num);
  4417. DP_PRINT_STATS(" Bytes = %llu",
  4418. pdev->stats.tx_i.nawds_mcast.bytes);
  4419. DP_PRINT_STATS("CCE Classified:");
  4420. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4421. pdev->stats.tx_i.cce_classified);
  4422. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4423. pdev->stats.tx_i.cce_classified_raw);
  4424. DP_PRINT_STATS("Mesh stats:");
  4425. DP_PRINT_STATS(" frames to firmware: %u",
  4426. pdev->stats.tx_i.mesh.exception_fw);
  4427. DP_PRINT_STATS(" completions from fw: %u",
  4428. pdev->stats.tx_i.mesh.completion_fw);
  4429. DP_PRINT_STATS("PPDU stats counter");
  4430. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4431. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4432. pdev->stats.ppdu_stats_counter[index]);
  4433. }
  4434. }
  4435. /**
  4436. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4437. * @pdev: DP_PDEV Handle
  4438. *
  4439. * Return: void
  4440. */
  4441. static inline void
  4442. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4443. {
  4444. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4445. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4446. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4447. pdev->stats.rx.rcvd_reo[0].num,
  4448. pdev->stats.rx.rcvd_reo[1].num,
  4449. pdev->stats.rx.rcvd_reo[2].num,
  4450. pdev->stats.rx.rcvd_reo[3].num);
  4451. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4452. pdev->stats.rx.rcvd_reo[0].bytes,
  4453. pdev->stats.rx.rcvd_reo[1].bytes,
  4454. pdev->stats.rx.rcvd_reo[2].bytes,
  4455. pdev->stats.rx.rcvd_reo[3].bytes);
  4456. DP_PRINT_STATS("Replenished:");
  4457. DP_PRINT_STATS(" Packets = %d",
  4458. pdev->stats.replenish.pkts.num);
  4459. DP_PRINT_STATS(" Bytes = %llu",
  4460. pdev->stats.replenish.pkts.bytes);
  4461. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4462. pdev->stats.buf_freelist);
  4463. DP_PRINT_STATS(" Low threshold intr = %d",
  4464. pdev->stats.replenish.low_thresh_intrs);
  4465. DP_PRINT_STATS("Dropped:");
  4466. DP_PRINT_STATS(" msdu_not_done = %d",
  4467. pdev->stats.dropped.msdu_not_done);
  4468. DP_PRINT_STATS(" mon_rx_drop = %d",
  4469. pdev->stats.dropped.mon_rx_drop);
  4470. DP_PRINT_STATS("Sent To Stack:");
  4471. DP_PRINT_STATS(" Packets = %d",
  4472. pdev->stats.rx.to_stack.num);
  4473. DP_PRINT_STATS(" Bytes = %llu",
  4474. pdev->stats.rx.to_stack.bytes);
  4475. DP_PRINT_STATS("Multicast/Broadcast:");
  4476. DP_PRINT_STATS(" Packets = %d",
  4477. (pdev->stats.rx.multicast.num +
  4478. pdev->stats.rx.bcast.num));
  4479. DP_PRINT_STATS(" Bytes = %llu",
  4480. (pdev->stats.rx.multicast.bytes +
  4481. pdev->stats.rx.bcast.bytes));
  4482. DP_PRINT_STATS("Errors:");
  4483. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4484. pdev->stats.replenish.rxdma_err);
  4485. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4486. pdev->stats.err.desc_alloc_fail);
  4487. DP_PRINT_STATS("IP checksum error = %d",
  4488. pdev->stats.err.ip_csum_err);
  4489. DP_PRINT_STATS("TCP/UDP checksum error = %d",
  4490. pdev->stats.err.tcp_udp_csum_err);
  4491. /* Get bar_recv_cnt */
  4492. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4493. DP_PRINT_STATS("BAR Received Count: = %d",
  4494. pdev->stats.rx.bar_recv_cnt);
  4495. }
  4496. /**
  4497. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  4498. * @pdev: DP_PDEV Handle
  4499. *
  4500. * Return: void
  4501. */
  4502. static inline void
  4503. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  4504. {
  4505. struct cdp_pdev_mon_stats *rx_mon_stats;
  4506. rx_mon_stats = &pdev->rx_mon_stats;
  4507. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  4508. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  4509. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  4510. rx_mon_stats->status_ppdu_done);
  4511. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  4512. rx_mon_stats->dest_ppdu_done);
  4513. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  4514. rx_mon_stats->dest_mpdu_done);
  4515. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  4516. rx_mon_stats->dest_mpdu_drop);
  4517. }
  4518. /**
  4519. * dp_print_soc_tx_stats(): Print SOC level stats
  4520. * @soc DP_SOC Handle
  4521. *
  4522. * Return: void
  4523. */
  4524. static inline void
  4525. dp_print_soc_tx_stats(struct dp_soc *soc)
  4526. {
  4527. uint8_t desc_pool_id;
  4528. soc->stats.tx.desc_in_use = 0;
  4529. DP_PRINT_STATS("SOC Tx Stats:\n");
  4530. for (desc_pool_id = 0;
  4531. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  4532. desc_pool_id++)
  4533. soc->stats.tx.desc_in_use +=
  4534. soc->tx_desc[desc_pool_id].num_allocated;
  4535. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4536. soc->stats.tx.desc_in_use);
  4537. DP_PRINT_STATS("Invalid peer:");
  4538. DP_PRINT_STATS(" Packets = %d",
  4539. soc->stats.tx.tx_invalid_peer.num);
  4540. DP_PRINT_STATS(" Bytes = %llu",
  4541. soc->stats.tx.tx_invalid_peer.bytes);
  4542. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4543. soc->stats.tx.tcl_ring_full[0],
  4544. soc->stats.tx.tcl_ring_full[1],
  4545. soc->stats.tx.tcl_ring_full[2]);
  4546. }
  4547. /**
  4548. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4549. * @soc: DP_SOC Handle
  4550. *
  4551. * Return:void
  4552. */
  4553. static inline void
  4554. dp_print_soc_rx_stats(struct dp_soc *soc)
  4555. {
  4556. uint32_t i;
  4557. char reo_error[DP_REO_ERR_LENGTH];
  4558. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4559. uint8_t index = 0;
  4560. DP_PRINT_STATS("SOC Rx Stats:\n");
  4561. DP_PRINT_STATS("Errors:\n");
  4562. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4563. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4564. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4565. DP_PRINT_STATS("Invalid RBM = %d",
  4566. soc->stats.rx.err.invalid_rbm);
  4567. DP_PRINT_STATS("Invalid Vdev = %d",
  4568. soc->stats.rx.err.invalid_vdev);
  4569. DP_PRINT_STATS("Invalid Pdev = %d",
  4570. soc->stats.rx.err.invalid_pdev);
  4571. DP_PRINT_STATS("Invalid Peer = %d",
  4572. soc->stats.rx.err.rx_invalid_peer.num);
  4573. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4574. soc->stats.rx.err.hal_ring_access_fail);
  4575. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4576. index += qdf_snprint(&rxdma_error[index],
  4577. DP_RXDMA_ERR_LENGTH - index,
  4578. " %d", soc->stats.rx.err.rxdma_error[i]);
  4579. }
  4580. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4581. rxdma_error);
  4582. index = 0;
  4583. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4584. index += qdf_snprint(&reo_error[index],
  4585. DP_REO_ERR_LENGTH - index,
  4586. " %d", soc->stats.rx.err.reo_error[i]);
  4587. }
  4588. DP_PRINT_STATS("REO Error(0-14):%s",
  4589. reo_error);
  4590. }
  4591. /**
  4592. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4593. * @soc: DP_SOC handle
  4594. * @srng: DP_SRNG handle
  4595. * @ring_name: SRNG name
  4596. *
  4597. * Return: void
  4598. */
  4599. static inline void
  4600. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4601. char *ring_name)
  4602. {
  4603. uint32_t tailp;
  4604. uint32_t headp;
  4605. if (srng->hal_srng != NULL) {
  4606. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4607. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4608. ring_name, headp, tailp);
  4609. }
  4610. }
  4611. /**
  4612. * dp_print_ring_stats(): Print tail and head pointer
  4613. * @pdev: DP_PDEV handle
  4614. *
  4615. * Return:void
  4616. */
  4617. static inline void
  4618. dp_print_ring_stats(struct dp_pdev *pdev)
  4619. {
  4620. uint32_t i;
  4621. char ring_name[STR_MAXLEN + 1];
  4622. int mac_id;
  4623. dp_print_ring_stat_from_hal(pdev->soc,
  4624. &pdev->soc->reo_exception_ring,
  4625. "Reo Exception Ring");
  4626. dp_print_ring_stat_from_hal(pdev->soc,
  4627. &pdev->soc->reo_reinject_ring,
  4628. "Reo Inject Ring");
  4629. dp_print_ring_stat_from_hal(pdev->soc,
  4630. &pdev->soc->reo_cmd_ring,
  4631. "Reo Command Ring");
  4632. dp_print_ring_stat_from_hal(pdev->soc,
  4633. &pdev->soc->reo_status_ring,
  4634. "Reo Status Ring");
  4635. dp_print_ring_stat_from_hal(pdev->soc,
  4636. &pdev->soc->rx_rel_ring,
  4637. "Rx Release ring");
  4638. dp_print_ring_stat_from_hal(pdev->soc,
  4639. &pdev->soc->tcl_cmd_ring,
  4640. "Tcl command Ring");
  4641. dp_print_ring_stat_from_hal(pdev->soc,
  4642. &pdev->soc->tcl_status_ring,
  4643. "Tcl Status Ring");
  4644. dp_print_ring_stat_from_hal(pdev->soc,
  4645. &pdev->soc->wbm_desc_rel_ring,
  4646. "Wbm Desc Rel Ring");
  4647. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4648. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4649. dp_print_ring_stat_from_hal(pdev->soc,
  4650. &pdev->soc->reo_dest_ring[i],
  4651. ring_name);
  4652. }
  4653. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4654. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4655. dp_print_ring_stat_from_hal(pdev->soc,
  4656. &pdev->soc->tcl_data_ring[i],
  4657. ring_name);
  4658. }
  4659. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4660. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4661. dp_print_ring_stat_from_hal(pdev->soc,
  4662. &pdev->soc->tx_comp_ring[i],
  4663. ring_name);
  4664. }
  4665. dp_print_ring_stat_from_hal(pdev->soc,
  4666. &pdev->rx_refill_buf_ring,
  4667. "Rx Refill Buf Ring");
  4668. dp_print_ring_stat_from_hal(pdev->soc,
  4669. &pdev->rx_refill_buf_ring2,
  4670. "Second Rx Refill Buf Ring");
  4671. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4672. dp_print_ring_stat_from_hal(pdev->soc,
  4673. &pdev->rxdma_mon_buf_ring[mac_id],
  4674. "Rxdma Mon Buf Ring");
  4675. dp_print_ring_stat_from_hal(pdev->soc,
  4676. &pdev->rxdma_mon_dst_ring[mac_id],
  4677. "Rxdma Mon Dst Ring");
  4678. dp_print_ring_stat_from_hal(pdev->soc,
  4679. &pdev->rxdma_mon_status_ring[mac_id],
  4680. "Rxdma Mon Status Ring");
  4681. dp_print_ring_stat_from_hal(pdev->soc,
  4682. &pdev->rxdma_mon_desc_ring[mac_id],
  4683. "Rxdma mon desc Ring");
  4684. }
  4685. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4686. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4687. dp_print_ring_stat_from_hal(pdev->soc,
  4688. &pdev->rxdma_err_dst_ring[i],
  4689. ring_name);
  4690. }
  4691. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4692. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4693. dp_print_ring_stat_from_hal(pdev->soc,
  4694. &pdev->rx_mac_buf_ring[i],
  4695. ring_name);
  4696. }
  4697. }
  4698. /**
  4699. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4700. * @vdev: DP_VDEV handle
  4701. *
  4702. * Return:void
  4703. */
  4704. static inline void
  4705. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4706. {
  4707. struct dp_peer *peer = NULL;
  4708. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4709. DP_STATS_CLR(vdev->pdev);
  4710. DP_STATS_CLR(vdev->pdev->soc);
  4711. DP_STATS_CLR(vdev);
  4712. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4713. if (!peer)
  4714. return;
  4715. DP_STATS_CLR(peer);
  4716. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4717. soc->cdp_soc.ol_ops->update_dp_stats(
  4718. vdev->pdev->osif_pdev,
  4719. &peer->stats,
  4720. peer->peer_ids[0],
  4721. UPDATE_PEER_STATS);
  4722. }
  4723. }
  4724. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4725. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4726. &vdev->stats, (uint16_t)vdev->vdev_id,
  4727. UPDATE_VDEV_STATS);
  4728. }
  4729. /**
  4730. * dp_print_rx_rates(): Print Rx rate stats
  4731. * @vdev: DP_VDEV handle
  4732. *
  4733. * Return:void
  4734. */
  4735. static inline void
  4736. dp_print_rx_rates(struct dp_vdev *vdev)
  4737. {
  4738. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4739. uint8_t i, mcs, pkt_type;
  4740. uint8_t index = 0;
  4741. char nss[DP_NSS_LENGTH];
  4742. DP_PRINT_STATS("Rx Rate Info:\n");
  4743. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4744. index = 0;
  4745. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4746. if (!dp_rate_string[pkt_type][mcs].valid)
  4747. continue;
  4748. DP_PRINT_STATS(" %s = %d",
  4749. dp_rate_string[pkt_type][mcs].mcs_type,
  4750. pdev->stats.rx.pkt_type[pkt_type].
  4751. mcs_count[mcs]);
  4752. }
  4753. DP_PRINT_STATS("\n");
  4754. }
  4755. index = 0;
  4756. for (i = 0; i < SS_COUNT; i++) {
  4757. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4758. " %d", pdev->stats.rx.nss[i]);
  4759. }
  4760. DP_PRINT_STATS("NSS(1-8) = %s",
  4761. nss);
  4762. DP_PRINT_STATS("SGI ="
  4763. " 0.8us %d,"
  4764. " 0.4us %d,"
  4765. " 1.6us %d,"
  4766. " 3.2us %d,",
  4767. pdev->stats.rx.sgi_count[0],
  4768. pdev->stats.rx.sgi_count[1],
  4769. pdev->stats.rx.sgi_count[2],
  4770. pdev->stats.rx.sgi_count[3]);
  4771. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4772. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4773. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4774. DP_PRINT_STATS("Reception Type ="
  4775. " SU: %d,"
  4776. " MU_MIMO:%d,"
  4777. " MU_OFDMA:%d,"
  4778. " MU_OFDMA_MIMO:%d\n",
  4779. pdev->stats.rx.reception_type[0],
  4780. pdev->stats.rx.reception_type[1],
  4781. pdev->stats.rx.reception_type[2],
  4782. pdev->stats.rx.reception_type[3]);
  4783. DP_PRINT_STATS("Aggregation:\n");
  4784. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4785. pdev->stats.rx.ampdu_cnt);
  4786. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4787. pdev->stats.rx.non_ampdu_cnt);
  4788. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4789. pdev->stats.rx.amsdu_cnt);
  4790. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4791. pdev->stats.rx.non_amsdu_cnt);
  4792. }
  4793. /**
  4794. * dp_print_tx_rates(): Print tx rates
  4795. * @vdev: DP_VDEV handle
  4796. *
  4797. * Return:void
  4798. */
  4799. static inline void
  4800. dp_print_tx_rates(struct dp_vdev *vdev)
  4801. {
  4802. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4803. uint8_t mcs, pkt_type;
  4804. uint32_t index;
  4805. DP_PRINT_STATS("Tx Rate Info:\n");
  4806. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4807. index = 0;
  4808. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4809. if (!dp_rate_string[pkt_type][mcs].valid)
  4810. continue;
  4811. DP_PRINT_STATS(" %s = %d",
  4812. dp_rate_string[pkt_type][mcs].mcs_type,
  4813. pdev->stats.tx.pkt_type[pkt_type].
  4814. mcs_count[mcs]);
  4815. }
  4816. DP_PRINT_STATS("\n");
  4817. }
  4818. DP_PRINT_STATS("SGI ="
  4819. " 0.8us %d"
  4820. " 0.4us %d"
  4821. " 1.6us %d"
  4822. " 3.2us %d",
  4823. pdev->stats.tx.sgi_count[0],
  4824. pdev->stats.tx.sgi_count[1],
  4825. pdev->stats.tx.sgi_count[2],
  4826. pdev->stats.tx.sgi_count[3]);
  4827. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4828. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4829. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4830. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4831. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4832. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4833. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4834. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4835. DP_PRINT_STATS("Aggregation:\n");
  4836. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4837. pdev->stats.tx.amsdu_cnt);
  4838. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4839. pdev->stats.tx.non_amsdu_cnt);
  4840. }
  4841. /**
  4842. * dp_print_peer_stats():print peer stats
  4843. * @peer: DP_PEER handle
  4844. *
  4845. * return void
  4846. */
  4847. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4848. {
  4849. uint8_t i, mcs, pkt_type;
  4850. uint32_t index;
  4851. char nss[DP_NSS_LENGTH];
  4852. DP_PRINT_STATS("Node Tx Stats:\n");
  4853. DP_PRINT_STATS("Total Packet Completions = %d",
  4854. peer->stats.tx.comp_pkt.num);
  4855. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4856. peer->stats.tx.comp_pkt.bytes);
  4857. DP_PRINT_STATS("Success Packets = %d",
  4858. peer->stats.tx.tx_success.num);
  4859. DP_PRINT_STATS("Success Bytes = %llu",
  4860. peer->stats.tx.tx_success.bytes);
  4861. DP_PRINT_STATS("Unicast Success Packets = %d",
  4862. peer->stats.tx.ucast.num);
  4863. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4864. peer->stats.tx.ucast.bytes);
  4865. DP_PRINT_STATS("Multicast Success Packets = %d",
  4866. peer->stats.tx.mcast.num);
  4867. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4868. peer->stats.tx.mcast.bytes);
  4869. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4870. peer->stats.tx.bcast.num);
  4871. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4872. peer->stats.tx.bcast.bytes);
  4873. DP_PRINT_STATS("Packets Failed = %d",
  4874. peer->stats.tx.tx_failed);
  4875. DP_PRINT_STATS("Packets In OFDMA = %d",
  4876. peer->stats.tx.ofdma);
  4877. DP_PRINT_STATS("Packets In STBC = %d",
  4878. peer->stats.tx.stbc);
  4879. DP_PRINT_STATS("Packets In LDPC = %d",
  4880. peer->stats.tx.ldpc);
  4881. DP_PRINT_STATS("Packet Retries = %d",
  4882. peer->stats.tx.retries);
  4883. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4884. peer->stats.tx.amsdu_cnt);
  4885. DP_PRINT_STATS("Last Packet RSSI = %d",
  4886. peer->stats.tx.last_ack_rssi);
  4887. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4888. peer->stats.tx.dropped.fw_rem);
  4889. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4890. peer->stats.tx.dropped.fw_rem_tx);
  4891. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4892. peer->stats.tx.dropped.fw_rem_notx);
  4893. DP_PRINT_STATS("Dropped : Age Out = %d",
  4894. peer->stats.tx.dropped.age_out);
  4895. DP_PRINT_STATS("NAWDS : ");
  4896. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4897. peer->stats.tx.nawds_mcast_drop);
  4898. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4899. peer->stats.tx.nawds_mcast.num);
  4900. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4901. peer->stats.tx.nawds_mcast.bytes);
  4902. DP_PRINT_STATS("Rate Info:");
  4903. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4904. index = 0;
  4905. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4906. if (!dp_rate_string[pkt_type][mcs].valid)
  4907. continue;
  4908. DP_PRINT_STATS(" %s = %d",
  4909. dp_rate_string[pkt_type][mcs].mcs_type,
  4910. peer->stats.tx.pkt_type[pkt_type].
  4911. mcs_count[mcs]);
  4912. }
  4913. DP_PRINT_STATS("\n");
  4914. }
  4915. DP_PRINT_STATS("SGI = "
  4916. " 0.8us %d"
  4917. " 0.4us %d"
  4918. " 1.6us %d"
  4919. " 3.2us %d",
  4920. peer->stats.tx.sgi_count[0],
  4921. peer->stats.tx.sgi_count[1],
  4922. peer->stats.tx.sgi_count[2],
  4923. peer->stats.tx.sgi_count[3]);
  4924. DP_PRINT_STATS("Excess Retries per AC ");
  4925. DP_PRINT_STATS(" Best effort = %d",
  4926. peer->stats.tx.excess_retries_per_ac[0]);
  4927. DP_PRINT_STATS(" Background= %d",
  4928. peer->stats.tx.excess_retries_per_ac[1]);
  4929. DP_PRINT_STATS(" Video = %d",
  4930. peer->stats.tx.excess_retries_per_ac[2]);
  4931. DP_PRINT_STATS(" Voice = %d",
  4932. peer->stats.tx.excess_retries_per_ac[3]);
  4933. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4934. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4935. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4936. index = 0;
  4937. for (i = 0; i < SS_COUNT; i++) {
  4938. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4939. " %d", peer->stats.tx.nss[i]);
  4940. }
  4941. DP_PRINT_STATS("NSS(1-8) = %s",
  4942. nss);
  4943. DP_PRINT_STATS("Aggregation:");
  4944. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4945. peer->stats.tx.amsdu_cnt);
  4946. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4947. peer->stats.tx.non_amsdu_cnt);
  4948. DP_PRINT_STATS("Node Rx Stats:");
  4949. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4950. peer->stats.rx.to_stack.num);
  4951. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4952. peer->stats.rx.to_stack.bytes);
  4953. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4954. DP_PRINT_STATS("Ring Id = %d", i);
  4955. DP_PRINT_STATS(" Packets Received = %d",
  4956. peer->stats.rx.rcvd_reo[i].num);
  4957. DP_PRINT_STATS(" Bytes Received = %llu",
  4958. peer->stats.rx.rcvd_reo[i].bytes);
  4959. }
  4960. DP_PRINT_STATS("Multicast Packets Received = %d",
  4961. peer->stats.rx.multicast.num);
  4962. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4963. peer->stats.rx.multicast.bytes);
  4964. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4965. peer->stats.rx.bcast.num);
  4966. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4967. peer->stats.rx.bcast.bytes);
  4968. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4969. peer->stats.rx.intra_bss.pkts.num);
  4970. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4971. peer->stats.rx.intra_bss.pkts.bytes);
  4972. DP_PRINT_STATS("Raw Packets Received = %d",
  4973. peer->stats.rx.raw.num);
  4974. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4975. peer->stats.rx.raw.bytes);
  4976. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4977. peer->stats.rx.err.mic_err);
  4978. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4979. peer->stats.rx.err.decrypt_err);
  4980. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4981. peer->stats.rx.non_ampdu_cnt);
  4982. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4983. peer->stats.rx.ampdu_cnt);
  4984. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4985. peer->stats.rx.non_amsdu_cnt);
  4986. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4987. peer->stats.rx.amsdu_cnt);
  4988. DP_PRINT_STATS("NAWDS : ");
  4989. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4990. peer->stats.rx.nawds_mcast_drop);
  4991. DP_PRINT_STATS("SGI ="
  4992. " 0.8us %d"
  4993. " 0.4us %d"
  4994. " 1.6us %d"
  4995. " 3.2us %d",
  4996. peer->stats.rx.sgi_count[0],
  4997. peer->stats.rx.sgi_count[1],
  4998. peer->stats.rx.sgi_count[2],
  4999. peer->stats.rx.sgi_count[3]);
  5000. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5001. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5002. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5003. DP_PRINT_STATS("Reception Type ="
  5004. " SU %d,"
  5005. " MU_MIMO %d,"
  5006. " MU_OFDMA %d,"
  5007. " MU_OFDMA_MIMO %d",
  5008. peer->stats.rx.reception_type[0],
  5009. peer->stats.rx.reception_type[1],
  5010. peer->stats.rx.reception_type[2],
  5011. peer->stats.rx.reception_type[3]);
  5012. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5013. index = 0;
  5014. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5015. if (!dp_rate_string[pkt_type][mcs].valid)
  5016. continue;
  5017. DP_PRINT_STATS(" %s = %d",
  5018. dp_rate_string[pkt_type][mcs].mcs_type,
  5019. peer->stats.rx.pkt_type[pkt_type].
  5020. mcs_count[mcs]);
  5021. }
  5022. DP_PRINT_STATS("\n");
  5023. }
  5024. index = 0;
  5025. for (i = 0; i < SS_COUNT; i++) {
  5026. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5027. " %d", peer->stats.rx.nss[i]);
  5028. }
  5029. DP_PRINT_STATS("NSS(1-8) = %s",
  5030. nss);
  5031. DP_PRINT_STATS("Aggregation:");
  5032. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5033. peer->stats.rx.ampdu_cnt);
  5034. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5035. peer->stats.rx.non_ampdu_cnt);
  5036. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5037. peer->stats.rx.amsdu_cnt);
  5038. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5039. peer->stats.rx.non_amsdu_cnt);
  5040. }
  5041. /**
  5042. * dp_print_host_stats()- Function to print the stats aggregated at host
  5043. * @vdev_handle: DP_VDEV handle
  5044. * @type: host stats type
  5045. *
  5046. * Available Stat types
  5047. * TXRX_CLEAR_STATS : Clear the stats
  5048. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5049. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5050. * TXRX_TX_HOST_STATS: Print Tx Stats
  5051. * TXRX_RX_HOST_STATS: Print Rx Stats
  5052. * TXRX_AST_STATS: Print AST Stats
  5053. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5054. *
  5055. * Return: 0 on success, print error message in case of failure
  5056. */
  5057. static int
  5058. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  5059. {
  5060. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5061. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5062. dp_aggregate_pdev_stats(pdev);
  5063. switch (type) {
  5064. case TXRX_CLEAR_STATS:
  5065. dp_txrx_host_stats_clr(vdev);
  5066. break;
  5067. case TXRX_RX_RATE_STATS:
  5068. dp_print_rx_rates(vdev);
  5069. break;
  5070. case TXRX_TX_RATE_STATS:
  5071. dp_print_tx_rates(vdev);
  5072. break;
  5073. case TXRX_TX_HOST_STATS:
  5074. dp_print_pdev_tx_stats(pdev);
  5075. dp_print_soc_tx_stats(pdev->soc);
  5076. break;
  5077. case TXRX_RX_HOST_STATS:
  5078. dp_print_pdev_rx_stats(pdev);
  5079. dp_print_soc_rx_stats(pdev->soc);
  5080. break;
  5081. case TXRX_AST_STATS:
  5082. dp_print_ast_stats(pdev->soc);
  5083. dp_print_peer_table(vdev);
  5084. break;
  5085. case TXRX_SRNG_PTR_STATS:
  5086. dp_print_ring_stats(pdev);
  5087. break;
  5088. case TXRX_RX_MON_STATS:
  5089. dp_print_pdev_rx_mon_stats(pdev);
  5090. break;
  5091. default:
  5092. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5093. break;
  5094. }
  5095. return 0;
  5096. }
  5097. /*
  5098. * dp_get_host_peer_stats()- function to print peer stats
  5099. * @pdev_handle: DP_PDEV handle
  5100. * @mac_addr: mac address of the peer
  5101. *
  5102. * Return: void
  5103. */
  5104. static void
  5105. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5106. {
  5107. struct dp_peer *peer;
  5108. uint8_t local_id;
  5109. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5110. &local_id);
  5111. if (!peer) {
  5112. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5113. "%s: Invalid peer\n", __func__);
  5114. return;
  5115. }
  5116. dp_print_peer_stats(peer);
  5117. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5118. return;
  5119. }
  5120. /*
  5121. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5122. * @pdev: DP_PDEV handle
  5123. *
  5124. * Return: void
  5125. */
  5126. static void
  5127. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5128. {
  5129. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5130. int mac_id;
  5131. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5132. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5133. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5134. pdev->pdev_id);
  5135. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5136. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5137. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5138. }
  5139. }
  5140. /*
  5141. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5142. * @pdev: DP_PDEV handle
  5143. *
  5144. * Return: void
  5145. */
  5146. static void
  5147. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5148. {
  5149. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5150. int mac_id;
  5151. htt_tlv_filter.mpdu_start = 1;
  5152. htt_tlv_filter.msdu_start = 0;
  5153. htt_tlv_filter.packet = 0;
  5154. htt_tlv_filter.msdu_end = 0;
  5155. htt_tlv_filter.mpdu_end = 0;
  5156. htt_tlv_filter.attention = 0;
  5157. htt_tlv_filter.ppdu_start = 1;
  5158. htt_tlv_filter.ppdu_end = 1;
  5159. htt_tlv_filter.ppdu_end_user_stats = 1;
  5160. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5161. htt_tlv_filter.ppdu_end_status_done = 1;
  5162. htt_tlv_filter.enable_fp = 1;
  5163. htt_tlv_filter.enable_md = 0;
  5164. if (pdev->mcopy_mode) {
  5165. htt_tlv_filter.packet_header = 1;
  5166. htt_tlv_filter.enable_mo = 1;
  5167. }
  5168. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5169. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5170. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5171. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5172. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5173. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5174. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5175. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5176. pdev->pdev_id);
  5177. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5178. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5179. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5180. }
  5181. }
  5182. /*
  5183. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5184. * @pdev_handle: DP_PDEV handle
  5185. * @val: user provided value
  5186. *
  5187. * Return: void
  5188. */
  5189. static void
  5190. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5191. {
  5192. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5193. switch (val) {
  5194. case 0:
  5195. pdev->tx_sniffer_enable = 0;
  5196. pdev->mcopy_mode = 0;
  5197. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  5198. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5199. dp_ppdu_ring_reset(pdev);
  5200. } else if (pdev->enhanced_stats_en) {
  5201. dp_h2t_cfg_stats_msg_send(pdev,
  5202. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5203. }
  5204. break;
  5205. case 1:
  5206. pdev->tx_sniffer_enable = 1;
  5207. pdev->mcopy_mode = 0;
  5208. if (!pdev->pktlog_ppdu_stats)
  5209. dp_h2t_cfg_stats_msg_send(pdev,
  5210. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5211. break;
  5212. case 2:
  5213. pdev->mcopy_mode = 1;
  5214. pdev->tx_sniffer_enable = 0;
  5215. if (!pdev->enhanced_stats_en)
  5216. dp_ppdu_ring_cfg(pdev);
  5217. if (!pdev->pktlog_ppdu_stats)
  5218. dp_h2t_cfg_stats_msg_send(pdev,
  5219. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5220. break;
  5221. default:
  5222. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5223. "Invalid value\n");
  5224. break;
  5225. }
  5226. }
  5227. /*
  5228. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5229. * @pdev_handle: DP_PDEV handle
  5230. *
  5231. * Return: void
  5232. */
  5233. static void
  5234. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5235. {
  5236. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5237. pdev->enhanced_stats_en = 1;
  5238. if (!pdev->mcopy_mode)
  5239. dp_ppdu_ring_cfg(pdev);
  5240. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5241. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5242. }
  5243. /*
  5244. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5245. * @pdev_handle: DP_PDEV handle
  5246. *
  5247. * Return: void
  5248. */
  5249. static void
  5250. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5251. {
  5252. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5253. pdev->enhanced_stats_en = 0;
  5254. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5255. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5256. if (!pdev->mcopy_mode)
  5257. dp_ppdu_ring_reset(pdev);
  5258. }
  5259. /*
  5260. * dp_get_fw_peer_stats()- function to print peer stats
  5261. * @pdev_handle: DP_PDEV handle
  5262. * @mac_addr: mac address of the peer
  5263. * @cap: Type of htt stats requested
  5264. *
  5265. * Currently Supporting only MAC ID based requests Only
  5266. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5267. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5268. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5269. *
  5270. * Return: void
  5271. */
  5272. static void
  5273. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5274. uint32_t cap)
  5275. {
  5276. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5277. int i;
  5278. uint32_t config_param0 = 0;
  5279. uint32_t config_param1 = 0;
  5280. uint32_t config_param2 = 0;
  5281. uint32_t config_param3 = 0;
  5282. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5283. config_param0 |= (1 << (cap + 1));
  5284. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5285. config_param1 |= (1 << i);
  5286. }
  5287. config_param2 |= (mac_addr[0] & 0x000000ff);
  5288. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5289. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5290. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5291. config_param3 |= (mac_addr[4] & 0x000000ff);
  5292. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5293. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5294. config_param0, config_param1, config_param2,
  5295. config_param3, 0, 0, 0);
  5296. }
  5297. /* This struct definition will be removed from here
  5298. * once it get added in FW headers*/
  5299. struct httstats_cmd_req {
  5300. uint32_t config_param0;
  5301. uint32_t config_param1;
  5302. uint32_t config_param2;
  5303. uint32_t config_param3;
  5304. int cookie;
  5305. u_int8_t stats_id;
  5306. };
  5307. /*
  5308. * dp_get_htt_stats: function to process the httstas request
  5309. * @pdev_handle: DP pdev handle
  5310. * @data: pointer to request data
  5311. * @data_len: length for request data
  5312. *
  5313. * return: void
  5314. */
  5315. static void
  5316. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5317. {
  5318. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5319. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5320. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5321. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5322. req->config_param0, req->config_param1,
  5323. req->config_param2, req->config_param3,
  5324. req->cookie, 0, 0);
  5325. }
  5326. /*
  5327. * dp_set_pdev_param: function to set parameters in pdev
  5328. * @pdev_handle: DP pdev handle
  5329. * @param: parameter type to be set
  5330. * @val: value of parameter to be set
  5331. *
  5332. * return: void
  5333. */
  5334. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5335. enum cdp_pdev_param_type param, uint8_t val)
  5336. {
  5337. switch (param) {
  5338. case CDP_CONFIG_DEBUG_SNIFFER:
  5339. dp_config_debug_sniffer(pdev_handle, val);
  5340. break;
  5341. default:
  5342. break;
  5343. }
  5344. }
  5345. /*
  5346. * dp_set_vdev_param: function to set parameters in vdev
  5347. * @param: parameter type to be set
  5348. * @val: value of parameter to be set
  5349. *
  5350. * return: void
  5351. */
  5352. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5353. enum cdp_vdev_param_type param, uint32_t val)
  5354. {
  5355. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5356. switch (param) {
  5357. case CDP_ENABLE_WDS:
  5358. vdev->wds_enabled = val;
  5359. break;
  5360. case CDP_ENABLE_NAWDS:
  5361. vdev->nawds_enabled = val;
  5362. break;
  5363. case CDP_ENABLE_MCAST_EN:
  5364. vdev->mcast_enhancement_en = val;
  5365. break;
  5366. case CDP_ENABLE_PROXYSTA:
  5367. vdev->proxysta_vdev = val;
  5368. break;
  5369. case CDP_UPDATE_TDLS_FLAGS:
  5370. vdev->tdls_link_connected = val;
  5371. break;
  5372. case CDP_CFG_WDS_AGING_TIMER:
  5373. if (val == 0)
  5374. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5375. else if (val != vdev->wds_aging_timer_val)
  5376. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5377. vdev->wds_aging_timer_val = val;
  5378. break;
  5379. case CDP_ENABLE_AP_BRIDGE:
  5380. if (wlan_op_mode_sta != vdev->opmode)
  5381. vdev->ap_bridge_enabled = val;
  5382. else
  5383. vdev->ap_bridge_enabled = false;
  5384. break;
  5385. case CDP_ENABLE_CIPHER:
  5386. vdev->sec_type = val;
  5387. break;
  5388. case CDP_ENABLE_QWRAP_ISOLATION:
  5389. vdev->isolation_vdev = val;
  5390. break;
  5391. default:
  5392. break;
  5393. }
  5394. dp_tx_vdev_update_search_flags(vdev);
  5395. }
  5396. /**
  5397. * dp_peer_set_nawds: set nawds bit in peer
  5398. * @peer_handle: pointer to peer
  5399. * @value: enable/disable nawds
  5400. *
  5401. * return: void
  5402. */
  5403. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5404. {
  5405. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5406. peer->nawds_enabled = value;
  5407. }
  5408. /*
  5409. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5410. * @vdev_handle: DP_VDEV handle
  5411. * @map_id:ID of map that needs to be updated
  5412. *
  5413. * Return: void
  5414. */
  5415. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5416. uint8_t map_id)
  5417. {
  5418. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5419. vdev->dscp_tid_map_id = map_id;
  5420. return;
  5421. }
  5422. /*
  5423. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5424. * @pdev_handle: DP_PDEV handle
  5425. * @buf: to hold pdev_stats
  5426. *
  5427. * Return: int
  5428. */
  5429. static int
  5430. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5431. {
  5432. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5433. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5434. struct cdp_txrx_stats_req req = {0,};
  5435. dp_aggregate_pdev_stats(pdev);
  5436. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5437. req.cookie_val = 1;
  5438. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5439. req.param1, req.param2, req.param3, 0,
  5440. req.cookie_val, 0);
  5441. msleep(DP_MAX_SLEEP_TIME);
  5442. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5443. req.cookie_val = 1;
  5444. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5445. req.param1, req.param2, req.param3, 0,
  5446. req.cookie_val, 0);
  5447. msleep(DP_MAX_SLEEP_TIME);
  5448. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5449. return TXRX_STATS_LEVEL;
  5450. }
  5451. /**
  5452. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5453. * @pdev: DP_PDEV handle
  5454. * @map_id: ID of map that needs to be updated
  5455. * @tos: index value in map
  5456. * @tid: tid value passed by the user
  5457. *
  5458. * Return: void
  5459. */
  5460. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5461. uint8_t map_id, uint8_t tos, uint8_t tid)
  5462. {
  5463. uint8_t dscp;
  5464. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5465. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5466. pdev->dscp_tid_map[map_id][dscp] = tid;
  5467. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5468. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5469. map_id, dscp);
  5470. return;
  5471. }
  5472. /**
  5473. * dp_fw_stats_process(): Process TxRX FW stats request
  5474. * @vdev_handle: DP VDEV handle
  5475. * @req: stats request
  5476. *
  5477. * return: int
  5478. */
  5479. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5480. struct cdp_txrx_stats_req *req)
  5481. {
  5482. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5483. struct dp_pdev *pdev = NULL;
  5484. uint32_t stats = req->stats;
  5485. uint8_t mac_id = req->mac_id;
  5486. if (!vdev) {
  5487. DP_TRACE(NONE, "VDEV not found");
  5488. return 1;
  5489. }
  5490. pdev = vdev->pdev;
  5491. /*
  5492. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5493. * from param0 to param3 according to below rule:
  5494. *
  5495. * PARAM:
  5496. * - config_param0 : start_offset (stats type)
  5497. * - config_param1 : stats bmask from start offset
  5498. * - config_param2 : stats bmask from start offset + 32
  5499. * - config_param3 : stats bmask from start offset + 64
  5500. */
  5501. if (req->stats == CDP_TXRX_STATS_0) {
  5502. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5503. req->param1 = 0xFFFFFFFF;
  5504. req->param2 = 0xFFFFFFFF;
  5505. req->param3 = 0xFFFFFFFF;
  5506. }
  5507. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5508. req->param1, req->param2, req->param3,
  5509. 0, 0, mac_id);
  5510. }
  5511. /**
  5512. * dp_txrx_stats_request - function to map to firmware and host stats
  5513. * @vdev: virtual handle
  5514. * @req: stats request
  5515. *
  5516. * Return: integer
  5517. */
  5518. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5519. struct cdp_txrx_stats_req *req)
  5520. {
  5521. int host_stats;
  5522. int fw_stats;
  5523. enum cdp_stats stats;
  5524. if (!vdev || !req) {
  5525. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5526. "Invalid vdev/req instance");
  5527. return 0;
  5528. }
  5529. stats = req->stats;
  5530. if (stats >= CDP_TXRX_MAX_STATS)
  5531. return 0;
  5532. /*
  5533. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5534. * has to be updated if new FW HTT stats added
  5535. */
  5536. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5537. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5538. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5539. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5541. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5542. stats, fw_stats, host_stats);
  5543. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5544. /* update request with FW stats type */
  5545. req->stats = fw_stats;
  5546. return dp_fw_stats_process(vdev, req);
  5547. }
  5548. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5549. (host_stats <= TXRX_HOST_STATS_MAX))
  5550. return dp_print_host_stats(vdev, host_stats);
  5551. else
  5552. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5553. "Wrong Input for TxRx Stats");
  5554. return 0;
  5555. }
  5556. /*
  5557. * dp_print_napi_stats(): NAPI stats
  5558. * @soc - soc handle
  5559. */
  5560. static void dp_print_napi_stats(struct dp_soc *soc)
  5561. {
  5562. hif_print_napi_stats(soc->hif_handle);
  5563. }
  5564. /*
  5565. * dp_print_per_ring_stats(): Packet count per ring
  5566. * @soc - soc handle
  5567. */
  5568. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5569. {
  5570. uint8_t ring;
  5571. uint16_t core;
  5572. uint64_t total_packets;
  5573. DP_TRACE(FATAL, "Reo packets per ring:");
  5574. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5575. total_packets = 0;
  5576. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5577. for (core = 0; core < NR_CPUS; core++) {
  5578. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5579. core, soc->stats.rx.ring_packets[core][ring]);
  5580. total_packets += soc->stats.rx.ring_packets[core][ring];
  5581. }
  5582. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5583. ring, total_packets);
  5584. }
  5585. }
  5586. /*
  5587. * dp_txrx_path_stats() - Function to display dump stats
  5588. * @soc - soc handle
  5589. *
  5590. * return: none
  5591. */
  5592. static void dp_txrx_path_stats(struct dp_soc *soc)
  5593. {
  5594. uint8_t error_code;
  5595. uint8_t loop_pdev;
  5596. struct dp_pdev *pdev;
  5597. uint8_t i;
  5598. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5599. pdev = soc->pdev_list[loop_pdev];
  5600. dp_aggregate_pdev_stats(pdev);
  5601. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5602. "Tx path Statistics:");
  5603. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5604. pdev->stats.tx_i.rcvd.num,
  5605. pdev->stats.tx_i.rcvd.bytes);
  5606. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5607. pdev->stats.tx_i.processed.num,
  5608. pdev->stats.tx_i.processed.bytes);
  5609. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5610. pdev->stats.tx.tx_success.num,
  5611. pdev->stats.tx.tx_success.bytes);
  5612. DP_TRACE(FATAL, "Dropped in host:");
  5613. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5614. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5615. DP_TRACE(FATAL, "Descriptor not available: %u",
  5616. pdev->stats.tx_i.dropped.desc_na);
  5617. DP_TRACE(FATAL, "Ring full: %u",
  5618. pdev->stats.tx_i.dropped.ring_full);
  5619. DP_TRACE(FATAL, "Enqueue fail: %u",
  5620. pdev->stats.tx_i.dropped.enqueue_fail);
  5621. DP_TRACE(FATAL, "DMA Error: %u",
  5622. pdev->stats.tx_i.dropped.dma_error);
  5623. DP_TRACE(FATAL, "Dropped in hardware:");
  5624. DP_TRACE(FATAL, "total packets dropped: %u",
  5625. pdev->stats.tx.tx_failed);
  5626. DP_TRACE(FATAL, "mpdu age out: %u",
  5627. pdev->stats.tx.dropped.age_out);
  5628. DP_TRACE(FATAL, "firmware removed: %u",
  5629. pdev->stats.tx.dropped.fw_rem);
  5630. DP_TRACE(FATAL, "firmware removed tx: %u",
  5631. pdev->stats.tx.dropped.fw_rem_tx);
  5632. DP_TRACE(FATAL, "firmware removed notx %u",
  5633. pdev->stats.tx.dropped.fw_rem_notx);
  5634. DP_TRACE(FATAL, "peer_invalid: %u",
  5635. pdev->soc->stats.tx.tx_invalid_peer.num);
  5636. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5637. DP_TRACE(FATAL, "Single Packet: %u",
  5638. pdev->stats.tx_comp_histogram.pkts_1);
  5639. DP_TRACE(FATAL, "2-20 Packets: %u",
  5640. pdev->stats.tx_comp_histogram.pkts_2_20);
  5641. DP_TRACE(FATAL, "21-40 Packets: %u",
  5642. pdev->stats.tx_comp_histogram.pkts_21_40);
  5643. DP_TRACE(FATAL, "41-60 Packets: %u",
  5644. pdev->stats.tx_comp_histogram.pkts_41_60);
  5645. DP_TRACE(FATAL, "61-80 Packets: %u",
  5646. pdev->stats.tx_comp_histogram.pkts_61_80);
  5647. DP_TRACE(FATAL, "81-100 Packets: %u",
  5648. pdev->stats.tx_comp_histogram.pkts_81_100);
  5649. DP_TRACE(FATAL, "101-200 Packets: %u",
  5650. pdev->stats.tx_comp_histogram.pkts_101_200);
  5651. DP_TRACE(FATAL, " 201+ Packets: %u",
  5652. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5653. DP_TRACE(FATAL, "Rx path statistics");
  5654. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5655. pdev->stats.rx.to_stack.num,
  5656. pdev->stats.rx.to_stack.bytes);
  5657. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5658. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5659. i, pdev->stats.rx.rcvd_reo[i].num,
  5660. pdev->stats.rx.rcvd_reo[i].bytes);
  5661. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5662. pdev->stats.rx.intra_bss.pkts.num,
  5663. pdev->stats.rx.intra_bss.pkts.bytes);
  5664. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5665. pdev->stats.rx.intra_bss.fail.num,
  5666. pdev->stats.rx.intra_bss.fail.bytes);
  5667. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5668. pdev->stats.rx.raw.num,
  5669. pdev->stats.rx.raw.bytes);
  5670. DP_TRACE(FATAL, "dropped: error %u msdus",
  5671. pdev->stats.rx.err.mic_err);
  5672. DP_TRACE(FATAL, "peer invalid %u",
  5673. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5674. DP_TRACE(FATAL, "Reo Statistics");
  5675. DP_TRACE(FATAL, "rbm error: %u msdus",
  5676. pdev->soc->stats.rx.err.invalid_rbm);
  5677. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5678. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5679. DP_TRACE(FATAL, "Reo errors");
  5680. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5681. error_code++) {
  5682. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5683. error_code,
  5684. pdev->soc->stats.rx.err.reo_error[error_code]);
  5685. }
  5686. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5687. error_code++) {
  5688. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5689. error_code,
  5690. pdev->soc->stats.rx.err
  5691. .rxdma_error[error_code]);
  5692. }
  5693. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5694. DP_TRACE(FATAL, "Single Packet: %u",
  5695. pdev->stats.rx_ind_histogram.pkts_1);
  5696. DP_TRACE(FATAL, "2-20 Packets: %u",
  5697. pdev->stats.rx_ind_histogram.pkts_2_20);
  5698. DP_TRACE(FATAL, "21-40 Packets: %u",
  5699. pdev->stats.rx_ind_histogram.pkts_21_40);
  5700. DP_TRACE(FATAL, "41-60 Packets: %u",
  5701. pdev->stats.rx_ind_histogram.pkts_41_60);
  5702. DP_TRACE(FATAL, "61-80 Packets: %u",
  5703. pdev->stats.rx_ind_histogram.pkts_61_80);
  5704. DP_TRACE(FATAL, "81-100 Packets: %u",
  5705. pdev->stats.rx_ind_histogram.pkts_81_100);
  5706. DP_TRACE(FATAL, "101-200 Packets: %u",
  5707. pdev->stats.rx_ind_histogram.pkts_101_200);
  5708. DP_TRACE(FATAL, " 201+ Packets: %u",
  5709. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5710. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5711. __func__,
  5712. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5713. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5714. pdev->soc->wlan_cfg_ctx->rx_hash,
  5715. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5716. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5717. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5718. __func__,
  5719. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5720. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5721. #endif
  5722. }
  5723. }
  5724. /*
  5725. * dp_txrx_dump_stats() - Dump statistics
  5726. * @value - Statistics option
  5727. */
  5728. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5729. enum qdf_stats_verbosity_level level)
  5730. {
  5731. struct dp_soc *soc =
  5732. (struct dp_soc *)psoc;
  5733. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5734. if (!soc) {
  5735. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5736. "%s: soc is NULL", __func__);
  5737. return QDF_STATUS_E_INVAL;
  5738. }
  5739. switch (value) {
  5740. case CDP_TXRX_PATH_STATS:
  5741. dp_txrx_path_stats(soc);
  5742. break;
  5743. case CDP_RX_RING_STATS:
  5744. dp_print_per_ring_stats(soc);
  5745. break;
  5746. case CDP_TXRX_TSO_STATS:
  5747. /* TODO: NOT IMPLEMENTED */
  5748. break;
  5749. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5750. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5751. break;
  5752. case CDP_DP_NAPI_STATS:
  5753. dp_print_napi_stats(soc);
  5754. break;
  5755. case CDP_TXRX_DESC_STATS:
  5756. /* TODO: NOT IMPLEMENTED */
  5757. break;
  5758. default:
  5759. status = QDF_STATUS_E_INVAL;
  5760. break;
  5761. }
  5762. return status;
  5763. }
  5764. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5765. /**
  5766. * dp_update_flow_control_parameters() - API to store datapath
  5767. * config parameters
  5768. * @soc: soc handle
  5769. * @cfg: ini parameter handle
  5770. *
  5771. * Return: void
  5772. */
  5773. static inline
  5774. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5775. struct cdp_config_params *params)
  5776. {
  5777. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5778. params->tx_flow_stop_queue_threshold;
  5779. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5780. params->tx_flow_start_queue_offset;
  5781. }
  5782. #else
  5783. static inline
  5784. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5785. struct cdp_config_params *params)
  5786. {
  5787. }
  5788. #endif
  5789. /**
  5790. * dp_update_config_parameters() - API to store datapath
  5791. * config parameters
  5792. * @soc: soc handle
  5793. * @cfg: ini parameter handle
  5794. *
  5795. * Return: status
  5796. */
  5797. static
  5798. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5799. struct cdp_config_params *params)
  5800. {
  5801. struct dp_soc *soc = (struct dp_soc *)psoc;
  5802. if (!(soc)) {
  5803. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5804. "%s: Invalid handle", __func__);
  5805. return QDF_STATUS_E_INVAL;
  5806. }
  5807. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5808. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5809. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5810. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5811. params->tcp_udp_checksumoffload;
  5812. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5813. dp_update_flow_control_parameters(soc, params);
  5814. return QDF_STATUS_SUCCESS;
  5815. }
  5816. /**
  5817. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5818. * config parameters
  5819. * @vdev_handle - datapath vdev handle
  5820. * @cfg: ini parameter handle
  5821. *
  5822. * Return: status
  5823. */
  5824. #ifdef WDS_VENDOR_EXTENSION
  5825. void
  5826. dp_txrx_set_wds_rx_policy(
  5827. struct cdp_vdev *vdev_handle,
  5828. u_int32_t val)
  5829. {
  5830. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5831. struct dp_peer *peer;
  5832. if (vdev->opmode == wlan_op_mode_ap) {
  5833. /* for ap, set it on bss_peer */
  5834. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5835. if (peer->bss_peer) {
  5836. peer->wds_ecm.wds_rx_filter = 1;
  5837. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5838. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5839. break;
  5840. }
  5841. }
  5842. } else if (vdev->opmode == wlan_op_mode_sta) {
  5843. peer = TAILQ_FIRST(&vdev->peer_list);
  5844. peer->wds_ecm.wds_rx_filter = 1;
  5845. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5846. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5847. }
  5848. }
  5849. /**
  5850. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5851. *
  5852. * @peer_handle - datapath peer handle
  5853. * @wds_tx_ucast: policy for unicast transmission
  5854. * @wds_tx_mcast: policy for multicast transmission
  5855. *
  5856. * Return: void
  5857. */
  5858. void
  5859. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5860. int wds_tx_ucast, int wds_tx_mcast)
  5861. {
  5862. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5863. if (wds_tx_ucast || wds_tx_mcast) {
  5864. peer->wds_enabled = 1;
  5865. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5866. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5867. } else {
  5868. peer->wds_enabled = 0;
  5869. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5870. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5871. }
  5872. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5873. FL("Policy Update set to :\
  5874. peer->wds_enabled %d\
  5875. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5876. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5877. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5878. peer->wds_ecm.wds_tx_mcast_4addr);
  5879. return;
  5880. }
  5881. #endif
  5882. static struct cdp_wds_ops dp_ops_wds = {
  5883. .vdev_set_wds = dp_vdev_set_wds,
  5884. #ifdef WDS_VENDOR_EXTENSION
  5885. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5886. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5887. #endif
  5888. };
  5889. /*
  5890. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5891. * @soc - datapath soc handle
  5892. * @peer - datapath peer handle
  5893. *
  5894. * Delete the AST entries belonging to a peer
  5895. */
  5896. #ifdef FEATURE_AST
  5897. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5898. struct dp_peer *peer)
  5899. {
  5900. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5901. qdf_spin_lock_bh(&soc->ast_lock);
  5902. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5903. dp_peer_del_ast(soc, ast_entry);
  5904. qdf_spin_unlock_bh(&soc->ast_lock);
  5905. }
  5906. #else
  5907. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5908. struct dp_peer *peer)
  5909. {
  5910. }
  5911. #endif
  5912. /*
  5913. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5914. * @vdev_handle - datapath vdev handle
  5915. * @callback - callback function
  5916. * @ctxt: callback context
  5917. *
  5918. */
  5919. static void
  5920. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5921. ol_txrx_data_tx_cb callback, void *ctxt)
  5922. {
  5923. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5924. vdev->tx_non_std_data_callback.func = callback;
  5925. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5926. }
  5927. /**
  5928. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5929. * @pdev_hdl: datapath pdev handle
  5930. *
  5931. * Return: opaque pointer to dp txrx handle
  5932. */
  5933. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5934. {
  5935. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5936. return pdev->dp_txrx_handle;
  5937. }
  5938. /**
  5939. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5940. * @pdev_hdl: datapath pdev handle
  5941. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5942. *
  5943. * Return: void
  5944. */
  5945. static void
  5946. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5947. {
  5948. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5949. pdev->dp_txrx_handle = dp_txrx_hdl;
  5950. }
  5951. /**
  5952. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  5953. * @soc_handle: datapath soc handle
  5954. *
  5955. * Return: opaque pointer to external dp (non-core DP)
  5956. */
  5957. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  5958. {
  5959. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5960. return soc->external_txrx_handle;
  5961. }
  5962. /**
  5963. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  5964. * @soc_handle: datapath soc handle
  5965. * @txrx_handle: opaque pointer to external dp (non-core DP)
  5966. *
  5967. * Return: void
  5968. */
  5969. static void
  5970. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  5971. {
  5972. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5973. soc->external_txrx_handle = txrx_handle;
  5974. }
  5975. #ifdef FEATURE_AST
  5976. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5977. {
  5978. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5979. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5980. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5981. /*
  5982. * For BSS peer, new peer is not created on alloc_node if the
  5983. * peer with same address already exists , instead refcnt is
  5984. * increased for existing peer. Correspondingly in delete path,
  5985. * only refcnt is decreased; and peer is only deleted , when all
  5986. * references are deleted. So delete_in_progress should not be set
  5987. * for bss_peer, unless only 2 reference remains (peer map reference
  5988. * and peer hash table reference).
  5989. */
  5990. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  5991. return;
  5992. }
  5993. peer->delete_in_progress = true;
  5994. dp_peer_delete_ast_entries(soc, peer);
  5995. }
  5996. #endif
  5997. #ifdef ATH_SUPPORT_NAC_RSSI
  5998. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  5999. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6000. uint8_t chan_num)
  6001. {
  6002. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6003. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6004. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6005. pdev->nac_rssi_filtering = 1;
  6006. /* Store address of NAC (neighbour peer) which will be checked
  6007. * against TA of received packets.
  6008. */
  6009. if (cmd == CDP_NAC_PARAM_ADD) {
  6010. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  6011. client_macaddr, DP_MAC_ADDR_LEN);
  6012. vdev->cdp_nac_rssi_enabled = 1;
  6013. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6014. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  6015. client_macaddr, DP_MAC_ADDR_LEN)) {
  6016. /* delete this peer from the list */
  6017. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  6018. DP_MAC_ADDR_LEN);
  6019. }
  6020. vdev->cdp_nac_rssi_enabled = 0;
  6021. }
  6022. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6023. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6024. (vdev->pdev->osif_pdev, vdev->vdev_id, cmd, bssid);
  6025. return QDF_STATUS_SUCCESS;
  6026. }
  6027. #endif
  6028. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6029. uint32_t max_peers)
  6030. {
  6031. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6032. soc->max_peers = max_peers;
  6033. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6034. if (dp_peer_find_attach(soc))
  6035. return QDF_STATUS_E_FAILURE;
  6036. return QDF_STATUS_SUCCESS;
  6037. }
  6038. static struct cdp_cmn_ops dp_ops_cmn = {
  6039. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6040. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6041. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6042. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6043. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6044. .txrx_peer_create = dp_peer_create_wifi3,
  6045. .txrx_peer_setup = dp_peer_setup_wifi3,
  6046. #ifdef FEATURE_AST
  6047. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6048. #else
  6049. .txrx_peer_teardown = NULL,
  6050. #endif
  6051. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6052. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6053. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6054. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6055. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6056. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6057. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6058. .txrx_peer_delete = dp_peer_delete_wifi3,
  6059. .txrx_vdev_register = dp_vdev_register_wifi3,
  6060. .txrx_soc_detach = dp_soc_detach_wifi3,
  6061. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6062. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6063. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6064. .txrx_ath_getstats = dp_get_device_stats,
  6065. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6066. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6067. .delba_process = dp_delba_process_wifi3,
  6068. .set_addba_response = dp_set_addba_response,
  6069. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6070. .flush_cache_rx_queue = NULL,
  6071. /* TODO: get API's for dscp-tid need to be added*/
  6072. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6073. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6074. .txrx_stats_request = dp_txrx_stats_request,
  6075. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6076. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6077. .txrx_set_nac = dp_set_nac,
  6078. .txrx_get_tx_pending = dp_get_tx_pending,
  6079. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6080. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6081. .display_stats = dp_txrx_dump_stats,
  6082. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6083. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6084. #ifdef DP_INTR_POLL_BASED
  6085. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6086. #else
  6087. .txrx_intr_attach = dp_soc_interrupt_attach,
  6088. #endif
  6089. .txrx_intr_detach = dp_soc_interrupt_detach,
  6090. .set_pn_check = dp_set_pn_check_wifi3,
  6091. .update_config_parameters = dp_update_config_parameters,
  6092. /* TODO: Add other functions */
  6093. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6094. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6095. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6096. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6097. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6098. .tx_send = dp_tx_send,
  6099. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6100. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6101. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6102. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6103. };
  6104. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6105. .txrx_peer_authorize = dp_peer_authorize,
  6106. #ifdef QCA_SUPPORT_SON
  6107. .txrx_set_inact_params = dp_set_inact_params,
  6108. .txrx_start_inact_timer = dp_start_inact_timer,
  6109. .txrx_set_overload = dp_set_overload,
  6110. .txrx_peer_is_inact = dp_peer_is_inact,
  6111. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6112. #endif
  6113. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6114. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6115. #ifdef MESH_MODE_SUPPORT
  6116. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6117. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6118. #endif
  6119. .txrx_set_vdev_param = dp_set_vdev_param,
  6120. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6121. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6122. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6123. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6124. .txrx_update_filter_neighbour_peers =
  6125. dp_update_filter_neighbour_peers,
  6126. .txrx_get_sec_type = dp_get_sec_type,
  6127. /* TODO: Add other functions */
  6128. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6129. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6130. #ifdef WDI_EVENT_ENABLE
  6131. .txrx_get_pldev = dp_get_pldev,
  6132. #endif
  6133. .txrx_set_pdev_param = dp_set_pdev_param,
  6134. #ifdef ATH_SUPPORT_NAC_RSSI
  6135. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6136. #endif
  6137. };
  6138. static struct cdp_me_ops dp_ops_me = {
  6139. #ifdef ATH_SUPPORT_IQUE
  6140. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6141. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6142. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6143. #endif
  6144. };
  6145. static struct cdp_mon_ops dp_ops_mon = {
  6146. .txrx_monitor_set_filter_ucast_data = NULL,
  6147. .txrx_monitor_set_filter_mcast_data = NULL,
  6148. .txrx_monitor_set_filter_non_data = NULL,
  6149. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6150. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6151. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6152. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6153. /* Added support for HK advance filter */
  6154. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6155. };
  6156. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6157. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6158. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6159. .get_htt_stats = dp_get_htt_stats,
  6160. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6161. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6162. .txrx_stats_publish = dp_txrx_stats_publish,
  6163. /* TODO */
  6164. };
  6165. static struct cdp_raw_ops dp_ops_raw = {
  6166. /* TODO */
  6167. };
  6168. #ifdef CONFIG_WIN
  6169. static struct cdp_pflow_ops dp_ops_pflow = {
  6170. /* TODO */
  6171. };
  6172. #endif /* CONFIG_WIN */
  6173. #ifdef FEATURE_RUNTIME_PM
  6174. /**
  6175. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6176. * @opaque_pdev: DP pdev context
  6177. *
  6178. * DP is ready to runtime suspend if there are no pending TX packets.
  6179. *
  6180. * Return: QDF_STATUS
  6181. */
  6182. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6183. {
  6184. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6185. struct dp_soc *soc = pdev->soc;
  6186. /* Call DP TX flow control API to check if there is any
  6187. pending packets */
  6188. if (soc->intr_mode == DP_INTR_POLL)
  6189. qdf_timer_stop(&soc->int_timer);
  6190. return QDF_STATUS_SUCCESS;
  6191. }
  6192. /**
  6193. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6194. * @opaque_pdev: DP pdev context
  6195. *
  6196. * Resume DP for runtime PM.
  6197. *
  6198. * Return: QDF_STATUS
  6199. */
  6200. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6201. {
  6202. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6203. struct dp_soc *soc = pdev->soc;
  6204. void *hal_srng;
  6205. int i;
  6206. if (soc->intr_mode == DP_INTR_POLL)
  6207. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6208. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6209. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6210. if (hal_srng) {
  6211. /* We actually only need to acquire the lock */
  6212. hal_srng_access_start(soc->hal_soc, hal_srng);
  6213. /* Update SRC ring head pointer for HW to send
  6214. all pending packets */
  6215. hal_srng_access_end(soc->hal_soc, hal_srng);
  6216. }
  6217. }
  6218. return QDF_STATUS_SUCCESS;
  6219. }
  6220. #endif /* FEATURE_RUNTIME_PM */
  6221. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6222. {
  6223. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6224. struct dp_soc *soc = pdev->soc;
  6225. if (soc->intr_mode == DP_INTR_POLL)
  6226. qdf_timer_stop(&soc->int_timer);
  6227. return QDF_STATUS_SUCCESS;
  6228. }
  6229. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6230. {
  6231. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6232. struct dp_soc *soc = pdev->soc;
  6233. if (soc->intr_mode == DP_INTR_POLL)
  6234. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6235. return QDF_STATUS_SUCCESS;
  6236. }
  6237. #ifndef CONFIG_WIN
  6238. static struct cdp_misc_ops dp_ops_misc = {
  6239. .tx_non_std = dp_tx_non_std,
  6240. .get_opmode = dp_get_opmode,
  6241. #ifdef FEATURE_RUNTIME_PM
  6242. .runtime_suspend = dp_runtime_suspend,
  6243. .runtime_resume = dp_runtime_resume,
  6244. #endif /* FEATURE_RUNTIME_PM */
  6245. .pkt_log_init = dp_pkt_log_init,
  6246. .pkt_log_con_service = dp_pkt_log_con_service,
  6247. };
  6248. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6249. /* WIFI 3.0 DP implement as required. */
  6250. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6251. .flow_pool_map_handler = dp_tx_flow_pool_map,
  6252. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  6253. .register_pause_cb = dp_txrx_register_pause_cb,
  6254. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6255. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6256. };
  6257. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6258. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6259. };
  6260. #ifdef IPA_OFFLOAD
  6261. static struct cdp_ipa_ops dp_ops_ipa = {
  6262. .ipa_get_resource = dp_ipa_get_resource,
  6263. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6264. .ipa_op_response = dp_ipa_op_response,
  6265. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6266. .ipa_get_stat = dp_ipa_get_stat,
  6267. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6268. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6269. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6270. .ipa_setup = dp_ipa_setup,
  6271. .ipa_cleanup = dp_ipa_cleanup,
  6272. .ipa_setup_iface = dp_ipa_setup_iface,
  6273. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6274. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6275. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6276. .ipa_set_perf_level = dp_ipa_set_perf_level
  6277. };
  6278. #endif
  6279. static struct cdp_bus_ops dp_ops_bus = {
  6280. .bus_suspend = dp_bus_suspend,
  6281. .bus_resume = dp_bus_resume
  6282. };
  6283. static struct cdp_ocb_ops dp_ops_ocb = {
  6284. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6285. };
  6286. static struct cdp_throttle_ops dp_ops_throttle = {
  6287. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6288. };
  6289. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6290. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6291. };
  6292. static struct cdp_cfg_ops dp_ops_cfg = {
  6293. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6294. };
  6295. /*
  6296. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6297. * @dev: physical device instance
  6298. * @peer_mac_addr: peer mac address
  6299. * @local_id: local id for the peer
  6300. * @debug_id: to track enum peer access
  6301. * Return: peer instance pointer
  6302. */
  6303. static inline void *
  6304. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6305. u8 *local_id,
  6306. enum peer_debug_id_type debug_id)
  6307. {
  6308. /*
  6309. * Currently this function does not implement the "get ref"
  6310. * functionality and is mapped to dp_find_peer_by_addr which does not
  6311. * increment the peer ref count. So the peer state is uncertain after
  6312. * calling this API. The functionality needs to be implemented.
  6313. * Accordingly the corresponding release_ref function is NULL.
  6314. */
  6315. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6316. }
  6317. static struct cdp_peer_ops dp_ops_peer = {
  6318. .register_peer = dp_register_peer,
  6319. .clear_peer = dp_clear_peer,
  6320. .find_peer_by_addr = dp_find_peer_by_addr,
  6321. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6322. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6323. .peer_release_ref = NULL,
  6324. .local_peer_id = dp_local_peer_id,
  6325. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6326. .peer_state_update = dp_peer_state_update,
  6327. .get_vdevid = dp_get_vdevid,
  6328. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6329. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6330. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6331. .get_peer_state = dp_get_peer_state,
  6332. .last_assoc_received = dp_get_last_assoc_received,
  6333. .last_disassoc_received = dp_get_last_disassoc_received,
  6334. .last_deauth_received = dp_get_last_deauth_received,
  6335. };
  6336. #endif
  6337. static struct cdp_ops dp_txrx_ops = {
  6338. .cmn_drv_ops = &dp_ops_cmn,
  6339. .ctrl_ops = &dp_ops_ctrl,
  6340. .me_ops = &dp_ops_me,
  6341. .mon_ops = &dp_ops_mon,
  6342. .host_stats_ops = &dp_ops_host_stats,
  6343. .wds_ops = &dp_ops_wds,
  6344. .raw_ops = &dp_ops_raw,
  6345. #ifdef CONFIG_WIN
  6346. .pflow_ops = &dp_ops_pflow,
  6347. #endif /* CONFIG_WIN */
  6348. #ifndef CONFIG_WIN
  6349. .misc_ops = &dp_ops_misc,
  6350. .cfg_ops = &dp_ops_cfg,
  6351. .flowctl_ops = &dp_ops_flowctl,
  6352. .l_flowctl_ops = &dp_ops_l_flowctl,
  6353. #ifdef IPA_OFFLOAD
  6354. .ipa_ops = &dp_ops_ipa,
  6355. #endif
  6356. .bus_ops = &dp_ops_bus,
  6357. .ocb_ops = &dp_ops_ocb,
  6358. .peer_ops = &dp_ops_peer,
  6359. .throttle_ops = &dp_ops_throttle,
  6360. .mob_stats_ops = &dp_ops_mob_stats,
  6361. #endif
  6362. };
  6363. /*
  6364. * dp_soc_set_txrx_ring_map()
  6365. * @dp_soc: DP handler for soc
  6366. *
  6367. * Return: Void
  6368. */
  6369. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6370. {
  6371. uint32_t i;
  6372. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6373. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6374. }
  6375. }
  6376. /*
  6377. * dp_soc_attach_wifi3() - Attach txrx SOC
  6378. * @ctrl_psoc: Opaque SOC handle from control plane
  6379. * @htc_handle: Opaque HTC handle
  6380. * @hif_handle: Opaque HIF handle
  6381. * @qdf_osdev: QDF device
  6382. *
  6383. * Return: DP SOC handle on success, NULL on failure
  6384. */
  6385. /*
  6386. * Local prototype added to temporarily address warning caused by
  6387. * -Wmissing-prototypes. A more correct solution, namely to expose
  6388. * a prototype in an appropriate header file, will come later.
  6389. */
  6390. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6391. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6392. struct ol_if_ops *ol_ops);
  6393. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6394. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6395. struct ol_if_ops *ol_ops)
  6396. {
  6397. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6398. if (!soc) {
  6399. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6400. FL("DP SOC memory allocation failed"));
  6401. goto fail0;
  6402. }
  6403. soc->cdp_soc.ops = &dp_txrx_ops;
  6404. soc->cdp_soc.ol_ops = ol_ops;
  6405. soc->ctrl_psoc = ctrl_psoc;
  6406. soc->osdev = qdf_osdev;
  6407. soc->hif_handle = hif_handle;
  6408. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6409. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6410. soc->hal_soc, qdf_osdev);
  6411. if (!soc->htt_handle) {
  6412. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6413. FL("HTT attach failed"));
  6414. goto fail1;
  6415. }
  6416. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6417. if (!soc->wlan_cfg_ctx) {
  6418. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6419. FL("wlan_cfg_soc_attach failed"));
  6420. goto fail2;
  6421. }
  6422. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6423. soc->cce_disable = false;
  6424. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6425. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6426. CDP_CFG_MAX_PEER_ID);
  6427. if (ret != -EINVAL) {
  6428. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6429. }
  6430. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6431. CDP_CFG_CCE_DISABLE);
  6432. if (ret == 1)
  6433. soc->cce_disable = true;
  6434. }
  6435. qdf_spinlock_create(&soc->peer_ref_mutex);
  6436. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6437. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6438. /* fill the tx/rx cpu ring map*/
  6439. dp_soc_set_txrx_ring_map(soc);
  6440. qdf_spinlock_create(&soc->htt_stats.lock);
  6441. /* initialize work queue for stats processing */
  6442. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6443. /*Initialize inactivity timer for wifison */
  6444. dp_init_inact_timer(soc);
  6445. return (void *)soc;
  6446. fail2:
  6447. htt_soc_detach(soc->htt_handle);
  6448. fail1:
  6449. qdf_mem_free(soc);
  6450. fail0:
  6451. return NULL;
  6452. }
  6453. /*
  6454. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6455. *
  6456. * @soc: handle to DP soc
  6457. * @mac_id: MAC id
  6458. *
  6459. * Return: Return pdev corresponding to MAC
  6460. */
  6461. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6462. {
  6463. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6464. return soc->pdev_list[mac_id];
  6465. /* Typically for MCL as there only 1 PDEV*/
  6466. return soc->pdev_list[0];
  6467. }
  6468. /*
  6469. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6470. * @soc: DP SoC context
  6471. * @max_mac_rings: No of MAC rings
  6472. *
  6473. * Return: None
  6474. */
  6475. static
  6476. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6477. int *max_mac_rings)
  6478. {
  6479. bool dbs_enable = false;
  6480. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6481. dbs_enable = soc->cdp_soc.ol_ops->
  6482. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6483. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6484. }
  6485. /*
  6486. * dp_set_pktlog_wifi3() - attach txrx vdev
  6487. * @pdev: Datapath PDEV handle
  6488. * @event: which event's notifications are being subscribed to
  6489. * @enable: WDI event subscribe or not. (True or False)
  6490. *
  6491. * Return: Success, NULL on failure
  6492. */
  6493. #ifdef WDI_EVENT_ENABLE
  6494. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6495. bool enable)
  6496. {
  6497. struct dp_soc *soc = pdev->soc;
  6498. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6499. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6500. (pdev->wlan_cfg_ctx);
  6501. uint8_t mac_id = 0;
  6502. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6503. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6504. FL("Max_mac_rings %d \n"),
  6505. max_mac_rings);
  6506. if (enable) {
  6507. switch (event) {
  6508. case WDI_EVENT_RX_DESC:
  6509. if (pdev->monitor_vdev) {
  6510. /* Nothing needs to be done if monitor mode is
  6511. * enabled
  6512. */
  6513. return 0;
  6514. }
  6515. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6516. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6517. htt_tlv_filter.mpdu_start = 1;
  6518. htt_tlv_filter.msdu_start = 1;
  6519. htt_tlv_filter.msdu_end = 1;
  6520. htt_tlv_filter.mpdu_end = 1;
  6521. htt_tlv_filter.packet_header = 1;
  6522. htt_tlv_filter.attention = 1;
  6523. htt_tlv_filter.ppdu_start = 1;
  6524. htt_tlv_filter.ppdu_end = 1;
  6525. htt_tlv_filter.ppdu_end_user_stats = 1;
  6526. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6527. htt_tlv_filter.ppdu_end_status_done = 1;
  6528. htt_tlv_filter.enable_fp = 1;
  6529. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6530. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6531. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6532. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6533. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6534. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6535. for (mac_id = 0; mac_id < max_mac_rings;
  6536. mac_id++) {
  6537. int mac_for_pdev =
  6538. dp_get_mac_id_for_pdev(mac_id,
  6539. pdev->pdev_id);
  6540. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6541. mac_for_pdev,
  6542. pdev->rxdma_mon_status_ring[mac_id]
  6543. .hal_srng,
  6544. RXDMA_MONITOR_STATUS,
  6545. RX_BUFFER_SIZE,
  6546. &htt_tlv_filter);
  6547. }
  6548. if (soc->reap_timer_init)
  6549. qdf_timer_mod(&soc->mon_reap_timer,
  6550. DP_INTR_POLL_TIMER_MS);
  6551. }
  6552. break;
  6553. case WDI_EVENT_LITE_RX:
  6554. if (pdev->monitor_vdev) {
  6555. /* Nothing needs to be done if monitor mode is
  6556. * enabled
  6557. */
  6558. return 0;
  6559. }
  6560. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6561. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6562. htt_tlv_filter.ppdu_start = 1;
  6563. htt_tlv_filter.ppdu_end = 1;
  6564. htt_tlv_filter.ppdu_end_user_stats = 1;
  6565. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6566. htt_tlv_filter.ppdu_end_status_done = 1;
  6567. htt_tlv_filter.mpdu_start = 1;
  6568. htt_tlv_filter.enable_fp = 1;
  6569. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6570. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6571. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6572. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6573. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6574. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6575. for (mac_id = 0; mac_id < max_mac_rings;
  6576. mac_id++) {
  6577. int mac_for_pdev =
  6578. dp_get_mac_id_for_pdev(mac_id,
  6579. pdev->pdev_id);
  6580. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6581. mac_for_pdev,
  6582. pdev->rxdma_mon_status_ring[mac_id]
  6583. .hal_srng,
  6584. RXDMA_MONITOR_STATUS,
  6585. RX_BUFFER_SIZE_PKTLOG_LITE,
  6586. &htt_tlv_filter);
  6587. }
  6588. if (soc->reap_timer_init)
  6589. qdf_timer_mod(&soc->mon_reap_timer,
  6590. DP_INTR_POLL_TIMER_MS);
  6591. }
  6592. break;
  6593. case WDI_EVENT_LITE_T2H:
  6594. if (pdev->monitor_vdev) {
  6595. /* Nothing needs to be done if monitor mode is
  6596. * enabled
  6597. */
  6598. return 0;
  6599. }
  6600. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6601. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6602. mac_id, pdev->pdev_id);
  6603. pdev->pktlog_ppdu_stats = true;
  6604. dp_h2t_cfg_stats_msg_send(pdev,
  6605. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6606. mac_for_pdev);
  6607. }
  6608. break;
  6609. default:
  6610. /* Nothing needs to be done for other pktlog types */
  6611. break;
  6612. }
  6613. } else {
  6614. switch (event) {
  6615. case WDI_EVENT_RX_DESC:
  6616. case WDI_EVENT_LITE_RX:
  6617. if (pdev->monitor_vdev) {
  6618. /* Nothing needs to be done if monitor mode is
  6619. * enabled
  6620. */
  6621. return 0;
  6622. }
  6623. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6624. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6625. for (mac_id = 0; mac_id < max_mac_rings;
  6626. mac_id++) {
  6627. int mac_for_pdev =
  6628. dp_get_mac_id_for_pdev(mac_id,
  6629. pdev->pdev_id);
  6630. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6631. mac_for_pdev,
  6632. pdev->rxdma_mon_status_ring[mac_id]
  6633. .hal_srng,
  6634. RXDMA_MONITOR_STATUS,
  6635. RX_BUFFER_SIZE,
  6636. &htt_tlv_filter);
  6637. }
  6638. if (soc->reap_timer_init)
  6639. qdf_timer_stop(&soc->mon_reap_timer);
  6640. }
  6641. break;
  6642. case WDI_EVENT_LITE_T2H:
  6643. if (pdev->monitor_vdev) {
  6644. /* Nothing needs to be done if monitor mode is
  6645. * enabled
  6646. */
  6647. return 0;
  6648. }
  6649. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6650. * passing value 0. Once these macros will define in htt
  6651. * header file will use proper macros
  6652. */
  6653. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6654. int mac_for_pdev =
  6655. dp_get_mac_id_for_pdev(mac_id,
  6656. pdev->pdev_id);
  6657. pdev->pktlog_ppdu_stats = false;
  6658. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6659. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6660. mac_for_pdev);
  6661. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6662. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6663. mac_for_pdev);
  6664. } else if (pdev->enhanced_stats_en) {
  6665. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6666. mac_for_pdev);
  6667. }
  6668. }
  6669. break;
  6670. default:
  6671. /* Nothing needs to be done for other pktlog types */
  6672. break;
  6673. }
  6674. }
  6675. return 0;
  6676. }
  6677. #endif
  6678. #ifdef CONFIG_MCL
  6679. /*
  6680. * dp_service_mon_rings()- timer to reap monitor rings
  6681. * reqd as we are not getting ppdu end interrupts
  6682. * @arg: SoC Handle
  6683. *
  6684. * Return:
  6685. *
  6686. */
  6687. static void dp_service_mon_rings(void *arg)
  6688. {
  6689. struct dp_soc *soc = (struct dp_soc *) arg;
  6690. int ring = 0, work_done, mac_id;
  6691. struct dp_pdev *pdev = NULL;
  6692. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6693. pdev = soc->pdev_list[ring];
  6694. if (pdev == NULL)
  6695. continue;
  6696. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6697. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6698. pdev->pdev_id);
  6699. work_done = dp_mon_process(soc, mac_for_pdev,
  6700. QCA_NAPI_BUDGET);
  6701. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6702. FL("Reaped %d descs from Monitor rings"),
  6703. work_done);
  6704. }
  6705. }
  6706. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6707. }
  6708. #ifndef REMOVE_PKT_LOG
  6709. /**
  6710. * dp_pkt_log_init() - API to initialize packet log
  6711. * @ppdev: physical device handle
  6712. * @scn: HIF context
  6713. *
  6714. * Return: none
  6715. */
  6716. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6717. {
  6718. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6719. if (handle->pkt_log_init) {
  6720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6721. "%s: Packet log not initialized", __func__);
  6722. return;
  6723. }
  6724. pktlog_sethandle(&handle->pl_dev, scn);
  6725. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6726. if (pktlogmod_init(scn)) {
  6727. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6728. "%s: pktlogmod_init failed", __func__);
  6729. handle->pkt_log_init = false;
  6730. } else {
  6731. handle->pkt_log_init = true;
  6732. }
  6733. }
  6734. /**
  6735. * dp_pkt_log_con_service() - connect packet log service
  6736. * @ppdev: physical device handle
  6737. * @scn: device context
  6738. *
  6739. * Return: none
  6740. */
  6741. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6742. {
  6743. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6744. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6745. pktlog_htc_attach();
  6746. }
  6747. /**
  6748. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6749. * @handle: Pdev handle
  6750. *
  6751. * Return: none
  6752. */
  6753. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6754. {
  6755. void *scn = (void *)handle->soc->hif_handle;
  6756. if (!scn) {
  6757. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6758. "%s: Invalid hif(scn) handle", __func__);
  6759. return;
  6760. }
  6761. pktlogmod_exit(scn);
  6762. handle->pkt_log_init = false;
  6763. }
  6764. #endif
  6765. #else
  6766. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6767. #endif