dp_rx_mon_dest.c 35 KB

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  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /**
  33. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  34. * (WBM), following error handling
  35. *
  36. * @dp_pdev: core txrx pdev context
  37. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  38. * Return: QDF_STATUS
  39. */
  40. static QDF_STATUS
  41. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  42. void *buf_addr_info, int mac_id)
  43. {
  44. struct dp_srng *dp_srng;
  45. void *hal_srng;
  46. void *hal_soc;
  47. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  48. void *src_srng_desc;
  49. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  50. hal_soc = dp_pdev->soc->hal_soc;
  51. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  52. hal_srng = dp_srng->hal_srng;
  53. qdf_assert(hal_srng);
  54. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  55. /* TODO */
  56. /*
  57. * Need API to convert from hal_ring pointer to
  58. * Ring Type / Ring Id combo
  59. */
  60. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  61. "%s %d : \
  62. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  63. __func__, __LINE__, hal_srng);
  64. goto done;
  65. }
  66. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  67. if (qdf_likely(src_srng_desc)) {
  68. /* Return link descriptor through WBM ring (SW2WBM)*/
  69. hal_rx_mon_msdu_link_desc_set(hal_soc,
  70. src_srng_desc, buf_addr_info);
  71. status = QDF_STATUS_SUCCESS;
  72. } else {
  73. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  74. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  75. __func__, __LINE__);
  76. }
  77. done:
  78. hal_srng_access_end(hal_soc, hal_srng);
  79. return status;
  80. }
  81. /**
  82. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  83. * multiple nbufs. This function
  84. * is to return data length in
  85. * fragmented buffer
  86. *
  87. * @total_len: pointer to remaining data length.
  88. * @frag_len: pointer to data length in this fragment.
  89. */
  90. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  91. uint32_t *frag_len)
  92. {
  93. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  94. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  95. *total_len -= *frag_len;
  96. } else {
  97. *frag_len = *total_len;
  98. *total_len = 0;
  99. }
  100. }
  101. /**
  102. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  103. * (WBM), following error handling
  104. *
  105. * @soc: core DP main context
  106. * @mac_id: mac id which is one of 3 mac_ids
  107. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  108. * @head_msdu: head of msdu to be popped
  109. * @tail_msdu: tail of msdu to be popped
  110. * @npackets: number of packet to be popped
  111. * @ppdu_id: ppdu id of processing ppdu
  112. * @head: head of descs list to be freed
  113. * @tail: tail of decs list to be freed
  114. * Return: number of msdu in MPDU to be popped
  115. */
  116. static inline uint32_t
  117. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  118. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  119. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  120. union dp_rx_desc_list_elem_t **head,
  121. union dp_rx_desc_list_elem_t **tail)
  122. {
  123. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  124. void *rx_desc_tlv;
  125. void *rx_msdu_link_desc;
  126. qdf_nbuf_t msdu;
  127. qdf_nbuf_t last;
  128. struct hal_rx_msdu_list msdu_list;
  129. uint16_t num_msdus;
  130. uint32_t rx_buf_size, rx_pkt_offset;
  131. struct hal_buf_info buf_info;
  132. void *p_buf_addr_info;
  133. void *p_last_buf_addr_info;
  134. uint32_t rx_bufs_used = 0;
  135. uint32_t msdu_ppdu_id, msdu_cnt, last_ppdu_id;
  136. uint8_t *data;
  137. uint32_t i;
  138. uint32_t total_frag_len = 0, frag_len = 0;
  139. bool is_frag, is_first_msdu;
  140. bool drop_mpdu = false;
  141. msdu = 0;
  142. last_ppdu_id = dp_pdev->ppdu_info.com_info.last_ppdu_id;
  143. last = NULL;
  144. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  145. &p_last_buf_addr_info, &msdu_cnt);
  146. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  147. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  148. uint8_t rxdma_err =
  149. hal_rx_reo_ent_rxdma_error_code_get(
  150. rxdma_dst_ring_desc);
  151. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  152. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  153. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  154. drop_mpdu = true;
  155. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  156. }
  157. }
  158. is_frag = false;
  159. is_first_msdu = true;
  160. do {
  161. rx_msdu_link_desc =
  162. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info,
  163. mac_id);
  164. qdf_assert(rx_msdu_link_desc);
  165. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  166. for (i = 0; i < num_msdus; i++) {
  167. uint32_t l2_hdr_offset;
  168. struct dp_rx_desc *rx_desc =
  169. dp_rx_cookie_2_va_mon_buf(soc,
  170. msdu_list.sw_cookie[i]);
  171. qdf_assert(rx_desc);
  172. msdu = rx_desc->nbuf;
  173. if (rx_desc->unmapped == 0) {
  174. qdf_nbuf_unmap_single(soc->osdev, msdu,
  175. QDF_DMA_FROM_DEVICE);
  176. rx_desc->unmapped = 1;
  177. }
  178. if (drop_mpdu) {
  179. qdf_nbuf_free(msdu);
  180. msdu = NULL;
  181. goto next_msdu;
  182. }
  183. data = qdf_nbuf_data(msdu);
  184. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  185. QDF_TRACE(QDF_MODULE_ID_DP,
  186. QDF_TRACE_LEVEL_DEBUG,
  187. "[%s] i=%d, ppdu_id=%x, "
  188. "last_ppdu_id=%x num_msdus = %u\n",
  189. __func__, i, *ppdu_id,
  190. last_ppdu_id, num_msdus);
  191. if (is_first_msdu) {
  192. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(
  193. rx_desc_tlv);
  194. is_first_msdu = false;
  195. QDF_TRACE(QDF_MODULE_ID_DP,
  196. QDF_TRACE_LEVEL_DEBUG,
  197. "[%s] msdu_ppdu_id=%x\n",
  198. __func__, msdu_ppdu_id);
  199. if (*ppdu_id > msdu_ppdu_id)
  200. QDF_TRACE(QDF_MODULE_ID_DP,
  201. QDF_TRACE_LEVEL_DEBUG,
  202. "[%s][%d] ppdu_id=%d "
  203. "msdu_ppdu_id=%d\n",
  204. __func__, __LINE__, *ppdu_id,
  205. msdu_ppdu_id);
  206. if ((*ppdu_id < msdu_ppdu_id) && (*ppdu_id >
  207. last_ppdu_id)) {
  208. *ppdu_id = msdu_ppdu_id;
  209. return rx_bufs_used;
  210. }
  211. }
  212. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  213. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  214. rx_desc_tlv,
  215. &(dp_pdev->ppdu_info.rx_status));
  216. if (msdu_list.msdu_info[i].msdu_flags &
  217. HAL_MSDU_F_MSDU_CONTINUATION) {
  218. if (!is_frag) {
  219. total_frag_len =
  220. msdu_list.msdu_info[i].msdu_len;
  221. is_frag = true;
  222. }
  223. dp_mon_adjust_frag_len(
  224. &total_frag_len, &frag_len);
  225. } else {
  226. if (is_frag) {
  227. dp_mon_adjust_frag_len(
  228. &total_frag_len, &frag_len);
  229. } else {
  230. frag_len =
  231. msdu_list.msdu_info[i].msdu_len;
  232. }
  233. is_frag = false;
  234. msdu_cnt--;
  235. }
  236. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  237. "%s total_len %u frag_len %u flags %u",
  238. __func__, total_frag_len, frag_len,
  239. msdu_list.msdu_info[i].msdu_flags);
  240. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  241. /*
  242. * HW structures call this L3 header padding
  243. * -- even though this is actually the offset
  244. * from the buffer beginning where the L2
  245. * header begins.
  246. */
  247. l2_hdr_offset =
  248. hal_rx_msdu_end_l3_hdr_padding_get(data);
  249. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  250. + frag_len;
  251. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  252. #if 0
  253. /* Disble it.see packet on msdu done set to 0 */
  254. /*
  255. * Check if DMA completed -- msdu_done is the
  256. * last bit to be written
  257. */
  258. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  259. QDF_TRACE(QDF_MODULE_ID_DP,
  260. QDF_TRACE_LEVEL_ERROR,
  261. "%s:%d: Pkt Desc\n",
  262. __func__, __LINE__);
  263. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  264. QDF_TRACE_LEVEL_ERROR,
  265. rx_desc_tlv, 128);
  266. qdf_assert_always(0);
  267. }
  268. #endif
  269. QDF_TRACE(QDF_MODULE_ID_DP,
  270. QDF_TRACE_LEVEL_DEBUG,
  271. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %lu",
  272. __func__, rx_pkt_offset, l2_hdr_offset,
  273. msdu_list.msdu_info[i].msdu_len,
  274. qdf_nbuf_data(msdu), qdf_nbuf_len(msdu));
  275. if (head_msdu && *head_msdu == NULL) {
  276. *head_msdu = msdu;
  277. } else {
  278. if (last)
  279. qdf_nbuf_set_next(last, msdu);
  280. }
  281. last = msdu;
  282. next_msdu:
  283. rx_bufs_used++;
  284. dp_rx_add_to_free_desc_list(head,
  285. tail, rx_desc);
  286. }
  287. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  288. &p_buf_addr_info);
  289. if (dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info,
  290. mac_id) != QDF_STATUS_SUCCESS)
  291. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  292. "dp_rx_mon_link_desc_return failed\n");
  293. p_last_buf_addr_info = p_buf_addr_info;
  294. } while (buf_info.paddr && msdu_cnt);
  295. if (last)
  296. qdf_nbuf_set_next(last, NULL);
  297. *tail_msdu = msdu;
  298. return rx_bufs_used;
  299. }
  300. static inline
  301. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  302. {
  303. uint8_t *data;
  304. uint32_t rx_pkt_offset, l2_hdr_offset;
  305. data = qdf_nbuf_data(msdu);
  306. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  307. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  308. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  309. }
  310. static inline
  311. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  312. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  313. struct cdp_mon_status *rx_status)
  314. {
  315. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  316. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  317. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  318. is_amsdu, is_first_frag, amsdu_pad;
  319. void *rx_desc;
  320. char *hdr_desc;
  321. unsigned char *dest;
  322. struct ieee80211_frame *wh;
  323. struct ieee80211_qoscntl *qos;
  324. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  325. head_frag_list = NULL;
  326. mpdu_buf = NULL;
  327. /* The nbuf has been pulled just beyond the status and points to the
  328. * payload
  329. */
  330. if (!head_msdu)
  331. goto mpdu_stitch_fail;
  332. msdu_orig = head_msdu;
  333. rx_desc = qdf_nbuf_data(msdu_orig);
  334. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  335. /* It looks like there is some issue on MPDU len err */
  336. /* Need further investigate if drop the packet */
  337. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  338. return NULL;
  339. }
  340. rx_desc = qdf_nbuf_data(last_msdu);
  341. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  342. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  343. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  344. /* Fill out the rx_status from the PPDU start and end fields */
  345. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  346. rx_desc = qdf_nbuf_data(head_msdu);
  347. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  348. /* Easy case - The MSDU status indicates that this is a non-decapped
  349. * packet in RAW mode.
  350. */
  351. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  352. /* Note that this path might suffer from headroom unavailabilty
  353. * - but the RX status is usually enough
  354. */
  355. dp_rx_msdus_set_payload(head_msdu);
  356. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  357. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  358. __func__, __LINE__, head_msdu, head_msdu->next,
  359. last_msdu, last_msdu->next);
  360. mpdu_buf = head_msdu;
  361. prev_buf = mpdu_buf;
  362. frag_list_sum_len = 0;
  363. msdu = qdf_nbuf_next(head_msdu);
  364. is_first_frag = 1;
  365. while (msdu) {
  366. dp_rx_msdus_set_payload(msdu);
  367. if (is_first_frag) {
  368. is_first_frag = 0;
  369. head_frag_list = msdu;
  370. }
  371. frag_list_sum_len += qdf_nbuf_len(msdu);
  372. /* Maintain the linking of the cloned MSDUS */
  373. qdf_nbuf_set_next_ext(prev_buf, msdu);
  374. /* Move to the next */
  375. prev_buf = msdu;
  376. msdu = qdf_nbuf_next(msdu);
  377. }
  378. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  379. /* If there were more fragments to this RAW frame */
  380. if (head_frag_list) {
  381. if (frag_list_sum_len <
  382. sizeof(struct ieee80211_frame_min_one)) {
  383. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  384. return NULL;
  385. }
  386. frag_list_sum_len -= HAL_RX_FCS_LEN;
  387. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  388. frag_list_sum_len);
  389. qdf_nbuf_set_next(mpdu_buf, NULL);
  390. }
  391. goto mpdu_stitch_done;
  392. }
  393. /* Decap mode:
  394. * Calculate the amount of header in decapped packet to knock off based
  395. * on the decap type and the corresponding number of raw bytes to copy
  396. * status header
  397. */
  398. rx_desc = qdf_nbuf_data(head_msdu);
  399. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  400. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  401. "[%s][%d] decap format not raw",
  402. __func__, __LINE__);
  403. /* Base size */
  404. wifi_hdr_len = sizeof(struct ieee80211_frame);
  405. wh = (struct ieee80211_frame *)hdr_desc;
  406. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  407. if (dir == IEEE80211_FC1_DIR_DSTODS)
  408. wifi_hdr_len += 6;
  409. is_amsdu = 0;
  410. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  411. qos = (struct ieee80211_qoscntl *)
  412. (hdr_desc + wifi_hdr_len);
  413. wifi_hdr_len += 2;
  414. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  415. }
  416. /*Calculate security header length based on 'Protected'
  417. * and 'EXT_IV' flag
  418. * */
  419. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  420. char *iv = (char *)wh + wifi_hdr_len;
  421. if (iv[3] & KEY_EXTIV)
  422. sec_hdr_len = 8;
  423. else
  424. sec_hdr_len = 4;
  425. } else {
  426. sec_hdr_len = 0;
  427. }
  428. wifi_hdr_len += sec_hdr_len;
  429. /* MSDU related stuff LLC - AMSDU subframe header etc */
  430. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  431. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  432. /* "Decap" header to remove from MSDU buffer */
  433. decap_hdr_pull_bytes = 14;
  434. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  435. * status of the now decapped first msdu. Leave enough headroom for
  436. * accomodating any radio-tap /prism like PHY header
  437. */
  438. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  439. MAX_MONITOR_HEADER + mpdu_buf_len,
  440. MAX_MONITOR_HEADER, 4, FALSE);
  441. if (!mpdu_buf)
  442. goto mpdu_stitch_done;
  443. /* Copy the MPDU related header and enc headers into the first buffer
  444. * - Note that there can be a 2 byte pad between heaader and enc header
  445. */
  446. prev_buf = mpdu_buf;
  447. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  448. if (!dest)
  449. goto mpdu_stitch_fail;
  450. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  451. hdr_desc += wifi_hdr_len;
  452. #if 0
  453. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  454. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  455. hdr_desc += sec_hdr_len;
  456. #endif
  457. /* The first LLC len is copied into the MPDU buffer */
  458. frag_list_sum_len = 0;
  459. msdu_orig = head_msdu;
  460. is_first_frag = 1;
  461. amsdu_pad = 0;
  462. while (msdu_orig) {
  463. /* TODO: intra AMSDU padding - do we need it ??? */
  464. msdu = msdu_orig;
  465. if (is_first_frag) {
  466. head_frag_list = msdu;
  467. } else {
  468. /* Reload the hdr ptr only on non-first MSDUs */
  469. rx_desc = qdf_nbuf_data(msdu_orig);
  470. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  471. }
  472. /* Copy this buffers MSDU related status into the prev buffer */
  473. if (is_first_frag) {
  474. is_first_frag = 0;
  475. }
  476. dest = qdf_nbuf_put_tail(prev_buf,
  477. msdu_llc_len + amsdu_pad);
  478. if (!dest)
  479. goto mpdu_stitch_fail;
  480. dest += amsdu_pad;
  481. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  482. dp_rx_msdus_set_payload(msdu);
  483. /* Push the MSDU buffer beyond the decap header */
  484. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  485. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  486. + amsdu_pad;
  487. /* Set up intra-AMSDU pad to be added to start of next buffer -
  488. * AMSDU pad is 4 byte pad on AMSDU subframe */
  489. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  490. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  491. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  492. * probably iterate all the frags cloning them along the way and
  493. * and also updating the prev_buf pointer
  494. */
  495. /* Move to the next */
  496. prev_buf = msdu;
  497. msdu_orig = qdf_nbuf_next(msdu_orig);
  498. }
  499. #if 0
  500. /* Add in the trailer section - encryption trailer + FCS */
  501. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  502. frag_list_sum_len += HAL_RX_FCS_LEN;
  503. #endif
  504. frag_list_sum_len -= msdu_llc_len;
  505. /* TODO: Convert this to suitable adf routines */
  506. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  507. frag_list_sum_len);
  508. mpdu_stitch_done:
  509. /* Check if this buffer contains the PPDU end status for TSF */
  510. /* Need revist this code to see where we can get tsf timestamp */
  511. #if 0
  512. /* PPDU end TLV will be retrieved from monitor status ring */
  513. last_mpdu =
  514. (*(((u_int32_t *)&rx_desc->attention)) &
  515. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  516. RX_ATTENTION_0_LAST_MPDU_LSB;
  517. if (last_mpdu)
  518. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  519. #endif
  520. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  521. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  522. __func__, __LINE__,
  523. mpdu_buf, mpdu_buf->len);
  524. return mpdu_buf;
  525. mpdu_stitch_fail:
  526. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  527. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  528. "%s mpdu_stitch_fail mpdu_buf %pK",
  529. __func__, mpdu_buf);
  530. /* Free the head buffer */
  531. qdf_nbuf_free(mpdu_buf);
  532. }
  533. return NULL;
  534. }
  535. /**
  536. * dp_rx_extract_radiotap_info(): Extract and populate information in
  537. * struct mon_rx_status type
  538. * @rx_status: Receive status
  539. * @mon_rx_status: Monitor mode status
  540. *
  541. * Returns: None
  542. */
  543. static inline
  544. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  545. struct mon_rx_status *rx_mon_status)
  546. {
  547. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  548. rx_mon_status->chan_freq = rx_status->rs_freq;
  549. rx_mon_status->chan_num = rx_status->rs_channel;
  550. rx_mon_status->chan_flags = rx_status->rs_flags;
  551. rx_mon_status->rate = rx_status->rs_datarate;
  552. /* TODO: rx_mon_status->ant_signal_db */
  553. /* TODO: rx_mon_status->nr_ant */
  554. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  555. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  556. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  557. /* TODO: rx_mon_status->ldpc */
  558. /* TODO: rx_mon_status->beamformed */
  559. /* TODO: rx_mon_status->vht_flags */
  560. /* TODO: rx_mon_status->vht_flag_values1 */
  561. }
  562. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  563. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  564. {
  565. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  566. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  567. qdf_nbuf_t mon_skb, skb_next;
  568. qdf_nbuf_t mon_mpdu = NULL;
  569. if ((pdev->monitor_vdev == NULL) ||
  570. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  571. goto mon_deliver_fail;
  572. }
  573. /* restitch mon MPDU for delivery via monitor interface */
  574. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  575. tail_msdu, rs);
  576. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  577. pdev->ppdu_info.rx_status.ppdu_id =
  578. pdev->ppdu_info.com_info.ppdu_id;
  579. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  580. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  581. pdev->monitor_vdev->osif_rx_mon(
  582. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  583. } else {
  584. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  585. "[%s][%d] mon_mpdu=%pK pdev->monitor_vdev %pK osif_vdev %pK",
  586. __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  587. pdev->monitor_vdev->osif_vdev);
  588. goto mon_deliver_fail;
  589. }
  590. return QDF_STATUS_SUCCESS;
  591. mon_deliver_fail:
  592. mon_skb = head_msdu;
  593. while (mon_skb) {
  594. skb_next = qdf_nbuf_next(mon_skb);
  595. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  596. "[%s][%d] mon_skb=%pK len %u", __func__,
  597. __LINE__, mon_skb, mon_skb->len);
  598. qdf_nbuf_free(mon_skb);
  599. mon_skb = skb_next;
  600. }
  601. return QDF_STATUS_E_INVAL;
  602. }
  603. /**
  604. * dp_rx_mon_deliver_non_std()
  605. * @soc: core txrx main contex
  606. * @mac_id: MAC ID
  607. *
  608. * This function delivers the radio tap and dummy MSDU
  609. * into user layer application for preamble only PPDU.
  610. *
  611. * Return: QDF_STATUS
  612. */
  613. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  614. uint32_t mac_id)
  615. {
  616. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  617. ol_txrx_rx_mon_fp osif_rx_mon;
  618. qdf_nbuf_t dummy_msdu;
  619. /* Sanity checking */
  620. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  621. goto mon_deliver_non_std_fail;
  622. /* Generate a dummy skb_buff */
  623. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  624. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  625. MAX_MONITOR_HEADER, 4, FALSE);
  626. if (!dummy_msdu)
  627. goto allocate_dummy_msdu_fail;
  628. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  629. qdf_nbuf_set_next(dummy_msdu, NULL);
  630. pdev->ppdu_info.rx_status.ppdu_id =
  631. pdev->ppdu_info.com_info.ppdu_id;
  632. /* Apply the radio header to this dummy skb */
  633. qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  634. dummy_msdu, MAX_MONITOR_HEADER);
  635. /* deliver to the user layer application */
  636. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  637. dummy_msdu, NULL);
  638. /* Clear rx_status*/
  639. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  640. sizeof(pdev->ppdu_info.rx_status));
  641. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  642. return QDF_STATUS_SUCCESS;
  643. allocate_dummy_msdu_fail:
  644. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  645. __func__, __LINE__, dummy_msdu);
  646. mon_deliver_non_std_fail:
  647. return QDF_STATUS_E_INVAL;
  648. }
  649. /**
  650. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  651. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  652. * @soc: core txrx main contex
  653. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  654. * @quota: No. of units (packets) that can be serviced in one shot.
  655. *
  656. * This function implements the core of Rx functionality. This is
  657. * expected to handle only non-error frames.
  658. *
  659. * Return: none
  660. */
  661. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  662. {
  663. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  664. void *hal_soc;
  665. void *rxdma_dst_ring_desc;
  666. void *mon_dst_srng;
  667. union dp_rx_desc_list_elem_t *head = NULL;
  668. union dp_rx_desc_list_elem_t *tail = NULL;
  669. uint32_t ppdu_id;
  670. uint32_t rx_bufs_used;
  671. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  672. struct cdp_pdev_mon_stats *rx_mon_stats;
  673. mon_dst_srng = pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  674. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  675. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  676. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  677. __func__, __LINE__, mon_dst_srng);
  678. return;
  679. }
  680. hal_soc = soc->hal_soc;
  681. qdf_assert(hal_soc);
  682. qdf_spin_lock_bh(&pdev->mon_lock);
  683. if (pdev->monitor_vdev == NULL) {
  684. qdf_spin_unlock(&pdev->mon_lock);
  685. return;
  686. }
  687. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  688. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  689. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  690. __func__, __LINE__, mon_dst_srng);
  691. return;
  692. }
  693. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  694. rx_bufs_used = 0;
  695. rx_mon_stats = &pdev->rx_mon_stats;
  696. while (qdf_likely(rxdma_dst_ring_desc =
  697. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  698. qdf_nbuf_t head_msdu, tail_msdu;
  699. uint32_t npackets;
  700. head_msdu = (qdf_nbuf_t) NULL;
  701. tail_msdu = (qdf_nbuf_t) NULL;
  702. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  703. rxdma_dst_ring_desc,
  704. &head_msdu, &tail_msdu,
  705. &npackets, &ppdu_id,
  706. &head, &tail);
  707. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  708. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  709. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  710. sizeof(pdev->ppdu_info.rx_status));
  711. pdev->ppdu_info.com_info.last_ppdu_id =
  712. pdev->ppdu_info.com_info.ppdu_id;
  713. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  714. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  715. __func__, __LINE__,
  716. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  717. break;
  718. }
  719. if (qdf_likely((head_msdu != NULL) && (tail_msdu != NULL))) {
  720. rx_mon_stats->dest_mpdu_done++;
  721. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  722. }
  723. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  724. mon_dst_srng);
  725. }
  726. hal_srng_access_end(hal_soc, mon_dst_srng);
  727. qdf_spin_unlock_bh(&pdev->mon_lock);
  728. if (rx_bufs_used) {
  729. rx_mon_stats->dest_ppdu_done++;
  730. dp_rx_buffers_replenish(soc, mac_id,
  731. &pdev->rxdma_mon_buf_ring[mac_for_pdev],
  732. &soc->rx_desc_mon[mac_id], rx_bufs_used, &head, &tail);
  733. }
  734. }
  735. #ifndef QCA_WIFI_QCA6390
  736. static QDF_STATUS
  737. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  738. uint8_t pdev_id = pdev->pdev_id;
  739. struct dp_soc *soc = pdev->soc;
  740. union dp_rx_desc_list_elem_t *desc_list = NULL;
  741. union dp_rx_desc_list_elem_t *tail = NULL;
  742. struct dp_srng *rxdma_srng;
  743. uint32_t rxdma_entries;
  744. struct rx_desc_pool *rx_desc_pool;
  745. QDF_STATUS status;
  746. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  747. rxdma_srng = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  748. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  749. soc->hal_soc,
  750. RXDMA_MONITOR_BUF);
  751. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  753. "%s: Mon RX Desc Pool[%d] allocation size=%d"
  754. , __func__, pdev_id, rxdma_entries*3);
  755. status = dp_rx_desc_pool_alloc(soc, mac_id,
  756. rxdma_entries*3, rx_desc_pool);
  757. if (!QDF_IS_STATUS_SUCCESS(status)) {
  758. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  759. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  760. return status;
  761. }
  762. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  763. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  764. "%s: Mon RX Buffers Replenish pdev_id=%d",
  765. __func__, pdev_id);
  766. status = dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  767. rxdma_entries, &desc_list, &tail);
  768. if (!QDF_IS_STATUS_SUCCESS(status)) {
  769. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  770. "%s: dp_rx_buffers_replenish() failed",
  771. __func__);
  772. return status;
  773. }
  774. return QDF_STATUS_SUCCESS;
  775. }
  776. static QDF_STATUS
  777. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  778. {
  779. struct dp_soc *soc = pdev->soc;
  780. struct rx_desc_pool *rx_desc_pool;
  781. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  782. if (rx_desc_pool->pool_size != 0)
  783. dp_rx_desc_pool_free(soc, mac_id, rx_desc_pool);
  784. return QDF_STATUS_SUCCESS;
  785. }
  786. /*
  787. * Allocate and setup link descriptor pool that will be used by HW for
  788. * various link and queue descriptors and managed by WBM
  789. */
  790. static
  791. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  792. {
  793. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  794. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  795. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  796. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  797. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  798. uint32_t total_link_descs, total_mem_size;
  799. uint32_t num_link_desc_banks;
  800. uint32_t last_bank_size = 0;
  801. uint32_t entry_size, num_entries;
  802. void *mon_desc_srng;
  803. uint32_t num_replenish_buf;
  804. struct dp_srng *dp_srng;
  805. int i;
  806. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  807. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  808. soc->hal_soc, RXDMA_MONITOR_DESC);
  809. /* Round up to power of 2 */
  810. total_link_descs = 1;
  811. while (total_link_descs < num_entries)
  812. total_link_descs <<= 1;
  813. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  814. "%s: total_link_descs: %u, link_desc_size: %d\n",
  815. __func__, total_link_descs, link_desc_size);
  816. total_mem_size = total_link_descs * link_desc_size;
  817. total_mem_size += link_desc_align;
  818. if (total_mem_size <= max_alloc_size) {
  819. num_link_desc_banks = 0;
  820. last_bank_size = total_mem_size;
  821. } else {
  822. num_link_desc_banks = (total_mem_size) /
  823. (max_alloc_size - link_desc_align);
  824. last_bank_size = total_mem_size %
  825. (max_alloc_size - link_desc_align);
  826. }
  827. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  828. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  829. max_alloc_size: %d last_bank_size: %d\n",
  830. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  831. last_bank_size);
  832. for (i = 0; i < num_link_desc_banks; i++) {
  833. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  834. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  835. max_alloc_size,
  836. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  837. base_paddr_unaligned));
  838. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  839. base_vaddr_unaligned) {
  840. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  841. "%s: Link desc memory allocation failed\n",
  842. __func__);
  843. goto fail;
  844. }
  845. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  846. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  847. (void *)((unsigned long)
  848. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  849. base_vaddr_unaligned) +
  850. ((unsigned long)
  851. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  852. base_vaddr_unaligned) %
  853. link_desc_align));
  854. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  855. (unsigned long)
  856. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  857. base_paddr_unaligned) +
  858. ((unsigned long)
  859. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  860. (unsigned long)
  861. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  862. base_vaddr_unaligned));
  863. }
  864. if (last_bank_size) {
  865. /* Allocate last bank in case total memory required is not exact
  866. * multiple of max_alloc_size
  867. */
  868. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  869. qdf_mem_alloc_consistent(soc->osdev,
  870. soc->osdev->dev, last_bank_size,
  871. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  872. base_paddr_unaligned));
  873. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  874. base_vaddr_unaligned == NULL) {
  875. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  876. "%s: allocation failed for mon link desc pool\n",
  877. __func__);
  878. goto fail;
  879. }
  880. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  881. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  882. (void *)((unsigned long)
  883. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  884. base_vaddr_unaligned) +
  885. ((unsigned long)
  886. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  887. base_vaddr_unaligned) %
  888. link_desc_align));
  889. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  890. (unsigned long)
  891. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  892. base_paddr_unaligned) +
  893. ((unsigned long)
  894. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  895. (unsigned long)
  896. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  897. base_vaddr_unaligned));
  898. }
  899. /* Allocate and setup link descriptor idle list for HW internal use */
  900. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  901. total_mem_size = entry_size * total_link_descs;
  902. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  903. num_replenish_buf = 0;
  904. if (total_mem_size <= max_alloc_size) {
  905. void *desc;
  906. for (i = 0;
  907. i < MAX_MON_LINK_DESC_BANKS &&
  908. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  909. i++) {
  910. uint32_t num_entries =
  911. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  912. (unsigned long)
  913. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  914. (unsigned long)
  915. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  916. base_vaddr_unaligned)) / link_desc_size;
  917. unsigned long paddr =
  918. (unsigned long)
  919. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  920. unsigned long vaddr =
  921. (unsigned long)
  922. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  923. hal_srng_access_start_unlocked(soc->hal_soc,
  924. mon_desc_srng);
  925. while (num_entries && (desc =
  926. hal_srng_src_get_next(soc->hal_soc,
  927. mon_desc_srng))) {
  928. hal_set_link_desc_addr(desc, i, paddr);
  929. num_entries--;
  930. num_replenish_buf++;
  931. paddr += link_desc_size;
  932. vaddr += link_desc_size;
  933. }
  934. hal_srng_access_end_unlocked(soc->hal_soc,
  935. mon_desc_srng);
  936. }
  937. } else {
  938. qdf_assert(0);
  939. }
  940. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  941. "%s: successfully replenished %d buffer\n",
  942. __func__, num_replenish_buf);
  943. return QDF_STATUS_SUCCESS;
  944. fail:
  945. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  946. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  947. base_vaddr_unaligned) {
  948. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  949. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  950. dp_pdev->link_desc_banks[mac_for_pdev][i].
  951. base_vaddr_unaligned,
  952. dp_pdev->link_desc_banks[mac_for_pdev][i].
  953. base_paddr_unaligned, 0);
  954. dp_pdev->link_desc_banks[mac_for_pdev][i].
  955. base_vaddr_unaligned = NULL;
  956. }
  957. }
  958. return QDF_STATUS_E_FAILURE;
  959. }
  960. /*
  961. * Free link descriptor pool that was setup HW
  962. */
  963. static
  964. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  965. {
  966. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  967. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  968. int i;
  969. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  970. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  971. base_vaddr_unaligned) {
  972. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  973. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  974. dp_pdev->link_desc_banks[mac_for_pdev][i].
  975. base_vaddr_unaligned,
  976. dp_pdev->link_desc_banks[mac_for_pdev][i].
  977. base_paddr_unaligned, 0);
  978. dp_pdev->link_desc_banks[mac_for_pdev][i].
  979. base_vaddr_unaligned = NULL;
  980. }
  981. }
  982. }
  983. /**
  984. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  985. * @pdev: core txrx pdev context
  986. *
  987. * This function will attach a DP RX for monitor mode instance into
  988. * the main device (SOC) context. Will allocate dp rx resource and
  989. * initialize resources.
  990. *
  991. * Return: QDF_STATUS_SUCCESS: success
  992. * QDF_STATUS_E_RESOURCES: Error return
  993. */
  994. QDF_STATUS
  995. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  996. struct dp_soc *soc = pdev->soc;
  997. QDF_STATUS status;
  998. uint8_t pdev_id = pdev->pdev_id;
  999. int mac_id;
  1000. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1001. "%s: pdev attach id=%d\n", __func__, pdev_id);
  1002. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1003. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1004. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1005. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1006. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1007. "%s: dp_rx_pdev_mon_buf_attach() failed\n",
  1008. __func__);
  1009. return status;
  1010. }
  1011. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1012. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1013. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1014. "%s: dp_rx_pdev_mon_status_attach() failed\n",
  1015. __func__);
  1016. return status;
  1017. }
  1018. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1019. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1021. "%s: dp_mon_link_desc_pool_setup() failed\n",
  1022. __func__);
  1023. return status;
  1024. }
  1025. }
  1026. qdf_spinlock_create(&pdev->mon_lock);
  1027. return QDF_STATUS_SUCCESS;
  1028. }
  1029. /**
  1030. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1031. * @pdev: core txrx pdev context
  1032. *
  1033. * This function will detach DP RX for monitor mode from
  1034. * main device context. will free DP Rx resources for
  1035. * monitor mode
  1036. *
  1037. * Return: QDF_STATUS_SUCCESS: success
  1038. * QDF_STATUS_E_RESOURCES: Error return
  1039. */
  1040. QDF_STATUS
  1041. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1042. uint8_t pdev_id = pdev->pdev_id;
  1043. struct dp_soc *soc = pdev->soc;
  1044. int mac_id;
  1045. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1046. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1047. qdf_spinlock_destroy(&pdev->mon_lock);
  1048. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1049. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1050. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1051. }
  1052. return QDF_STATUS_SUCCESS;
  1053. }
  1054. #endif