main.c 107 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #endif
  41. #define CNSS_DUMP_FORMAT_VER 0x11
  42. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  43. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  44. #define CNSS_DUMP_NAME "CNSS_WLAN"
  45. #define CNSS_DUMP_DESC_SIZE 0x1000
  46. #define CNSS_DUMP_SEG_VER 0x1
  47. #define FILE_SYSTEM_READY 1
  48. #define FW_READY_TIMEOUT 20000
  49. #define FW_ASSERT_TIMEOUT 5000
  50. #define CNSS_EVENT_PENDING 2989
  51. #define POWER_RESET_MIN_DELAY_MS 100
  52. #define CNSS_QUIRKS_DEFAULT 0
  53. #ifdef CONFIG_CNSS_EMULATION
  54. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  55. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  56. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  57. #else
  58. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  59. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  60. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  61. #endif
  62. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  63. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  64. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  65. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  66. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  67. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  68. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  69. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  70. enum cnss_cal_db_op {
  71. CNSS_CAL_DB_UPLOAD,
  72. CNSS_CAL_DB_DOWNLOAD,
  73. CNSS_CAL_DB_INVALID_OP,
  74. };
  75. enum cnss_recovery_type {
  76. CNSS_WLAN_RECOVERY = 0x1,
  77. CNSS_PCSS_RECOVERY = 0x2,
  78. };
  79. static struct cnss_plat_data *plat_env;
  80. static bool cnss_allow_driver_loading;
  81. static DECLARE_RWSEM(cnss_pm_sem);
  82. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  83. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  84. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  85. };
  86. static struct cnss_fw_files FW_FILES_DEFAULT = {
  87. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  88. "utfbd.bin", "epping.bin", "evicted.bin"
  89. };
  90. struct cnss_driver_event {
  91. struct list_head list;
  92. enum cnss_driver_event_type type;
  93. bool sync;
  94. struct completion complete;
  95. int ret;
  96. void *data;
  97. };
  98. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  99. struct cnss_plat_data *plat_priv)
  100. {
  101. plat_env = plat_priv;
  102. }
  103. bool cnss_check_driver_loading_allowed(void)
  104. {
  105. return cnss_allow_driver_loading;
  106. }
  107. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  108. {
  109. return plat_env;
  110. }
  111. /**
  112. * cnss_get_mem_seg_count - Get segment count of memory
  113. * @type: memory type
  114. * @seg: segment count
  115. *
  116. * Return: 0 on success, negative value on failure
  117. */
  118. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  119. {
  120. struct cnss_plat_data *plat_priv;
  121. plat_priv = cnss_get_plat_priv(NULL);
  122. if (!plat_priv)
  123. return -ENODEV;
  124. switch (type) {
  125. case CNSS_REMOTE_MEM_TYPE_FW:
  126. *seg = plat_priv->fw_mem_seg_len;
  127. break;
  128. case CNSS_REMOTE_MEM_TYPE_QDSS:
  129. *seg = plat_priv->qdss_mem_seg_len;
  130. break;
  131. default:
  132. return -EINVAL;
  133. }
  134. return 0;
  135. }
  136. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  137. /**
  138. * cnss_get_mem_segment_info - Get memory info of different type
  139. * @type: memory type
  140. * @segment: array to save the segment info
  141. * @seg: segment count
  142. *
  143. * Return: 0 on success, negative value on failure
  144. */
  145. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  146. struct cnss_mem_segment segment[],
  147. u32 segment_count)
  148. {
  149. struct cnss_plat_data *plat_priv;
  150. u32 i;
  151. plat_priv = cnss_get_plat_priv(NULL);
  152. if (!plat_priv)
  153. return -ENODEV;
  154. switch (type) {
  155. case CNSS_REMOTE_MEM_TYPE_FW:
  156. if (segment_count > plat_priv->fw_mem_seg_len)
  157. segment_count = plat_priv->fw_mem_seg_len;
  158. for (i = 0; i < segment_count; i++) {
  159. segment[i].size = plat_priv->fw_mem[i].size;
  160. segment[i].va = plat_priv->fw_mem[i].va;
  161. segment[i].pa = plat_priv->fw_mem[i].pa;
  162. }
  163. break;
  164. case CNSS_REMOTE_MEM_TYPE_QDSS:
  165. if (segment_count > plat_priv->qdss_mem_seg_len)
  166. segment_count = plat_priv->qdss_mem_seg_len;
  167. for (i = 0; i < segment_count; i++) {
  168. segment[i].size = plat_priv->qdss_mem[i].size;
  169. segment[i].va = plat_priv->qdss_mem[i].va;
  170. segment[i].pa = plat_priv->qdss_mem[i].pa;
  171. }
  172. break;
  173. default:
  174. return -EINVAL;
  175. }
  176. return 0;
  177. }
  178. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  179. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  180. enum cnss_feature_v01 feature)
  181. {
  182. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  183. return -EINVAL;
  184. plat_priv->feature_list |= 1 << feature;
  185. return 0;
  186. }
  187. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  188. enum cnss_feature_v01 feature)
  189. {
  190. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  191. return -EINVAL;
  192. plat_priv->feature_list &= ~(1 << feature);
  193. return 0;
  194. }
  195. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  196. u64 *feature_list)
  197. {
  198. if (unlikely(!plat_priv))
  199. return -EINVAL;
  200. *feature_list = plat_priv->feature_list;
  201. return 0;
  202. }
  203. static int cnss_pm_notify(struct notifier_block *b,
  204. unsigned long event, void *p)
  205. {
  206. switch (event) {
  207. case PM_SUSPEND_PREPARE:
  208. down_write(&cnss_pm_sem);
  209. break;
  210. case PM_POST_SUSPEND:
  211. up_write(&cnss_pm_sem);
  212. break;
  213. }
  214. return NOTIFY_DONE;
  215. }
  216. static struct notifier_block cnss_pm_notifier = {
  217. .notifier_call = cnss_pm_notify,
  218. };
  219. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  220. {
  221. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  222. return;
  223. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  224. plat_priv->driver_state,
  225. atomic_read(&plat_priv->pm_count));
  226. pm_stay_awake(&plat_priv->plat_dev->dev);
  227. }
  228. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  229. {
  230. int r = atomic_dec_return(&plat_priv->pm_count);
  231. WARN_ON(r < 0);
  232. if (r != 0)
  233. return;
  234. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  235. plat_priv->driver_state,
  236. atomic_read(&plat_priv->pm_count));
  237. pm_relax(&plat_priv->plat_dev->dev);
  238. }
  239. void cnss_lock_pm_sem(struct device *dev)
  240. {
  241. down_read(&cnss_pm_sem);
  242. }
  243. EXPORT_SYMBOL(cnss_lock_pm_sem);
  244. void cnss_release_pm_sem(struct device *dev)
  245. {
  246. up_read(&cnss_pm_sem);
  247. }
  248. EXPORT_SYMBOL(cnss_release_pm_sem);
  249. int cnss_get_fw_files_for_target(struct device *dev,
  250. struct cnss_fw_files *pfw_files,
  251. u32 target_type, u32 target_version)
  252. {
  253. if (!pfw_files)
  254. return -ENODEV;
  255. switch (target_version) {
  256. case QCA6174_REV3_VERSION:
  257. case QCA6174_REV3_2_VERSION:
  258. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  259. break;
  260. default:
  261. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  262. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  263. target_type, target_version);
  264. break;
  265. }
  266. return 0;
  267. }
  268. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  269. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  270. {
  271. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  272. if (!plat_priv)
  273. return -ENODEV;
  274. if (!cap)
  275. return -EINVAL;
  276. *cap = plat_priv->cap;
  277. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  278. return 0;
  279. }
  280. EXPORT_SYMBOL(cnss_get_platform_cap);
  281. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  282. {
  283. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  284. if (!plat_priv)
  285. return;
  286. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  287. }
  288. EXPORT_SYMBOL(cnss_request_pm_qos);
  289. void cnss_remove_pm_qos(struct device *dev)
  290. {
  291. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  292. if (!plat_priv)
  293. return;
  294. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  295. }
  296. EXPORT_SYMBOL(cnss_remove_pm_qos);
  297. int cnss_wlan_enable(struct device *dev,
  298. struct cnss_wlan_enable_cfg *config,
  299. enum cnss_driver_mode mode,
  300. const char *host_version)
  301. {
  302. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  303. int ret = 0;
  304. if (!plat_priv)
  305. return -ENODEV;
  306. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  307. return 0;
  308. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  309. return 0;
  310. if (!config || !host_version) {
  311. cnss_pr_err("Invalid config or host_version pointer\n");
  312. return -EINVAL;
  313. }
  314. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  315. mode, config, host_version);
  316. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  317. goto skip_cfg;
  318. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  319. if (ret)
  320. goto out;
  321. skip_cfg:
  322. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  323. out:
  324. return ret;
  325. }
  326. EXPORT_SYMBOL(cnss_wlan_enable);
  327. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  328. {
  329. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  330. int ret = 0;
  331. if (!plat_priv)
  332. return -ENODEV;
  333. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  334. return 0;
  335. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  336. return 0;
  337. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  338. cnss_bus_free_qdss_mem(plat_priv);
  339. return ret;
  340. }
  341. EXPORT_SYMBOL(cnss_wlan_disable);
  342. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  343. u32 data_len, u8 *output)
  344. {
  345. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  346. int ret = 0;
  347. if (!plat_priv) {
  348. cnss_pr_err("plat_priv is NULL!\n");
  349. return -EINVAL;
  350. }
  351. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  352. return 0;
  353. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  354. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  355. plat_priv->driver_state);
  356. ret = -EINVAL;
  357. goto out;
  358. }
  359. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  360. data_len, output);
  361. out:
  362. return ret;
  363. }
  364. EXPORT_SYMBOL(cnss_athdiag_read);
  365. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  366. u32 data_len, u8 *input)
  367. {
  368. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  369. int ret = 0;
  370. if (!plat_priv) {
  371. cnss_pr_err("plat_priv is NULL!\n");
  372. return -EINVAL;
  373. }
  374. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  375. return 0;
  376. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  377. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  378. plat_priv->driver_state);
  379. ret = -EINVAL;
  380. goto out;
  381. }
  382. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  383. data_len, input);
  384. out:
  385. return ret;
  386. }
  387. EXPORT_SYMBOL(cnss_athdiag_write);
  388. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  389. {
  390. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  391. if (!plat_priv)
  392. return -ENODEV;
  393. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  394. return 0;
  395. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  396. }
  397. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  398. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  399. {
  400. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  401. if (!plat_priv)
  402. return -EINVAL;
  403. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  404. !plat_priv->fw_pcie_gen_switch)
  405. return -EOPNOTSUPP;
  406. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  407. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  408. return -EINVAL;
  409. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  410. plat_priv->pcie_gen_speed = pcie_gen_speed;
  411. return 0;
  412. }
  413. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  414. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  415. {
  416. int ret = 0;
  417. if (!plat_priv)
  418. return -ENODEV;
  419. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  420. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  421. if (ret)
  422. goto out;
  423. if (plat_priv->hds_enabled)
  424. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  425. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  426. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  427. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  428. plat_priv->ctrl_params.bdf_type);
  429. if (ret)
  430. goto out;
  431. ret = cnss_bus_load_m3(plat_priv);
  432. if (ret)
  433. goto out;
  434. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  435. if (ret)
  436. goto out;
  437. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  438. return 0;
  439. out:
  440. return ret;
  441. }
  442. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  443. {
  444. int ret = 0;
  445. if (!plat_priv->antenna) {
  446. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  447. if (ret)
  448. goto out;
  449. }
  450. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  451. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  452. if (ret)
  453. goto out;
  454. }
  455. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  456. if (ret)
  457. goto out;
  458. return 0;
  459. out:
  460. return ret;
  461. }
  462. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  463. {
  464. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  465. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  466. }
  467. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  468. {
  469. u32 i;
  470. int ret = 0;
  471. struct cnss_plat_ipc_daemon_config *cfg;
  472. ret = cnss_qmi_get_dms_mac(plat_priv);
  473. if (ret == 0 && plat_priv->dms.mac_valid)
  474. goto qmi_send;
  475. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  476. * Thus assert on failure to get MAC from DMS even after retries
  477. */
  478. if (plat_priv->use_nv_mac) {
  479. /* Check if Daemon says platform support DMS MAC provisioning */
  480. cfg = cnss_plat_ipc_qmi_daemon_config();
  481. if (cfg) {
  482. if (!cfg->dms_mac_addr_supported) {
  483. cnss_pr_err("DMS MAC address not supported\n");
  484. CNSS_ASSERT(0);
  485. return -EINVAL;
  486. }
  487. }
  488. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  489. if (plat_priv->dms.mac_valid)
  490. break;
  491. ret = cnss_qmi_get_dms_mac(plat_priv);
  492. if (ret == 0)
  493. break;
  494. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  495. }
  496. if (!plat_priv->dms.mac_valid) {
  497. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  498. CNSS_ASSERT(0);
  499. return -EINVAL;
  500. }
  501. }
  502. qmi_send:
  503. if (plat_priv->dms.mac_valid)
  504. ret =
  505. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  506. ARRAY_SIZE(plat_priv->dms.mac));
  507. return ret;
  508. }
  509. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  510. enum cnss_cal_db_op op, u32 *size)
  511. {
  512. int ret = 0;
  513. u32 timeout = cnss_get_timeout(plat_priv,
  514. CNSS_TIMEOUT_DAEMON_CONNECTION);
  515. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  516. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  517. if (op >= CNSS_CAL_DB_INVALID_OP)
  518. return -EINVAL;
  519. if (!plat_priv->cbc_file_download) {
  520. cnss_pr_info("CAL DB file not required as per BDF\n");
  521. return 0;
  522. }
  523. if (*size == 0) {
  524. cnss_pr_err("Invalid cal file size\n");
  525. return -EINVAL;
  526. }
  527. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  528. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  529. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  530. msecs_to_jiffies(timeout));
  531. if (!ret) {
  532. cnss_pr_err("Daemon not yet connected\n");
  533. CNSS_ASSERT(0);
  534. return ret;
  535. }
  536. }
  537. if (!plat_priv->cal_mem->va) {
  538. cnss_pr_err("CAL DB Memory not setup for FW\n");
  539. return -EINVAL;
  540. }
  541. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  542. if (op == CNSS_CAL_DB_DOWNLOAD) {
  543. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  544. ret = cnss_plat_ipc_qmi_file_download(client_id,
  545. CNSS_CAL_DB_FILE_NAME,
  546. plat_priv->cal_mem->va,
  547. size);
  548. } else {
  549. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  550. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  551. CNSS_CAL_DB_FILE_NAME,
  552. plat_priv->cal_mem->va,
  553. *size);
  554. }
  555. if (ret)
  556. cnss_pr_err("Cal DB file %s %s failure\n",
  557. CNSS_CAL_DB_FILE_NAME,
  558. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  559. else
  560. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  561. CNSS_CAL_DB_FILE_NAME,
  562. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  563. *size);
  564. return ret;
  565. }
  566. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  567. {
  568. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  569. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  570. return -EINVAL;
  571. }
  572. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  573. &plat_priv->cal_file_size);
  574. }
  575. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  576. u32 *cal_file_size)
  577. {
  578. /* To download pass the total size of cal DB mem allocated.
  579. * After cal file is download to mem, its size is updated in
  580. * return pointer
  581. */
  582. *cal_file_size = plat_priv->cal_mem->size;
  583. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  584. cal_file_size);
  585. }
  586. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  587. {
  588. int ret = 0;
  589. u32 cal_file_size = 0;
  590. if (!plat_priv)
  591. return -ENODEV;
  592. cnss_pr_dbg("Processing FW Init Done..\n");
  593. del_timer(&plat_priv->fw_boot_timer);
  594. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  595. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  596. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  597. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  598. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  599. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  600. }
  601. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  602. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  603. CNSS_WALTEST);
  604. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  605. cnss_request_antenna_sharing(plat_priv);
  606. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  607. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  608. plat_priv->cal_time = jiffies;
  609. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  610. CNSS_CALIBRATION);
  611. } else {
  612. ret = cnss_setup_dms_mac(plat_priv);
  613. ret = cnss_bus_call_driver_probe(plat_priv);
  614. }
  615. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  616. goto out;
  617. else if (ret)
  618. goto shutdown;
  619. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  620. return 0;
  621. shutdown:
  622. cnss_bus_dev_shutdown(plat_priv);
  623. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  624. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  625. out:
  626. return ret;
  627. }
  628. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  629. {
  630. switch (type) {
  631. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  632. return "SERVER_ARRIVE";
  633. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  634. return "SERVER_EXIT";
  635. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  636. return "REQUEST_MEM";
  637. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  638. return "FW_MEM_READY";
  639. case CNSS_DRIVER_EVENT_FW_READY:
  640. return "FW_READY";
  641. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  642. return "COLD_BOOT_CAL_START";
  643. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  644. return "COLD_BOOT_CAL_DONE";
  645. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  646. return "REGISTER_DRIVER";
  647. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  648. return "UNREGISTER_DRIVER";
  649. case CNSS_DRIVER_EVENT_RECOVERY:
  650. return "RECOVERY";
  651. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  652. return "FORCE_FW_ASSERT";
  653. case CNSS_DRIVER_EVENT_POWER_UP:
  654. return "POWER_UP";
  655. case CNSS_DRIVER_EVENT_POWER_DOWN:
  656. return "POWER_DOWN";
  657. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  658. return "IDLE_RESTART";
  659. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  660. return "IDLE_SHUTDOWN";
  661. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  662. return "IMS_WFC_CALL_IND";
  663. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  664. return "WLFW_TWC_CFG_IND";
  665. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  666. return "QDSS_TRACE_REQ_MEM";
  667. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  668. return "FW_MEM_FILE_SAVE";
  669. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  670. return "QDSS_TRACE_FREE";
  671. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  672. return "QDSS_TRACE_REQ_DATA";
  673. case CNSS_DRIVER_EVENT_MAX:
  674. return "EVENT_MAX";
  675. }
  676. return "UNKNOWN";
  677. };
  678. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  679. enum cnss_driver_event_type type,
  680. u32 flags, void *data)
  681. {
  682. struct cnss_driver_event *event;
  683. unsigned long irq_flags;
  684. int gfp = GFP_KERNEL;
  685. int ret = 0;
  686. if (!plat_priv)
  687. return -ENODEV;
  688. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  689. cnss_driver_event_to_str(type), type,
  690. flags ? "-sync" : "", plat_priv->driver_state, flags);
  691. if (type >= CNSS_DRIVER_EVENT_MAX) {
  692. cnss_pr_err("Invalid Event type: %d, can't post", type);
  693. return -EINVAL;
  694. }
  695. if (in_interrupt() || irqs_disabled())
  696. gfp = GFP_ATOMIC;
  697. event = kzalloc(sizeof(*event), gfp);
  698. if (!event)
  699. return -ENOMEM;
  700. cnss_pm_stay_awake(plat_priv);
  701. event->type = type;
  702. event->data = data;
  703. init_completion(&event->complete);
  704. event->ret = CNSS_EVENT_PENDING;
  705. event->sync = !!(flags & CNSS_EVENT_SYNC);
  706. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  707. list_add_tail(&event->list, &plat_priv->event_list);
  708. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  709. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  710. if (!(flags & CNSS_EVENT_SYNC))
  711. goto out;
  712. if (flags & CNSS_EVENT_UNKILLABLE)
  713. wait_for_completion(&event->complete);
  714. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  715. ret = wait_for_completion_killable(&event->complete);
  716. else
  717. ret = wait_for_completion_interruptible(&event->complete);
  718. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  719. cnss_driver_event_to_str(type), type,
  720. plat_priv->driver_state, ret, event->ret);
  721. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  722. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  723. event->sync = false;
  724. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  725. ret = -EINTR;
  726. goto out;
  727. }
  728. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  729. ret = event->ret;
  730. kfree(event);
  731. out:
  732. cnss_pm_relax(plat_priv);
  733. return ret;
  734. }
  735. /**
  736. * cnss_get_timeout - Get timeout for corresponding type.
  737. * @plat_priv: Pointer to platform driver context.
  738. * @cnss_timeout_type: Timeout type.
  739. *
  740. * Return: Timeout in milliseconds.
  741. */
  742. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  743. enum cnss_timeout_type timeout_type)
  744. {
  745. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  746. switch (timeout_type) {
  747. case CNSS_TIMEOUT_QMI:
  748. return qmi_timeout;
  749. case CNSS_TIMEOUT_POWER_UP:
  750. return (qmi_timeout << 2);
  751. case CNSS_TIMEOUT_IDLE_RESTART:
  752. /* In idle restart power up sequence, we have fw_boot_timer to
  753. * handle FW initialization failure.
  754. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  755. * account for FW dump collection and FW re-initialization on
  756. * retry.
  757. */
  758. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  759. case CNSS_TIMEOUT_CALIBRATION:
  760. /* Similar to mission mode, in CBC if FW init fails
  761. * fw recovery is tried. Thus return 2x the CBC timeout.
  762. */
  763. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  764. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  765. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  766. case CNSS_TIMEOUT_RDDM:
  767. return CNSS_RDDM_TIMEOUT_MS;
  768. case CNSS_TIMEOUT_RECOVERY:
  769. return RECOVERY_TIMEOUT;
  770. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  771. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  772. default:
  773. return qmi_timeout;
  774. }
  775. }
  776. unsigned int cnss_get_boot_timeout(struct device *dev)
  777. {
  778. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  779. if (!plat_priv) {
  780. cnss_pr_err("plat_priv is NULL\n");
  781. return 0;
  782. }
  783. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  784. }
  785. EXPORT_SYMBOL(cnss_get_boot_timeout);
  786. int cnss_power_up(struct device *dev)
  787. {
  788. int ret = 0;
  789. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  790. unsigned int timeout;
  791. if (!plat_priv) {
  792. cnss_pr_err("plat_priv is NULL\n");
  793. return -ENODEV;
  794. }
  795. cnss_pr_dbg("Powering up device\n");
  796. ret = cnss_driver_event_post(plat_priv,
  797. CNSS_DRIVER_EVENT_POWER_UP,
  798. CNSS_EVENT_SYNC, NULL);
  799. if (ret)
  800. goto out;
  801. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  802. goto out;
  803. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  804. reinit_completion(&plat_priv->power_up_complete);
  805. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  806. msecs_to_jiffies(timeout));
  807. if (!ret) {
  808. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  809. timeout);
  810. ret = -EAGAIN;
  811. goto out;
  812. }
  813. return 0;
  814. out:
  815. return ret;
  816. }
  817. EXPORT_SYMBOL(cnss_power_up);
  818. int cnss_power_down(struct device *dev)
  819. {
  820. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  821. if (!plat_priv) {
  822. cnss_pr_err("plat_priv is NULL\n");
  823. return -ENODEV;
  824. }
  825. cnss_pr_dbg("Powering down device\n");
  826. return cnss_driver_event_post(plat_priv,
  827. CNSS_DRIVER_EVENT_POWER_DOWN,
  828. CNSS_EVENT_SYNC, NULL);
  829. }
  830. EXPORT_SYMBOL(cnss_power_down);
  831. int cnss_idle_restart(struct device *dev)
  832. {
  833. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  834. unsigned int timeout;
  835. int ret = 0;
  836. if (!plat_priv) {
  837. cnss_pr_err("plat_priv is NULL\n");
  838. return -ENODEV;
  839. }
  840. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  841. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  842. return -EBUSY;
  843. }
  844. cnss_pr_dbg("Doing idle restart\n");
  845. reinit_completion(&plat_priv->power_up_complete);
  846. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  847. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  848. ret = -EINVAL;
  849. goto out;
  850. }
  851. ret = cnss_driver_event_post(plat_priv,
  852. CNSS_DRIVER_EVENT_IDLE_RESTART,
  853. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  854. if (ret)
  855. goto out;
  856. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  857. ret = cnss_bus_call_driver_probe(plat_priv);
  858. goto out;
  859. }
  860. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  861. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  862. msecs_to_jiffies(timeout));
  863. if (plat_priv->power_up_error) {
  864. ret = plat_priv->power_up_error;
  865. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  866. cnss_pr_dbg("Power up error:%d, exiting\n",
  867. plat_priv->power_up_error);
  868. goto out;
  869. }
  870. if (!ret) {
  871. /* This exception occurs after attempting retry of FW recovery.
  872. * Thus we can safely power off the device.
  873. */
  874. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  875. timeout);
  876. ret = -ETIMEDOUT;
  877. cnss_power_down(dev);
  878. CNSS_ASSERT(0);
  879. goto out;
  880. }
  881. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  882. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  883. del_timer(&plat_priv->fw_boot_timer);
  884. ret = -EINVAL;
  885. goto out;
  886. }
  887. mutex_unlock(&plat_priv->driver_ops_lock);
  888. return 0;
  889. out:
  890. mutex_unlock(&plat_priv->driver_ops_lock);
  891. return ret;
  892. }
  893. EXPORT_SYMBOL(cnss_idle_restart);
  894. int cnss_idle_shutdown(struct device *dev)
  895. {
  896. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  897. unsigned int timeout;
  898. int ret;
  899. if (!plat_priv) {
  900. cnss_pr_err("plat_priv is NULL\n");
  901. return -ENODEV;
  902. }
  903. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  904. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  905. return -EAGAIN;
  906. }
  907. cnss_pr_dbg("Doing idle shutdown\n");
  908. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  909. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  910. goto skip_wait;
  911. reinit_completion(&plat_priv->recovery_complete);
  912. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  913. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  914. msecs_to_jiffies(timeout));
  915. if (!ret) {
  916. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  917. timeout);
  918. CNSS_ASSERT(0);
  919. }
  920. skip_wait:
  921. return cnss_driver_event_post(plat_priv,
  922. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  923. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  924. }
  925. EXPORT_SYMBOL(cnss_idle_shutdown);
  926. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  927. {
  928. int ret = 0;
  929. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  930. if (ret) {
  931. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  932. goto out;
  933. }
  934. ret = cnss_get_clk(plat_priv);
  935. if (ret) {
  936. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  937. goto put_vreg;
  938. }
  939. ret = cnss_get_pinctrl(plat_priv);
  940. if (ret) {
  941. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  942. goto put_clk;
  943. }
  944. return 0;
  945. put_clk:
  946. cnss_put_clk(plat_priv);
  947. put_vreg:
  948. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  949. out:
  950. return ret;
  951. }
  952. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  953. {
  954. cnss_put_clk(plat_priv);
  955. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  956. }
  957. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  958. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  959. unsigned long code,
  960. void *ss_handle)
  961. {
  962. struct cnss_plat_data *plat_priv =
  963. container_of(nb, struct cnss_plat_data, modem_nb);
  964. struct cnss_esoc_info *esoc_info;
  965. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  966. if (!plat_priv)
  967. return NOTIFY_DONE;
  968. esoc_info = &plat_priv->esoc_info;
  969. if (code == SUBSYS_AFTER_POWERUP)
  970. esoc_info->modem_current_status = 1;
  971. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  972. esoc_info->modem_current_status = 0;
  973. else
  974. return NOTIFY_DONE;
  975. if (!cnss_bus_call_driver_modem_status(plat_priv,
  976. esoc_info->modem_current_status))
  977. return NOTIFY_DONE;
  978. return NOTIFY_OK;
  979. }
  980. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  981. {
  982. int ret = 0;
  983. struct device *dev;
  984. struct cnss_esoc_info *esoc_info;
  985. struct esoc_desc *esoc_desc;
  986. const char *client_desc;
  987. dev = &plat_priv->plat_dev->dev;
  988. esoc_info = &plat_priv->esoc_info;
  989. esoc_info->notify_modem_status =
  990. of_property_read_bool(dev->of_node,
  991. "qcom,notify-modem-status");
  992. if (!esoc_info->notify_modem_status)
  993. goto out;
  994. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  995. &client_desc);
  996. if (ret) {
  997. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  998. } else {
  999. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1000. if (IS_ERR_OR_NULL(esoc_desc)) {
  1001. ret = PTR_RET(esoc_desc);
  1002. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1003. ret);
  1004. goto out;
  1005. }
  1006. esoc_info->esoc_desc = esoc_desc;
  1007. }
  1008. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1009. esoc_info->modem_current_status = 0;
  1010. esoc_info->modem_notify_handler =
  1011. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1012. esoc_info->esoc_desc->name :
  1013. "modem", &plat_priv->modem_nb);
  1014. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1015. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1016. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1017. ret);
  1018. goto unreg_esoc;
  1019. }
  1020. return 0;
  1021. unreg_esoc:
  1022. if (esoc_info->esoc_desc)
  1023. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1024. out:
  1025. return ret;
  1026. }
  1027. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1028. {
  1029. struct device *dev;
  1030. struct cnss_esoc_info *esoc_info;
  1031. dev = &plat_priv->plat_dev->dev;
  1032. esoc_info = &plat_priv->esoc_info;
  1033. if (esoc_info->notify_modem_status)
  1034. subsys_notif_unregister_notifier
  1035. (esoc_info->modem_notify_handler,
  1036. &plat_priv->modem_nb);
  1037. if (esoc_info->esoc_desc)
  1038. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1039. }
  1040. #else
  1041. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1042. {
  1043. return 0;
  1044. }
  1045. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1046. #endif
  1047. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1048. {
  1049. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1050. int ret = 0;
  1051. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1052. return 0;
  1053. enable_irq(sol_gpio->dev_sol_irq);
  1054. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1055. if (ret)
  1056. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1057. ret);
  1058. return ret;
  1059. }
  1060. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1061. {
  1062. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1063. int ret = 0;
  1064. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1065. return 0;
  1066. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1067. if (ret)
  1068. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1069. ret);
  1070. disable_irq(sol_gpio->dev_sol_irq);
  1071. return ret;
  1072. }
  1073. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1074. {
  1075. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1076. if (sol_gpio->dev_sol_gpio < 0)
  1077. return -EINVAL;
  1078. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1079. }
  1080. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1081. {
  1082. struct cnss_plat_data *plat_priv = data;
  1083. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1084. sol_gpio->dev_sol_counter++;
  1085. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1086. irq, sol_gpio->dev_sol_counter);
  1087. /* Make sure abort current suspend */
  1088. cnss_pm_stay_awake(plat_priv);
  1089. cnss_pm_relax(plat_priv);
  1090. pm_system_wakeup();
  1091. cnss_bus_handle_dev_sol_irq(plat_priv);
  1092. return IRQ_HANDLED;
  1093. }
  1094. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1095. {
  1096. struct device *dev = &plat_priv->plat_dev->dev;
  1097. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1098. int ret = 0;
  1099. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1100. "wlan-dev-sol-gpio", 0);
  1101. if (sol_gpio->dev_sol_gpio < 0)
  1102. goto out;
  1103. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1104. sol_gpio->dev_sol_gpio);
  1105. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1106. if (ret) {
  1107. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1108. ret);
  1109. goto out;
  1110. }
  1111. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1112. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1113. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1114. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1115. if (ret) {
  1116. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1117. goto free_gpio;
  1118. }
  1119. return 0;
  1120. free_gpio:
  1121. gpio_free(sol_gpio->dev_sol_gpio);
  1122. out:
  1123. return ret;
  1124. }
  1125. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1126. {
  1127. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1128. if (sol_gpio->dev_sol_gpio < 0)
  1129. return;
  1130. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1131. gpio_free(sol_gpio->dev_sol_gpio);
  1132. }
  1133. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1134. {
  1135. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1136. if (sol_gpio->host_sol_gpio < 0)
  1137. return -EINVAL;
  1138. if (value)
  1139. cnss_pr_dbg("Assert host SOL GPIO\n");
  1140. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1141. return 0;
  1142. }
  1143. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1144. {
  1145. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1146. if (sol_gpio->host_sol_gpio < 0)
  1147. return -EINVAL;
  1148. return gpio_get_value(sol_gpio->host_sol_gpio);
  1149. }
  1150. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1151. {
  1152. struct device *dev = &plat_priv->plat_dev->dev;
  1153. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1154. int ret = 0;
  1155. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1156. "wlan-host-sol-gpio", 0);
  1157. if (sol_gpio->host_sol_gpio < 0)
  1158. goto out;
  1159. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1160. sol_gpio->host_sol_gpio);
  1161. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1162. if (ret) {
  1163. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1164. ret);
  1165. goto out;
  1166. }
  1167. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1168. return 0;
  1169. out:
  1170. return ret;
  1171. }
  1172. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1173. {
  1174. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1175. if (sol_gpio->host_sol_gpio < 0)
  1176. return;
  1177. gpio_free(sol_gpio->host_sol_gpio);
  1178. }
  1179. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1180. {
  1181. int ret;
  1182. ret = cnss_init_dev_sol_gpio(plat_priv);
  1183. if (ret)
  1184. goto out;
  1185. ret = cnss_init_host_sol_gpio(plat_priv);
  1186. if (ret)
  1187. goto deinit_dev_sol;
  1188. return 0;
  1189. deinit_dev_sol:
  1190. cnss_deinit_dev_sol_gpio(plat_priv);
  1191. out:
  1192. return ret;
  1193. }
  1194. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1195. {
  1196. cnss_deinit_host_sol_gpio(plat_priv);
  1197. cnss_deinit_dev_sol_gpio(plat_priv);
  1198. }
  1199. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1200. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1201. {
  1202. struct cnss_plat_data *plat_priv;
  1203. int ret = 0;
  1204. if (!subsys_desc->dev) {
  1205. cnss_pr_err("dev from subsys_desc is NULL\n");
  1206. return -ENODEV;
  1207. }
  1208. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1209. if (!plat_priv) {
  1210. cnss_pr_err("plat_priv is NULL\n");
  1211. return -ENODEV;
  1212. }
  1213. if (!plat_priv->driver_state) {
  1214. cnss_pr_dbg("Powerup is ignored\n");
  1215. return 0;
  1216. }
  1217. ret = cnss_bus_dev_powerup(plat_priv);
  1218. if (ret)
  1219. __pm_relax(plat_priv->recovery_ws);
  1220. return ret;
  1221. }
  1222. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1223. bool force_stop)
  1224. {
  1225. struct cnss_plat_data *plat_priv;
  1226. if (!subsys_desc->dev) {
  1227. cnss_pr_err("dev from subsys_desc is NULL\n");
  1228. return -ENODEV;
  1229. }
  1230. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1231. if (!plat_priv) {
  1232. cnss_pr_err("plat_priv is NULL\n");
  1233. return -ENODEV;
  1234. }
  1235. if (!plat_priv->driver_state) {
  1236. cnss_pr_dbg("shutdown is ignored\n");
  1237. return 0;
  1238. }
  1239. return cnss_bus_dev_shutdown(plat_priv);
  1240. }
  1241. void cnss_device_crashed(struct device *dev)
  1242. {
  1243. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1244. struct cnss_subsys_info *subsys_info;
  1245. if (!plat_priv)
  1246. return;
  1247. subsys_info = &plat_priv->subsys_info;
  1248. if (subsys_info->subsys_device) {
  1249. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1250. subsys_set_crash_status(subsys_info->subsys_device, true);
  1251. subsystem_restart_dev(subsys_info->subsys_device);
  1252. }
  1253. }
  1254. EXPORT_SYMBOL(cnss_device_crashed);
  1255. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1256. {
  1257. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1258. if (!plat_priv) {
  1259. cnss_pr_err("plat_priv is NULL\n");
  1260. return;
  1261. }
  1262. cnss_bus_dev_crash_shutdown(plat_priv);
  1263. }
  1264. static int cnss_subsys_ramdump(int enable,
  1265. const struct subsys_desc *subsys_desc)
  1266. {
  1267. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1268. if (!plat_priv) {
  1269. cnss_pr_err("plat_priv is NULL\n");
  1270. return -ENODEV;
  1271. }
  1272. if (!enable)
  1273. return 0;
  1274. return cnss_bus_dev_ramdump(plat_priv);
  1275. }
  1276. static void cnss_recovery_work_handler(struct work_struct *work)
  1277. {
  1278. }
  1279. #else
  1280. static void cnss_recovery_work_handler(struct work_struct *work)
  1281. {
  1282. int ret;
  1283. struct cnss_plat_data *plat_priv =
  1284. container_of(work, struct cnss_plat_data, recovery_work);
  1285. if (!plat_priv->recovery_enabled)
  1286. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1287. cnss_bus_dev_shutdown(plat_priv);
  1288. cnss_bus_dev_ramdump(plat_priv);
  1289. msleep(POWER_RESET_MIN_DELAY_MS);
  1290. ret = cnss_bus_dev_powerup(plat_priv);
  1291. if (ret)
  1292. __pm_relax(plat_priv->recovery_ws);
  1293. return;
  1294. }
  1295. void cnss_device_crashed(struct device *dev)
  1296. {
  1297. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1298. if (!plat_priv)
  1299. return;
  1300. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1301. schedule_work(&plat_priv->recovery_work);
  1302. }
  1303. EXPORT_SYMBOL(cnss_device_crashed);
  1304. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1305. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1306. {
  1307. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1308. struct cnss_ramdump_info *ramdump_info;
  1309. if (!plat_priv)
  1310. return NULL;
  1311. ramdump_info = &plat_priv->ramdump_info;
  1312. *size = ramdump_info->ramdump_size;
  1313. return ramdump_info->ramdump_va;
  1314. }
  1315. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1316. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1317. {
  1318. switch (reason) {
  1319. case CNSS_REASON_DEFAULT:
  1320. return "DEFAULT";
  1321. case CNSS_REASON_LINK_DOWN:
  1322. return "LINK_DOWN";
  1323. case CNSS_REASON_RDDM:
  1324. return "RDDM";
  1325. case CNSS_REASON_TIMEOUT:
  1326. return "TIMEOUT";
  1327. }
  1328. return "UNKNOWN";
  1329. };
  1330. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1331. enum cnss_recovery_reason reason)
  1332. {
  1333. plat_priv->recovery_count++;
  1334. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1335. goto self_recovery;
  1336. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1337. cnss_pr_dbg("Skip device recovery\n");
  1338. return 0;
  1339. }
  1340. /* FW recovery sequence has multiple steps and firmware load requires
  1341. * linux PM in awake state. Thus hold the cnss wake source until
  1342. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1343. * time taken in this process.
  1344. */
  1345. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1346. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1347. true);
  1348. switch (reason) {
  1349. case CNSS_REASON_LINK_DOWN:
  1350. if (!cnss_bus_check_link_status(plat_priv)) {
  1351. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1352. return 0;
  1353. }
  1354. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1355. &plat_priv->ctrl_params.quirks))
  1356. goto self_recovery;
  1357. if (!cnss_bus_recover_link_down(plat_priv)) {
  1358. /* clear recovery bit here to avoid skipping
  1359. * the recovery work for RDDM later
  1360. */
  1361. clear_bit(CNSS_DRIVER_RECOVERY,
  1362. &plat_priv->driver_state);
  1363. return 0;
  1364. }
  1365. break;
  1366. case CNSS_REASON_RDDM:
  1367. cnss_bus_collect_dump_info(plat_priv, false);
  1368. break;
  1369. case CNSS_REASON_DEFAULT:
  1370. case CNSS_REASON_TIMEOUT:
  1371. break;
  1372. default:
  1373. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1374. cnss_recovery_reason_to_str(reason), reason);
  1375. break;
  1376. }
  1377. cnss_bus_device_crashed(plat_priv);
  1378. return 0;
  1379. self_recovery:
  1380. cnss_pr_dbg("Going for self recovery\n");
  1381. cnss_bus_dev_shutdown(plat_priv);
  1382. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1383. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1384. &plat_priv->ctrl_params.quirks);
  1385. cnss_bus_dev_powerup(plat_priv);
  1386. return 0;
  1387. }
  1388. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1389. void *data)
  1390. {
  1391. struct cnss_recovery_data *recovery_data = data;
  1392. int ret = 0;
  1393. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1394. cnss_recovery_reason_to_str(recovery_data->reason),
  1395. recovery_data->reason);
  1396. if (!plat_priv->driver_state) {
  1397. cnss_pr_err("Improper driver state, ignore recovery\n");
  1398. ret = -EINVAL;
  1399. goto out;
  1400. }
  1401. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1402. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1403. ret = -EINVAL;
  1404. goto out;
  1405. }
  1406. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1407. cnss_pr_err("Recovery is already in progress\n");
  1408. CNSS_ASSERT(0);
  1409. ret = -EINVAL;
  1410. goto out;
  1411. }
  1412. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1413. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1414. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1415. ret = -EINVAL;
  1416. goto out;
  1417. }
  1418. switch (plat_priv->device_id) {
  1419. case QCA6174_DEVICE_ID:
  1420. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1421. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1422. &plat_priv->driver_state)) {
  1423. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1424. ret = -EINVAL;
  1425. goto out;
  1426. }
  1427. break;
  1428. default:
  1429. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1430. set_bit(CNSS_FW_BOOT_RECOVERY,
  1431. &plat_priv->driver_state);
  1432. }
  1433. break;
  1434. }
  1435. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1436. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1437. out:
  1438. kfree(data);
  1439. return ret;
  1440. }
  1441. int cnss_self_recovery(struct device *dev,
  1442. enum cnss_recovery_reason reason)
  1443. {
  1444. cnss_schedule_recovery(dev, reason);
  1445. return 0;
  1446. }
  1447. EXPORT_SYMBOL(cnss_self_recovery);
  1448. void cnss_schedule_recovery(struct device *dev,
  1449. enum cnss_recovery_reason reason)
  1450. {
  1451. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1452. struct cnss_recovery_data *data;
  1453. int gfp = GFP_KERNEL;
  1454. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1455. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1456. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1457. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1458. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1459. return;
  1460. }
  1461. if (in_interrupt() || irqs_disabled())
  1462. gfp = GFP_ATOMIC;
  1463. data = kzalloc(sizeof(*data), gfp);
  1464. if (!data)
  1465. return;
  1466. data->reason = reason;
  1467. cnss_driver_event_post(plat_priv,
  1468. CNSS_DRIVER_EVENT_RECOVERY,
  1469. 0, data);
  1470. }
  1471. EXPORT_SYMBOL(cnss_schedule_recovery);
  1472. int cnss_force_fw_assert(struct device *dev)
  1473. {
  1474. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1475. if (!plat_priv) {
  1476. cnss_pr_err("plat_priv is NULL\n");
  1477. return -ENODEV;
  1478. }
  1479. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1480. cnss_pr_info("Forced FW assert is not supported\n");
  1481. return -EOPNOTSUPP;
  1482. }
  1483. if (cnss_bus_is_device_down(plat_priv)) {
  1484. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1485. return 0;
  1486. }
  1487. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1488. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1489. return 0;
  1490. }
  1491. if (in_interrupt() || irqs_disabled())
  1492. cnss_driver_event_post(plat_priv,
  1493. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1494. 0, NULL);
  1495. else
  1496. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1497. return 0;
  1498. }
  1499. EXPORT_SYMBOL(cnss_force_fw_assert);
  1500. int cnss_force_collect_rddm(struct device *dev)
  1501. {
  1502. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1503. unsigned int timeout;
  1504. int ret = 0;
  1505. if (!plat_priv) {
  1506. cnss_pr_err("plat_priv is NULL\n");
  1507. return -ENODEV;
  1508. }
  1509. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1510. cnss_pr_info("Force collect rddm is not supported\n");
  1511. return -EOPNOTSUPP;
  1512. }
  1513. if (cnss_bus_is_device_down(plat_priv)) {
  1514. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1515. goto wait_rddm;
  1516. }
  1517. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1518. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1519. goto wait_rddm;
  1520. }
  1521. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1522. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1523. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1524. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1525. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1526. return 0;
  1527. }
  1528. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1529. if (ret)
  1530. return ret;
  1531. wait_rddm:
  1532. reinit_completion(&plat_priv->rddm_complete);
  1533. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1534. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1535. msecs_to_jiffies(timeout));
  1536. if (!ret) {
  1537. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1538. timeout);
  1539. ret = -ETIMEDOUT;
  1540. } else if (ret > 0) {
  1541. ret = 0;
  1542. }
  1543. return ret;
  1544. }
  1545. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1546. int cnss_qmi_send_get(struct device *dev)
  1547. {
  1548. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1549. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1550. return 0;
  1551. return cnss_bus_qmi_send_get(plat_priv);
  1552. }
  1553. EXPORT_SYMBOL(cnss_qmi_send_get);
  1554. int cnss_qmi_send_put(struct device *dev)
  1555. {
  1556. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1557. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1558. return 0;
  1559. return cnss_bus_qmi_send_put(plat_priv);
  1560. }
  1561. EXPORT_SYMBOL(cnss_qmi_send_put);
  1562. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1563. int cmd_len, void *cb_ctx,
  1564. int (*cb)(void *ctx, void *event, int event_len))
  1565. {
  1566. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1567. int ret;
  1568. if (!plat_priv)
  1569. return -ENODEV;
  1570. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1571. return -EINVAL;
  1572. plat_priv->get_info_cb = cb;
  1573. plat_priv->get_info_cb_ctx = cb_ctx;
  1574. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1575. if (ret) {
  1576. plat_priv->get_info_cb = NULL;
  1577. plat_priv->get_info_cb_ctx = NULL;
  1578. }
  1579. return ret;
  1580. }
  1581. EXPORT_SYMBOL(cnss_qmi_send);
  1582. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1583. {
  1584. int ret = 0;
  1585. u32 retry = 0, timeout;
  1586. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1587. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1588. goto out;
  1589. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1590. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1591. goto out;
  1592. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1593. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1594. goto out;
  1595. }
  1596. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1597. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1598. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1599. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1600. CNSS_ASSERT(0);
  1601. return -EINVAL;
  1602. }
  1603. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1604. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1605. break;
  1606. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1607. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1608. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1609. CNSS_ASSERT(0);
  1610. ret = -EINVAL;
  1611. goto mark_cal_fail;
  1612. }
  1613. }
  1614. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1615. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1616. timeout = cnss_get_timeout(plat_priv,
  1617. CNSS_TIMEOUT_CALIBRATION);
  1618. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1619. timeout / 1000);
  1620. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1621. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1622. msecs_to_jiffies(timeout));
  1623. }
  1624. reinit_completion(&plat_priv->cal_complete);
  1625. ret = cnss_bus_dev_powerup(plat_priv);
  1626. mark_cal_fail:
  1627. if (ret) {
  1628. complete(&plat_priv->cal_complete);
  1629. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1630. /* Set CBC done in driver state to mark attempt and note error
  1631. * since calibration cannot be retried at boot.
  1632. */
  1633. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1634. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1635. }
  1636. out:
  1637. return ret;
  1638. }
  1639. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1640. void *data)
  1641. {
  1642. struct cnss_cal_info *cal_info = data;
  1643. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1644. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1645. goto out;
  1646. switch (cal_info->cal_status) {
  1647. case CNSS_CAL_DONE:
  1648. cnss_pr_dbg("Calibration completed successfully\n");
  1649. plat_priv->cal_done = true;
  1650. break;
  1651. case CNSS_CAL_TIMEOUT:
  1652. case CNSS_CAL_FAILURE:
  1653. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1654. cal_info->cal_status);
  1655. break;
  1656. default:
  1657. cnss_pr_err("Unknown calibration status: %u\n",
  1658. cal_info->cal_status);
  1659. break;
  1660. }
  1661. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1662. cnss_bus_free_qdss_mem(plat_priv);
  1663. cnss_release_antenna_sharing(plat_priv);
  1664. cnss_bus_dev_shutdown(plat_priv);
  1665. msleep(POWER_RESET_MIN_DELAY_MS);
  1666. complete(&plat_priv->cal_complete);
  1667. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1668. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1669. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1670. cnss_cal_mem_upload_to_file(plat_priv);
  1671. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1672. goto out;
  1673. cnss_pr_dbg("Schedule WLAN driver load\n");
  1674. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1675. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1676. 0);
  1677. }
  1678. out:
  1679. kfree(data);
  1680. return 0;
  1681. }
  1682. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1683. {
  1684. int ret;
  1685. ret = cnss_bus_dev_powerup(plat_priv);
  1686. if (ret)
  1687. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1688. return ret;
  1689. }
  1690. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1691. {
  1692. cnss_bus_dev_shutdown(plat_priv);
  1693. return 0;
  1694. }
  1695. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1696. {
  1697. int ret = 0;
  1698. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1699. if (ret < 0)
  1700. return ret;
  1701. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1702. }
  1703. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1704. u32 mem_seg_len, u64 pa, u32 size)
  1705. {
  1706. int i = 0;
  1707. u64 offset = 0;
  1708. void *va = NULL;
  1709. u64 local_pa;
  1710. u32 local_size;
  1711. for (i = 0; i < mem_seg_len; i++) {
  1712. local_pa = (u64)fw_mem[i].pa;
  1713. local_size = (u32)fw_mem[i].size;
  1714. if (pa == local_pa && size <= local_size) {
  1715. va = fw_mem[i].va;
  1716. break;
  1717. }
  1718. if (pa > local_pa &&
  1719. pa < local_pa + local_size &&
  1720. pa + size <= local_pa + local_size) {
  1721. offset = pa - local_pa;
  1722. va = fw_mem[i].va + offset;
  1723. break;
  1724. }
  1725. }
  1726. return va;
  1727. }
  1728. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1729. void *data)
  1730. {
  1731. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1732. struct cnss_fw_mem *fw_mem_seg;
  1733. int ret = 0L;
  1734. void *va = NULL;
  1735. u32 i, fw_mem_seg_len;
  1736. switch (event_data->mem_type) {
  1737. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1738. if (!plat_priv->fw_mem_seg_len)
  1739. goto invalid_mem_save;
  1740. fw_mem_seg = plat_priv->fw_mem;
  1741. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1742. break;
  1743. case QMI_WLFW_MEM_QDSS_V01:
  1744. if (!plat_priv->qdss_mem_seg_len)
  1745. goto invalid_mem_save;
  1746. fw_mem_seg = plat_priv->qdss_mem;
  1747. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1748. break;
  1749. default:
  1750. goto invalid_mem_save;
  1751. }
  1752. for (i = 0; i < event_data->mem_seg_len; i++) {
  1753. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1754. event_data->mem_seg[i].addr,
  1755. event_data->mem_seg[i].size);
  1756. if (!va) {
  1757. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1758. &event_data->mem_seg[i].addr,
  1759. event_data->mem_type);
  1760. ret = -EINVAL;
  1761. break;
  1762. }
  1763. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1764. event_data->file_name,
  1765. event_data->mem_seg[i].size);
  1766. if (ret < 0) {
  1767. cnss_pr_err("Fail to save fw mem data: %d\n",
  1768. ret);
  1769. break;
  1770. }
  1771. }
  1772. kfree(data);
  1773. return ret;
  1774. invalid_mem_save:
  1775. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1776. event_data->mem_type);
  1777. kfree(data);
  1778. return -EINVAL;
  1779. }
  1780. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1781. {
  1782. cnss_bus_free_qdss_mem(plat_priv);
  1783. return 0;
  1784. }
  1785. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1786. void *data)
  1787. {
  1788. int ret = 0;
  1789. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1790. if (!plat_priv)
  1791. return -ENODEV;
  1792. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1793. event_data->total_size);
  1794. kfree(data);
  1795. return ret;
  1796. }
  1797. static void cnss_driver_event_work(struct work_struct *work)
  1798. {
  1799. struct cnss_plat_data *plat_priv =
  1800. container_of(work, struct cnss_plat_data, event_work);
  1801. struct cnss_driver_event *event;
  1802. unsigned long flags;
  1803. int ret = 0;
  1804. if (!plat_priv) {
  1805. cnss_pr_err("plat_priv is NULL!\n");
  1806. return;
  1807. }
  1808. cnss_pm_stay_awake(plat_priv);
  1809. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1810. while (!list_empty(&plat_priv->event_list)) {
  1811. event = list_first_entry(&plat_priv->event_list,
  1812. struct cnss_driver_event, list);
  1813. list_del(&event->list);
  1814. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1815. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1816. cnss_driver_event_to_str(event->type),
  1817. event->sync ? "-sync" : "", event->type,
  1818. plat_priv->driver_state);
  1819. switch (event->type) {
  1820. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1821. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1822. break;
  1823. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1824. ret = cnss_wlfw_server_exit(plat_priv);
  1825. break;
  1826. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1827. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1828. if (ret)
  1829. break;
  1830. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1831. break;
  1832. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1833. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1834. break;
  1835. case CNSS_DRIVER_EVENT_FW_READY:
  1836. ret = cnss_fw_ready_hdlr(plat_priv);
  1837. break;
  1838. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1839. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1840. break;
  1841. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1842. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1843. event->data);
  1844. break;
  1845. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1846. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1847. event->data);
  1848. break;
  1849. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1850. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1851. break;
  1852. case CNSS_DRIVER_EVENT_RECOVERY:
  1853. ret = cnss_driver_recovery_hdlr(plat_priv,
  1854. event->data);
  1855. break;
  1856. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1857. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1858. break;
  1859. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1860. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1861. &plat_priv->driver_state);
  1862. /* fall through */
  1863. case CNSS_DRIVER_EVENT_POWER_UP:
  1864. ret = cnss_power_up_hdlr(plat_priv);
  1865. break;
  1866. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1867. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1868. &plat_priv->driver_state);
  1869. /* fall through */
  1870. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1871. ret = cnss_power_down_hdlr(plat_priv);
  1872. break;
  1873. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1874. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1875. event->data);
  1876. break;
  1877. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1878. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1879. event->data);
  1880. break;
  1881. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1882. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1883. break;
  1884. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1885. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1886. event->data);
  1887. break;
  1888. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1889. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1890. break;
  1891. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1892. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1893. event->data);
  1894. break;
  1895. default:
  1896. cnss_pr_err("Invalid driver event type: %d",
  1897. event->type);
  1898. kfree(event);
  1899. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1900. continue;
  1901. }
  1902. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1903. if (event->sync) {
  1904. event->ret = ret;
  1905. complete(&event->complete);
  1906. continue;
  1907. }
  1908. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1909. kfree(event);
  1910. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1911. }
  1912. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1913. cnss_pm_relax(plat_priv);
  1914. }
  1915. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1916. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1917. {
  1918. int ret = 0;
  1919. struct cnss_subsys_info *subsys_info;
  1920. subsys_info = &plat_priv->subsys_info;
  1921. subsys_info->subsys_desc.name = "wlan";
  1922. subsys_info->subsys_desc.owner = THIS_MODULE;
  1923. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1924. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1925. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1926. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1927. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1928. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1929. if (IS_ERR(subsys_info->subsys_device)) {
  1930. ret = PTR_ERR(subsys_info->subsys_device);
  1931. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1932. goto out;
  1933. }
  1934. subsys_info->subsys_handle =
  1935. subsystem_get(subsys_info->subsys_desc.name);
  1936. if (!subsys_info->subsys_handle) {
  1937. cnss_pr_err("Failed to get subsys_handle!\n");
  1938. ret = -EINVAL;
  1939. goto unregister_subsys;
  1940. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1941. ret = PTR_ERR(subsys_info->subsys_handle);
  1942. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1943. goto unregister_subsys;
  1944. }
  1945. return 0;
  1946. unregister_subsys:
  1947. subsys_unregister(subsys_info->subsys_device);
  1948. out:
  1949. return ret;
  1950. }
  1951. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1952. {
  1953. struct cnss_subsys_info *subsys_info;
  1954. subsys_info = &plat_priv->subsys_info;
  1955. subsystem_put(subsys_info->subsys_handle);
  1956. subsys_unregister(subsys_info->subsys_device);
  1957. }
  1958. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1959. {
  1960. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1961. return create_ramdump_device(subsys_info->subsys_desc.name,
  1962. subsys_info->subsys_desc.dev);
  1963. }
  1964. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1965. void *ramdump_dev)
  1966. {
  1967. destroy_ramdump_device(ramdump_dev);
  1968. }
  1969. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1970. {
  1971. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1972. struct ramdump_segment segment;
  1973. memset(&segment, 0, sizeof(segment));
  1974. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1975. segment.size = ramdump_info->ramdump_size;
  1976. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1977. }
  1978. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1979. {
  1980. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1981. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1982. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1983. struct ramdump_segment *ramdump_segs, *s;
  1984. struct cnss_dump_meta_info meta_info = {0};
  1985. int i, ret = 0;
  1986. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1987. sizeof(*ramdump_segs),
  1988. GFP_KERNEL);
  1989. if (!ramdump_segs)
  1990. return -ENOMEM;
  1991. s = ramdump_segs + 1;
  1992. for (i = 0; i < dump_data->nentries; i++) {
  1993. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1994. cnss_pr_err("Unsupported dump type: %d",
  1995. dump_seg->type);
  1996. continue;
  1997. }
  1998. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1999. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2000. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2001. }
  2002. meta_info.entry[dump_seg->type].entry_num++;
  2003. s->address = dump_seg->address;
  2004. s->v_address = (void __iomem *)dump_seg->v_address;
  2005. s->size = dump_seg->size;
  2006. s++;
  2007. dump_seg++;
  2008. }
  2009. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2010. meta_info.version = CNSS_RAMDUMP_VERSION;
  2011. meta_info.chipset = plat_priv->device_id;
  2012. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2013. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2014. ramdump_segs->size = sizeof(meta_info);
  2015. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2016. dump_data->nentries + 1);
  2017. kfree(ramdump_segs);
  2018. return ret;
  2019. }
  2020. #else
  2021. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2022. void *data)
  2023. {
  2024. struct cnss_plat_data *plat_priv =
  2025. container_of(nb, struct cnss_plat_data, panic_nb);
  2026. cnss_bus_dev_crash_shutdown(plat_priv);
  2027. return NOTIFY_DONE;
  2028. }
  2029. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2030. {
  2031. int ret;
  2032. if (!plat_priv)
  2033. return -ENODEV;
  2034. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2035. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2036. &plat_priv->panic_nb);
  2037. if (ret) {
  2038. cnss_pr_err("Failed to register panic handler\n");
  2039. return -EINVAL;
  2040. }
  2041. return 0;
  2042. }
  2043. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2044. {
  2045. int ret;
  2046. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2047. &plat_priv->panic_nb);
  2048. if (ret)
  2049. cnss_pr_err("Failed to unregister panic handler\n");
  2050. }
  2051. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2052. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2053. {
  2054. return &plat_priv->plat_dev->dev;
  2055. }
  2056. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2057. void *ramdump_dev)
  2058. {
  2059. }
  2060. #endif
  2061. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2062. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2063. {
  2064. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2065. struct qcom_dump_segment segment;
  2066. struct list_head head;
  2067. INIT_LIST_HEAD(&head);
  2068. memset(&segment, 0, sizeof(segment));
  2069. segment.va = ramdump_info->ramdump_va;
  2070. segment.size = ramdump_info->ramdump_size;
  2071. list_add(&segment.node, &head);
  2072. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2073. }
  2074. #else
  2075. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2076. {
  2077. return 0;
  2078. }
  2079. /* Using completion event inside dynamically allocated ramdump_desc
  2080. * may result a race between freeing the event after setting it to
  2081. * complete inside dev coredump free callback and the thread that is
  2082. * waiting for completion.
  2083. */
  2084. DECLARE_COMPLETION(dump_done);
  2085. #define TIMEOUT_SAVE_DUMP_MS 30000
  2086. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2087. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2088. { \
  2089. if (class == ELFCLASS32) \
  2090. return sizeof(struct elf32_##__xhdr); \
  2091. else \
  2092. return sizeof(struct elf64_##__xhdr); \
  2093. }
  2094. SIZEOF_ELF_STRUCT(phdr)
  2095. SIZEOF_ELF_STRUCT(hdr)
  2096. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2097. do { \
  2098. if (class == ELFCLASS32) \
  2099. ((struct elf32_##__xhdr *)arg)->member = value; \
  2100. else \
  2101. ((struct elf64_##__xhdr *)arg)->member = value; \
  2102. } while (0)
  2103. #define set_ehdr_property(arg, class, member, value) \
  2104. set_xhdr_property(hdr, arg, class, member, value)
  2105. #define set_phdr_property(arg, class, member, value) \
  2106. set_xhdr_property(phdr, arg, class, member, value)
  2107. /* These replace qcom_ramdump driver APIs called from common API
  2108. * cnss_do_elf_dump() by the ones defined here.
  2109. */
  2110. #define qcom_dump_segment cnss_qcom_dump_segment
  2111. #define qcom_elf_dump cnss_qcom_elf_dump
  2112. #define dump_enabled cnss_dump_enabled
  2113. struct cnss_qcom_dump_segment {
  2114. struct list_head node;
  2115. dma_addr_t da;
  2116. void *va;
  2117. size_t size;
  2118. };
  2119. struct cnss_qcom_ramdump_desc {
  2120. void *data;
  2121. struct completion dump_done;
  2122. };
  2123. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2124. void *data, size_t datalen)
  2125. {
  2126. struct cnss_qcom_ramdump_desc *desc = data;
  2127. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2128. datalen);
  2129. }
  2130. static void cnss_qcom_devcd_freev(void *data)
  2131. {
  2132. struct cnss_qcom_ramdump_desc *desc = data;
  2133. cnss_pr_dbg("Free dump data for dev coredump\n");
  2134. complete(&dump_done);
  2135. vfree(desc->data);
  2136. kfree(desc);
  2137. }
  2138. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2139. gfp_t gfp)
  2140. {
  2141. struct cnss_qcom_ramdump_desc *desc;
  2142. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2143. int ret;
  2144. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2145. if (!desc)
  2146. return -ENOMEM;
  2147. desc->data = data;
  2148. reinit_completion(&dump_done);
  2149. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2150. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2151. ret = wait_for_completion_timeout(&dump_done,
  2152. msecs_to_jiffies(timeout));
  2153. if (!ret)
  2154. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2155. timeout);
  2156. return ret ? 0 : -ETIMEDOUT;
  2157. }
  2158. /* Since the elf32 and elf64 identification is identical apart from
  2159. * the class, use elf32 by default.
  2160. */
  2161. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2162. {
  2163. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2164. ehdr->e_ident[EI_CLASS] = class;
  2165. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2166. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2167. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2168. }
  2169. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2170. unsigned char class)
  2171. {
  2172. struct cnss_qcom_dump_segment *segment;
  2173. void *phdr, *ehdr;
  2174. size_t data_size, offset;
  2175. int phnum = 0;
  2176. void *data;
  2177. void __iomem *ptr;
  2178. if (!segs || list_empty(segs))
  2179. return -EINVAL;
  2180. data_size = sizeof_elf_hdr(class);
  2181. list_for_each_entry(segment, segs, node) {
  2182. data_size += sizeof_elf_phdr(class) + segment->size;
  2183. phnum++;
  2184. }
  2185. data = vmalloc(data_size);
  2186. if (!data)
  2187. return -ENOMEM;
  2188. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2189. ehdr = data;
  2190. memset(ehdr, 0, sizeof_elf_hdr(class));
  2191. init_elf_identification(ehdr, class);
  2192. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2193. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2194. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2195. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2196. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2197. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2198. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2199. phdr = data + sizeof_elf_hdr(class);
  2200. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2201. list_for_each_entry(segment, segs, node) {
  2202. memset(phdr, 0, sizeof_elf_phdr(class));
  2203. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2204. set_phdr_property(phdr, class, p_offset, offset);
  2205. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2206. set_phdr_property(phdr, class, p_paddr, segment->da);
  2207. set_phdr_property(phdr, class, p_filesz, segment->size);
  2208. set_phdr_property(phdr, class, p_memsz, segment->size);
  2209. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2210. set_phdr_property(phdr, class, p_align, 0);
  2211. if (segment->va) {
  2212. memcpy(data + offset, segment->va, segment->size);
  2213. } else {
  2214. ptr = devm_ioremap(dev, segment->da, segment->size);
  2215. if (!ptr) {
  2216. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2217. &segment->da, segment->size);
  2218. memset(data + offset, 0xff, segment->size);
  2219. } else {
  2220. memcpy_fromio(data + offset, ptr,
  2221. segment->size);
  2222. }
  2223. }
  2224. offset += segment->size;
  2225. phdr += sizeof_elf_phdr(class);
  2226. }
  2227. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2228. }
  2229. /* Saving dump to file system is always needed in this case. */
  2230. static bool cnss_dump_enabled(void)
  2231. {
  2232. return true;
  2233. }
  2234. #endif /* CONFIG_QCOM_RAMDUMP */
  2235. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2236. {
  2237. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2238. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2239. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2240. struct qcom_dump_segment *seg;
  2241. struct cnss_dump_meta_info meta_info = {0};
  2242. struct list_head head;
  2243. int i, ret = 0;
  2244. if (!dump_enabled()) {
  2245. cnss_pr_info("Dump collection is not enabled\n");
  2246. return ret;
  2247. }
  2248. INIT_LIST_HEAD(&head);
  2249. for (i = 0; i < dump_data->nentries; i++) {
  2250. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2251. cnss_pr_err("Unsupported dump type: %d",
  2252. dump_seg->type);
  2253. continue;
  2254. }
  2255. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2256. if (!seg)
  2257. continue;
  2258. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2259. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2260. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2261. }
  2262. meta_info.entry[dump_seg->type].entry_num++;
  2263. seg->da = dump_seg->address;
  2264. seg->va = dump_seg->v_address;
  2265. seg->size = dump_seg->size;
  2266. list_add_tail(&seg->node, &head);
  2267. dump_seg++;
  2268. }
  2269. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2270. if (!seg)
  2271. goto do_elf_dump;
  2272. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2273. meta_info.version = CNSS_RAMDUMP_VERSION;
  2274. meta_info.chipset = plat_priv->device_id;
  2275. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2276. seg->va = &meta_info;
  2277. seg->size = sizeof(meta_info);
  2278. list_add(&seg->node, &head);
  2279. do_elf_dump:
  2280. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2281. while (!list_empty(&head)) {
  2282. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2283. list_del(&seg->node);
  2284. kfree(seg);
  2285. }
  2286. return ret;
  2287. }
  2288. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2289. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2290. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2291. {
  2292. struct cnss_ramdump_info *ramdump_info;
  2293. struct msm_dump_entry dump_entry;
  2294. ramdump_info = &plat_priv->ramdump_info;
  2295. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2296. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2297. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2298. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2299. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2300. sizeof(ramdump_info->dump_data.name));
  2301. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2302. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2303. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2304. &dump_entry);
  2305. }
  2306. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2307. {
  2308. int ret = 0;
  2309. struct device *dev;
  2310. struct cnss_ramdump_info *ramdump_info;
  2311. u32 ramdump_size = 0;
  2312. dev = &plat_priv->plat_dev->dev;
  2313. ramdump_info = &plat_priv->ramdump_info;
  2314. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2315. &ramdump_size) == 0) {
  2316. ramdump_info->ramdump_va =
  2317. dma_alloc_coherent(dev, ramdump_size,
  2318. &ramdump_info->ramdump_pa,
  2319. GFP_KERNEL);
  2320. if (ramdump_info->ramdump_va)
  2321. ramdump_info->ramdump_size = ramdump_size;
  2322. }
  2323. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2324. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2325. if (ramdump_info->ramdump_size == 0) {
  2326. cnss_pr_info("Ramdump will not be collected");
  2327. goto out;
  2328. }
  2329. ret = cnss_init_dump_entry(plat_priv);
  2330. if (ret) {
  2331. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2332. goto free_ramdump;
  2333. }
  2334. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2335. if (!ramdump_info->ramdump_dev) {
  2336. cnss_pr_err("Failed to create ramdump device!");
  2337. ret = -ENOMEM;
  2338. goto free_ramdump;
  2339. }
  2340. return 0;
  2341. free_ramdump:
  2342. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2343. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2344. out:
  2345. return ret;
  2346. }
  2347. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2348. {
  2349. struct device *dev;
  2350. struct cnss_ramdump_info *ramdump_info;
  2351. dev = &plat_priv->plat_dev->dev;
  2352. ramdump_info = &plat_priv->ramdump_info;
  2353. if (ramdump_info->ramdump_dev)
  2354. cnss_destroy_ramdump_device(plat_priv,
  2355. ramdump_info->ramdump_dev);
  2356. if (ramdump_info->ramdump_va)
  2357. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2358. ramdump_info->ramdump_va,
  2359. ramdump_info->ramdump_pa);
  2360. }
  2361. /**
  2362. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2363. * @ret: Error returned by msm_dump_data_register_nominidump
  2364. *
  2365. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2366. * ignore failure.
  2367. *
  2368. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2369. */
  2370. static int cnss_ignore_dump_data_reg_fail(int ret)
  2371. {
  2372. return ret;
  2373. }
  2374. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2375. {
  2376. int ret = 0;
  2377. struct cnss_ramdump_info_v2 *info_v2;
  2378. struct cnss_dump_data *dump_data;
  2379. struct msm_dump_entry dump_entry;
  2380. struct device *dev = &plat_priv->plat_dev->dev;
  2381. u32 ramdump_size = 0;
  2382. info_v2 = &plat_priv->ramdump_info_v2;
  2383. dump_data = &info_v2->dump_data;
  2384. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2385. &ramdump_size) == 0)
  2386. info_v2->ramdump_size = ramdump_size;
  2387. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2388. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2389. if (!info_v2->dump_data_vaddr)
  2390. return -ENOMEM;
  2391. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2392. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2393. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2394. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2395. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2396. sizeof(dump_data->name));
  2397. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2398. dump_entry.addr = virt_to_phys(dump_data);
  2399. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2400. &dump_entry);
  2401. if (ret) {
  2402. ret = cnss_ignore_dump_data_reg_fail(ret);
  2403. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2404. ret ? "Error" : "Ignoring", ret);
  2405. goto free_ramdump;
  2406. }
  2407. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2408. if (!info_v2->ramdump_dev) {
  2409. cnss_pr_err("Failed to create ramdump device!\n");
  2410. ret = -ENOMEM;
  2411. goto free_ramdump;
  2412. }
  2413. return 0;
  2414. free_ramdump:
  2415. kfree(info_v2->dump_data_vaddr);
  2416. info_v2->dump_data_vaddr = NULL;
  2417. return ret;
  2418. }
  2419. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2420. {
  2421. struct cnss_ramdump_info_v2 *info_v2;
  2422. info_v2 = &plat_priv->ramdump_info_v2;
  2423. if (info_v2->ramdump_dev)
  2424. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2425. kfree(info_v2->dump_data_vaddr);
  2426. info_v2->dump_data_vaddr = NULL;
  2427. info_v2->dump_data_valid = false;
  2428. }
  2429. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2430. {
  2431. int ret = 0;
  2432. switch (plat_priv->device_id) {
  2433. case QCA6174_DEVICE_ID:
  2434. ret = cnss_register_ramdump_v1(plat_priv);
  2435. break;
  2436. case QCA6290_DEVICE_ID:
  2437. case QCA6390_DEVICE_ID:
  2438. case QCA6490_DEVICE_ID:
  2439. case KIWI_DEVICE_ID:
  2440. ret = cnss_register_ramdump_v2(plat_priv);
  2441. break;
  2442. default:
  2443. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2444. ret = -ENODEV;
  2445. break;
  2446. }
  2447. return ret;
  2448. }
  2449. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2450. {
  2451. switch (plat_priv->device_id) {
  2452. case QCA6174_DEVICE_ID:
  2453. cnss_unregister_ramdump_v1(plat_priv);
  2454. break;
  2455. case QCA6290_DEVICE_ID:
  2456. case QCA6390_DEVICE_ID:
  2457. case QCA6490_DEVICE_ID:
  2458. case KIWI_DEVICE_ID:
  2459. cnss_unregister_ramdump_v2(plat_priv);
  2460. break;
  2461. default:
  2462. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2463. break;
  2464. }
  2465. }
  2466. #else
  2467. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2468. {
  2469. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2470. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2471. struct device *dev = &plat_priv->plat_dev->dev;
  2472. u32 ramdump_size = 0;
  2473. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2474. &ramdump_size) == 0)
  2475. info_v2->ramdump_size = ramdump_size;
  2476. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2477. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2478. if (!info_v2->dump_data_vaddr)
  2479. return -ENOMEM;
  2480. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2481. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2482. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2483. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2484. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2485. sizeof(dump_data->name));
  2486. info_v2->ramdump_dev = dev;
  2487. return 0;
  2488. }
  2489. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2490. {
  2491. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2492. info_v2->ramdump_dev = NULL;
  2493. kfree(info_v2->dump_data_vaddr);
  2494. info_v2->dump_data_vaddr = NULL;
  2495. info_v2->dump_data_valid = false;
  2496. }
  2497. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2498. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2499. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2500. phys_addr_t *pa, unsigned long attrs)
  2501. {
  2502. struct sg_table sgt;
  2503. int ret;
  2504. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2505. if (ret) {
  2506. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2507. va, &dma, size, attrs);
  2508. return -EINVAL;
  2509. }
  2510. *pa = page_to_phys(sg_page(sgt.sgl));
  2511. sg_free_table(&sgt);
  2512. return 0;
  2513. }
  2514. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2515. enum cnss_fw_dump_type type, int seg_no,
  2516. void *va, phys_addr_t pa, size_t size)
  2517. {
  2518. struct md_region md_entry;
  2519. int ret;
  2520. switch (type) {
  2521. case CNSS_FW_IMAGE:
  2522. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2523. seg_no);
  2524. break;
  2525. case CNSS_FW_RDDM:
  2526. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2527. seg_no);
  2528. break;
  2529. case CNSS_FW_REMOTE_HEAP:
  2530. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2531. seg_no);
  2532. break;
  2533. default:
  2534. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2535. return -EINVAL;
  2536. }
  2537. md_entry.phys_addr = pa;
  2538. md_entry.virt_addr = (uintptr_t)va;
  2539. md_entry.size = size;
  2540. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2541. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2542. md_entry.name, va, &pa, size);
  2543. ret = msm_minidump_add_region(&md_entry);
  2544. if (ret < 0)
  2545. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2546. return ret;
  2547. }
  2548. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2549. enum cnss_fw_dump_type type, int seg_no,
  2550. void *va, phys_addr_t pa, size_t size)
  2551. {
  2552. struct md_region md_entry;
  2553. int ret;
  2554. switch (type) {
  2555. case CNSS_FW_IMAGE:
  2556. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2557. seg_no);
  2558. break;
  2559. case CNSS_FW_RDDM:
  2560. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2561. seg_no);
  2562. break;
  2563. case CNSS_FW_REMOTE_HEAP:
  2564. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2565. seg_no);
  2566. break;
  2567. default:
  2568. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2569. return -EINVAL;
  2570. }
  2571. md_entry.phys_addr = pa;
  2572. md_entry.virt_addr = (uintptr_t)va;
  2573. md_entry.size = size;
  2574. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2575. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2576. md_entry.name, va, &pa, size);
  2577. ret = msm_minidump_remove_region(&md_entry);
  2578. if (ret)
  2579. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2580. ret);
  2581. return ret;
  2582. }
  2583. #else
  2584. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2585. phys_addr_t *pa, unsigned long attrs)
  2586. {
  2587. return 0;
  2588. }
  2589. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2590. enum cnss_fw_dump_type type, int seg_no,
  2591. void *va, phys_addr_t pa, size_t size)
  2592. {
  2593. return 0;
  2594. }
  2595. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2596. enum cnss_fw_dump_type type, int seg_no,
  2597. void *va, phys_addr_t pa, size_t size)
  2598. {
  2599. return 0;
  2600. }
  2601. #endif /* CONFIG_QCOM_MINIDUMP */
  2602. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2603. const struct firmware **fw_entry,
  2604. const char *filename)
  2605. {
  2606. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2607. return request_firmware_direct(fw_entry, filename,
  2608. &plat_priv->plat_dev->dev);
  2609. else
  2610. return firmware_request_nowarn(fw_entry, filename,
  2611. &plat_priv->plat_dev->dev);
  2612. }
  2613. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2614. /**
  2615. * cnss_register_bus_scale() - Setup interconnect voting data
  2616. * @plat_priv: Platform data structure
  2617. *
  2618. * For different interconnect path configured in device tree setup voting data
  2619. * for list of bandwidth requirements.
  2620. *
  2621. * Result: 0 for success. -EINVAL if not configured
  2622. */
  2623. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2624. {
  2625. int ret = -EINVAL;
  2626. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2627. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2628. struct device *dev = &plat_priv->plat_dev->dev;
  2629. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2630. ret = of_property_read_u32(dev->of_node,
  2631. "qcom,icc-path-count",
  2632. &plat_priv->icc.path_count);
  2633. if (ret) {
  2634. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2635. return 0;
  2636. }
  2637. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2638. "qcom,bus-bw-cfg-count",
  2639. &plat_priv->icc.bus_bw_cfg_count);
  2640. if (ret) {
  2641. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2642. goto cleanup;
  2643. }
  2644. cfg_arr_size = plat_priv->icc.path_count *
  2645. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2646. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2647. if (!cfg_arr) {
  2648. cnss_pr_err("Failed to alloc cfg table mem\n");
  2649. ret = -ENOMEM;
  2650. goto cleanup;
  2651. }
  2652. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2653. "qcom,bus-bw-cfg", cfg_arr,
  2654. cfg_arr_size);
  2655. if (ret) {
  2656. cnss_pr_err("Invalid Bus BW Config Table\n");
  2657. goto cleanup;
  2658. }
  2659. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2660. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2661. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2662. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2663. GFP_KERNEL);
  2664. if (!bus_bw_info) {
  2665. ret = -ENOMEM;
  2666. goto out;
  2667. }
  2668. ret = of_property_read_string_index(dev->of_node,
  2669. "interconnect-names", idx,
  2670. &bus_bw_info->icc_name);
  2671. if (ret)
  2672. goto out;
  2673. bus_bw_info->icc_path =
  2674. of_icc_get(&plat_priv->plat_dev->dev,
  2675. bus_bw_info->icc_name);
  2676. if (IS_ERR(bus_bw_info->icc_path)) {
  2677. ret = PTR_ERR(bus_bw_info->icc_path);
  2678. if (ret != -EPROBE_DEFER) {
  2679. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2680. bus_bw_info->icc_name, ret);
  2681. goto out;
  2682. }
  2683. }
  2684. bus_bw_info->cfg_table =
  2685. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2686. sizeof(*bus_bw_info->cfg_table),
  2687. GFP_KERNEL);
  2688. if (!bus_bw_info->cfg_table) {
  2689. ret = -ENOMEM;
  2690. goto out;
  2691. }
  2692. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2693. bus_bw_info->icc_name);
  2694. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2695. CNSS_ICC_VOTE_MAX);
  2696. i < plat_priv->icc.bus_bw_cfg_count;
  2697. i++, j += 2) {
  2698. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2699. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2700. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2701. i, bus_bw_info->cfg_table[i].avg_bw,
  2702. bus_bw_info->cfg_table[i].peak_bw);
  2703. }
  2704. list_add_tail(&bus_bw_info->list,
  2705. &plat_priv->icc.list_head);
  2706. }
  2707. kfree(cfg_arr);
  2708. return 0;
  2709. out:
  2710. list_for_each_entry_safe(bus_bw_info, tmp,
  2711. &plat_priv->icc.list_head, list) {
  2712. list_del(&bus_bw_info->list);
  2713. }
  2714. cleanup:
  2715. kfree(cfg_arr);
  2716. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2717. return ret;
  2718. }
  2719. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2720. {
  2721. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2722. list_for_each_entry_safe(bus_bw_info, tmp,
  2723. &plat_priv->icc.list_head, list) {
  2724. list_del(&bus_bw_info->list);
  2725. if (bus_bw_info->icc_path)
  2726. icc_put(bus_bw_info->icc_path);
  2727. }
  2728. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2729. }
  2730. #else
  2731. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2732. {
  2733. return 0;
  2734. }
  2735. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2736. #endif /* CONFIG_INTERCONNECT */
  2737. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2738. {
  2739. struct cnss_plat_data *plat_priv = cb_ctx;
  2740. if (!plat_priv) {
  2741. cnss_pr_err("%s: Invalid context\n", __func__);
  2742. return;
  2743. }
  2744. if (status) {
  2745. cnss_pr_info("CNSS Daemon connected\n");
  2746. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2747. complete(&plat_priv->daemon_connected);
  2748. } else {
  2749. cnss_pr_info("CNSS Daemon disconnected\n");
  2750. reinit_completion(&plat_priv->daemon_connected);
  2751. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2752. }
  2753. }
  2754. static ssize_t enable_hds_store(struct device *dev,
  2755. struct device_attribute *attr,
  2756. const char *buf, size_t count)
  2757. {
  2758. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2759. unsigned int enable_hds = 0;
  2760. if (!plat_priv)
  2761. return -ENODEV;
  2762. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2763. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2764. return -EINVAL;
  2765. }
  2766. if (enable_hds)
  2767. plat_priv->hds_enabled = true;
  2768. else
  2769. plat_priv->hds_enabled = false;
  2770. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2771. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2772. return count;
  2773. }
  2774. static ssize_t recovery_show(struct device *dev,
  2775. struct device_attribute *attr,
  2776. char *buf)
  2777. {
  2778. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2779. u32 buf_size = PAGE_SIZE;
  2780. u32 curr_len = 0;
  2781. u32 buf_written = 0;
  2782. if (!plat_priv)
  2783. return -ENODEV;
  2784. buf_written = scnprintf(buf, buf_size,
  2785. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2786. "BIT0 -- wlan fw recovery\n"
  2787. "BIT1 -- wlan pcss recovery\n"
  2788. "---------------------------------\n");
  2789. curr_len += buf_written;
  2790. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2791. "WLAN recovery %s[%d]\n",
  2792. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2793. plat_priv->recovery_enabled);
  2794. curr_len += buf_written;
  2795. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2796. "WLAN PCSS recovery %s[%d]\n",
  2797. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2798. plat_priv->recovery_pcss_enabled);
  2799. curr_len += buf_written;
  2800. /*
  2801. * Now size of curr_len is not over page size for sure,
  2802. * later if new item or none-fixed size item added, need
  2803. * add check to make sure curr_len is not over page size.
  2804. */
  2805. return curr_len;
  2806. }
  2807. static ssize_t recovery_store(struct device *dev,
  2808. struct device_attribute *attr,
  2809. const char *buf, size_t count)
  2810. {
  2811. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2812. unsigned int recovery = 0;
  2813. int ret;
  2814. if (!plat_priv)
  2815. return -ENODEV;
  2816. if (sscanf(buf, "%du", &recovery) != 1) {
  2817. cnss_pr_err("Invalid recovery sysfs command\n");
  2818. return -EINVAL;
  2819. }
  2820. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2821. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2822. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2823. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2824. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2825. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2826. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2827. if (ret < 0) {
  2828. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2829. plat_priv->recovery_pcss_enabled = false;
  2830. return -EINVAL;
  2831. }
  2832. return count;
  2833. }
  2834. static ssize_t shutdown_store(struct device *dev,
  2835. struct device_attribute *attr,
  2836. const char *buf, size_t count)
  2837. {
  2838. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2839. if (plat_priv) {
  2840. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2841. del_timer(&plat_priv->fw_boot_timer);
  2842. complete_all(&plat_priv->power_up_complete);
  2843. complete_all(&plat_priv->cal_complete);
  2844. }
  2845. cnss_pr_dbg("Received shutdown notification\n");
  2846. return count;
  2847. }
  2848. static ssize_t fs_ready_store(struct device *dev,
  2849. struct device_attribute *attr,
  2850. const char *buf, size_t count)
  2851. {
  2852. int fs_ready = 0;
  2853. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2854. if (sscanf(buf, "%du", &fs_ready) != 1)
  2855. return -EINVAL;
  2856. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2857. fs_ready, count);
  2858. if (!plat_priv) {
  2859. cnss_pr_err("plat_priv is NULL\n");
  2860. return count;
  2861. }
  2862. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2863. cnss_pr_dbg("QMI is bypassed\n");
  2864. return count;
  2865. }
  2866. switch (plat_priv->device_id) {
  2867. case QCA6290_DEVICE_ID:
  2868. case QCA6390_DEVICE_ID:
  2869. case QCA6490_DEVICE_ID:
  2870. case KIWI_DEVICE_ID:
  2871. break;
  2872. default:
  2873. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2874. plat_priv->device_id);
  2875. return count;
  2876. }
  2877. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  2878. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2879. cnss_driver_event_post(plat_priv,
  2880. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2881. 0, NULL);
  2882. }
  2883. return count;
  2884. }
  2885. static ssize_t qdss_trace_start_store(struct device *dev,
  2886. struct device_attribute *attr,
  2887. const char *buf, size_t count)
  2888. {
  2889. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2890. wlfw_qdss_trace_start(plat_priv);
  2891. cnss_pr_dbg("Received QDSS start command\n");
  2892. return count;
  2893. }
  2894. static ssize_t qdss_trace_stop_store(struct device *dev,
  2895. struct device_attribute *attr,
  2896. const char *buf, size_t count)
  2897. {
  2898. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2899. u32 option = 0;
  2900. if (sscanf(buf, "%du", &option) != 1)
  2901. return -EINVAL;
  2902. wlfw_qdss_trace_stop(plat_priv, option);
  2903. cnss_pr_dbg("Received QDSS stop command\n");
  2904. return count;
  2905. }
  2906. static ssize_t qdss_conf_download_store(struct device *dev,
  2907. struct device_attribute *attr,
  2908. const char *buf, size_t count)
  2909. {
  2910. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2911. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2912. cnss_pr_dbg("Received QDSS download config command\n");
  2913. return count;
  2914. }
  2915. static ssize_t hw_trace_override_store(struct device *dev,
  2916. struct device_attribute *attr,
  2917. const char *buf, size_t count)
  2918. {
  2919. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2920. int tmp = 0;
  2921. if (sscanf(buf, "%du", &tmp) != 1)
  2922. return -EINVAL;
  2923. plat_priv->hw_trc_override = tmp;
  2924. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2925. return count;
  2926. }
  2927. static ssize_t charger_mode_store(struct device *dev,
  2928. struct device_attribute *attr,
  2929. const char *buf, size_t count)
  2930. {
  2931. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2932. int tmp = 0;
  2933. if (sscanf(buf, "%du", &tmp) != 1)
  2934. return -EINVAL;
  2935. plat_priv->charger_mode = tmp;
  2936. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2937. return count;
  2938. }
  2939. static DEVICE_ATTR_WO(fs_ready);
  2940. static DEVICE_ATTR_WO(shutdown);
  2941. static DEVICE_ATTR_RW(recovery);
  2942. static DEVICE_ATTR_WO(enable_hds);
  2943. static DEVICE_ATTR_WO(qdss_trace_start);
  2944. static DEVICE_ATTR_WO(qdss_trace_stop);
  2945. static DEVICE_ATTR_WO(qdss_conf_download);
  2946. static DEVICE_ATTR_WO(hw_trace_override);
  2947. static DEVICE_ATTR_WO(charger_mode);
  2948. static struct attribute *cnss_attrs[] = {
  2949. &dev_attr_fs_ready.attr,
  2950. &dev_attr_shutdown.attr,
  2951. &dev_attr_recovery.attr,
  2952. &dev_attr_enable_hds.attr,
  2953. &dev_attr_qdss_trace_start.attr,
  2954. &dev_attr_qdss_trace_stop.attr,
  2955. &dev_attr_qdss_conf_download.attr,
  2956. &dev_attr_hw_trace_override.attr,
  2957. &dev_attr_charger_mode.attr,
  2958. NULL,
  2959. };
  2960. static struct attribute_group cnss_attr_group = {
  2961. .attrs = cnss_attrs,
  2962. };
  2963. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2964. {
  2965. struct device *dev = &plat_priv->plat_dev->dev;
  2966. int ret;
  2967. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2968. if (ret) {
  2969. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2970. ret);
  2971. goto out;
  2972. }
  2973. /* This is only for backward compatibility. */
  2974. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2975. if (ret) {
  2976. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2977. ret);
  2978. goto rm_cnss_link;
  2979. }
  2980. return 0;
  2981. rm_cnss_link:
  2982. sysfs_remove_link(kernel_kobj, "cnss");
  2983. out:
  2984. return ret;
  2985. }
  2986. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2987. {
  2988. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2989. sysfs_remove_link(kernel_kobj, "cnss");
  2990. }
  2991. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2992. {
  2993. int ret = 0;
  2994. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  2995. &cnss_attr_group);
  2996. if (ret) {
  2997. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  2998. ret);
  2999. goto out;
  3000. }
  3001. cnss_create_sysfs_link(plat_priv);
  3002. return 0;
  3003. out:
  3004. return ret;
  3005. }
  3006. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3007. {
  3008. cnss_remove_sysfs_link(plat_priv);
  3009. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3010. }
  3011. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3012. {
  3013. spin_lock_init(&plat_priv->event_lock);
  3014. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3015. WQ_UNBOUND, 1);
  3016. if (!plat_priv->event_wq) {
  3017. cnss_pr_err("Failed to create event workqueue!\n");
  3018. return -EFAULT;
  3019. }
  3020. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3021. INIT_LIST_HEAD(&plat_priv->event_list);
  3022. return 0;
  3023. }
  3024. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3025. {
  3026. destroy_workqueue(plat_priv->event_wq);
  3027. }
  3028. static int cnss_reboot_notifier(struct notifier_block *nb,
  3029. unsigned long action,
  3030. void *data)
  3031. {
  3032. struct cnss_plat_data *plat_priv =
  3033. container_of(nb, struct cnss_plat_data, reboot_nb);
  3034. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3035. del_timer(&plat_priv->fw_boot_timer);
  3036. complete_all(&plat_priv->power_up_complete);
  3037. complete_all(&plat_priv->cal_complete);
  3038. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3039. return NOTIFY_DONE;
  3040. }
  3041. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3042. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3043. {
  3044. struct Object client_env;
  3045. struct Object app_object;
  3046. u32 wifi_uid = HW_WIFI_UID;
  3047. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3048. int ret;
  3049. u8 state = 0;
  3050. /* get rootObj */
  3051. ret = get_client_env_object(&client_env);
  3052. if (ret) {
  3053. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3054. goto end;
  3055. }
  3056. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3057. if (ret) {
  3058. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3059. goto exit_release_clientenv;
  3060. }
  3061. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3062. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3063. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3064. ObjectCounts_pack(1, 1, 0, 0));
  3065. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3066. if (ret)
  3067. goto exit_release_app_obj;
  3068. if (state == 1)
  3069. set_bit(CNSS_WLAN_HW_DISABLED,
  3070. &plat_priv->driver_state);
  3071. else
  3072. clear_bit(CNSS_WLAN_HW_DISABLED,
  3073. &plat_priv->driver_state);
  3074. exit_release_app_obj:
  3075. Object_release(app_object);
  3076. exit_release_clientenv:
  3077. Object_release(client_env);
  3078. end:
  3079. if (ret) {
  3080. cnss_pr_err("Unable to get HW disable status\n");
  3081. CNSS_ASSERT(0);
  3082. }
  3083. return ret;
  3084. }
  3085. #else
  3086. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3087. {
  3088. return 0;
  3089. }
  3090. #endif
  3091. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3092. {
  3093. int ret;
  3094. ret = cnss_init_sol_gpio(plat_priv);
  3095. if (ret)
  3096. return ret;
  3097. timer_setup(&plat_priv->fw_boot_timer,
  3098. cnss_bus_fw_boot_timeout_hdlr, 0);
  3099. ret = register_pm_notifier(&cnss_pm_notifier);
  3100. if (ret)
  3101. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3102. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3103. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3104. if (ret)
  3105. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3106. ret);
  3107. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3108. if (ret)
  3109. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3110. ret);
  3111. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3112. init_completion(&plat_priv->power_up_complete);
  3113. init_completion(&plat_priv->cal_complete);
  3114. init_completion(&plat_priv->rddm_complete);
  3115. init_completion(&plat_priv->recovery_complete);
  3116. init_completion(&plat_priv->daemon_connected);
  3117. mutex_init(&plat_priv->dev_lock);
  3118. mutex_init(&plat_priv->driver_ops_lock);
  3119. plat_priv->recovery_ws =
  3120. wakeup_source_register(&plat_priv->plat_dev->dev,
  3121. "CNSS_FW_RECOVERY");
  3122. if (!plat_priv->recovery_ws)
  3123. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3124. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3125. cnss_daemon_connection_update_cb,
  3126. plat_priv);
  3127. if (ret)
  3128. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3129. ret);
  3130. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3131. return 0;
  3132. }
  3133. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3134. {
  3135. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3136. plat_priv);
  3137. complete_all(&plat_priv->recovery_complete);
  3138. complete_all(&plat_priv->rddm_complete);
  3139. complete_all(&plat_priv->cal_complete);
  3140. complete_all(&plat_priv->power_up_complete);
  3141. complete_all(&plat_priv->daemon_connected);
  3142. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3143. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3144. unregister_pm_notifier(&cnss_pm_notifier);
  3145. del_timer(&plat_priv->fw_boot_timer);
  3146. wakeup_source_unregister(plat_priv->recovery_ws);
  3147. cnss_deinit_sol_gpio(plat_priv);
  3148. kfree(plat_priv->sram_dump);
  3149. }
  3150. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3151. {
  3152. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3153. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3154. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3155. "qcom,wlan-cbc-enabled");
  3156. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3157. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3158. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3159. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3160. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3161. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3162. * enabled by default
  3163. */
  3164. plat_priv->adsp_pc_enabled = true;
  3165. }
  3166. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3167. {
  3168. struct device *dev = &plat_priv->plat_dev->dev;
  3169. plat_priv->use_pm_domain =
  3170. of_property_read_bool(dev->of_node, "use-pm-domain");
  3171. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3172. }
  3173. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3174. {
  3175. struct device *dev = &plat_priv->plat_dev->dev;
  3176. plat_priv->set_wlaon_pwr_ctrl =
  3177. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3178. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3179. plat_priv->set_wlaon_pwr_ctrl);
  3180. }
  3181. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3182. {
  3183. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3184. "qcom,converged-dt") ||
  3185. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3186. "qcom,same-dt-multi-dev") ||
  3187. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3188. "qcom,multi-wlan-exchg"));
  3189. }
  3190. static const struct platform_device_id cnss_platform_id_table[] = {
  3191. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3192. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3193. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3194. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3195. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3196. { .name = "qcaconv", .driver_data = 0, },
  3197. { },
  3198. };
  3199. static const struct of_device_id cnss_of_match_table[] = {
  3200. {
  3201. .compatible = "qcom,cnss",
  3202. .data = (void *)&cnss_platform_id_table[0]},
  3203. {
  3204. .compatible = "qcom,cnss-qca6290",
  3205. .data = (void *)&cnss_platform_id_table[1]},
  3206. {
  3207. .compatible = "qcom,cnss-qca6390",
  3208. .data = (void *)&cnss_platform_id_table[2]},
  3209. {
  3210. .compatible = "qcom,cnss-qca6490",
  3211. .data = (void *)&cnss_platform_id_table[3]},
  3212. {
  3213. .compatible = "qcom,cnss-kiwi",
  3214. .data = (void *)&cnss_platform_id_table[4]},
  3215. {
  3216. .compatible = "qcom,cnss-qca-converged",
  3217. .data = (void *)&cnss_platform_id_table[5]},
  3218. { },
  3219. };
  3220. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3221. static inline bool
  3222. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3223. {
  3224. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3225. "use-nv-mac");
  3226. }
  3227. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3228. {
  3229. struct device_node *child;
  3230. u32 id, i;
  3231. int id_n, device_identifier_gpio, ret;
  3232. u8 gpio_value;
  3233. if (!plat_priv->is_converged_dt)
  3234. return 0;
  3235. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3236. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3237. if (ret) {
  3238. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3239. return ret;
  3240. }
  3241. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3242. gpio_value = gpio_get_value(device_identifier_gpio);
  3243. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3244. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3245. child) {
  3246. if (strcmp(child->name, "chip_cfg"))
  3247. continue;
  3248. id_n = of_property_count_u32_elems(child, "supported-ids");
  3249. if (id_n <= 0) {
  3250. cnss_pr_err("Device id is NOT set\n");
  3251. return -EINVAL;
  3252. }
  3253. for (i = 0; i < id_n; i++) {
  3254. ret = of_property_read_u32_index(child,
  3255. "supported-ids",
  3256. i, &id);
  3257. if (ret) {
  3258. cnss_pr_err("Failed to read supported ids\n");
  3259. return -EINVAL;
  3260. }
  3261. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3262. plat_priv->plat_dev->dev.of_node = child;
  3263. plat_priv->device_id = QCA6490_DEVICE_ID;
  3264. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3265. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3266. child->name, i, id);
  3267. return 0;
  3268. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3269. plat_priv->plat_dev->dev.of_node = child;
  3270. plat_priv->device_id = KIWI_DEVICE_ID;
  3271. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3272. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3273. child->name, i, id);
  3274. return 0;
  3275. }
  3276. }
  3277. }
  3278. return -EINVAL;
  3279. }
  3280. static inline bool
  3281. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3282. {
  3283. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3284. "qcom,converged-dt");
  3285. }
  3286. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3287. {
  3288. int ret = 0;
  3289. int retry = 0;
  3290. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3291. return 0;
  3292. retry:
  3293. ret = cnss_power_on_device(plat_priv);
  3294. if (ret)
  3295. goto end;
  3296. ret = cnss_bus_init(plat_priv);
  3297. if (ret) {
  3298. if ((ret != -EPROBE_DEFER) &&
  3299. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3300. cnss_power_off_device(plat_priv);
  3301. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3302. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3303. goto retry;
  3304. }
  3305. goto power_off;
  3306. }
  3307. power_off:
  3308. cnss_power_off_device(plat_priv);
  3309. end:
  3310. return ret;
  3311. }
  3312. int cnss_wlan_hw_enable(void)
  3313. {
  3314. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3315. int ret = 0;
  3316. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3317. ret = cnss_wlan_device_init(plat_priv);
  3318. if (ret) {
  3319. CNSS_ASSERT(0);
  3320. return ret;
  3321. }
  3322. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3323. cnss_driver_event_post(plat_priv,
  3324. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3325. 0, NULL);
  3326. if (plat_priv->driver_ops)
  3327. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3328. return ret;
  3329. }
  3330. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3331. static int cnss_probe(struct platform_device *plat_dev)
  3332. {
  3333. int ret = 0;
  3334. struct cnss_plat_data *plat_priv;
  3335. const struct of_device_id *of_id;
  3336. const struct platform_device_id *device_id;
  3337. if (cnss_get_plat_priv(plat_dev)) {
  3338. cnss_pr_err("Driver is already initialized!\n");
  3339. ret = -EEXIST;
  3340. goto out;
  3341. }
  3342. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3343. if (!of_id || !of_id->data) {
  3344. cnss_pr_err("Failed to find of match device!\n");
  3345. ret = -ENODEV;
  3346. goto out;
  3347. }
  3348. device_id = of_id->data;
  3349. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3350. GFP_KERNEL);
  3351. if (!plat_priv) {
  3352. ret = -ENOMEM;
  3353. goto out;
  3354. }
  3355. plat_priv->plat_dev = plat_dev;
  3356. plat_priv->device_id = device_id->driver_data;
  3357. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3358. plat_priv->use_fw_path_with_prefix =
  3359. cnss_use_fw_path_with_prefix(plat_priv);
  3360. ret = cnss_get_dev_cfg_node(plat_priv);
  3361. if (ret) {
  3362. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3363. goto reset_plat_dev;
  3364. }
  3365. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3366. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3367. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3368. cnss_set_plat_priv(plat_dev, plat_priv);
  3369. platform_set_drvdata(plat_dev, plat_priv);
  3370. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3371. INIT_LIST_HEAD(&plat_priv->clk_list);
  3372. cnss_get_pm_domain_info(plat_priv);
  3373. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3374. cnss_power_misc_params_init(plat_priv);
  3375. cnss_get_tcs_info(plat_priv);
  3376. cnss_get_cpr_info(plat_priv);
  3377. cnss_aop_mbox_init(plat_priv);
  3378. cnss_init_control_params(plat_priv);
  3379. ret = cnss_get_resources(plat_priv);
  3380. if (ret)
  3381. goto reset_ctx;
  3382. ret = cnss_register_esoc(plat_priv);
  3383. if (ret)
  3384. goto free_res;
  3385. ret = cnss_register_bus_scale(plat_priv);
  3386. if (ret)
  3387. goto unreg_esoc;
  3388. ret = cnss_create_sysfs(plat_priv);
  3389. if (ret)
  3390. goto unreg_bus_scale;
  3391. ret = cnss_event_work_init(plat_priv);
  3392. if (ret)
  3393. goto remove_sysfs;
  3394. ret = cnss_qmi_init(plat_priv);
  3395. if (ret)
  3396. goto deinit_event_work;
  3397. ret = cnss_dms_init(plat_priv);
  3398. if (ret)
  3399. goto deinit_qmi;
  3400. ret = cnss_debugfs_create(plat_priv);
  3401. if (ret)
  3402. goto deinit_dms;
  3403. ret = cnss_misc_init(plat_priv);
  3404. if (ret)
  3405. goto destroy_debugfs;
  3406. ret = cnss_wlan_hw_disable_check(plat_priv);
  3407. if (ret)
  3408. goto deinit_misc;
  3409. /* Make sure all platform related init are done before
  3410. * device power on and bus init.
  3411. */
  3412. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3413. ret = cnss_wlan_device_init(plat_priv);
  3414. if (ret)
  3415. goto deinit_misc;
  3416. } else {
  3417. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3418. }
  3419. cnss_register_coex_service(plat_priv);
  3420. cnss_register_ims_service(plat_priv);
  3421. ret = cnss_genl_init();
  3422. if (ret < 0)
  3423. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3424. cnss_pr_info("Platform driver probed successfully.\n");
  3425. return 0;
  3426. deinit_misc:
  3427. cnss_misc_deinit(plat_priv);
  3428. destroy_debugfs:
  3429. cnss_debugfs_destroy(plat_priv);
  3430. deinit_dms:
  3431. cnss_dms_deinit(plat_priv);
  3432. deinit_qmi:
  3433. cnss_qmi_deinit(plat_priv);
  3434. deinit_event_work:
  3435. cnss_event_work_deinit(plat_priv);
  3436. remove_sysfs:
  3437. cnss_remove_sysfs(plat_priv);
  3438. unreg_bus_scale:
  3439. cnss_unregister_bus_scale(plat_priv);
  3440. unreg_esoc:
  3441. cnss_unregister_esoc(plat_priv);
  3442. free_res:
  3443. cnss_put_resources(plat_priv);
  3444. reset_ctx:
  3445. platform_set_drvdata(plat_dev, NULL);
  3446. reset_plat_dev:
  3447. cnss_set_plat_priv(plat_dev, NULL);
  3448. out:
  3449. return ret;
  3450. }
  3451. static int cnss_remove(struct platform_device *plat_dev)
  3452. {
  3453. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3454. cnss_genl_exit();
  3455. cnss_unregister_ims_service(plat_priv);
  3456. cnss_unregister_coex_service(plat_priv);
  3457. cnss_bus_deinit(plat_priv);
  3458. cnss_misc_deinit(plat_priv);
  3459. cnss_debugfs_destroy(plat_priv);
  3460. cnss_dms_deinit(plat_priv);
  3461. cnss_qmi_deinit(plat_priv);
  3462. cnss_event_work_deinit(plat_priv);
  3463. cnss_remove_sysfs(plat_priv);
  3464. cnss_unregister_bus_scale(plat_priv);
  3465. cnss_unregister_esoc(plat_priv);
  3466. cnss_put_resources(plat_priv);
  3467. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3468. mbox_free_channel(plat_priv->mbox_chan);
  3469. platform_set_drvdata(plat_dev, NULL);
  3470. plat_env = NULL;
  3471. return 0;
  3472. }
  3473. static struct platform_driver cnss_platform_driver = {
  3474. .probe = cnss_probe,
  3475. .remove = cnss_remove,
  3476. .driver = {
  3477. .name = "cnss2",
  3478. .of_match_table = cnss_of_match_table,
  3479. #ifdef CONFIG_CNSS_ASYNC
  3480. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3481. #endif
  3482. },
  3483. };
  3484. static bool cnss_check_compatible_node(void)
  3485. {
  3486. struct device_node *dn = NULL;
  3487. for_each_matching_node(dn, cnss_of_match_table) {
  3488. if (of_device_is_available(dn)) {
  3489. cnss_allow_driver_loading = true;
  3490. return true;
  3491. }
  3492. }
  3493. return false;
  3494. }
  3495. /**
  3496. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3497. *
  3498. * Valid device tree node means a node with "compatible" property from the
  3499. * device match table and "status" property is not disabled.
  3500. *
  3501. * Return: true if valid device tree node found, false if not found
  3502. */
  3503. static bool cnss_is_valid_dt_node_found(void)
  3504. {
  3505. struct device_node *dn = NULL;
  3506. for_each_matching_node(dn, cnss_of_match_table) {
  3507. if (of_device_is_available(dn))
  3508. break;
  3509. }
  3510. if (dn)
  3511. return true;
  3512. return false;
  3513. }
  3514. static int __init cnss_initialize(void)
  3515. {
  3516. int ret = 0;
  3517. if (!cnss_is_valid_dt_node_found())
  3518. return -ENODEV;
  3519. if (!cnss_check_compatible_node())
  3520. return ret;
  3521. cnss_debug_init();
  3522. ret = platform_driver_register(&cnss_platform_driver);
  3523. if (ret)
  3524. cnss_debug_deinit();
  3525. return ret;
  3526. }
  3527. static void __exit cnss_exit(void)
  3528. {
  3529. platform_driver_unregister(&cnss_platform_driver);
  3530. cnss_debug_deinit();
  3531. }
  3532. module_init(cnss_initialize);
  3533. module_exit(cnss_exit);
  3534. MODULE_LICENSE("GPL v2");
  3535. MODULE_DESCRIPTION("CNSS2 Platform Driver");