qmi.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define CE_MSI_NAME "CE"
  39. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  40. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  41. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  43. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  44. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  45. #define DMS_QMI_MAX_MSG_LEN SZ_256
  46. #define MAX_SHADOW_REG_RESERVED 2
  47. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  48. MAX_SHADOW_REG_RESERVED)
  49. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  50. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  51. enum nm_modem_bit {
  52. SLEEP_CLOCK_SELECT_INTERNAL_BIT = BIT(1),
  53. HOST_CSTATE_BIT = BIT(2),
  54. };
  55. #ifdef CONFIG_CNSS2_DEBUG
  56. static bool ignore_qmi_failure;
  57. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  58. void cnss_ignore_qmi_failure(bool ignore)
  59. {
  60. ignore_qmi_failure = ignore;
  61. }
  62. #else
  63. #define CNSS_QMI_ASSERT() do { } while (0)
  64. void cnss_ignore_qmi_failure(bool ignore) { }
  65. #endif
  66. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  67. {
  68. switch (mode) {
  69. case CNSS_MISSION:
  70. return "MISSION";
  71. case CNSS_FTM:
  72. return "FTM";
  73. case CNSS_EPPING:
  74. return "EPPING";
  75. case CNSS_WALTEST:
  76. return "WALTEST";
  77. case CNSS_OFF:
  78. return "OFF";
  79. case CNSS_CCPM:
  80. return "CCPM";
  81. case CNSS_QVIT:
  82. return "QVIT";
  83. case CNSS_CALIBRATION:
  84. return "CALIBRATION";
  85. default:
  86. return "UNKNOWN";
  87. }
  88. }
  89. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  90. struct qmi_elem_info *req_ei,
  91. struct qmi_elem_info *rsp_ei,
  92. int req_id, size_t req_len,
  93. unsigned long timeout)
  94. {
  95. struct qmi_txn txn;
  96. int ret;
  97. char *err_msg;
  98. struct qmi_response_type_v01 *resp = rsp;
  99. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  100. if (ret < 0) {
  101. err_msg = "Qmi fail: fail to init txn,";
  102. goto out;
  103. }
  104. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  105. req_len, req_ei, req);
  106. if (ret < 0) {
  107. qmi_txn_cancel(&txn);
  108. err_msg = "Qmi fail: fail to send req,";
  109. goto out;
  110. }
  111. ret = qmi_txn_wait(&txn, timeout);
  112. if (ret < 0) {
  113. err_msg = "Qmi fail: wait timeout,";
  114. goto out;
  115. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  116. err_msg = "Qmi fail: request rejected,";
  117. cnss_pr_err("Qmi fail: respons with error:%d\n",
  118. resp->error);
  119. ret = -resp->result;
  120. goto out;
  121. }
  122. cnss_pr_dbg("req %x success\n", req_id);
  123. return 0;
  124. out:
  125. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  126. return ret;
  127. }
  128. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  129. {
  130. struct wlfw_ind_register_req_msg_v01 *req;
  131. struct wlfw_ind_register_resp_msg_v01 *resp;
  132. struct qmi_txn txn;
  133. int ret = 0;
  134. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  135. plat_priv->driver_state);
  136. req = kzalloc(sizeof(*req), GFP_KERNEL);
  137. if (!req)
  138. return -ENOMEM;
  139. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  140. if (!resp) {
  141. kfree(req);
  142. return -ENOMEM;
  143. }
  144. req->client_id_valid = 1;
  145. req->client_id = WLFW_CLIENT_ID;
  146. req->request_mem_enable_valid = 1;
  147. req->request_mem_enable = 1;
  148. req->fw_mem_ready_enable_valid = 1;
  149. req->fw_mem_ready_enable = 1;
  150. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  151. req->fw_init_done_enable_valid = 1;
  152. req->fw_init_done_enable = 1;
  153. req->pin_connect_result_enable_valid = 1;
  154. req->pin_connect_result_enable = 1;
  155. req->cal_done_enable_valid = 1;
  156. req->cal_done_enable = 1;
  157. req->qdss_trace_req_mem_enable_valid = 1;
  158. req->qdss_trace_req_mem_enable = 1;
  159. req->qdss_trace_save_enable_valid = 1;
  160. req->qdss_trace_save_enable = 1;
  161. req->qdss_trace_free_enable_valid = 1;
  162. req->qdss_trace_free_enable = 1;
  163. req->respond_get_info_enable_valid = 1;
  164. req->respond_get_info_enable = 1;
  165. req->wfc_call_twt_config_enable_valid = 1;
  166. req->wfc_call_twt_config_enable = 1;
  167. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  168. wlfw_ind_register_resp_msg_v01_ei, resp);
  169. if (ret < 0) {
  170. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  171. ret);
  172. goto out;
  173. }
  174. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  175. QMI_WLFW_IND_REGISTER_REQ_V01,
  176. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  177. wlfw_ind_register_req_msg_v01_ei, req);
  178. if (ret < 0) {
  179. qmi_txn_cancel(&txn);
  180. cnss_pr_err("Failed to send indication register request, err: %d\n",
  181. ret);
  182. goto out;
  183. }
  184. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  185. if (ret < 0) {
  186. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  187. ret);
  188. goto out;
  189. }
  190. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  191. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  192. resp->resp.result, resp->resp.error);
  193. ret = -resp->resp.result;
  194. goto out;
  195. }
  196. if (resp->fw_status_valid) {
  197. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  198. ret = -EALREADY;
  199. goto qmi_registered;
  200. }
  201. }
  202. kfree(req);
  203. kfree(resp);
  204. return 0;
  205. out:
  206. CNSS_QMI_ASSERT();
  207. qmi_registered:
  208. kfree(req);
  209. kfree(resp);
  210. return ret;
  211. }
  212. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  213. struct wlfw_host_cap_req_msg_v01 *req)
  214. {
  215. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  216. plat_priv->device_id == MANGO_DEVICE_ID ||
  217. plat_priv->device_id == PEACH_DEVICE_ID) {
  218. req->mlo_capable_valid = 1;
  219. req->mlo_capable = 1;
  220. req->mlo_chip_id_valid = 1;
  221. req->mlo_chip_id = 0;
  222. req->mlo_group_id_valid = 1;
  223. req->mlo_group_id = 0;
  224. req->max_mlo_peer_valid = 1;
  225. /* Max peer number generally won't change for the same device
  226. * but needs to be synced with host driver.
  227. */
  228. req->max_mlo_peer = 32;
  229. req->mlo_num_chips_valid = 1;
  230. req->mlo_num_chips = 1;
  231. req->mlo_chip_info_valid = 1;
  232. req->mlo_chip_info[0].chip_id = 0;
  233. req->mlo_chip_info[0].num_local_links = 2;
  234. req->mlo_chip_info[0].hw_link_id[0] = 0;
  235. req->mlo_chip_info[0].hw_link_id[1] = 1;
  236. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  237. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  238. }
  239. }
  240. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  241. {
  242. struct wlfw_host_cap_req_msg_v01 *req;
  243. struct wlfw_host_cap_resp_msg_v01 *resp;
  244. struct qmi_txn txn;
  245. int ret = 0;
  246. u64 iova_start = 0, iova_size = 0,
  247. iova_ipa_start = 0, iova_ipa_size = 0;
  248. u64 feature_list = 0;
  249. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  250. plat_priv->driver_state);
  251. req = kzalloc(sizeof(*req), GFP_KERNEL);
  252. if (!req)
  253. return -ENOMEM;
  254. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  255. if (!resp) {
  256. kfree(req);
  257. return -ENOMEM;
  258. }
  259. req->num_clients_valid = 1;
  260. req->num_clients = 1;
  261. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  262. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  263. if (req->wake_msi) {
  264. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  265. req->wake_msi_valid = 1;
  266. }
  267. req->bdf_support_valid = 1;
  268. req->bdf_support = 1;
  269. req->m3_support_valid = 1;
  270. req->m3_support = 1;
  271. req->m3_cache_support_valid = 1;
  272. req->m3_cache_support = 1;
  273. req->cal_done_valid = 1;
  274. req->cal_done = plat_priv->cal_done;
  275. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  276. if (plat_priv->sleep_clk) {
  277. req->nm_modem_valid = 1;
  278. /* Notify firmware about the sleep clock selection,
  279. * nm_modem_bit[1] is used for this purpose.
  280. */
  281. req->nm_modem |= SLEEP_CLOCK_SELECT_INTERNAL_BIT;
  282. }
  283. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  284. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  285. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  286. &iova_ipa_size)) {
  287. req->ddr_range_valid = 1;
  288. req->ddr_range[0].start = iova_start;
  289. req->ddr_range[0].size = iova_size + iova_ipa_size;
  290. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  291. req->ddr_range[0].start, req->ddr_range[0].size);
  292. }
  293. req->host_build_type_valid = 1;
  294. req->host_build_type = cnss_get_host_build_type();
  295. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  296. ret = cnss_get_feature_list(plat_priv, &feature_list);
  297. if (!ret) {
  298. req->feature_list_valid = 1;
  299. req->feature_list = feature_list;
  300. cnss_pr_dbg("Sending feature list 0x%llx\n",
  301. req->feature_list);
  302. }
  303. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  304. wlfw_host_cap_resp_msg_v01_ei, resp);
  305. if (ret < 0) {
  306. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  307. ret);
  308. goto out;
  309. }
  310. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  311. QMI_WLFW_HOST_CAP_REQ_V01,
  312. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  313. wlfw_host_cap_req_msg_v01_ei, req);
  314. if (ret < 0) {
  315. qmi_txn_cancel(&txn);
  316. cnss_pr_err("Failed to send host capability request, err: %d\n",
  317. ret);
  318. goto out;
  319. }
  320. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  321. if (ret < 0) {
  322. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  323. ret);
  324. goto out;
  325. }
  326. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  327. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  328. resp->resp.result, resp->resp.error);
  329. ret = -resp->resp.result;
  330. goto out;
  331. }
  332. kfree(req);
  333. kfree(resp);
  334. return 0;
  335. out:
  336. CNSS_QMI_ASSERT();
  337. kfree(req);
  338. kfree(resp);
  339. return ret;
  340. }
  341. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  342. {
  343. struct wlfw_respond_mem_req_msg_v01 *req;
  344. struct wlfw_respond_mem_resp_msg_v01 *resp;
  345. struct qmi_txn txn;
  346. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  347. int ret = 0, i;
  348. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  349. plat_priv->driver_state);
  350. req = kzalloc(sizeof(*req), GFP_KERNEL);
  351. if (!req)
  352. return -ENOMEM;
  353. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  354. if (!resp) {
  355. kfree(req);
  356. return -ENOMEM;
  357. }
  358. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  359. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  360. ret = -EINVAL;
  361. goto out;
  362. }
  363. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  364. for (i = 0; i < req->mem_seg_len; i++) {
  365. if (!fw_mem[i].pa || !fw_mem[i].size) {
  366. if (fw_mem[i].type == 0) {
  367. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  368. i);
  369. ret = -EINVAL;
  370. goto out;
  371. }
  372. cnss_pr_err("Memory for FW is not available for type: %u\n",
  373. fw_mem[i].type);
  374. ret = -ENOMEM;
  375. goto out;
  376. }
  377. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  378. fw_mem[i].va, &fw_mem[i].pa,
  379. fw_mem[i].size, fw_mem[i].type);
  380. req->mem_seg[i].addr = fw_mem[i].pa;
  381. req->mem_seg[i].size = fw_mem[i].size;
  382. req->mem_seg[i].type = fw_mem[i].type;
  383. }
  384. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  385. wlfw_respond_mem_resp_msg_v01_ei, resp);
  386. if (ret < 0) {
  387. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  388. ret);
  389. goto out;
  390. }
  391. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  392. QMI_WLFW_RESPOND_MEM_REQ_V01,
  393. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  394. wlfw_respond_mem_req_msg_v01_ei, req);
  395. if (ret < 0) {
  396. qmi_txn_cancel(&txn);
  397. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  398. ret);
  399. goto out;
  400. }
  401. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  402. if (ret < 0) {
  403. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  404. ret);
  405. goto out;
  406. }
  407. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  408. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  409. resp->resp.result, resp->resp.error);
  410. ret = -resp->resp.result;
  411. goto out;
  412. }
  413. kfree(req);
  414. kfree(resp);
  415. return 0;
  416. out:
  417. CNSS_QMI_ASSERT();
  418. kfree(req);
  419. kfree(resp);
  420. return ret;
  421. }
  422. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  423. {
  424. struct wlfw_cap_req_msg_v01 *req;
  425. struct wlfw_cap_resp_msg_v01 *resp;
  426. struct qmi_txn txn;
  427. char *fw_build_timestamp;
  428. int ret = 0, i;
  429. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  430. plat_priv->driver_state);
  431. req = kzalloc(sizeof(*req), GFP_KERNEL);
  432. if (!req)
  433. return -ENOMEM;
  434. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  435. if (!resp) {
  436. kfree(req);
  437. return -ENOMEM;
  438. }
  439. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  440. wlfw_cap_resp_msg_v01_ei, resp);
  441. if (ret < 0) {
  442. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  443. ret);
  444. goto out;
  445. }
  446. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  447. QMI_WLFW_CAP_REQ_V01,
  448. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  449. wlfw_cap_req_msg_v01_ei, req);
  450. if (ret < 0) {
  451. qmi_txn_cancel(&txn);
  452. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  453. ret);
  454. goto out;
  455. }
  456. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  457. if (ret < 0) {
  458. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  459. ret);
  460. goto out;
  461. }
  462. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  463. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  464. resp->resp.result, resp->resp.error);
  465. ret = -resp->resp.result;
  466. goto out;
  467. }
  468. if (resp->chip_info_valid) {
  469. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  470. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  471. }
  472. if (resp->board_info_valid)
  473. plat_priv->board_info.board_id = resp->board_info.board_id;
  474. else
  475. plat_priv->board_info.board_id = 0xFF;
  476. if (resp->soc_info_valid)
  477. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  478. if (resp->fw_version_info_valid) {
  479. plat_priv->fw_version_info.fw_version =
  480. resp->fw_version_info.fw_version;
  481. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  482. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  483. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  484. resp->fw_version_info.fw_build_timestamp,
  485. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  486. }
  487. if (resp->fw_build_id_valid) {
  488. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  489. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  490. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  491. }
  492. /* FW will send aop retention volatage for qca6490 */
  493. if (resp->voltage_mv_valid) {
  494. plat_priv->cpr_info.voltage = resp->voltage_mv;
  495. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  496. plat_priv->cpr_info.voltage);
  497. cnss_update_cpr_info(plat_priv);
  498. }
  499. if (resp->time_freq_hz_valid) {
  500. plat_priv->device_freq_hz = resp->time_freq_hz;
  501. cnss_pr_dbg("Device frequency is %d HZ\n",
  502. plat_priv->device_freq_hz);
  503. }
  504. if (resp->otp_version_valid)
  505. plat_priv->otp_version = resp->otp_version;
  506. if (resp->dev_mem_info_valid) {
  507. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  508. plat_priv->dev_mem_info[i].start =
  509. resp->dev_mem_info[i].start;
  510. plat_priv->dev_mem_info[i].size =
  511. resp->dev_mem_info[i].size;
  512. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  513. i, plat_priv->dev_mem_info[i].start,
  514. plat_priv->dev_mem_info[i].size);
  515. }
  516. }
  517. if (resp->fw_caps_valid) {
  518. plat_priv->fw_pcie_gen_switch =
  519. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  520. plat_priv->fw_caps = resp->fw_caps;
  521. }
  522. if (resp->hang_data_length_valid &&
  523. resp->hang_data_length &&
  524. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  525. plat_priv->hang_event_data_len = resp->hang_data_length;
  526. else
  527. plat_priv->hang_event_data_len = 0;
  528. if (resp->hang_data_addr_offset_valid)
  529. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  530. else
  531. plat_priv->hang_data_addr_offset = 0;
  532. if (resp->hwid_bitmap_valid)
  533. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  534. if (resp->ol_cpr_cfg_valid)
  535. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  536. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  537. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  538. **/
  539. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  540. if (plat_priv->board_info.board_id ==
  541. plat_priv->on_chip_pmic_board_ids[i]) {
  542. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  543. plat_priv->board_info.board_id);
  544. ret = cnss_aop_send_msg(plat_priv,
  545. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  546. if (ret < 0)
  547. cnss_pr_dbg("Failed to Send AOP Msg");
  548. break;
  549. }
  550. }
  551. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  552. plat_priv->chip_info.chip_id,
  553. plat_priv->chip_info.chip_family,
  554. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  555. plat_priv->otp_version);
  556. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  557. plat_priv->fw_version_info.fw_version,
  558. plat_priv->fw_version_info.fw_build_timestamp,
  559. plat_priv->fw_build_id,
  560. plat_priv->hwid_bitmap);
  561. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  562. plat_priv->hang_event_data_len,
  563. plat_priv->hang_data_addr_offset);
  564. kfree(req);
  565. kfree(resp);
  566. return 0;
  567. out:
  568. CNSS_QMI_ASSERT();
  569. kfree(req);
  570. kfree(resp);
  571. return ret;
  572. }
  573. static char *cnss_bdf_type_to_str(enum cnss_bdf_type bdf_type)
  574. {
  575. switch (bdf_type) {
  576. case CNSS_BDF_BIN:
  577. case CNSS_BDF_ELF:
  578. return "BDF";
  579. case CNSS_BDF_REGDB:
  580. return "REGDB";
  581. case CNSS_BDF_HDS:
  582. return "HDS";
  583. default:
  584. return "UNKNOWN";
  585. }
  586. }
  587. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  588. u32 bdf_type, char *filename,
  589. u32 filename_len)
  590. {
  591. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  592. int ret = 0;
  593. switch (bdf_type) {
  594. case CNSS_BDF_ELF:
  595. /* Board ID will be equal or less than 0xFF in GF mask case */
  596. if (plat_priv->board_info.board_id == 0xFF) {
  597. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  598. snprintf(filename_tmp, filename_len,
  599. ELF_BDF_FILE_NAME_GF);
  600. else
  601. snprintf(filename_tmp, filename_len,
  602. ELF_BDF_FILE_NAME);
  603. } else if (plat_priv->board_info.board_id < 0xFF) {
  604. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  605. snprintf(filename_tmp, filename_len,
  606. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  607. plat_priv->board_info.board_id);
  608. else
  609. snprintf(filename_tmp, filename_len,
  610. ELF_BDF_FILE_NAME_PREFIX "%02x",
  611. plat_priv->board_info.board_id);
  612. } else {
  613. snprintf(filename_tmp, filename_len,
  614. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  615. plat_priv->board_info.board_id >> 8 & 0xFF,
  616. plat_priv->board_info.board_id & 0xFF);
  617. }
  618. break;
  619. case CNSS_BDF_BIN:
  620. if (plat_priv->board_info.board_id == 0xFF) {
  621. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  622. snprintf(filename_tmp, filename_len,
  623. BIN_BDF_FILE_NAME_GF);
  624. else
  625. snprintf(filename_tmp, filename_len,
  626. BIN_BDF_FILE_NAME);
  627. } else if (plat_priv->board_info.board_id < 0xFF) {
  628. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  629. snprintf(filename_tmp, filename_len,
  630. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  631. plat_priv->board_info.board_id);
  632. else
  633. snprintf(filename_tmp, filename_len,
  634. BIN_BDF_FILE_NAME_PREFIX "%02x",
  635. plat_priv->board_info.board_id);
  636. } else {
  637. snprintf(filename_tmp, filename_len,
  638. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  639. plat_priv->board_info.board_id >> 8 & 0xFF,
  640. plat_priv->board_info.board_id & 0xFF);
  641. }
  642. break;
  643. case CNSS_BDF_REGDB:
  644. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  645. break;
  646. case CNSS_BDF_HDS:
  647. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  648. break;
  649. default:
  650. cnss_pr_err("Invalid BDF type: %d\n",
  651. plat_priv->ctrl_params.bdf_type);
  652. ret = -EINVAL;
  653. break;
  654. }
  655. if (!ret)
  656. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  657. return ret;
  658. }
  659. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  660. enum wlfw_ini_file_type_v01 file_type)
  661. {
  662. struct wlfw_ini_file_download_req_msg_v01 *req;
  663. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  664. struct qmi_txn txn;
  665. int ret = 0;
  666. const struct firmware *fw;
  667. char filename[INI_FILE_NAME_LEN] = {0};
  668. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  669. const u8 *temp;
  670. unsigned int remaining;
  671. bool backup_supported = false;
  672. req = kzalloc(sizeof(*req), GFP_KERNEL);
  673. if (!req)
  674. return -ENOMEM;
  675. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  676. if (!resp) {
  677. kfree(req);
  678. return -ENOMEM;
  679. }
  680. switch (file_type) {
  681. case WLFW_CONN_ROAM_INI_V01:
  682. snprintf(tmp_filename, sizeof(tmp_filename),
  683. CONN_ROAM_FILE_NAME);
  684. backup_supported = true;
  685. break;
  686. default:
  687. cnss_pr_err("Invalid file type: %u\n", file_type);
  688. ret = -EINVAL;
  689. goto err_req_fw;
  690. }
  691. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  692. /* Fetch the file */
  693. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  694. if (ret) {
  695. if (!backup_supported)
  696. goto err_req_fw;
  697. snprintf(filename, sizeof(filename),
  698. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  699. ret = firmware_request_nowarn(&fw, filename,
  700. &plat_priv->plat_dev->dev);
  701. if (ret)
  702. goto err_req_fw;
  703. }
  704. temp = fw->data;
  705. remaining = fw->size;
  706. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  707. remaining);
  708. while (remaining) {
  709. req->file_type_valid = 1;
  710. req->file_type = file_type;
  711. req->total_size_valid = 1;
  712. req->total_size = remaining;
  713. req->seg_id_valid = 1;
  714. req->data_valid = 1;
  715. req->end_valid = 1;
  716. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  717. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  718. } else {
  719. req->data_len = remaining;
  720. req->end = 1;
  721. }
  722. memcpy(req->data, temp, req->data_len);
  723. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  724. wlfw_ini_file_download_resp_msg_v01_ei,
  725. resp);
  726. if (ret < 0) {
  727. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  728. ret);
  729. goto err;
  730. }
  731. ret = qmi_send_request
  732. (&plat_priv->qmi_wlfw, NULL, &txn,
  733. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  734. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  735. wlfw_ini_file_download_req_msg_v01_ei, req);
  736. if (ret < 0) {
  737. qmi_txn_cancel(&txn);
  738. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  739. ret);
  740. goto err;
  741. }
  742. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  743. if (ret < 0) {
  744. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  745. ret);
  746. goto err;
  747. }
  748. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  749. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  750. resp->resp.result, resp->resp.error);
  751. ret = -resp->resp.result;
  752. goto err;
  753. }
  754. remaining -= req->data_len;
  755. temp += req->data_len;
  756. req->seg_id++;
  757. }
  758. release_firmware(fw);
  759. kfree(req);
  760. kfree(resp);
  761. return 0;
  762. err:
  763. release_firmware(fw);
  764. err_req_fw:
  765. kfree(req);
  766. kfree(resp);
  767. return ret;
  768. }
  769. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  770. u32 bdf_type)
  771. {
  772. struct wlfw_bdf_download_req_msg_v01 *req;
  773. struct wlfw_bdf_download_resp_msg_v01 *resp;
  774. struct qmi_txn txn;
  775. char filename[MAX_FIRMWARE_NAME_LEN];
  776. const struct firmware *fw_entry = NULL;
  777. const u8 *temp;
  778. unsigned int remaining;
  779. int ret = 0;
  780. cnss_pr_dbg("Sending QMI_WLFW_BDF_DOWNLOAD_REQ_V01 message for bdf_type: %d (%s), state: 0x%lx\n",
  781. bdf_type, cnss_bdf_type_to_str(bdf_type), plat_priv->driver_state);
  782. req = kzalloc(sizeof(*req), GFP_KERNEL);
  783. if (!req)
  784. return -ENOMEM;
  785. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  786. if (!resp) {
  787. kfree(req);
  788. return -ENOMEM;
  789. }
  790. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  791. filename, sizeof(filename));
  792. if (ret)
  793. goto err_req_fw;
  794. if (bdf_type == CNSS_BDF_REGDB)
  795. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  796. filename);
  797. else
  798. ret = firmware_request_nowarn(&fw_entry, filename,
  799. &plat_priv->plat_dev->dev);
  800. if (ret) {
  801. cnss_pr_err("Failed to load %s: %s, ret: %d\n",
  802. cnss_bdf_type_to_str(bdf_type), filename, ret);
  803. goto err_req_fw;
  804. }
  805. temp = fw_entry->data;
  806. remaining = fw_entry->size;
  807. cnss_pr_dbg("Downloading %s: %s, size: %u\n",
  808. cnss_bdf_type_to_str(bdf_type), filename, remaining);
  809. while (remaining) {
  810. req->valid = 1;
  811. req->file_id_valid = 1;
  812. req->file_id = plat_priv->board_info.board_id;
  813. req->total_size_valid = 1;
  814. req->total_size = remaining;
  815. req->seg_id_valid = 1;
  816. req->data_valid = 1;
  817. req->end_valid = 1;
  818. req->bdf_type_valid = 1;
  819. req->bdf_type = bdf_type;
  820. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  821. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  822. } else {
  823. req->data_len = remaining;
  824. req->end = 1;
  825. }
  826. memcpy(req->data, temp, req->data_len);
  827. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  828. wlfw_bdf_download_resp_msg_v01_ei, resp);
  829. if (ret < 0) {
  830. cnss_pr_err("Failed to initialize txn for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  831. cnss_bdf_type_to_str(bdf_type), ret);
  832. goto err_send;
  833. }
  834. ret = qmi_send_request
  835. (&plat_priv->qmi_wlfw, NULL, &txn,
  836. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  837. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  838. wlfw_bdf_download_req_msg_v01_ei, req);
  839. if (ret < 0) {
  840. qmi_txn_cancel(&txn);
  841. cnss_pr_err("Failed to send QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  842. cnss_bdf_type_to_str(bdf_type), ret);
  843. goto err_send;
  844. }
  845. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  846. if (ret < 0) {
  847. cnss_pr_err("Timeout while waiting for FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, err: %d\n",
  848. cnss_bdf_type_to_str(bdf_type), ret);
  849. goto err_send;
  850. }
  851. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  852. cnss_pr_err("FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s failed, result: %d, err: %d\n",
  853. cnss_bdf_type_to_str(bdf_type), resp->resp.result,
  854. resp->resp.error);
  855. ret = -resp->resp.result;
  856. goto err_send;
  857. }
  858. remaining -= req->data_len;
  859. temp += req->data_len;
  860. req->seg_id++;
  861. }
  862. release_firmware(fw_entry);
  863. if (resp->host_bdf_data_valid) {
  864. /* QCA6490 enable S3E regulator for IPA configuration only */
  865. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  866. cnss_enable_int_pow_amp_vreg(plat_priv);
  867. plat_priv->cbc_file_download =
  868. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  869. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  870. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  871. plat_priv->cbc_file_download);
  872. }
  873. kfree(req);
  874. kfree(resp);
  875. return 0;
  876. err_send:
  877. release_firmware(fw_entry);
  878. err_req_fw:
  879. if (!(bdf_type == CNSS_BDF_REGDB ||
  880. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  881. ret == -EAGAIN))
  882. CNSS_QMI_ASSERT();
  883. kfree(req);
  884. kfree(resp);
  885. return ret;
  886. }
  887. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  888. {
  889. struct wlfw_m3_info_req_msg_v01 *req;
  890. struct wlfw_m3_info_resp_msg_v01 *resp;
  891. struct qmi_txn txn;
  892. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  893. int ret = 0;
  894. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  895. plat_priv->driver_state);
  896. req = kzalloc(sizeof(*req), GFP_KERNEL);
  897. if (!req)
  898. return -ENOMEM;
  899. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  900. if (!resp) {
  901. kfree(req);
  902. return -ENOMEM;
  903. }
  904. if (!m3_mem->pa || !m3_mem->size) {
  905. cnss_pr_err("Memory for M3 is not available\n");
  906. ret = -ENOMEM;
  907. goto out;
  908. }
  909. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  910. m3_mem->va, &m3_mem->pa, m3_mem->size);
  911. req->addr = plat_priv->m3_mem.pa;
  912. req->size = plat_priv->m3_mem.size;
  913. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  914. wlfw_m3_info_resp_msg_v01_ei, resp);
  915. if (ret < 0) {
  916. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  917. ret);
  918. goto out;
  919. }
  920. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  921. QMI_WLFW_M3_INFO_REQ_V01,
  922. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  923. wlfw_m3_info_req_msg_v01_ei, req);
  924. if (ret < 0) {
  925. qmi_txn_cancel(&txn);
  926. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  927. ret);
  928. goto out;
  929. }
  930. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  931. if (ret < 0) {
  932. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  933. ret);
  934. goto out;
  935. }
  936. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  937. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  938. resp->resp.result, resp->resp.error);
  939. ret = -resp->resp.result;
  940. goto out;
  941. }
  942. kfree(req);
  943. kfree(resp);
  944. return 0;
  945. out:
  946. CNSS_QMI_ASSERT();
  947. kfree(req);
  948. kfree(resp);
  949. return ret;
  950. }
  951. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  952. u8 *mac, u32 mac_len)
  953. {
  954. struct wlfw_mac_addr_req_msg_v01 req;
  955. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  956. struct qmi_txn txn;
  957. int ret;
  958. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  959. return -EINVAL;
  960. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  961. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  962. if (ret < 0) {
  963. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  964. ret);
  965. ret = -EIO;
  966. goto out;
  967. }
  968. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  969. mac, plat_priv->driver_state);
  970. memcpy(req.mac_addr, mac, mac_len);
  971. req.mac_addr_valid = 1;
  972. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  973. QMI_WLFW_MAC_ADDR_REQ_V01,
  974. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  975. wlfw_mac_addr_req_msg_v01_ei, &req);
  976. if (ret < 0) {
  977. qmi_txn_cancel(&txn);
  978. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  979. ret = -EIO;
  980. goto out;
  981. }
  982. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  983. if (ret < 0) {
  984. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  985. ret);
  986. ret = -EIO;
  987. goto out;
  988. }
  989. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  990. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  991. resp.resp.result);
  992. ret = -resp.resp.result;
  993. }
  994. out:
  995. return ret;
  996. }
  997. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  998. u32 total_size)
  999. {
  1000. int ret = 0;
  1001. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  1002. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  1003. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  1004. unsigned int remaining;
  1005. struct qmi_txn txn;
  1006. cnss_pr_dbg("%s\n", __func__);
  1007. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1008. if (!req)
  1009. return -ENOMEM;
  1010. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1011. if (!resp) {
  1012. kfree(req);
  1013. return -ENOMEM;
  1014. }
  1015. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  1016. if (!p_qdss_trace_data) {
  1017. ret = ENOMEM;
  1018. goto end;
  1019. }
  1020. remaining = total_size;
  1021. p_qdss_trace_data_temp = p_qdss_trace_data;
  1022. while (remaining && resp->end == 0) {
  1023. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1024. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  1025. if (ret < 0) {
  1026. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  1027. ret);
  1028. goto fail;
  1029. }
  1030. ret = qmi_send_request
  1031. (&plat_priv->qmi_wlfw, NULL, &txn,
  1032. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1033. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1034. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1035. if (ret < 0) {
  1036. qmi_txn_cancel(&txn);
  1037. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1038. ret);
  1039. goto fail;
  1040. }
  1041. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1042. if (ret < 0) {
  1043. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1044. ret);
  1045. goto fail;
  1046. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1047. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1048. resp->resp.result, resp->resp.error);
  1049. ret = -resp->resp.result;
  1050. goto fail;
  1051. } else {
  1052. ret = 0;
  1053. }
  1054. cnss_pr_dbg("%s: response total size %d data len %d",
  1055. __func__, resp->total_size, resp->data_len);
  1056. if ((resp->total_size_valid == 1 &&
  1057. resp->total_size == total_size) &&
  1058. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1059. (resp->data_valid == 1 &&
  1060. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1061. resp->data_len <= remaining) {
  1062. memcpy(p_qdss_trace_data_temp,
  1063. resp->data, resp->data_len);
  1064. } else {
  1065. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1066. __func__,
  1067. total_size, req->seg_id,
  1068. resp->total_size_valid,
  1069. resp->total_size,
  1070. resp->seg_id_valid,
  1071. resp->seg_id,
  1072. resp->data_valid,
  1073. resp->data_len);
  1074. ret = -1;
  1075. goto fail;
  1076. }
  1077. remaining -= resp->data_len;
  1078. p_qdss_trace_data_temp += resp->data_len;
  1079. req->seg_id++;
  1080. }
  1081. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1082. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1083. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1084. total_size);
  1085. if (ret < 0) {
  1086. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1087. ret);
  1088. ret = -1;
  1089. goto fail;
  1090. }
  1091. } else {
  1092. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1093. __func__,
  1094. remaining, resp->end_valid, resp->end);
  1095. ret = -1;
  1096. goto fail;
  1097. }
  1098. fail:
  1099. kfree(p_qdss_trace_data);
  1100. end:
  1101. kfree(req);
  1102. kfree(resp);
  1103. return ret;
  1104. }
  1105. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1106. char *filename, u32 filename_len)
  1107. {
  1108. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1109. char *debug_str = QDSS_DEBUG_FILE_STR;
  1110. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1111. plat_priv->device_id == MANGO_DEVICE_ID ||
  1112. plat_priv->device_id == PEACH_DEVICE_ID)
  1113. debug_str = "";
  1114. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1115. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1116. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1117. else
  1118. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1119. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1120. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1121. }
  1122. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1123. {
  1124. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1125. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1126. struct qmi_txn txn;
  1127. const struct firmware *fw_entry = NULL;
  1128. const u8 *temp;
  1129. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1130. unsigned int remaining;
  1131. int ret = 0;
  1132. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1133. plat_priv->driver_state);
  1134. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1135. if (!req)
  1136. return -ENOMEM;
  1137. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1138. if (!resp) {
  1139. kfree(req);
  1140. return -ENOMEM;
  1141. }
  1142. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1143. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1144. qdss_cfg_filename);
  1145. if (ret) {
  1146. cnss_pr_dbg("Unable to load %s\n",
  1147. qdss_cfg_filename);
  1148. goto err_req_fw;
  1149. }
  1150. temp = fw_entry->data;
  1151. remaining = fw_entry->size;
  1152. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1153. qdss_cfg_filename, remaining);
  1154. while (remaining) {
  1155. req->total_size_valid = 1;
  1156. req->total_size = remaining;
  1157. req->seg_id_valid = 1;
  1158. req->data_valid = 1;
  1159. req->end_valid = 1;
  1160. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1161. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1162. } else {
  1163. req->data_len = remaining;
  1164. req->end = 1;
  1165. }
  1166. memcpy(req->data, temp, req->data_len);
  1167. ret = qmi_txn_init
  1168. (&plat_priv->qmi_wlfw, &txn,
  1169. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1170. resp);
  1171. if (ret < 0) {
  1172. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1173. ret);
  1174. goto err_send;
  1175. }
  1176. ret = qmi_send_request
  1177. (&plat_priv->qmi_wlfw, NULL, &txn,
  1178. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1179. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1180. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1181. if (ret < 0) {
  1182. qmi_txn_cancel(&txn);
  1183. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1184. ret);
  1185. goto err_send;
  1186. }
  1187. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1188. if (ret < 0) {
  1189. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1190. ret);
  1191. goto err_send;
  1192. }
  1193. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1194. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1195. resp->resp.result, resp->resp.error);
  1196. ret = -resp->resp.result;
  1197. goto err_send;
  1198. }
  1199. remaining -= req->data_len;
  1200. temp += req->data_len;
  1201. req->seg_id++;
  1202. }
  1203. release_firmware(fw_entry);
  1204. kfree(req);
  1205. kfree(resp);
  1206. return 0;
  1207. err_send:
  1208. release_firmware(fw_entry);
  1209. err_req_fw:
  1210. kfree(req);
  1211. kfree(resp);
  1212. return ret;
  1213. }
  1214. static int wlfw_send_qdss_trace_mode_req
  1215. (struct cnss_plat_data *plat_priv,
  1216. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1217. unsigned long long option)
  1218. {
  1219. int rc = 0;
  1220. int tmp = 0;
  1221. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1222. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1223. struct qmi_txn txn;
  1224. if (!plat_priv)
  1225. return -ENODEV;
  1226. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1227. if (!req)
  1228. return -ENOMEM;
  1229. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1230. if (!resp) {
  1231. kfree(req);
  1232. return -ENOMEM;
  1233. }
  1234. req->mode_valid = 1;
  1235. req->mode = mode;
  1236. req->option_valid = 1;
  1237. req->option = option;
  1238. tmp = plat_priv->hw_trc_override;
  1239. req->hw_trc_disable_override_valid = 1;
  1240. req->hw_trc_disable_override =
  1241. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1242. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1243. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1244. __func__, mode, option, req->hw_trc_disable_override);
  1245. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1246. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1247. if (rc < 0) {
  1248. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1249. rc);
  1250. goto out;
  1251. }
  1252. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1253. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1254. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1255. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1256. if (rc < 0) {
  1257. qmi_txn_cancel(&txn);
  1258. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1259. goto out;
  1260. }
  1261. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1262. if (rc < 0) {
  1263. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1264. rc);
  1265. goto out;
  1266. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1267. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1268. resp->resp.result, resp->resp.error);
  1269. rc = -resp->resp.result;
  1270. goto out;
  1271. }
  1272. kfree(resp);
  1273. kfree(req);
  1274. return rc;
  1275. out:
  1276. kfree(resp);
  1277. kfree(req);
  1278. CNSS_QMI_ASSERT();
  1279. return rc;
  1280. }
  1281. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1282. {
  1283. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1284. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1285. }
  1286. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1287. {
  1288. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1289. option);
  1290. }
  1291. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1292. enum cnss_driver_mode mode)
  1293. {
  1294. struct wlfw_wlan_mode_req_msg_v01 *req;
  1295. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1296. struct qmi_txn txn;
  1297. int ret = 0;
  1298. if (!plat_priv)
  1299. return -ENODEV;
  1300. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1301. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1302. if (mode == CNSS_OFF &&
  1303. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1304. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1305. return 0;
  1306. }
  1307. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1308. if (!req)
  1309. return -ENOMEM;
  1310. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1311. if (!resp) {
  1312. kfree(req);
  1313. return -ENOMEM;
  1314. }
  1315. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1316. req->hw_debug_valid = 1;
  1317. req->hw_debug = 0;
  1318. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1319. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1320. if (ret < 0) {
  1321. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1322. cnss_qmi_mode_to_str(mode), mode, ret);
  1323. goto out;
  1324. }
  1325. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1326. QMI_WLFW_WLAN_MODE_REQ_V01,
  1327. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1328. wlfw_wlan_mode_req_msg_v01_ei, req);
  1329. if (ret < 0) {
  1330. qmi_txn_cancel(&txn);
  1331. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1332. cnss_qmi_mode_to_str(mode), mode, ret);
  1333. goto out;
  1334. }
  1335. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1336. if (ret < 0) {
  1337. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1338. cnss_qmi_mode_to_str(mode), mode, ret);
  1339. goto out;
  1340. }
  1341. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1342. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1343. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1344. resp->resp.error);
  1345. ret = -resp->resp.result;
  1346. goto out;
  1347. }
  1348. kfree(req);
  1349. kfree(resp);
  1350. return 0;
  1351. out:
  1352. if (mode == CNSS_OFF) {
  1353. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1354. ret = 0;
  1355. } else {
  1356. CNSS_QMI_ASSERT();
  1357. }
  1358. kfree(req);
  1359. kfree(resp);
  1360. return ret;
  1361. }
  1362. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1363. struct cnss_wlan_enable_cfg *config,
  1364. const char *host_version)
  1365. {
  1366. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1367. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1368. struct qmi_txn txn;
  1369. u32 i, ce_id, num_vectors, user_base_data, base_vector;
  1370. int ret = 0;
  1371. if (!plat_priv)
  1372. return -ENODEV;
  1373. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1374. plat_priv->driver_state);
  1375. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1376. if (!req)
  1377. return -ENOMEM;
  1378. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1379. if (!resp) {
  1380. kfree(req);
  1381. return -ENOMEM;
  1382. }
  1383. req->host_version_valid = 1;
  1384. strlcpy(req->host_version, host_version,
  1385. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1386. req->tgt_cfg_valid = 1;
  1387. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1388. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1389. else
  1390. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1391. for (i = 0; i < req->tgt_cfg_len; i++) {
  1392. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1393. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1394. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1395. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1396. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1397. }
  1398. req->svc_cfg_valid = 1;
  1399. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1400. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1401. else
  1402. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1403. for (i = 0; i < req->svc_cfg_len; i++) {
  1404. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1405. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1406. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1407. }
  1408. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1409. plat_priv->device_id != MANGO_DEVICE_ID &&
  1410. plat_priv->device_id != PEACH_DEVICE_ID) {
  1411. if (plat_priv->device_id == QCN7605_DEVICE_ID &&
  1412. config->num_shadow_reg_cfg) {
  1413. req->shadow_reg_valid = 1;
  1414. if (config->num_shadow_reg_cfg >
  1415. QMI_WLFW_MAX_NUM_SHADOW_REG_V01)
  1416. req->shadow_reg_len =
  1417. QMI_WLFW_MAX_NUM_SHADOW_REG_V01;
  1418. else
  1419. req->shadow_reg_len =
  1420. config->num_shadow_reg_cfg;
  1421. memcpy(req->shadow_reg, config->shadow_reg_cfg,
  1422. sizeof(struct wlfw_shadow_reg_cfg_s_v01) *
  1423. req->shadow_reg_len);
  1424. } else {
  1425. req->shadow_reg_v2_valid = 1;
  1426. if (config->num_shadow_reg_v2_cfg >
  1427. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1428. req->shadow_reg_v2_len =
  1429. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1430. else
  1431. req->shadow_reg_v2_len =
  1432. config->num_shadow_reg_v2_cfg;
  1433. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1434. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01) *
  1435. req->shadow_reg_v2_len);
  1436. }
  1437. } else {
  1438. req->shadow_reg_v3_valid = 1;
  1439. if (config->num_shadow_reg_v3_cfg >
  1440. MAX_NUM_SHADOW_REG_V3)
  1441. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1442. else
  1443. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1444. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1445. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1446. plat_priv->num_shadow_regs_v3);
  1447. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1448. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01) *
  1449. req->shadow_reg_v3_len);
  1450. }
  1451. if (config->rri_over_ddr_cfg_valid) {
  1452. req->rri_over_ddr_cfg_valid = 1;
  1453. req->rri_over_ddr_cfg.base_addr_low =
  1454. config->rri_over_ddr_cfg.base_addr_low;
  1455. req->rri_over_ddr_cfg.base_addr_high =
  1456. config->rri_over_ddr_cfg.base_addr_high;
  1457. }
  1458. if (config->send_msi_ce) {
  1459. ret = cnss_bus_get_msi_assignment(plat_priv,
  1460. CE_MSI_NAME,
  1461. &num_vectors,
  1462. &user_base_data,
  1463. &base_vector);
  1464. if (!ret) {
  1465. req->msi_cfg_valid = 1;
  1466. req->msi_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1467. for (ce_id = 0; ce_id < QMI_WLFW_MAX_NUM_CE_V01;
  1468. ce_id++) {
  1469. req->msi_cfg[ce_id].ce_id = ce_id;
  1470. req->msi_cfg[ce_id].msi_vector =
  1471. (ce_id % num_vectors) + base_vector;
  1472. }
  1473. }
  1474. }
  1475. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1476. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1477. if (ret < 0) {
  1478. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1479. ret);
  1480. goto out;
  1481. }
  1482. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1483. QMI_WLFW_WLAN_CFG_REQ_V01,
  1484. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1485. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1486. if (ret < 0) {
  1487. qmi_txn_cancel(&txn);
  1488. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1489. ret);
  1490. goto out;
  1491. }
  1492. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1493. if (ret < 0) {
  1494. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1495. ret);
  1496. goto out;
  1497. }
  1498. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1499. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1500. resp->resp.result, resp->resp.error);
  1501. ret = -resp->resp.result;
  1502. goto out;
  1503. }
  1504. kfree(req);
  1505. kfree(resp);
  1506. return 0;
  1507. out:
  1508. CNSS_QMI_ASSERT();
  1509. kfree(req);
  1510. kfree(resp);
  1511. return ret;
  1512. }
  1513. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1514. u32 offset, u32 mem_type,
  1515. u32 data_len, u8 *data)
  1516. {
  1517. struct wlfw_athdiag_read_req_msg_v01 *req;
  1518. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1519. struct qmi_txn txn;
  1520. int ret = 0;
  1521. if (!plat_priv)
  1522. return -ENODEV;
  1523. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1524. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1525. data, data_len);
  1526. return -EINVAL;
  1527. }
  1528. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1529. plat_priv->driver_state, offset, mem_type, data_len);
  1530. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1531. if (!req)
  1532. return -ENOMEM;
  1533. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1534. if (!resp) {
  1535. kfree(req);
  1536. return -ENOMEM;
  1537. }
  1538. req->offset = offset;
  1539. req->mem_type = mem_type;
  1540. req->data_len = data_len;
  1541. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1542. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1543. if (ret < 0) {
  1544. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1545. ret);
  1546. goto out;
  1547. }
  1548. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1549. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1550. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1551. wlfw_athdiag_read_req_msg_v01_ei, req);
  1552. if (ret < 0) {
  1553. qmi_txn_cancel(&txn);
  1554. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1555. ret);
  1556. goto out;
  1557. }
  1558. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1559. if (ret < 0) {
  1560. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1561. ret);
  1562. goto out;
  1563. }
  1564. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1565. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1566. resp->resp.result, resp->resp.error);
  1567. ret = -resp->resp.result;
  1568. goto out;
  1569. }
  1570. if (!resp->data_valid || resp->data_len != data_len) {
  1571. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1572. resp->data_valid, resp->data_len);
  1573. ret = -EINVAL;
  1574. goto out;
  1575. }
  1576. memcpy(data, resp->data, resp->data_len);
  1577. kfree(req);
  1578. kfree(resp);
  1579. return 0;
  1580. out:
  1581. kfree(req);
  1582. kfree(resp);
  1583. return ret;
  1584. }
  1585. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1586. u32 offset, u32 mem_type,
  1587. u32 data_len, u8 *data)
  1588. {
  1589. struct wlfw_athdiag_write_req_msg_v01 *req;
  1590. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1591. struct qmi_txn txn;
  1592. int ret = 0;
  1593. if (!plat_priv)
  1594. return -ENODEV;
  1595. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1596. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1597. data, data_len);
  1598. return -EINVAL;
  1599. }
  1600. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1601. plat_priv->driver_state, offset, mem_type, data_len, data);
  1602. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1603. if (!req)
  1604. return -ENOMEM;
  1605. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1606. if (!resp) {
  1607. kfree(req);
  1608. return -ENOMEM;
  1609. }
  1610. req->offset = offset;
  1611. req->mem_type = mem_type;
  1612. req->data_len = data_len;
  1613. memcpy(req->data, data, data_len);
  1614. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1615. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1616. if (ret < 0) {
  1617. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1618. ret);
  1619. goto out;
  1620. }
  1621. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1622. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1623. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1624. wlfw_athdiag_write_req_msg_v01_ei, req);
  1625. if (ret < 0) {
  1626. qmi_txn_cancel(&txn);
  1627. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1628. ret);
  1629. goto out;
  1630. }
  1631. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1632. if (ret < 0) {
  1633. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1634. ret);
  1635. goto out;
  1636. }
  1637. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1638. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1639. resp->resp.result, resp->resp.error);
  1640. ret = -resp->resp.result;
  1641. goto out;
  1642. }
  1643. kfree(req);
  1644. kfree(resp);
  1645. return 0;
  1646. out:
  1647. kfree(req);
  1648. kfree(resp);
  1649. return ret;
  1650. }
  1651. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1652. u8 fw_log_mode)
  1653. {
  1654. struct wlfw_ini_req_msg_v01 *req;
  1655. struct wlfw_ini_resp_msg_v01 *resp;
  1656. struct qmi_txn txn;
  1657. int ret = 0;
  1658. if (!plat_priv)
  1659. return -ENODEV;
  1660. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1661. plat_priv->driver_state, fw_log_mode);
  1662. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1663. if (!req)
  1664. return -ENOMEM;
  1665. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1666. if (!resp) {
  1667. kfree(req);
  1668. return -ENOMEM;
  1669. }
  1670. req->enablefwlog_valid = 1;
  1671. req->enablefwlog = fw_log_mode;
  1672. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1673. wlfw_ini_resp_msg_v01_ei, resp);
  1674. if (ret < 0) {
  1675. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1676. fw_log_mode, ret);
  1677. goto out;
  1678. }
  1679. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1680. QMI_WLFW_INI_REQ_V01,
  1681. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1682. wlfw_ini_req_msg_v01_ei, req);
  1683. if (ret < 0) {
  1684. qmi_txn_cancel(&txn);
  1685. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1686. fw_log_mode, ret);
  1687. goto out;
  1688. }
  1689. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1690. if (ret < 0) {
  1691. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1692. fw_log_mode, ret);
  1693. goto out;
  1694. }
  1695. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1696. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1697. fw_log_mode, resp->resp.result, resp->resp.error);
  1698. ret = -resp->resp.result;
  1699. goto out;
  1700. }
  1701. kfree(req);
  1702. kfree(resp);
  1703. return 0;
  1704. out:
  1705. kfree(req);
  1706. kfree(resp);
  1707. return ret;
  1708. }
  1709. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1710. {
  1711. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1712. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1713. struct qmi_txn txn;
  1714. int ret = 0;
  1715. if (!plat_priv)
  1716. return -ENODEV;
  1717. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1718. !plat_priv->fw_pcie_gen_switch) {
  1719. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1720. return 0;
  1721. }
  1722. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1723. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1724. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1725. plat_priv->pcie_gen_speed;
  1726. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1727. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1728. if (ret < 0) {
  1729. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1730. ret);
  1731. goto out;
  1732. }
  1733. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1734. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1735. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1736. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1737. if (ret < 0) {
  1738. qmi_txn_cancel(&txn);
  1739. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1740. goto out;
  1741. }
  1742. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1743. if (ret < 0) {
  1744. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1745. ret);
  1746. goto out;
  1747. }
  1748. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1749. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1750. plat_priv->pcie_gen_speed, resp.resp.result,
  1751. resp.resp.error);
  1752. ret = -resp.resp.result;
  1753. }
  1754. out:
  1755. /* Reset PCIE Gen speed after one time use */
  1756. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1757. return ret;
  1758. }
  1759. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1760. {
  1761. struct wlfw_antenna_switch_req_msg_v01 *req;
  1762. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1763. struct qmi_txn txn;
  1764. int ret = 0;
  1765. if (!plat_priv)
  1766. return -ENODEV;
  1767. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1768. plat_priv->driver_state);
  1769. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1770. if (!req)
  1771. return -ENOMEM;
  1772. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1773. if (!resp) {
  1774. kfree(req);
  1775. return -ENOMEM;
  1776. }
  1777. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1778. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1779. if (ret < 0) {
  1780. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1781. ret);
  1782. goto out;
  1783. }
  1784. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1785. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1786. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1787. wlfw_antenna_switch_req_msg_v01_ei, req);
  1788. if (ret < 0) {
  1789. qmi_txn_cancel(&txn);
  1790. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1791. ret);
  1792. goto out;
  1793. }
  1794. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1795. if (ret < 0) {
  1796. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1797. ret);
  1798. goto out;
  1799. }
  1800. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1801. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1802. resp->resp.result, resp->resp.error);
  1803. ret = -resp->resp.result;
  1804. goto out;
  1805. }
  1806. if (resp->antenna_valid)
  1807. plat_priv->antenna = resp->antenna;
  1808. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1809. resp->antenna_valid, resp->antenna);
  1810. kfree(req);
  1811. kfree(resp);
  1812. return 0;
  1813. out:
  1814. kfree(req);
  1815. kfree(resp);
  1816. return ret;
  1817. }
  1818. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1819. {
  1820. struct wlfw_antenna_grant_req_msg_v01 *req;
  1821. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1822. struct qmi_txn txn;
  1823. int ret = 0;
  1824. if (!plat_priv)
  1825. return -ENODEV;
  1826. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1827. plat_priv->driver_state, plat_priv->grant);
  1828. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1829. if (!req)
  1830. return -ENOMEM;
  1831. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1832. if (!resp) {
  1833. kfree(req);
  1834. return -ENOMEM;
  1835. }
  1836. req->grant_valid = 1;
  1837. req->grant = plat_priv->grant;
  1838. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1839. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1840. if (ret < 0) {
  1841. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1842. ret);
  1843. goto out;
  1844. }
  1845. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1846. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1847. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1848. wlfw_antenna_grant_req_msg_v01_ei, req);
  1849. if (ret < 0) {
  1850. qmi_txn_cancel(&txn);
  1851. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1852. ret);
  1853. goto out;
  1854. }
  1855. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1856. if (ret < 0) {
  1857. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1858. ret);
  1859. goto out;
  1860. }
  1861. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1862. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1863. resp->resp.result, resp->resp.error);
  1864. ret = -resp->resp.result;
  1865. goto out;
  1866. }
  1867. kfree(req);
  1868. kfree(resp);
  1869. return 0;
  1870. out:
  1871. kfree(req);
  1872. kfree(resp);
  1873. return ret;
  1874. }
  1875. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1876. {
  1877. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1878. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1879. struct qmi_txn txn;
  1880. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1881. int ret = 0;
  1882. int i;
  1883. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1884. plat_priv->driver_state);
  1885. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1886. if (!req)
  1887. return -ENOMEM;
  1888. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1889. if (!resp) {
  1890. kfree(req);
  1891. return -ENOMEM;
  1892. }
  1893. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1894. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1895. ret = -EINVAL;
  1896. goto out;
  1897. }
  1898. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1899. for (i = 0; i < req->mem_seg_len; i++) {
  1900. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1901. qdss_mem[i].va, &qdss_mem[i].pa,
  1902. qdss_mem[i].size, qdss_mem[i].type);
  1903. req->mem_seg[i].addr = qdss_mem[i].pa;
  1904. req->mem_seg[i].size = qdss_mem[i].size;
  1905. req->mem_seg[i].type = qdss_mem[i].type;
  1906. }
  1907. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1908. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1909. if (ret < 0) {
  1910. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1911. ret);
  1912. goto out;
  1913. }
  1914. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1915. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1916. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1917. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1918. if (ret < 0) {
  1919. qmi_txn_cancel(&txn);
  1920. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1921. ret);
  1922. goto out;
  1923. }
  1924. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1925. if (ret < 0) {
  1926. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1927. ret);
  1928. goto out;
  1929. }
  1930. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1931. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1932. resp->resp.result, resp->resp.error);
  1933. ret = -resp->resp.result;
  1934. goto out;
  1935. }
  1936. kfree(req);
  1937. kfree(resp);
  1938. return 0;
  1939. out:
  1940. kfree(req);
  1941. kfree(resp);
  1942. return ret;
  1943. }
  1944. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1945. struct cnss_wfc_cfg cfg)
  1946. {
  1947. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1948. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1949. struct qmi_txn txn;
  1950. int ret = 0;
  1951. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1952. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1953. return -EINVAL;
  1954. }
  1955. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1956. if (!req)
  1957. return -ENOMEM;
  1958. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1959. if (!resp) {
  1960. kfree(req);
  1961. return -ENOMEM;
  1962. }
  1963. req->wfc_call_active_valid = 1;
  1964. req->wfc_call_active = cfg.mode;
  1965. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1966. plat_priv->driver_state);
  1967. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1968. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1969. if (ret < 0) {
  1970. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1971. ret);
  1972. goto out;
  1973. }
  1974. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1975. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1976. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1977. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1978. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1979. if (ret < 0) {
  1980. qmi_txn_cancel(&txn);
  1981. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1982. ret);
  1983. goto out;
  1984. }
  1985. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1986. if (ret < 0) {
  1987. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1988. ret);
  1989. goto out;
  1990. }
  1991. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1992. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1993. resp->resp.result, resp->resp.error);
  1994. ret = -EINVAL;
  1995. goto out;
  1996. }
  1997. ret = 0;
  1998. out:
  1999. kfree(req);
  2000. kfree(resp);
  2001. return ret;
  2002. }
  2003. static int cnss_wlfw_wfc_call_status_send_sync
  2004. (struct cnss_plat_data *plat_priv,
  2005. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  2006. {
  2007. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2008. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2009. struct qmi_txn txn;
  2010. int ret = 0;
  2011. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2012. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  2013. return -EINVAL;
  2014. }
  2015. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2016. if (!req)
  2017. return -ENOMEM;
  2018. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2019. if (!resp) {
  2020. kfree(req);
  2021. return -ENOMEM;
  2022. }
  2023. /**
  2024. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  2025. * But in r2 update QMI structure is expanded and as an effect qmi
  2026. * decoded structures have padding. Thus we cannot use buffer design.
  2027. * For backward compatibility for r1 design copy only wfc_call_active
  2028. * value in hex buffer.
  2029. */
  2030. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  2031. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  2032. /* wfc_call_active is mandatory in IMS indication */
  2033. req->wfc_call_active_valid = 1;
  2034. req->wfc_call_active = ind_msg->wfc_call_active;
  2035. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  2036. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  2037. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  2038. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  2039. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  2040. req->twt_ims_start = ind_msg->twt_ims_start;
  2041. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  2042. req->twt_ims_int = ind_msg->twt_ims_int;
  2043. req->media_quality_valid = ind_msg->media_quality_valid;
  2044. req->media_quality =
  2045. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  2046. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2047. plat_priv->driver_state);
  2048. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2049. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2050. if (ret < 0) {
  2051. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2052. ret);
  2053. goto out;
  2054. }
  2055. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2056. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2057. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2058. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2059. if (ret < 0) {
  2060. qmi_txn_cancel(&txn);
  2061. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2062. ret);
  2063. goto out;
  2064. }
  2065. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2066. if (ret < 0) {
  2067. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2068. ret);
  2069. goto out;
  2070. }
  2071. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2072. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2073. resp->resp.result, resp->resp.error);
  2074. ret = -resp->resp.result;
  2075. goto out;
  2076. }
  2077. ret = 0;
  2078. out:
  2079. kfree(req);
  2080. kfree(resp);
  2081. return ret;
  2082. }
  2083. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2084. {
  2085. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2086. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2087. struct qmi_txn txn;
  2088. int ret = 0;
  2089. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2090. plat_priv->dynamic_feature,
  2091. plat_priv->driver_state);
  2092. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2093. if (!req)
  2094. return -ENOMEM;
  2095. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2096. if (!resp) {
  2097. kfree(req);
  2098. return -ENOMEM;
  2099. }
  2100. req->mask_valid = 1;
  2101. req->mask = plat_priv->dynamic_feature;
  2102. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2103. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2104. if (ret < 0) {
  2105. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2106. ret);
  2107. goto out;
  2108. }
  2109. ret = qmi_send_request
  2110. (&plat_priv->qmi_wlfw, NULL, &txn,
  2111. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2112. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2113. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2114. if (ret < 0) {
  2115. qmi_txn_cancel(&txn);
  2116. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2117. ret);
  2118. goto out;
  2119. }
  2120. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2121. if (ret < 0) {
  2122. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2123. ret);
  2124. goto out;
  2125. }
  2126. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2127. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2128. resp->resp.result, resp->resp.error);
  2129. ret = -resp->resp.result;
  2130. goto out;
  2131. }
  2132. out:
  2133. kfree(req);
  2134. kfree(resp);
  2135. return ret;
  2136. }
  2137. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2138. void *cmd, int cmd_len)
  2139. {
  2140. struct wlfw_get_info_req_msg_v01 *req;
  2141. struct wlfw_get_info_resp_msg_v01 *resp;
  2142. struct qmi_txn txn;
  2143. int ret = 0;
  2144. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2145. type, cmd_len, plat_priv->driver_state);
  2146. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2147. return -EINVAL;
  2148. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2149. if (!req)
  2150. return -ENOMEM;
  2151. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2152. if (!resp) {
  2153. kfree(req);
  2154. return -ENOMEM;
  2155. }
  2156. req->type = type;
  2157. req->data_len = cmd_len;
  2158. memcpy(req->data, cmd, req->data_len);
  2159. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2160. wlfw_get_info_resp_msg_v01_ei, resp);
  2161. if (ret < 0) {
  2162. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2163. ret);
  2164. goto out;
  2165. }
  2166. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2167. QMI_WLFW_GET_INFO_REQ_V01,
  2168. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2169. wlfw_get_info_req_msg_v01_ei, req);
  2170. if (ret < 0) {
  2171. qmi_txn_cancel(&txn);
  2172. cnss_pr_err("Failed to send get info request, err: %d\n",
  2173. ret);
  2174. goto out;
  2175. }
  2176. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2177. if (ret < 0) {
  2178. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2179. ret);
  2180. goto out;
  2181. }
  2182. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2183. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2184. resp->resp.result, resp->resp.error);
  2185. ret = -resp->resp.result;
  2186. goto out;
  2187. }
  2188. kfree(req);
  2189. kfree(resp);
  2190. return 0;
  2191. out:
  2192. kfree(req);
  2193. kfree(resp);
  2194. return ret;
  2195. }
  2196. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2197. {
  2198. return QMI_WLFW_TIMEOUT_MS;
  2199. }
  2200. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2201. struct sockaddr_qrtr *sq,
  2202. struct qmi_txn *txn, const void *data)
  2203. {
  2204. struct cnss_plat_data *plat_priv =
  2205. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2206. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2207. int i;
  2208. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2209. if (!txn) {
  2210. cnss_pr_err("Spurious indication\n");
  2211. return;
  2212. }
  2213. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2214. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2215. return;
  2216. }
  2217. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2218. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2219. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2220. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2221. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2222. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2223. if (!plat_priv->fw_mem[i].va &&
  2224. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2225. plat_priv->fw_mem[i].attrs |=
  2226. DMA_ATTR_FORCE_CONTIGUOUS;
  2227. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2228. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2229. }
  2230. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2231. 0, NULL);
  2232. }
  2233. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2234. struct sockaddr_qrtr *sq,
  2235. struct qmi_txn *txn, const void *data)
  2236. {
  2237. struct cnss_plat_data *plat_priv =
  2238. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2239. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2240. if (!txn) {
  2241. cnss_pr_err("Spurious indication\n");
  2242. return;
  2243. }
  2244. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2245. 0, NULL);
  2246. }
  2247. /**
  2248. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2249. *
  2250. * This event is not required for HST/ HSP as FW calibration done is
  2251. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2252. */
  2253. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2254. struct sockaddr_qrtr *sq,
  2255. struct qmi_txn *txn, const void *data)
  2256. {
  2257. struct cnss_plat_data *plat_priv =
  2258. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2259. struct cnss_cal_info *cal_info;
  2260. if (!txn) {
  2261. cnss_pr_err("Spurious indication\n");
  2262. return;
  2263. }
  2264. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2265. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2266. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2267. return;
  2268. }
  2269. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2270. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2271. if (!cal_info)
  2272. return;
  2273. cal_info->cal_status = CNSS_CAL_DONE;
  2274. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2275. 0, cal_info);
  2276. }
  2277. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2278. struct sockaddr_qrtr *sq,
  2279. struct qmi_txn *txn, const void *data)
  2280. {
  2281. struct cnss_plat_data *plat_priv =
  2282. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2283. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2284. if (!txn) {
  2285. cnss_pr_err("Spurious indication\n");
  2286. return;
  2287. }
  2288. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2289. }
  2290. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2291. struct sockaddr_qrtr *sq,
  2292. struct qmi_txn *txn, const void *data)
  2293. {
  2294. struct cnss_plat_data *plat_priv =
  2295. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2296. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2297. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2298. if (!txn) {
  2299. cnss_pr_err("Spurious indication\n");
  2300. return;
  2301. }
  2302. if (ind_msg->pwr_pin_result_valid)
  2303. plat_priv->pin_result.fw_pwr_pin_result =
  2304. ind_msg->pwr_pin_result;
  2305. if (ind_msg->phy_io_pin_result_valid)
  2306. plat_priv->pin_result.fw_phy_io_pin_result =
  2307. ind_msg->phy_io_pin_result;
  2308. if (ind_msg->rf_pin_result_valid)
  2309. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2310. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2311. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2312. ind_msg->rf_pin_result);
  2313. }
  2314. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2315. u32 cal_file_download_size)
  2316. {
  2317. struct wlfw_cal_report_req_msg_v01 req = {0};
  2318. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2319. struct qmi_txn txn;
  2320. int ret = 0;
  2321. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2322. cal_file_download_size, plat_priv->driver_state);
  2323. req.cal_file_download_size_valid = 1;
  2324. req.cal_file_download_size = cal_file_download_size;
  2325. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2326. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2327. if (ret < 0) {
  2328. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2329. ret);
  2330. goto out;
  2331. }
  2332. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2333. QMI_WLFW_CAL_REPORT_REQ_V01,
  2334. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2335. wlfw_cal_report_req_msg_v01_ei, &req);
  2336. if (ret < 0) {
  2337. qmi_txn_cancel(&txn);
  2338. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2339. ret);
  2340. goto out;
  2341. }
  2342. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2343. if (ret < 0) {
  2344. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2345. ret);
  2346. goto out;
  2347. }
  2348. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2349. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2350. resp.resp.result, resp.resp.error);
  2351. ret = -resp.resp.result;
  2352. goto out;
  2353. }
  2354. out:
  2355. return ret;
  2356. }
  2357. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2358. struct sockaddr_qrtr *sq,
  2359. struct qmi_txn *txn, const void *data)
  2360. {
  2361. struct cnss_plat_data *plat_priv =
  2362. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2363. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2364. struct cnss_cal_info *cal_info;
  2365. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2366. ind->cal_file_upload_size);
  2367. cnss_pr_info("Calibration took %d ms\n",
  2368. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2369. if (!txn) {
  2370. cnss_pr_err("Spurious indication\n");
  2371. return;
  2372. }
  2373. if (ind->cal_file_upload_size_valid)
  2374. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2375. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2376. if (!cal_info)
  2377. return;
  2378. cal_info->cal_status = CNSS_CAL_DONE;
  2379. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2380. 0, cal_info);
  2381. }
  2382. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2383. struct sockaddr_qrtr *sq,
  2384. struct qmi_txn *txn,
  2385. const void *data)
  2386. {
  2387. struct cnss_plat_data *plat_priv =
  2388. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2389. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2390. int i;
  2391. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2392. if (!txn) {
  2393. cnss_pr_err("Spurious indication\n");
  2394. return;
  2395. }
  2396. if (plat_priv->qdss_mem_seg_len) {
  2397. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2398. plat_priv->qdss_mem_seg_len);
  2399. return;
  2400. }
  2401. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2402. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2403. return;
  2404. }
  2405. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2406. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2407. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2408. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2409. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2410. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2411. }
  2412. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2413. 0, NULL);
  2414. }
  2415. /**
  2416. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2417. *
  2418. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2419. * fw memory segment for dumping to file system. Only one type of mem can be
  2420. * saved per indication and is provided in mem seg index 0.
  2421. *
  2422. * Return: None
  2423. */
  2424. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2425. struct sockaddr_qrtr *sq,
  2426. struct qmi_txn *txn,
  2427. const void *data)
  2428. {
  2429. struct cnss_plat_data *plat_priv =
  2430. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2431. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2432. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2433. int i = 0;
  2434. if (!txn || !data) {
  2435. cnss_pr_err("Spurious indication\n");
  2436. return;
  2437. }
  2438. cnss_pr_dbg_buf("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2439. ind_msg->source, ind_msg->mem_seg_valid,
  2440. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2441. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2442. if (!event_data)
  2443. return;
  2444. event_data->mem_type = ind_msg->mem_seg[0].type;
  2445. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2446. event_data->total_size = ind_msg->total_size;
  2447. if (ind_msg->mem_seg_valid) {
  2448. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2449. cnss_pr_err("Invalid seg len indication\n");
  2450. goto free_event_data;
  2451. }
  2452. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2453. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2454. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2455. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2456. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2457. goto free_event_data;
  2458. }
  2459. cnss_pr_dbg_buf("seg-%d: addr 0x%llx size 0x%x\n",
  2460. i, ind_msg->mem_seg[i].addr,
  2461. ind_msg->mem_seg[i].size);
  2462. }
  2463. }
  2464. if (ind_msg->file_name_valid)
  2465. strlcpy(event_data->file_name, ind_msg->file_name,
  2466. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2467. if (ind_msg->source == 1) {
  2468. if (!ind_msg->file_name_valid)
  2469. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2470. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2471. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2472. 0, event_data);
  2473. } else {
  2474. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2475. if (!ind_msg->file_name_valid)
  2476. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2477. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2478. } else {
  2479. if (!ind_msg->file_name_valid)
  2480. strlcpy(event_data->file_name, "fw_mem_dump",
  2481. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2482. }
  2483. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2484. 0, event_data);
  2485. }
  2486. return;
  2487. free_event_data:
  2488. kfree(event_data);
  2489. }
  2490. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2491. struct sockaddr_qrtr *sq,
  2492. struct qmi_txn *txn,
  2493. const void *data)
  2494. {
  2495. struct cnss_plat_data *plat_priv =
  2496. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2497. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2498. 0, NULL);
  2499. }
  2500. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2501. struct sockaddr_qrtr *sq,
  2502. struct qmi_txn *txn,
  2503. const void *data)
  2504. {
  2505. struct cnss_plat_data *plat_priv =
  2506. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2507. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2508. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2509. if (!txn) {
  2510. cnss_pr_err("Spurious indication\n");
  2511. return;
  2512. }
  2513. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2514. ind_msg->data_len, ind_msg->type,
  2515. ind_msg->is_last, ind_msg->seq_no);
  2516. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2517. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2518. (void *)ind_msg->data,
  2519. ind_msg->data_len);
  2520. }
  2521. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2522. (struct cnss_plat_data *plat_priv,
  2523. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2524. {
  2525. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2526. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2527. struct qmi_txn txn;
  2528. int ret = 0;
  2529. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2530. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2531. return -EINVAL;
  2532. }
  2533. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2534. if (!req)
  2535. return -ENOMEM;
  2536. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2537. if (!resp) {
  2538. kfree(req);
  2539. return -ENOMEM;
  2540. }
  2541. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2542. req->twt_sta_start = ind_msg->twt_sta_start;
  2543. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2544. req->twt_sta_int = ind_msg->twt_sta_int;
  2545. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2546. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2547. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2548. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2549. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2550. req->twt_sta_dl = req->twt_sta_dl;
  2551. req->twt_sta_config_changed_valid =
  2552. ind_msg->twt_sta_config_changed_valid;
  2553. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2554. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2555. plat_priv->driver_state);
  2556. ret =
  2557. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2558. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2559. resp);
  2560. if (ret < 0) {
  2561. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2562. ret);
  2563. goto out;
  2564. }
  2565. ret =
  2566. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2567. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2568. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2569. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2570. if (ret < 0) {
  2571. qmi_txn_cancel(&txn);
  2572. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2573. goto out;
  2574. }
  2575. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2576. if (ret < 0) {
  2577. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2578. goto out;
  2579. }
  2580. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2581. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2582. resp->resp.result, resp->resp.error);
  2583. ret = -resp->resp.result;
  2584. goto out;
  2585. }
  2586. ret = 0;
  2587. out:
  2588. kfree(req);
  2589. kfree(resp);
  2590. return ret;
  2591. }
  2592. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2593. void *data)
  2594. {
  2595. int ret;
  2596. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2597. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2598. kfree(data);
  2599. return ret;
  2600. }
  2601. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2602. struct sockaddr_qrtr *sq,
  2603. struct qmi_txn *txn,
  2604. const void *data)
  2605. {
  2606. struct cnss_plat_data *plat_priv =
  2607. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2608. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2609. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2610. if (!txn) {
  2611. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2612. return;
  2613. }
  2614. if (!ind_msg) {
  2615. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2616. return;
  2617. }
  2618. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2619. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2620. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2621. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2622. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2623. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2624. ind_msg->twt_sta_config_changed_valid,
  2625. ind_msg->twt_sta_config_changed);
  2626. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2627. if (!event_data)
  2628. return;
  2629. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2630. event_data);
  2631. }
  2632. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2633. {
  2634. .type = QMI_INDICATION,
  2635. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2636. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2637. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2638. .fn = cnss_wlfw_request_mem_ind_cb
  2639. },
  2640. {
  2641. .type = QMI_INDICATION,
  2642. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2643. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2644. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2645. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2646. },
  2647. {
  2648. .type = QMI_INDICATION,
  2649. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2650. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2651. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2652. .fn = cnss_wlfw_fw_ready_ind_cb
  2653. },
  2654. {
  2655. .type = QMI_INDICATION,
  2656. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2657. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2658. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2659. .fn = cnss_wlfw_fw_init_done_ind_cb
  2660. },
  2661. {
  2662. .type = QMI_INDICATION,
  2663. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2664. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2665. .decoded_size =
  2666. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2667. .fn = cnss_wlfw_pin_result_ind_cb
  2668. },
  2669. {
  2670. .type = QMI_INDICATION,
  2671. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2672. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2673. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2674. .fn = cnss_wlfw_cal_done_ind_cb
  2675. },
  2676. {
  2677. .type = QMI_INDICATION,
  2678. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2679. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2680. .decoded_size =
  2681. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2682. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2683. },
  2684. {
  2685. .type = QMI_INDICATION,
  2686. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2687. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2688. .decoded_size =
  2689. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2690. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2691. },
  2692. {
  2693. .type = QMI_INDICATION,
  2694. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2695. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2696. .decoded_size =
  2697. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2698. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2699. },
  2700. {
  2701. .type = QMI_INDICATION,
  2702. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2703. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2704. .decoded_size =
  2705. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2706. .fn = cnss_wlfw_respond_get_info_ind_cb
  2707. },
  2708. {
  2709. .type = QMI_INDICATION,
  2710. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2711. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2712. .decoded_size =
  2713. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2714. .fn = cnss_wlfw_process_twt_cfg_ind
  2715. },
  2716. {}
  2717. };
  2718. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2719. void *data)
  2720. {
  2721. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2722. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2723. struct sockaddr_qrtr sq = { 0 };
  2724. int ret = 0;
  2725. if (!event_data)
  2726. return -EINVAL;
  2727. sq.sq_family = AF_QIPCRTR;
  2728. sq.sq_node = event_data->node;
  2729. sq.sq_port = event_data->port;
  2730. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2731. sizeof(sq), 0);
  2732. if (ret < 0) {
  2733. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2734. goto out;
  2735. }
  2736. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2737. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2738. plat_priv->driver_state);
  2739. kfree(data);
  2740. return 0;
  2741. out:
  2742. CNSS_QMI_ASSERT();
  2743. kfree(data);
  2744. return ret;
  2745. }
  2746. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2747. {
  2748. int ret = 0;
  2749. if (!plat_priv)
  2750. return -ENODEV;
  2751. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2752. cnss_pr_err("Unexpected WLFW server arrive\n");
  2753. CNSS_ASSERT(0);
  2754. return -EINVAL;
  2755. }
  2756. cnss_ignore_qmi_failure(false);
  2757. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2758. if (ret < 0)
  2759. goto out;
  2760. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2761. if (ret < 0) {
  2762. if (ret == -EALREADY)
  2763. ret = 0;
  2764. goto out;
  2765. }
  2766. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2767. if (ret < 0)
  2768. goto out;
  2769. return 0;
  2770. out:
  2771. return ret;
  2772. }
  2773. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2774. {
  2775. int ret;
  2776. if (!plat_priv)
  2777. return -ENODEV;
  2778. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2779. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2780. plat_priv->driver_state);
  2781. cnss_qmi_deinit(plat_priv);
  2782. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2783. ret = cnss_qmi_init(plat_priv);
  2784. if (ret < 0) {
  2785. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2786. CNSS_ASSERT(0);
  2787. }
  2788. return 0;
  2789. }
  2790. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2791. struct qmi_service *service)
  2792. {
  2793. struct cnss_plat_data *plat_priv =
  2794. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2795. struct cnss_qmi_event_server_arrive_data *event_data;
  2796. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2797. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2798. plat_priv->driver_state);
  2799. return 0;
  2800. }
  2801. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2802. service->node, service->port);
  2803. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2804. if (!event_data)
  2805. return -ENOMEM;
  2806. event_data->node = service->node;
  2807. event_data->port = service->port;
  2808. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2809. 0, event_data);
  2810. return 0;
  2811. }
  2812. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2813. struct qmi_service *service)
  2814. {
  2815. struct cnss_plat_data *plat_priv =
  2816. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2817. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2818. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2819. plat_priv->driver_state);
  2820. return;
  2821. }
  2822. cnss_pr_dbg("WLFW server exiting\n");
  2823. if (plat_priv) {
  2824. cnss_ignore_qmi_failure(true);
  2825. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2826. }
  2827. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2828. 0, NULL);
  2829. }
  2830. static struct qmi_ops qmi_wlfw_ops = {
  2831. .new_server = wlfw_new_server,
  2832. .del_server = wlfw_del_server,
  2833. };
  2834. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2835. {
  2836. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2837. /* In order to support dual wlan card attach case,
  2838. * need separate qmi service instance id for each dev
  2839. */
  2840. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2841. plat_priv->wlfw_service_instance_id != 0)
  2842. id = plat_priv->wlfw_service_instance_id;
  2843. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2844. WLFW_SERVICE_VERS_V01, id);
  2845. }
  2846. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2847. {
  2848. int ret = 0;
  2849. cnss_get_qrtr_info(plat_priv);
  2850. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2851. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2852. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2853. if (ret < 0) {
  2854. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2855. ret);
  2856. goto out;
  2857. }
  2858. ret = cnss_qmi_add_lookup(plat_priv);
  2859. if (ret < 0)
  2860. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2861. out:
  2862. return ret;
  2863. }
  2864. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2865. {
  2866. qmi_handle_release(&plat_priv->qmi_wlfw);
  2867. }
  2868. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2869. {
  2870. struct dms_get_mac_address_req_msg_v01 req;
  2871. struct dms_get_mac_address_resp_msg_v01 resp;
  2872. struct qmi_txn txn;
  2873. int ret = 0;
  2874. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2875. cnss_pr_err("DMS QMI connection not established\n");
  2876. return -EINVAL;
  2877. }
  2878. cnss_pr_dbg("Requesting DMS MAC address");
  2879. memset(&resp, 0, sizeof(resp));
  2880. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2881. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2882. if (ret < 0) {
  2883. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2884. ret);
  2885. goto out;
  2886. }
  2887. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2888. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2889. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2890. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2891. dms_get_mac_address_req_msg_v01_ei, &req);
  2892. if (ret < 0) {
  2893. qmi_txn_cancel(&txn);
  2894. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2895. ret);
  2896. goto out;
  2897. }
  2898. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2899. if (ret < 0) {
  2900. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2901. ret);
  2902. goto out;
  2903. }
  2904. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2905. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2906. resp.resp.result, resp.resp.error);
  2907. ret = -resp.resp.result;
  2908. goto out;
  2909. }
  2910. if (!resp.mac_address_valid ||
  2911. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2912. cnss_pr_err("Invalid MAC address received from DMS\n");
  2913. plat_priv->dms.mac_valid = false;
  2914. goto out;
  2915. }
  2916. plat_priv->dms.mac_valid = true;
  2917. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2918. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2919. out:
  2920. return ret;
  2921. }
  2922. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2923. unsigned int node, unsigned int port)
  2924. {
  2925. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2926. struct sockaddr_qrtr sq = {0};
  2927. int ret = 0;
  2928. sq.sq_family = AF_QIPCRTR;
  2929. sq.sq_node = node;
  2930. sq.sq_port = port;
  2931. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2932. sizeof(sq), 0);
  2933. if (ret < 0) {
  2934. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2935. node, port);
  2936. goto out;
  2937. }
  2938. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2939. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2940. plat_priv->driver_state);
  2941. out:
  2942. return ret;
  2943. }
  2944. static int dms_new_server(struct qmi_handle *qmi_dms,
  2945. struct qmi_service *service)
  2946. {
  2947. struct cnss_plat_data *plat_priv =
  2948. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2949. if (!service)
  2950. return -EINVAL;
  2951. return cnss_dms_connect_to_server(plat_priv, service->node,
  2952. service->port);
  2953. }
  2954. static void cnss_dms_server_exit_work(struct work_struct *work)
  2955. {
  2956. int ret;
  2957. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2958. cnss_dms_deinit(plat_priv);
  2959. cnss_pr_info("QMI DMS Server Exit");
  2960. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2961. ret = cnss_dms_init(plat_priv);
  2962. if (ret < 0)
  2963. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2964. }
  2965. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2966. static void dms_del_server(struct qmi_handle *qmi_dms,
  2967. struct qmi_service *service)
  2968. {
  2969. struct cnss_plat_data *plat_priv =
  2970. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2971. if (!plat_priv)
  2972. return;
  2973. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2974. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2975. plat_priv->driver_state);
  2976. return;
  2977. }
  2978. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2979. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2980. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2981. plat_priv->driver_state);
  2982. schedule_work(&cnss_dms_del_work);
  2983. }
  2984. void cnss_cancel_dms_work(void)
  2985. {
  2986. cancel_work_sync(&cnss_dms_del_work);
  2987. }
  2988. static struct qmi_ops qmi_dms_ops = {
  2989. .new_server = dms_new_server,
  2990. .del_server = dms_del_server,
  2991. };
  2992. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2993. {
  2994. int ret = 0;
  2995. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2996. &qmi_dms_ops, NULL);
  2997. if (ret < 0) {
  2998. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2999. goto out;
  3000. }
  3001. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  3002. DMS_SERVICE_VERS_V01, 0);
  3003. if (ret < 0)
  3004. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  3005. out:
  3006. return ret;
  3007. }
  3008. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  3009. {
  3010. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3011. qmi_handle_release(&plat_priv->qmi_dms);
  3012. }
  3013. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  3014. {
  3015. int ret;
  3016. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  3017. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  3018. struct qmi_txn txn;
  3019. if (!plat_priv)
  3020. return -ENODEV;
  3021. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  3022. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3023. if (!req)
  3024. return -ENOMEM;
  3025. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3026. if (!resp) {
  3027. kfree(req);
  3028. return -ENOMEM;
  3029. }
  3030. req->antenna = plat_priv->antenna;
  3031. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3032. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  3033. if (ret < 0) {
  3034. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  3035. ret);
  3036. goto out;
  3037. }
  3038. ret = qmi_send_request
  3039. (&plat_priv->coex_qmi, NULL, &txn,
  3040. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  3041. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  3042. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  3043. if (ret < 0) {
  3044. qmi_txn_cancel(&txn);
  3045. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  3046. ret);
  3047. goto out;
  3048. }
  3049. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3050. if (ret < 0) {
  3051. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  3052. ret);
  3053. goto out;
  3054. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3055. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  3056. resp->resp.result, resp->resp.error);
  3057. ret = -resp->resp.result;
  3058. goto out;
  3059. }
  3060. if (resp->grant_valid)
  3061. plat_priv->grant = resp->grant;
  3062. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  3063. kfree(resp);
  3064. kfree(req);
  3065. return 0;
  3066. out:
  3067. kfree(resp);
  3068. kfree(req);
  3069. return ret;
  3070. }
  3071. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3072. {
  3073. int ret;
  3074. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3075. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3076. struct qmi_txn txn;
  3077. if (!plat_priv)
  3078. return -ENODEV;
  3079. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3080. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3081. if (!req)
  3082. return -ENOMEM;
  3083. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3084. if (!resp) {
  3085. kfree(req);
  3086. return -ENOMEM;
  3087. }
  3088. req->antenna = plat_priv->antenna;
  3089. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3090. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3091. if (ret < 0) {
  3092. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3093. ret);
  3094. goto out;
  3095. }
  3096. ret = qmi_send_request
  3097. (&plat_priv->coex_qmi, NULL, &txn,
  3098. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3099. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3100. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3101. if (ret < 0) {
  3102. qmi_txn_cancel(&txn);
  3103. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3104. ret);
  3105. goto out;
  3106. }
  3107. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3108. if (ret < 0) {
  3109. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3110. ret);
  3111. goto out;
  3112. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3113. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3114. resp->resp.result, resp->resp.error);
  3115. ret = -resp->resp.result;
  3116. goto out;
  3117. }
  3118. kfree(resp);
  3119. kfree(req);
  3120. return 0;
  3121. out:
  3122. kfree(resp);
  3123. kfree(req);
  3124. return ret;
  3125. }
  3126. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3127. {
  3128. int ret;
  3129. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3130. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3131. u8 pcss_enabled;
  3132. if (!plat_priv)
  3133. return -ENODEV;
  3134. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3135. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3136. return 0;
  3137. }
  3138. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3139. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3140. req.restart_level_type_valid = 1;
  3141. req.restart_level_type = pcss_enabled;
  3142. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3143. wlfw_subsys_restart_level_req_msg_v01_ei,
  3144. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3145. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3146. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3147. QMI_WLFW_TIMEOUT_JF);
  3148. if (ret < 0)
  3149. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3150. return ret;
  3151. }
  3152. static int coex_new_server(struct qmi_handle *qmi,
  3153. struct qmi_service *service)
  3154. {
  3155. struct cnss_plat_data *plat_priv =
  3156. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3157. struct sockaddr_qrtr sq = { 0 };
  3158. int ret = 0;
  3159. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3160. service->node, service->port);
  3161. sq.sq_family = AF_QIPCRTR;
  3162. sq.sq_node = service->node;
  3163. sq.sq_port = service->port;
  3164. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3165. if (ret < 0) {
  3166. cnss_pr_err("Fail to connect to remote service port\n");
  3167. return ret;
  3168. }
  3169. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3170. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3171. plat_priv->driver_state);
  3172. return 0;
  3173. }
  3174. static void coex_del_server(struct qmi_handle *qmi,
  3175. struct qmi_service *service)
  3176. {
  3177. struct cnss_plat_data *plat_priv =
  3178. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3179. cnss_pr_dbg("COEX server exit\n");
  3180. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3181. }
  3182. static struct qmi_ops coex_qmi_ops = {
  3183. .new_server = coex_new_server,
  3184. .del_server = coex_del_server,
  3185. };
  3186. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3187. { int ret;
  3188. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3189. COEX_SERVICE_MAX_MSG_LEN,
  3190. &coex_qmi_ops, NULL);
  3191. if (ret < 0)
  3192. return ret;
  3193. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3194. COEX_SERVICE_VERS_V01, 0);
  3195. return ret;
  3196. }
  3197. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3198. {
  3199. qmi_handle_release(&plat_priv->coex_qmi);
  3200. }
  3201. /* IMS Service */
  3202. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3203. {
  3204. int ret;
  3205. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3206. struct qmi_txn *txn;
  3207. if (!plat_priv)
  3208. return -ENODEV;
  3209. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3210. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3211. if (!req)
  3212. return -ENOMEM;
  3213. req->wfc_call_status_valid = 1;
  3214. req->wfc_call_status = 1;
  3215. txn = &plat_priv->txn;
  3216. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3217. if (ret < 0) {
  3218. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3219. ret);
  3220. goto out;
  3221. }
  3222. ret = qmi_send_request
  3223. (&plat_priv->ims_qmi, NULL, txn,
  3224. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3225. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3226. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3227. if (ret < 0) {
  3228. qmi_txn_cancel(txn);
  3229. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3230. ret);
  3231. goto out;
  3232. }
  3233. kfree(req);
  3234. return 0;
  3235. out:
  3236. kfree(req);
  3237. return ret;
  3238. }
  3239. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3240. struct sockaddr_qrtr *sq,
  3241. struct qmi_txn *txn,
  3242. const void *data)
  3243. {
  3244. const
  3245. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3246. data;
  3247. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3248. if (!txn) {
  3249. cnss_pr_err("spurious response\n");
  3250. return;
  3251. }
  3252. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3253. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3254. resp->resp.result, resp->resp.error);
  3255. txn->result = -resp->resp.result;
  3256. }
  3257. }
  3258. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3259. void *data)
  3260. {
  3261. int ret;
  3262. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3263. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3264. kfree(data);
  3265. return ret;
  3266. }
  3267. static void
  3268. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3269. struct sockaddr_qrtr *sq,
  3270. struct qmi_txn *txn, const void *data)
  3271. {
  3272. struct cnss_plat_data *plat_priv =
  3273. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3274. const
  3275. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3276. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3277. if (!txn) {
  3278. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3279. return;
  3280. }
  3281. if (!ind_msg) {
  3282. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3283. return;
  3284. }
  3285. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3286. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3287. ind_msg->all_wfc_calls_held,
  3288. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3289. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3290. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3291. ind_msg->media_quality_valid, ind_msg->media_quality);
  3292. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3293. if (!event_data)
  3294. return;
  3295. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3296. 0, event_data);
  3297. }
  3298. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3299. {
  3300. .type = QMI_RESPONSE,
  3301. .msg_id =
  3302. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3303. .ei =
  3304. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3305. .decoded_size = sizeof(struct
  3306. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3307. .fn = ims_subscribe_for_indication_resp_cb
  3308. },
  3309. {
  3310. .type = QMI_INDICATION,
  3311. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3312. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3313. .decoded_size =
  3314. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3315. .fn = cnss_ims_process_wfc_call_ind_cb
  3316. },
  3317. {}
  3318. };
  3319. static int ims_new_server(struct qmi_handle *qmi,
  3320. struct qmi_service *service)
  3321. {
  3322. struct cnss_plat_data *plat_priv =
  3323. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3324. struct sockaddr_qrtr sq = { 0 };
  3325. int ret = 0;
  3326. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3327. service->node, service->port);
  3328. sq.sq_family = AF_QIPCRTR;
  3329. sq.sq_node = service->node;
  3330. sq.sq_port = service->port;
  3331. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3332. if (ret < 0) {
  3333. cnss_pr_err("Fail to connect to remote service port\n");
  3334. return ret;
  3335. }
  3336. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3337. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3338. plat_priv->driver_state);
  3339. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3340. return ret;
  3341. }
  3342. static void ims_del_server(struct qmi_handle *qmi,
  3343. struct qmi_service *service)
  3344. {
  3345. struct cnss_plat_data *plat_priv =
  3346. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3347. cnss_pr_dbg("IMS server exit\n");
  3348. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3349. }
  3350. static struct qmi_ops ims_qmi_ops = {
  3351. .new_server = ims_new_server,
  3352. .del_server = ims_del_server,
  3353. };
  3354. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3355. { int ret;
  3356. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3357. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3358. &ims_qmi_ops, qmi_ims_msg_handlers);
  3359. if (ret < 0)
  3360. return ret;
  3361. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3362. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3363. return ret;
  3364. }
  3365. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3366. {
  3367. qmi_handle_release(&plat_priv->ims_qmi);
  3368. }