sdm855.c 177 KB

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  1. /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/input.h>
  21. #include <linux/of_device.h>
  22. #include <linux/pm_qos.h>
  23. #include <sound/core.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/info.h>
  29. #include <dsp/audio_notifier.h>
  30. #include <dsp/q6afe-v2.h>
  31. #include <dsp/q6core.h>
  32. #include "device_event.h"
  33. #include "msm-pcm-routing-v2.h"
  34. #include "codecs/msm-cdc-pinctrl.h"
  35. #include "codecs/wcd9360/wcd9360.h"
  36. #include "codecs/wsa881x.h"
  37. #define DRV_NAME "sdm855-asoc-snd"
  38. #define __CHIPSET__ "SDM855 "
  39. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  40. #define DEV_NAME_STR_LEN 32
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WSA8810_NAME_1 "wsa881x.20170211"
  55. #define WSA8810_NAME_2 "wsa881x.20170212"
  56. #define WCN_CDC_SLIM_RX_CH_MAX 2
  57. #define WCN_CDC_SLIM_TX_CH_MAX 3
  58. #define TDM_CHANNEL_MAX 8
  59. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  60. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  61. enum {
  62. SLIM_RX_0 = 0,
  63. SLIM_RX_1,
  64. SLIM_RX_2,
  65. SLIM_RX_3,
  66. SLIM_RX_4,
  67. SLIM_RX_5,
  68. SLIM_RX_6,
  69. SLIM_RX_7,
  70. SLIM_RX_MAX,
  71. };
  72. enum {
  73. SLIM_TX_0 = 0,
  74. SLIM_TX_1,
  75. SLIM_TX_2,
  76. SLIM_TX_3,
  77. SLIM_TX_4,
  78. SLIM_TX_5,
  79. SLIM_TX_6,
  80. SLIM_TX_7,
  81. SLIM_TX_8,
  82. SLIM_TX_MAX,
  83. };
  84. enum {
  85. PRIM_MI2S = 0,
  86. SEC_MI2S,
  87. TERT_MI2S,
  88. QUAT_MI2S,
  89. MI2S_MAX,
  90. };
  91. enum {
  92. PRIM_AUX_PCM = 0,
  93. SEC_AUX_PCM,
  94. TERT_AUX_PCM,
  95. QUAT_AUX_PCM,
  96. AUX_PCM_MAX,
  97. };
  98. struct mi2s_conf {
  99. struct mutex lock;
  100. u32 ref_cnt;
  101. u32 msm_is_mi2s_master;
  102. };
  103. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  104. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  105. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  106. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  107. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
  108. };
  109. struct dev_config {
  110. u32 sample_rate;
  111. u32 bit_format;
  112. u32 channels;
  113. };
  114. enum {
  115. DP_RX_IDX = 0,
  116. EXT_DISP_RX_IDX_MAX,
  117. };
  118. struct msm_wsa881x_dev_info {
  119. struct device_node *of_node;
  120. u32 index;
  121. };
  122. enum pinctrl_pin_state {
  123. STATE_DISABLE = 0, /* All pins are in sleep state */
  124. STATE_MI2S_ACTIVE, /* IS2 = active, TDM = sleep */
  125. STATE_TDM_ACTIVE, /* IS2 = sleep, TDM = active */
  126. };
  127. struct msm_pinctrl_info {
  128. struct pinctrl *pinctrl;
  129. struct pinctrl_state *mi2s_disable;
  130. struct pinctrl_state *tdm_disable;
  131. struct pinctrl_state *mi2s_active;
  132. struct pinctrl_state *tdm_active;
  133. enum pinctrl_pin_state curr_state;
  134. };
  135. struct msm_asoc_mach_data {
  136. struct snd_info_entry *codec_root;
  137. struct msm_pinctrl_info pinctrl_info;
  138. };
  139. struct msm_asoc_wcd93xx_codec {
  140. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  141. enum afe_config_type config_type);
  142. };
  143. static const char *const pin_states[] = {"sleep", "i2s-active",
  144. "tdm-active"};
  145. enum {
  146. TDM_0 = 0,
  147. TDM_1,
  148. TDM_2,
  149. TDM_3,
  150. TDM_4,
  151. TDM_5,
  152. TDM_6,
  153. TDM_7,
  154. TDM_PORT_MAX,
  155. };
  156. enum {
  157. TDM_PRI = 0,
  158. TDM_SEC,
  159. TDM_TERT,
  160. TDM_QUAT,
  161. TDM_INTERFACE_MAX,
  162. };
  163. struct tdm_port {
  164. u32 mode;
  165. u32 channel;
  166. };
  167. /* TDM default config */
  168. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  169. { /* PRI TDM */
  170. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  171. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  172. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  173. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  174. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  175. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  176. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  177. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  178. },
  179. { /* SEC TDM */
  180. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  181. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  182. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  183. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  184. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  185. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  186. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  187. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  188. },
  189. { /* TERT TDM */
  190. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  191. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  192. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  193. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  194. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  195. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  196. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  197. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  198. },
  199. { /* QUAT TDM */
  200. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  201. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  208. }
  209. };
  210. /* TDM default config */
  211. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  212. { /* PRI TDM */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  221. },
  222. { /* SEC TDM */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  231. },
  232. { /* TERT TDM */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  241. },
  242. { /* QUAT TDM */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  251. }
  252. };
  253. /* Default configuration of slimbus channels */
  254. static struct dev_config slim_rx_cfg[] = {
  255. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  256. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  257. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  258. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  259. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  260. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  261. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  262. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  263. };
  264. static struct dev_config slim_tx_cfg[] = {
  265. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  266. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  267. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  268. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  269. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  270. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  271. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  272. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  273. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  274. };
  275. /* Default configuration of external display BE */
  276. static struct dev_config ext_disp_rx_cfg[] = {
  277. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  278. };
  279. static struct dev_config usb_rx_cfg = {
  280. .sample_rate = SAMPLING_RATE_48KHZ,
  281. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  282. .channels = 2,
  283. };
  284. static struct dev_config usb_tx_cfg = {
  285. .sample_rate = SAMPLING_RATE_48KHZ,
  286. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  287. .channels = 1,
  288. };
  289. static struct dev_config proxy_rx_cfg = {
  290. .sample_rate = SAMPLING_RATE_48KHZ,
  291. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  292. .channels = 2,
  293. };
  294. /* Default configuration of MI2S channels */
  295. static struct dev_config mi2s_rx_cfg[] = {
  296. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  297. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  298. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  299. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  300. };
  301. static struct dev_config mi2s_tx_cfg[] = {
  302. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  303. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  304. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  305. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  306. };
  307. static struct dev_config aux_pcm_rx_cfg[] = {
  308. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  309. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  311. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  312. };
  313. static struct dev_config aux_pcm_tx_cfg[] = {
  314. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  316. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  318. };
  319. static int msm_vi_feed_tx_ch = 2;
  320. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  321. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  322. "Five", "Six", "Seven",
  323. "Eight"};
  324. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  325. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  326. "S32_LE"};
  327. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  328. "S24_3LE"};
  329. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  330. "KHZ_32", "KHZ_44P1", "KHZ_48",
  331. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  332. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  333. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  334. "KHZ_44P1", "KHZ_48",
  335. "KHZ_88P2", "KHZ_96"};
  336. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  337. "Five", "Six", "Seven",
  338. "Eight"};
  339. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  340. "Six", "Seven", "Eight"};
  341. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  342. "KHZ_16", "KHZ_22P05",
  343. "KHZ_32", "KHZ_44P1", "KHZ_48",
  344. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  345. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  346. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  347. "KHZ_192", "KHZ_32", "KHZ_44P1",
  348. "KHZ_88P2", "KHZ_176P4" };
  349. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  350. "Five", "Six", "Seven", "Eight"};
  351. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  352. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  353. "KHZ_48", "KHZ_176P4",
  354. "KHZ_352P8"};
  355. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  356. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  357. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  358. "KHZ_48", "KHZ_96", "KHZ_192"};
  359. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  360. "Five", "Six", "Seven",
  361. "Eight"};
  362. static const char *const hifi_text[] = {"Off", "On"};
  363. static const char *const qos_text[] = {"Disable", "Enable"};
  364. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  365. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  366. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  367. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  368. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  369. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  370. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  371. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  372. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  373. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  374. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  375. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  376. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  377. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  378. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  379. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  380. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  381. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  382. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  386. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  388. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  390. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  391. ext_disp_sample_rate_text);
  392. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  394. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  410. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  412. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  414. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  426. static struct platform_device *spdev;
  427. static bool is_initial_boot;
  428. static bool codec_reg_done;
  429. static struct snd_soc_aux_dev *msm_aux_dev;
  430. static struct snd_soc_codec_conf *msm_codec_conf;
  431. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  432. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  433. int enable, bool dapm);
  434. static int msm_wsa881x_init(struct snd_soc_component *component);
  435. static struct snd_soc_dapm_route wcd_audio_paths[] = {
  436. {"MIC BIAS1", NULL, "MCLK TX"},
  437. {"MIC BIAS3", NULL, "MCLK TX"},
  438. {"MIC BIAS4", NULL, "MCLK TX"},
  439. };
  440. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  441. {
  442. AFE_API_VERSION_I2S_CONFIG,
  443. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  444. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  445. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  446. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  447. 0,
  448. },
  449. {
  450. AFE_API_VERSION_I2S_CONFIG,
  451. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  452. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  453. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  454. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  455. 0,
  456. },
  457. {
  458. AFE_API_VERSION_I2S_CONFIG,
  459. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  460. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  461. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  462. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  463. 0,
  464. },
  465. {
  466. AFE_API_VERSION_I2S_CONFIG,
  467. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  468. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  469. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  470. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  471. 0,
  472. }
  473. };
  474. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  475. static int slim_get_sample_rate_val(int sample_rate)
  476. {
  477. int sample_rate_val = 0;
  478. switch (sample_rate) {
  479. case SAMPLING_RATE_8KHZ:
  480. sample_rate_val = 0;
  481. break;
  482. case SAMPLING_RATE_16KHZ:
  483. sample_rate_val = 1;
  484. break;
  485. case SAMPLING_RATE_32KHZ:
  486. sample_rate_val = 2;
  487. break;
  488. case SAMPLING_RATE_44P1KHZ:
  489. sample_rate_val = 3;
  490. break;
  491. case SAMPLING_RATE_48KHZ:
  492. sample_rate_val = 4;
  493. break;
  494. case SAMPLING_RATE_88P2KHZ:
  495. sample_rate_val = 5;
  496. break;
  497. case SAMPLING_RATE_96KHZ:
  498. sample_rate_val = 6;
  499. break;
  500. case SAMPLING_RATE_176P4KHZ:
  501. sample_rate_val = 7;
  502. break;
  503. case SAMPLING_RATE_192KHZ:
  504. sample_rate_val = 8;
  505. break;
  506. case SAMPLING_RATE_352P8KHZ:
  507. sample_rate_val = 9;
  508. break;
  509. case SAMPLING_RATE_384KHZ:
  510. sample_rate_val = 10;
  511. break;
  512. default:
  513. sample_rate_val = 4;
  514. break;
  515. }
  516. return sample_rate_val;
  517. }
  518. static int slim_get_sample_rate(int value)
  519. {
  520. int sample_rate = 0;
  521. switch (value) {
  522. case 0:
  523. sample_rate = SAMPLING_RATE_8KHZ;
  524. break;
  525. case 1:
  526. sample_rate = SAMPLING_RATE_16KHZ;
  527. break;
  528. case 2:
  529. sample_rate = SAMPLING_RATE_32KHZ;
  530. break;
  531. case 3:
  532. sample_rate = SAMPLING_RATE_44P1KHZ;
  533. break;
  534. case 4:
  535. sample_rate = SAMPLING_RATE_48KHZ;
  536. break;
  537. case 5:
  538. sample_rate = SAMPLING_RATE_88P2KHZ;
  539. break;
  540. case 6:
  541. sample_rate = SAMPLING_RATE_96KHZ;
  542. break;
  543. case 7:
  544. sample_rate = SAMPLING_RATE_176P4KHZ;
  545. break;
  546. case 8:
  547. sample_rate = SAMPLING_RATE_192KHZ;
  548. break;
  549. case 9:
  550. sample_rate = SAMPLING_RATE_352P8KHZ;
  551. break;
  552. case 10:
  553. sample_rate = SAMPLING_RATE_384KHZ;
  554. break;
  555. default:
  556. sample_rate = SAMPLING_RATE_48KHZ;
  557. break;
  558. }
  559. return sample_rate;
  560. }
  561. static int slim_get_bit_format_val(int bit_format)
  562. {
  563. int val = 0;
  564. switch (bit_format) {
  565. case SNDRV_PCM_FORMAT_S32_LE:
  566. val = 3;
  567. break;
  568. case SNDRV_PCM_FORMAT_S24_3LE:
  569. val = 2;
  570. break;
  571. case SNDRV_PCM_FORMAT_S24_LE:
  572. val = 1;
  573. break;
  574. case SNDRV_PCM_FORMAT_S16_LE:
  575. default:
  576. val = 0;
  577. break;
  578. }
  579. return val;
  580. }
  581. static int slim_get_bit_format(int val)
  582. {
  583. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  584. switch (val) {
  585. case 0:
  586. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  587. break;
  588. case 1:
  589. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  590. break;
  591. case 2:
  592. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  593. break;
  594. case 3:
  595. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  596. break;
  597. default:
  598. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  599. break;
  600. }
  601. return bit_fmt;
  602. }
  603. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  604. {
  605. int port_id = 0;
  606. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  607. port_id = SLIM_RX_0;
  608. } else if (strnstr(kcontrol->id.name,
  609. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  610. port_id = SLIM_RX_2;
  611. } else if (strnstr(kcontrol->id.name,
  612. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  613. port_id = SLIM_RX_5;
  614. } else if (strnstr(kcontrol->id.name,
  615. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  616. port_id = SLIM_RX_6;
  617. } else if (strnstr(kcontrol->id.name,
  618. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  619. port_id = SLIM_TX_0;
  620. } else if (strnstr(kcontrol->id.name,
  621. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  622. port_id = SLIM_TX_1;
  623. } else {
  624. pr_err("%s: unsupported channel: %s",
  625. __func__, kcontrol->id.name);
  626. return -EINVAL;
  627. }
  628. return port_id;
  629. }
  630. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  631. struct snd_ctl_elem_value *ucontrol)
  632. {
  633. int ch_num = slim_get_port_idx(kcontrol);
  634. if (ch_num < 0)
  635. return ch_num;
  636. ucontrol->value.enumerated.item[0] =
  637. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  638. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  639. ch_num, slim_rx_cfg[ch_num].sample_rate,
  640. ucontrol->value.enumerated.item[0]);
  641. return 0;
  642. }
  643. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  644. struct snd_ctl_elem_value *ucontrol)
  645. {
  646. int ch_num = slim_get_port_idx(kcontrol);
  647. if (ch_num < 0)
  648. return ch_num;
  649. slim_rx_cfg[ch_num].sample_rate =
  650. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  651. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  652. ch_num, slim_rx_cfg[ch_num].sample_rate,
  653. ucontrol->value.enumerated.item[0]);
  654. return 0;
  655. }
  656. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  657. struct snd_ctl_elem_value *ucontrol)
  658. {
  659. int ch_num = slim_get_port_idx(kcontrol);
  660. if (ch_num < 0)
  661. return ch_num;
  662. ucontrol->value.enumerated.item[0] =
  663. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  664. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  665. ch_num, slim_tx_cfg[ch_num].sample_rate,
  666. ucontrol->value.enumerated.item[0]);
  667. return 0;
  668. }
  669. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  670. struct snd_ctl_elem_value *ucontrol)
  671. {
  672. int sample_rate = 0;
  673. int ch_num = slim_get_port_idx(kcontrol);
  674. if (ch_num < 0)
  675. return ch_num;
  676. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  677. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  678. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  679. __func__, sample_rate);
  680. return -EINVAL;
  681. }
  682. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  683. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  684. ch_num, slim_tx_cfg[ch_num].sample_rate,
  685. ucontrol->value.enumerated.item[0]);
  686. return 0;
  687. }
  688. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  689. struct snd_ctl_elem_value *ucontrol)
  690. {
  691. int ch_num = slim_get_port_idx(kcontrol);
  692. if (ch_num < 0)
  693. return ch_num;
  694. ucontrol->value.enumerated.item[0] =
  695. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  696. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  697. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  698. ucontrol->value.enumerated.item[0]);
  699. return 0;
  700. }
  701. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  702. struct snd_ctl_elem_value *ucontrol)
  703. {
  704. int ch_num = slim_get_port_idx(kcontrol);
  705. if (ch_num < 0)
  706. return ch_num;
  707. slim_rx_cfg[ch_num].bit_format =
  708. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  709. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  710. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  711. ucontrol->value.enumerated.item[0]);
  712. return 0;
  713. }
  714. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  715. struct snd_ctl_elem_value *ucontrol)
  716. {
  717. int ch_num = slim_get_port_idx(kcontrol);
  718. if (ch_num < 0)
  719. return ch_num;
  720. ucontrol->value.enumerated.item[0] =
  721. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  722. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  723. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  724. ucontrol->value.enumerated.item[0]);
  725. return 0;
  726. }
  727. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  728. struct snd_ctl_elem_value *ucontrol)
  729. {
  730. int ch_num = slim_get_port_idx(kcontrol);
  731. if (ch_num < 0)
  732. return ch_num;
  733. slim_tx_cfg[ch_num].bit_format =
  734. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  735. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  736. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  737. ucontrol->value.enumerated.item[0]);
  738. return 0;
  739. }
  740. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  741. struct snd_ctl_elem_value *ucontrol)
  742. {
  743. int ch_num = slim_get_port_idx(kcontrol);
  744. if (ch_num < 0)
  745. return ch_num;
  746. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  747. ch_num, slim_rx_cfg[ch_num].channels);
  748. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  749. return 0;
  750. }
  751. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  752. struct snd_ctl_elem_value *ucontrol)
  753. {
  754. int ch_num = slim_get_port_idx(kcontrol);
  755. if (ch_num < 0)
  756. return ch_num;
  757. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  758. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  759. ch_num, slim_rx_cfg[ch_num].channels);
  760. return 1;
  761. }
  762. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  763. struct snd_ctl_elem_value *ucontrol)
  764. {
  765. int ch_num = slim_get_port_idx(kcontrol);
  766. if (ch_num < 0)
  767. return ch_num;
  768. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  769. ch_num, slim_tx_cfg[ch_num].channels);
  770. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  771. return 0;
  772. }
  773. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  774. struct snd_ctl_elem_value *ucontrol)
  775. {
  776. int ch_num = slim_get_port_idx(kcontrol);
  777. if (ch_num < 0)
  778. return ch_num;
  779. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  780. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  781. ch_num, slim_tx_cfg[ch_num].channels);
  782. return 1;
  783. }
  784. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  785. struct snd_ctl_elem_value *ucontrol)
  786. {
  787. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  788. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  789. ucontrol->value.integer.value[0]);
  790. return 0;
  791. }
  792. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  793. struct snd_ctl_elem_value *ucontrol)
  794. {
  795. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  796. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  797. return 1;
  798. }
  799. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  800. struct snd_ctl_elem_value *ucontrol)
  801. {
  802. /*
  803. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  804. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  805. * value.
  806. */
  807. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  808. case SAMPLING_RATE_96KHZ:
  809. ucontrol->value.integer.value[0] = 5;
  810. break;
  811. case SAMPLING_RATE_88P2KHZ:
  812. ucontrol->value.integer.value[0] = 4;
  813. break;
  814. case SAMPLING_RATE_48KHZ:
  815. ucontrol->value.integer.value[0] = 3;
  816. break;
  817. case SAMPLING_RATE_44P1KHZ:
  818. ucontrol->value.integer.value[0] = 2;
  819. break;
  820. case SAMPLING_RATE_16KHZ:
  821. ucontrol->value.integer.value[0] = 1;
  822. break;
  823. case SAMPLING_RATE_8KHZ:
  824. default:
  825. ucontrol->value.integer.value[0] = 0;
  826. break;
  827. }
  828. pr_debug("%s: sample rate = %d", __func__,
  829. slim_rx_cfg[SLIM_RX_7].sample_rate);
  830. return 0;
  831. }
  832. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  833. struct snd_ctl_elem_value *ucontrol)
  834. {
  835. switch (ucontrol->value.integer.value[0]) {
  836. case 1:
  837. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  838. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  839. break;
  840. case 2:
  841. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  842. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  843. break;
  844. case 3:
  845. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  846. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  847. break;
  848. case 4:
  849. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  850. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  851. break;
  852. case 5:
  853. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  854. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  855. break;
  856. case 0:
  857. default:
  858. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  859. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  860. break;
  861. }
  862. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  863. __func__,
  864. slim_rx_cfg[SLIM_RX_7].sample_rate,
  865. slim_tx_cfg[SLIM_TX_7].sample_rate,
  866. ucontrol->value.enumerated.item[0]);
  867. return 0;
  868. }
  869. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  870. struct snd_ctl_elem_value *ucontrol)
  871. {
  872. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  873. usb_rx_cfg.channels);
  874. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  875. return 0;
  876. }
  877. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  878. struct snd_ctl_elem_value *ucontrol)
  879. {
  880. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  881. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  882. return 1;
  883. }
  884. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  885. struct snd_ctl_elem_value *ucontrol)
  886. {
  887. int sample_rate_val;
  888. switch (usb_rx_cfg.sample_rate) {
  889. case SAMPLING_RATE_384KHZ:
  890. sample_rate_val = 12;
  891. break;
  892. case SAMPLING_RATE_352P8KHZ:
  893. sample_rate_val = 11;
  894. break;
  895. case SAMPLING_RATE_192KHZ:
  896. sample_rate_val = 10;
  897. break;
  898. case SAMPLING_RATE_176P4KHZ:
  899. sample_rate_val = 9;
  900. break;
  901. case SAMPLING_RATE_96KHZ:
  902. sample_rate_val = 8;
  903. break;
  904. case SAMPLING_RATE_88P2KHZ:
  905. sample_rate_val = 7;
  906. break;
  907. case SAMPLING_RATE_48KHZ:
  908. sample_rate_val = 6;
  909. break;
  910. case SAMPLING_RATE_44P1KHZ:
  911. sample_rate_val = 5;
  912. break;
  913. case SAMPLING_RATE_32KHZ:
  914. sample_rate_val = 4;
  915. break;
  916. case SAMPLING_RATE_22P05KHZ:
  917. sample_rate_val = 3;
  918. break;
  919. case SAMPLING_RATE_16KHZ:
  920. sample_rate_val = 2;
  921. break;
  922. case SAMPLING_RATE_11P025KHZ:
  923. sample_rate_val = 1;
  924. break;
  925. case SAMPLING_RATE_8KHZ:
  926. default:
  927. sample_rate_val = 0;
  928. break;
  929. }
  930. ucontrol->value.integer.value[0] = sample_rate_val;
  931. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  932. usb_rx_cfg.sample_rate);
  933. return 0;
  934. }
  935. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  936. struct snd_ctl_elem_value *ucontrol)
  937. {
  938. switch (ucontrol->value.integer.value[0]) {
  939. case 12:
  940. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  941. break;
  942. case 11:
  943. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  944. break;
  945. case 10:
  946. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  947. break;
  948. case 9:
  949. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  950. break;
  951. case 8:
  952. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  953. break;
  954. case 7:
  955. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  956. break;
  957. case 6:
  958. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  959. break;
  960. case 5:
  961. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  962. break;
  963. case 4:
  964. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  965. break;
  966. case 3:
  967. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  968. break;
  969. case 2:
  970. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  971. break;
  972. case 1:
  973. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  974. break;
  975. case 0:
  976. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  977. break;
  978. default:
  979. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  980. break;
  981. }
  982. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  983. __func__, ucontrol->value.integer.value[0],
  984. usb_rx_cfg.sample_rate);
  985. return 0;
  986. }
  987. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  988. struct snd_ctl_elem_value *ucontrol)
  989. {
  990. switch (usb_rx_cfg.bit_format) {
  991. case SNDRV_PCM_FORMAT_S32_LE:
  992. ucontrol->value.integer.value[0] = 3;
  993. break;
  994. case SNDRV_PCM_FORMAT_S24_3LE:
  995. ucontrol->value.integer.value[0] = 2;
  996. break;
  997. case SNDRV_PCM_FORMAT_S24_LE:
  998. ucontrol->value.integer.value[0] = 1;
  999. break;
  1000. case SNDRV_PCM_FORMAT_S16_LE:
  1001. default:
  1002. ucontrol->value.integer.value[0] = 0;
  1003. break;
  1004. }
  1005. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1006. __func__, usb_rx_cfg.bit_format,
  1007. ucontrol->value.integer.value[0]);
  1008. return 0;
  1009. }
  1010. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1011. struct snd_ctl_elem_value *ucontrol)
  1012. {
  1013. int rc = 0;
  1014. switch (ucontrol->value.integer.value[0]) {
  1015. case 3:
  1016. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1017. break;
  1018. case 2:
  1019. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1020. break;
  1021. case 1:
  1022. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1023. break;
  1024. case 0:
  1025. default:
  1026. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1027. break;
  1028. }
  1029. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1030. __func__, usb_rx_cfg.bit_format,
  1031. ucontrol->value.integer.value[0]);
  1032. return rc;
  1033. }
  1034. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1035. struct snd_ctl_elem_value *ucontrol)
  1036. {
  1037. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1038. usb_tx_cfg.channels);
  1039. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1040. return 0;
  1041. }
  1042. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1043. struct snd_ctl_elem_value *ucontrol)
  1044. {
  1045. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1046. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1047. return 1;
  1048. }
  1049. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1050. struct snd_ctl_elem_value *ucontrol)
  1051. {
  1052. int sample_rate_val;
  1053. switch (usb_tx_cfg.sample_rate) {
  1054. case SAMPLING_RATE_384KHZ:
  1055. sample_rate_val = 12;
  1056. break;
  1057. case SAMPLING_RATE_352P8KHZ:
  1058. sample_rate_val = 11;
  1059. break;
  1060. case SAMPLING_RATE_192KHZ:
  1061. sample_rate_val = 10;
  1062. break;
  1063. case SAMPLING_RATE_176P4KHZ:
  1064. sample_rate_val = 9;
  1065. break;
  1066. case SAMPLING_RATE_96KHZ:
  1067. sample_rate_val = 8;
  1068. break;
  1069. case SAMPLING_RATE_88P2KHZ:
  1070. sample_rate_val = 7;
  1071. break;
  1072. case SAMPLING_RATE_48KHZ:
  1073. sample_rate_val = 6;
  1074. break;
  1075. case SAMPLING_RATE_44P1KHZ:
  1076. sample_rate_val = 5;
  1077. break;
  1078. case SAMPLING_RATE_32KHZ:
  1079. sample_rate_val = 4;
  1080. break;
  1081. case SAMPLING_RATE_22P05KHZ:
  1082. sample_rate_val = 3;
  1083. break;
  1084. case SAMPLING_RATE_16KHZ:
  1085. sample_rate_val = 2;
  1086. break;
  1087. case SAMPLING_RATE_11P025KHZ:
  1088. sample_rate_val = 1;
  1089. break;
  1090. case SAMPLING_RATE_8KHZ:
  1091. sample_rate_val = 0;
  1092. break;
  1093. default:
  1094. sample_rate_val = 6;
  1095. break;
  1096. }
  1097. ucontrol->value.integer.value[0] = sample_rate_val;
  1098. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1099. usb_tx_cfg.sample_rate);
  1100. return 0;
  1101. }
  1102. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1103. struct snd_ctl_elem_value *ucontrol)
  1104. {
  1105. switch (ucontrol->value.integer.value[0]) {
  1106. case 12:
  1107. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1108. break;
  1109. case 11:
  1110. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1111. break;
  1112. case 10:
  1113. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1114. break;
  1115. case 9:
  1116. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1117. break;
  1118. case 8:
  1119. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1120. break;
  1121. case 7:
  1122. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1123. break;
  1124. case 6:
  1125. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1126. break;
  1127. case 5:
  1128. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1129. break;
  1130. case 4:
  1131. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1132. break;
  1133. case 3:
  1134. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1135. break;
  1136. case 2:
  1137. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1138. break;
  1139. case 1:
  1140. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1141. break;
  1142. case 0:
  1143. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1144. break;
  1145. default:
  1146. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1147. break;
  1148. }
  1149. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1150. __func__, ucontrol->value.integer.value[0],
  1151. usb_tx_cfg.sample_rate);
  1152. return 0;
  1153. }
  1154. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1155. struct snd_ctl_elem_value *ucontrol)
  1156. {
  1157. switch (usb_tx_cfg.bit_format) {
  1158. case SNDRV_PCM_FORMAT_S32_LE:
  1159. ucontrol->value.integer.value[0] = 3;
  1160. break;
  1161. case SNDRV_PCM_FORMAT_S24_3LE:
  1162. ucontrol->value.integer.value[0] = 2;
  1163. break;
  1164. case SNDRV_PCM_FORMAT_S24_LE:
  1165. ucontrol->value.integer.value[0] = 1;
  1166. break;
  1167. case SNDRV_PCM_FORMAT_S16_LE:
  1168. default:
  1169. ucontrol->value.integer.value[0] = 0;
  1170. break;
  1171. }
  1172. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1173. __func__, usb_tx_cfg.bit_format,
  1174. ucontrol->value.integer.value[0]);
  1175. return 0;
  1176. }
  1177. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1178. struct snd_ctl_elem_value *ucontrol)
  1179. {
  1180. int rc = 0;
  1181. switch (ucontrol->value.integer.value[0]) {
  1182. case 3:
  1183. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1184. break;
  1185. case 2:
  1186. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1187. break;
  1188. case 1:
  1189. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1190. break;
  1191. case 0:
  1192. default:
  1193. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1194. break;
  1195. }
  1196. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1197. __func__, usb_tx_cfg.bit_format,
  1198. ucontrol->value.integer.value[0]);
  1199. return rc;
  1200. }
  1201. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1202. {
  1203. int idx;
  1204. if (strnstr(kcontrol->id.name, "Display Port RX",
  1205. sizeof("Display Port RX"))) {
  1206. idx = DP_RX_IDX;
  1207. } else {
  1208. pr_err("%s: unsupported BE: %s",
  1209. __func__, kcontrol->id.name);
  1210. idx = -EINVAL;
  1211. }
  1212. return idx;
  1213. }
  1214. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1215. struct snd_ctl_elem_value *ucontrol)
  1216. {
  1217. int idx = ext_disp_get_port_idx(kcontrol);
  1218. if (idx < 0)
  1219. return idx;
  1220. switch (ext_disp_rx_cfg[idx].bit_format) {
  1221. case SNDRV_PCM_FORMAT_S24_3LE:
  1222. ucontrol->value.integer.value[0] = 2;
  1223. break;
  1224. case SNDRV_PCM_FORMAT_S24_LE:
  1225. ucontrol->value.integer.value[0] = 1;
  1226. break;
  1227. case SNDRV_PCM_FORMAT_S16_LE:
  1228. default:
  1229. ucontrol->value.integer.value[0] = 0;
  1230. break;
  1231. }
  1232. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1233. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1234. ucontrol->value.integer.value[0]);
  1235. return 0;
  1236. }
  1237. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1238. struct snd_ctl_elem_value *ucontrol)
  1239. {
  1240. int idx = ext_disp_get_port_idx(kcontrol);
  1241. if (idx < 0)
  1242. return idx;
  1243. switch (ucontrol->value.integer.value[0]) {
  1244. case 2:
  1245. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1246. break;
  1247. case 1:
  1248. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1249. break;
  1250. case 0:
  1251. default:
  1252. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1253. break;
  1254. }
  1255. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1256. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1257. ucontrol->value.integer.value[0]);
  1258. return 0;
  1259. }
  1260. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1261. struct snd_ctl_elem_value *ucontrol)
  1262. {
  1263. int idx = ext_disp_get_port_idx(kcontrol);
  1264. if (idx < 0)
  1265. return idx;
  1266. ucontrol->value.integer.value[0] =
  1267. ext_disp_rx_cfg[idx].channels - 2;
  1268. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1269. idx, ext_disp_rx_cfg[idx].channels);
  1270. return 0;
  1271. }
  1272. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1273. struct snd_ctl_elem_value *ucontrol)
  1274. {
  1275. int idx = ext_disp_get_port_idx(kcontrol);
  1276. if (idx < 0)
  1277. return idx;
  1278. ext_disp_rx_cfg[idx].channels =
  1279. ucontrol->value.integer.value[0] + 2;
  1280. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1281. idx, ext_disp_rx_cfg[idx].channels);
  1282. return 1;
  1283. }
  1284. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1285. struct snd_ctl_elem_value *ucontrol)
  1286. {
  1287. int sample_rate_val;
  1288. int idx = ext_disp_get_port_idx(kcontrol);
  1289. if (idx < 0)
  1290. return idx;
  1291. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1292. case SAMPLING_RATE_176P4KHZ:
  1293. sample_rate_val = 6;
  1294. break;
  1295. case SAMPLING_RATE_88P2KHZ:
  1296. sample_rate_val = 5;
  1297. break;
  1298. case SAMPLING_RATE_44P1KHZ:
  1299. sample_rate_val = 4;
  1300. break;
  1301. case SAMPLING_RATE_32KHZ:
  1302. sample_rate_val = 3;
  1303. break;
  1304. case SAMPLING_RATE_192KHZ:
  1305. sample_rate_val = 2;
  1306. break;
  1307. case SAMPLING_RATE_96KHZ:
  1308. sample_rate_val = 1;
  1309. break;
  1310. case SAMPLING_RATE_48KHZ:
  1311. default:
  1312. sample_rate_val = 0;
  1313. break;
  1314. }
  1315. ucontrol->value.integer.value[0] = sample_rate_val;
  1316. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1317. idx, ext_disp_rx_cfg[idx].sample_rate);
  1318. return 0;
  1319. }
  1320. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1321. struct snd_ctl_elem_value *ucontrol)
  1322. {
  1323. int idx = ext_disp_get_port_idx(kcontrol);
  1324. if (idx < 0)
  1325. return idx;
  1326. switch (ucontrol->value.integer.value[0]) {
  1327. case 6:
  1328. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1329. break;
  1330. case 5:
  1331. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1332. break;
  1333. case 4:
  1334. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1335. break;
  1336. case 3:
  1337. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1338. break;
  1339. case 2:
  1340. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1341. break;
  1342. case 1:
  1343. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1344. break;
  1345. case 0:
  1346. default:
  1347. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1348. break;
  1349. }
  1350. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1351. __func__, ucontrol->value.integer.value[0], idx,
  1352. ext_disp_rx_cfg[idx].sample_rate);
  1353. return 0;
  1354. }
  1355. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1356. struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. pr_debug("%s: proxy_rx channels = %d\n",
  1359. __func__, proxy_rx_cfg.channels);
  1360. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1361. return 0;
  1362. }
  1363. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1364. struct snd_ctl_elem_value *ucontrol)
  1365. {
  1366. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1367. pr_debug("%s: proxy_rx channels = %d\n",
  1368. __func__, proxy_rx_cfg.channels);
  1369. return 1;
  1370. }
  1371. static int tdm_get_sample_rate(int value)
  1372. {
  1373. int sample_rate = 0;
  1374. switch (value) {
  1375. case 0:
  1376. sample_rate = SAMPLING_RATE_8KHZ;
  1377. break;
  1378. case 1:
  1379. sample_rate = SAMPLING_RATE_16KHZ;
  1380. break;
  1381. case 2:
  1382. sample_rate = SAMPLING_RATE_32KHZ;
  1383. break;
  1384. case 3:
  1385. sample_rate = SAMPLING_RATE_48KHZ;
  1386. break;
  1387. case 4:
  1388. sample_rate = SAMPLING_RATE_176P4KHZ;
  1389. break;
  1390. case 5:
  1391. sample_rate = SAMPLING_RATE_352P8KHZ;
  1392. break;
  1393. default:
  1394. sample_rate = SAMPLING_RATE_48KHZ;
  1395. break;
  1396. }
  1397. return sample_rate;
  1398. }
  1399. static int aux_pcm_get_sample_rate(int value)
  1400. {
  1401. int sample_rate;
  1402. switch (value) {
  1403. case 1:
  1404. sample_rate = SAMPLING_RATE_16KHZ;
  1405. break;
  1406. case 0:
  1407. default:
  1408. sample_rate = SAMPLING_RATE_8KHZ;
  1409. break;
  1410. }
  1411. return sample_rate;
  1412. }
  1413. static int tdm_get_sample_rate_val(int sample_rate)
  1414. {
  1415. int sample_rate_val = 0;
  1416. switch (sample_rate) {
  1417. case SAMPLING_RATE_8KHZ:
  1418. sample_rate_val = 0;
  1419. break;
  1420. case SAMPLING_RATE_16KHZ:
  1421. sample_rate_val = 1;
  1422. break;
  1423. case SAMPLING_RATE_32KHZ:
  1424. sample_rate_val = 2;
  1425. break;
  1426. case SAMPLING_RATE_48KHZ:
  1427. sample_rate_val = 3;
  1428. break;
  1429. case SAMPLING_RATE_176P4KHZ:
  1430. sample_rate_val = 4;
  1431. break;
  1432. case SAMPLING_RATE_352P8KHZ:
  1433. sample_rate_val = 5;
  1434. break;
  1435. default:
  1436. sample_rate_val = 3;
  1437. break;
  1438. }
  1439. return sample_rate_val;
  1440. }
  1441. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1442. {
  1443. int sample_rate_val;
  1444. switch (sample_rate) {
  1445. case SAMPLING_RATE_16KHZ:
  1446. sample_rate_val = 1;
  1447. break;
  1448. case SAMPLING_RATE_8KHZ:
  1449. default:
  1450. sample_rate_val = 0;
  1451. break;
  1452. }
  1453. return sample_rate_val;
  1454. }
  1455. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1456. struct tdm_port *port)
  1457. {
  1458. if (port) {
  1459. if (strnstr(kcontrol->id.name, "PRI",
  1460. sizeof(kcontrol->id.name))) {
  1461. port->mode = TDM_PRI;
  1462. } else if (strnstr(kcontrol->id.name, "SEC",
  1463. sizeof(kcontrol->id.name))) {
  1464. port->mode = TDM_SEC;
  1465. } else if (strnstr(kcontrol->id.name, "TERT",
  1466. sizeof(kcontrol->id.name))) {
  1467. port->mode = TDM_TERT;
  1468. } else if (strnstr(kcontrol->id.name, "QUAT",
  1469. sizeof(kcontrol->id.name))) {
  1470. port->mode = TDM_QUAT;
  1471. } else {
  1472. pr_err("%s: unsupported mode in: %s",
  1473. __func__, kcontrol->id.name);
  1474. return -EINVAL;
  1475. }
  1476. if (strnstr(kcontrol->id.name, "RX_0",
  1477. sizeof(kcontrol->id.name)) ||
  1478. strnstr(kcontrol->id.name, "TX_0",
  1479. sizeof(kcontrol->id.name))) {
  1480. port->channel = TDM_0;
  1481. } else if (strnstr(kcontrol->id.name, "RX_1",
  1482. sizeof(kcontrol->id.name)) ||
  1483. strnstr(kcontrol->id.name, "TX_1",
  1484. sizeof(kcontrol->id.name))) {
  1485. port->channel = TDM_1;
  1486. } else if (strnstr(kcontrol->id.name, "RX_2",
  1487. sizeof(kcontrol->id.name)) ||
  1488. strnstr(kcontrol->id.name, "TX_2",
  1489. sizeof(kcontrol->id.name))) {
  1490. port->channel = TDM_2;
  1491. } else if (strnstr(kcontrol->id.name, "RX_3",
  1492. sizeof(kcontrol->id.name)) ||
  1493. strnstr(kcontrol->id.name, "TX_3",
  1494. sizeof(kcontrol->id.name))) {
  1495. port->channel = TDM_3;
  1496. } else if (strnstr(kcontrol->id.name, "RX_4",
  1497. sizeof(kcontrol->id.name)) ||
  1498. strnstr(kcontrol->id.name, "TX_4",
  1499. sizeof(kcontrol->id.name))) {
  1500. port->channel = TDM_4;
  1501. } else if (strnstr(kcontrol->id.name, "RX_5",
  1502. sizeof(kcontrol->id.name)) ||
  1503. strnstr(kcontrol->id.name, "TX_5",
  1504. sizeof(kcontrol->id.name))) {
  1505. port->channel = TDM_5;
  1506. } else if (strnstr(kcontrol->id.name, "RX_6",
  1507. sizeof(kcontrol->id.name)) ||
  1508. strnstr(kcontrol->id.name, "TX_6",
  1509. sizeof(kcontrol->id.name))) {
  1510. port->channel = TDM_6;
  1511. } else if (strnstr(kcontrol->id.name, "RX_7",
  1512. sizeof(kcontrol->id.name)) ||
  1513. strnstr(kcontrol->id.name, "TX_7",
  1514. sizeof(kcontrol->id.name))) {
  1515. port->channel = TDM_7;
  1516. } else {
  1517. pr_err("%s: unsupported channel in: %s",
  1518. __func__, kcontrol->id.name);
  1519. return -EINVAL;
  1520. }
  1521. } else
  1522. return -EINVAL;
  1523. return 0;
  1524. }
  1525. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1526. struct snd_ctl_elem_value *ucontrol)
  1527. {
  1528. struct tdm_port port;
  1529. int ret = tdm_get_port_idx(kcontrol, &port);
  1530. if (ret) {
  1531. pr_err("%s: unsupported control: %s",
  1532. __func__, kcontrol->id.name);
  1533. } else {
  1534. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1535. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1536. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1537. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1538. ucontrol->value.enumerated.item[0]);
  1539. }
  1540. return ret;
  1541. }
  1542. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1543. struct snd_ctl_elem_value *ucontrol)
  1544. {
  1545. struct tdm_port port;
  1546. int ret = tdm_get_port_idx(kcontrol, &port);
  1547. if (ret) {
  1548. pr_err("%s: unsupported control: %s",
  1549. __func__, kcontrol->id.name);
  1550. } else {
  1551. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1552. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1553. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1554. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1555. ucontrol->value.enumerated.item[0]);
  1556. }
  1557. return ret;
  1558. }
  1559. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1560. struct snd_ctl_elem_value *ucontrol)
  1561. {
  1562. struct tdm_port port;
  1563. int ret = tdm_get_port_idx(kcontrol, &port);
  1564. if (ret) {
  1565. pr_err("%s: unsupported control: %s",
  1566. __func__, kcontrol->id.name);
  1567. } else {
  1568. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1569. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1570. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1571. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1572. ucontrol->value.enumerated.item[0]);
  1573. }
  1574. return ret;
  1575. }
  1576. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1577. struct snd_ctl_elem_value *ucontrol)
  1578. {
  1579. struct tdm_port port;
  1580. int ret = tdm_get_port_idx(kcontrol, &port);
  1581. if (ret) {
  1582. pr_err("%s: unsupported control: %s",
  1583. __func__, kcontrol->id.name);
  1584. } else {
  1585. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1586. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1587. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1588. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1589. ucontrol->value.enumerated.item[0]);
  1590. }
  1591. return ret;
  1592. }
  1593. static int tdm_get_format(int value)
  1594. {
  1595. int format = 0;
  1596. switch (value) {
  1597. case 0:
  1598. format = SNDRV_PCM_FORMAT_S16_LE;
  1599. break;
  1600. case 1:
  1601. format = SNDRV_PCM_FORMAT_S24_LE;
  1602. break;
  1603. case 2:
  1604. format = SNDRV_PCM_FORMAT_S32_LE;
  1605. break;
  1606. default:
  1607. format = SNDRV_PCM_FORMAT_S16_LE;
  1608. break;
  1609. }
  1610. return format;
  1611. }
  1612. static int tdm_get_format_val(int format)
  1613. {
  1614. int value = 0;
  1615. switch (format) {
  1616. case SNDRV_PCM_FORMAT_S16_LE:
  1617. value = 0;
  1618. break;
  1619. case SNDRV_PCM_FORMAT_S24_LE:
  1620. value = 1;
  1621. break;
  1622. case SNDRV_PCM_FORMAT_S32_LE:
  1623. value = 2;
  1624. break;
  1625. default:
  1626. value = 0;
  1627. break;
  1628. }
  1629. return value;
  1630. }
  1631. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1632. struct snd_ctl_elem_value *ucontrol)
  1633. {
  1634. struct tdm_port port;
  1635. int ret = tdm_get_port_idx(kcontrol, &port);
  1636. if (ret) {
  1637. pr_err("%s: unsupported control: %s",
  1638. __func__, kcontrol->id.name);
  1639. } else {
  1640. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1641. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1642. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1643. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1644. ucontrol->value.enumerated.item[0]);
  1645. }
  1646. return ret;
  1647. }
  1648. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1649. struct snd_ctl_elem_value *ucontrol)
  1650. {
  1651. struct tdm_port port;
  1652. int ret = tdm_get_port_idx(kcontrol, &port);
  1653. if (ret) {
  1654. pr_err("%s: unsupported control: %s",
  1655. __func__, kcontrol->id.name);
  1656. } else {
  1657. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1658. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1659. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1660. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1661. ucontrol->value.enumerated.item[0]);
  1662. }
  1663. return ret;
  1664. }
  1665. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1666. struct snd_ctl_elem_value *ucontrol)
  1667. {
  1668. struct tdm_port port;
  1669. int ret = tdm_get_port_idx(kcontrol, &port);
  1670. if (ret) {
  1671. pr_err("%s: unsupported control: %s",
  1672. __func__, kcontrol->id.name);
  1673. } else {
  1674. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1675. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1676. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1677. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1678. ucontrol->value.enumerated.item[0]);
  1679. }
  1680. return ret;
  1681. }
  1682. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1683. struct snd_ctl_elem_value *ucontrol)
  1684. {
  1685. struct tdm_port port;
  1686. int ret = tdm_get_port_idx(kcontrol, &port);
  1687. if (ret) {
  1688. pr_err("%s: unsupported control: %s",
  1689. __func__, kcontrol->id.name);
  1690. } else {
  1691. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1692. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1693. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1694. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1695. ucontrol->value.enumerated.item[0]);
  1696. }
  1697. return ret;
  1698. }
  1699. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1700. struct snd_ctl_elem_value *ucontrol)
  1701. {
  1702. struct tdm_port port;
  1703. int ret = tdm_get_port_idx(kcontrol, &port);
  1704. if (ret) {
  1705. pr_err("%s: unsupported control: %s",
  1706. __func__, kcontrol->id.name);
  1707. } else {
  1708. ucontrol->value.enumerated.item[0] =
  1709. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1710. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1711. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1712. ucontrol->value.enumerated.item[0]);
  1713. }
  1714. return ret;
  1715. }
  1716. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1717. struct snd_ctl_elem_value *ucontrol)
  1718. {
  1719. struct tdm_port port;
  1720. int ret = tdm_get_port_idx(kcontrol, &port);
  1721. if (ret) {
  1722. pr_err("%s: unsupported control: %s",
  1723. __func__, kcontrol->id.name);
  1724. } else {
  1725. tdm_rx_cfg[port.mode][port.channel].channels =
  1726. ucontrol->value.enumerated.item[0] + 1;
  1727. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1728. tdm_rx_cfg[port.mode][port.channel].channels,
  1729. ucontrol->value.enumerated.item[0] + 1);
  1730. }
  1731. return ret;
  1732. }
  1733. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1734. struct snd_ctl_elem_value *ucontrol)
  1735. {
  1736. struct tdm_port port;
  1737. int ret = tdm_get_port_idx(kcontrol, &port);
  1738. if (ret) {
  1739. pr_err("%s: unsupported control: %s",
  1740. __func__, kcontrol->id.name);
  1741. } else {
  1742. ucontrol->value.enumerated.item[0] =
  1743. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1744. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1745. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1746. ucontrol->value.enumerated.item[0]);
  1747. }
  1748. return ret;
  1749. }
  1750. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1751. struct snd_ctl_elem_value *ucontrol)
  1752. {
  1753. struct tdm_port port;
  1754. int ret = tdm_get_port_idx(kcontrol, &port);
  1755. if (ret) {
  1756. pr_err("%s: unsupported control: %s",
  1757. __func__, kcontrol->id.name);
  1758. } else {
  1759. tdm_tx_cfg[port.mode][port.channel].channels =
  1760. ucontrol->value.enumerated.item[0] + 1;
  1761. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1762. tdm_tx_cfg[port.mode][port.channel].channels,
  1763. ucontrol->value.enumerated.item[0] + 1);
  1764. }
  1765. return ret;
  1766. }
  1767. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1768. {
  1769. int idx;
  1770. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1771. sizeof("PRIM_AUX_PCM")))
  1772. idx = PRIM_AUX_PCM;
  1773. else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1774. sizeof("SEC_AUX_PCM")))
  1775. idx = SEC_AUX_PCM;
  1776. else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1777. sizeof("TERT_AUX_PCM")))
  1778. idx = TERT_AUX_PCM;
  1779. else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  1780. sizeof("QUAT_AUX_PCM")))
  1781. idx = QUAT_AUX_PCM;
  1782. else {
  1783. pr_err("%s: unsupported port: %s",
  1784. __func__, kcontrol->id.name);
  1785. idx = -EINVAL;
  1786. }
  1787. return idx;
  1788. }
  1789. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1790. struct snd_ctl_elem_value *ucontrol)
  1791. {
  1792. int idx = aux_pcm_get_port_idx(kcontrol);
  1793. if (idx < 0)
  1794. return idx;
  1795. aux_pcm_rx_cfg[idx].sample_rate =
  1796. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1797. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1798. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1799. ucontrol->value.enumerated.item[0]);
  1800. return 0;
  1801. }
  1802. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1803. struct snd_ctl_elem_value *ucontrol)
  1804. {
  1805. int idx = aux_pcm_get_port_idx(kcontrol);
  1806. if (idx < 0)
  1807. return idx;
  1808. ucontrol->value.enumerated.item[0] =
  1809. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1810. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1811. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1812. ucontrol->value.enumerated.item[0]);
  1813. return 0;
  1814. }
  1815. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1816. struct snd_ctl_elem_value *ucontrol)
  1817. {
  1818. int idx = aux_pcm_get_port_idx(kcontrol);
  1819. if (idx < 0)
  1820. return idx;
  1821. aux_pcm_tx_cfg[idx].sample_rate =
  1822. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1823. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1824. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1825. ucontrol->value.enumerated.item[0]);
  1826. return 0;
  1827. }
  1828. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1829. struct snd_ctl_elem_value *ucontrol)
  1830. {
  1831. int idx = aux_pcm_get_port_idx(kcontrol);
  1832. if (idx < 0)
  1833. return idx;
  1834. ucontrol->value.enumerated.item[0] =
  1835. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1836. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1837. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1838. ucontrol->value.enumerated.item[0]);
  1839. return 0;
  1840. }
  1841. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1842. {
  1843. int idx;
  1844. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1845. sizeof("PRIM_MI2S_RX")))
  1846. idx = PRIM_MI2S;
  1847. else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1848. sizeof("SEC_MI2S_RX")))
  1849. idx = SEC_MI2S;
  1850. else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1851. sizeof("TERT_MI2S_RX")))
  1852. idx = TERT_MI2S;
  1853. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  1854. sizeof("QUAT_MI2S_RX")))
  1855. idx = QUAT_MI2S;
  1856. else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1857. sizeof("PRIM_MI2S_TX")))
  1858. idx = PRIM_MI2S;
  1859. else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1860. sizeof("SEC_MI2S_TX")))
  1861. idx = SEC_MI2S;
  1862. else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1863. sizeof("TERT_MI2S_TX")))
  1864. idx = TERT_MI2S;
  1865. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  1866. sizeof("QUAT_MI2S_TX")))
  1867. idx = QUAT_MI2S;
  1868. else {
  1869. pr_err("%s: unsupported channel: %s",
  1870. __func__, kcontrol->id.name);
  1871. idx = -EINVAL;
  1872. }
  1873. return idx;
  1874. }
  1875. static int mi2s_get_sample_rate_val(int sample_rate)
  1876. {
  1877. int sample_rate_val;
  1878. switch (sample_rate) {
  1879. case SAMPLING_RATE_8KHZ:
  1880. sample_rate_val = 0;
  1881. break;
  1882. case SAMPLING_RATE_11P025KHZ:
  1883. sample_rate_val = 1;
  1884. break;
  1885. case SAMPLING_RATE_16KHZ:
  1886. sample_rate_val = 2;
  1887. break;
  1888. case SAMPLING_RATE_22P05KHZ:
  1889. sample_rate_val = 3;
  1890. break;
  1891. case SAMPLING_RATE_32KHZ:
  1892. sample_rate_val = 4;
  1893. break;
  1894. case SAMPLING_RATE_44P1KHZ:
  1895. sample_rate_val = 5;
  1896. break;
  1897. case SAMPLING_RATE_48KHZ:
  1898. sample_rate_val = 6;
  1899. break;
  1900. case SAMPLING_RATE_96KHZ:
  1901. sample_rate_val = 7;
  1902. break;
  1903. case SAMPLING_RATE_192KHZ:
  1904. sample_rate_val = 8;
  1905. break;
  1906. default:
  1907. sample_rate_val = 6;
  1908. break;
  1909. }
  1910. return sample_rate_val;
  1911. }
  1912. static int mi2s_get_sample_rate(int value)
  1913. {
  1914. int sample_rate;
  1915. switch (value) {
  1916. case 0:
  1917. sample_rate = SAMPLING_RATE_8KHZ;
  1918. break;
  1919. case 1:
  1920. sample_rate = SAMPLING_RATE_11P025KHZ;
  1921. break;
  1922. case 2:
  1923. sample_rate = SAMPLING_RATE_16KHZ;
  1924. break;
  1925. case 3:
  1926. sample_rate = SAMPLING_RATE_22P05KHZ;
  1927. break;
  1928. case 4:
  1929. sample_rate = SAMPLING_RATE_32KHZ;
  1930. break;
  1931. case 5:
  1932. sample_rate = SAMPLING_RATE_44P1KHZ;
  1933. break;
  1934. case 6:
  1935. sample_rate = SAMPLING_RATE_48KHZ;
  1936. break;
  1937. case 7:
  1938. sample_rate = SAMPLING_RATE_96KHZ;
  1939. break;
  1940. case 8:
  1941. sample_rate = SAMPLING_RATE_192KHZ;
  1942. break;
  1943. default:
  1944. sample_rate = SAMPLING_RATE_48KHZ;
  1945. break;
  1946. }
  1947. return sample_rate;
  1948. }
  1949. static int mi2s_auxpcm_get_format(int value)
  1950. {
  1951. int format;
  1952. switch (value) {
  1953. case 0:
  1954. format = SNDRV_PCM_FORMAT_S16_LE;
  1955. break;
  1956. case 1:
  1957. format = SNDRV_PCM_FORMAT_S24_LE;
  1958. break;
  1959. case 2:
  1960. format = SNDRV_PCM_FORMAT_S24_3LE;
  1961. break;
  1962. case 3:
  1963. format = SNDRV_PCM_FORMAT_S32_LE;
  1964. break;
  1965. default:
  1966. format = SNDRV_PCM_FORMAT_S16_LE;
  1967. break;
  1968. }
  1969. return format;
  1970. }
  1971. static int mi2s_auxpcm_get_format_value(int format)
  1972. {
  1973. int value;
  1974. switch (format) {
  1975. case SNDRV_PCM_FORMAT_S16_LE:
  1976. value = 0;
  1977. break;
  1978. case SNDRV_PCM_FORMAT_S24_LE:
  1979. value = 1;
  1980. break;
  1981. case SNDRV_PCM_FORMAT_S24_3LE:
  1982. value = 2;
  1983. break;
  1984. case SNDRV_PCM_FORMAT_S32_LE:
  1985. value = 3;
  1986. break;
  1987. default:
  1988. value = 0;
  1989. break;
  1990. }
  1991. return value;
  1992. }
  1993. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1994. struct snd_ctl_elem_value *ucontrol)
  1995. {
  1996. int idx = mi2s_get_port_idx(kcontrol);
  1997. if (idx < 0)
  1998. return idx;
  1999. mi2s_rx_cfg[idx].sample_rate =
  2000. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2001. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2002. idx, mi2s_rx_cfg[idx].sample_rate,
  2003. ucontrol->value.enumerated.item[0]);
  2004. return 0;
  2005. }
  2006. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2007. struct snd_ctl_elem_value *ucontrol)
  2008. {
  2009. int idx = mi2s_get_port_idx(kcontrol);
  2010. if (idx < 0)
  2011. return idx;
  2012. ucontrol->value.enumerated.item[0] =
  2013. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2014. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2015. idx, mi2s_rx_cfg[idx].sample_rate,
  2016. ucontrol->value.enumerated.item[0]);
  2017. return 0;
  2018. }
  2019. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2020. struct snd_ctl_elem_value *ucontrol)
  2021. {
  2022. int idx = mi2s_get_port_idx(kcontrol);
  2023. if (idx < 0)
  2024. return idx;
  2025. mi2s_tx_cfg[idx].sample_rate =
  2026. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2027. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2028. idx, mi2s_tx_cfg[idx].sample_rate,
  2029. ucontrol->value.enumerated.item[0]);
  2030. return 0;
  2031. }
  2032. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2033. struct snd_ctl_elem_value *ucontrol)
  2034. {
  2035. int idx = mi2s_get_port_idx(kcontrol);
  2036. if (idx < 0)
  2037. return idx;
  2038. ucontrol->value.enumerated.item[0] =
  2039. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2040. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2041. idx, mi2s_tx_cfg[idx].sample_rate,
  2042. ucontrol->value.enumerated.item[0]);
  2043. return 0;
  2044. }
  2045. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2046. struct snd_ctl_elem_value *ucontrol)
  2047. {
  2048. int idx = mi2s_get_port_idx(kcontrol);
  2049. if (idx < 0)
  2050. return idx;
  2051. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2052. idx, mi2s_rx_cfg[idx].channels);
  2053. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2054. return 0;
  2055. }
  2056. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2057. struct snd_ctl_elem_value *ucontrol)
  2058. {
  2059. int idx = mi2s_get_port_idx(kcontrol);
  2060. if (idx < 0)
  2061. return idx;
  2062. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2063. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2064. idx, mi2s_rx_cfg[idx].channels);
  2065. return 1;
  2066. }
  2067. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2068. struct snd_ctl_elem_value *ucontrol)
  2069. {
  2070. int idx = mi2s_get_port_idx(kcontrol);
  2071. if (idx < 0)
  2072. return idx;
  2073. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2074. idx, mi2s_tx_cfg[idx].channels);
  2075. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2076. return 0;
  2077. }
  2078. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2079. struct snd_ctl_elem_value *ucontrol)
  2080. {
  2081. int idx = mi2s_get_port_idx(kcontrol);
  2082. if (idx < 0)
  2083. return idx;
  2084. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2085. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2086. idx, mi2s_tx_cfg[idx].channels);
  2087. return 1;
  2088. }
  2089. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2090. struct snd_ctl_elem_value *ucontrol)
  2091. {
  2092. int idx = mi2s_get_port_idx(kcontrol);
  2093. if (idx < 0)
  2094. return idx;
  2095. ucontrol->value.enumerated.item[0] =
  2096. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2097. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2098. idx, mi2s_rx_cfg[idx].bit_format,
  2099. ucontrol->value.enumerated.item[0]);
  2100. return 0;
  2101. }
  2102. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2103. struct snd_ctl_elem_value *ucontrol)
  2104. {
  2105. int idx = mi2s_get_port_idx(kcontrol);
  2106. if (idx < 0)
  2107. return idx;
  2108. mi2s_rx_cfg[idx].bit_format =
  2109. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2110. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2111. idx, mi2s_rx_cfg[idx].bit_format,
  2112. ucontrol->value.enumerated.item[0]);
  2113. return 0;
  2114. }
  2115. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2116. struct snd_ctl_elem_value *ucontrol)
  2117. {
  2118. int idx = mi2s_get_port_idx(kcontrol);
  2119. if (idx < 0)
  2120. return idx;
  2121. ucontrol->value.enumerated.item[0] =
  2122. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2123. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2124. idx, mi2s_tx_cfg[idx].bit_format,
  2125. ucontrol->value.enumerated.item[0]);
  2126. return 0;
  2127. }
  2128. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2129. struct snd_ctl_elem_value *ucontrol)
  2130. {
  2131. int idx = mi2s_get_port_idx(kcontrol);
  2132. if (idx < 0)
  2133. return idx;
  2134. mi2s_tx_cfg[idx].bit_format =
  2135. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2136. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2137. idx, mi2s_tx_cfg[idx].bit_format,
  2138. ucontrol->value.enumerated.item[0]);
  2139. return 0;
  2140. }
  2141. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2142. struct snd_ctl_elem_value *ucontrol)
  2143. {
  2144. int idx = aux_pcm_get_port_idx(kcontrol);
  2145. if (idx < 0)
  2146. return idx;
  2147. ucontrol->value.enumerated.item[0] =
  2148. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2149. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2150. idx, aux_pcm_rx_cfg[idx].bit_format,
  2151. ucontrol->value.enumerated.item[0]);
  2152. return 0;
  2153. }
  2154. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2155. struct snd_ctl_elem_value *ucontrol)
  2156. {
  2157. int idx = aux_pcm_get_port_idx(kcontrol);
  2158. if (idx < 0)
  2159. return idx;
  2160. aux_pcm_rx_cfg[idx].bit_format =
  2161. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2162. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2163. idx, aux_pcm_rx_cfg[idx].bit_format,
  2164. ucontrol->value.enumerated.item[0]);
  2165. return 0;
  2166. }
  2167. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2168. struct snd_ctl_elem_value *ucontrol)
  2169. {
  2170. int idx = aux_pcm_get_port_idx(kcontrol);
  2171. if (idx < 0)
  2172. return idx;
  2173. ucontrol->value.enumerated.item[0] =
  2174. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2175. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2176. idx, aux_pcm_tx_cfg[idx].bit_format,
  2177. ucontrol->value.enumerated.item[0]);
  2178. return 0;
  2179. }
  2180. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2181. struct snd_ctl_elem_value *ucontrol)
  2182. {
  2183. int idx = aux_pcm_get_port_idx(kcontrol);
  2184. if (idx < 0)
  2185. return idx;
  2186. aux_pcm_tx_cfg[idx].bit_format =
  2187. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2188. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2189. idx, aux_pcm_tx_cfg[idx].bit_format,
  2190. ucontrol->value.enumerated.item[0]);
  2191. return 0;
  2192. }
  2193. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2194. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2195. slim_rx_ch_get, slim_rx_ch_put),
  2196. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2197. slim_rx_ch_get, slim_rx_ch_put),
  2198. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2199. slim_tx_ch_get, slim_tx_ch_put),
  2200. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2201. slim_tx_ch_get, slim_tx_ch_put),
  2202. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2203. slim_rx_ch_get, slim_rx_ch_put),
  2204. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2205. slim_rx_ch_get, slim_rx_ch_put),
  2206. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2207. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2208. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2209. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2210. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2211. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2212. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2213. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2214. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2215. proxy_rx_ch_get, proxy_rx_ch_put),
  2216. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2217. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2218. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2219. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2220. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2221. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2222. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2223. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2224. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2225. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2226. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2227. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2228. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2229. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2230. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2231. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2232. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2233. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2234. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2235. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2236. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2237. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2238. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2239. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2240. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2241. msm_bt_sample_rate_get,
  2242. msm_bt_sample_rate_put),
  2243. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2244. usb_audio_rx_sample_rate_get,
  2245. usb_audio_rx_sample_rate_put),
  2246. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2247. usb_audio_tx_sample_rate_get,
  2248. usb_audio_tx_sample_rate_put),
  2249. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  2250. ext_disp_rx_sample_rate_get,
  2251. ext_disp_rx_sample_rate_put),
  2252. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2253. tdm_rx_sample_rate_get,
  2254. tdm_rx_sample_rate_put),
  2255. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2256. tdm_tx_sample_rate_get,
  2257. tdm_tx_sample_rate_put),
  2258. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2259. tdm_rx_format_get,
  2260. tdm_rx_format_put),
  2261. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2262. tdm_tx_format_get,
  2263. tdm_tx_format_put),
  2264. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2265. tdm_rx_ch_get,
  2266. tdm_rx_ch_put),
  2267. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2268. tdm_tx_ch_get,
  2269. tdm_tx_ch_put),
  2270. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2271. tdm_rx_sample_rate_get,
  2272. tdm_rx_sample_rate_put),
  2273. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2274. tdm_tx_sample_rate_get,
  2275. tdm_tx_sample_rate_put),
  2276. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2277. tdm_rx_format_get,
  2278. tdm_rx_format_put),
  2279. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2280. tdm_tx_format_get,
  2281. tdm_tx_format_put),
  2282. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2283. tdm_rx_ch_get,
  2284. tdm_rx_ch_put),
  2285. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2286. tdm_tx_ch_get,
  2287. tdm_tx_ch_put),
  2288. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2289. tdm_rx_sample_rate_get,
  2290. tdm_rx_sample_rate_put),
  2291. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2292. tdm_tx_sample_rate_get,
  2293. tdm_tx_sample_rate_put),
  2294. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2295. tdm_rx_format_get,
  2296. tdm_rx_format_put),
  2297. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2298. tdm_tx_format_get,
  2299. tdm_tx_format_put),
  2300. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2301. tdm_rx_ch_get,
  2302. tdm_rx_ch_put),
  2303. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2304. tdm_tx_ch_get,
  2305. tdm_tx_ch_put),
  2306. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2307. tdm_rx_sample_rate_get,
  2308. tdm_rx_sample_rate_put),
  2309. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2310. tdm_tx_sample_rate_get,
  2311. tdm_tx_sample_rate_put),
  2312. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  2313. tdm_rx_format_get,
  2314. tdm_rx_format_put),
  2315. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  2316. tdm_tx_format_get,
  2317. tdm_tx_format_put),
  2318. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  2319. tdm_rx_ch_get,
  2320. tdm_rx_ch_put),
  2321. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  2322. tdm_tx_ch_get,
  2323. tdm_tx_ch_put),
  2324. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2325. aux_pcm_rx_sample_rate_get,
  2326. aux_pcm_rx_sample_rate_put),
  2327. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2328. aux_pcm_rx_sample_rate_get,
  2329. aux_pcm_rx_sample_rate_put),
  2330. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2331. aux_pcm_rx_sample_rate_get,
  2332. aux_pcm_rx_sample_rate_put),
  2333. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  2334. aux_pcm_rx_sample_rate_get,
  2335. aux_pcm_rx_sample_rate_put),
  2336. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2337. aux_pcm_tx_sample_rate_get,
  2338. aux_pcm_tx_sample_rate_put),
  2339. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2340. aux_pcm_tx_sample_rate_get,
  2341. aux_pcm_tx_sample_rate_put),
  2342. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2343. aux_pcm_tx_sample_rate_get,
  2344. aux_pcm_tx_sample_rate_put),
  2345. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  2346. aux_pcm_tx_sample_rate_get,
  2347. aux_pcm_tx_sample_rate_put),
  2348. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2349. mi2s_rx_sample_rate_get,
  2350. mi2s_rx_sample_rate_put),
  2351. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2352. mi2s_rx_sample_rate_get,
  2353. mi2s_rx_sample_rate_put),
  2354. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2355. mi2s_rx_sample_rate_get,
  2356. mi2s_rx_sample_rate_put),
  2357. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  2358. mi2s_rx_sample_rate_get,
  2359. mi2s_rx_sample_rate_put),
  2360. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2361. mi2s_tx_sample_rate_get,
  2362. mi2s_tx_sample_rate_put),
  2363. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2364. mi2s_tx_sample_rate_get,
  2365. mi2s_tx_sample_rate_put),
  2366. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2367. mi2s_tx_sample_rate_get,
  2368. mi2s_tx_sample_rate_put),
  2369. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  2370. mi2s_tx_sample_rate_get,
  2371. mi2s_tx_sample_rate_put),
  2372. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2373. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2374. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2375. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2376. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2377. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2378. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2379. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2380. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2381. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2382. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2383. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2384. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  2385. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2386. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  2387. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2388. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2389. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2390. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2391. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2392. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2393. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2394. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2395. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2396. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2397. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2398. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2399. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2400. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  2401. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2402. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  2403. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2404. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2405. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2406. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2407. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2408. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2409. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2410. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2411. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2412. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2413. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2414. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2415. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2416. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2417. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2418. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2419. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2420. };
  2421. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  2422. int enable, bool dapm)
  2423. {
  2424. int ret = 0;
  2425. if (!strcmp(dev_name(codec->dev), "pahu_codec")) {
  2426. ret = pahu_cdc_mclk_enable(codec, enable);
  2427. } else {
  2428. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  2429. __func__);
  2430. ret = -EINVAL;
  2431. }
  2432. return ret;
  2433. }
  2434. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  2435. int enable, bool dapm)
  2436. {
  2437. int ret = 0;
  2438. if (!strcmp(dev_name(codec->dev), "pahu_codec")) {
  2439. ret = pahu_cdc_mclk_tx_enable(codec, enable);
  2440. } else {
  2441. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  2442. __func__);
  2443. ret = -EINVAL;
  2444. }
  2445. return ret;
  2446. }
  2447. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  2448. struct snd_kcontrol *kcontrol, int event)
  2449. {
  2450. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2451. pr_debug("%s: event = %d\n", __func__, event);
  2452. switch (event) {
  2453. case SND_SOC_DAPM_PRE_PMU:
  2454. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  2455. case SND_SOC_DAPM_POST_PMD:
  2456. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  2457. }
  2458. return 0;
  2459. }
  2460. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  2461. struct snd_kcontrol *kcontrol, int event)
  2462. {
  2463. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2464. pr_debug("%s: event = %d\n", __func__, event);
  2465. switch (event) {
  2466. case SND_SOC_DAPM_PRE_PMU:
  2467. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  2468. case SND_SOC_DAPM_POST_PMD:
  2469. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  2470. }
  2471. return 0;
  2472. }
  2473. static const struct snd_soc_dapm_widget msm_dapm_widgets[] = {
  2474. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  2475. msm_mclk_event,
  2476. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2477. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  2478. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2479. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  2480. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  2481. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  2482. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  2483. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  2484. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  2485. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  2486. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  2487. SND_SOC_DAPM_MIC("Digital Mic6", NULL),
  2488. SND_SOC_DAPM_MIC("Digital Mic7", NULL),
  2489. };
  2490. static inline int param_is_mask(int p)
  2491. {
  2492. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  2493. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  2494. }
  2495. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  2496. int n)
  2497. {
  2498. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  2499. }
  2500. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  2501. unsigned int bit)
  2502. {
  2503. if (bit >= SNDRV_MASK_MAX)
  2504. return;
  2505. if (param_is_mask(n)) {
  2506. struct snd_mask *m = param_to_mask(p, n);
  2507. m->bits[0] = 0;
  2508. m->bits[1] = 0;
  2509. m->bits[bit >> 5] |= (1 << (bit & 31));
  2510. }
  2511. }
  2512. static int msm_slim_get_ch_from_beid(int32_t be_id)
  2513. {
  2514. int ch_id = 0;
  2515. switch (be_id) {
  2516. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  2517. ch_id = SLIM_RX_0;
  2518. break;
  2519. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  2520. ch_id = SLIM_RX_1;
  2521. break;
  2522. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  2523. ch_id = SLIM_RX_2;
  2524. break;
  2525. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  2526. ch_id = SLIM_RX_3;
  2527. break;
  2528. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  2529. ch_id = SLIM_RX_4;
  2530. break;
  2531. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  2532. ch_id = SLIM_RX_6;
  2533. break;
  2534. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  2535. ch_id = SLIM_TX_0;
  2536. break;
  2537. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  2538. ch_id = SLIM_TX_3;
  2539. break;
  2540. default:
  2541. ch_id = SLIM_RX_0;
  2542. break;
  2543. }
  2544. return ch_id;
  2545. }
  2546. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  2547. {
  2548. int idx;
  2549. switch (be_id) {
  2550. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2551. idx = DP_RX_IDX;
  2552. break;
  2553. default:
  2554. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  2555. idx = -EINVAL;
  2556. break;
  2557. }
  2558. return idx;
  2559. }
  2560. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2561. struct snd_pcm_hw_params *params)
  2562. {
  2563. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2564. struct snd_interval *rate = hw_param_interval(params,
  2565. SNDRV_PCM_HW_PARAM_RATE);
  2566. struct snd_interval *channels = hw_param_interval(params,
  2567. SNDRV_PCM_HW_PARAM_CHANNELS);
  2568. int rc = 0;
  2569. int idx;
  2570. void *config = NULL;
  2571. struct snd_soc_codec *codec = NULL;
  2572. pr_debug("%s: format = %d, rate = %d\n",
  2573. __func__, params_format(params), params_rate(params));
  2574. switch (dai_link->id) {
  2575. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  2576. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  2577. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  2578. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  2579. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  2580. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  2581. idx = msm_slim_get_ch_from_beid(dai_link->id);
  2582. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2583. slim_rx_cfg[idx].bit_format);
  2584. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  2585. channels->min = channels->max = slim_rx_cfg[idx].channels;
  2586. break;
  2587. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  2588. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  2589. idx = msm_slim_get_ch_from_beid(dai_link->id);
  2590. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2591. slim_tx_cfg[idx].bit_format);
  2592. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  2593. channels->min = channels->max = slim_tx_cfg[idx].channels;
  2594. break;
  2595. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  2596. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2597. slim_tx_cfg[1].bit_format);
  2598. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  2599. channels->min = channels->max = slim_tx_cfg[1].channels;
  2600. break;
  2601. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  2602. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2603. SNDRV_PCM_FORMAT_S32_LE);
  2604. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  2605. channels->min = channels->max = msm_vi_feed_tx_ch;
  2606. break;
  2607. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  2608. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2609. slim_rx_cfg[5].bit_format);
  2610. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  2611. channels->min = channels->max = slim_rx_cfg[5].channels;
  2612. break;
  2613. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  2614. codec = rtd->codec;
  2615. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  2616. channels->min = channels->max = 1;
  2617. config = msm_codec_fn.get_afe_config_fn(codec,
  2618. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  2619. if (config) {
  2620. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  2621. config, SLIMBUS_5_TX);
  2622. if (rc)
  2623. pr_err("%s: Failed to set slimbus slave port config %d\n",
  2624. __func__, rc);
  2625. }
  2626. break;
  2627. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  2628. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2629. slim_rx_cfg[SLIM_RX_7].bit_format);
  2630. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  2631. channels->min = channels->max =
  2632. slim_rx_cfg[SLIM_RX_7].channels;
  2633. break;
  2634. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  2635. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  2636. channels->min = channels->max =
  2637. slim_tx_cfg[SLIM_TX_7].channels;
  2638. break;
  2639. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  2640. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  2641. channels->min = channels->max =
  2642. slim_tx_cfg[SLIM_TX_8].channels;
  2643. break;
  2644. case MSM_BACKEND_DAI_USB_RX:
  2645. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2646. usb_rx_cfg.bit_format);
  2647. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2648. channels->min = channels->max = usb_rx_cfg.channels;
  2649. break;
  2650. case MSM_BACKEND_DAI_USB_TX:
  2651. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2652. usb_tx_cfg.bit_format);
  2653. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2654. channels->min = channels->max = usb_tx_cfg.channels;
  2655. break;
  2656. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2657. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  2658. if (idx < 0) {
  2659. pr_err("%s: Incorrect ext disp idx %d\n",
  2660. __func__, idx);
  2661. rc = idx;
  2662. goto done;
  2663. }
  2664. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2665. ext_disp_rx_cfg[idx].bit_format);
  2666. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  2667. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  2668. break;
  2669. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2670. channels->min = channels->max = proxy_rx_cfg.channels;
  2671. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2672. break;
  2673. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2674. channels->min = channels->max =
  2675. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2676. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2677. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2678. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2679. break;
  2680. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2681. channels->min = channels->max =
  2682. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2683. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2684. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2685. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2686. break;
  2687. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2688. channels->min = channels->max =
  2689. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2690. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2691. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2692. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2693. break;
  2694. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2695. channels->min = channels->max =
  2696. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2697. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2698. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2699. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2700. break;
  2701. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2702. channels->min = channels->max =
  2703. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2704. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2705. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2706. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2707. break;
  2708. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2709. channels->min = channels->max =
  2710. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2711. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2712. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2713. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2714. break;
  2715. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  2716. channels->min = channels->max =
  2717. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  2718. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2719. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  2720. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  2721. break;
  2722. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  2723. channels->min = channels->max =
  2724. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  2725. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2726. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  2727. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  2728. break;
  2729. case MSM_BACKEND_DAI_AUXPCM_RX:
  2730. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2731. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2732. rate->min = rate->max =
  2733. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2734. channels->min = channels->max =
  2735. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2736. break;
  2737. case MSM_BACKEND_DAI_AUXPCM_TX:
  2738. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2739. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2740. rate->min = rate->max =
  2741. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2742. channels->min = channels->max =
  2743. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2744. break;
  2745. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2746. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2747. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2748. rate->min = rate->max =
  2749. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2750. channels->min = channels->max =
  2751. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2752. break;
  2753. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2754. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2755. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2756. rate->min = rate->max =
  2757. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2758. channels->min = channels->max =
  2759. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2760. break;
  2761. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2762. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2763. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2764. rate->min = rate->max =
  2765. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2766. channels->min = channels->max =
  2767. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2768. break;
  2769. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2770. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2771. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  2772. rate->min = rate->max =
  2773. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  2774. channels->min = channels->max =
  2775. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  2776. break;
  2777. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  2778. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2779. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  2780. rate->min = rate->max =
  2781. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  2782. channels->min = channels->max =
  2783. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  2784. break;
  2785. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  2786. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2787. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  2788. rate->min = rate->max =
  2789. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  2790. channels->min = channels->max =
  2791. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  2792. break;
  2793. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2794. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2795. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  2796. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  2797. channels->min = channels->max =
  2798. mi2s_rx_cfg[PRIM_MI2S].channels;
  2799. break;
  2800. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2801. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2802. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  2803. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  2804. channels->min = channels->max =
  2805. mi2s_tx_cfg[PRIM_MI2S].channels;
  2806. break;
  2807. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2808. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2809. mi2s_rx_cfg[SEC_MI2S].bit_format);
  2810. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  2811. channels->min = channels->max =
  2812. mi2s_rx_cfg[SEC_MI2S].channels;
  2813. break;
  2814. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2815. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2816. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2817. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  2818. channels->min = channels->max =
  2819. mi2s_tx_cfg[SEC_MI2S].channels;
  2820. break;
  2821. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2822. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2823. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2824. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2825. channels->min = channels->max =
  2826. mi2s_rx_cfg[TERT_MI2S].channels;
  2827. break;
  2828. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2829. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2830. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2831. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2832. channels->min = channels->max =
  2833. mi2s_tx_cfg[TERT_MI2S].channels;
  2834. break;
  2835. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  2836. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2837. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  2838. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  2839. channels->min = channels->max =
  2840. mi2s_rx_cfg[QUAT_MI2S].channels;
  2841. break;
  2842. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  2843. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2844. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  2845. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  2846. channels->min = channels->max =
  2847. mi2s_tx_cfg[QUAT_MI2S].channels;
  2848. break;
  2849. default:
  2850. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2851. break;
  2852. }
  2853. done:
  2854. return rc;
  2855. }
  2856. static int msm_afe_set_config(struct snd_soc_codec *codec)
  2857. {
  2858. int ret = 0;
  2859. void *config_data = NULL;
  2860. if (!msm_codec_fn.get_afe_config_fn) {
  2861. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  2862. __func__);
  2863. return -EINVAL;
  2864. }
  2865. config_data = msm_codec_fn.get_afe_config_fn(codec,
  2866. AFE_CDC_REGISTERS_CONFIG);
  2867. if (config_data) {
  2868. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  2869. if (ret) {
  2870. dev_err(codec->dev,
  2871. "%s: Failed to set codec registers config %d\n",
  2872. __func__, ret);
  2873. return ret;
  2874. }
  2875. }
  2876. config_data = msm_codec_fn.get_afe_config_fn(codec,
  2877. AFE_CDC_REGISTER_PAGE_CONFIG);
  2878. if (config_data) {
  2879. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  2880. 0);
  2881. if (ret)
  2882. dev_err(codec->dev,
  2883. "%s: Failed to set cdc register page config\n",
  2884. __func__);
  2885. }
  2886. config_data = msm_codec_fn.get_afe_config_fn(codec,
  2887. AFE_SLIMBUS_SLAVE_CONFIG);
  2888. if (config_data) {
  2889. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  2890. if (ret) {
  2891. dev_err(codec->dev,
  2892. "%s: Failed to set slimbus slave config %d\n",
  2893. __func__, ret);
  2894. return ret;
  2895. }
  2896. }
  2897. return 0;
  2898. }
  2899. static void msm_afe_clear_config(void)
  2900. {
  2901. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  2902. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  2903. }
  2904. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  2905. struct snd_card *card)
  2906. {
  2907. int ret = 0;
  2908. unsigned long timeout;
  2909. int adsp_ready = 0;
  2910. bool snd_card_online = 0;
  2911. timeout = jiffies +
  2912. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  2913. do {
  2914. if (!snd_card_online) {
  2915. snd_card_online = snd_card_is_online_state(card);
  2916. pr_debug("%s: Sound card is %s\n", __func__,
  2917. snd_card_online ? "Online" : "Offline");
  2918. }
  2919. if (!adsp_ready) {
  2920. adsp_ready = q6core_is_adsp_ready();
  2921. pr_debug("%s: ADSP Audio is %s\n", __func__,
  2922. adsp_ready ? "ready" : "not ready");
  2923. }
  2924. if (snd_card_online && adsp_ready)
  2925. break;
  2926. /*
  2927. * Sound card/ADSP will be coming up after subsystem restart and
  2928. * it might not be fully up when the control reaches
  2929. * here. So, wait for 50msec before checking ADSP state
  2930. */
  2931. msleep(50);
  2932. } while (time_after(timeout, jiffies));
  2933. if (!snd_card_online || !adsp_ready) {
  2934. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  2935. __func__,
  2936. snd_card_online ? "Online" : "Offline",
  2937. adsp_ready ? "ready" : "not ready");
  2938. ret = -ETIMEDOUT;
  2939. goto err;
  2940. }
  2941. ret = msm_afe_set_config(codec);
  2942. if (ret)
  2943. pr_err("%s: Failed to set AFE config. err %d\n",
  2944. __func__, ret);
  2945. return 0;
  2946. err:
  2947. return ret;
  2948. }
  2949. static int sdm855_notifier_service_cb(struct notifier_block *this,
  2950. unsigned long opcode, void *ptr)
  2951. {
  2952. int ret;
  2953. struct snd_soc_card *card = NULL;
  2954. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  2955. struct snd_soc_pcm_runtime *rtd;
  2956. struct snd_soc_codec *codec;
  2957. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  2958. switch (opcode) {
  2959. case AUDIO_NOTIFIER_SERVICE_DOWN:
  2960. /*
  2961. * Use flag to ignore initial boot notifications
  2962. * On initial boot msm_adsp_power_up_config is
  2963. * called on init. There is no need to clear
  2964. * and set the config again on initial boot.
  2965. */
  2966. if (is_initial_boot)
  2967. break;
  2968. msm_afe_clear_config();
  2969. break;
  2970. case AUDIO_NOTIFIER_SERVICE_UP:
  2971. if (is_initial_boot) {
  2972. is_initial_boot = false;
  2973. break;
  2974. }
  2975. if (!spdev)
  2976. return -EINVAL;
  2977. card = platform_get_drvdata(spdev);
  2978. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  2979. if (!rtd) {
  2980. dev_err(card->dev,
  2981. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  2982. __func__, be_dl_name);
  2983. ret = -EINVAL;
  2984. goto err;
  2985. }
  2986. codec = rtd->codec;
  2987. ret = msm_adsp_power_up_config(codec, card->snd_card);
  2988. if (ret < 0) {
  2989. dev_err(card->dev,
  2990. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  2991. __func__, ret);
  2992. goto err;
  2993. }
  2994. break;
  2995. default:
  2996. break;
  2997. }
  2998. err:
  2999. return NOTIFY_OK;
  3000. }
  3001. static struct notifier_block service_nb = {
  3002. .notifier_call = sdm855_notifier_service_cb,
  3003. .priority = -INT_MAX,
  3004. };
  3005. static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3006. {
  3007. int ret = 0;
  3008. void *config_data;
  3009. struct snd_soc_codec *codec = rtd->codec;
  3010. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3011. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3012. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3013. struct snd_soc_component *aux_comp;
  3014. struct snd_card *card;
  3015. struct snd_info_entry *entry;
  3016. struct msm_asoc_mach_data *pdata =
  3017. snd_soc_card_get_drvdata(rtd->card);
  3018. /*
  3019. * Codec SLIMBUS configuration
  3020. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  3021. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  3022. * TX14, TX15, TX16
  3023. */
  3024. unsigned int rx_ch[WCD9360_RX_MAX] = {144, 145, 146, 147, 148, 149,
  3025. 150, 151};
  3026. unsigned int tx_ch[WCD9360_TX_MAX] = {128, 129, 130, 131, 132, 133,
  3027. 134, 135, 136, 137, 138, 139,
  3028. 140, 141, 142, 143};
  3029. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  3030. rtd->pmdown_time = 0;
  3031. ret = snd_soc_add_codec_controls(codec, msm_snd_controls,
  3032. ARRAY_SIZE(msm_snd_controls));
  3033. if (ret < 0) {
  3034. pr_err("%s: add_codec_controls failed, err %d\n",
  3035. __func__, ret);
  3036. return ret;
  3037. }
  3038. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
  3039. ARRAY_SIZE(msm_dapm_widgets));
  3040. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  3041. ARRAY_SIZE(wcd_audio_paths));
  3042. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  3043. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  3044. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3045. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3046. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3047. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3048. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  3049. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  3050. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
  3051. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
  3052. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  3053. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  3054. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  3055. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  3056. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  3057. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  3058. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  3059. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  3060. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  3061. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  3062. snd_soc_dapm_sync(dapm);
  3063. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3064. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3065. msm_codec_fn.get_afe_config_fn = pahu_get_afe_config;
  3066. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  3067. if (ret) {
  3068. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  3069. goto err;
  3070. }
  3071. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3072. AFE_AANC_VERSION);
  3073. if (config_data) {
  3074. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  3075. if (ret) {
  3076. pr_err("%s: Failed to set aanc version %d\n",
  3077. __func__, ret);
  3078. goto err;
  3079. }
  3080. }
  3081. /*
  3082. * Send speaker configuration only for WSA8810.
  3083. * Default configuration is for WSA8815.
  3084. */
  3085. pr_debug("%s: Number of aux devices: %d\n",
  3086. __func__, rtd->card->num_aux_devs);
  3087. if (rtd->card->num_aux_devs &&
  3088. !list_empty(&rtd->card->component_dev_list)) {
  3089. aux_comp = list_first_entry(&rtd->card->component_dev_list,
  3090. struct snd_soc_component, card_aux_list);
  3091. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3092. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3093. pahu_set_spkr_mode(rtd->codec, WCD9360_SPKR_MODE_1);
  3094. pahu_set_spkr_gain_offset(rtd->codec,
  3095. WCD9360_RX_GAIN_OFFSET_M1P5_DB);
  3096. }
  3097. }
  3098. card = rtd->card->snd_card;
  3099. entry = snd_info_create_subdir(card->module, "codecs",
  3100. card->proc_root);
  3101. if (!entry) {
  3102. pr_debug("%s: Cannot create codecs module entry\n",
  3103. __func__);
  3104. pdata->codec_root = NULL;
  3105. goto done;
  3106. }
  3107. pdata->codec_root = entry;
  3108. pahu_codec_info_create_codec_entry(pdata->codec_root, codec);
  3109. done:
  3110. codec_reg_done = true;
  3111. return 0;
  3112. err:
  3113. return ret;
  3114. }
  3115. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3116. {
  3117. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3118. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  3119. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3120. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3121. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3122. }
  3123. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  3124. struct snd_pcm_hw_params *params)
  3125. {
  3126. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3127. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3128. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3129. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3130. int ret = 0;
  3131. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  3132. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3133. u32 user_set_tx_ch = 0;
  3134. u32 rx_ch_count;
  3135. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3136. ret = snd_soc_dai_get_channel_map(codec_dai,
  3137. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3138. if (ret < 0) {
  3139. pr_err("%s: failed to get codec chan map, err:%d\n",
  3140. __func__, ret);
  3141. goto err;
  3142. }
  3143. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  3144. pr_debug("%s: rx_5_ch=%d\n", __func__,
  3145. slim_rx_cfg[5].channels);
  3146. rx_ch_count = slim_rx_cfg[5].channels;
  3147. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  3148. pr_debug("%s: rx_2_ch=%d\n", __func__,
  3149. slim_rx_cfg[2].channels);
  3150. rx_ch_count = slim_rx_cfg[2].channels;
  3151. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  3152. pr_debug("%s: rx_6_ch=%d\n", __func__,
  3153. slim_rx_cfg[6].channels);
  3154. rx_ch_count = slim_rx_cfg[6].channels;
  3155. } else {
  3156. pr_debug("%s: rx_0_ch=%d\n", __func__,
  3157. slim_rx_cfg[0].channels);
  3158. rx_ch_count = slim_rx_cfg[0].channels;
  3159. }
  3160. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3161. rx_ch_count, rx_ch);
  3162. if (ret < 0) {
  3163. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3164. __func__, ret);
  3165. goto err;
  3166. }
  3167. } else {
  3168. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  3169. codec_dai->name, codec_dai->id, user_set_tx_ch);
  3170. ret = snd_soc_dai_get_channel_map(codec_dai,
  3171. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3172. if (ret < 0) {
  3173. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  3174. __func__, ret);
  3175. goto err;
  3176. }
  3177. /* For <codec>_tx1 case */
  3178. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  3179. user_set_tx_ch = slim_tx_cfg[0].channels;
  3180. /* For <codec>_tx3 case */
  3181. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  3182. user_set_tx_ch = slim_tx_cfg[1].channels;
  3183. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  3184. user_set_tx_ch = msm_vi_feed_tx_ch;
  3185. else
  3186. user_set_tx_ch = tx_ch_cnt;
  3187. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  3188. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  3189. tx_ch_cnt, dai_link->id);
  3190. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3191. user_set_tx_ch, tx_ch, 0, 0);
  3192. if (ret < 0)
  3193. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  3194. __func__, ret);
  3195. }
  3196. err:
  3197. return ret;
  3198. }
  3199. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  3200. struct snd_pcm_hw_params *params)
  3201. {
  3202. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3203. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3204. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3205. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  3206. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  3207. unsigned int num_tx_ch = 0;
  3208. unsigned int num_rx_ch = 0;
  3209. int ret = 0;
  3210. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3211. num_rx_ch = params_channels(params);
  3212. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  3213. codec_dai->name, codec_dai->id, num_rx_ch);
  3214. ret = snd_soc_dai_get_channel_map(codec_dai,
  3215. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3216. if (ret < 0) {
  3217. pr_err("%s: failed to get codec chan map, err:%d\n",
  3218. __func__, ret);
  3219. goto err;
  3220. }
  3221. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3222. num_rx_ch, rx_ch);
  3223. if (ret < 0) {
  3224. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3225. __func__, ret);
  3226. goto err;
  3227. }
  3228. } else {
  3229. num_tx_ch = params_channels(params);
  3230. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  3231. codec_dai->name, codec_dai->id, num_tx_ch);
  3232. ret = snd_soc_dai_get_channel_map(codec_dai,
  3233. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3234. if (ret < 0) {
  3235. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  3236. __func__, ret);
  3237. goto err;
  3238. }
  3239. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3240. num_tx_ch, tx_ch, 0, 0);
  3241. if (ret < 0) {
  3242. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  3243. __func__, ret);
  3244. goto err;
  3245. }
  3246. }
  3247. err:
  3248. return ret;
  3249. }
  3250. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3251. struct snd_pcm_hw_params *params)
  3252. {
  3253. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3254. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3255. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3256. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3257. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3258. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3259. int ret;
  3260. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3261. codec_dai->name, codec_dai->id);
  3262. ret = snd_soc_dai_get_channel_map(codec_dai,
  3263. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3264. if (ret) {
  3265. dev_err(rtd->dev,
  3266. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3267. __func__, ret);
  3268. goto err;
  3269. }
  3270. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3271. __func__, tx_ch_cnt, dai_link->id);
  3272. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3273. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3274. if (ret)
  3275. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3276. __func__, ret);
  3277. err:
  3278. return ret;
  3279. }
  3280. static int msm_get_port_id(int be_id)
  3281. {
  3282. int afe_port_id;
  3283. switch (be_id) {
  3284. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3285. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  3286. break;
  3287. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3288. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  3289. break;
  3290. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3291. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  3292. break;
  3293. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3294. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  3295. break;
  3296. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3297. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  3298. break;
  3299. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3300. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  3301. break;
  3302. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3303. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  3304. break;
  3305. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3306. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  3307. break;
  3308. default:
  3309. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  3310. afe_port_id = -EINVAL;
  3311. }
  3312. return afe_port_id;
  3313. }
  3314. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  3315. {
  3316. u32 bit_per_sample;
  3317. switch (bit_format) {
  3318. case SNDRV_PCM_FORMAT_S32_LE:
  3319. case SNDRV_PCM_FORMAT_S24_3LE:
  3320. case SNDRV_PCM_FORMAT_S24_LE:
  3321. bit_per_sample = 32;
  3322. break;
  3323. case SNDRV_PCM_FORMAT_S16_LE:
  3324. default:
  3325. bit_per_sample = 16;
  3326. break;
  3327. }
  3328. return bit_per_sample;
  3329. }
  3330. static void update_mi2s_clk_val(int dai_id, int stream)
  3331. {
  3332. u32 bit_per_sample;
  3333. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3334. bit_per_sample =
  3335. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  3336. mi2s_clk[dai_id].clk_freq_in_hz =
  3337. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  3338. } else {
  3339. bit_per_sample =
  3340. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  3341. mi2s_clk[dai_id].clk_freq_in_hz =
  3342. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  3343. }
  3344. }
  3345. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  3346. {
  3347. int ret = 0;
  3348. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3349. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3350. int port_id = 0;
  3351. int index = cpu_dai->id;
  3352. port_id = msm_get_port_id(rtd->dai_link->id);
  3353. if (port_id < 0) {
  3354. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  3355. ret = port_id;
  3356. goto err;
  3357. }
  3358. if (enable) {
  3359. update_mi2s_clk_val(index, substream->stream);
  3360. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  3361. mi2s_clk[index].clk_freq_in_hz);
  3362. }
  3363. mi2s_clk[index].enable = enable;
  3364. ret = afe_set_lpass_clock_v2(port_id,
  3365. &mi2s_clk[index]);
  3366. if (ret < 0) {
  3367. dev_err(rtd->card->dev,
  3368. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  3369. __func__, port_id, ret);
  3370. goto err;
  3371. }
  3372. err:
  3373. return ret;
  3374. }
  3375. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  3376. enum pinctrl_pin_state new_state)
  3377. {
  3378. int ret = 0;
  3379. int curr_state = 0;
  3380. if (pinctrl_info == NULL) {
  3381. pr_err("%s: pinctrl_info is NULL\n", __func__);
  3382. ret = -EINVAL;
  3383. goto err;
  3384. }
  3385. if (pinctrl_info->pinctrl == NULL) {
  3386. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  3387. ret = -EINVAL;
  3388. goto err;
  3389. }
  3390. curr_state = pinctrl_info->curr_state;
  3391. pinctrl_info->curr_state = new_state;
  3392. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  3393. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  3394. if (curr_state == pinctrl_info->curr_state) {
  3395. pr_debug("%s: Already in same state\n", __func__);
  3396. goto err;
  3397. }
  3398. if (curr_state != STATE_DISABLE &&
  3399. pinctrl_info->curr_state != STATE_DISABLE) {
  3400. pr_debug("%s: state already active cannot switch\n", __func__);
  3401. ret = -EIO;
  3402. goto err;
  3403. }
  3404. switch (pinctrl_info->curr_state) {
  3405. case STATE_MI2S_ACTIVE:
  3406. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  3407. pinctrl_info->mi2s_active);
  3408. if (ret) {
  3409. pr_err("%s: MI2S state select failed with %d\n",
  3410. __func__, ret);
  3411. ret = -EIO;
  3412. goto err;
  3413. }
  3414. break;
  3415. case STATE_TDM_ACTIVE:
  3416. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  3417. pinctrl_info->tdm_active);
  3418. if (ret) {
  3419. pr_err("%s: TDM state select failed with %d\n",
  3420. __func__, ret);
  3421. ret = -EIO;
  3422. goto err;
  3423. }
  3424. break;
  3425. case STATE_DISABLE:
  3426. if (curr_state == STATE_MI2S_ACTIVE) {
  3427. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  3428. pinctrl_info->mi2s_disable);
  3429. } else {
  3430. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  3431. pinctrl_info->tdm_disable);
  3432. }
  3433. if (ret) {
  3434. pr_err("%s: state disable failed with %d\n",
  3435. __func__, ret);
  3436. ret = -EIO;
  3437. goto err;
  3438. }
  3439. break;
  3440. default:
  3441. pr_err("%s: TLMM pin state is invalid\n", __func__);
  3442. return -EINVAL;
  3443. }
  3444. err:
  3445. return ret;
  3446. }
  3447. static void msm_release_pinctrl(struct platform_device *pdev)
  3448. {
  3449. struct snd_soc_card *card = platform_get_drvdata(pdev);
  3450. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3451. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  3452. if (pinctrl_info->pinctrl) {
  3453. devm_pinctrl_put(pinctrl_info->pinctrl);
  3454. pinctrl_info->pinctrl = NULL;
  3455. }
  3456. }
  3457. static int msm_get_pinctrl(struct platform_device *pdev)
  3458. {
  3459. struct snd_soc_card *card = platform_get_drvdata(pdev);
  3460. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3461. struct msm_pinctrl_info *pinctrl_info = NULL;
  3462. struct pinctrl *pinctrl;
  3463. int ret;
  3464. pinctrl_info = &pdata->pinctrl_info;
  3465. if (pinctrl_info == NULL) {
  3466. pr_err("%s: pinctrl_info is NULL\n", __func__);
  3467. return -EINVAL;
  3468. }
  3469. pinctrl = devm_pinctrl_get(&pdev->dev);
  3470. if (IS_ERR_OR_NULL(pinctrl)) {
  3471. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  3472. return -EINVAL;
  3473. }
  3474. pinctrl_info->pinctrl = pinctrl;
  3475. /* get all the states handles from Device Tree */
  3476. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  3477. "quat-mi2s-sleep");
  3478. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  3479. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  3480. goto err;
  3481. }
  3482. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  3483. "quat-mi2s-active");
  3484. if (IS_ERR(pinctrl_info->mi2s_active)) {
  3485. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  3486. goto err;
  3487. }
  3488. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  3489. "quat-tdm-sleep");
  3490. if (IS_ERR(pinctrl_info->tdm_disable)) {
  3491. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  3492. goto err;
  3493. }
  3494. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  3495. "quat-tdm-active");
  3496. if (IS_ERR(pinctrl_info->tdm_active)) {
  3497. pr_err("%s: could not get tdm_active pinstate\n",
  3498. __func__);
  3499. goto err;
  3500. }
  3501. /* Reset the TLMM pins to a default state */
  3502. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  3503. pinctrl_info->mi2s_disable);
  3504. if (ret != 0) {
  3505. pr_err("%s: Disable TLMM pins failed with %d\n",
  3506. __func__, ret);
  3507. ret = -EIO;
  3508. goto err;
  3509. }
  3510. pinctrl_info->curr_state = STATE_DISABLE;
  3511. return 0;
  3512. err:
  3513. devm_pinctrl_put(pinctrl);
  3514. pinctrl_info->pinctrl = NULL;
  3515. return -EINVAL;
  3516. }
  3517. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3518. struct snd_pcm_hw_params *params)
  3519. {
  3520. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3521. struct snd_interval *rate = hw_param_interval(params,
  3522. SNDRV_PCM_HW_PARAM_RATE);
  3523. struct snd_interval *channels = hw_param_interval(params,
  3524. SNDRV_PCM_HW_PARAM_CHANNELS);
  3525. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  3526. channels->min = channels->max =
  3527. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3528. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3529. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3530. rate->min = rate->max =
  3531. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3532. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  3533. channels->min = channels->max =
  3534. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3535. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3536. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3537. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3538. } else {
  3539. pr_err("%s: dai id 0x%x not supported\n",
  3540. __func__, cpu_dai->id);
  3541. return -EINVAL;
  3542. }
  3543. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  3544. __func__, cpu_dai->id, channels->max, rate->max,
  3545. params_format(params));
  3546. return 0;
  3547. }
  3548. static int sdm855_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3549. struct snd_pcm_hw_params *params)
  3550. {
  3551. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3552. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3553. int ret = 0;
  3554. int slot_width = 32;
  3555. int channels, slots;
  3556. unsigned int slot_mask, rate, clk_freq;
  3557. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3558. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3559. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3560. switch (cpu_dai->id) {
  3561. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3562. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3563. break;
  3564. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3565. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3566. break;
  3567. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3568. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3569. break;
  3570. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  3571. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3572. break;
  3573. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3574. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3575. break;
  3576. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3577. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3578. break;
  3579. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3580. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3581. break;
  3582. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  3583. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3584. break;
  3585. default:
  3586. pr_err("%s: dai id 0x%x not supported\n",
  3587. __func__, cpu_dai->id);
  3588. return -EINVAL;
  3589. }
  3590. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3591. /*2 slot config - bits 0 and 1 set for the first two slots */
  3592. slot_mask = 0x0000FFFF >> (16-slots);
  3593. channels = slots;
  3594. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3595. __func__, slot_width, slots);
  3596. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3597. slots, slot_width);
  3598. if (ret < 0) {
  3599. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3600. __func__, ret);
  3601. goto end;
  3602. }
  3603. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3604. 0, NULL, channels, slot_offset);
  3605. if (ret < 0) {
  3606. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3607. __func__, ret);
  3608. goto end;
  3609. }
  3610. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3611. /*2 slot config - bits 0 and 1 set for the first two slots */
  3612. slot_mask = 0x0000FFFF >> (16-slots);
  3613. channels = slots;
  3614. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3615. __func__, slot_width, slots);
  3616. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3617. slots, slot_width);
  3618. if (ret < 0) {
  3619. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3620. __func__, ret);
  3621. goto end;
  3622. }
  3623. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3624. channels, slot_offset, 0, NULL);
  3625. if (ret < 0) {
  3626. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3627. __func__, ret);
  3628. goto end;
  3629. }
  3630. } else {
  3631. ret = -EINVAL;
  3632. pr_err("%s: invalid use case, err:%d\n",
  3633. __func__, ret);
  3634. goto end;
  3635. }
  3636. rate = params_rate(params);
  3637. clk_freq = rate * slot_width * slots;
  3638. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3639. if (ret < 0)
  3640. pr_err("%s: failed to set tdm clk, err:%d\n",
  3641. __func__, ret);
  3642. end:
  3643. return ret;
  3644. }
  3645. static int sdm855_tdm_snd_startup(struct snd_pcm_substream *substream)
  3646. {
  3647. int ret = 0;
  3648. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3649. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3650. struct snd_soc_card *card = rtd->card;
  3651. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3652. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  3653. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3654. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  3655. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  3656. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  3657. if (ret)
  3658. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  3659. __func__, ret);
  3660. }
  3661. return ret;
  3662. }
  3663. static void sdm855_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  3664. {
  3665. int ret = 0;
  3666. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3667. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3668. struct snd_soc_card *card = rtd->card;
  3669. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3670. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  3671. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3672. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  3673. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  3674. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  3675. if (ret)
  3676. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  3677. __func__, ret);
  3678. }
  3679. }
  3680. static struct snd_soc_ops sdm855_tdm_be_ops = {
  3681. .hw_params = sdm855_tdm_snd_hw_params,
  3682. .startup = sdm855_tdm_snd_startup,
  3683. .shutdown = sdm855_tdm_snd_shutdown
  3684. };
  3685. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3686. {
  3687. cpumask_t mask;
  3688. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3689. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3690. cpumask_clear(&mask);
  3691. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3692. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3693. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3694. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3695. pm_qos_add_request(&substream->latency_pm_qos_req,
  3696. PM_QOS_CPU_DMA_LATENCY,
  3697. MSM_LL_QOS_VALUE);
  3698. return 0;
  3699. }
  3700. static struct snd_soc_ops msm_fe_qos_ops = {
  3701. .prepare = msm_fe_qos_prepare,
  3702. };
  3703. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3704. {
  3705. int ret = 0;
  3706. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3707. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3708. int index = cpu_dai->id;
  3709. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3710. struct snd_soc_card *card = rtd->card;
  3711. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3712. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  3713. int ret_pinctrl = 0;
  3714. dev_dbg(rtd->card->dev,
  3715. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3716. __func__, substream->name, substream->stream,
  3717. cpu_dai->name, cpu_dai->id);
  3718. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3719. ret = -EINVAL;
  3720. dev_err(rtd->card->dev,
  3721. "%s: CPU DAI id (%d) out of range\n",
  3722. __func__, cpu_dai->id);
  3723. goto err;
  3724. }
  3725. /*
  3726. * Mutex protection in case the same MI2S
  3727. * interface using for both TX and RX so
  3728. * that the same clock won't be enable twice.
  3729. */
  3730. mutex_lock(&mi2s_intf_conf[index].lock);
  3731. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3732. /* Check if msm needs to provide the clock to the interface */
  3733. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3734. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3735. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3736. }
  3737. ret = msm_mi2s_set_sclk(substream, true);
  3738. if (ret < 0) {
  3739. dev_err(rtd->card->dev,
  3740. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3741. __func__, ret);
  3742. goto clean_up;
  3743. }
  3744. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3745. if (ret < 0) {
  3746. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3747. __func__, index, ret);
  3748. goto clk_off;
  3749. }
  3750. if (index == QUAT_MI2S) {
  3751. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  3752. STATE_MI2S_ACTIVE);
  3753. if (ret_pinctrl)
  3754. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  3755. __func__, ret_pinctrl);
  3756. }
  3757. }
  3758. clk_off:
  3759. if (ret < 0)
  3760. msm_mi2s_set_sclk(substream, false);
  3761. clean_up:
  3762. if (ret < 0)
  3763. mi2s_intf_conf[index].ref_cnt--;
  3764. mutex_unlock(&mi2s_intf_conf[index].lock);
  3765. err:
  3766. return ret;
  3767. }
  3768. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3769. {
  3770. int ret;
  3771. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3772. int index = rtd->cpu_dai->id;
  3773. struct snd_soc_card *card = rtd->card;
  3774. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3775. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  3776. int ret_pinctrl = 0;
  3777. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3778. substream->name, substream->stream);
  3779. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3780. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3781. return;
  3782. }
  3783. mutex_lock(&mi2s_intf_conf[index].lock);
  3784. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3785. ret = msm_mi2s_set_sclk(substream, false);
  3786. if (ret < 0)
  3787. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3788. __func__, index, ret);
  3789. if (index == QUAT_MI2S) {
  3790. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  3791. STATE_DISABLE);
  3792. if (ret_pinctrl)
  3793. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  3794. __func__, ret_pinctrl);
  3795. }
  3796. }
  3797. mutex_unlock(&mi2s_intf_conf[index].lock);
  3798. }
  3799. static struct snd_soc_ops msm_mi2s_be_ops = {
  3800. .startup = msm_mi2s_snd_startup,
  3801. .shutdown = msm_mi2s_snd_shutdown,
  3802. };
  3803. static struct snd_soc_ops msm_be_ops = {
  3804. .hw_params = msm_snd_hw_params,
  3805. };
  3806. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  3807. .hw_params = msm_slimbus_2_hw_params,
  3808. };
  3809. static struct snd_soc_ops msm_wcn_ops = {
  3810. .hw_params = msm_wcn_hw_params,
  3811. };
  3812. /* Digital audio interface glue - connects codec <---> CPU */
  3813. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3814. /* FrontEnd DAI Links */
  3815. {
  3816. .name = MSM_DAILINK_NAME(Media1),
  3817. .stream_name = "MultiMedia1",
  3818. .cpu_dai_name = "MultiMedia1",
  3819. .platform_name = "msm-pcm-dsp.0",
  3820. .dynamic = 1,
  3821. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3822. .dpcm_playback = 1,
  3823. .dpcm_capture = 1,
  3824. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3825. SND_SOC_DPCM_TRIGGER_POST},
  3826. .codec_dai_name = "snd-soc-dummy-dai",
  3827. .codec_name = "snd-soc-dummy",
  3828. .ignore_suspend = 1,
  3829. /* this dainlink has playback support */
  3830. .ignore_pmdown_time = 1,
  3831. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3832. },
  3833. {
  3834. .name = MSM_DAILINK_NAME(Media2),
  3835. .stream_name = "MultiMedia2",
  3836. .cpu_dai_name = "MultiMedia2",
  3837. .platform_name = "msm-pcm-dsp.0",
  3838. .dynamic = 1,
  3839. .dpcm_playback = 1,
  3840. .dpcm_capture = 1,
  3841. .codec_dai_name = "snd-soc-dummy-dai",
  3842. .codec_name = "snd-soc-dummy",
  3843. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3844. SND_SOC_DPCM_TRIGGER_POST},
  3845. .ignore_suspend = 1,
  3846. /* this dainlink has playback support */
  3847. .ignore_pmdown_time = 1,
  3848. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3849. },
  3850. {
  3851. .name = "VoiceMMode1",
  3852. .stream_name = "VoiceMMode1",
  3853. .cpu_dai_name = "VoiceMMode1",
  3854. .platform_name = "msm-pcm-voice",
  3855. .dynamic = 1,
  3856. .dpcm_playback = 1,
  3857. .dpcm_capture = 1,
  3858. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3859. SND_SOC_DPCM_TRIGGER_POST},
  3860. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3861. .ignore_suspend = 1,
  3862. .ignore_pmdown_time = 1,
  3863. .codec_dai_name = "snd-soc-dummy-dai",
  3864. .codec_name = "snd-soc-dummy",
  3865. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3866. },
  3867. {
  3868. .name = "MSM VoIP",
  3869. .stream_name = "VoIP",
  3870. .cpu_dai_name = "VoIP",
  3871. .platform_name = "msm-voip-dsp",
  3872. .dynamic = 1,
  3873. .dpcm_playback = 1,
  3874. .dpcm_capture = 1,
  3875. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3876. SND_SOC_DPCM_TRIGGER_POST},
  3877. .codec_dai_name = "snd-soc-dummy-dai",
  3878. .codec_name = "snd-soc-dummy",
  3879. .ignore_suspend = 1,
  3880. /* this dainlink has playback support */
  3881. .ignore_pmdown_time = 1,
  3882. .id = MSM_FRONTEND_DAI_VOIP,
  3883. },
  3884. {
  3885. .name = MSM_DAILINK_NAME(ULL),
  3886. .stream_name = "MultiMedia3",
  3887. .cpu_dai_name = "MultiMedia3",
  3888. .platform_name = "msm-pcm-dsp.2",
  3889. .dynamic = 1,
  3890. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3891. .dpcm_playback = 1,
  3892. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3893. SND_SOC_DPCM_TRIGGER_POST},
  3894. .codec_dai_name = "snd-soc-dummy-dai",
  3895. .codec_name = "snd-soc-dummy",
  3896. .ignore_suspend = 1,
  3897. /* this dainlink has playback support */
  3898. .ignore_pmdown_time = 1,
  3899. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3900. },
  3901. /* Hostless PCM purpose */
  3902. {
  3903. .name = "SLIMBUS_0 Hostless",
  3904. .stream_name = "SLIMBUS_0 Hostless",
  3905. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  3906. .platform_name = "msm-pcm-hostless",
  3907. .dynamic = 1,
  3908. .dpcm_playback = 1,
  3909. .dpcm_capture = 1,
  3910. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3911. SND_SOC_DPCM_TRIGGER_POST},
  3912. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3913. .ignore_suspend = 1,
  3914. /* this dailink has playback support */
  3915. .ignore_pmdown_time = 1,
  3916. .codec_dai_name = "snd-soc-dummy-dai",
  3917. .codec_name = "snd-soc-dummy",
  3918. },
  3919. {
  3920. .name = "MSM AFE-PCM RX",
  3921. .stream_name = "AFE-PROXY RX",
  3922. .cpu_dai_name = "msm-dai-q6-dev.241",
  3923. .codec_name = "msm-stub-codec.1",
  3924. .codec_dai_name = "msm-stub-rx",
  3925. .platform_name = "msm-pcm-afe",
  3926. .dpcm_playback = 1,
  3927. .ignore_suspend = 1,
  3928. /* this dainlink has playback support */
  3929. .ignore_pmdown_time = 1,
  3930. },
  3931. {
  3932. .name = "MSM AFE-PCM TX",
  3933. .stream_name = "AFE-PROXY TX",
  3934. .cpu_dai_name = "msm-dai-q6-dev.240",
  3935. .codec_name = "msm-stub-codec.1",
  3936. .codec_dai_name = "msm-stub-tx",
  3937. .platform_name = "msm-pcm-afe",
  3938. .dpcm_capture = 1,
  3939. .ignore_suspend = 1,
  3940. },
  3941. {
  3942. .name = MSM_DAILINK_NAME(Compress1),
  3943. .stream_name = "Compress1",
  3944. .cpu_dai_name = "MultiMedia4",
  3945. .platform_name = "msm-compress-dsp",
  3946. .dynamic = 1,
  3947. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3948. .dpcm_playback = 1,
  3949. .dpcm_capture = 1,
  3950. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3951. SND_SOC_DPCM_TRIGGER_POST},
  3952. .codec_dai_name = "snd-soc-dummy-dai",
  3953. .codec_name = "snd-soc-dummy",
  3954. .ignore_suspend = 1,
  3955. .ignore_pmdown_time = 1,
  3956. /* this dainlink has playback support */
  3957. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3958. },
  3959. {
  3960. .name = "AUXPCM Hostless",
  3961. .stream_name = "AUXPCM Hostless",
  3962. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3963. .platform_name = "msm-pcm-hostless",
  3964. .dynamic = 1,
  3965. .dpcm_playback = 1,
  3966. .dpcm_capture = 1,
  3967. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3968. SND_SOC_DPCM_TRIGGER_POST},
  3969. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3970. .ignore_suspend = 1,
  3971. /* this dainlink has playback support */
  3972. .ignore_pmdown_time = 1,
  3973. .codec_dai_name = "snd-soc-dummy-dai",
  3974. .codec_name = "snd-soc-dummy",
  3975. },
  3976. {
  3977. .name = "SLIMBUS_1 Hostless",
  3978. .stream_name = "SLIMBUS_1 Hostless",
  3979. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  3980. .platform_name = "msm-pcm-hostless",
  3981. .dynamic = 1,
  3982. .dpcm_playback = 1,
  3983. .dpcm_capture = 1,
  3984. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3985. SND_SOC_DPCM_TRIGGER_POST},
  3986. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3987. .ignore_suspend = 1,
  3988. /* this dailink has playback support */
  3989. .ignore_pmdown_time = 1,
  3990. .codec_dai_name = "snd-soc-dummy-dai",
  3991. .codec_name = "snd-soc-dummy",
  3992. },
  3993. {
  3994. .name = "SLIMBUS_3 Hostless",
  3995. .stream_name = "SLIMBUS_3 Hostless",
  3996. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  3997. .platform_name = "msm-pcm-hostless",
  3998. .dynamic = 1,
  3999. .dpcm_playback = 1,
  4000. .dpcm_capture = 1,
  4001. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4002. SND_SOC_DPCM_TRIGGER_POST},
  4003. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4004. .ignore_suspend = 1,
  4005. /* this dailink has playback support */
  4006. .ignore_pmdown_time = 1,
  4007. .codec_dai_name = "snd-soc-dummy-dai",
  4008. .codec_name = "snd-soc-dummy",
  4009. },
  4010. {
  4011. .name = "SLIMBUS_4 Hostless",
  4012. .stream_name = "SLIMBUS_4 Hostless",
  4013. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  4014. .platform_name = "msm-pcm-hostless",
  4015. .dynamic = 1,
  4016. .dpcm_playback = 1,
  4017. .dpcm_capture = 1,
  4018. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4019. SND_SOC_DPCM_TRIGGER_POST},
  4020. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4021. .ignore_suspend = 1,
  4022. /* this dailink has playback support */
  4023. .ignore_pmdown_time = 1,
  4024. .codec_dai_name = "snd-soc-dummy-dai",
  4025. .codec_name = "snd-soc-dummy",
  4026. },
  4027. {
  4028. .name = MSM_DAILINK_NAME(LowLatency),
  4029. .stream_name = "MultiMedia5",
  4030. .cpu_dai_name = "MultiMedia5",
  4031. .platform_name = "msm-pcm-dsp.1",
  4032. .dynamic = 1,
  4033. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4034. .dpcm_playback = 1,
  4035. .dpcm_capture = 1,
  4036. .codec_dai_name = "snd-soc-dummy-dai",
  4037. .codec_name = "snd-soc-dummy",
  4038. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4039. SND_SOC_DPCM_TRIGGER_POST},
  4040. .ignore_suspend = 1,
  4041. /* this dainlink has playback support */
  4042. .ignore_pmdown_time = 1,
  4043. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4044. .ops = &msm_fe_qos_ops,
  4045. },
  4046. {
  4047. .name = "Listen 1 Audio Service",
  4048. .stream_name = "Listen 1 Audio Service",
  4049. .cpu_dai_name = "LSM1",
  4050. .platform_name = "msm-lsm-client",
  4051. .dynamic = 1,
  4052. .dpcm_capture = 1,
  4053. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4054. SND_SOC_DPCM_TRIGGER_POST },
  4055. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4056. .ignore_suspend = 1,
  4057. .codec_dai_name = "snd-soc-dummy-dai",
  4058. .codec_name = "snd-soc-dummy",
  4059. .id = MSM_FRONTEND_DAI_LSM1,
  4060. },
  4061. /* Multiple Tunnel instances */
  4062. {
  4063. .name = MSM_DAILINK_NAME(Compress2),
  4064. .stream_name = "Compress2",
  4065. .cpu_dai_name = "MultiMedia7",
  4066. .platform_name = "msm-compress-dsp",
  4067. .dynamic = 1,
  4068. .dpcm_playback = 1,
  4069. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4070. SND_SOC_DPCM_TRIGGER_POST},
  4071. .codec_dai_name = "snd-soc-dummy-dai",
  4072. .codec_name = "snd-soc-dummy",
  4073. .ignore_suspend = 1,
  4074. .ignore_pmdown_time = 1,
  4075. /* this dainlink has playback support */
  4076. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4077. },
  4078. {
  4079. .name = MSM_DAILINK_NAME(MultiMedia10),
  4080. .stream_name = "MultiMedia10",
  4081. .cpu_dai_name = "MultiMedia10",
  4082. .platform_name = "msm-pcm-dsp.1",
  4083. .dynamic = 1,
  4084. .dpcm_playback = 1,
  4085. .dpcm_capture = 1,
  4086. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4087. SND_SOC_DPCM_TRIGGER_POST},
  4088. .codec_dai_name = "snd-soc-dummy-dai",
  4089. .codec_name = "snd-soc-dummy",
  4090. .ignore_suspend = 1,
  4091. .ignore_pmdown_time = 1,
  4092. /* this dainlink has playback support */
  4093. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4094. },
  4095. {
  4096. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4097. .stream_name = "MM_NOIRQ",
  4098. .cpu_dai_name = "MultiMedia8",
  4099. .platform_name = "msm-pcm-dsp-noirq",
  4100. .dynamic = 1,
  4101. .dpcm_playback = 1,
  4102. .dpcm_capture = 1,
  4103. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4104. SND_SOC_DPCM_TRIGGER_POST},
  4105. .codec_dai_name = "snd-soc-dummy-dai",
  4106. .codec_name = "snd-soc-dummy",
  4107. .ignore_suspend = 1,
  4108. .ignore_pmdown_time = 1,
  4109. /* this dainlink has playback support */
  4110. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4111. .ops = &msm_fe_qos_ops,
  4112. },
  4113. /* HDMI Hostless */
  4114. {
  4115. .name = "HDMI_RX_HOSTLESS",
  4116. .stream_name = "HDMI_RX_HOSTLESS",
  4117. .cpu_dai_name = "HDMI_HOSTLESS",
  4118. .platform_name = "msm-pcm-hostless",
  4119. .dynamic = 1,
  4120. .dpcm_playback = 1,
  4121. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4122. SND_SOC_DPCM_TRIGGER_POST},
  4123. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4124. .ignore_suspend = 1,
  4125. .ignore_pmdown_time = 1,
  4126. .codec_dai_name = "snd-soc-dummy-dai",
  4127. .codec_name = "snd-soc-dummy",
  4128. },
  4129. {
  4130. .name = "VoiceMMode2",
  4131. .stream_name = "VoiceMMode2",
  4132. .cpu_dai_name = "VoiceMMode2",
  4133. .platform_name = "msm-pcm-voice",
  4134. .dynamic = 1,
  4135. .dpcm_playback = 1,
  4136. .dpcm_capture = 1,
  4137. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4138. SND_SOC_DPCM_TRIGGER_POST},
  4139. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4140. .ignore_suspend = 1,
  4141. .ignore_pmdown_time = 1,
  4142. .codec_dai_name = "snd-soc-dummy-dai",
  4143. .codec_name = "snd-soc-dummy",
  4144. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4145. },
  4146. /* LSM FE */
  4147. {
  4148. .name = "Listen 2 Audio Service",
  4149. .stream_name = "Listen 2 Audio Service",
  4150. .cpu_dai_name = "LSM2",
  4151. .platform_name = "msm-lsm-client",
  4152. .dynamic = 1,
  4153. .dpcm_capture = 1,
  4154. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4155. SND_SOC_DPCM_TRIGGER_POST },
  4156. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4157. .ignore_suspend = 1,
  4158. .codec_dai_name = "snd-soc-dummy-dai",
  4159. .codec_name = "snd-soc-dummy",
  4160. .id = MSM_FRONTEND_DAI_LSM2,
  4161. },
  4162. {
  4163. .name = "Listen 3 Audio Service",
  4164. .stream_name = "Listen 3 Audio Service",
  4165. .cpu_dai_name = "LSM3",
  4166. .platform_name = "msm-lsm-client",
  4167. .dynamic = 1,
  4168. .dpcm_capture = 1,
  4169. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4170. SND_SOC_DPCM_TRIGGER_POST },
  4171. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4172. .ignore_suspend = 1,
  4173. .codec_dai_name = "snd-soc-dummy-dai",
  4174. .codec_name = "snd-soc-dummy",
  4175. .id = MSM_FRONTEND_DAI_LSM3,
  4176. },
  4177. {
  4178. .name = "Listen 4 Audio Service",
  4179. .stream_name = "Listen 4 Audio Service",
  4180. .cpu_dai_name = "LSM4",
  4181. .platform_name = "msm-lsm-client",
  4182. .dynamic = 1,
  4183. .dpcm_capture = 1,
  4184. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4185. SND_SOC_DPCM_TRIGGER_POST },
  4186. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4187. .ignore_suspend = 1,
  4188. .codec_dai_name = "snd-soc-dummy-dai",
  4189. .codec_name = "snd-soc-dummy",
  4190. .id = MSM_FRONTEND_DAI_LSM4,
  4191. },
  4192. {
  4193. .name = "Listen 5 Audio Service",
  4194. .stream_name = "Listen 5 Audio Service",
  4195. .cpu_dai_name = "LSM5",
  4196. .platform_name = "msm-lsm-client",
  4197. .dynamic = 1,
  4198. .dpcm_capture = 1,
  4199. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4200. SND_SOC_DPCM_TRIGGER_POST },
  4201. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4202. .ignore_suspend = 1,
  4203. .codec_dai_name = "snd-soc-dummy-dai",
  4204. .codec_name = "snd-soc-dummy",
  4205. .id = MSM_FRONTEND_DAI_LSM5,
  4206. },
  4207. {
  4208. .name = "Listen 6 Audio Service",
  4209. .stream_name = "Listen 6 Audio Service",
  4210. .cpu_dai_name = "LSM6",
  4211. .platform_name = "msm-lsm-client",
  4212. .dynamic = 1,
  4213. .dpcm_capture = 1,
  4214. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4215. SND_SOC_DPCM_TRIGGER_POST },
  4216. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4217. .ignore_suspend = 1,
  4218. .codec_dai_name = "snd-soc-dummy-dai",
  4219. .codec_name = "snd-soc-dummy",
  4220. .id = MSM_FRONTEND_DAI_LSM6,
  4221. },
  4222. {
  4223. .name = "Listen 7 Audio Service",
  4224. .stream_name = "Listen 7 Audio Service",
  4225. .cpu_dai_name = "LSM7",
  4226. .platform_name = "msm-lsm-client",
  4227. .dynamic = 1,
  4228. .dpcm_capture = 1,
  4229. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4230. SND_SOC_DPCM_TRIGGER_POST },
  4231. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4232. .ignore_suspend = 1,
  4233. .codec_dai_name = "snd-soc-dummy-dai",
  4234. .codec_name = "snd-soc-dummy",
  4235. .id = MSM_FRONTEND_DAI_LSM7,
  4236. },
  4237. {
  4238. .name = "Listen 8 Audio Service",
  4239. .stream_name = "Listen 8 Audio Service",
  4240. .cpu_dai_name = "LSM8",
  4241. .platform_name = "msm-lsm-client",
  4242. .dynamic = 1,
  4243. .dpcm_capture = 1,
  4244. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4245. SND_SOC_DPCM_TRIGGER_POST },
  4246. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4247. .ignore_suspend = 1,
  4248. .codec_dai_name = "snd-soc-dummy-dai",
  4249. .codec_name = "snd-soc-dummy",
  4250. .id = MSM_FRONTEND_DAI_LSM8,
  4251. },
  4252. {
  4253. .name = MSM_DAILINK_NAME(Media9),
  4254. .stream_name = "MultiMedia9",
  4255. .cpu_dai_name = "MultiMedia9",
  4256. .platform_name = "msm-pcm-dsp.0",
  4257. .dynamic = 1,
  4258. .dpcm_playback = 1,
  4259. .dpcm_capture = 1,
  4260. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4261. SND_SOC_DPCM_TRIGGER_POST},
  4262. .codec_dai_name = "snd-soc-dummy-dai",
  4263. .codec_name = "snd-soc-dummy",
  4264. .ignore_suspend = 1,
  4265. /* this dainlink has playback support */
  4266. .ignore_pmdown_time = 1,
  4267. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4268. },
  4269. {
  4270. .name = MSM_DAILINK_NAME(Compress4),
  4271. .stream_name = "Compress4",
  4272. .cpu_dai_name = "MultiMedia11",
  4273. .platform_name = "msm-compress-dsp",
  4274. .dynamic = 1,
  4275. .dpcm_playback = 1,
  4276. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4277. SND_SOC_DPCM_TRIGGER_POST},
  4278. .codec_dai_name = "snd-soc-dummy-dai",
  4279. .codec_name = "snd-soc-dummy",
  4280. .ignore_suspend = 1,
  4281. .ignore_pmdown_time = 1,
  4282. /* this dainlink has playback support */
  4283. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4284. },
  4285. {
  4286. .name = MSM_DAILINK_NAME(Compress5),
  4287. .stream_name = "Compress5",
  4288. .cpu_dai_name = "MultiMedia12",
  4289. .platform_name = "msm-compress-dsp",
  4290. .dynamic = 1,
  4291. .dpcm_playback = 1,
  4292. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4293. SND_SOC_DPCM_TRIGGER_POST},
  4294. .codec_dai_name = "snd-soc-dummy-dai",
  4295. .codec_name = "snd-soc-dummy",
  4296. .ignore_suspend = 1,
  4297. .ignore_pmdown_time = 1,
  4298. /* this dainlink has playback support */
  4299. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4300. },
  4301. {
  4302. .name = MSM_DAILINK_NAME(Compress6),
  4303. .stream_name = "Compress6",
  4304. .cpu_dai_name = "MultiMedia13",
  4305. .platform_name = "msm-compress-dsp",
  4306. .dynamic = 1,
  4307. .dpcm_playback = 1,
  4308. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4309. SND_SOC_DPCM_TRIGGER_POST},
  4310. .codec_dai_name = "snd-soc-dummy-dai",
  4311. .codec_name = "snd-soc-dummy",
  4312. .ignore_suspend = 1,
  4313. .ignore_pmdown_time = 1,
  4314. /* this dainlink has playback support */
  4315. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4316. },
  4317. {
  4318. .name = MSM_DAILINK_NAME(Compress7),
  4319. .stream_name = "Compress7",
  4320. .cpu_dai_name = "MultiMedia14",
  4321. .platform_name = "msm-compress-dsp",
  4322. .dynamic = 1,
  4323. .dpcm_playback = 1,
  4324. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4325. SND_SOC_DPCM_TRIGGER_POST},
  4326. .codec_dai_name = "snd-soc-dummy-dai",
  4327. .codec_name = "snd-soc-dummy",
  4328. .ignore_suspend = 1,
  4329. .ignore_pmdown_time = 1,
  4330. /* this dainlink has playback support */
  4331. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4332. },
  4333. {
  4334. .name = MSM_DAILINK_NAME(Compress8),
  4335. .stream_name = "Compress8",
  4336. .cpu_dai_name = "MultiMedia15",
  4337. .platform_name = "msm-compress-dsp",
  4338. .dynamic = 1,
  4339. .dpcm_playback = 1,
  4340. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4341. SND_SOC_DPCM_TRIGGER_POST},
  4342. .codec_dai_name = "snd-soc-dummy-dai",
  4343. .codec_name = "snd-soc-dummy",
  4344. .ignore_suspend = 1,
  4345. .ignore_pmdown_time = 1,
  4346. /* this dainlink has playback support */
  4347. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4348. },
  4349. {
  4350. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4351. .stream_name = "MM_NOIRQ_2",
  4352. .cpu_dai_name = "MultiMedia16",
  4353. .platform_name = "msm-pcm-dsp-noirq",
  4354. .dynamic = 1,
  4355. .dpcm_playback = 1,
  4356. .dpcm_capture = 1,
  4357. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4358. SND_SOC_DPCM_TRIGGER_POST},
  4359. .codec_dai_name = "snd-soc-dummy-dai",
  4360. .codec_name = "snd-soc-dummy",
  4361. .ignore_suspend = 1,
  4362. .ignore_pmdown_time = 1,
  4363. /* this dainlink has playback support */
  4364. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4365. },
  4366. {
  4367. .name = "SLIMBUS_8 Hostless",
  4368. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  4369. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  4370. .platform_name = "msm-pcm-hostless",
  4371. .dynamic = 1,
  4372. .dpcm_capture = 1,
  4373. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4374. SND_SOC_DPCM_TRIGGER_POST},
  4375. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4376. .ignore_suspend = 1,
  4377. .codec_dai_name = "snd-soc-dummy-dai",
  4378. .codec_name = "snd-soc-dummy",
  4379. },
  4380. };
  4381. static struct snd_soc_dai_link msm_pahu_fe_dai_links[] = {
  4382. {
  4383. .name = LPASS_BE_SLIMBUS_4_TX,
  4384. .stream_name = "Slimbus4 Capture",
  4385. .cpu_dai_name = "msm-dai-q6-dev.16393",
  4386. .platform_name = "msm-pcm-hostless",
  4387. .codec_name = "pahu_codec",
  4388. .codec_dai_name = "pahu_vifeedback",
  4389. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  4390. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4391. .ops = &msm_be_ops,
  4392. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4393. .ignore_suspend = 1,
  4394. },
  4395. /* Ultrasound RX DAI Link */
  4396. {
  4397. .name = "SLIMBUS_2 Hostless Playback",
  4398. .stream_name = "SLIMBUS_2 Hostless Playback",
  4399. .cpu_dai_name = "msm-dai-q6-dev.16388",
  4400. .platform_name = "msm-pcm-hostless",
  4401. .codec_name = "pahu_codec",
  4402. .codec_dai_name = "pahu_rx2",
  4403. .ignore_suspend = 1,
  4404. .ignore_pmdown_time = 1,
  4405. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4406. .ops = &msm_slimbus_2_be_ops,
  4407. },
  4408. /* Ultrasound TX DAI Link */
  4409. {
  4410. .name = "SLIMBUS_2 Hostless Capture",
  4411. .stream_name = "SLIMBUS_2 Hostless Capture",
  4412. .cpu_dai_name = "msm-dai-q6-dev.16389",
  4413. .platform_name = "msm-pcm-hostless",
  4414. .codec_name = "pahu_codec",
  4415. .codec_dai_name = "pahu_tx2",
  4416. .ignore_suspend = 1,
  4417. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4418. .ops = &msm_slimbus_2_be_ops,
  4419. },
  4420. };
  4421. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4422. {
  4423. .name = MSM_DAILINK_NAME(ASM Loopback),
  4424. .stream_name = "MultiMedia6",
  4425. .cpu_dai_name = "MultiMedia6",
  4426. .platform_name = "msm-pcm-loopback",
  4427. .dynamic = 1,
  4428. .dpcm_playback = 1,
  4429. .dpcm_capture = 1,
  4430. .codec_dai_name = "snd-soc-dummy-dai",
  4431. .codec_name = "snd-soc-dummy",
  4432. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4433. SND_SOC_DPCM_TRIGGER_POST},
  4434. .ignore_suspend = 1,
  4435. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4436. .ignore_pmdown_time = 1,
  4437. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4438. },
  4439. {
  4440. .name = "USB Audio Hostless",
  4441. .stream_name = "USB Audio Hostless",
  4442. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4443. .platform_name = "msm-pcm-hostless",
  4444. .dynamic = 1,
  4445. .dpcm_playback = 1,
  4446. .dpcm_capture = 1,
  4447. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4448. SND_SOC_DPCM_TRIGGER_POST},
  4449. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4450. .ignore_suspend = 1,
  4451. .ignore_pmdown_time = 1,
  4452. .codec_dai_name = "snd-soc-dummy-dai",
  4453. .codec_name = "snd-soc-dummy",
  4454. },
  4455. };
  4456. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4457. /* Backend AFE DAI Links */
  4458. {
  4459. .name = LPASS_BE_AFE_PCM_RX,
  4460. .stream_name = "AFE Playback",
  4461. .cpu_dai_name = "msm-dai-q6-dev.224",
  4462. .platform_name = "msm-pcm-routing",
  4463. .codec_name = "msm-stub-codec.1",
  4464. .codec_dai_name = "msm-stub-rx",
  4465. .no_pcm = 1,
  4466. .dpcm_playback = 1,
  4467. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4468. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4469. /* this dainlink has playback support */
  4470. .ignore_pmdown_time = 1,
  4471. .ignore_suspend = 1,
  4472. },
  4473. {
  4474. .name = LPASS_BE_AFE_PCM_TX,
  4475. .stream_name = "AFE Capture",
  4476. .cpu_dai_name = "msm-dai-q6-dev.225",
  4477. .platform_name = "msm-pcm-routing",
  4478. .codec_name = "msm-stub-codec.1",
  4479. .codec_dai_name = "msm-stub-tx",
  4480. .no_pcm = 1,
  4481. .dpcm_capture = 1,
  4482. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4483. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4484. .ignore_suspend = 1,
  4485. },
  4486. /* Incall Record Uplink BACK END DAI Link */
  4487. {
  4488. .name = LPASS_BE_INCALL_RECORD_TX,
  4489. .stream_name = "Voice Uplink Capture",
  4490. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4491. .platform_name = "msm-pcm-routing",
  4492. .codec_name = "msm-stub-codec.1",
  4493. .codec_dai_name = "msm-stub-tx",
  4494. .no_pcm = 1,
  4495. .dpcm_capture = 1,
  4496. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4497. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4498. .ignore_suspend = 1,
  4499. },
  4500. /* Incall Record Downlink BACK END DAI Link */
  4501. {
  4502. .name = LPASS_BE_INCALL_RECORD_RX,
  4503. .stream_name = "Voice Downlink Capture",
  4504. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4505. .platform_name = "msm-pcm-routing",
  4506. .codec_name = "msm-stub-codec.1",
  4507. .codec_dai_name = "msm-stub-tx",
  4508. .no_pcm = 1,
  4509. .dpcm_capture = 1,
  4510. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4511. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4512. .ignore_suspend = 1,
  4513. },
  4514. /* Incall Music BACK END DAI Link */
  4515. {
  4516. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4517. .stream_name = "Voice Farend Playback",
  4518. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4519. .platform_name = "msm-pcm-routing",
  4520. .codec_name = "msm-stub-codec.1",
  4521. .codec_dai_name = "msm-stub-rx",
  4522. .no_pcm = 1,
  4523. .dpcm_playback = 1,
  4524. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4525. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4526. .ignore_suspend = 1,
  4527. .ignore_pmdown_time = 1,
  4528. },
  4529. /* Incall Music 2 BACK END DAI Link */
  4530. {
  4531. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4532. .stream_name = "Voice2 Farend Playback",
  4533. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4534. .platform_name = "msm-pcm-routing",
  4535. .codec_name = "msm-stub-codec.1",
  4536. .codec_dai_name = "msm-stub-rx",
  4537. .no_pcm = 1,
  4538. .dpcm_playback = 1,
  4539. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4540. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4541. .ignore_suspend = 1,
  4542. .ignore_pmdown_time = 1,
  4543. },
  4544. {
  4545. .name = LPASS_BE_USB_AUDIO_RX,
  4546. .stream_name = "USB Audio Playback",
  4547. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4548. .platform_name = "msm-pcm-routing",
  4549. .codec_name = "msm-stub-codec.1",
  4550. .codec_dai_name = "msm-stub-rx",
  4551. .no_pcm = 1,
  4552. .dpcm_playback = 1,
  4553. .id = MSM_BACKEND_DAI_USB_RX,
  4554. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4555. .ignore_pmdown_time = 1,
  4556. .ignore_suspend = 1,
  4557. },
  4558. {
  4559. .name = LPASS_BE_USB_AUDIO_TX,
  4560. .stream_name = "USB Audio Capture",
  4561. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4562. .platform_name = "msm-pcm-routing",
  4563. .codec_name = "msm-stub-codec.1",
  4564. .codec_dai_name = "msm-stub-tx",
  4565. .no_pcm = 1,
  4566. .dpcm_capture = 1,
  4567. .id = MSM_BACKEND_DAI_USB_TX,
  4568. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4569. .ignore_suspend = 1,
  4570. },
  4571. {
  4572. .name = LPASS_BE_PRI_TDM_RX_0,
  4573. .stream_name = "Primary TDM0 Playback",
  4574. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4575. .platform_name = "msm-pcm-routing",
  4576. .codec_name = "msm-stub-codec.1",
  4577. .codec_dai_name = "msm-stub-rx",
  4578. .no_pcm = 1,
  4579. .dpcm_playback = 1,
  4580. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4581. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4582. .ops = &sdm855_tdm_be_ops,
  4583. .ignore_suspend = 1,
  4584. .ignore_pmdown_time = 1,
  4585. },
  4586. {
  4587. .name = LPASS_BE_PRI_TDM_TX_0,
  4588. .stream_name = "Primary TDM0 Capture",
  4589. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4590. .platform_name = "msm-pcm-routing",
  4591. .codec_name = "msm-stub-codec.1",
  4592. .codec_dai_name = "msm-stub-tx",
  4593. .no_pcm = 1,
  4594. .dpcm_capture = 1,
  4595. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4596. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4597. .ops = &sdm855_tdm_be_ops,
  4598. .ignore_suspend = 1,
  4599. },
  4600. {
  4601. .name = LPASS_BE_SEC_TDM_RX_0,
  4602. .stream_name = "Secondary TDM0 Playback",
  4603. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4604. .platform_name = "msm-pcm-routing",
  4605. .codec_name = "msm-stub-codec.1",
  4606. .codec_dai_name = "msm-stub-rx",
  4607. .no_pcm = 1,
  4608. .dpcm_playback = 1,
  4609. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4610. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4611. .ops = &sdm855_tdm_be_ops,
  4612. .ignore_suspend = 1,
  4613. .ignore_pmdown_time = 1,
  4614. },
  4615. {
  4616. .name = LPASS_BE_SEC_TDM_TX_0,
  4617. .stream_name = "Secondary TDM0 Capture",
  4618. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4619. .platform_name = "msm-pcm-routing",
  4620. .codec_name = "msm-stub-codec.1",
  4621. .codec_dai_name = "msm-stub-tx",
  4622. .no_pcm = 1,
  4623. .dpcm_capture = 1,
  4624. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4625. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4626. .ops = &sdm855_tdm_be_ops,
  4627. .ignore_suspend = 1,
  4628. },
  4629. {
  4630. .name = LPASS_BE_TERT_TDM_RX_0,
  4631. .stream_name = "Tertiary TDM0 Playback",
  4632. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4633. .platform_name = "msm-pcm-routing",
  4634. .codec_name = "msm-stub-codec.1",
  4635. .codec_dai_name = "msm-stub-rx",
  4636. .no_pcm = 1,
  4637. .dpcm_playback = 1,
  4638. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4639. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4640. .ops = &sdm855_tdm_be_ops,
  4641. .ignore_suspend = 1,
  4642. .ignore_pmdown_time = 1,
  4643. },
  4644. {
  4645. .name = LPASS_BE_TERT_TDM_TX_0,
  4646. .stream_name = "Tertiary TDM0 Capture",
  4647. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4648. .platform_name = "msm-pcm-routing",
  4649. .codec_name = "msm-stub-codec.1",
  4650. .codec_dai_name = "msm-stub-tx",
  4651. .no_pcm = 1,
  4652. .dpcm_capture = 1,
  4653. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4654. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4655. .ops = &sdm855_tdm_be_ops,
  4656. .ignore_suspend = 1,
  4657. },
  4658. {
  4659. .name = LPASS_BE_QUAT_TDM_RX_0,
  4660. .stream_name = "Quaternary TDM0 Playback",
  4661. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  4662. .platform_name = "msm-pcm-routing",
  4663. .codec_name = "msm-stub-codec.1",
  4664. .codec_dai_name = "msm-stub-rx",
  4665. .no_pcm = 1,
  4666. .dpcm_playback = 1,
  4667. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  4668. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  4669. .ops = &sdm855_tdm_be_ops,
  4670. .ignore_suspend = 1,
  4671. .ignore_pmdown_time = 1,
  4672. },
  4673. {
  4674. .name = LPASS_BE_QUAT_TDM_TX_0,
  4675. .stream_name = "Quaternary TDM0 Capture",
  4676. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  4677. .platform_name = "msm-pcm-routing",
  4678. .codec_name = "msm-stub-codec.1",
  4679. .codec_dai_name = "msm-stub-tx",
  4680. .no_pcm = 1,
  4681. .dpcm_capture = 1,
  4682. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  4683. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4684. .ops = &sdm855_tdm_be_ops,
  4685. .ignore_suspend = 1,
  4686. },
  4687. };
  4688. static struct snd_soc_dai_link msm_pahu_be_dai_links[] = {
  4689. {
  4690. .name = LPASS_BE_SLIMBUS_0_RX,
  4691. .stream_name = "Slimbus Playback",
  4692. .cpu_dai_name = "msm-dai-q6-dev.16384",
  4693. .platform_name = "msm-pcm-routing",
  4694. .codec_name = "pahu_codec",
  4695. .codec_dai_name = "pahu_rx1",
  4696. .no_pcm = 1,
  4697. .dpcm_playback = 1,
  4698. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  4699. .init = &msm_audrx_init,
  4700. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4701. /* this dainlink has playback support */
  4702. .ignore_pmdown_time = 1,
  4703. .ignore_suspend = 1,
  4704. .ops = &msm_be_ops,
  4705. },
  4706. {
  4707. .name = LPASS_BE_SLIMBUS_0_TX,
  4708. .stream_name = "Slimbus Capture",
  4709. .cpu_dai_name = "msm-dai-q6-dev.16385",
  4710. .platform_name = "msm-pcm-routing",
  4711. .codec_name = "pahu_codec",
  4712. .codec_dai_name = "pahu_tx1",
  4713. .no_pcm = 1,
  4714. .dpcm_capture = 1,
  4715. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  4716. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4717. .ignore_suspend = 1,
  4718. .ops = &msm_be_ops,
  4719. },
  4720. {
  4721. .name = LPASS_BE_SLIMBUS_1_RX,
  4722. .stream_name = "Slimbus1 Playback",
  4723. .cpu_dai_name = "msm-dai-q6-dev.16386",
  4724. .platform_name = "msm-pcm-routing",
  4725. .codec_name = "pahu_codec",
  4726. .codec_dai_name = "pahu_rx1",
  4727. .no_pcm = 1,
  4728. .dpcm_playback = 1,
  4729. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  4730. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4731. .ops = &msm_be_ops,
  4732. /* dai link has playback support */
  4733. .ignore_pmdown_time = 1,
  4734. .ignore_suspend = 1,
  4735. },
  4736. {
  4737. .name = LPASS_BE_SLIMBUS_1_TX,
  4738. .stream_name = "Slimbus1 Capture",
  4739. .cpu_dai_name = "msm-dai-q6-dev.16387",
  4740. .platform_name = "msm-pcm-routing",
  4741. .codec_name = "pahu_codec",
  4742. .codec_dai_name = "pahu_tx3",
  4743. .no_pcm = 1,
  4744. .dpcm_capture = 1,
  4745. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  4746. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4747. .ops = &msm_be_ops,
  4748. .ignore_suspend = 1,
  4749. },
  4750. {
  4751. .name = LPASS_BE_SLIMBUS_2_RX,
  4752. .stream_name = "Slimbus2 Playback",
  4753. .cpu_dai_name = "msm-dai-q6-dev.16388",
  4754. .platform_name = "msm-pcm-routing",
  4755. .codec_name = "pahu_codec",
  4756. .codec_dai_name = "pahu_rx2",
  4757. .no_pcm = 1,
  4758. .dpcm_playback = 1,
  4759. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  4760. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4761. .ops = &msm_be_ops,
  4762. .ignore_pmdown_time = 1,
  4763. .ignore_suspend = 1,
  4764. },
  4765. {
  4766. .name = LPASS_BE_SLIMBUS_3_RX,
  4767. .stream_name = "Slimbus3 Playback",
  4768. .cpu_dai_name = "msm-dai-q6-dev.16390",
  4769. .platform_name = "msm-pcm-routing",
  4770. .codec_name = "pahu_codec",
  4771. .codec_dai_name = "pahu_rx1",
  4772. .no_pcm = 1,
  4773. .dpcm_playback = 1,
  4774. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  4775. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4776. .ops = &msm_be_ops,
  4777. /* dai link has playback support */
  4778. .ignore_pmdown_time = 1,
  4779. .ignore_suspend = 1,
  4780. },
  4781. {
  4782. .name = LPASS_BE_SLIMBUS_3_TX,
  4783. .stream_name = "Slimbus3 Capture",
  4784. .cpu_dai_name = "msm-dai-q6-dev.16391",
  4785. .platform_name = "msm-pcm-routing",
  4786. .codec_name = "pahu_codec",
  4787. .codec_dai_name = "pahu_tx1",
  4788. .no_pcm = 1,
  4789. .dpcm_capture = 1,
  4790. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  4791. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4792. .ops = &msm_be_ops,
  4793. .ignore_suspend = 1,
  4794. },
  4795. {
  4796. .name = LPASS_BE_SLIMBUS_4_RX,
  4797. .stream_name = "Slimbus4 Playback",
  4798. .cpu_dai_name = "msm-dai-q6-dev.16392",
  4799. .platform_name = "msm-pcm-routing",
  4800. .codec_name = "pahu_codec",
  4801. .codec_dai_name = "pahu_rx1",
  4802. .no_pcm = 1,
  4803. .dpcm_playback = 1,
  4804. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  4805. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4806. .ops = &msm_be_ops,
  4807. /* dai link has playback support */
  4808. .ignore_pmdown_time = 1,
  4809. .ignore_suspend = 1,
  4810. },
  4811. {
  4812. .name = LPASS_BE_SLIMBUS_5_RX,
  4813. .stream_name = "Slimbus5 Playback",
  4814. .cpu_dai_name = "msm-dai-q6-dev.16394",
  4815. .platform_name = "msm-pcm-routing",
  4816. .codec_name = "pahu_codec",
  4817. .codec_dai_name = "pahu_rx3",
  4818. .no_pcm = 1,
  4819. .dpcm_playback = 1,
  4820. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  4821. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4822. .ops = &msm_be_ops,
  4823. /* dai link has playback support */
  4824. .ignore_pmdown_time = 1,
  4825. .ignore_suspend = 1,
  4826. },
  4827. /* MAD BE */
  4828. {
  4829. .name = LPASS_BE_SLIMBUS_5_TX,
  4830. .stream_name = "Slimbus5 Capture",
  4831. .cpu_dai_name = "msm-dai-q6-dev.16395",
  4832. .platform_name = "msm-pcm-routing",
  4833. .codec_name = "pahu_codec",
  4834. .codec_dai_name = "pahu_mad1",
  4835. .no_pcm = 1,
  4836. .dpcm_capture = 1,
  4837. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  4838. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4839. .ops = &msm_be_ops,
  4840. .ignore_suspend = 1,
  4841. },
  4842. {
  4843. .name = LPASS_BE_SLIMBUS_6_RX,
  4844. .stream_name = "Slimbus6 Playback",
  4845. .cpu_dai_name = "msm-dai-q6-dev.16396",
  4846. .platform_name = "msm-pcm-routing",
  4847. .codec_name = "pahu_codec",
  4848. .codec_dai_name = "pahu_rx4",
  4849. .no_pcm = 1,
  4850. .dpcm_playback = 1,
  4851. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  4852. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4853. .ops = &msm_be_ops,
  4854. /* dai link has playback support */
  4855. .ignore_pmdown_time = 1,
  4856. .ignore_suspend = 1,
  4857. },
  4858. /* Slimbus VI Recording */
  4859. {
  4860. .name = LPASS_BE_SLIMBUS_TX_VI,
  4861. .stream_name = "Slimbus4 Capture",
  4862. .cpu_dai_name = "msm-dai-q6-dev.16393",
  4863. .platform_name = "msm-pcm-routing",
  4864. .codec_name = "pahu_codec",
  4865. .codec_dai_name = "pahu_vifeedback",
  4866. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  4867. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4868. .ops = &msm_be_ops,
  4869. .ignore_suspend = 1,
  4870. .no_pcm = 1,
  4871. .dpcm_capture = 1,
  4872. },
  4873. };
  4874. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  4875. {
  4876. .name = LPASS_BE_SLIMBUS_7_RX,
  4877. .stream_name = "Slimbus7 Playback",
  4878. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4879. .platform_name = "msm-pcm-routing",
  4880. .codec_name = "btfmslim_slave",
  4881. /* BT codec driver determines capabilities based on
  4882. * dai name, bt codecdai name should always contains
  4883. * supported usecase information
  4884. */
  4885. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4886. .no_pcm = 1,
  4887. .dpcm_playback = 1,
  4888. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4889. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4890. .ops = &msm_wcn_ops,
  4891. /* dai link has playback support */
  4892. .ignore_pmdown_time = 1,
  4893. .ignore_suspend = 1,
  4894. },
  4895. {
  4896. .name = LPASS_BE_SLIMBUS_7_TX,
  4897. .stream_name = "Slimbus7 Capture",
  4898. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4899. .platform_name = "msm-pcm-routing",
  4900. .codec_name = "btfmslim_slave",
  4901. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4902. .no_pcm = 1,
  4903. .dpcm_capture = 1,
  4904. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4905. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4906. .ops = &msm_wcn_ops,
  4907. .ignore_suspend = 1,
  4908. },
  4909. {
  4910. .name = LPASS_BE_SLIMBUS_8_TX,
  4911. .stream_name = "Slimbus8 Capture",
  4912. .cpu_dai_name = "msm-dai-q6-dev.16401",
  4913. .platform_name = "msm-pcm-routing",
  4914. .codec_name = "btfmslim_slave",
  4915. .codec_dai_name = "btfm_fm_slim_tx",
  4916. .no_pcm = 1,
  4917. .dpcm_capture = 1,
  4918. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  4919. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4920. .init = &msm_wcn_init,
  4921. .ops = &msm_wcn_ops,
  4922. .ignore_suspend = 1,
  4923. },
  4924. };
  4925. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  4926. /* DISP PORT BACK END DAI Link */
  4927. {
  4928. .name = LPASS_BE_DISPLAY_PORT,
  4929. .stream_name = "Display Port Playback",
  4930. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4931. .platform_name = "msm-pcm-routing",
  4932. .codec_name = "msm-ext-disp-audio-codec-rx",
  4933. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  4934. .no_pcm = 1,
  4935. .dpcm_playback = 1,
  4936. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  4937. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4938. .ignore_pmdown_time = 1,
  4939. .ignore_suspend = 1,
  4940. },
  4941. };
  4942. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4943. {
  4944. .name = LPASS_BE_PRI_MI2S_RX,
  4945. .stream_name = "Primary MI2S Playback",
  4946. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4947. .platform_name = "msm-pcm-routing",
  4948. .codec_name = "msm-stub-codec.1",
  4949. .codec_dai_name = "msm-stub-rx",
  4950. .no_pcm = 1,
  4951. .dpcm_playback = 1,
  4952. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4953. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4954. .ops = &msm_mi2s_be_ops,
  4955. .ignore_suspend = 1,
  4956. .ignore_pmdown_time = 1,
  4957. },
  4958. {
  4959. .name = LPASS_BE_PRI_MI2S_TX,
  4960. .stream_name = "Primary MI2S Capture",
  4961. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4962. .platform_name = "msm-pcm-routing",
  4963. .codec_name = "msm-stub-codec.1",
  4964. .codec_dai_name = "msm-stub-tx",
  4965. .no_pcm = 1,
  4966. .dpcm_capture = 1,
  4967. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4968. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4969. .ops = &msm_mi2s_be_ops,
  4970. .ignore_suspend = 1,
  4971. },
  4972. {
  4973. .name = LPASS_BE_SEC_MI2S_RX,
  4974. .stream_name = "Secondary MI2S Playback",
  4975. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4976. .platform_name = "msm-pcm-routing",
  4977. .codec_name = "msm-stub-codec.1",
  4978. .codec_dai_name = "msm-stub-rx",
  4979. .no_pcm = 1,
  4980. .dpcm_playback = 1,
  4981. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4982. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4983. .ops = &msm_mi2s_be_ops,
  4984. .ignore_suspend = 1,
  4985. .ignore_pmdown_time = 1,
  4986. },
  4987. {
  4988. .name = LPASS_BE_SEC_MI2S_TX,
  4989. .stream_name = "Secondary MI2S Capture",
  4990. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4991. .platform_name = "msm-pcm-routing",
  4992. .codec_name = "msm-stub-codec.1",
  4993. .codec_dai_name = "msm-stub-tx",
  4994. .no_pcm = 1,
  4995. .dpcm_capture = 1,
  4996. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4997. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4998. .ops = &msm_mi2s_be_ops,
  4999. .ignore_suspend = 1,
  5000. },
  5001. {
  5002. .name = LPASS_BE_TERT_MI2S_RX,
  5003. .stream_name = "Tertiary MI2S Playback",
  5004. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  5005. .platform_name = "msm-pcm-routing",
  5006. .codec_name = "msm-stub-codec.1",
  5007. .codec_dai_name = "msm-stub-rx",
  5008. .no_pcm = 1,
  5009. .dpcm_playback = 1,
  5010. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  5011. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5012. .ops = &msm_mi2s_be_ops,
  5013. .ignore_suspend = 1,
  5014. .ignore_pmdown_time = 1,
  5015. },
  5016. {
  5017. .name = LPASS_BE_TERT_MI2S_TX,
  5018. .stream_name = "Tertiary MI2S Capture",
  5019. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  5020. .platform_name = "msm-pcm-routing",
  5021. .codec_name = "msm-stub-codec.1",
  5022. .codec_dai_name = "msm-stub-tx",
  5023. .no_pcm = 1,
  5024. .dpcm_capture = 1,
  5025. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  5026. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5027. .ops = &msm_mi2s_be_ops,
  5028. .ignore_suspend = 1,
  5029. },
  5030. {
  5031. .name = LPASS_BE_QUAT_MI2S_RX,
  5032. .stream_name = "Quaternary MI2S Playback",
  5033. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5034. .platform_name = "msm-pcm-routing",
  5035. .codec_name = "msm-stub-codec.1",
  5036. .codec_dai_name = "msm-stub-rx",
  5037. .no_pcm = 1,
  5038. .dpcm_playback = 1,
  5039. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  5040. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5041. .ops = &msm_mi2s_be_ops,
  5042. .ignore_suspend = 1,
  5043. .ignore_pmdown_time = 1,
  5044. },
  5045. {
  5046. .name = LPASS_BE_QUAT_MI2S_TX,
  5047. .stream_name = "Quaternary MI2S Capture",
  5048. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5049. .platform_name = "msm-pcm-routing",
  5050. .codec_name = "msm-stub-codec.1",
  5051. .codec_dai_name = "msm-stub-tx",
  5052. .no_pcm = 1,
  5053. .dpcm_capture = 1,
  5054. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  5055. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5056. .ops = &msm_mi2s_be_ops,
  5057. .ignore_suspend = 1,
  5058. },
  5059. };
  5060. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  5061. /* Primary AUX PCM Backend DAI Links */
  5062. {
  5063. .name = LPASS_BE_AUXPCM_RX,
  5064. .stream_name = "AUX PCM Playback",
  5065. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5066. .platform_name = "msm-pcm-routing",
  5067. .codec_name = "msm-stub-codec.1",
  5068. .codec_dai_name = "msm-stub-rx",
  5069. .no_pcm = 1,
  5070. .dpcm_playback = 1,
  5071. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5072. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5073. .ignore_pmdown_time = 1,
  5074. .ignore_suspend = 1,
  5075. },
  5076. {
  5077. .name = LPASS_BE_AUXPCM_TX,
  5078. .stream_name = "AUX PCM Capture",
  5079. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5080. .platform_name = "msm-pcm-routing",
  5081. .codec_name = "msm-stub-codec.1",
  5082. .codec_dai_name = "msm-stub-tx",
  5083. .no_pcm = 1,
  5084. .dpcm_capture = 1,
  5085. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5086. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5087. .ignore_suspend = 1,
  5088. },
  5089. /* Secondary AUX PCM Backend DAI Links */
  5090. {
  5091. .name = LPASS_BE_SEC_AUXPCM_RX,
  5092. .stream_name = "Sec AUX PCM Playback",
  5093. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5094. .platform_name = "msm-pcm-routing",
  5095. .codec_name = "msm-stub-codec.1",
  5096. .codec_dai_name = "msm-stub-rx",
  5097. .no_pcm = 1,
  5098. .dpcm_playback = 1,
  5099. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  5100. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5101. .ignore_pmdown_time = 1,
  5102. .ignore_suspend = 1,
  5103. },
  5104. {
  5105. .name = LPASS_BE_SEC_AUXPCM_TX,
  5106. .stream_name = "Sec AUX PCM Capture",
  5107. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5108. .platform_name = "msm-pcm-routing",
  5109. .codec_name = "msm-stub-codec.1",
  5110. .codec_dai_name = "msm-stub-tx",
  5111. .no_pcm = 1,
  5112. .dpcm_capture = 1,
  5113. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  5114. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5115. .ignore_suspend = 1,
  5116. },
  5117. /* Tertiary AUX PCM Backend DAI Links */
  5118. {
  5119. .name = LPASS_BE_TERT_AUXPCM_RX,
  5120. .stream_name = "Tert AUX PCM Playback",
  5121. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5122. .platform_name = "msm-pcm-routing",
  5123. .codec_name = "msm-stub-codec.1",
  5124. .codec_dai_name = "msm-stub-rx",
  5125. .no_pcm = 1,
  5126. .dpcm_playback = 1,
  5127. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5128. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5129. .ignore_suspend = 1,
  5130. },
  5131. {
  5132. .name = LPASS_BE_TERT_AUXPCM_TX,
  5133. .stream_name = "Tert AUX PCM Capture",
  5134. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5135. .platform_name = "msm-pcm-routing",
  5136. .codec_name = "msm-stub-codec.1",
  5137. .codec_dai_name = "msm-stub-tx",
  5138. .no_pcm = 1,
  5139. .dpcm_capture = 1,
  5140. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5141. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5142. .ignore_suspend = 1,
  5143. },
  5144. /* Quaternary AUX PCM Backend DAI Links */
  5145. {
  5146. .name = LPASS_BE_QUAT_AUXPCM_RX,
  5147. .stream_name = "Quat AUX PCM Playback",
  5148. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5149. .platform_name = "msm-pcm-routing",
  5150. .codec_name = "msm-stub-codec.1",
  5151. .codec_dai_name = "msm-stub-rx",
  5152. .no_pcm = 1,
  5153. .dpcm_playback = 1,
  5154. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  5155. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5156. .ignore_pmdown_time = 1,
  5157. .ignore_suspend = 1,
  5158. },
  5159. {
  5160. .name = LPASS_BE_QUAT_AUXPCM_TX,
  5161. .stream_name = "Quat AUX PCM Capture",
  5162. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5163. .platform_name = "msm-pcm-routing",
  5164. .codec_name = "msm-stub-codec.1",
  5165. .codec_dai_name = "msm-stub-tx",
  5166. .no_pcm = 1,
  5167. .dpcm_capture = 1,
  5168. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  5169. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5170. .ignore_suspend = 1,
  5171. },
  5172. };
  5173. static struct snd_soc_dai_link msm_pahu_snd_card_dai_links[
  5174. ARRAY_SIZE(msm_common_dai_links) +
  5175. ARRAY_SIZE(msm_pahu_fe_dai_links) +
  5176. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  5177. ARRAY_SIZE(msm_common_be_dai_links) +
  5178. ARRAY_SIZE(msm_pahu_be_dai_links) +
  5179. ARRAY_SIZE(msm_wcn_be_dai_links) +
  5180. ARRAY_SIZE(ext_disp_be_dai_link) +
  5181. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5182. ARRAY_SIZE(msm_auxpcm_be_dai_links)];
  5183. static int msm_snd_card_pahu_late_probe(struct snd_soc_card *card)
  5184. {
  5185. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  5186. struct snd_soc_pcm_runtime *rtd;
  5187. int ret = 0;
  5188. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  5189. if (!rtd) {
  5190. dev_err(card->dev,
  5191. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  5192. __func__, be_dl_name);
  5193. ret = -EINVAL;
  5194. goto err;
  5195. }
  5196. err:
  5197. return ret;
  5198. }
  5199. struct snd_soc_card snd_soc_card_pahu_msm = {
  5200. .name = "sdm855-pahu-snd-card",
  5201. .late_probe = msm_snd_card_pahu_late_probe,
  5202. };
  5203. static int msm_populate_dai_link_component_of_node(
  5204. struct snd_soc_card *card)
  5205. {
  5206. int i, index, ret = 0;
  5207. struct device *cdev = card->dev;
  5208. struct snd_soc_dai_link *dai_link = card->dai_link;
  5209. struct device_node *np;
  5210. if (!cdev) {
  5211. pr_err("%s: Sound card device memory NULL\n", __func__);
  5212. return -ENODEV;
  5213. }
  5214. for (i = 0; i < card->num_links; i++) {
  5215. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5216. continue;
  5217. /* populate platform_of_node for snd card dai links */
  5218. if (dai_link[i].platform_name &&
  5219. !dai_link[i].platform_of_node) {
  5220. index = of_property_match_string(cdev->of_node,
  5221. "asoc-platform-names",
  5222. dai_link[i].platform_name);
  5223. if (index < 0) {
  5224. pr_err("%s: No match found for platform name: %s\n",
  5225. __func__, dai_link[i].platform_name);
  5226. ret = index;
  5227. goto err;
  5228. }
  5229. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5230. index);
  5231. if (!np) {
  5232. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  5233. __func__, dai_link[i].platform_name,
  5234. index);
  5235. ret = -ENODEV;
  5236. goto err;
  5237. }
  5238. dai_link[i].platform_of_node = np;
  5239. dai_link[i].platform_name = NULL;
  5240. }
  5241. /* populate cpu_of_node for snd card dai links */
  5242. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5243. index = of_property_match_string(cdev->of_node,
  5244. "asoc-cpu-names",
  5245. dai_link[i].cpu_dai_name);
  5246. if (index >= 0) {
  5247. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5248. index);
  5249. if (!np) {
  5250. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  5251. __func__,
  5252. dai_link[i].cpu_dai_name);
  5253. ret = -ENODEV;
  5254. goto err;
  5255. }
  5256. dai_link[i].cpu_of_node = np;
  5257. dai_link[i].cpu_dai_name = NULL;
  5258. }
  5259. }
  5260. /* populate codec_of_node for snd card dai links */
  5261. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5262. index = of_property_match_string(cdev->of_node,
  5263. "asoc-codec-names",
  5264. dai_link[i].codec_name);
  5265. if (index < 0)
  5266. continue;
  5267. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5268. index);
  5269. if (!np) {
  5270. pr_err("%s: retrieving phandle for codec %s failed\n",
  5271. __func__, dai_link[i].codec_name);
  5272. ret = -ENODEV;
  5273. goto err;
  5274. }
  5275. dai_link[i].codec_of_node = np;
  5276. dai_link[i].codec_name = NULL;
  5277. }
  5278. }
  5279. err:
  5280. return ret;
  5281. }
  5282. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5283. {
  5284. int ret = 0;
  5285. struct snd_soc_codec *codec = rtd->codec;
  5286. ret = snd_soc_add_codec_controls(codec, msm_snd_controls,
  5287. ARRAY_SIZE(msm_snd_controls));
  5288. if (ret < 0) {
  5289. dev_err(codec->dev,
  5290. "%s: add_codec_controls failed, err = %d\n",
  5291. __func__, ret);
  5292. return ret;
  5293. }
  5294. return 0;
  5295. }
  5296. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5297. struct snd_pcm_hw_params *params)
  5298. {
  5299. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5300. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5301. int ret = 0;
  5302. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  5303. 151};
  5304. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  5305. 134, 135, 136, 137, 138, 139,
  5306. 140, 141, 142, 143};
  5307. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  5308. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  5309. slim_rx_cfg[SLIM_RX_0].channels,
  5310. rx_ch);
  5311. if (ret < 0)
  5312. pr_err("%s: RX failed to set cpu chan map error %d\n",
  5313. __func__, ret);
  5314. } else {
  5315. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5316. slim_tx_cfg[SLIM_TX_0].channels,
  5317. tx_ch, 0, 0);
  5318. if (ret < 0)
  5319. pr_err("%s: TX failed to set cpu chan map error %d\n",
  5320. __func__, ret);
  5321. }
  5322. return ret;
  5323. }
  5324. static struct snd_soc_ops msm_stub_be_ops = {
  5325. .hw_params = msm_snd_stub_hw_params,
  5326. };
  5327. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5328. /* FrontEnd DAI Links */
  5329. {
  5330. .name = "MSMSTUB Media1",
  5331. .stream_name = "MultiMedia1",
  5332. .cpu_dai_name = "MultiMedia1",
  5333. .platform_name = "msm-pcm-dsp.0",
  5334. .dynamic = 1,
  5335. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5336. .dpcm_playback = 1,
  5337. .dpcm_capture = 1,
  5338. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5339. SND_SOC_DPCM_TRIGGER_POST},
  5340. .codec_dai_name = "snd-soc-dummy-dai",
  5341. .codec_name = "snd-soc-dummy",
  5342. .ignore_suspend = 1,
  5343. /* this dainlink has playback support */
  5344. .ignore_pmdown_time = 1,
  5345. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5346. },
  5347. };
  5348. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5349. /* Backend DAI Links */
  5350. {
  5351. .name = LPASS_BE_SLIMBUS_0_RX,
  5352. .stream_name = "Slimbus Playback",
  5353. .cpu_dai_name = "msm-dai-q6-dev.16384",
  5354. .platform_name = "msm-pcm-routing",
  5355. .codec_name = "msm-stub-codec.1",
  5356. .codec_dai_name = "msm-stub-rx",
  5357. .no_pcm = 1,
  5358. .dpcm_playback = 1,
  5359. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  5360. .init = &msm_audrx_stub_init,
  5361. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5362. .ignore_pmdown_time = 1, /* dai link has playback support */
  5363. .ignore_suspend = 1,
  5364. .ops = &msm_stub_be_ops,
  5365. },
  5366. {
  5367. .name = LPASS_BE_SLIMBUS_0_TX,
  5368. .stream_name = "Slimbus Capture",
  5369. .cpu_dai_name = "msm-dai-q6-dev.16385",
  5370. .platform_name = "msm-pcm-routing",
  5371. .codec_name = "msm-stub-codec.1",
  5372. .codec_dai_name = "msm-stub-tx",
  5373. .no_pcm = 1,
  5374. .dpcm_capture = 1,
  5375. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  5376. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5377. .ignore_suspend = 1,
  5378. .ops = &msm_stub_be_ops,
  5379. },
  5380. };
  5381. static struct snd_soc_dai_link msm_stub_dai_links[
  5382. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5383. ARRAY_SIZE(msm_stub_be_dai_links)];
  5384. struct snd_soc_card snd_soc_card_stub_msm = {
  5385. .name = "sdm855-stub-snd-card",
  5386. };
  5387. static const struct of_device_id sdm855_asoc_machine_of_match[] = {
  5388. { .compatible = "qcom,sdm855-asoc-snd-pahu",
  5389. .data = "pahu_codec"},
  5390. { .compatible = "qcom,sdm855-asoc-snd-stub",
  5391. .data = "stub_codec"},
  5392. {},
  5393. };
  5394. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5395. {
  5396. struct snd_soc_card *card = NULL;
  5397. struct snd_soc_dai_link *dailink;
  5398. int len_1, len_2, len_3, len_4;
  5399. int total_links;
  5400. const struct of_device_id *match;
  5401. match = of_match_node(sdm855_asoc_machine_of_match, dev->of_node);
  5402. if (!match) {
  5403. dev_err(dev, "%s: No DT match found for sound card\n",
  5404. __func__);
  5405. return NULL;
  5406. }
  5407. if (!strcmp(match->data, "pahu_codec")) {
  5408. card = &snd_soc_card_pahu_msm;
  5409. len_1 = ARRAY_SIZE(msm_common_dai_links);
  5410. len_2 = len_1 + ARRAY_SIZE(msm_pahu_fe_dai_links);
  5411. len_3 = len_2 + ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5412. len_4 = len_3 + ARRAY_SIZE(msm_common_be_dai_links);
  5413. total_links = len_4 + ARRAY_SIZE(msm_pahu_be_dai_links);
  5414. memcpy(msm_pahu_snd_card_dai_links,
  5415. msm_common_dai_links,
  5416. sizeof(msm_common_dai_links));
  5417. memcpy(msm_pahu_snd_card_dai_links + len_1,
  5418. msm_pahu_fe_dai_links,
  5419. sizeof(msm_pahu_fe_dai_links));
  5420. memcpy(msm_pahu_snd_card_dai_links + len_2,
  5421. msm_common_misc_fe_dai_links,
  5422. sizeof(msm_common_misc_fe_dai_links));
  5423. memcpy(msm_pahu_snd_card_dai_links + len_3,
  5424. msm_common_be_dai_links,
  5425. sizeof(msm_common_be_dai_links));
  5426. memcpy(msm_pahu_snd_card_dai_links + len_4,
  5427. msm_pahu_be_dai_links,
  5428. sizeof(msm_pahu_be_dai_links));
  5429. if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
  5430. dev_dbg(dev, "%s(): WCN BTFM support present\n",
  5431. __func__);
  5432. memcpy(msm_pahu_snd_card_dai_links + total_links,
  5433. msm_wcn_be_dai_links,
  5434. sizeof(msm_wcn_be_dai_links));
  5435. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  5436. }
  5437. if (of_property_read_bool(dev->of_node,
  5438. "qcom,ext-disp-audio-rx")) {
  5439. dev_dbg(dev, "%s(): ext disp audio support present\n",
  5440. __func__);
  5441. memcpy(msm_pahu_snd_card_dai_links + total_links,
  5442. ext_disp_be_dai_link,
  5443. sizeof(ext_disp_be_dai_link));
  5444. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  5445. }
  5446. if (of_property_read_bool(dev->of_node,
  5447. "qcom,mi2s-audio-intf")) {
  5448. memcpy(msm_pahu_snd_card_dai_links + total_links,
  5449. msm_mi2s_be_dai_links,
  5450. sizeof(msm_mi2s_be_dai_links));
  5451. total_links += ARRAY_SIZE(msm_mi2s_be_dai_links);
  5452. }
  5453. if (of_property_read_bool(dev->of_node,
  5454. "qcom,auxpcm-audio-intf")) {
  5455. memcpy(msm_pahu_snd_card_dai_links + total_links,
  5456. msm_auxpcm_be_dai_links,
  5457. sizeof(msm_auxpcm_be_dai_links));
  5458. total_links += ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5459. }
  5460. dailink = msm_pahu_snd_card_dai_links;
  5461. } else if (!strcmp(match->data, "stub_codec")) {
  5462. card = &snd_soc_card_stub_msm;
  5463. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5464. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5465. memcpy(msm_stub_dai_links,
  5466. msm_stub_fe_dai_links,
  5467. sizeof(msm_stub_fe_dai_links));
  5468. memcpy(msm_stub_dai_links + len_1,
  5469. msm_stub_be_dai_links,
  5470. sizeof(msm_stub_be_dai_links));
  5471. dailink = msm_stub_dai_links;
  5472. total_links = len_2;
  5473. }
  5474. if (card) {
  5475. card->dai_link = dailink;
  5476. card->num_links = total_links;
  5477. }
  5478. return card;
  5479. }
  5480. static int msm_wsa881x_init(struct snd_soc_component *component)
  5481. {
  5482. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
  5483. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
  5484. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  5485. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  5486. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  5487. struct msm_asoc_mach_data *pdata;
  5488. struct snd_soc_dapm_context *dapm;
  5489. int ret = 0;
  5490. if (!codec) {
  5491. pr_err("%s codec is NULL\n", __func__);
  5492. return -EINVAL;
  5493. }
  5494. dapm = snd_soc_codec_get_dapm(codec);
  5495. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  5496. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  5497. __func__, codec->component.name);
  5498. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  5499. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5500. &ch_rate[0]);
  5501. if (dapm->component) {
  5502. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  5503. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  5504. }
  5505. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  5506. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  5507. __func__, codec->component.name);
  5508. wsa881x_set_channel_map(codec, &spkright_ports[0],
  5509. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5510. &ch_rate[0]);
  5511. if (dapm->component) {
  5512. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  5513. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  5514. }
  5515. } else {
  5516. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  5517. codec->component.name);
  5518. ret = -EINVAL;
  5519. goto err;
  5520. }
  5521. pdata = snd_soc_card_get_drvdata(component->card);
  5522. if (pdata && pdata->codec_root)
  5523. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  5524. codec);
  5525. err:
  5526. return ret;
  5527. }
  5528. static int msm_init_wsa_dev(struct platform_device *pdev,
  5529. struct snd_soc_card *card)
  5530. {
  5531. struct device_node *wsa_of_node;
  5532. u32 wsa_max_devs;
  5533. u32 wsa_dev_cnt;
  5534. int i;
  5535. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5536. const char *wsa_auxdev_name_prefix[1];
  5537. char *dev_name_str = NULL;
  5538. int found = 0;
  5539. int ret = 0;
  5540. /* Get maximum WSA device count for this platform */
  5541. ret = of_property_read_u32(pdev->dev.of_node,
  5542. "qcom,wsa-max-devs", &wsa_max_devs);
  5543. if (ret) {
  5544. dev_info(&pdev->dev,
  5545. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5546. __func__, pdev->dev.of_node->full_name, ret);
  5547. card->num_aux_devs = 0;
  5548. return 0;
  5549. }
  5550. if (wsa_max_devs == 0) {
  5551. dev_warn(&pdev->dev,
  5552. "%s: Max WSA devices is 0 for this target?\n",
  5553. __func__);
  5554. card->num_aux_devs = 0;
  5555. return 0;
  5556. }
  5557. /* Get count of WSA device phandles for this platform */
  5558. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5559. "qcom,wsa-devs", NULL);
  5560. if (wsa_dev_cnt == -ENOENT) {
  5561. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5562. __func__);
  5563. goto err;
  5564. } else if (wsa_dev_cnt <= 0) {
  5565. dev_err(&pdev->dev,
  5566. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5567. __func__, wsa_dev_cnt);
  5568. ret = -EINVAL;
  5569. goto err;
  5570. }
  5571. /*
  5572. * Expect total phandles count to be NOT less than maximum possible
  5573. * WSA count. However, if it is less, then assign same value to
  5574. * max count as well.
  5575. */
  5576. if (wsa_dev_cnt < wsa_max_devs) {
  5577. dev_dbg(&pdev->dev,
  5578. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5579. __func__, wsa_max_devs, wsa_dev_cnt);
  5580. wsa_max_devs = wsa_dev_cnt;
  5581. }
  5582. /* Make sure prefix string passed for each WSA device */
  5583. ret = of_property_count_strings(pdev->dev.of_node,
  5584. "qcom,wsa-aux-dev-prefix");
  5585. if (ret != wsa_dev_cnt) {
  5586. dev_err(&pdev->dev,
  5587. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5588. __func__, wsa_dev_cnt, ret);
  5589. ret = -EINVAL;
  5590. goto err;
  5591. }
  5592. /*
  5593. * Alloc mem to store phandle and index info of WSA device, if already
  5594. * registered with ALSA core
  5595. */
  5596. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5597. sizeof(struct msm_wsa881x_dev_info),
  5598. GFP_KERNEL);
  5599. if (!wsa881x_dev_info) {
  5600. ret = -ENOMEM;
  5601. goto err;
  5602. }
  5603. /*
  5604. * search and check whether all WSA devices are already
  5605. * registered with ALSA core or not. If found a node, store
  5606. * the node and the index in a local array of struct for later
  5607. * use.
  5608. */
  5609. for (i = 0; i < wsa_dev_cnt; i++) {
  5610. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5611. "qcom,wsa-devs", i);
  5612. if (unlikely(!wsa_of_node)) {
  5613. /* we should not be here */
  5614. dev_err(&pdev->dev,
  5615. "%s: wsa dev node is not present\n",
  5616. __func__);
  5617. ret = -EINVAL;
  5618. goto err_free_dev_info;
  5619. }
  5620. if (soc_find_component(wsa_of_node, NULL)) {
  5621. /* WSA device registered with ALSA core */
  5622. wsa881x_dev_info[found].of_node = wsa_of_node;
  5623. wsa881x_dev_info[found].index = i;
  5624. found++;
  5625. if (found == wsa_max_devs)
  5626. break;
  5627. }
  5628. }
  5629. if (found < wsa_max_devs) {
  5630. dev_dbg(&pdev->dev,
  5631. "%s: failed to find %d components. Found only %d\n",
  5632. __func__, wsa_max_devs, found);
  5633. return -EPROBE_DEFER;
  5634. }
  5635. dev_info(&pdev->dev,
  5636. "%s: found %d wsa881x devices registered with ALSA core\n",
  5637. __func__, found);
  5638. card->num_aux_devs = wsa_max_devs;
  5639. card->num_configs = wsa_max_devs;
  5640. /* Alloc array of AUX devs struct */
  5641. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5642. sizeof(struct snd_soc_aux_dev),
  5643. GFP_KERNEL);
  5644. if (!msm_aux_dev) {
  5645. ret = -ENOMEM;
  5646. goto err_free_dev_info;
  5647. }
  5648. /* Alloc array of codec conf struct */
  5649. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5650. sizeof(struct snd_soc_codec_conf),
  5651. GFP_KERNEL);
  5652. if (!msm_codec_conf) {
  5653. ret = -ENOMEM;
  5654. goto err_free_aux_dev;
  5655. }
  5656. for (i = 0; i < card->num_aux_devs; i++) {
  5657. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5658. GFP_KERNEL);
  5659. if (!dev_name_str) {
  5660. ret = -ENOMEM;
  5661. goto err_free_cdc_conf;
  5662. }
  5663. ret = of_property_read_string_index(pdev->dev.of_node,
  5664. "qcom,wsa-aux-dev-prefix",
  5665. wsa881x_dev_info[i].index,
  5666. wsa_auxdev_name_prefix);
  5667. if (ret) {
  5668. dev_err(&pdev->dev,
  5669. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5670. __func__, ret);
  5671. ret = -EINVAL;
  5672. goto err_free_dev_name_str;
  5673. }
  5674. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5675. msm_aux_dev[i].name = dev_name_str;
  5676. msm_aux_dev[i].codec_name = NULL;
  5677. msm_aux_dev[i].codec_of_node =
  5678. wsa881x_dev_info[i].of_node;
  5679. msm_aux_dev[i].init = msm_wsa881x_init;
  5680. msm_codec_conf[i].dev_name = NULL;
  5681. msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
  5682. msm_codec_conf[i].of_node =
  5683. wsa881x_dev_info[i].of_node;
  5684. }
  5685. card->codec_conf = msm_codec_conf;
  5686. card->aux_dev = msm_aux_dev;
  5687. return 0;
  5688. err_free_dev_name_str:
  5689. devm_kfree(&pdev->dev, dev_name_str);
  5690. err_free_cdc_conf:
  5691. devm_kfree(&pdev->dev, msm_codec_conf);
  5692. err_free_aux_dev:
  5693. devm_kfree(&pdev->dev, msm_aux_dev);
  5694. err_free_dev_info:
  5695. devm_kfree(&pdev->dev, wsa881x_dev_info);
  5696. err:
  5697. return ret;
  5698. }
  5699. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5700. {
  5701. int count;
  5702. u32 mi2s_master_slave[MI2S_MAX];
  5703. int ret;
  5704. for (count = 0; count < MI2S_MAX; count++) {
  5705. mutex_init(&mi2s_intf_conf[count].lock);
  5706. mi2s_intf_conf[count].ref_cnt = 0;
  5707. }
  5708. ret = of_property_read_u32_array(pdev->dev.of_node,
  5709. "qcom,msm-mi2s-master",
  5710. mi2s_master_slave, MI2S_MAX);
  5711. if (ret) {
  5712. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5713. __func__);
  5714. } else {
  5715. for (count = 0; count < MI2S_MAX; count++) {
  5716. mi2s_intf_conf[count].msm_is_mi2s_master =
  5717. mi2s_master_slave[count];
  5718. }
  5719. }
  5720. }
  5721. static void msm_i2s_auxpcm_deinit(void)
  5722. {
  5723. int count;
  5724. for (count = 0; count < MI2S_MAX; count++) {
  5725. mutex_destroy(&mi2s_intf_conf[count].lock);
  5726. mi2s_intf_conf[count].ref_cnt = 0;
  5727. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5728. }
  5729. }
  5730. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5731. {
  5732. struct snd_soc_card *card;
  5733. struct msm_asoc_mach_data *pdata;
  5734. const struct of_device_id *match;
  5735. int ret;
  5736. if (!pdev->dev.of_node) {
  5737. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  5738. return -EINVAL;
  5739. }
  5740. pdata = devm_kzalloc(&pdev->dev,
  5741. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  5742. if (!pdata)
  5743. return -ENOMEM;
  5744. card = populate_snd_card_dailinks(&pdev->dev);
  5745. if (!card) {
  5746. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  5747. ret = -EINVAL;
  5748. goto err;
  5749. }
  5750. card->dev = &pdev->dev;
  5751. platform_set_drvdata(pdev, card);
  5752. snd_soc_card_set_drvdata(card, pdata);
  5753. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  5754. if (ret) {
  5755. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  5756. ret);
  5757. goto err;
  5758. }
  5759. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  5760. if (ret) {
  5761. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  5762. ret);
  5763. goto err;
  5764. }
  5765. ret = msm_populate_dai_link_component_of_node(card);
  5766. if (ret) {
  5767. ret = -EPROBE_DEFER;
  5768. goto err;
  5769. }
  5770. ret = msm_init_wsa_dev(pdev, card);
  5771. if (ret)
  5772. goto err;
  5773. ret = devm_snd_soc_register_card(&pdev->dev, card);
  5774. if (ret == -EPROBE_DEFER) {
  5775. if (codec_reg_done)
  5776. ret = -EINVAL;
  5777. goto err;
  5778. } else if (ret) {
  5779. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  5780. ret);
  5781. goto err;
  5782. }
  5783. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  5784. spdev = pdev;
  5785. /* Parse pinctrl info from devicetree */
  5786. ret = msm_get_pinctrl(pdev);
  5787. if (!ret) {
  5788. pr_debug("%s: pinctrl parsing successful\n", __func__);
  5789. } else {
  5790. dev_dbg(&pdev->dev,
  5791. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  5792. __func__, ret);
  5793. ret = 0;
  5794. }
  5795. msm_i2s_auxpcm_init(pdev);
  5796. is_initial_boot = true;
  5797. ret = audio_notifier_register("sdm855", AUDIO_NOTIFIER_ADSP_DOMAIN,
  5798. &service_nb);
  5799. if (ret < 0)
  5800. pr_err("%s: Audio notifier register failed ret = %d\n",
  5801. __func__, ret);
  5802. return 0;
  5803. err:
  5804. msm_release_pinctrl(pdev);
  5805. devm_kfree(&pdev->dev, pdata);
  5806. return ret;
  5807. }
  5808. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5809. {
  5810. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5811. audio_notifier_deregister("sdm855");
  5812. msm_i2s_auxpcm_deinit();
  5813. msm_release_pinctrl(pdev);
  5814. return 0;
  5815. }
  5816. static struct platform_driver sdm855_asoc_machine_driver = {
  5817. .driver = {
  5818. .name = DRV_NAME,
  5819. .owner = THIS_MODULE,
  5820. .pm = &snd_soc_pm_ops,
  5821. .of_match_table = sdm855_asoc_machine_of_match,
  5822. },
  5823. .probe = msm_asoc_machine_probe,
  5824. .remove = msm_asoc_machine_remove,
  5825. };
  5826. module_platform_driver(sdm855_asoc_machine_driver);
  5827. MODULE_DESCRIPTION("ALSA SoC msm");
  5828. MODULE_LICENSE("GPL v2");
  5829. MODULE_ALIAS("platform:" DRV_NAME);
  5830. MODULE_DEVICE_TABLE(of, sdm855_asoc_machine_of_match);