hfi.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/io.h>
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/random.h>
  9. #include <asm/errno.h>
  10. #include <linux/timer.h>
  11. #include <media/cam_icp.h>
  12. #include <linux/iopoll.h>
  13. #include "cam_io_util.h"
  14. #include "hfi_reg.h"
  15. #include "hfi_sys_defs.h"
  16. #include "hfi_session_defs.h"
  17. #include "hfi_intf.h"
  18. #include "cam_icp_hw_mgr_intf.h"
  19. #include "cam_debug_util.h"
  20. #define HFI_VERSION_INFO_MAJOR_VAL 1
  21. #define HFI_VERSION_INFO_MINOR_VAL 1
  22. #define HFI_VERSION_INFO_STEP_VAL 0
  23. #define HFI_VERSION_INFO_STEP_VAL 0
  24. #define HFI_VERSION_INFO_MAJOR_BMSK 0xFF000000
  25. #define HFI_VERSION_INFO_MAJOR_SHFT 24
  26. #define HFI_VERSION_INFO_MINOR_BMSK 0xFFFF00
  27. #define HFI_VERSION_INFO_MINOR_SHFT 8
  28. #define HFI_VERSION_INFO_STEP_BMSK 0xFF
  29. #define HFI_VERSION_INFO_STEP_SHFT 0
  30. #define HFI_POLL_DELAY_US 100
  31. #define HFI_POLL_TIMEOUT_US 10000
  32. static struct hfi_info *g_hfi;
  33. unsigned int g_icp_mmu_hdl;
  34. static DEFINE_MUTEX(hfi_cmd_q_mutex);
  35. static DEFINE_MUTEX(hfi_msg_q_mutex);
  36. static void hfi_irq_raise(struct hfi_info *hfi)
  37. {
  38. if (hfi->ops.irq_raise)
  39. hfi->ops.irq_raise(hfi->priv);
  40. }
  41. static void hfi_irq_enable(struct hfi_info *hfi)
  42. {
  43. if (hfi->ops.irq_enable)
  44. hfi->ops.irq_enable(hfi->priv);
  45. }
  46. static void __iomem *hfi_iface_addr(struct hfi_info *hfi)
  47. {
  48. void __iomem *ret = NULL;
  49. if (hfi->ops.iface_addr)
  50. ret = hfi->ops.iface_addr(hfi->priv);
  51. return IS_ERR_OR_NULL(ret) ? NULL : ret;
  52. }
  53. static void hfi_queue_dump(uint32_t *dwords, int count)
  54. {
  55. int i;
  56. int rows;
  57. int remaining;
  58. rows = count / 4;
  59. remaining = count % 4;
  60. for (i = 0; i < rows; i++, dwords += 4)
  61. CAM_DBG(CAM_HFI,
  62. "word[%04d]: 0x%08x 0x%08x 0x%08x 0x%08x",
  63. i * 4, dwords[0], dwords[1], dwords[2], dwords[3]);
  64. if (remaining == 1)
  65. CAM_DBG(CAM_HFI, "word[%04d]: 0x%08x", rows * 4, dwords[0]);
  66. else if (remaining == 2)
  67. CAM_DBG(CAM_HFI, "word[%04d]: 0x%08x 0x%08x",
  68. rows * 4, dwords[0], dwords[1]);
  69. else if (remaining == 3)
  70. CAM_DBG(CAM_HFI, "word[%04d]: 0x%08x 0x%08x 0x%08x",
  71. rows * 4, dwords[0], dwords[1], dwords[2]);
  72. }
  73. void cam_hfi_queue_dump(void)
  74. {
  75. struct hfi_mem_info *hfi_mem = &g_hfi->map;
  76. struct hfi_qtbl *qtbl;
  77. struct hfi_q_hdr *q_hdr;
  78. uint32_t *dwords;
  79. int num_dwords;
  80. if (!hfi_mem) {
  81. CAM_ERR(CAM_HFI, "hfi mem info NULL... unable to dump queues");
  82. return;
  83. }
  84. qtbl = (struct hfi_qtbl *)hfi_mem->qtbl.kva;
  85. CAM_DBG(CAM_HFI,
  86. "qtbl header: version=0x%08x tbl_size=%u numq=%u qhdr_size=%u",
  87. qtbl->q_tbl_hdr.qtbl_version,
  88. qtbl->q_tbl_hdr.qtbl_size,
  89. qtbl->q_tbl_hdr.qtbl_num_q,
  90. qtbl->q_tbl_hdr.qtbl_qhdr_size);
  91. q_hdr = &qtbl->q_hdr[Q_CMD];
  92. CAM_DBG(CAM_HFI,
  93. "cmd_q: addr=0x%08x size=%u read_idx=%u write_idx=%u",
  94. hfi_mem->cmd_q.iova,
  95. q_hdr->qhdr_q_size,
  96. q_hdr->qhdr_read_idx,
  97. q_hdr->qhdr_write_idx);
  98. dwords = (uint32_t *)hfi_mem->cmd_q.kva;
  99. num_dwords = ICP_CMD_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  100. hfi_queue_dump(dwords, num_dwords);
  101. q_hdr = &qtbl->q_hdr[Q_MSG];
  102. CAM_DBG(CAM_HFI,
  103. "msg_q: addr=0x%08x size=%u read_idx=%u write_idx=%u",
  104. hfi_mem->msg_q.iova,
  105. q_hdr->qhdr_q_size,
  106. q_hdr->qhdr_read_idx,
  107. q_hdr->qhdr_write_idx);
  108. dwords = (uint32_t *)hfi_mem->msg_q.kva;
  109. num_dwords = ICP_MSG_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  110. hfi_queue_dump(dwords, num_dwords);
  111. }
  112. int hfi_write_cmd(void *cmd_ptr)
  113. {
  114. uint32_t size_in_words, empty_space, new_write_idx, read_idx, temp;
  115. uint32_t *write_q, *write_ptr;
  116. struct hfi_qtbl *q_tbl;
  117. struct hfi_q_hdr *q;
  118. int rc = 0;
  119. if (!cmd_ptr) {
  120. CAM_ERR(CAM_HFI, "command is null");
  121. return -EINVAL;
  122. }
  123. mutex_lock(&hfi_cmd_q_mutex);
  124. if (!g_hfi) {
  125. CAM_ERR(CAM_HFI, "HFI interface not setup");
  126. rc = -ENODEV;
  127. goto err;
  128. }
  129. if (g_hfi->hfi_state != HFI_READY ||
  130. !g_hfi->cmd_q_state) {
  131. CAM_ERR(CAM_HFI, "HFI state: %u, cmd q state: %u",
  132. g_hfi->hfi_state, g_hfi->cmd_q_state);
  133. rc = -ENODEV;
  134. goto err;
  135. }
  136. q_tbl = (struct hfi_qtbl *)g_hfi->map.qtbl.kva;
  137. q = &q_tbl->q_hdr[Q_CMD];
  138. write_q = (uint32_t *)g_hfi->map.cmd_q.kva;
  139. size_in_words = (*(uint32_t *)cmd_ptr) >> BYTE_WORD_SHIFT;
  140. if (!size_in_words) {
  141. CAM_DBG(CAM_HFI, "failed");
  142. rc = -EINVAL;
  143. goto err;
  144. }
  145. read_idx = q->qhdr_read_idx;
  146. empty_space = (q->qhdr_write_idx >= read_idx) ?
  147. (q->qhdr_q_size - (q->qhdr_write_idx - read_idx)) :
  148. (read_idx - q->qhdr_write_idx);
  149. if (empty_space <= size_in_words) {
  150. CAM_ERR(CAM_HFI, "failed: empty space %u, size_in_words %u",
  151. empty_space, size_in_words);
  152. rc = -EIO;
  153. goto err;
  154. }
  155. new_write_idx = q->qhdr_write_idx + size_in_words;
  156. write_ptr = (uint32_t *)(write_q + q->qhdr_write_idx);
  157. if (new_write_idx < q->qhdr_q_size) {
  158. memcpy(write_ptr, (uint8_t *)cmd_ptr,
  159. size_in_words << BYTE_WORD_SHIFT);
  160. } else {
  161. new_write_idx -= q->qhdr_q_size;
  162. temp = (size_in_words - new_write_idx) << BYTE_WORD_SHIFT;
  163. memcpy(write_ptr, (uint8_t *)cmd_ptr, temp);
  164. memcpy(write_q, (uint8_t *)cmd_ptr + temp,
  165. new_write_idx << BYTE_WORD_SHIFT);
  166. }
  167. /*
  168. * To make sure command data in a command queue before
  169. * updating write index
  170. */
  171. wmb();
  172. q->qhdr_write_idx = new_write_idx;
  173. /*
  174. * Before raising interrupt make sure command data is ready for
  175. * firmware to process
  176. */
  177. wmb();
  178. hfi_irq_raise(g_hfi);
  179. err:
  180. mutex_unlock(&hfi_cmd_q_mutex);
  181. return rc;
  182. }
  183. int hfi_read_message(uint32_t *pmsg, uint8_t q_id,
  184. uint32_t *words_read)
  185. {
  186. struct hfi_qtbl *q_tbl_ptr;
  187. struct hfi_q_hdr *q;
  188. uint32_t new_read_idx, size_in_words, word_diff, temp;
  189. uint32_t *read_q, *read_ptr, *write_ptr;
  190. uint32_t size_upper_bound = 0;
  191. int rc = 0;
  192. if (!pmsg) {
  193. CAM_ERR(CAM_HFI, "Invalid msg");
  194. return -EINVAL;
  195. }
  196. if (q_id > Q_DBG) {
  197. CAM_ERR(CAM_HFI, "Invalid q :%u", q_id);
  198. return -EINVAL;
  199. }
  200. mutex_lock(&hfi_msg_q_mutex);
  201. if (!g_hfi) {
  202. CAM_ERR(CAM_HFI, "hfi not set up yet");
  203. rc = -ENODEV;
  204. goto err;
  205. }
  206. if ((g_hfi->hfi_state != HFI_READY) ||
  207. !g_hfi->msg_q_state) {
  208. CAM_ERR(CAM_HFI, "hfi state: %u, msg q state: %u",
  209. g_hfi->hfi_state, g_hfi->msg_q_state);
  210. rc = -ENODEV;
  211. goto err;
  212. }
  213. q_tbl_ptr = (struct hfi_qtbl *)g_hfi->map.qtbl.kva;
  214. q = &q_tbl_ptr->q_hdr[q_id];
  215. if (q->qhdr_read_idx == q->qhdr_write_idx) {
  216. CAM_DBG(CAM_HFI, "Q not ready, state:%u, r idx:%u, w idx:%u",
  217. g_hfi->hfi_state, q->qhdr_read_idx, q->qhdr_write_idx);
  218. rc = -EIO;
  219. goto err;
  220. }
  221. if (q_id == Q_MSG) {
  222. read_q = (uint32_t *)g_hfi->map.msg_q.kva;
  223. size_upper_bound = ICP_HFI_MAX_PKT_SIZE_MSGQ_IN_WORDS;
  224. } else {
  225. read_q = (uint32_t *)g_hfi->map.dbg_q.kva;
  226. size_upper_bound = ICP_HFI_MAX_PKT_SIZE_IN_WORDS;
  227. }
  228. read_ptr = (uint32_t *)(read_q + q->qhdr_read_idx);
  229. write_ptr = (uint32_t *)(read_q + q->qhdr_write_idx);
  230. if (write_ptr > read_ptr)
  231. size_in_words = write_ptr - read_ptr;
  232. else {
  233. word_diff = read_ptr - write_ptr;
  234. if (q_id == Q_MSG)
  235. size_in_words = (ICP_MSG_Q_SIZE_IN_BYTES >>
  236. BYTE_WORD_SHIFT) - word_diff;
  237. else
  238. size_in_words = (ICP_DBG_Q_SIZE_IN_BYTES >>
  239. BYTE_WORD_SHIFT) - word_diff;
  240. }
  241. if ((size_in_words == 0) ||
  242. (size_in_words > size_upper_bound)) {
  243. CAM_ERR(CAM_HFI, "invalid HFI message packet size - 0x%08x",
  244. size_in_words << BYTE_WORD_SHIFT);
  245. q->qhdr_read_idx = q->qhdr_write_idx;
  246. rc = -EIO;
  247. goto err;
  248. }
  249. new_read_idx = q->qhdr_read_idx + size_in_words;
  250. if (new_read_idx < q->qhdr_q_size) {
  251. memcpy(pmsg, read_ptr, size_in_words << BYTE_WORD_SHIFT);
  252. } else {
  253. new_read_idx -= q->qhdr_q_size;
  254. temp = (size_in_words - new_read_idx) << BYTE_WORD_SHIFT;
  255. memcpy(pmsg, read_ptr, temp);
  256. memcpy((uint8_t *)pmsg + temp, read_q,
  257. new_read_idx << BYTE_WORD_SHIFT);
  258. }
  259. q->qhdr_read_idx = new_read_idx;
  260. *words_read = size_in_words;
  261. /* Memory Barrier to make sure message
  262. * queue parameters are updated after read
  263. */
  264. wmb();
  265. err:
  266. mutex_unlock(&hfi_msg_q_mutex);
  267. return rc;
  268. }
  269. int hfi_cmd_ubwc_config(uint32_t *ubwc_cfg)
  270. {
  271. uint8_t *prop;
  272. struct hfi_cmd_prop *dbg_prop;
  273. uint32_t size = 0;
  274. size = sizeof(struct hfi_cmd_prop) +
  275. sizeof(struct hfi_cmd_ubwc_cfg);
  276. CAM_DBG(CAM_HFI,
  277. "size of ubwc %u, ubwc_cfg [rd-0x%x,wr-0x%x]",
  278. size, ubwc_cfg[0], ubwc_cfg[1]);
  279. prop = kzalloc(size, GFP_KERNEL);
  280. if (!prop)
  281. return -ENOMEM;
  282. dbg_prop = (struct hfi_cmd_prop *)prop;
  283. dbg_prop->size = size;
  284. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  285. dbg_prop->num_prop = 1;
  286. dbg_prop->prop_data[0] = HFI_PROP_SYS_UBWC_CFG;
  287. dbg_prop->prop_data[1] = ubwc_cfg[0];
  288. dbg_prop->prop_data[2] = ubwc_cfg[1];
  289. hfi_write_cmd(prop);
  290. kfree(prop);
  291. return 0;
  292. }
  293. int hfi_cmd_ubwc_config_ext(uint32_t *ubwc_ipe_cfg,
  294. uint32_t *ubwc_bps_cfg)
  295. {
  296. uint8_t *prop;
  297. struct hfi_cmd_prop *dbg_prop;
  298. uint32_t size = 0;
  299. size = sizeof(struct hfi_cmd_prop) +
  300. sizeof(struct hfi_cmd_ubwc_cfg_ext);
  301. CAM_DBG(CAM_HFI,
  302. "size of ubwc %u, ubwc_ipe_cfg[rd-0x%x,wr-0x%x] ubwc_bps_cfg[rd-0x%x,wr-0x%x]",
  303. size, ubwc_ipe_cfg[0], ubwc_ipe_cfg[1],
  304. ubwc_bps_cfg[0], ubwc_bps_cfg[1]);
  305. prop = kzalloc(size, GFP_KERNEL);
  306. if (!prop)
  307. return -ENOMEM;
  308. dbg_prop = (struct hfi_cmd_prop *)prop;
  309. dbg_prop->size = size;
  310. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  311. dbg_prop->num_prop = 1;
  312. dbg_prop->prop_data[0] = HFI_PROPERTY_SYS_UBWC_CONFIG_EX;
  313. dbg_prop->prop_data[1] = ubwc_bps_cfg[0];
  314. dbg_prop->prop_data[2] = ubwc_bps_cfg[1];
  315. dbg_prop->prop_data[3] = ubwc_ipe_cfg[0];
  316. dbg_prop->prop_data[4] = ubwc_ipe_cfg[1];
  317. hfi_write_cmd(prop);
  318. kfree(prop);
  319. return 0;
  320. }
  321. int hfi_enable_ipe_bps_pc(bool enable, uint32_t core_info)
  322. {
  323. uint8_t *prop;
  324. struct hfi_cmd_prop *dbg_prop;
  325. uint32_t size = 0;
  326. size = sizeof(struct hfi_cmd_prop) +
  327. sizeof(struct hfi_ipe_bps_pc);
  328. prop = kzalloc(size, GFP_KERNEL);
  329. if (!prop)
  330. return -ENOMEM;
  331. dbg_prop = (struct hfi_cmd_prop *)prop;
  332. dbg_prop->size = size;
  333. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  334. dbg_prop->num_prop = 1;
  335. dbg_prop->prop_data[0] = HFI_PROP_SYS_IPEBPS_PC;
  336. dbg_prop->prop_data[1] = enable;
  337. dbg_prop->prop_data[2] = core_info;
  338. hfi_write_cmd(prop);
  339. kfree(prop);
  340. return 0;
  341. }
  342. int hfi_set_debug_level(u64 icp_dbg_type, uint32_t lvl)
  343. {
  344. uint8_t *prop;
  345. struct hfi_cmd_prop *dbg_prop;
  346. uint32_t size = 0, val;
  347. val = HFI_DEBUG_MSG_LOW |
  348. HFI_DEBUG_MSG_MEDIUM |
  349. HFI_DEBUG_MSG_HIGH |
  350. HFI_DEBUG_MSG_ERROR |
  351. HFI_DEBUG_MSG_FATAL |
  352. HFI_DEBUG_MSG_PERF |
  353. HFI_DEBUG_CFG_WFI |
  354. HFI_DEBUG_CFG_ARM9WD;
  355. if (lvl > val)
  356. return -EINVAL;
  357. size = sizeof(struct hfi_cmd_prop) +
  358. sizeof(struct hfi_debug);
  359. prop = kzalloc(size, GFP_KERNEL);
  360. if (!prop)
  361. return -ENOMEM;
  362. dbg_prop = (struct hfi_cmd_prop *)prop;
  363. dbg_prop->size = size;
  364. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  365. dbg_prop->num_prop = 1;
  366. dbg_prop->prop_data[0] = HFI_PROP_SYS_DEBUG_CFG;
  367. dbg_prop->prop_data[1] = lvl;
  368. dbg_prop->prop_data[2] = icp_dbg_type;
  369. hfi_write_cmd(prop);
  370. kfree(prop);
  371. return 0;
  372. }
  373. int hfi_set_fw_dump_level(uint32_t lvl)
  374. {
  375. uint8_t *prop = NULL;
  376. struct hfi_cmd_prop *fw_dump_level_switch_prop = NULL;
  377. uint32_t size = 0;
  378. CAM_DBG(CAM_HFI, "fw dump ENTER");
  379. size = sizeof(struct hfi_cmd_prop) + sizeof(lvl);
  380. prop = kzalloc(size, GFP_KERNEL);
  381. if (!prop)
  382. return -ENOMEM;
  383. fw_dump_level_switch_prop = (struct hfi_cmd_prop *)prop;
  384. fw_dump_level_switch_prop->size = size;
  385. fw_dump_level_switch_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  386. fw_dump_level_switch_prop->num_prop = 1;
  387. fw_dump_level_switch_prop->prop_data[0] = HFI_PROP_SYS_FW_DUMP_CFG;
  388. fw_dump_level_switch_prop->prop_data[1] = lvl;
  389. CAM_DBG(CAM_HFI, "prop->size = %d\n"
  390. "prop->pkt_type = %d\n"
  391. "prop->num_prop = %d\n"
  392. "prop->prop_data[0] = %d\n"
  393. "prop->prop_data[1] = %d\n",
  394. fw_dump_level_switch_prop->size,
  395. fw_dump_level_switch_prop->pkt_type,
  396. fw_dump_level_switch_prop->num_prop,
  397. fw_dump_level_switch_prop->prop_data[0],
  398. fw_dump_level_switch_prop->prop_data[1]);
  399. hfi_write_cmd(prop);
  400. kfree(prop);
  401. return 0;
  402. }
  403. void hfi_send_system_cmd(uint32_t type, uint64_t data, uint32_t size)
  404. {
  405. switch (type) {
  406. case HFI_CMD_SYS_INIT: {
  407. struct hfi_cmd_sys_init init;
  408. memset(&init, 0, sizeof(init));
  409. init.size = sizeof(struct hfi_cmd_sys_init);
  410. init.pkt_type = type;
  411. hfi_write_cmd(&init);
  412. }
  413. break;
  414. case HFI_CMD_SYS_PC_PREP: {
  415. struct hfi_cmd_pc_prep prep;
  416. prep.size = sizeof(struct hfi_cmd_pc_prep);
  417. prep.pkt_type = type;
  418. hfi_write_cmd(&prep);
  419. }
  420. break;
  421. case HFI_CMD_SYS_SET_PROPERTY: {
  422. struct hfi_cmd_prop prop;
  423. if ((uint32_t)data == (uint32_t)HFI_PROP_SYS_DEBUG_CFG) {
  424. prop.size = sizeof(struct hfi_cmd_prop);
  425. prop.pkt_type = type;
  426. prop.num_prop = 1;
  427. prop.prop_data[0] = HFI_PROP_SYS_DEBUG_CFG;
  428. hfi_write_cmd(&prop);
  429. }
  430. }
  431. break;
  432. case HFI_CMD_SYS_GET_PROPERTY:
  433. break;
  434. case HFI_CMD_SYS_PING: {
  435. struct hfi_cmd_ping_pkt ping;
  436. ping.size = sizeof(struct hfi_cmd_ping_pkt);
  437. ping.pkt_type = type;
  438. ping.user_data = (uint64_t)data;
  439. hfi_write_cmd(&ping);
  440. }
  441. break;
  442. case HFI_CMD_SYS_RESET: {
  443. struct hfi_cmd_sys_reset_pkt reset;
  444. reset.size = sizeof(struct hfi_cmd_sys_reset_pkt);
  445. reset.pkt_type = type;
  446. reset.user_data = (uint64_t)data;
  447. hfi_write_cmd(&reset);
  448. }
  449. break;
  450. case HFI_CMD_IPEBPS_CREATE_HANDLE: {
  451. struct hfi_cmd_create_handle handle;
  452. handle.size = sizeof(struct hfi_cmd_create_handle);
  453. handle.pkt_type = type;
  454. handle.handle_type = (uint32_t)data;
  455. handle.user_data1 = 0;
  456. hfi_write_cmd(&handle);
  457. }
  458. break;
  459. case HFI_CMD_IPEBPS_ASYNC_COMMAND_INDIRECT:
  460. break;
  461. default:
  462. CAM_ERR(CAM_HFI, "command not supported :%d", type);
  463. break;
  464. }
  465. }
  466. int hfi_get_hw_caps(void *query_buf)
  467. {
  468. int i = 0;
  469. struct cam_icp_query_cap_cmd *query_cmd = NULL;
  470. if (!query_buf) {
  471. CAM_ERR(CAM_HFI, "query buf is NULL");
  472. return -EINVAL;
  473. }
  474. query_cmd = (struct cam_icp_query_cap_cmd *)query_buf;
  475. query_cmd->fw_version.major = 0x12;
  476. query_cmd->fw_version.minor = 0x12;
  477. query_cmd->fw_version.revision = 0x12;
  478. query_cmd->api_version.major = 0x13;
  479. query_cmd->api_version.minor = 0x13;
  480. query_cmd->api_version.revision = 0x13;
  481. query_cmd->num_ipe = 2;
  482. query_cmd->num_bps = 1;
  483. for (i = 0; i < CAM_ICP_DEV_TYPE_MAX; i++) {
  484. query_cmd->dev_ver[i].dev_type = i;
  485. query_cmd->dev_ver[i].hw_ver.major = 0x34 + i;
  486. query_cmd->dev_ver[i].hw_ver.minor = 0x34 + i;
  487. query_cmd->dev_ver[i].hw_ver.incr = 0x34 + i;
  488. }
  489. return 0;
  490. }
  491. int cam_hfi_resume(struct hfi_mem_info *hfi_mem)
  492. {
  493. int rc = 0;
  494. uint32_t fw_version, status = 0;
  495. void __iomem *icp_base = hfi_iface_addr(g_hfi);
  496. if (!icp_base) {
  497. CAM_ERR(CAM_HFI, "invalid HFI interface address");
  498. return -EINVAL;
  499. }
  500. if (readl_poll_timeout(icp_base + HFI_REG_ICP_HOST_INIT_RESPONSE,
  501. status, status == ICP_INIT_RESP_SUCCESS,
  502. HFI_POLL_DELAY_US, HFI_POLL_TIMEOUT_US)) {
  503. CAM_ERR(CAM_HFI, "response poll timed out: status=0x%08x",
  504. status);
  505. return -ETIMEDOUT;
  506. }
  507. hfi_irq_enable(g_hfi);
  508. fw_version = cam_io_r(icp_base + HFI_REG_FW_VERSION);
  509. CAM_DBG(CAM_HFI, "fw version : [%x]", fw_version);
  510. cam_io_w_mb((uint32_t)hfi_mem->qtbl.iova, icp_base + HFI_REG_QTBL_PTR);
  511. cam_io_w_mb((uint32_t)hfi_mem->sfr_buf.iova,
  512. icp_base + HFI_REG_SFR_PTR);
  513. cam_io_w_mb((uint32_t)hfi_mem->shmem.iova,
  514. icp_base + HFI_REG_SHARED_MEM_PTR);
  515. cam_io_w_mb((uint32_t)hfi_mem->shmem.len,
  516. icp_base + HFI_REG_SHARED_MEM_SIZE);
  517. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.iova,
  518. icp_base + HFI_REG_UNCACHED_HEAP_PTR);
  519. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.len,
  520. icp_base + HFI_REG_UNCACHED_HEAP_SIZE);
  521. cam_io_w_mb((uint32_t)hfi_mem->qdss.iova,
  522. icp_base + HFI_REG_QDSS_IOVA);
  523. cam_io_w_mb((uint32_t)hfi_mem->qdss.len,
  524. icp_base + HFI_REG_QDSS_IOVA_SIZE);
  525. cam_io_w_mb((uint32_t)hfi_mem->io_mem.iova,
  526. icp_base + HFI_REG_IO_REGION_IOVA);
  527. cam_io_w_mb((uint32_t)hfi_mem->io_mem.len,
  528. icp_base + HFI_REG_IO_REGION_SIZE);
  529. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.iova,
  530. icp_base + HFI_REG_IO2_REGION_IOVA);
  531. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.len,
  532. icp_base + HFI_REG_IO2_REGION_SIZE);
  533. CAM_INFO(CAM_HFI, "Resume IO1 : [0x%x 0x%x] IO2 [0x%x 0x%x]",
  534. hfi_mem->io_mem.iova, hfi_mem->io_mem.len,
  535. hfi_mem->io_mem2.iova, hfi_mem->io_mem2.len);
  536. return rc;
  537. }
  538. int cam_hfi_init(struct hfi_mem_info *hfi_mem, const struct hfi_ops *hfi_ops,
  539. void *priv, uint8_t event_driven_mode)
  540. {
  541. int rc = 0;
  542. uint32_t status = 0;
  543. struct hfi_qtbl *qtbl;
  544. struct hfi_qtbl_hdr *qtbl_hdr;
  545. struct hfi_q_hdr *cmd_q_hdr, *msg_q_hdr, *dbg_q_hdr;
  546. struct sfr_buf *sfr_buffer;
  547. void __iomem *icp_base;
  548. if (!hfi_mem || !hfi_ops || !priv) {
  549. CAM_ERR(CAM_HFI,
  550. "invalid arg: hfi_mem=%pK hfi_ops=%pK priv=%pK",
  551. hfi_mem, hfi_ops, priv);
  552. return -EINVAL;
  553. }
  554. mutex_lock(&hfi_cmd_q_mutex);
  555. mutex_lock(&hfi_msg_q_mutex);
  556. if (!g_hfi) {
  557. g_hfi = kzalloc(sizeof(struct hfi_info), GFP_KERNEL);
  558. if (!g_hfi) {
  559. rc = -ENOMEM;
  560. goto alloc_fail;
  561. }
  562. }
  563. if (g_hfi->hfi_state != HFI_DEINIT) {
  564. CAM_ERR(CAM_HFI, "hfi_init: invalid state");
  565. rc = -EINVAL;
  566. goto regions_fail;
  567. }
  568. memcpy(&g_hfi->map, hfi_mem, sizeof(g_hfi->map));
  569. g_hfi->hfi_state = HFI_DEINIT;
  570. qtbl = (struct hfi_qtbl *)hfi_mem->qtbl.kva;
  571. qtbl_hdr = &qtbl->q_tbl_hdr;
  572. qtbl_hdr->qtbl_version = 0xFFFFFFFF;
  573. qtbl_hdr->qtbl_size = sizeof(struct hfi_qtbl);
  574. qtbl_hdr->qtbl_qhdr0_offset = sizeof(struct hfi_qtbl_hdr);
  575. qtbl_hdr->qtbl_qhdr_size = sizeof(struct hfi_q_hdr);
  576. qtbl_hdr->qtbl_num_q = ICP_HFI_NUMBER_OF_QS;
  577. qtbl_hdr->qtbl_num_active_q = ICP_HFI_NUMBER_OF_QS;
  578. /* setup host-to-firmware command queue */
  579. cmd_q_hdr = &qtbl->q_hdr[Q_CMD];
  580. cmd_q_hdr->qhdr_status = QHDR_ACTIVE;
  581. cmd_q_hdr->qhdr_start_addr = hfi_mem->cmd_q.iova;
  582. cmd_q_hdr->qhdr_q_size = ICP_CMD_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  583. cmd_q_hdr->qhdr_pkt_size = ICP_HFI_VAR_SIZE_PKT;
  584. cmd_q_hdr->qhdr_pkt_drop_cnt = RESET;
  585. cmd_q_hdr->qhdr_read_idx = RESET;
  586. cmd_q_hdr->qhdr_write_idx = RESET;
  587. /* setup firmware-to-Host message queue */
  588. msg_q_hdr = &qtbl->q_hdr[Q_MSG];
  589. msg_q_hdr->qhdr_status = QHDR_ACTIVE;
  590. msg_q_hdr->qhdr_start_addr = hfi_mem->msg_q.iova;
  591. msg_q_hdr->qhdr_q_size = ICP_MSG_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  592. msg_q_hdr->qhdr_pkt_size = ICP_HFI_VAR_SIZE_PKT;
  593. msg_q_hdr->qhdr_pkt_drop_cnt = RESET;
  594. msg_q_hdr->qhdr_read_idx = RESET;
  595. msg_q_hdr->qhdr_write_idx = RESET;
  596. /* setup firmware-to-Host message queue */
  597. dbg_q_hdr = &qtbl->q_hdr[Q_DBG];
  598. dbg_q_hdr->qhdr_status = QHDR_ACTIVE;
  599. dbg_q_hdr->qhdr_start_addr = hfi_mem->dbg_q.iova;
  600. dbg_q_hdr->qhdr_q_size = ICP_DBG_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  601. dbg_q_hdr->qhdr_pkt_size = ICP_HFI_VAR_SIZE_PKT;
  602. dbg_q_hdr->qhdr_pkt_drop_cnt = RESET;
  603. dbg_q_hdr->qhdr_read_idx = RESET;
  604. dbg_q_hdr->qhdr_write_idx = RESET;
  605. sfr_buffer = (struct sfr_buf *)hfi_mem->sfr_buf.kva;
  606. sfr_buffer->size = ICP_MSG_SFR_SIZE_IN_BYTES;
  607. switch (event_driven_mode) {
  608. case INTR_MODE:
  609. cmd_q_hdr->qhdr_type = Q_CMD;
  610. cmd_q_hdr->qhdr_rx_wm = SET;
  611. cmd_q_hdr->qhdr_tx_wm = SET;
  612. cmd_q_hdr->qhdr_rx_req = SET;
  613. cmd_q_hdr->qhdr_tx_req = RESET;
  614. cmd_q_hdr->qhdr_rx_irq_status = RESET;
  615. cmd_q_hdr->qhdr_tx_irq_status = RESET;
  616. msg_q_hdr->qhdr_type = Q_MSG;
  617. msg_q_hdr->qhdr_rx_wm = SET;
  618. msg_q_hdr->qhdr_tx_wm = SET;
  619. msg_q_hdr->qhdr_rx_req = SET;
  620. msg_q_hdr->qhdr_tx_req = RESET;
  621. msg_q_hdr->qhdr_rx_irq_status = RESET;
  622. msg_q_hdr->qhdr_tx_irq_status = RESET;
  623. dbg_q_hdr->qhdr_type = Q_DBG;
  624. dbg_q_hdr->qhdr_rx_wm = SET;
  625. dbg_q_hdr->qhdr_tx_wm = SET_WM;
  626. dbg_q_hdr->qhdr_rx_req = RESET;
  627. dbg_q_hdr->qhdr_tx_req = RESET;
  628. dbg_q_hdr->qhdr_rx_irq_status = RESET;
  629. dbg_q_hdr->qhdr_tx_irq_status = RESET;
  630. break;
  631. case POLL_MODE:
  632. cmd_q_hdr->qhdr_type = Q_CMD | TX_EVENT_POLL_MODE_2 |
  633. RX_EVENT_POLL_MODE_2;
  634. msg_q_hdr->qhdr_type = Q_MSG | TX_EVENT_POLL_MODE_2 |
  635. RX_EVENT_POLL_MODE_2;
  636. dbg_q_hdr->qhdr_type = Q_DBG | TX_EVENT_POLL_MODE_2 |
  637. RX_EVENT_POLL_MODE_2;
  638. break;
  639. case WM_MODE:
  640. cmd_q_hdr->qhdr_type = Q_CMD | TX_EVENT_DRIVEN_MODE_2 |
  641. RX_EVENT_DRIVEN_MODE_2;
  642. cmd_q_hdr->qhdr_rx_wm = SET;
  643. cmd_q_hdr->qhdr_tx_wm = SET;
  644. cmd_q_hdr->qhdr_rx_req = RESET;
  645. cmd_q_hdr->qhdr_tx_req = SET;
  646. cmd_q_hdr->qhdr_rx_irq_status = RESET;
  647. cmd_q_hdr->qhdr_tx_irq_status = RESET;
  648. msg_q_hdr->qhdr_type = Q_MSG | TX_EVENT_DRIVEN_MODE_2 |
  649. RX_EVENT_DRIVEN_MODE_2;
  650. msg_q_hdr->qhdr_rx_wm = SET;
  651. msg_q_hdr->qhdr_tx_wm = SET;
  652. msg_q_hdr->qhdr_rx_req = SET;
  653. msg_q_hdr->qhdr_tx_req = RESET;
  654. msg_q_hdr->qhdr_rx_irq_status = RESET;
  655. msg_q_hdr->qhdr_tx_irq_status = RESET;
  656. dbg_q_hdr->qhdr_type = Q_DBG | TX_EVENT_DRIVEN_MODE_2 |
  657. RX_EVENT_DRIVEN_MODE_2;
  658. dbg_q_hdr->qhdr_rx_wm = SET;
  659. dbg_q_hdr->qhdr_tx_wm = SET_WM;
  660. dbg_q_hdr->qhdr_rx_req = RESET;
  661. dbg_q_hdr->qhdr_tx_req = RESET;
  662. dbg_q_hdr->qhdr_rx_irq_status = RESET;
  663. dbg_q_hdr->qhdr_tx_irq_status = RESET;
  664. break;
  665. default:
  666. CAM_ERR(CAM_HFI, "Invalid event driven mode :%u",
  667. event_driven_mode);
  668. break;
  669. }
  670. g_hfi->ops = *hfi_ops;
  671. g_hfi->priv = priv;
  672. icp_base = hfi_iface_addr(g_hfi);
  673. if (!icp_base) {
  674. CAM_ERR(CAM_HFI, "invalid HFI interface address");
  675. rc = -EINVAL;
  676. goto regions_fail;
  677. }
  678. cam_io_w_mb((uint32_t)hfi_mem->qtbl.iova,
  679. icp_base + HFI_REG_QTBL_PTR);
  680. cam_io_w_mb((uint32_t)hfi_mem->sfr_buf.iova,
  681. icp_base + HFI_REG_SFR_PTR);
  682. cam_io_w_mb((uint32_t)hfi_mem->shmem.iova,
  683. icp_base + HFI_REG_SHARED_MEM_PTR);
  684. cam_io_w_mb((uint32_t)hfi_mem->shmem.len,
  685. icp_base + HFI_REG_SHARED_MEM_SIZE);
  686. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.iova,
  687. icp_base + HFI_REG_UNCACHED_HEAP_PTR);
  688. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.len,
  689. icp_base + HFI_REG_UNCACHED_HEAP_SIZE);
  690. cam_io_w_mb((uint32_t)ICP_INIT_REQUEST_SET,
  691. icp_base + HFI_REG_HOST_ICP_INIT_REQUEST);
  692. cam_io_w_mb((uint32_t)hfi_mem->qdss.iova,
  693. icp_base + HFI_REG_QDSS_IOVA);
  694. cam_io_w_mb((uint32_t)hfi_mem->qdss.len,
  695. icp_base + HFI_REG_QDSS_IOVA_SIZE);
  696. cam_io_w_mb((uint32_t)hfi_mem->io_mem.iova,
  697. icp_base + HFI_REG_IO_REGION_IOVA);
  698. cam_io_w_mb((uint32_t)hfi_mem->io_mem.len,
  699. icp_base + HFI_REG_IO_REGION_SIZE);
  700. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.iova,
  701. icp_base + HFI_REG_IO2_REGION_IOVA);
  702. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.len,
  703. icp_base + HFI_REG_IO2_REGION_SIZE);
  704. CAM_INFO(CAM_HFI, "Init IO1 : [0x%x 0x%x] IO2 [0x%x 0x%x]",
  705. hfi_mem->io_mem.iova, hfi_mem->io_mem.len,
  706. hfi_mem->io_mem2.iova, hfi_mem->io_mem2.len);
  707. if (readl_poll_timeout(icp_base + HFI_REG_ICP_HOST_INIT_RESPONSE,
  708. status, status == ICP_INIT_RESP_SUCCESS,
  709. HFI_POLL_DELAY_US, HFI_POLL_TIMEOUT_US)) {
  710. CAM_ERR(CAM_HFI, "response poll timed out: status=0x%08x",
  711. status);
  712. rc = -ETIMEDOUT;
  713. goto regions_fail;
  714. }
  715. CAM_DBG(CAM_HFI, "ICP fw version: 0x%x",
  716. cam_io_r(icp_base + HFI_REG_FW_VERSION));
  717. g_hfi->hfi_state = HFI_READY;
  718. g_hfi->cmd_q_state = true;
  719. g_hfi->msg_q_state = true;
  720. hfi_irq_enable(g_hfi);
  721. mutex_unlock(&hfi_cmd_q_mutex);
  722. mutex_unlock(&hfi_msg_q_mutex);
  723. return rc;
  724. regions_fail:
  725. kfree(g_hfi);
  726. g_hfi = NULL;
  727. alloc_fail:
  728. mutex_unlock(&hfi_cmd_q_mutex);
  729. mutex_unlock(&hfi_msg_q_mutex);
  730. return rc;
  731. }
  732. void cam_hfi_deinit(void)
  733. {
  734. mutex_lock(&hfi_cmd_q_mutex);
  735. mutex_lock(&hfi_msg_q_mutex);
  736. if (!g_hfi) {
  737. CAM_ERR(CAM_HFI, "hfi path not established yet");
  738. goto err;
  739. }
  740. g_hfi->cmd_q_state = false;
  741. g_hfi->msg_q_state = false;
  742. kzfree(g_hfi);
  743. g_hfi = NULL;
  744. err:
  745. mutex_unlock(&hfi_cmd_q_mutex);
  746. mutex_unlock(&hfi_msg_q_mutex);
  747. }