sde_hw_wb.h 6.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _SDE_HW_WB_H
  6. #define _SDE_HW_WB_H
  7. #include "sde_hw_catalog.h"
  8. #include "sde_hw_mdss.h"
  9. #include "sde_hw_top.h"
  10. #include "sde_hw_util.h"
  11. #include "sde_hw_pingpong.h"
  12. struct sde_hw_wb;
  13. struct sde_hw_wb_cfg {
  14. struct sde_hw_fmt_layout dest;
  15. enum sde_intf_mode intf_mode;
  16. struct sde_rect roi;
  17. struct sde_rect crop;
  18. bool is_secure;
  19. };
  20. /**
  21. * enum CDP preload ahead address size
  22. */
  23. enum {
  24. SDE_WB_CDP_PRELOAD_AHEAD_32,
  25. SDE_WB_CDP_PRELOAD_AHEAD_64
  26. };
  27. /**
  28. * struct sde_hw_wb_cdp_cfg : CDP configuration
  29. * @enable: true to enable CDP
  30. * @ubwc_meta_enable: true to enable ubwc metadata preload
  31. * @tile_amortize_enable: true to enable amortization control for tile format
  32. * @preload_ahead: number of request to preload ahead
  33. * SDE_WB_CDP_PRELOAD_AHEAD_32,
  34. * SDE_WB_CDP_PRELOAD_AHEAD_64
  35. */
  36. struct sde_hw_wb_cdp_cfg {
  37. bool enable;
  38. bool ubwc_meta_enable;
  39. bool tile_amortize_enable;
  40. u32 preload_ahead;
  41. };
  42. /**
  43. * struct sde_hw_wb_qos_cfg : Writeback pipe QoS configuration
  44. * @danger_lut: LUT for generate danger level based on fill level
  45. * @safe_lut: LUT for generate safe level based on fill level
  46. * @creq_lut: LUT for generate creq level based on fill level
  47. * @danger_safe_en: enable danger safe generation
  48. */
  49. struct sde_hw_wb_qos_cfg {
  50. u32 danger_lut;
  51. u32 safe_lut;
  52. u64 creq_lut;
  53. bool danger_safe_en;
  54. };
  55. /**
  56. *
  57. * struct sde_hw_wb_ops : Interface to the wb Hw driver functions
  58. * Assumption is these functions will be called after clocks are enabled
  59. */
  60. struct sde_hw_wb_ops {
  61. void (*setup_csc_data)(struct sde_hw_wb *ctx,
  62. struct sde_csc_cfg *data);
  63. void (*setup_outaddress)(struct sde_hw_wb *ctx,
  64. struct sde_hw_wb_cfg *wb);
  65. void (*setup_outformat)(struct sde_hw_wb *ctx,
  66. struct sde_hw_wb_cfg *wb);
  67. void (*setup_rotator)(struct sde_hw_wb *ctx,
  68. struct sde_hw_wb_cfg *wb);
  69. void (*setup_dither)(struct sde_hw_wb *ctx,
  70. struct sde_hw_wb_cfg *wb);
  71. void (*setup_cdwn)(struct sde_hw_wb *ctx,
  72. struct sde_hw_wb_cfg *wb);
  73. void (*setup_trafficshaper)(struct sde_hw_wb *ctx,
  74. struct sde_hw_wb_cfg *wb);
  75. void (*setup_roi)(struct sde_hw_wb *ctx,
  76. struct sde_hw_wb_cfg *wb);
  77. void (*setup_crop)(struct sde_hw_wb *ctx,
  78. struct sde_hw_wb_cfg *wb, bool crop);
  79. /**
  80. * setup_qos_lut - setup danger, safe, creq, etc. LUTs
  81. * @ctx: Pointer to pipe context
  82. * @cfg: Pointer to pipe QoS configuration
  83. */
  84. void (*setup_qos_lut)(struct sde_hw_wb *ctx,
  85. struct sde_hw_wb_qos_cfg *cfg);
  86. /**
  87. * setup_cdp - setup CDP
  88. * @ctx: Pointer to pipe context
  89. * @cfg: Pointer to pipe CDP configuration
  90. */
  91. void (*setup_cdp)(struct sde_hw_wb *ctx,
  92. struct sde_hw_wb_cdp_cfg *cfg);
  93. /**
  94. * bind_pingpong_blk - enable/disable the connection with pp
  95. * @ctx: Pointer to wb context
  96. * @enable: enable/disable connection
  97. * @pp: pingpong blk id
  98. */
  99. void (*bind_pingpong_blk)(struct sde_hw_wb *ctx,
  100. bool enable,
  101. const enum sde_pingpong pp);
  102. /**
  103. * bind_dcwb_pp_blk - enable/disable the connection with cwb pp
  104. * @ctx: Pointer to wb context
  105. * @enable: enable/disable connection
  106. * @pp: pingpong blk id
  107. */
  108. void (*bind_dcwb_pp_blk)(struct sde_hw_wb *ctx,
  109. bool enable,
  110. const enum sde_pingpong pp);
  111. /**
  112. * program_cwb_ctrl - program cwb block configp
  113. * @ctx: Pointer to wb context
  114. * @pp_idx: Current CWB block index to poram
  115. * @data_src: Source CWB/PingPong block index
  116. * @dspp_out: Tap dspp output or default LM output
  117. * @enable: enable or disable the CWB path to tap the output
  118. */
  119. void (*program_cwb_ctrl)(struct sde_hw_wb *ctx, const enum sde_cwb cwb,
  120. const enum sde_cwb data_src, bool dspp_out, bool enable);
  121. /**
  122. * program_dcwb_ctrl - program cwb block configp
  123. * @ctx: Pointer to wb context
  124. * @pp_idx: Current CWB block index to poram
  125. * @data_src: Source CWB/PingPong block index
  126. * @tap_location: Tap LM output, dspp output or Demura output
  127. * @enable: enable or disable the CWB path to tap the output
  128. */
  129. void (*program_dcwb_ctrl)(struct sde_hw_wb *ctx, const enum sde_dcwb cwb,
  130. const enum sde_cwb data_src, int tap_location, bool enable);
  131. /**
  132. * program_cwb_dither_ctrl - program cwb dither block config
  133. * @ctx: Pointer to wb context
  134. * @dcwb_idx: Current Ping-Pong CWB block index to program
  135. * @cfg: cwb dither data
  136. * @len: the size of cwb dither data
  137. * @enable: enable or disable the cwb dither
  138. */
  139. void (*program_cwb_dither_ctrl)(struct sde_hw_wb *ctx,
  140. const enum sde_dcwb dcwb_idx, void *cfg, size_t len, bool enable);
  141. };
  142. /**
  143. * struct sde_hw_wb : WB driver object
  144. * @base: hardware block base structure
  145. * @hw: block hardware details
  146. * @catalog: back pointer to catalog
  147. * @mdp: pointer to associated mdp portion of the catalog
  148. * @idx: hardware index number within type
  149. * @wb_hw_caps: hardware capabilities
  150. * @ops: function pointers
  151. * @hw_mdp: MDP top level hardware block
  152. * @cwb_hw: CWB control hwio details
  153. * @dcwb_hw: DCWB control hwio details
  154. * @dcwb_pp_hw: DCWB PingPong control hwio details
  155. */
  156. struct sde_hw_wb {
  157. struct sde_hw_blk base;
  158. struct sde_hw_blk_reg_map hw;
  159. struct sde_mdss_cfg *catalog;
  160. struct sde_mdp_cfg *mdp;
  161. /* wb path */
  162. int idx;
  163. const struct sde_wb_cfg *caps;
  164. /* ops */
  165. struct sde_hw_wb_ops ops;
  166. struct sde_hw_mdp *hw_mdp;
  167. struct sde_hw_blk_reg_map cwb_hw;
  168. struct sde_hw_blk_reg_map dcwb_hw;
  169. struct sde_hw_pingpong dcwb_pp_hw[DCWB_MAX - DCWB_0];
  170. };
  171. /**
  172. * sde_hw_wb - convert base object sde_hw_base to container
  173. * @hw: Pointer to base hardware block
  174. * return: Pointer to hardware block container
  175. */
  176. static inline struct sde_hw_wb *to_sde_hw_wb(struct sde_hw_blk *hw)
  177. {
  178. return container_of(hw, struct sde_hw_wb, base);
  179. }
  180. /**
  181. * sde_hw_wb_init(): Initializes and return writeback hw driver object.
  182. * @idx: wb_path index for which driver object is required
  183. * @addr: mapped register io address of MDP
  184. * @m : pointer to mdss catalog data
  185. * @hw_mdp: pointer to mdp top hw driver object
  186. */
  187. struct sde_hw_wb *sde_hw_wb_init(enum sde_wb idx,
  188. void __iomem *addr,
  189. struct sde_mdss_cfg *m,
  190. struct sde_hw_mdp *hw_mdp);
  191. /**
  192. * sde_hw_wb_destroy(): Destroy writeback hw driver object.
  193. * @hw_wb: Pointer to writeback hw driver object
  194. */
  195. void sde_hw_wb_destroy(struct sde_hw_wb *hw_wb);
  196. #endif /*_SDE_HW_WB_H */