msm_cvp_platform.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/debugfs.h>
  6. #include <linux/dma-mapping.h>
  7. #include <linux/init.h>
  8. #include <linux/ioctl.h>
  9. #include <linux/list.h>
  10. #include <linux/module.h>
  11. #include <linux/of_platform.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/slab.h>
  14. #include <linux/types.h>
  15. #include <linux/version.h>
  16. #include <linux/io.h>
  17. #include <soc/qcom/of_common.h>
  18. #include "msm_cvp_internal.h"
  19. #include "msm_cvp_debug.h"
  20. #include "cvp_hfi_api.h"
  21. #include "cvp_hfi.h"
  22. #define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \
  23. { \
  24. .override_bit_info.max_channel_override = mco, \
  25. .override_bit_info.mal_length_override = mlo, \
  26. .override_bit_info.hb_override = hbo, \
  27. .override_bit_info.bank_swzl_level_override = bslo, \
  28. .override_bit_info.bank_spreading_override = bso, \
  29. .override_bit_info.reserved = rs, \
  30. .max_channels = mc, \
  31. .mal_length = ml, \
  32. .highest_bank_bit = hbb, \
  33. .bank_swzl_level = bsl, \
  34. .bank_spreading = bsp, \
  35. }
  36. static struct msm_cvp_common_data default_common_data[] = {
  37. {
  38. .key = "qcom,auto-pil",
  39. .value = 1,
  40. },
  41. };
  42. static struct msm_cvp_common_data sm8450_common_data[] = {
  43. {
  44. .key = "qcom,pm-qos-latency-us",
  45. .value = 50,
  46. },
  47. {
  48. .key = "qcom,sw-power-collapse",
  49. .value = 1,
  50. },
  51. {
  52. .key = "qcom,domain-attr-non-fatal-faults",
  53. .value = 1,
  54. },
  55. {
  56. .key = "qcom,max-secure-instances",
  57. .value = 2, /*
  58. * As per design driver allows 3rd
  59. * instance as well since the secure
  60. * flags were updated later for the
  61. * current instance. Hence total
  62. * secure sessions would be
  63. * max-secure-instances + 1.
  64. */
  65. },
  66. {
  67. .key = "qcom,max-ssr-allowed",
  68. .value = 1, /*
  69. * Maxinum number of SSR before BUG_ON
  70. */
  71. },
  72. {
  73. .key = "qcom,power-collapse-delay",
  74. .value = 3000,
  75. },
  76. {
  77. .key = "qcom,hw-resp-timeout",
  78. .value = 2000,
  79. },
  80. {
  81. .key = "qcom,dsp-resp-timeout",
  82. .value = 1000,
  83. },
  84. {
  85. .key = "qcom,debug-timeout",
  86. .value = 0,
  87. },
  88. {
  89. .key = "qcom,dsp-enabled",
  90. .value = 1,
  91. }
  92. };
  93. static struct msm_cvp_common_data sm8550_common_data[] = {
  94. {
  95. .key = "qcom,pm-qos-latency-us",
  96. .value = 50,
  97. },
  98. {
  99. .key = "qcom,sw-power-collapse",
  100. .value = 1,
  101. },
  102. {
  103. .key = "qcom,domain-attr-non-fatal-faults",
  104. .value = 0,
  105. },
  106. {
  107. .key = "qcom,max-secure-instances",
  108. .value = 2, /*
  109. * As per design driver allows 3rd
  110. * instance as well since the secure
  111. * flags were updated later for the
  112. * current instance. Hence total
  113. * secure sessions would be
  114. * max-secure-instances + 1.
  115. */
  116. },
  117. {
  118. .key = "qcom,max-ssr-allowed",
  119. .value = 1, /*
  120. * Maxinum number of SSR before BUG_ON
  121. */
  122. },
  123. {
  124. .key = "qcom,power-collapse-delay",
  125. .value = 3000,
  126. },
  127. {
  128. .key = "qcom,hw-resp-timeout",
  129. .value = 2000,
  130. },
  131. {
  132. .key = "qcom,dsp-resp-timeout",
  133. .value = 1000,
  134. },
  135. {
  136. .key = "qcom,debug-timeout",
  137. .value = 0,
  138. },
  139. {
  140. .key = "qcom,dsp-enabled",
  141. .value = 1,
  142. }
  143. };
  144. static struct msm_cvp_common_data sm8550_tvm_common_data[] = {
  145. {
  146. .key = "qcom,pm-qos-latency-us",
  147. .value = 50,
  148. },
  149. {
  150. .key = "qcom,sw-power-collapse",
  151. .value = 0,
  152. },
  153. {
  154. .key = "qcom,domain-attr-non-fatal-faults",
  155. .value = 0,
  156. },
  157. {
  158. .key = "qcom,max-secure-instances",
  159. .value = 2, /*
  160. * As per design driver allows 3rd
  161. * instance as well since the secure
  162. * flags were updated later for the
  163. * current instance. Hence total
  164. * secure sessions would be
  165. * max-secure-instances + 1.
  166. */
  167. },
  168. {
  169. .key = "qcom,max-ssr-allowed",
  170. .value = 1, /*
  171. * Maxinum number of SSR before BUG_ON
  172. */
  173. },
  174. {
  175. .key = "qcom,power-collapse-delay",
  176. .value = 3000,
  177. },
  178. {
  179. .key = "qcom,hw-resp-timeout",
  180. .value = 2000,
  181. },
  182. {
  183. .key = "qcom,dsp-resp-timeout",
  184. .value = 1000,
  185. },
  186. {
  187. .key = "qcom,debug-timeout",
  188. .value = 0,
  189. },
  190. {
  191. .key = "qcom,dsp-enabled",
  192. .value = 0,
  193. }
  194. };
  195. static struct msm_cvp_common_data sm8650_common_data[] = {
  196. {
  197. .key = "qcom,pm-qos-latency-us",
  198. .value = 50,
  199. },
  200. {
  201. .key = "qcom,sw-power-collapse",
  202. .value = 1,
  203. },
  204. {
  205. .key = "qcom,domain-attr-non-fatal-faults",
  206. .value = 0,
  207. },
  208. {
  209. .key = "qcom,max-secure-instances",
  210. .value = 2, /*
  211. * As per design driver allows 3rd
  212. * instance as well since the secure
  213. * flags were updated later for the
  214. * current instance. Hence total
  215. * secure sessions would be
  216. * max-secure-instances + 1.
  217. */
  218. },
  219. {
  220. .key = "qcom,max-ssr-allowed",
  221. .value = 1, /*
  222. * Maxinum number of SSR before BUG_ON
  223. */
  224. },
  225. {
  226. .key = "qcom,power-collapse-delay",
  227. .value = 3000,
  228. },
  229. {
  230. .key = "qcom,hw-resp-timeout",
  231. .value = 2000,
  232. },
  233. {
  234. .key = "qcom,dsp-resp-timeout",
  235. .value = 1000,
  236. },
  237. {
  238. .key = "qcom,debug-timeout",
  239. .value = 0,
  240. },
  241. {
  242. .key = "qcom,dsp-enabled",
  243. .value = 1,
  244. }
  245. };
  246. /* Default UBWC config for LPDDR5 */
  247. static struct msm_cvp_ubwc_config_data kona_ubwc_data[] = {
  248. UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0),
  249. };
  250. static struct msm_cvp_qos_setting waipio_noc_qos = {
  251. .axi_qos = 0x99,
  252. .prioritylut_low = 0x22222222,
  253. .prioritylut_high = 0x33333333,
  254. .urgency_low = 0x1022,
  255. .dangerlut_low = 0x0,
  256. .safelut_low = 0xffff,
  257. };
  258. static struct msm_cvp_platform_data default_data = {
  259. .common_data = default_common_data,
  260. .common_data_length = ARRAY_SIZE(default_common_data),
  261. .sku_version = 0,
  262. .vpu_ver = VPU_VERSION_5,
  263. .ubwc_config = 0x0,
  264. .noc_qos = 0x0,
  265. .vm_id = 1,
  266. };
  267. static struct msm_cvp_platform_data sm8450_data = {
  268. .common_data = sm8450_common_data,
  269. .common_data_length = ARRAY_SIZE(sm8450_common_data),
  270. .sku_version = 0,
  271. .vpu_ver = VPU_VERSION_5,
  272. .ubwc_config = kona_ubwc_data,
  273. .noc_qos = &waipio_noc_qos,
  274. .vm_id = 1,
  275. };
  276. static struct msm_cvp_platform_data sm8550_data = {
  277. .common_data = sm8550_common_data,
  278. .common_data_length = ARRAY_SIZE(sm8550_common_data),
  279. .sku_version = 0,
  280. .vpu_ver = VPU_VERSION_5,
  281. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  282. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  283. .vm_id = 1,
  284. };
  285. static struct msm_cvp_platform_data sm8550_tvm_data = {
  286. .common_data = sm8550_tvm_common_data,
  287. .common_data_length = ARRAY_SIZE(sm8550_tvm_common_data),
  288. .sku_version = 0,
  289. .vpu_ver = VPU_VERSION_5,
  290. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  291. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  292. .vm_id = 2,
  293. };
  294. static struct msm_cvp_platform_data sm8650_data = {
  295. .common_data = sm8650_common_data,
  296. .common_data_length = ARRAY_SIZE(sm8650_common_data),
  297. .sku_version = 0,
  298. .vpu_ver = VPU_VERSION_5,
  299. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  300. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  301. .vm_id = 1,
  302. };
  303. static const struct of_device_id msm_cvp_dt_match[] = {
  304. {
  305. .compatible = "qcom,waipio-cvp",
  306. .data = &sm8450_data,
  307. },
  308. {
  309. .compatible = "qcom,kalama-cvp",
  310. .data = &sm8550_data,
  311. },
  312. {
  313. .compatible = "qcom,kalama-cvp-tvm",
  314. .data = &sm8550_tvm_data,
  315. },
  316. {
  317. .compatible = "qcom,pineapple-cvp",
  318. .data = &sm8650_data,
  319. },
  320. {},
  321. };
  322. /*
  323. * WARN: name field CAN NOT hold more than 23 chars
  324. * excluding the ending '\0'
  325. *
  326. * NOTE: the def entry index for the command packet is
  327. * "the packet type - HFI_CMD_SESSION_CVP_START"
  328. */
  329. const struct msm_cvp_hfi_defs cvp_hfi_defs[MAX_PKT_IDX] = {
  330. [HFI_CMD_SESSION_CVP_DFS_CONFIG - HFI_CMD_SESSION_CVP_START] =
  331. {
  332. .size = HFI_DFS_CONFIG_CMD_SIZE,
  333. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  334. .is_config_pkt = true,
  335. .resp = HAL_NO_RESP,
  336. .name = "DFS",
  337. },
  338. [HFI_CMD_SESSION_CVP_DFS_FRAME - HFI_CMD_SESSION_CVP_START] =
  339. {
  340. .size = HFI_DFS_FRAME_CMD_SIZE,
  341. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  342. .is_config_pkt = false,
  343. .resp = HAL_NO_RESP,
  344. .name = "DFS_FRAME",
  345. .force_kernel_fence = false,
  346. },
  347. [HFI_CMD_SESSION_CVP_SGM_OF_CONFIG - HFI_CMD_SESSION_CVP_START] =
  348. {
  349. .size = 0xFFFFFFFF,
  350. .type = HFI_CMD_SESSION_CVP_SGM_OF_CONFIG,
  351. .is_config_pkt = true,
  352. .resp = HAL_NO_RESP,
  353. .name = "SGM_OF",
  354. },
  355. [HFI_CMD_SESSION_CVP_SGM_OF_FRAME - HFI_CMD_SESSION_CVP_START] =
  356. {
  357. .size = 0xFFFFFFFF,
  358. .type = HFI_CMD_SESSION_CVP_SGM_OF_FRAME,
  359. .is_config_pkt = false,
  360. .resp = HAL_NO_RESP,
  361. .name = "SGM_OF_FRAME",
  362. .force_kernel_fence = false,
  363. },
  364. [HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  365. {
  366. .size = 0xFFFFFFFF,
  367. .type = HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG,
  368. .is_config_pkt = true,
  369. .resp = HAL_NO_RESP,
  370. .name = "WARP_NCC",
  371. },
  372. [HFI_CMD_SESSION_CVP_WARP_NCC_FRAME - HFI_CMD_SESSION_CVP_START] =
  373. {
  374. .size = 0xFFFFFFFF,
  375. .type = HFI_CMD_SESSION_CVP_WARP_NCC_FRAME,
  376. .is_config_pkt = false,
  377. .resp = HAL_NO_RESP,
  378. .name = "WARP_NCC_FRAME",
  379. .force_kernel_fence = false,
  380. },
  381. [HFI_CMD_SESSION_CVP_WARP_CONFIG - HFI_CMD_SESSION_CVP_START] =
  382. {
  383. .size = 0xFFFFFFFF,
  384. .type = HFI_CMD_SESSION_CVP_WARP_CONFIG,
  385. .is_config_pkt = true,
  386. .resp = HAL_NO_RESP,
  387. .name = "WARP",
  388. },
  389. [HFI_CMD_SESSION_CVP_WARP_DS_PARAMS - HFI_CMD_SESSION_CVP_START] =
  390. {
  391. .size = 0xFFFFFFFF,
  392. .type = HFI_CMD_SESSION_CVP_WARP_DS_PARAMS,
  393. .is_config_pkt = true,
  394. .resp = HAL_NO_RESP,
  395. .name = "WARP_DS_PARAMS",
  396. },
  397. [HFI_CMD_SESSION_CVP_WARP_FRAME - HFI_CMD_SESSION_CVP_START] =
  398. {
  399. .size = 0xFFFFFFFF,
  400. .type = HFI_CMD_SESSION_CVP_WARP_FRAME,
  401. .is_config_pkt = false,
  402. .resp = HAL_NO_RESP,
  403. .name = "WARP_FRAME",
  404. .force_kernel_fence = false,
  405. },
  406. [HFI_CMD_SESSION_CVP_DMM_CONFIG - HFI_CMD_SESSION_CVP_START] =
  407. {
  408. .size = HFI_DMM_CONFIG_CMD_SIZE,
  409. .type = HFI_CMD_SESSION_CVP_DMM_CONFIG,
  410. .is_config_pkt = true,
  411. .resp = HAL_NO_RESP,
  412. .name = "DMM",
  413. },
  414. [HFI_CMD_SESSION_CVP_DMM_PARAMS - HFI_CMD_SESSION_CVP_START] =
  415. {
  416. .size = 0xFFFFFFFF,
  417. .type = HFI_CMD_SESSION_CVP_DMM_PARAMS,
  418. .is_config_pkt = true,
  419. .resp = HAL_NO_RESP,
  420. .name = "DMM_PARAMS",
  421. },
  422. [HFI_CMD_SESSION_CVP_DMM_FRAME - HFI_CMD_SESSION_CVP_START] =
  423. {
  424. .size = HFI_DMM_FRAME_CMD_SIZE,
  425. .type = HFI_CMD_SESSION_CVP_DMM_FRAME,
  426. .is_config_pkt = false,
  427. .resp = HAL_NO_RESP,
  428. .name = "DMM_FRAME",
  429. .force_kernel_fence = true,
  430. },
  431. [HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  432. {
  433. .size = HFI_PERSIST_CMD_SIZE,
  434. .type =HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  435. .is_config_pkt = true,
  436. .resp = HAL_NO_RESP,
  437. .name = "SET_PERSIST",
  438. },
  439. [HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  440. {
  441. .size = 0xffffffff,
  442. .type =HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  443. .is_config_pkt = false,
  444. .resp = HAL_NO_RESP,
  445. .name = "REL_PERSIST",
  446. },
  447. [HFI_CMD_SESSION_CVP_DS_CONFIG - HFI_CMD_SESSION_CVP_START] =
  448. {
  449. .size = HFI_DS_CONFIG_CMD_SIZE,
  450. .type = HFI_CMD_SESSION_CVP_DS_CONFIG,
  451. .is_config_pkt = true,
  452. .resp = HAL_NO_RESP,
  453. .name = "DS_CONFIG",
  454. },
  455. [HFI_CMD_SESSION_CVP_DS - HFI_CMD_SESSION_CVP_START] =
  456. {
  457. .size = HFI_DS_CMD_SIZE,
  458. .type =HFI_CMD_SESSION_CVP_DS,
  459. .is_config_pkt = false,
  460. .resp = HAL_NO_RESP,
  461. .name = "DS",
  462. },
  463. [HFI_CMD_SESSION_CVP_CV_TME_CONFIG - HFI_CMD_SESSION_CVP_START] =
  464. {
  465. .size = HFI_OF_CONFIG_CMD_SIZE,
  466. .type =HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  467. .is_config_pkt = true,
  468. .resp = HAL_NO_RESP,
  469. .name = "TME",
  470. },
  471. [HFI_CMD_SESSION_CVP_CV_TME_FRAME - HFI_CMD_SESSION_CVP_START] =
  472. {
  473. .size = HFI_OF_FRAME_CMD_SIZE,
  474. .type =HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  475. .is_config_pkt = false,
  476. .resp = HAL_NO_RESP,
  477. .name = "TME_FRAME",
  478. .force_kernel_fence = false,
  479. },
  480. [HFI_CMD_SESSION_CVP_CV_ODT_CONFIG - HFI_CMD_SESSION_CVP_START] =
  481. {
  482. .size = HFI_ODT_CONFIG_CMD_SIZE,
  483. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  484. .is_config_pkt = true,
  485. .resp = HAL_NO_RESP,
  486. .name = "ODT",
  487. },
  488. [HFI_CMD_SESSION_CVP_CV_ODT_FRAME - HFI_CMD_SESSION_CVP_START] =
  489. {
  490. .size = HFI_ODT_FRAME_CMD_SIZE,
  491. .type =HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  492. .is_config_pkt = false,
  493. .resp = HAL_NO_RESP,
  494. .name = "ODT_FRAME",
  495. },
  496. [HFI_CMD_SESSION_CVP_CV_OD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  497. {
  498. .size = HFI_OD_CONFIG_CMD_SIZE,
  499. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  500. .is_config_pkt = true,
  501. .resp = HAL_NO_RESP,
  502. .name = "OD",
  503. },
  504. [HFI_CMD_SESSION_CVP_CV_OD_FRAME - HFI_CMD_SESSION_CVP_START] =
  505. {
  506. .size = HFI_OD_FRAME_CMD_SIZE,
  507. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  508. .is_config_pkt = false,
  509. .resp = HAL_NO_RESP,
  510. .name = "OD_FRAME",
  511. },
  512. [HFI_CMD_SESSION_CVP_NCC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  513. {
  514. .size = HFI_NCC_CONFIG_CMD_SIZE,
  515. .type =HFI_CMD_SESSION_CVP_NCC_CONFIG,
  516. .is_config_pkt = true,
  517. .resp = HAL_NO_RESP,
  518. .name = "NCC",
  519. },
  520. [HFI_CMD_SESSION_CVP_NCC_FRAME - HFI_CMD_SESSION_CVP_START] =
  521. {
  522. .size = HFI_NCC_FRAME_CMD_SIZE,
  523. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  524. .is_config_pkt = false,
  525. .resp = HAL_NO_RESP,
  526. .name = "NCC_FRAME",
  527. .force_kernel_fence = false,
  528. },
  529. [HFI_CMD_SESSION_CVP_ICA_CONFIG - HFI_CMD_SESSION_CVP_START] =
  530. {
  531. .size = HFI_ICA_CONFIG_CMD_SIZE,
  532. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  533. .is_config_pkt = true,
  534. .resp = HAL_NO_RESP,
  535. .name = "ICA",
  536. },
  537. [HFI_CMD_SESSION_CVP_ICA_FRAME - HFI_CMD_SESSION_CVP_START] =
  538. {
  539. .size = HFI_ICA_FRAME_CMD_SIZE,
  540. .type =HFI_CMD_SESSION_CVP_ICA_FRAME,
  541. .is_config_pkt = false,
  542. .resp = HAL_NO_RESP,
  543. .name = "ICA_FRAME",
  544. .force_kernel_fence = false,
  545. },
  546. [HFI_CMD_SESSION_CVP_HCD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  547. {
  548. .size = HFI_HCD_CONFIG_CMD_SIZE,
  549. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  550. .is_config_pkt = true,
  551. .resp = HAL_NO_RESP,
  552. .name = "HCD",
  553. },
  554. [HFI_CMD_SESSION_CVP_HCD_FRAME - HFI_CMD_SESSION_CVP_START] =
  555. {
  556. .size = HFI_HCD_FRAME_CMD_SIZE,
  557. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  558. .is_config_pkt = false,
  559. .resp = HAL_NO_RESP,
  560. .name = "HCD_FRAME",
  561. .force_kernel_fence = false,
  562. },
  563. [HFI_CMD_SESSION_CVP_DC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  564. {
  565. .size = HFI_DCM_CONFIG_CMD_SIZE,
  566. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  567. .is_config_pkt = true,
  568. .resp = HAL_NO_RESP,
  569. .name = "DC",
  570. },
  571. [HFI_CMD_SESSION_CVP_DC_FRAME - HFI_CMD_SESSION_CVP_START] =
  572. {
  573. .size = HFI_DCM_FRAME_CMD_SIZE,
  574. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  575. .is_config_pkt = false,
  576. .resp = HAL_NO_RESP,
  577. .name = "DC_FRAME",
  578. .force_kernel_fence = false,
  579. },
  580. [HFI_CMD_SESSION_CVP_DCM_CONFIG - HFI_CMD_SESSION_CVP_START] =
  581. {
  582. .size = HFI_DCM_CONFIG_CMD_SIZE,
  583. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  584. .is_config_pkt = true,
  585. .resp = HAL_NO_RESP,
  586. .name = "DCM",
  587. },
  588. [HFI_CMD_SESSION_CVP_DCM_FRAME - HFI_CMD_SESSION_CVP_START] =
  589. {
  590. .size = HFI_DCM_FRAME_CMD_SIZE,
  591. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  592. .is_config_pkt = false,
  593. .resp = HAL_NO_RESP,
  594. .name = "DCM_FRAME",
  595. .force_kernel_fence = false,
  596. },
  597. [HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  598. {
  599. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  600. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  601. .is_config_pkt = true,
  602. .resp = HAL_NO_RESP,
  603. .name = "PYS_HCD",
  604. },
  605. [HFI_CMD_SESSION_CVP_PYS_HCD_FRAME - HFI_CMD_SESSION_CVP_START] =
  606. {
  607. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  608. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  609. .is_config_pkt = false,
  610. .resp = HAL_NO_RESP,
  611. .name = "PYS_HCD_FRAME",
  612. .force_kernel_fence = true,
  613. },
  614. [HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  615. {
  616. .size = 0xFFFFFFFF,
  617. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  618. .is_config_pkt = true,
  619. .resp = HAL_NO_RESP,
  620. .name = "SET_MODEL",
  621. },
  622. [HFI_CMD_SESSION_CVP_SET_SNAPSHOT_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  623. {
  624. .size = 0xFFFFFFFF,
  625. .type = HFI_CMD_SESSION_CVP_SET_SNAPSHOT_BUFFERS,
  626. .is_config_pkt = false,
  627. .resp = HAL_NO_RESP,
  628. .name = "SET_SNAPSHOT",
  629. },
  630. [HFI_CMD_SESSION_CVP_RELEASE_SNAPSHOT_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  631. {
  632. .size = 0xFFFFFFFF,
  633. .type = HFI_CMD_SESSION_CVP_RELEASE_SNAPSHOT_BUFFERS,
  634. .is_config_pkt = false,
  635. .resp = HAL_NO_RESP,
  636. .name = "REL_SNAPSHOT",
  637. },
  638. [HFI_CMD_SESSION_CVP_SET_SNAPSHOT_MODE - HFI_CMD_SESSION_CVP_START] =
  639. {
  640. .size = 0xFFFFFFFF,
  641. .type = HFI_CMD_SESSION_CVP_SET_SNAPSHOT_MODE,
  642. .is_config_pkt = true,
  643. .resp = HAL_NO_RESP,
  644. .name = "SNAPSHOT_MODE",
  645. },
  646. [HFI_CMD_SESSION_CVP_SNAPSHOT_WRITE_DONE - HFI_CMD_SESSION_CVP_START] =
  647. {
  648. .size = 0xFFFFFFFF,
  649. .type = HFI_CMD_SESSION_CVP_SNAPSHOT_WRITE_DONE,
  650. .is_config_pkt = true,
  651. .resp = HAL_NO_RESP,
  652. .name = "SNAPSHOT_DONE",
  653. },
  654. [HFI_CMD_SESSION_CVP_FD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  655. {
  656. .size = 0xFFFFFFFF,
  657. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  658. .is_config_pkt = true,
  659. .resp = HAL_NO_RESP,
  660. .name = "FD",
  661. },
  662. [HFI_CMD_SESSION_CVP_FD_FRAME - HFI_CMD_SESSION_CVP_START] =
  663. {
  664. .size = 0xFFFFFFFF,
  665. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  666. .is_config_pkt = false,
  667. .resp = HAL_NO_RESP,
  668. .name = "FD_FRAME",
  669. },
  670. [HFI_CMD_SESSION_CVP_XRA_FRAME - HFI_CMD_SESSION_CVP_START] =
  671. {
  672. .size = 0xFFFFFFFF,
  673. .type = HFI_CMD_SESSION_CVP_XRA_FRAME,
  674. .is_config_pkt = false,
  675. .resp = HAL_NO_RESP,
  676. .name = "XRA_FRAME",
  677. },
  678. [HFI_CMD_SESSION_CVP_XRA_CONFIG - HFI_CMD_SESSION_CVP_START] =
  679. {
  680. .size = 0xFFFFFFFF,
  681. .type = HFI_CMD_SESSION_CVP_XRA_CONFIG,
  682. .is_config_pkt = true,
  683. .resp = HAL_NO_RESP,
  684. .name = "XRA_CONFIG",
  685. },
  686. [HFI_CMD_SESSION_CVP_XRA_BLOB_FRAME - HFI_CMD_SESSION_CVP_START] =
  687. {
  688. .size = 0xFFFFFFFF,
  689. .type = HFI_CMD_SESSION_CVP_XRA_BLOB_FRAME,
  690. .is_config_pkt = false,
  691. .resp = HAL_NO_RESP,
  692. .name = "XRA_BLOB_FRAME",
  693. },
  694. [HFI_CMD_SESSION_CVP_XRA_BLOB_CONFIG - HFI_CMD_SESSION_CVP_START] =
  695. {
  696. .size = 0xFFFFFFFF,
  697. .type = HFI_CMD_SESSION_CVP_XRA_BLOB_CONFIG,
  698. .is_config_pkt = true,
  699. .resp = HAL_NO_RESP,
  700. .name = "XRA_BLOB_CONFIG",
  701. },
  702. [HFI_CMD_SESSION_CVP_XRA_PATCH_FRAME - HFI_CMD_SESSION_CVP_START] =
  703. {
  704. .size = 0xFFFFFFFF,
  705. .type = HFI_CMD_SESSION_CVP_XRA_PATCH_FRAME,
  706. .is_config_pkt = false,
  707. .resp = HAL_NO_RESP,
  708. .name = "XRA_PATCH_FRAME",
  709. .force_kernel_fence = false,
  710. },
  711. [HFI_CMD_SESSION_CVP_XRA_PATCH_CONFIG - HFI_CMD_SESSION_CVP_START] =
  712. {
  713. .size = 0xFFFFFFFF,
  714. .type = HFI_CMD_SESSION_CVP_XRA_PATCH_CONFIG,
  715. .is_config_pkt = true,
  716. .resp = HAL_NO_RESP,
  717. .name = "XRA_PATCH_CONFIG",
  718. },
  719. [HFI_CMD_SESSION_CVP_XRA_MATCH_FRAME - HFI_CMD_SESSION_CVP_START] =
  720. {
  721. .size = 0xFFFFFFFF,
  722. .type = HFI_CMD_SESSION_CVP_XRA_MATCH_FRAME,
  723. .is_config_pkt = false,
  724. .resp = HAL_NO_RESP,
  725. .name = "XRA_MATCH_FRAME",
  726. .force_kernel_fence = false,
  727. },
  728. [HFI_CMD_SESSION_CVP_XRA_MATCH_CONFIG - HFI_CMD_SESSION_CVP_START] =
  729. {
  730. .size = 0xFFFFFFFF,
  731. .type = HFI_CMD_SESSION_CVP_XRA_MATCH_CONFIG,
  732. .is_config_pkt = true,
  733. .resp = HAL_NO_RESP,
  734. .name = "XRA_MATCH_CONFIG",
  735. },
  736. [HFI_CMD_SESSION_CVP_RGE_FRAME - HFI_CMD_SESSION_CVP_START] =
  737. {
  738. .size = 0xFFFFFFFF,
  739. .type = HFI_CMD_SESSION_CVP_RGE_FRAME,
  740. .is_config_pkt = false,
  741. .resp = HAL_NO_RESP,
  742. .name = "RGE_FRAME",
  743. .force_kernel_fence = true,
  744. },
  745. [HFI_CMD_SESSION_CVP_RGE_CONFIG - HFI_CMD_SESSION_CVP_START] =
  746. {
  747. .size = 0xFFFFFFFF,
  748. .type = HFI_CMD_SESSION_CVP_RGE_CONFIG,
  749. .is_config_pkt = true,
  750. .resp = HAL_NO_RESP,
  751. .name = "RGE_CONFIG",
  752. },
  753. [HFI_CMD_SESSION_EVA_ITOF_FRAME - HFI_CMD_SESSION_CVP_START] =
  754. {
  755. .size = 0xFFFFFFFF,
  756. .type = HFI_CMD_SESSION_EVA_ITOF_FRAME,
  757. .is_config_pkt = false,
  758. .resp = HAL_NO_RESP,
  759. .name = "ITOF_FRAME",
  760. .force_kernel_fence = true,
  761. },
  762. [HFI_CMD_SESSION_EVA_ITOF_CONFIG - HFI_CMD_SESSION_CVP_START] =
  763. {
  764. .size = 0xFFFFFFFF,
  765. .type = HFI_CMD_SESSION_EVA_ITOF_CONFIG,
  766. .is_config_pkt = true,
  767. .resp = HAL_NO_RESP,
  768. .name = "ITOF_CONFIG",
  769. },
  770. [HFI_CMD_SESSION_EVA_DLFD_FRAME - HFI_CMD_SESSION_CVP_START] =
  771. {
  772. .size = 0xFFFFFFFF,
  773. .type = HFI_CMD_SESSION_EVA_DLFD_FRAME,
  774. .is_config_pkt = false,
  775. .resp = HAL_NO_RESP,
  776. .name = "DLFD_FRAME",
  777. },
  778. [HFI_CMD_SESSION_EVA_DLFD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  779. {
  780. .size = 0xFFFFFFFF,
  781. .type = HFI_CMD_SESSION_EVA_DLFD_CONFIG,
  782. .is_config_pkt = true,
  783. .resp = HAL_NO_RESP,
  784. .name = "DLFD_CONFIG",
  785. },
  786. [HFI_CMD_SESSION_EVA_DLFL_FRAME - HFI_CMD_SESSION_CVP_START] =
  787. {
  788. .size = 0xFFFFFFFF,
  789. .type = HFI_CMD_SESSION_EVA_DLFL_FRAME,
  790. .is_config_pkt = false,
  791. .resp = HAL_NO_RESP,
  792. .name = "DLFL_FRAME",
  793. .force_kernel_fence = false,
  794. },
  795. [HFI_CMD_SESSION_EVA_DLFL_CONFIG - HFI_CMD_SESSION_CVP_START] =
  796. {
  797. .size = 0xFFFFFFFF,
  798. .type = HFI_CMD_SESSION_EVA_DLFL_CONFIG,
  799. .is_config_pkt = true,
  800. .resp = HAL_NO_RESP,
  801. .name = "DLFL_CONFIG",
  802. },
  803. [HFI_CMD_SESSION_CVP_SYNX - HFI_CMD_SESSION_CVP_START] =
  804. {
  805. .size = 0xFFFFFFFF,
  806. .type = HFI_CMD_SESSION_CVP_SYNX,
  807. .is_config_pkt = true,
  808. .resp = HAL_NO_RESP,
  809. .name = "SYNX_TEST",
  810. },
  811. [HFI_CMD_SESSION_EVA_DME_ONLY_CONFIG - HFI_CMD_SESSION_CVP_START] =
  812. {
  813. .size = 0xFFFFFFFF,
  814. .type = HFI_CMD_SESSION_EVA_DME_ONLY_CONFIG,
  815. .is_config_pkt = true,
  816. .resp = HAL_NO_RESP,
  817. .name = "DME_CONFIG",
  818. },
  819. [HFI_CMD_SESSION_EVA_DME_ONLY_FRAME - HFI_CMD_SESSION_CVP_START] =
  820. {
  821. .size = 0xFFFFFFFF,
  822. .type = HFI_CMD_SESSION_EVA_DME_ONLY_FRAME,
  823. .is_config_pkt = false,
  824. .resp = HAL_NO_RESP,
  825. .name = "DME_FRAME",
  826. .force_kernel_fence = true,
  827. },
  828. };
  829. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  830. {
  831. if (!hdr || (hdr->packet_type < HFI_CMD_SESSION_CVP_START)
  832. || hdr->packet_type >= (HFI_CMD_SESSION_CVP_START + MAX_PKT_IDX))
  833. return -EINVAL;
  834. if (cvp_hfi_defs[hdr->packet_type - HFI_CMD_SESSION_CVP_START].size)
  835. return (hdr->packet_type - HFI_CMD_SESSION_CVP_START);
  836. return -EINVAL;
  837. }
  838. int get_pkt_fenceoverride(struct cvp_hal_session_cmd_pkt* hdr)
  839. {
  840. return cvp_hfi_defs[hdr->packet_type - HFI_CMD_SESSION_CVP_START].force_kernel_fence;
  841. }
  842. int get_pkt_index_from_type(u32 pkt_type)
  843. {
  844. if ((pkt_type < HFI_CMD_SESSION_CVP_START) ||
  845. pkt_type >= (HFI_CMD_SESSION_CVP_START + MAX_PKT_IDX))
  846. return -EINVAL;
  847. if (cvp_hfi_defs[pkt_type - HFI_CMD_SESSION_CVP_START].size)
  848. return (pkt_type - HFI_CMD_SESSION_CVP_START);
  849. return -EINVAL;
  850. }
  851. MODULE_DEVICE_TABLE(of, msm_cvp_dt_match);
  852. int cvp_of_fdt_get_ddrtype(void)
  853. {
  854. #ifdef FIXED_DDR_TYPE
  855. /* of_fdt_get_ddrtype() is usually unavailable during pre-sil */
  856. return DDR_TYPE_LPDDR5;
  857. #else
  858. return of_fdt_get_ddrtype();
  859. #endif
  860. }
  861. void *cvp_get_drv_data(struct device *dev)
  862. {
  863. struct msm_cvp_platform_data *driver_data;
  864. const struct of_device_id *match;
  865. uint32_t ddr_type = DDR_TYPE_LPDDR5;
  866. driver_data = &default_data;
  867. if (!IS_ENABLED(CONFIG_OF) || !dev->of_node)
  868. goto exit;
  869. match = of_match_node(msm_cvp_dt_match, dev->of_node);
  870. if (!match)
  871. return NULL;
  872. driver_data = (struct msm_cvp_platform_data *)match->data;
  873. if (!strcmp(match->compatible, "qcom,waipio-cvp")) {
  874. ddr_type = cvp_of_fdt_get_ddrtype();
  875. if (ddr_type == -ENOENT) {
  876. dprintk(CVP_ERR,
  877. "Failed to get ddr type, use LPDDR5\n");
  878. }
  879. if (driver_data->ubwc_config &&
  880. (ddr_type == DDR_TYPE_LPDDR4 ||
  881. ddr_type == DDR_TYPE_LPDDR4X))
  882. driver_data->ubwc_config->highest_bank_bit = 15;
  883. dprintk(CVP_CORE, "DDR Type 0x%x hbb 0x%x\n",
  884. ddr_type, driver_data->ubwc_config ?
  885. driver_data->ubwc_config->highest_bank_bit : -1);
  886. }
  887. exit:
  888. return driver_data;
  889. }