qcedev.c 71 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI CE device driver.
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. */
  7. #include <linux/mman.h>
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/types.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/kernel.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/fs.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/scatterlist.h>
  23. #include <linux/crypto.h>
  24. #include "linux/platform_data/qcom_crypto_device.h"
  25. #include "linux/qcedev.h"
  26. #include <linux/interconnect.h>
  27. #include <crypto/hash.h>
  28. #include "qcedevi.h"
  29. #include "qce.h"
  30. #include "qcedev_smmu.h"
  31. #include "compat_qcedev.h"
  32. #include <linux/compat.h>
  33. #define CACHE_LINE_SIZE 64
  34. #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
  35. #define MAX_CEHW_REQ_TRANSFER_SIZE (128*32*1024)
  36. /* Max wait time once a crypt o request is done */
  37. #define MAX_CRYPTO_WAIT_TIME 1500
  38. static uint8_t _std_init_vector_sha1_uint8[] = {
  39. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  40. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  41. 0xC3, 0xD2, 0xE1, 0xF0
  42. };
  43. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  44. static uint8_t _std_init_vector_sha256_uint8[] = {
  45. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  46. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  47. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  48. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  49. };
  50. #define QCEDEV_CTX_KEY_MASK 0x000000ff
  51. #define QCEDEV_CTX_USE_HW_KEY 0x00000001
  52. #define QCEDEV_CTX_USE_PIPE_KEY 0x00000002
  53. // Key timer expiry for pipes 1-15 (Status3)
  54. #define PIPE_KEY_TIMER_EXPIRED_STATUS3_MASK 0x000000FF
  55. // Key timer expiry for pipes 16-19 (Status6)
  56. #define PIPE_KEY_TIMER_EXPIRED_STATUS6_MASK 0x00000003
  57. // Key pause for pipes 1-15 (Status3)
  58. #define PIPE_KEY_PAUSE_STATUS3_MASK 0xFF0000
  59. // Key pause for pipes 16-19 (Status6)
  60. #define PIPE_KEY_PAUSE_STATUS6_MASK 0x30000
  61. #define QCEDEV_STATUS1_ERR_INTR_MASK 0x10
  62. static DEFINE_MUTEX(send_cmd_lock);
  63. static DEFINE_MUTEX(qcedev_sent_bw_req);
  64. static DEFINE_MUTEX(hash_access_lock);
  65. static dev_t qcedev_device_no;
  66. static struct class *driver_class;
  67. static struct device *class_dev;
  68. static const struct of_device_id qcedev_match[] = {
  69. { .compatible = "qcom,qcedev"},
  70. { .compatible = "qcom,qcedev,context-bank"},
  71. {}
  72. };
  73. MODULE_DEVICE_TABLE(of, qcedev_match);
  74. static int qcedev_control_clocks(struct qcedev_control *podev, bool enable)
  75. {
  76. unsigned int control_flag;
  77. int ret = 0;
  78. if (podev->ce_support.req_bw_before_clk) {
  79. if (enable)
  80. control_flag = QCE_BW_REQUEST_FIRST;
  81. else
  82. control_flag = QCE_CLK_DISABLE_FIRST;
  83. } else {
  84. if (enable)
  85. control_flag = QCE_CLK_ENABLE_FIRST;
  86. else
  87. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  88. }
  89. switch (control_flag) {
  90. case QCE_CLK_ENABLE_FIRST:
  91. ret = qce_enable_clk(podev->qce);
  92. if (ret) {
  93. pr_err("%s Unable enable clk\n", __func__);
  94. return ret;
  95. }
  96. ret = icc_set_bw(podev->icc_path,
  97. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  98. if (ret) {
  99. pr_err("%s Unable to set high bw\n", __func__);
  100. ret = qce_disable_clk(podev->qce);
  101. if (ret)
  102. pr_err("%s Unable disable clk\n", __func__);
  103. return ret;
  104. }
  105. break;
  106. case QCE_BW_REQUEST_FIRST:
  107. ret = icc_set_bw(podev->icc_path,
  108. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  109. if (ret) {
  110. pr_err("%s Unable to set high bw\n", __func__);
  111. return ret;
  112. }
  113. ret = qce_enable_clk(podev->qce);
  114. if (ret) {
  115. pr_err("%s Unable enable clk\n", __func__);
  116. ret = icc_set_bw(podev->icc_path, 0, 0);
  117. if (ret)
  118. pr_err("%s Unable to set low bw\n", __func__);
  119. return ret;
  120. }
  121. break;
  122. case QCE_CLK_DISABLE_FIRST:
  123. ret = qce_disable_clk(podev->qce);
  124. if (ret) {
  125. pr_err("%s Unable to disable clk\n", __func__);
  126. return ret;
  127. }
  128. ret = icc_set_bw(podev->icc_path, 0, 0);
  129. if (ret) {
  130. pr_err("%s Unable to set low bw\n", __func__);
  131. ret = qce_enable_clk(podev->qce);
  132. if (ret)
  133. pr_err("%s Unable enable clk\n", __func__);
  134. return ret;
  135. }
  136. break;
  137. case QCE_BW_REQUEST_RESET_FIRST:
  138. ret = icc_set_bw(podev->icc_path, 0, 0);
  139. if (ret) {
  140. pr_err("%s Unable to set low bw\n", __func__);
  141. return ret;
  142. }
  143. ret = qce_disable_clk(podev->qce);
  144. if (ret) {
  145. pr_err("%s Unable to disable clk\n", __func__);
  146. ret = icc_set_bw(podev->icc_path,
  147. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  148. if (ret)
  149. pr_err("%s Unable to set high bw\n", __func__);
  150. return ret;
  151. }
  152. break;
  153. default:
  154. return -ENOENT;
  155. }
  156. return 0;
  157. }
  158. static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
  159. bool high_bw_req)
  160. {
  161. int ret = 0;
  162. mutex_lock(&qcedev_sent_bw_req);
  163. if (high_bw_req) {
  164. if (podev->high_bw_req_count == 0) {
  165. ret = qcedev_control_clocks(podev, true);
  166. if (ret)
  167. goto exit_unlock_mutex;
  168. }
  169. podev->high_bw_req_count++;
  170. } else {
  171. if (podev->high_bw_req_count == 1) {
  172. ret = qcedev_control_clocks(podev, false);
  173. if (ret)
  174. goto exit_unlock_mutex;
  175. }
  176. podev->high_bw_req_count--;
  177. }
  178. exit_unlock_mutex:
  179. mutex_unlock(&qcedev_sent_bw_req);
  180. }
  181. #define QCEDEV_MAGIC 0x56434544 /* "qced" */
  182. static int qcedev_open(struct inode *inode, struct file *file);
  183. static int qcedev_release(struct inode *inode, struct file *file);
  184. static int start_cipher_req(struct qcedev_control *podev,
  185. int *current_req_info);
  186. static int start_offload_cipher_req(struct qcedev_control *podev,
  187. int *current_req_info);
  188. static int start_sha_req(struct qcedev_control *podev,
  189. int *current_req_info);
  190. static const struct file_operations qcedev_fops = {
  191. .owner = THIS_MODULE,
  192. .unlocked_ioctl = qcedev_ioctl,
  193. #ifdef CONFIG_COMPAT
  194. .compat_ioctl = compat_qcedev_ioctl,
  195. #endif
  196. .open = qcedev_open,
  197. .release = qcedev_release,
  198. };
  199. static struct qcedev_control qce_dev[] = {
  200. {
  201. .magic = QCEDEV_MAGIC,
  202. },
  203. };
  204. #define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev)
  205. #define DEBUG_MAX_FNAME 16
  206. #define DEBUG_MAX_RW_BUF 1024
  207. struct qcedev_stat {
  208. u32 qcedev_dec_success;
  209. u32 qcedev_dec_fail;
  210. u32 qcedev_enc_success;
  211. u32 qcedev_enc_fail;
  212. u32 qcedev_sha_success;
  213. u32 qcedev_sha_fail;
  214. };
  215. static struct qcedev_stat _qcedev_stat;
  216. static struct dentry *_debug_dent;
  217. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  218. static int _debug_qcedev;
  219. static struct qcedev_control *qcedev_minor_to_control(unsigned int n)
  220. {
  221. int i;
  222. for (i = 0; i < MAX_QCE_DEVICE; i++) {
  223. if (qce_dev[i].minor == n)
  224. return &qce_dev[n];
  225. }
  226. return NULL;
  227. }
  228. static int qcedev_open(struct inode *inode, struct file *file)
  229. {
  230. struct qcedev_handle *handle;
  231. struct qcedev_control *podev;
  232. podev = qcedev_minor_to_control(MINOR(inode->i_rdev));
  233. if (podev == NULL) {
  234. pr_err("%s: no such device %d\n", __func__,
  235. MINOR(inode->i_rdev));
  236. return -ENOENT;
  237. }
  238. handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL);
  239. if (handle == NULL)
  240. return -ENOMEM;
  241. handle->cntl = podev;
  242. file->private_data = handle;
  243. qcedev_ce_high_bw_req(podev, true);
  244. mutex_init(&handle->registeredbufs.lock);
  245. INIT_LIST_HEAD(&handle->registeredbufs.list);
  246. return 0;
  247. }
  248. static int qcedev_release(struct inode *inode, struct file *file)
  249. {
  250. struct qcedev_control *podev;
  251. struct qcedev_handle *handle;
  252. handle = file->private_data;
  253. podev = handle->cntl;
  254. if (podev != NULL && podev->magic != QCEDEV_MAGIC) {
  255. pr_err("%s: invalid handle %pK\n",
  256. __func__, podev);
  257. }
  258. qcedev_ce_high_bw_req(podev, false);
  259. if (qcedev_unmap_all_buffers(handle))
  260. pr_err("%s: failed to unmap all ion buffers\n", __func__);
  261. kfree_sensitive(handle);
  262. file->private_data = NULL;
  263. return 0;
  264. }
  265. static void req_done(unsigned long data)
  266. {
  267. struct qcedev_control *podev = (struct qcedev_control *)data;
  268. struct qcedev_async_req *areq;
  269. unsigned long flags = 0;
  270. struct qcedev_async_req *new_req = NULL;
  271. int ret = 0;
  272. int current_req_info = 0;
  273. spin_lock_irqsave(&podev->lock, flags);
  274. areq = podev->active_command;
  275. podev->active_command = NULL;
  276. again:
  277. if (!list_empty(&podev->ready_commands)) {
  278. new_req = container_of(podev->ready_commands.next,
  279. struct qcedev_async_req, list);
  280. list_del(&new_req->list);
  281. podev->active_command = new_req;
  282. new_req->err = 0;
  283. if (new_req->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
  284. ret = start_cipher_req(podev, &current_req_info);
  285. else if (new_req->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER)
  286. ret = start_offload_cipher_req(podev, &current_req_info);
  287. else
  288. ret = start_sha_req(podev, &current_req_info);
  289. }
  290. spin_unlock_irqrestore(&podev->lock, flags);
  291. if (areq)
  292. complete(&areq->complete);
  293. if (new_req && ret) {
  294. complete(&new_req->complete);
  295. spin_lock_irqsave(&podev->lock, flags);
  296. podev->active_command = NULL;
  297. areq = NULL;
  298. ret = 0;
  299. new_req = NULL;
  300. goto again;
  301. }
  302. }
  303. void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
  304. unsigned char *authdata, int ret)
  305. {
  306. struct qcedev_sha_req *areq;
  307. struct qcedev_control *pdev;
  308. struct qcedev_handle *handle;
  309. uint32_t *auth32 = (uint32_t *)authdata;
  310. areq = (struct qcedev_sha_req *) cookie;
  311. handle = (struct qcedev_handle *) areq->cookie;
  312. pdev = handle->cntl;
  313. if (digest)
  314. memcpy(&handle->sha_ctxt.digest[0], digest, 32);
  315. if (authdata) {
  316. handle->sha_ctxt.auth_data[0] = auth32[0];
  317. handle->sha_ctxt.auth_data[1] = auth32[1];
  318. }
  319. tasklet_schedule(&pdev->done_tasklet);
  320. };
  321. void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
  322. unsigned char *iv, int ret)
  323. {
  324. struct qcedev_cipher_req *areq;
  325. struct qcedev_handle *handle;
  326. struct qcedev_control *podev;
  327. struct qcedev_async_req *qcedev_areq;
  328. areq = (struct qcedev_cipher_req *) cookie;
  329. handle = (struct qcedev_handle *) areq->cookie;
  330. podev = handle->cntl;
  331. qcedev_areq = podev->active_command;
  332. if (iv)
  333. memcpy(&qcedev_areq->cipher_op_req.iv[0], iv,
  334. qcedev_areq->cipher_op_req.ivlen);
  335. tasklet_schedule(&podev->done_tasklet);
  336. };
  337. static int start_cipher_req(struct qcedev_control *podev,
  338. int *current_req_info)
  339. {
  340. struct qcedev_async_req *qcedev_areq;
  341. struct qce_req creq;
  342. int ret = 0;
  343. /* start the command on the podev->active_command */
  344. qcedev_areq = podev->active_command;
  345. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  346. if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) {
  347. pr_err("%s: Use of PMEM is not supported\n", __func__);
  348. goto unsupported;
  349. }
  350. creq.pmem = NULL;
  351. switch (qcedev_areq->cipher_op_req.alg) {
  352. case QCEDEV_ALG_DES:
  353. creq.alg = CIPHER_ALG_DES;
  354. break;
  355. case QCEDEV_ALG_3DES:
  356. creq.alg = CIPHER_ALG_3DES;
  357. break;
  358. case QCEDEV_ALG_AES:
  359. creq.alg = CIPHER_ALG_AES;
  360. break;
  361. default:
  362. return -EINVAL;
  363. }
  364. switch (qcedev_areq->cipher_op_req.mode) {
  365. case QCEDEV_AES_MODE_CBC:
  366. case QCEDEV_DES_MODE_CBC:
  367. creq.mode = QCE_MODE_CBC;
  368. break;
  369. case QCEDEV_AES_MODE_ECB:
  370. case QCEDEV_DES_MODE_ECB:
  371. creq.mode = QCE_MODE_ECB;
  372. break;
  373. case QCEDEV_AES_MODE_CTR:
  374. creq.mode = QCE_MODE_CTR;
  375. break;
  376. case QCEDEV_AES_MODE_XTS:
  377. creq.mode = QCE_MODE_XTS;
  378. break;
  379. default:
  380. return -EINVAL;
  381. }
  382. if ((creq.alg == CIPHER_ALG_AES) &&
  383. (creq.mode == QCE_MODE_CTR)) {
  384. creq.dir = QCE_ENCRYPT;
  385. } else {
  386. if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC)
  387. creq.dir = QCE_ENCRYPT;
  388. else
  389. creq.dir = QCE_DECRYPT;
  390. }
  391. creq.iv = &qcedev_areq->cipher_op_req.iv[0];
  392. creq.ivsize = qcedev_areq->cipher_op_req.ivlen;
  393. creq.enckey = &qcedev_areq->cipher_op_req.enckey[0];
  394. creq.encklen = qcedev_areq->cipher_op_req.encklen;
  395. creq.cryptlen = qcedev_areq->cipher_op_req.data_len;
  396. if (qcedev_areq->cipher_op_req.encklen == 0) {
  397. if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY)
  398. || (qcedev_areq->cipher_op_req.op ==
  399. QCEDEV_OPER_DEC_NO_KEY))
  400. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  401. else {
  402. int i;
  403. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  404. if (qcedev_areq->cipher_op_req.enckey[i] != 0)
  405. break;
  406. }
  407. if ((podev->platform_support.hw_key_support == 1) &&
  408. (i == QCEDEV_MAX_KEY_SIZE))
  409. creq.op = QCE_REQ_ABLK_CIPHER;
  410. else {
  411. ret = -EINVAL;
  412. goto unsupported;
  413. }
  414. }
  415. } else {
  416. creq.op = QCE_REQ_ABLK_CIPHER;
  417. }
  418. creq.qce_cb = qcedev_cipher_req_cb;
  419. creq.areq = (void *)&qcedev_areq->cipher_req;
  420. creq.flags = 0;
  421. creq.offload_op = 0;
  422. ret = qce_ablk_cipher_req(podev->qce, &creq);
  423. *current_req_info = creq.current_req_info;
  424. unsupported:
  425. qcedev_areq->err = ret ? -ENXIO : 0;
  426. return ret;
  427. };
  428. void qcedev_offload_cipher_req_cb(void *cookie, unsigned char *icv,
  429. unsigned char *iv, int ret)
  430. {
  431. struct qcedev_cipher_req *areq;
  432. struct qcedev_handle *handle;
  433. struct qcedev_control *podev;
  434. struct qcedev_async_req *qcedev_areq;
  435. areq = (struct qcedev_cipher_req *) cookie;
  436. handle = (struct qcedev_handle *) areq->cookie;
  437. podev = handle->cntl;
  438. qcedev_areq = podev->active_command;
  439. if (iv)
  440. memcpy(&qcedev_areq->offload_cipher_op_req.iv[0], iv,
  441. qcedev_areq->offload_cipher_op_req.ivlen);
  442. tasklet_schedule(&podev->done_tasklet);
  443. }
  444. static int start_offload_cipher_req(struct qcedev_control *podev,
  445. int *current_req_info)
  446. {
  447. struct qcedev_async_req *qcedev_areq;
  448. struct qce_req creq;
  449. u8 patt_sz = 0, proc_data_sz = 0;
  450. int ret = 0;
  451. memset(&creq, 0, sizeof(creq));
  452. /* Start the command on the podev->active_command */
  453. qcedev_areq = podev->active_command;
  454. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  455. switch (qcedev_areq->offload_cipher_op_req.alg) {
  456. case QCEDEV_ALG_AES:
  457. creq.alg = CIPHER_ALG_AES;
  458. break;
  459. default:
  460. return -EINVAL;
  461. }
  462. switch (qcedev_areq->offload_cipher_op_req.mode) {
  463. case QCEDEV_AES_MODE_CBC:
  464. creq.mode = QCE_MODE_CBC;
  465. break;
  466. case QCEDEV_AES_MODE_CTR:
  467. creq.mode = QCE_MODE_CTR;
  468. break;
  469. default:
  470. return -EINVAL;
  471. }
  472. if (qcedev_areq->offload_cipher_op_req.is_copy_op) {
  473. creq.dir = QCE_ENCRYPT;
  474. } else {
  475. switch(qcedev_areq->offload_cipher_op_req.op) {
  476. case QCEDEV_OFFLOAD_HLOS_HLOS:
  477. case QCEDEV_OFFLOAD_HLOS_CPB:
  478. creq.dir = QCE_DECRYPT;
  479. break;
  480. case QCEDEV_OFFLOAD_CPB_HLOS:
  481. creq.dir = QCE_ENCRYPT;
  482. break;
  483. default:
  484. return -EINVAL;
  485. }
  486. }
  487. creq.iv = &qcedev_areq->offload_cipher_op_req.iv[0];
  488. creq.ivsize = qcedev_areq->offload_cipher_op_req.ivlen;
  489. creq.iv_ctr_size = qcedev_areq->offload_cipher_op_req.iv_ctr_size;
  490. creq.encklen = qcedev_areq->offload_cipher_op_req.encklen;
  491. /* OFFLOAD use cases use PIPE keys so no need to set keys */
  492. creq.flags = QCEDEV_CTX_USE_PIPE_KEY;
  493. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  494. creq.offload_op = (int)qcedev_areq->offload_cipher_op_req.op;
  495. if (qcedev_areq->offload_cipher_op_req.is_copy_op)
  496. creq.is_copy_op = true;
  497. creq.cryptlen = qcedev_areq->offload_cipher_op_req.data_len;
  498. creq.qce_cb = qcedev_offload_cipher_req_cb;
  499. creq.areq = (void *)&qcedev_areq->cipher_req;
  500. patt_sz = qcedev_areq->offload_cipher_op_req.pattern_info.patt_sz;
  501. proc_data_sz =
  502. qcedev_areq->offload_cipher_op_req.pattern_info.proc_data_sz;
  503. creq.is_pattern_valid =
  504. qcedev_areq->offload_cipher_op_req.is_pattern_valid;
  505. if (creq.is_pattern_valid) {
  506. creq.pattern_info = 0x1;
  507. if (patt_sz)
  508. creq.pattern_info |= (patt_sz - 1) << 4;
  509. if (proc_data_sz)
  510. creq.pattern_info |= (proc_data_sz - 1) << 8;
  511. creq.pattern_info |=
  512. qcedev_areq->offload_cipher_op_req.pattern_info.patt_offset << 12;
  513. }
  514. creq.block_offset = qcedev_areq->offload_cipher_op_req.block_offset;
  515. ret = qce_ablk_cipher_req(podev->qce, &creq);
  516. *current_req_info = creq.current_req_info;
  517. qcedev_areq->err = ret ? -ENXIO : 0;
  518. return ret;
  519. }
  520. static int start_sha_req(struct qcedev_control *podev,
  521. int *current_req_info)
  522. {
  523. struct qcedev_async_req *qcedev_areq;
  524. struct qce_sha_req sreq;
  525. int ret = 0;
  526. struct qcedev_handle *handle;
  527. /* start the command on the podev->active_command */
  528. qcedev_areq = podev->active_command;
  529. handle = qcedev_areq->handle;
  530. switch (qcedev_areq->sha_op_req.alg) {
  531. case QCEDEV_ALG_SHA1:
  532. sreq.alg = QCE_HASH_SHA1;
  533. break;
  534. case QCEDEV_ALG_SHA256:
  535. sreq.alg = QCE_HASH_SHA256;
  536. break;
  537. case QCEDEV_ALG_SHA1_HMAC:
  538. if (podev->ce_support.sha_hmac) {
  539. sreq.alg = QCE_HASH_SHA1_HMAC;
  540. sreq.authkey = &handle->sha_ctxt.authkey[0];
  541. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  542. } else {
  543. sreq.alg = QCE_HASH_SHA1;
  544. sreq.authkey = NULL;
  545. }
  546. break;
  547. case QCEDEV_ALG_SHA256_HMAC:
  548. if (podev->ce_support.sha_hmac) {
  549. sreq.alg = QCE_HASH_SHA256_HMAC;
  550. sreq.authkey = &handle->sha_ctxt.authkey[0];
  551. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  552. } else {
  553. sreq.alg = QCE_HASH_SHA256;
  554. sreq.authkey = NULL;
  555. }
  556. break;
  557. case QCEDEV_ALG_AES_CMAC:
  558. sreq.alg = QCE_HASH_AES_CMAC;
  559. sreq.authkey = &handle->sha_ctxt.authkey[0];
  560. sreq.authklen = qcedev_areq->sha_op_req.authklen;
  561. break;
  562. default:
  563. pr_err("Algorithm %d not supported, exiting\n",
  564. qcedev_areq->sha_op_req.alg);
  565. return -EINVAL;
  566. }
  567. qcedev_areq->sha_req.cookie = handle;
  568. sreq.qce_cb = qcedev_sha_req_cb;
  569. if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) {
  570. sreq.auth_data[0] = handle->sha_ctxt.auth_data[0];
  571. sreq.auth_data[1] = handle->sha_ctxt.auth_data[1];
  572. sreq.auth_data[2] = handle->sha_ctxt.auth_data[2];
  573. sreq.auth_data[3] = handle->sha_ctxt.auth_data[3];
  574. sreq.digest = &handle->sha_ctxt.digest[0];
  575. sreq.first_blk = handle->sha_ctxt.first_blk;
  576. sreq.last_blk = handle->sha_ctxt.last_blk;
  577. }
  578. sreq.size = qcedev_areq->sha_req.sreq.nbytes;
  579. sreq.src = qcedev_areq->sha_req.sreq.src;
  580. sreq.areq = (void *)&qcedev_areq->sha_req;
  581. sreq.flags = 0;
  582. ret = qce_process_sha_req(podev->qce, &sreq);
  583. *current_req_info = sreq.current_req_info;
  584. qcedev_areq->err = ret ? -ENXIO : 0;
  585. return ret;
  586. };
  587. static void qcedev_check_crypto_status(
  588. struct qcedev_async_req *qcedev_areq, void *handle,
  589. bool print_err)
  590. {
  591. unsigned int s1, s2, s3, s4, s5, s6;
  592. qcedev_areq->offload_cipher_op_req.err = QCEDEV_OFFLOAD_NO_ERROR;
  593. qce_get_crypto_status(handle, &s1, &s2, &s3, &s4, &s5, &s6);
  594. if (print_err) {
  595. pr_err("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  596. s1, s2, s3, s4, s5, s6);
  597. }
  598. // Check for key timer expiry
  599. if ((s6 & PIPE_KEY_TIMER_EXPIRED_STATUS6_MASK) ||
  600. (s3 & PIPE_KEY_TIMER_EXPIRED_STATUS3_MASK)) {
  601. pr_info("%s: crypto timer expired\n", __func__);
  602. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  603. s1, s2, s3, s4, s5, s6);
  604. qcedev_areq->offload_cipher_op_req.err =
  605. QCEDEV_OFFLOAD_KEY_TIMER_EXPIRED_ERROR;
  606. return;
  607. }
  608. // Check for key pause
  609. if ((s6 & PIPE_KEY_PAUSE_STATUS6_MASK) ||
  610. (s3 & PIPE_KEY_PAUSE_STATUS3_MASK)) {
  611. pr_info("%s: crypto key paused\n", __func__);
  612. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  613. s1, s2, s3, s4, s5, s6);
  614. qcedev_areq->offload_cipher_op_req.err =
  615. QCEDEV_OFFLOAD_KEY_PAUSE_ERROR;
  616. return;
  617. }
  618. // Check for generic error
  619. if (s1 & QCEDEV_STATUS1_ERR_INTR_MASK) {
  620. pr_err("%s: generic crypto error\n", __func__);
  621. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  622. s1, s2, s3, s4, s5, s6);
  623. qcedev_areq->offload_cipher_op_req.err =
  624. QCEDEV_OFFLOAD_GENERIC_ERROR;
  625. return;
  626. }
  627. }
  628. static int submit_req(struct qcedev_async_req *qcedev_areq,
  629. struct qcedev_handle *handle)
  630. {
  631. struct qcedev_control *podev;
  632. unsigned long flags = 0;
  633. int ret = 0;
  634. struct qcedev_stat *pstat;
  635. int current_req_info = 0;
  636. int wait = 0;
  637. bool print_sts = false;
  638. qcedev_areq->err = 0;
  639. podev = handle->cntl;
  640. spin_lock_irqsave(&podev->lock, flags);
  641. if (podev->active_command == NULL) {
  642. podev->active_command = qcedev_areq;
  643. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
  644. ret = start_cipher_req(podev, &current_req_info);
  645. else if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER)
  646. ret = start_offload_cipher_req(podev, &current_req_info);
  647. else
  648. ret = start_sha_req(podev, &current_req_info);
  649. } else {
  650. list_add_tail(&qcedev_areq->list, &podev->ready_commands);
  651. }
  652. if (ret != 0)
  653. podev->active_command = NULL;
  654. spin_unlock_irqrestore(&podev->lock, flags);
  655. if (ret == 0)
  656. wait = wait_for_completion_timeout(&qcedev_areq->complete,
  657. msecs_to_jiffies(MAX_CRYPTO_WAIT_TIME));
  658. if (!wait) {
  659. /*
  660. * This means wait timed out, and the callback routine was not
  661. * exercised. The callback sequence does some housekeeping which
  662. * would be missed here, hence having a call to qce here to do
  663. * that.
  664. */
  665. pr_err("%s: wait timed out, req info = %d\n", __func__,
  666. current_req_info);
  667. print_sts = true;
  668. qcedev_check_crypto_status(qcedev_areq, podev->qce, print_sts);
  669. qce_manage_timeout(podev->qce, current_req_info);
  670. if (qcedev_areq->offload_cipher_op_req.err !=
  671. QCEDEV_OFFLOAD_NO_ERROR)
  672. return 0;
  673. }
  674. if (ret)
  675. qcedev_areq->err = -EIO;
  676. pstat = &_qcedev_stat;
  677. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) {
  678. switch (qcedev_areq->cipher_op_req.op) {
  679. case QCEDEV_OPER_DEC:
  680. if (qcedev_areq->err)
  681. pstat->qcedev_dec_fail++;
  682. else
  683. pstat->qcedev_dec_success++;
  684. break;
  685. case QCEDEV_OPER_ENC:
  686. if (qcedev_areq->err)
  687. pstat->qcedev_enc_fail++;
  688. else
  689. pstat->qcedev_enc_success++;
  690. break;
  691. default:
  692. break;
  693. }
  694. } else if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER) {
  695. //Do nothing
  696. } else {
  697. if (qcedev_areq->err)
  698. pstat->qcedev_sha_fail++;
  699. else
  700. pstat->qcedev_sha_success++;
  701. }
  702. return qcedev_areq->err;
  703. }
  704. static int qcedev_sha_init(struct qcedev_async_req *areq,
  705. struct qcedev_handle *handle)
  706. {
  707. struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt;
  708. memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt));
  709. sha_ctxt->first_blk = 1;
  710. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  711. (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) {
  712. memcpy(&sha_ctxt->digest[0],
  713. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  714. sha_ctxt->diglen = SHA1_DIGEST_SIZE;
  715. } else {
  716. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) ||
  717. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) {
  718. memcpy(&sha_ctxt->digest[0],
  719. &_std_init_vector_sha256_uint8[0],
  720. SHA256_DIGEST_SIZE);
  721. sha_ctxt->diglen = SHA256_DIGEST_SIZE;
  722. }
  723. }
  724. sha_ctxt->init_done = true;
  725. return 0;
  726. }
  727. static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq,
  728. struct qcedev_handle *handle,
  729. struct scatterlist *sg_src)
  730. {
  731. int err = 0;
  732. int i = 0;
  733. uint32_t total;
  734. uint8_t *user_src = NULL;
  735. uint8_t *k_src = NULL;
  736. uint8_t *k_buf_src = NULL;
  737. uint8_t *k_align_src = NULL;
  738. uint32_t sha_pad_len = 0;
  739. uint32_t trailing_buf_len = 0;
  740. uint32_t t_buf = handle->sha_ctxt.trailing_buf_len;
  741. uint32_t sha_block_size;
  742. total = qcedev_areq->sha_op_req.data_len + t_buf;
  743. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1)
  744. sha_block_size = SHA1_BLOCK_SIZE;
  745. else
  746. sha_block_size = SHA256_BLOCK_SIZE;
  747. if (total <= sha_block_size) {
  748. uint32_t len = qcedev_areq->sha_op_req.data_len;
  749. i = 0;
  750. k_src = &handle->sha_ctxt.trailing_buf[t_buf];
  751. /* Copy data from user src(s) */
  752. while (len > 0) {
  753. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  754. if (user_src && copy_from_user(k_src,
  755. (void __user *)user_src,
  756. qcedev_areq->sha_op_req.data[i].len))
  757. return -EFAULT;
  758. len -= qcedev_areq->sha_op_req.data[i].len;
  759. k_src += qcedev_areq->sha_op_req.data[i].len;
  760. i++;
  761. }
  762. handle->sha_ctxt.trailing_buf_len = total;
  763. return 0;
  764. }
  765. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
  766. GFP_KERNEL);
  767. if (k_buf_src == NULL)
  768. return -ENOMEM;
  769. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  770. CACHE_LINE_SIZE);
  771. k_src = k_align_src;
  772. /* check for trailing buffer from previous updates and append it */
  773. if (t_buf > 0) {
  774. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  775. t_buf);
  776. k_src += t_buf;
  777. }
  778. /* Copy data from user src(s) */
  779. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  780. if (user_src && copy_from_user(k_src,
  781. (void __user *)user_src,
  782. qcedev_areq->sha_op_req.data[0].len)) {
  783. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  784. kfree(k_buf_src);
  785. return -EFAULT;
  786. }
  787. k_src += qcedev_areq->sha_op_req.data[0].len;
  788. for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) {
  789. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  790. if (user_src && copy_from_user(k_src,
  791. (void __user *)user_src,
  792. qcedev_areq->sha_op_req.data[i].len)) {
  793. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  794. kfree(k_buf_src);
  795. return -EFAULT;
  796. }
  797. k_src += qcedev_areq->sha_op_req.data[i].len;
  798. }
  799. /* get new trailing buffer */
  800. sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total;
  801. trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len;
  802. qcedev_areq->sha_req.sreq.src = sg_src;
  803. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src,
  804. total-trailing_buf_len);
  805. qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len;
  806. /* update sha_ctxt trailing buf content to new trailing buf */
  807. if (trailing_buf_len > 0) {
  808. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  809. memcpy(&handle->sha_ctxt.trailing_buf[0],
  810. (k_src - trailing_buf_len),
  811. trailing_buf_len);
  812. }
  813. handle->sha_ctxt.trailing_buf_len = trailing_buf_len;
  814. err = submit_req(qcedev_areq, handle);
  815. handle->sha_ctxt.last_blk = 0;
  816. handle->sha_ctxt.first_blk = 0;
  817. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  818. kfree(k_buf_src);
  819. return err;
  820. }
  821. static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq,
  822. struct qcedev_handle *handle,
  823. struct scatterlist *sg_src)
  824. {
  825. int err = 0;
  826. int i = 0;
  827. int j = 0;
  828. int k = 0;
  829. int num_entries = 0;
  830. uint32_t total = 0;
  831. if (!handle->sha_ctxt.init_done) {
  832. pr_err("%s Init was not called\n", __func__);
  833. return -EINVAL;
  834. }
  835. if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) {
  836. struct qcedev_sha_op_req *saved_req;
  837. struct qcedev_sha_op_req req;
  838. struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req;
  839. /* save the original req structure */
  840. saved_req =
  841. kmalloc(sizeof(struct qcedev_sha_op_req), GFP_KERNEL);
  842. if (saved_req == NULL) {
  843. pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n",
  844. __func__, (uintptr_t)saved_req);
  845. return -ENOMEM;
  846. }
  847. memcpy(&req, sreq, sizeof(struct qcedev_sha_op_req));
  848. memcpy(saved_req, sreq, sizeof(struct qcedev_sha_op_req));
  849. i = 0;
  850. /* Address 32 KB at a time */
  851. while ((i < req.entries) && (err == 0)) {
  852. if (sreq->data[i].len > QCE_MAX_OPER_DATA) {
  853. sreq->data[0].len = QCE_MAX_OPER_DATA;
  854. if (i > 0) {
  855. sreq->data[0].vaddr =
  856. sreq->data[i].vaddr;
  857. }
  858. sreq->data_len = QCE_MAX_OPER_DATA;
  859. sreq->entries = 1;
  860. err = qcedev_sha_update_max_xfer(qcedev_areq,
  861. handle, sg_src);
  862. sreq->data[i].len = req.data[i].len -
  863. QCE_MAX_OPER_DATA;
  864. sreq->data[i].vaddr = req.data[i].vaddr +
  865. QCE_MAX_OPER_DATA;
  866. req.data[i].vaddr = sreq->data[i].vaddr;
  867. req.data[i].len = sreq->data[i].len;
  868. } else {
  869. total = 0;
  870. for (j = i; j < req.entries; j++) {
  871. num_entries++;
  872. if ((total + sreq->data[j].len) >=
  873. QCE_MAX_OPER_DATA) {
  874. sreq->data[j].len =
  875. (QCE_MAX_OPER_DATA - total);
  876. total = QCE_MAX_OPER_DATA;
  877. break;
  878. }
  879. total += sreq->data[j].len;
  880. }
  881. sreq->data_len = total;
  882. if (i > 0)
  883. for (k = 0; k < num_entries; k++) {
  884. sreq->data[k].len =
  885. sreq->data[i+k].len;
  886. sreq->data[k].vaddr =
  887. sreq->data[i+k].vaddr;
  888. }
  889. sreq->entries = num_entries;
  890. i = j;
  891. err = qcedev_sha_update_max_xfer(qcedev_areq,
  892. handle, sg_src);
  893. num_entries = 0;
  894. sreq->data[i].vaddr = req.data[i].vaddr +
  895. sreq->data[i].len;
  896. sreq->data[i].len = req.data[i].len -
  897. sreq->data[i].len;
  898. req.data[i].vaddr = sreq->data[i].vaddr;
  899. req.data[i].len = sreq->data[i].len;
  900. if (sreq->data[i].len == 0)
  901. i++;
  902. }
  903. } /* end of while ((i < req.entries) && (err == 0)) */
  904. /* Restore the original req structure */
  905. for (i = 0; i < saved_req->entries; i++) {
  906. sreq->data[i].len = saved_req->data[i].len;
  907. sreq->data[i].vaddr = saved_req->data[i].vaddr;
  908. }
  909. sreq->entries = saved_req->entries;
  910. sreq->data_len = saved_req->data_len;
  911. memset(saved_req, 0, ksize((void *)saved_req));
  912. kfree(saved_req);
  913. } else
  914. err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src);
  915. return err;
  916. }
  917. static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq,
  918. struct qcedev_handle *handle)
  919. {
  920. int err = 0;
  921. struct scatterlist sg_src;
  922. uint32_t total;
  923. uint8_t *k_buf_src = NULL;
  924. uint8_t *k_align_src = NULL;
  925. if (!handle->sha_ctxt.init_done) {
  926. pr_err("%s Init was not called\n", __func__);
  927. return -EINVAL;
  928. }
  929. handle->sha_ctxt.last_blk = 1;
  930. total = handle->sha_ctxt.trailing_buf_len;
  931. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
  932. GFP_KERNEL);
  933. if (k_buf_src == NULL)
  934. return -ENOMEM;
  935. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  936. CACHE_LINE_SIZE);
  937. memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total);
  938. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  939. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src, total);
  940. qcedev_areq->sha_req.sreq.nbytes = total;
  941. err = submit_req(qcedev_areq, handle);
  942. handle->sha_ctxt.first_blk = 0;
  943. handle->sha_ctxt.last_blk = 0;
  944. handle->sha_ctxt.auth_data[0] = 0;
  945. handle->sha_ctxt.auth_data[1] = 0;
  946. handle->sha_ctxt.trailing_buf_len = 0;
  947. handle->sha_ctxt.init_done = false;
  948. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  949. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  950. kfree(k_buf_src);
  951. qcedev_areq->sha_req.sreq.src = NULL;
  952. return err;
  953. }
  954. static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq,
  955. struct qcedev_handle *handle,
  956. struct scatterlist *sg_src)
  957. {
  958. int err = 0;
  959. int i = 0;
  960. uint32_t total;
  961. uint8_t *user_src = NULL;
  962. uint8_t *k_src = NULL;
  963. uint8_t *k_buf_src = NULL;
  964. total = qcedev_areq->sha_op_req.data_len;
  965. if ((qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_128) &&
  966. (qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_256)) {
  967. pr_err("%s: unsupported key length\n", __func__);
  968. return -EINVAL;
  969. }
  970. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  971. (void __user *)qcedev_areq->sha_op_req.authkey,
  972. qcedev_areq->sha_op_req.authklen))
  973. return -EFAULT;
  974. if (total > U32_MAX - CACHE_LINE_SIZE * 2)
  975. return -EINVAL;
  976. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2, GFP_KERNEL);
  977. if (k_buf_src == NULL)
  978. return -ENOMEM;
  979. k_src = k_buf_src;
  980. /* Copy data from user src(s) */
  981. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  982. for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) {
  983. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  984. if (user_src && copy_from_user(k_src, (void __user *)user_src,
  985. qcedev_areq->sha_op_req.data[i].len)) {
  986. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  987. kfree(k_buf_src);
  988. return -EFAULT;
  989. }
  990. k_src += qcedev_areq->sha_op_req.data[i].len;
  991. }
  992. qcedev_areq->sha_req.sreq.src = sg_src;
  993. sg_init_one(qcedev_areq->sha_req.sreq.src, k_buf_src, total);
  994. qcedev_areq->sha_req.sreq.nbytes = total;
  995. handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen;
  996. err = submit_req(qcedev_areq, handle);
  997. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  998. kfree(k_buf_src);
  999. return err;
  1000. }
  1001. static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq,
  1002. struct qcedev_handle *handle,
  1003. struct scatterlist *sg_src)
  1004. {
  1005. int err = 0;
  1006. if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) {
  1007. qcedev_sha_init(areq, handle);
  1008. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  1009. (void __user *)areq->sha_op_req.authkey,
  1010. areq->sha_op_req.authklen))
  1011. return -EFAULT;
  1012. } else {
  1013. struct qcedev_async_req authkey_areq;
  1014. uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
  1015. init_completion(&authkey_areq.complete);
  1016. authkey_areq.sha_op_req.entries = 1;
  1017. authkey_areq.sha_op_req.data[0].vaddr =
  1018. areq->sha_op_req.authkey;
  1019. authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen;
  1020. authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen;
  1021. authkey_areq.sha_op_req.diglen = 0;
  1022. authkey_areq.handle = handle;
  1023. memset(&authkey_areq.sha_op_req.digest[0], 0,
  1024. QCEDEV_MAX_SHA_DIGEST);
  1025. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1026. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1;
  1027. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)
  1028. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256;
  1029. authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1030. qcedev_sha_init(&authkey_areq, handle);
  1031. err = qcedev_sha_update(&authkey_areq, handle, sg_src);
  1032. if (!err)
  1033. err = qcedev_sha_final(&authkey_areq, handle);
  1034. else
  1035. return err;
  1036. memcpy(&authkey[0], &handle->sha_ctxt.digest[0],
  1037. handle->sha_ctxt.diglen);
  1038. qcedev_sha_init(areq, handle);
  1039. memcpy(&handle->sha_ctxt.authkey[0], &authkey[0],
  1040. handle->sha_ctxt.diglen);
  1041. }
  1042. return err;
  1043. }
  1044. static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq,
  1045. struct qcedev_handle *handle)
  1046. {
  1047. int err = 0;
  1048. struct scatterlist sg_src;
  1049. uint8_t *k_src = NULL;
  1050. uint32_t sha_block_size = 0;
  1051. uint32_t sha_digest_size = 0;
  1052. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1053. sha_digest_size = SHA1_DIGEST_SIZE;
  1054. sha_block_size = SHA1_BLOCK_SIZE;
  1055. } else {
  1056. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1057. sha_digest_size = SHA256_DIGEST_SIZE;
  1058. sha_block_size = SHA256_BLOCK_SIZE;
  1059. }
  1060. }
  1061. k_src = kmalloc(sha_block_size, GFP_KERNEL);
  1062. if (k_src == NULL)
  1063. return -ENOMEM;
  1064. /* check for trailing buffer from previous updates and append it */
  1065. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  1066. handle->sha_ctxt.trailing_buf_len);
  1067. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  1068. sg_init_one(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size);
  1069. qcedev_areq->sha_req.sreq.nbytes = sha_block_size;
  1070. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1071. memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0],
  1072. sha_digest_size);
  1073. handle->sha_ctxt.trailing_buf_len = sha_digest_size;
  1074. handle->sha_ctxt.first_blk = 1;
  1075. handle->sha_ctxt.last_blk = 0;
  1076. handle->sha_ctxt.auth_data[0] = 0;
  1077. handle->sha_ctxt.auth_data[1] = 0;
  1078. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1079. memcpy(&handle->sha_ctxt.digest[0],
  1080. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  1081. handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE;
  1082. }
  1083. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1084. memcpy(&handle->sha_ctxt.digest[0],
  1085. &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE);
  1086. handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE;
  1087. }
  1088. err = submit_req(qcedev_areq, handle);
  1089. handle->sha_ctxt.last_blk = 0;
  1090. handle->sha_ctxt.first_blk = 0;
  1091. memset(k_src, 0, ksize((void *)k_src));
  1092. kfree(k_src);
  1093. qcedev_areq->sha_req.sreq.src = NULL;
  1094. return err;
  1095. }
  1096. static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq,
  1097. struct qcedev_handle *handle, bool ikey)
  1098. {
  1099. int i;
  1100. uint32_t constant;
  1101. uint32_t sha_block_size;
  1102. if (ikey)
  1103. constant = 0x36;
  1104. else
  1105. constant = 0x5c;
  1106. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1107. sha_block_size = SHA1_BLOCK_SIZE;
  1108. else
  1109. sha_block_size = SHA256_BLOCK_SIZE;
  1110. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1111. for (i = 0; i < sha_block_size; i++)
  1112. handle->sha_ctxt.trailing_buf[i] =
  1113. (handle->sha_ctxt.authkey[i] ^ constant);
  1114. handle->sha_ctxt.trailing_buf_len = sha_block_size;
  1115. return 0;
  1116. }
  1117. static int qcedev_hmac_init(struct qcedev_async_req *areq,
  1118. struct qcedev_handle *handle,
  1119. struct scatterlist *sg_src)
  1120. {
  1121. int err;
  1122. struct qcedev_control *podev = handle->cntl;
  1123. err = qcedev_set_hmac_auth_key(areq, handle, sg_src);
  1124. if (err)
  1125. return err;
  1126. if (!podev->ce_support.sha_hmac)
  1127. qcedev_hmac_update_iokey(areq, handle, true);
  1128. return 0;
  1129. }
  1130. static int qcedev_hmac_final(struct qcedev_async_req *areq,
  1131. struct qcedev_handle *handle)
  1132. {
  1133. int err;
  1134. struct qcedev_control *podev = handle->cntl;
  1135. err = qcedev_sha_final(areq, handle);
  1136. if (podev->ce_support.sha_hmac)
  1137. return err;
  1138. qcedev_hmac_update_iokey(areq, handle, false);
  1139. err = qcedev_hmac_get_ohash(areq, handle);
  1140. if (err)
  1141. return err;
  1142. err = qcedev_sha_final(areq, handle);
  1143. return err;
  1144. }
  1145. static int qcedev_hash_init(struct qcedev_async_req *areq,
  1146. struct qcedev_handle *handle,
  1147. struct scatterlist *sg_src)
  1148. {
  1149. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1150. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1151. return qcedev_sha_init(areq, handle);
  1152. else
  1153. return qcedev_hmac_init(areq, handle, sg_src);
  1154. }
  1155. static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq,
  1156. struct qcedev_handle *handle,
  1157. struct scatterlist *sg_src)
  1158. {
  1159. return qcedev_sha_update(qcedev_areq, handle, sg_src);
  1160. }
  1161. static int qcedev_hash_final(struct qcedev_async_req *areq,
  1162. struct qcedev_handle *handle)
  1163. {
  1164. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1165. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1166. return qcedev_sha_final(areq, handle);
  1167. else
  1168. return qcedev_hmac_final(areq, handle);
  1169. }
  1170. static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq,
  1171. int *di, struct qcedev_handle *handle,
  1172. uint8_t *k_align_src)
  1173. {
  1174. int err = 0;
  1175. int i = 0;
  1176. int dst_i = *di;
  1177. struct scatterlist sg_src;
  1178. uint32_t byteoffset = 0;
  1179. uint8_t *user_src = NULL;
  1180. uint8_t *k_align_dst = k_align_src;
  1181. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1182. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1183. byteoffset = areq->cipher_op_req.byteoffset;
  1184. user_src = areq->cipher_op_req.vbuf.src[0].vaddr;
  1185. if (user_src && copy_from_user((k_align_src + byteoffset),
  1186. (void __user *)user_src,
  1187. areq->cipher_op_req.vbuf.src[0].len))
  1188. return -EFAULT;
  1189. k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len;
  1190. for (i = 1; i < areq->cipher_op_req.entries; i++) {
  1191. user_src = areq->cipher_op_req.vbuf.src[i].vaddr;
  1192. if (user_src && copy_from_user(k_align_src,
  1193. (void __user *)user_src,
  1194. areq->cipher_op_req.vbuf.src[i].len)) {
  1195. return -EFAULT;
  1196. }
  1197. k_align_src += areq->cipher_op_req.vbuf.src[i].len;
  1198. }
  1199. /* restore src beginning */
  1200. k_align_src = k_align_dst;
  1201. areq->cipher_op_req.data_len += byteoffset;
  1202. areq->cipher_req.creq.src = (struct scatterlist *) &sg_src;
  1203. areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src;
  1204. /* In place encryption/decryption */
  1205. sg_init_one(areq->cipher_req.creq.src,
  1206. k_align_dst,
  1207. areq->cipher_op_req.data_len);
  1208. areq->cipher_req.creq.cryptlen = areq->cipher_op_req.data_len;
  1209. areq->cipher_req.creq.iv = areq->cipher_op_req.iv;
  1210. areq->cipher_op_req.entries = 1;
  1211. err = submit_req(areq, handle);
  1212. /* copy data to destination buffer*/
  1213. creq->data_len -= byteoffset;
  1214. while (creq->data_len > 0) {
  1215. if (creq->vbuf.dst[dst_i].len <= creq->data_len) {
  1216. if (err == 0 && copy_to_user(
  1217. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1218. (k_align_dst + byteoffset),
  1219. creq->vbuf.dst[dst_i].len)) {
  1220. err = -EFAULT;
  1221. goto exit;
  1222. }
  1223. k_align_dst += creq->vbuf.dst[dst_i].len;
  1224. creq->data_len -= creq->vbuf.dst[dst_i].len;
  1225. dst_i++;
  1226. } else {
  1227. if (err == 0 && copy_to_user(
  1228. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1229. (k_align_dst + byteoffset),
  1230. creq->data_len)) {
  1231. err = -EFAULT;
  1232. goto exit;
  1233. }
  1234. k_align_dst += creq->data_len;
  1235. creq->vbuf.dst[dst_i].len -= creq->data_len;
  1236. creq->vbuf.dst[dst_i].vaddr += creq->data_len;
  1237. creq->data_len = 0;
  1238. }
  1239. }
  1240. *di = dst_i;
  1241. exit:
  1242. areq->cipher_req.creq.src = NULL;
  1243. areq->cipher_req.creq.dst = NULL;
  1244. return err;
  1245. };
  1246. static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq,
  1247. struct qcedev_handle *handle)
  1248. {
  1249. int err = 0;
  1250. int di = 0;
  1251. int i = 0;
  1252. int j = 0;
  1253. int k = 0;
  1254. uint32_t byteoffset = 0;
  1255. int num_entries = 0;
  1256. uint32_t total = 0;
  1257. uint32_t len;
  1258. uint8_t *k_buf_src = NULL;
  1259. uint8_t *k_align_src = NULL;
  1260. uint32_t max_data_xfer;
  1261. struct qcedev_cipher_op_req *saved_req;
  1262. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1263. total = 0;
  1264. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1265. byteoffset = areq->cipher_op_req.byteoffset;
  1266. k_buf_src = kmalloc(QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2,
  1267. GFP_KERNEL);
  1268. if (k_buf_src == NULL)
  1269. return -ENOMEM;
  1270. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1271. CACHE_LINE_SIZE);
  1272. max_data_xfer = QCE_MAX_OPER_DATA - byteoffset;
  1273. saved_req = kmemdup(creq, sizeof(struct qcedev_cipher_op_req),
  1274. GFP_KERNEL);
  1275. if (saved_req == NULL) {
  1276. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  1277. kfree(k_buf_src);
  1278. return -ENOMEM;
  1279. }
  1280. if (areq->cipher_op_req.data_len > max_data_xfer) {
  1281. struct qcedev_cipher_op_req req;
  1282. /* save the original req structure */
  1283. memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req));
  1284. i = 0;
  1285. /* Address 32 KB at a time */
  1286. while ((i < req.entries) && (err == 0)) {
  1287. if (creq->vbuf.src[i].len > max_data_xfer) {
  1288. creq->vbuf.src[0].len = max_data_xfer;
  1289. if (i > 0) {
  1290. creq->vbuf.src[0].vaddr =
  1291. creq->vbuf.src[i].vaddr;
  1292. }
  1293. creq->data_len = max_data_xfer;
  1294. creq->entries = 1;
  1295. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1296. &di, handle, k_align_src);
  1297. if (err < 0) {
  1298. memset(saved_req, 0,
  1299. ksize((void *)saved_req));
  1300. memset(k_buf_src, 0,
  1301. ksize((void *)k_buf_src));
  1302. kfree(k_buf_src);
  1303. kfree(saved_req);
  1304. return err;
  1305. }
  1306. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1307. max_data_xfer;
  1308. creq->vbuf.src[i].vaddr =
  1309. req.vbuf.src[i].vaddr +
  1310. max_data_xfer;
  1311. req.vbuf.src[i].vaddr =
  1312. creq->vbuf.src[i].vaddr;
  1313. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1314. } else {
  1315. total = areq->cipher_op_req.byteoffset;
  1316. for (j = i; j < req.entries; j++) {
  1317. num_entries++;
  1318. if ((total + creq->vbuf.src[j].len)
  1319. >= max_data_xfer) {
  1320. creq->vbuf.src[j].len =
  1321. max_data_xfer - total;
  1322. total = max_data_xfer;
  1323. break;
  1324. }
  1325. total += creq->vbuf.src[j].len;
  1326. }
  1327. creq->data_len = total;
  1328. if (i > 0)
  1329. for (k = 0; k < num_entries; k++) {
  1330. creq->vbuf.src[k].len =
  1331. creq->vbuf.src[i+k].len;
  1332. creq->vbuf.src[k].vaddr =
  1333. creq->vbuf.src[i+k].vaddr;
  1334. }
  1335. creq->entries = num_entries;
  1336. i = j;
  1337. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1338. &di, handle, k_align_src);
  1339. if (err < 0) {
  1340. memset(saved_req, 0,
  1341. ksize((void *)saved_req));
  1342. memset(k_buf_src, 0,
  1343. ksize((void *)k_buf_src));
  1344. kfree(k_buf_src);
  1345. kfree(saved_req);
  1346. return err;
  1347. }
  1348. num_entries = 0;
  1349. areq->cipher_op_req.byteoffset = 0;
  1350. creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr
  1351. + creq->vbuf.src[i].len;
  1352. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1353. creq->vbuf.src[i].len;
  1354. req.vbuf.src[i].vaddr =
  1355. creq->vbuf.src[i].vaddr;
  1356. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1357. if (creq->vbuf.src[i].len == 0)
  1358. i++;
  1359. }
  1360. areq->cipher_op_req.byteoffset = 0;
  1361. max_data_xfer = QCE_MAX_OPER_DATA;
  1362. byteoffset = 0;
  1363. } /* end of while ((i < req.entries) && (err == 0)) */
  1364. } else
  1365. err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle,
  1366. k_align_src);
  1367. /* Restore the original req structure */
  1368. for (i = 0; i < saved_req->entries; i++) {
  1369. creq->vbuf.src[i].len = saved_req->vbuf.src[i].len;
  1370. creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr;
  1371. }
  1372. for (len = 0, i = 0; len < saved_req->data_len; i++) {
  1373. creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len;
  1374. creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr;
  1375. len += saved_req->vbuf.dst[i].len;
  1376. }
  1377. creq->entries = saved_req->entries;
  1378. creq->data_len = saved_req->data_len;
  1379. creq->byteoffset = saved_req->byteoffset;
  1380. memset(saved_req, 0, ksize((void *)saved_req));
  1381. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  1382. kfree(saved_req);
  1383. kfree(k_buf_src);
  1384. return err;
  1385. }
  1386. static int qcedev_smmu_ablk_offload_cipher(struct qcedev_async_req *areq,
  1387. struct qcedev_handle *handle)
  1388. {
  1389. int i = 0;
  1390. int err = 0;
  1391. size_t byteoffset = 0;
  1392. size_t transfer_data_len = 0;
  1393. size_t pending_data_len = 0;
  1394. size_t max_data_xfer = MAX_CEHW_REQ_TRANSFER_SIZE - byteoffset;
  1395. uint8_t *user_src = NULL;
  1396. uint8_t *user_dst = NULL;
  1397. struct scatterlist sg_src;
  1398. struct scatterlist sg_dst;
  1399. if (areq->offload_cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1400. byteoffset = areq->offload_cipher_op_req.byteoffset;
  1401. /*
  1402. * areq has two components:
  1403. * a) Request that comes from userspace i.e. offload_cipher_op_req
  1404. * b) Request that QCE understands - skcipher i.e. cipher_req.creq
  1405. * skcipher has sglist pointers src and dest that would carry
  1406. * data to/from CE.
  1407. */
  1408. areq->cipher_req.creq.src = &sg_src;
  1409. areq->cipher_req.creq.dst = &sg_dst;
  1410. sg_init_table(&sg_src, 1);
  1411. sg_init_table(&sg_dst, 1);
  1412. for (i = 0; i < areq->offload_cipher_op_req.entries; i++) {
  1413. transfer_data_len = 0;
  1414. pending_data_len = areq->offload_cipher_op_req.vbuf.src[i].len;
  1415. user_src = areq->offload_cipher_op_req.vbuf.src[i].vaddr;
  1416. user_src += byteoffset;
  1417. user_dst = areq->offload_cipher_op_req.vbuf.dst[i].vaddr;
  1418. user_dst += byteoffset;
  1419. areq->cipher_req.creq.iv = areq->offload_cipher_op_req.iv;
  1420. while (pending_data_len) {
  1421. transfer_data_len = min(max_data_xfer,
  1422. pending_data_len);
  1423. sg_src.dma_address = (dma_addr_t)user_src;
  1424. sg_dst.dma_address = (dma_addr_t)user_dst;
  1425. areq->cipher_req.creq.cryptlen = transfer_data_len;
  1426. sg_src.length = transfer_data_len;
  1427. sg_dst.length = transfer_data_len;
  1428. err = submit_req(areq, handle);
  1429. if (err) {
  1430. pr_err("%s: Error processing req, err = %d\n",
  1431. __func__, err);
  1432. goto exit;
  1433. }
  1434. /* update data len to be processed */
  1435. pending_data_len -= transfer_data_len;
  1436. user_src += transfer_data_len;
  1437. user_dst += transfer_data_len;
  1438. }
  1439. }
  1440. exit:
  1441. return err;
  1442. }
  1443. static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req,
  1444. struct qcedev_control *podev)
  1445. {
  1446. /* if intending to use HW key make sure key fields are set
  1447. * correctly and HW key is indeed supported in target
  1448. */
  1449. if (req->encklen == 0) {
  1450. int i;
  1451. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  1452. if (req->enckey[i]) {
  1453. pr_err("%s: Invalid key: non-zero key input\n",
  1454. __func__);
  1455. goto error;
  1456. }
  1457. }
  1458. if ((req->op != QCEDEV_OPER_ENC_NO_KEY) &&
  1459. (req->op != QCEDEV_OPER_DEC_NO_KEY))
  1460. if (!podev->platform_support.hw_key_support) {
  1461. pr_err("%s: Invalid op %d\n", __func__,
  1462. (uint32_t)req->op);
  1463. goto error;
  1464. }
  1465. } else {
  1466. if (req->encklen == QCEDEV_AES_KEY_192) {
  1467. if (!podev->ce_support.aes_key_192) {
  1468. pr_err("%s: AES-192 not supported\n", __func__);
  1469. goto error;
  1470. }
  1471. } else {
  1472. /* if not using HW key make sure key
  1473. * length is valid
  1474. */
  1475. if (req->mode == QCEDEV_AES_MODE_XTS) {
  1476. if ((req->encklen != QCEDEV_AES_KEY_128*2) &&
  1477. (req->encklen != QCEDEV_AES_KEY_256*2)) {
  1478. pr_err("%s: unsupported key size: %d\n",
  1479. __func__, req->encklen);
  1480. goto error;
  1481. }
  1482. } else {
  1483. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1484. (req->encklen != QCEDEV_AES_KEY_256)) {
  1485. pr_err("%s: unsupported key size %d\n",
  1486. __func__, req->encklen);
  1487. goto error;
  1488. }
  1489. }
  1490. }
  1491. }
  1492. return 0;
  1493. error:
  1494. return -EINVAL;
  1495. }
  1496. static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req,
  1497. struct qcedev_control *podev)
  1498. {
  1499. uint32_t total = 0;
  1500. uint32_t i;
  1501. if (req->use_pmem) {
  1502. pr_err("%s: Use of PMEM is not supported\n", __func__);
  1503. goto error;
  1504. }
  1505. if ((req->entries == 0) || (req->data_len == 0) ||
  1506. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1507. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1508. goto error;
  1509. }
  1510. if ((req->alg >= QCEDEV_ALG_LAST) ||
  1511. (req->mode >= QCEDEV_AES_DES_MODE_LAST)) {
  1512. pr_err("%s: Invalid algorithm %d\n", __func__,
  1513. (uint32_t)req->alg);
  1514. goto error;
  1515. }
  1516. if ((req->mode == QCEDEV_AES_MODE_XTS) &&
  1517. (!podev->ce_support.aes_xts)) {
  1518. pr_err("%s: XTS algorithm is not supported\n", __func__);
  1519. goto error;
  1520. }
  1521. if (req->alg == QCEDEV_ALG_AES) {
  1522. if (qcedev_check_cipher_key(req, podev))
  1523. goto error;
  1524. }
  1525. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1526. if (req->byteoffset) {
  1527. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1528. pr_err("%s: Operation on byte offset not supported\n",
  1529. __func__);
  1530. goto error;
  1531. }
  1532. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1533. pr_err("%s: Invalid byte offset\n", __func__);
  1534. goto error;
  1535. }
  1536. total = req->byteoffset;
  1537. for (i = 0; i < req->entries; i++) {
  1538. if (total > U32_MAX - req->vbuf.src[i].len) {
  1539. pr_err("%s:Integer overflow on total src len\n",
  1540. __func__);
  1541. goto error;
  1542. }
  1543. total += req->vbuf.src[i].len;
  1544. }
  1545. }
  1546. if (req->data_len < req->byteoffset) {
  1547. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1548. __func__, req->data_len, req->byteoffset);
  1549. goto error;
  1550. }
  1551. /* Ensure IV size */
  1552. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1553. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1554. goto error;
  1555. }
  1556. /* Ensure Key size */
  1557. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1558. pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen);
  1559. goto error;
  1560. }
  1561. /* Ensure zer ivlen for ECB mode */
  1562. if (req->ivlen > 0) {
  1563. if ((req->mode == QCEDEV_AES_MODE_ECB) ||
  1564. (req->mode == QCEDEV_DES_MODE_ECB)) {
  1565. pr_err("%s: Expecting a zero length IV\n", __func__);
  1566. goto error;
  1567. }
  1568. } else {
  1569. if ((req->mode != QCEDEV_AES_MODE_ECB) &&
  1570. (req->mode != QCEDEV_DES_MODE_ECB)) {
  1571. pr_err("%s: Expecting a non-zero ength IV\n", __func__);
  1572. goto error;
  1573. }
  1574. }
  1575. /* Check for sum of all dst length is equal to data_len */
  1576. for (i = 0, total = 0; i < req->entries; i++) {
  1577. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1578. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1579. __func__, i, req->vbuf.dst[i].len);
  1580. goto error;
  1581. }
  1582. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1583. pr_err("%s: Integer overflow on total req dst vbuf length\n",
  1584. __func__);
  1585. goto error;
  1586. }
  1587. total += req->vbuf.dst[i].len;
  1588. }
  1589. if (total != req->data_len) {
  1590. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1591. __func__, i, total, req->data_len);
  1592. goto error;
  1593. }
  1594. /* Check for sum of all src length is equal to data_len */
  1595. for (i = 0, total = 0; i < req->entries; i++) {
  1596. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1597. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1598. __func__, i, req->vbuf.src[i].len);
  1599. goto error;
  1600. }
  1601. if (req->vbuf.src[i].len > U32_MAX - total) {
  1602. pr_err("%s: Integer overflow on total req src vbuf length\n",
  1603. __func__);
  1604. goto error;
  1605. }
  1606. total += req->vbuf.src[i].len;
  1607. }
  1608. if (total != req->data_len) {
  1609. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1610. __func__, total, req->data_len);
  1611. goto error;
  1612. }
  1613. return 0;
  1614. error:
  1615. return -EINVAL;
  1616. }
  1617. static int qcedev_check_sha_params(struct qcedev_sha_op_req *req,
  1618. struct qcedev_control *podev)
  1619. {
  1620. uint32_t total = 0;
  1621. uint32_t i;
  1622. if ((req->alg == QCEDEV_ALG_AES_CMAC) &&
  1623. (!podev->ce_support.cmac)) {
  1624. pr_err("%s: CMAC not supported\n", __func__);
  1625. goto sha_error;
  1626. }
  1627. if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) {
  1628. pr_err("%s: Invalid num entries (%d)\n",
  1629. __func__, req->entries);
  1630. goto sha_error;
  1631. }
  1632. if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) {
  1633. pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg);
  1634. goto sha_error;
  1635. }
  1636. if ((req->alg == QCEDEV_ALG_SHA1_HMAC) ||
  1637. (req->alg == QCEDEV_ALG_SHA256_HMAC)) {
  1638. if (req->authkey == NULL) {
  1639. pr_err("%s: Invalid authkey pointer\n", __func__);
  1640. goto sha_error;
  1641. }
  1642. if (req->authklen <= 0) {
  1643. pr_err("%s: Invalid authkey length (%d)\n",
  1644. __func__, req->authklen);
  1645. goto sha_error;
  1646. }
  1647. }
  1648. if (req->alg == QCEDEV_ALG_AES_CMAC) {
  1649. if ((req->authklen != QCEDEV_AES_KEY_128) &&
  1650. (req->authklen != QCEDEV_AES_KEY_256)) {
  1651. pr_err("%s: unsupported key length\n", __func__);
  1652. goto sha_error;
  1653. }
  1654. }
  1655. /* Check for sum of all src length is equal to data_len */
  1656. for (i = 0, total = 0; i < req->entries; i++) {
  1657. if (req->data[i].len > U32_MAX - total) {
  1658. pr_err("%s: Integer overflow on total req buf length\n",
  1659. __func__);
  1660. goto sha_error;
  1661. }
  1662. total += req->data[i].len;
  1663. }
  1664. if (total != req->data_len) {
  1665. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1666. __func__, total, req->data_len);
  1667. goto sha_error;
  1668. }
  1669. return 0;
  1670. sha_error:
  1671. return -EINVAL;
  1672. }
  1673. static int qcedev_check_offload_cipher_key(struct qcedev_offload_cipher_op_req *req,
  1674. struct qcedev_control *podev)
  1675. {
  1676. if (req->encklen == 0)
  1677. return -EINVAL;
  1678. /* AES-192 is not a valid option for OFFLOAD use case */
  1679. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1680. (req->encklen != QCEDEV_AES_KEY_256)) {
  1681. pr_err("%s: unsupported key size %d\n",
  1682. __func__, req->encklen);
  1683. goto error;
  1684. }
  1685. return 0;
  1686. error:
  1687. return -EINVAL;
  1688. }
  1689. static int qcedev_check_offload_cipher_params(struct qcedev_offload_cipher_op_req *req,
  1690. struct qcedev_control *podev)
  1691. {
  1692. uint32_t total = 0;
  1693. int i = 0;
  1694. if ((req->entries == 0) || (req->data_len == 0) ||
  1695. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1696. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1697. goto error;
  1698. }
  1699. if ((req->alg != QCEDEV_ALG_AES) ||
  1700. (req->mode > QCEDEV_AES_MODE_CTR)) {
  1701. pr_err("%s: Invalid algorithm %d\n", __func__,
  1702. (uint32_t)req->alg);
  1703. goto error;
  1704. }
  1705. if (qcedev_check_offload_cipher_key(req, podev))
  1706. goto error;
  1707. if (req->block_offset >= AES_CE_BLOCK_SIZE)
  1708. goto error;
  1709. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1710. if (req->byteoffset) {
  1711. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1712. pr_err("%s: Operation on byte offset not supported\n",
  1713. __func__);
  1714. goto error;
  1715. }
  1716. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1717. pr_err("%s: Invalid byte offset\n", __func__);
  1718. goto error;
  1719. }
  1720. total = req->byteoffset;
  1721. for (i = 0; i < req->entries; i++) {
  1722. if (total > U32_MAX - req->vbuf.src[i].len) {
  1723. pr_err("%s:Int overflow on total src len\n",
  1724. __func__);
  1725. goto error;
  1726. }
  1727. total += req->vbuf.src[i].len;
  1728. }
  1729. }
  1730. if (req->data_len < req->byteoffset) {
  1731. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1732. __func__, req->data_len, req->byteoffset);
  1733. goto error;
  1734. }
  1735. /* Ensure IV size */
  1736. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1737. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1738. goto error;
  1739. }
  1740. /* Ensure Key size */
  1741. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1742. pr_err("%s: Klen is not correct: %u\n", __func__,
  1743. req->encklen);
  1744. goto error;
  1745. }
  1746. /* Check for sum of all dst length is equal to data_len */
  1747. for (i = 0, total = 0; i < req->entries; i++) {
  1748. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1749. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1750. __func__, i, req->vbuf.dst[i].len);
  1751. goto error;
  1752. }
  1753. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1754. pr_err("%s: Int overflow on total req dst vbuf len\n",
  1755. __func__);
  1756. goto error;
  1757. }
  1758. total += req->vbuf.dst[i].len;
  1759. }
  1760. if (total != req->data_len) {
  1761. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1762. __func__, i, total, req->data_len);
  1763. goto error;
  1764. }
  1765. /* Check for sum of all src length is equal to data_len */
  1766. for (i = 0, total = 0; i < req->entries; i++) {
  1767. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1768. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1769. __func__, i, req->vbuf.src[i].len);
  1770. goto error;
  1771. }
  1772. if (req->vbuf.src[i].len > U32_MAX - total) {
  1773. pr_err("%s: Int overflow on total req src vbuf len\n",
  1774. __func__);
  1775. goto error;
  1776. }
  1777. total += req->vbuf.src[i].len;
  1778. }
  1779. if (total != req->data_len) {
  1780. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1781. __func__, total, req->data_len);
  1782. goto error;
  1783. }
  1784. return 0;
  1785. error:
  1786. return -EINVAL;
  1787. }
  1788. long qcedev_ioctl(struct file *file,
  1789. unsigned int cmd, unsigned long arg)
  1790. {
  1791. int err = 0;
  1792. struct qcedev_handle *handle;
  1793. struct qcedev_control *podev;
  1794. struct qcedev_async_req *qcedev_areq;
  1795. struct qcedev_stat *pstat;
  1796. qcedev_areq = kzalloc(sizeof(struct qcedev_async_req), GFP_KERNEL);
  1797. if (!qcedev_areq)
  1798. return -ENOMEM;
  1799. handle = file->private_data;
  1800. podev = handle->cntl;
  1801. qcedev_areq->handle = handle;
  1802. if (podev == NULL || podev->magic != QCEDEV_MAGIC) {
  1803. pr_err("%s: invalid handle %pK\n",
  1804. __func__, podev);
  1805. err = -ENOENT;
  1806. goto exit_free_qcedev_areq;
  1807. }
  1808. /* Verify user arguments. */
  1809. if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC) {
  1810. err = -ENOTTY;
  1811. goto exit_free_qcedev_areq;
  1812. }
  1813. init_completion(&qcedev_areq->complete);
  1814. pstat = &_qcedev_stat;
  1815. switch (cmd) {
  1816. case QCEDEV_IOCTL_ENC_REQ:
  1817. case QCEDEV_IOCTL_DEC_REQ:
  1818. if (copy_from_user(&qcedev_areq->cipher_op_req,
  1819. (void __user *)arg,
  1820. sizeof(struct qcedev_cipher_op_req))) {
  1821. err = -EFAULT;
  1822. goto exit_free_qcedev_areq;
  1823. }
  1824. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_CIPHER;
  1825. if (qcedev_check_cipher_params(&qcedev_areq->cipher_op_req,
  1826. podev)) {
  1827. err = -EINVAL;
  1828. goto exit_free_qcedev_areq;
  1829. }
  1830. err = qcedev_vbuf_ablk_cipher(qcedev_areq, handle);
  1831. if (err)
  1832. goto exit_free_qcedev_areq;
  1833. if (copy_to_user((void __user *)arg,
  1834. &qcedev_areq->cipher_op_req,
  1835. sizeof(struct qcedev_cipher_op_req))) {
  1836. err = -EFAULT;
  1837. goto exit_free_qcedev_areq;
  1838. }
  1839. break;
  1840. case QCEDEV_IOCTL_OFFLOAD_OP_REQ:
  1841. if (copy_from_user(&qcedev_areq->offload_cipher_op_req,
  1842. (void __user *)arg,
  1843. sizeof(struct qcedev_offload_cipher_op_req))) {
  1844. err = -EFAULT;
  1845. goto exit_free_qcedev_areq;
  1846. }
  1847. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER;
  1848. if (qcedev_check_offload_cipher_params(
  1849. &qcedev_areq->offload_cipher_op_req, podev)) {
  1850. err = -EINVAL;
  1851. goto exit_free_qcedev_areq;
  1852. }
  1853. err = qcedev_smmu_ablk_offload_cipher(qcedev_areq, handle);
  1854. if (err)
  1855. goto exit_free_qcedev_areq;
  1856. if (copy_to_user((void __user *)arg,
  1857. &qcedev_areq->offload_cipher_op_req,
  1858. sizeof(struct qcedev_offload_cipher_op_req))) {
  1859. err = -EFAULT;
  1860. goto exit_free_qcedev_areq;
  1861. }
  1862. break;
  1863. case QCEDEV_IOCTL_SHA_INIT_REQ:
  1864. {
  1865. struct scatterlist sg_src;
  1866. if (copy_from_user(&qcedev_areq->sha_op_req,
  1867. (void __user *)arg,
  1868. sizeof(struct qcedev_sha_op_req))) {
  1869. err = -EFAULT;
  1870. goto exit_free_qcedev_areq;
  1871. }
  1872. mutex_lock(&hash_access_lock);
  1873. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1874. mutex_unlock(&hash_access_lock);
  1875. err = -EINVAL;
  1876. goto exit_free_qcedev_areq;
  1877. }
  1878. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1879. err = qcedev_hash_init(qcedev_areq, handle, &sg_src);
  1880. if (err) {
  1881. mutex_unlock(&hash_access_lock);
  1882. goto exit_free_qcedev_areq;
  1883. }
  1884. mutex_unlock(&hash_access_lock);
  1885. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1886. sizeof(struct qcedev_sha_op_req))) {
  1887. err = -EFAULT;
  1888. goto exit_free_qcedev_areq;
  1889. }
  1890. handle->sha_ctxt.init_done = true;
  1891. }
  1892. break;
  1893. case QCEDEV_IOCTL_GET_CMAC_REQ:
  1894. if (!podev->ce_support.cmac) {
  1895. err = -ENOTTY;
  1896. goto exit_free_qcedev_areq;
  1897. }
  1898. /* Fall-through */
  1899. case QCEDEV_IOCTL_SHA_UPDATE_REQ:
  1900. {
  1901. struct scatterlist sg_src;
  1902. if (copy_from_user(&qcedev_areq->sha_op_req,
  1903. (void __user *)arg,
  1904. sizeof(struct qcedev_sha_op_req))) {
  1905. err = -EFAULT;
  1906. goto exit_free_qcedev_areq;
  1907. }
  1908. mutex_lock(&hash_access_lock);
  1909. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1910. mutex_unlock(&hash_access_lock);
  1911. err = -EINVAL;
  1912. goto exit_free_qcedev_areq;
  1913. }
  1914. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1915. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_AES_CMAC) {
  1916. err = qcedev_hash_cmac(qcedev_areq, handle, &sg_src);
  1917. if (err) {
  1918. mutex_unlock(&hash_access_lock);
  1919. goto exit_free_qcedev_areq;
  1920. }
  1921. } else {
  1922. if (!handle->sha_ctxt.init_done) {
  1923. pr_err("%s Init was not called\n", __func__);
  1924. mutex_unlock(&hash_access_lock);
  1925. err = -EINVAL;
  1926. goto exit_free_qcedev_areq;
  1927. }
  1928. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  1929. if (err) {
  1930. mutex_unlock(&hash_access_lock);
  1931. goto exit_free_qcedev_areq;
  1932. }
  1933. }
  1934. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1935. pr_err("Invalid sha_ctxt.diglen %d\n",
  1936. handle->sha_ctxt.diglen);
  1937. mutex_unlock(&hash_access_lock);
  1938. err = -EINVAL;
  1939. goto exit_free_qcedev_areq;
  1940. }
  1941. memcpy(&qcedev_areq->sha_op_req.digest[0],
  1942. &handle->sha_ctxt.digest[0],
  1943. handle->sha_ctxt.diglen);
  1944. mutex_unlock(&hash_access_lock);
  1945. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1946. sizeof(struct qcedev_sha_op_req))) {
  1947. err = -EFAULT;
  1948. goto exit_free_qcedev_areq;
  1949. }
  1950. }
  1951. break;
  1952. case QCEDEV_IOCTL_SHA_FINAL_REQ:
  1953. if (!handle->sha_ctxt.init_done) {
  1954. pr_err("%s Init was not called\n", __func__);
  1955. err = -EINVAL;
  1956. goto exit_free_qcedev_areq;
  1957. }
  1958. if (copy_from_user(&qcedev_areq->sha_op_req,
  1959. (void __user *)arg,
  1960. sizeof(struct qcedev_sha_op_req))) {
  1961. err = -EFAULT;
  1962. goto exit_free_qcedev_areq;
  1963. }
  1964. mutex_lock(&hash_access_lock);
  1965. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1966. mutex_unlock(&hash_access_lock);
  1967. err = -EINVAL;
  1968. goto exit_free_qcedev_areq;
  1969. }
  1970. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1971. err = qcedev_hash_final(qcedev_areq, handle);
  1972. if (err) {
  1973. mutex_unlock(&hash_access_lock);
  1974. goto exit_free_qcedev_areq;
  1975. }
  1976. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1977. pr_err("Invalid sha_ctxt.diglen %d\n",
  1978. handle->sha_ctxt.diglen);
  1979. mutex_unlock(&hash_access_lock);
  1980. err = -EINVAL;
  1981. goto exit_free_qcedev_areq;
  1982. }
  1983. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  1984. memcpy(&qcedev_areq->sha_op_req.digest[0],
  1985. &handle->sha_ctxt.digest[0],
  1986. handle->sha_ctxt.diglen);
  1987. mutex_unlock(&hash_access_lock);
  1988. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1989. sizeof(struct qcedev_sha_op_req))) {
  1990. err = -EFAULT;
  1991. goto exit_free_qcedev_areq;
  1992. }
  1993. handle->sha_ctxt.init_done = false;
  1994. break;
  1995. case QCEDEV_IOCTL_GET_SHA_REQ:
  1996. {
  1997. struct scatterlist sg_src;
  1998. if (copy_from_user(&qcedev_areq->sha_op_req,
  1999. (void __user *)arg,
  2000. sizeof(struct qcedev_sha_op_req))) {
  2001. err = -EFAULT;
  2002. goto exit_free_qcedev_areq;
  2003. }
  2004. mutex_lock(&hash_access_lock);
  2005. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  2006. mutex_unlock(&hash_access_lock);
  2007. err = -EINVAL;
  2008. goto exit_free_qcedev_areq;
  2009. }
  2010. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  2011. qcedev_hash_init(qcedev_areq, handle, &sg_src);
  2012. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  2013. if (err) {
  2014. mutex_unlock(&hash_access_lock);
  2015. goto exit_free_qcedev_areq;
  2016. }
  2017. err = qcedev_hash_final(qcedev_areq, handle);
  2018. if (err) {
  2019. mutex_unlock(&hash_access_lock);
  2020. goto exit_free_qcedev_areq;
  2021. }
  2022. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2023. pr_err("Invalid sha_ctxt.diglen %d\n",
  2024. handle->sha_ctxt.diglen);
  2025. mutex_unlock(&hash_access_lock);
  2026. err = -EINVAL;
  2027. goto exit_free_qcedev_areq;
  2028. }
  2029. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  2030. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2031. &handle->sha_ctxt.digest[0],
  2032. handle->sha_ctxt.diglen);
  2033. mutex_unlock(&hash_access_lock);
  2034. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2035. sizeof(struct qcedev_sha_op_req))) {
  2036. err = -EFAULT;
  2037. goto exit_free_qcedev_areq;
  2038. }
  2039. }
  2040. break;
  2041. case QCEDEV_IOCTL_MAP_BUF_REQ:
  2042. {
  2043. unsigned long long vaddr = 0;
  2044. struct qcedev_map_buf_req map_buf = { {0} };
  2045. int i = 0;
  2046. if (copy_from_user(&map_buf,
  2047. (void __user *)arg, sizeof(map_buf))) {
  2048. err = -EFAULT;
  2049. goto exit_free_qcedev_areq;
  2050. }
  2051. if (map_buf.num_fds > QCEDEV_MAX_BUFFERS) {
  2052. err = -EINVAL;
  2053. goto exit_free_qcedev_areq;
  2054. }
  2055. for (i = 0; i < map_buf.num_fds; i++) {
  2056. err = qcedev_check_and_map_buffer(handle,
  2057. map_buf.fd[i],
  2058. map_buf.fd_offset[i],
  2059. map_buf.fd_size[i],
  2060. &vaddr);
  2061. if (err) {
  2062. pr_err(
  2063. "%s: err: failed to map fd(%d) - %d\n",
  2064. __func__, map_buf.fd[i], err);
  2065. goto exit_free_qcedev_areq;
  2066. }
  2067. map_buf.buf_vaddr[i] = vaddr;
  2068. pr_info("%s: info: vaddr = %llx\n, fd = %d",
  2069. __func__, vaddr, map_buf.fd[i]);
  2070. }
  2071. if (copy_to_user((void __user *)arg, &map_buf,
  2072. sizeof(map_buf))) {
  2073. err = -EFAULT;
  2074. goto exit_free_qcedev_areq;
  2075. }
  2076. break;
  2077. }
  2078. case QCEDEV_IOCTL_UNMAP_BUF_REQ:
  2079. {
  2080. struct qcedev_unmap_buf_req unmap_buf = { { 0 } };
  2081. int i = 0;
  2082. if (copy_from_user(&unmap_buf,
  2083. (void __user *)arg, sizeof(unmap_buf))) {
  2084. err = -EFAULT;
  2085. goto exit_free_qcedev_areq;
  2086. }
  2087. for (i = 0; i < unmap_buf.num_fds; i++) {
  2088. err = qcedev_check_and_unmap_buffer(handle,
  2089. unmap_buf.fd[i]);
  2090. if (err) {
  2091. pr_err(
  2092. "%s: err: failed to unmap fd(%d) - %d\n",
  2093. __func__,
  2094. unmap_buf.fd[i], err);
  2095. goto exit_free_qcedev_areq;
  2096. }
  2097. }
  2098. break;
  2099. }
  2100. default:
  2101. err = -ENOTTY;
  2102. goto exit_free_qcedev_areq;
  2103. }
  2104. exit_free_qcedev_areq:
  2105. kfree(qcedev_areq);
  2106. return err;
  2107. }
  2108. static int qcedev_probe_device(struct platform_device *pdev)
  2109. {
  2110. void *handle = NULL;
  2111. int rc = 0;
  2112. struct qcedev_control *podev;
  2113. struct msm_ce_hw_support *platform_support;
  2114. podev = &qce_dev[0];
  2115. rc = alloc_chrdev_region(&qcedev_device_no, 0, 1, QCEDEV_DEV);
  2116. if (rc < 0) {
  2117. pr_err("alloc_chrdev_region failed %d\n", rc);
  2118. return rc;
  2119. }
  2120. driver_class = class_create(THIS_MODULE, QCEDEV_DEV);
  2121. if (IS_ERR(driver_class)) {
  2122. rc = -ENOMEM;
  2123. pr_err("class_create failed %d\n", rc);
  2124. goto exit_unreg_chrdev_region;
  2125. }
  2126. class_dev = device_create(driver_class, NULL, qcedev_device_no, NULL,
  2127. QCEDEV_DEV);
  2128. if (IS_ERR(class_dev)) {
  2129. pr_err("class_device_create failed %d\n", rc);
  2130. rc = -ENOMEM;
  2131. goto exit_destroy_class;
  2132. }
  2133. cdev_init(&podev->cdev, &qcedev_fops);
  2134. podev->cdev.owner = THIS_MODULE;
  2135. rc = cdev_add(&podev->cdev, MKDEV(MAJOR(qcedev_device_no), 0), 1);
  2136. if (rc < 0) {
  2137. pr_err("cdev_add failed %d\n", rc);
  2138. goto exit_destroy_device;
  2139. }
  2140. podev->minor = 0;
  2141. podev->high_bw_req_count = 0;
  2142. INIT_LIST_HEAD(&podev->ready_commands);
  2143. podev->active_command = NULL;
  2144. INIT_LIST_HEAD(&podev->context_banks);
  2145. spin_lock_init(&podev->lock);
  2146. tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev);
  2147. podev->icc_path = of_icc_get(&pdev->dev, "data_path");
  2148. if (IS_ERR(podev->icc_path)) {
  2149. rc = PTR_ERR(podev->icc_path);
  2150. pr_err("%s Failed to get icc path with error %d\n",
  2151. __func__, rc);
  2152. goto exit_del_cdev;
  2153. }
  2154. rc = icc_set_bw(podev->icc_path, CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  2155. if (rc) {
  2156. pr_err("%s Unable to set high bandwidth\n", __func__);
  2157. goto exit_unregister_bus_scale;
  2158. }
  2159. handle = qce_open(pdev, &rc);
  2160. if (handle == NULL) {
  2161. rc = -ENODEV;
  2162. goto exit_scale_busbandwidth;
  2163. }
  2164. rc = icc_set_bw(podev->icc_path, 0, 0);
  2165. if (rc) {
  2166. pr_err("%s Unable to set to low bandwidth\n", __func__);
  2167. goto exit_qce_close;
  2168. }
  2169. podev->qce = handle;
  2170. podev->pdev = pdev;
  2171. platform_set_drvdata(pdev, podev);
  2172. qce_hw_support(podev->qce, &podev->ce_support);
  2173. if (podev->ce_support.bam) {
  2174. podev->platform_support.ce_shared = 0;
  2175. podev->platform_support.shared_ce_resource = 0;
  2176. podev->platform_support.hw_key_support =
  2177. podev->ce_support.hw_key;
  2178. podev->platform_support.sha_hmac = 1;
  2179. } else {
  2180. platform_support =
  2181. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  2182. podev->platform_support.ce_shared = platform_support->ce_shared;
  2183. podev->platform_support.shared_ce_resource =
  2184. platform_support->shared_ce_resource;
  2185. podev->platform_support.hw_key_support =
  2186. platform_support->hw_key_support;
  2187. podev->platform_support.sha_hmac = platform_support->sha_hmac;
  2188. }
  2189. podev->mem_client = qcedev_mem_new_client(MEM_ION);
  2190. if (!podev->mem_client) {
  2191. pr_err("%s: err: qcedev_mem_new_client failed\n", __func__);
  2192. goto exit_qce_close;
  2193. }
  2194. rc = of_platform_populate(pdev->dev.of_node, qcedev_match,
  2195. NULL, &pdev->dev);
  2196. if (rc) {
  2197. pr_err("%s: err: of_platform_populate failed: %d\n",
  2198. __func__, rc);
  2199. goto exit_mem_new_client;
  2200. }
  2201. return 0;
  2202. exit_mem_new_client:
  2203. if (podev->mem_client)
  2204. qcedev_mem_delete_client(podev->mem_client);
  2205. podev->mem_client = NULL;
  2206. exit_qce_close:
  2207. if (handle)
  2208. qce_close(handle);
  2209. exit_scale_busbandwidth:
  2210. icc_set_bw(podev->icc_path, 0, 0);
  2211. exit_unregister_bus_scale:
  2212. if (podev->icc_path)
  2213. icc_put(podev->icc_path);
  2214. exit_del_cdev:
  2215. cdev_del(&podev->cdev);
  2216. exit_destroy_device:
  2217. device_destroy(driver_class, qcedev_device_no);
  2218. exit_destroy_class:
  2219. class_destroy(driver_class);
  2220. exit_unreg_chrdev_region:
  2221. unregister_chrdev_region(qcedev_device_no, 1);
  2222. podev->icc_path = NULL;
  2223. platform_set_drvdata(pdev, NULL);
  2224. podev->pdev = NULL;
  2225. podev->qce = NULL;
  2226. return rc;
  2227. }
  2228. static int qcedev_probe(struct platform_device *pdev)
  2229. {
  2230. if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcedev"))
  2231. return qcedev_probe_device(pdev);
  2232. else if (of_device_is_compatible(pdev->dev.of_node,
  2233. "qcom,qcedev,context-bank"))
  2234. return qcedev_parse_context_bank(pdev);
  2235. return -EINVAL;
  2236. };
  2237. static int qcedev_remove(struct platform_device *pdev)
  2238. {
  2239. struct qcedev_control *podev;
  2240. podev = platform_get_drvdata(pdev);
  2241. if (!podev)
  2242. return 0;
  2243. if (podev->qce)
  2244. qce_close(podev->qce);
  2245. if (podev->icc_path)
  2246. icc_put(podev->icc_path);
  2247. tasklet_kill(&podev->done_tasklet);
  2248. cdev_del(&podev->cdev);
  2249. device_destroy(driver_class, qcedev_device_no);
  2250. class_destroy(driver_class);
  2251. unregister_chrdev_region(qcedev_device_no, 1);
  2252. return 0;
  2253. };
  2254. static int qcedev_suspend(struct platform_device *pdev, pm_message_t state)
  2255. {
  2256. struct qcedev_control *podev;
  2257. int ret;
  2258. podev = platform_get_drvdata(pdev);
  2259. if (!podev)
  2260. return 0;
  2261. mutex_lock(&qcedev_sent_bw_req);
  2262. if (podev->high_bw_req_count) {
  2263. ret = qcedev_control_clocks(podev, false);
  2264. if (ret)
  2265. goto suspend_exit;
  2266. }
  2267. suspend_exit:
  2268. mutex_unlock(&qcedev_sent_bw_req);
  2269. return 0;
  2270. }
  2271. static int qcedev_resume(struct platform_device *pdev)
  2272. {
  2273. struct qcedev_control *podev;
  2274. int ret;
  2275. podev = platform_get_drvdata(pdev);
  2276. if (!podev)
  2277. return 0;
  2278. mutex_lock(&qcedev_sent_bw_req);
  2279. if (podev->high_bw_req_count) {
  2280. ret = qcedev_control_clocks(podev, true);
  2281. if (ret)
  2282. goto resume_exit;
  2283. }
  2284. resume_exit:
  2285. mutex_unlock(&qcedev_sent_bw_req);
  2286. return 0;
  2287. }
  2288. static struct platform_driver qcedev_plat_driver = {
  2289. .probe = qcedev_probe,
  2290. .remove = qcedev_remove,
  2291. .suspend = qcedev_suspend,
  2292. .resume = qcedev_resume,
  2293. .driver = {
  2294. .name = "qce",
  2295. .of_match_table = qcedev_match,
  2296. },
  2297. };
  2298. static int _disp_stats(int id)
  2299. {
  2300. struct qcedev_stat *pstat;
  2301. int len = 0;
  2302. pstat = &_qcedev_stat;
  2303. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  2304. "\nQTI QCE dev driver %d Statistics:\n",
  2305. id + 1);
  2306. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2307. " Encryption operation success : %d\n",
  2308. pstat->qcedev_enc_success);
  2309. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2310. " Encryption operation fail : %d\n",
  2311. pstat->qcedev_enc_fail);
  2312. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2313. " Decryption operation success : %d\n",
  2314. pstat->qcedev_dec_success);
  2315. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2316. " Encryption operation fail : %d\n",
  2317. pstat->qcedev_dec_fail);
  2318. return len;
  2319. }
  2320. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  2321. size_t count, loff_t *ppos)
  2322. {
  2323. ssize_t rc = -EINVAL;
  2324. int qcedev = *((int *) file->private_data);
  2325. int len;
  2326. len = _disp_stats(qcedev);
  2327. if (len <= count)
  2328. rc = simple_read_from_buffer((void __user *) buf, len,
  2329. ppos, (void *) _debug_read_buf, len);
  2330. return rc;
  2331. }
  2332. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  2333. size_t count, loff_t *ppos)
  2334. {
  2335. memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat));
  2336. return count;
  2337. };
  2338. static const struct file_operations _debug_stats_ops = {
  2339. .open = simple_open,
  2340. .read = _debug_stats_read,
  2341. .write = _debug_stats_write,
  2342. };
  2343. static int _qcedev_debug_init(void)
  2344. {
  2345. int rc;
  2346. char name[DEBUG_MAX_FNAME];
  2347. struct dentry *dent;
  2348. _debug_dent = debugfs_create_dir("qcedev", NULL);
  2349. if (IS_ERR(_debug_dent)) {
  2350. pr_debug("qcedev debugfs_create_dir fail, error %ld\n",
  2351. PTR_ERR(_debug_dent));
  2352. return PTR_ERR(_debug_dent);
  2353. }
  2354. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  2355. _debug_qcedev = 0;
  2356. dent = debugfs_create_file(name, 0644, _debug_dent,
  2357. &_debug_qcedev, &_debug_stats_ops);
  2358. if (dent == NULL) {
  2359. pr_debug("qcedev debugfs_create_file fail, error %ld\n",
  2360. PTR_ERR(dent));
  2361. rc = PTR_ERR(dent);
  2362. goto err;
  2363. }
  2364. return 0;
  2365. err:
  2366. debugfs_remove_recursive(_debug_dent);
  2367. return rc;
  2368. }
  2369. static int qcedev_init(void)
  2370. {
  2371. _qcedev_debug_init();
  2372. return platform_driver_register(&qcedev_plat_driver);
  2373. }
  2374. static void qcedev_exit(void)
  2375. {
  2376. debugfs_remove_recursive(_debug_dent);
  2377. platform_driver_unregister(&qcedev_plat_driver);
  2378. }
  2379. MODULE_LICENSE("GPL v2");
  2380. MODULE_DESCRIPTION("QTI DEV Crypto driver");
  2381. module_init(qcedev_init);
  2382. module_exit(qcedev_exit);