main.c 109 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static DECLARE_RWSEM(cnss_pm_sem);
  85. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  86. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  87. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  88. };
  89. static struct cnss_fw_files FW_FILES_DEFAULT = {
  90. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  91. "utfbd.bin", "epping.bin", "evicted.bin"
  92. };
  93. struct cnss_driver_event {
  94. struct list_head list;
  95. enum cnss_driver_event_type type;
  96. bool sync;
  97. struct completion complete;
  98. int ret;
  99. void *data;
  100. };
  101. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  102. struct cnss_plat_data *plat_priv)
  103. {
  104. plat_env = plat_priv;
  105. }
  106. bool cnss_check_driver_loading_allowed(void)
  107. {
  108. return cnss_allow_driver_loading;
  109. }
  110. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  111. {
  112. return plat_env;
  113. }
  114. /**
  115. * cnss_get_mem_seg_count - Get segment count of memory
  116. * @type: memory type
  117. * @seg: segment count
  118. *
  119. * Return: 0 on success, negative value on failure
  120. */
  121. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  122. {
  123. struct cnss_plat_data *plat_priv;
  124. plat_priv = cnss_get_plat_priv(NULL);
  125. if (!plat_priv)
  126. return -ENODEV;
  127. switch (type) {
  128. case CNSS_REMOTE_MEM_TYPE_FW:
  129. *seg = plat_priv->fw_mem_seg_len;
  130. break;
  131. case CNSS_REMOTE_MEM_TYPE_QDSS:
  132. *seg = plat_priv->qdss_mem_seg_len;
  133. break;
  134. default:
  135. return -EINVAL;
  136. }
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  140. /**
  141. * cnss_get_mem_segment_info - Get memory info of different type
  142. * @type: memory type
  143. * @segment: array to save the segment info
  144. * @seg: segment count
  145. *
  146. * Return: 0 on success, negative value on failure
  147. */
  148. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  149. struct cnss_mem_segment segment[],
  150. u32 segment_count)
  151. {
  152. struct cnss_plat_data *plat_priv;
  153. u32 i;
  154. plat_priv = cnss_get_plat_priv(NULL);
  155. if (!plat_priv)
  156. return -ENODEV;
  157. switch (type) {
  158. case CNSS_REMOTE_MEM_TYPE_FW:
  159. if (segment_count > plat_priv->fw_mem_seg_len)
  160. segment_count = plat_priv->fw_mem_seg_len;
  161. for (i = 0; i < segment_count; i++) {
  162. segment[i].size = plat_priv->fw_mem[i].size;
  163. segment[i].va = plat_priv->fw_mem[i].va;
  164. segment[i].pa = plat_priv->fw_mem[i].pa;
  165. }
  166. break;
  167. case CNSS_REMOTE_MEM_TYPE_QDSS:
  168. if (segment_count > plat_priv->qdss_mem_seg_len)
  169. segment_count = plat_priv->qdss_mem_seg_len;
  170. for (i = 0; i < segment_count; i++) {
  171. segment[i].size = plat_priv->qdss_mem[i].size;
  172. segment[i].va = plat_priv->qdss_mem[i].va;
  173. segment[i].pa = plat_priv->qdss_mem[i].pa;
  174. }
  175. break;
  176. default:
  177. return -EINVAL;
  178. }
  179. return 0;
  180. }
  181. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  182. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  183. enum cnss_feature_v01 feature)
  184. {
  185. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  186. return -EINVAL;
  187. plat_priv->feature_list |= 1 << feature;
  188. return 0;
  189. }
  190. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  191. enum cnss_feature_v01 feature)
  192. {
  193. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  194. return -EINVAL;
  195. plat_priv->feature_list &= ~(1 << feature);
  196. return 0;
  197. }
  198. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  199. u64 *feature_list)
  200. {
  201. if (unlikely(!plat_priv))
  202. return -EINVAL;
  203. *feature_list = plat_priv->feature_list;
  204. return 0;
  205. }
  206. static int cnss_pm_notify(struct notifier_block *b,
  207. unsigned long event, void *p)
  208. {
  209. switch (event) {
  210. case PM_SUSPEND_PREPARE:
  211. down_write(&cnss_pm_sem);
  212. break;
  213. case PM_POST_SUSPEND:
  214. up_write(&cnss_pm_sem);
  215. break;
  216. }
  217. return NOTIFY_DONE;
  218. }
  219. static struct notifier_block cnss_pm_notifier = {
  220. .notifier_call = cnss_pm_notify,
  221. };
  222. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  223. {
  224. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  225. return;
  226. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  227. plat_priv->driver_state,
  228. atomic_read(&plat_priv->pm_count));
  229. pm_stay_awake(&plat_priv->plat_dev->dev);
  230. }
  231. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  232. {
  233. int r = atomic_dec_return(&plat_priv->pm_count);
  234. WARN_ON(r < 0);
  235. if (r != 0)
  236. return;
  237. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  238. plat_priv->driver_state,
  239. atomic_read(&plat_priv->pm_count));
  240. pm_relax(&plat_priv->plat_dev->dev);
  241. }
  242. void cnss_lock_pm_sem(struct device *dev)
  243. {
  244. down_read(&cnss_pm_sem);
  245. }
  246. EXPORT_SYMBOL(cnss_lock_pm_sem);
  247. void cnss_release_pm_sem(struct device *dev)
  248. {
  249. up_read(&cnss_pm_sem);
  250. }
  251. EXPORT_SYMBOL(cnss_release_pm_sem);
  252. int cnss_get_fw_files_for_target(struct device *dev,
  253. struct cnss_fw_files *pfw_files,
  254. u32 target_type, u32 target_version)
  255. {
  256. if (!pfw_files)
  257. return -ENODEV;
  258. switch (target_version) {
  259. case QCA6174_REV3_VERSION:
  260. case QCA6174_REV3_2_VERSION:
  261. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  262. break;
  263. default:
  264. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  265. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  266. target_type, target_version);
  267. break;
  268. }
  269. return 0;
  270. }
  271. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  272. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  273. {
  274. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  275. if (!plat_priv)
  276. return -ENODEV;
  277. if (!cap)
  278. return -EINVAL;
  279. *cap = plat_priv->cap;
  280. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  281. return 0;
  282. }
  283. EXPORT_SYMBOL(cnss_get_platform_cap);
  284. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  285. {
  286. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  287. if (!plat_priv)
  288. return;
  289. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  290. }
  291. EXPORT_SYMBOL(cnss_request_pm_qos);
  292. void cnss_remove_pm_qos(struct device *dev)
  293. {
  294. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  295. if (!plat_priv)
  296. return;
  297. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  298. }
  299. EXPORT_SYMBOL(cnss_remove_pm_qos);
  300. int cnss_wlan_enable(struct device *dev,
  301. struct cnss_wlan_enable_cfg *config,
  302. enum cnss_driver_mode mode,
  303. const char *host_version)
  304. {
  305. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  306. int ret = 0;
  307. if (!plat_priv)
  308. return -ENODEV;
  309. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  310. return 0;
  311. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  312. return 0;
  313. if (!config || !host_version) {
  314. cnss_pr_err("Invalid config or host_version pointer\n");
  315. return -EINVAL;
  316. }
  317. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  318. mode, config, host_version);
  319. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  320. goto skip_cfg;
  321. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  322. if (ret)
  323. goto out;
  324. skip_cfg:
  325. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  326. out:
  327. return ret;
  328. }
  329. EXPORT_SYMBOL(cnss_wlan_enable);
  330. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  331. {
  332. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  333. int ret = 0;
  334. if (!plat_priv)
  335. return -ENODEV;
  336. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  337. return 0;
  338. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  339. return 0;
  340. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  341. cnss_bus_free_qdss_mem(plat_priv);
  342. return ret;
  343. }
  344. EXPORT_SYMBOL(cnss_wlan_disable);
  345. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  346. u32 data_len, u8 *output)
  347. {
  348. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  349. int ret = 0;
  350. if (!plat_priv) {
  351. cnss_pr_err("plat_priv is NULL!\n");
  352. return -EINVAL;
  353. }
  354. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  355. return 0;
  356. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  357. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  358. plat_priv->driver_state);
  359. ret = -EINVAL;
  360. goto out;
  361. }
  362. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  363. data_len, output);
  364. out:
  365. return ret;
  366. }
  367. EXPORT_SYMBOL(cnss_athdiag_read);
  368. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  369. u32 data_len, u8 *input)
  370. {
  371. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  372. int ret = 0;
  373. if (!plat_priv) {
  374. cnss_pr_err("plat_priv is NULL!\n");
  375. return -EINVAL;
  376. }
  377. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  378. return 0;
  379. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  380. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  381. plat_priv->driver_state);
  382. ret = -EINVAL;
  383. goto out;
  384. }
  385. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  386. data_len, input);
  387. out:
  388. return ret;
  389. }
  390. EXPORT_SYMBOL(cnss_athdiag_write);
  391. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  392. {
  393. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  394. if (!plat_priv)
  395. return -ENODEV;
  396. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  397. return 0;
  398. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  399. }
  400. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  401. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  402. {
  403. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  404. if (!plat_priv)
  405. return -EINVAL;
  406. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  407. !plat_priv->fw_pcie_gen_switch)
  408. return -EOPNOTSUPP;
  409. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  410. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  411. return -EINVAL;
  412. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  413. plat_priv->pcie_gen_speed = pcie_gen_speed;
  414. return 0;
  415. }
  416. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  417. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  418. {
  419. int ret = 0;
  420. if (!plat_priv)
  421. return -ENODEV;
  422. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  423. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  424. if (ret)
  425. goto out;
  426. if (plat_priv->hds_enabled)
  427. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  428. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  429. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  430. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  431. plat_priv->ctrl_params.bdf_type);
  432. if (ret)
  433. goto out;
  434. ret = cnss_bus_load_m3(plat_priv);
  435. if (ret)
  436. goto out;
  437. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  438. if (ret)
  439. goto out;
  440. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  441. return 0;
  442. out:
  443. return ret;
  444. }
  445. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  446. {
  447. int ret = 0;
  448. if (!plat_priv->antenna) {
  449. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  450. if (ret)
  451. goto out;
  452. }
  453. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  454. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  455. if (ret)
  456. goto out;
  457. }
  458. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  459. if (ret)
  460. goto out;
  461. return 0;
  462. out:
  463. return ret;
  464. }
  465. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  466. {
  467. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  468. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  469. }
  470. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  471. {
  472. u32 i;
  473. int ret = 0;
  474. struct cnss_plat_ipc_daemon_config *cfg;
  475. ret = cnss_qmi_get_dms_mac(plat_priv);
  476. if (ret == 0 && plat_priv->dms.mac_valid)
  477. goto qmi_send;
  478. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  479. * Thus assert on failure to get MAC from DMS even after retries
  480. */
  481. if (plat_priv->use_nv_mac) {
  482. /* Check if Daemon says platform support DMS MAC provisioning */
  483. cfg = cnss_plat_ipc_qmi_daemon_config();
  484. if (cfg) {
  485. if (!cfg->dms_mac_addr_supported) {
  486. cnss_pr_err("DMS MAC address not supported\n");
  487. CNSS_ASSERT(0);
  488. return -EINVAL;
  489. }
  490. }
  491. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  492. if (plat_priv->dms.mac_valid)
  493. break;
  494. ret = cnss_qmi_get_dms_mac(plat_priv);
  495. if (ret == 0)
  496. break;
  497. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  498. }
  499. if (!plat_priv->dms.mac_valid) {
  500. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  501. CNSS_ASSERT(0);
  502. return -EINVAL;
  503. }
  504. }
  505. qmi_send:
  506. if (plat_priv->dms.mac_valid)
  507. ret =
  508. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  509. ARRAY_SIZE(plat_priv->dms.mac));
  510. return ret;
  511. }
  512. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  513. enum cnss_cal_db_op op, u32 *size)
  514. {
  515. int ret = 0;
  516. u32 timeout = cnss_get_timeout(plat_priv,
  517. CNSS_TIMEOUT_DAEMON_CONNECTION);
  518. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  519. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  520. if (op >= CNSS_CAL_DB_INVALID_OP)
  521. return -EINVAL;
  522. if (!plat_priv->cbc_file_download) {
  523. cnss_pr_info("CAL DB file not required as per BDF\n");
  524. return 0;
  525. }
  526. if (*size == 0) {
  527. cnss_pr_err("Invalid cal file size\n");
  528. return -EINVAL;
  529. }
  530. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  531. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  532. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  533. msecs_to_jiffies(timeout));
  534. if (!ret) {
  535. cnss_pr_err("Daemon not yet connected\n");
  536. CNSS_ASSERT(0);
  537. return ret;
  538. }
  539. }
  540. if (!plat_priv->cal_mem->va) {
  541. cnss_pr_err("CAL DB Memory not setup for FW\n");
  542. return -EINVAL;
  543. }
  544. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  545. if (op == CNSS_CAL_DB_DOWNLOAD) {
  546. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  547. ret = cnss_plat_ipc_qmi_file_download(client_id,
  548. CNSS_CAL_DB_FILE_NAME,
  549. plat_priv->cal_mem->va,
  550. size);
  551. } else {
  552. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  553. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  554. CNSS_CAL_DB_FILE_NAME,
  555. plat_priv->cal_mem->va,
  556. *size);
  557. }
  558. if (ret)
  559. cnss_pr_err("Cal DB file %s %s failure\n",
  560. CNSS_CAL_DB_FILE_NAME,
  561. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  562. else
  563. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  564. CNSS_CAL_DB_FILE_NAME,
  565. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  566. *size);
  567. return ret;
  568. }
  569. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  570. {
  571. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  572. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  573. return -EINVAL;
  574. }
  575. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  576. &plat_priv->cal_file_size);
  577. }
  578. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  579. u32 *cal_file_size)
  580. {
  581. /* To download pass the total size of cal DB mem allocated.
  582. * After cal file is download to mem, its size is updated in
  583. * return pointer
  584. */
  585. *cal_file_size = plat_priv->cal_mem->size;
  586. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  587. cal_file_size);
  588. }
  589. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  590. {
  591. int ret = 0;
  592. u32 cal_file_size = 0;
  593. if (!plat_priv)
  594. return -ENODEV;
  595. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  596. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  597. return -EINVAL;
  598. }
  599. cnss_pr_dbg("Processing FW Init Done..\n");
  600. del_timer(&plat_priv->fw_boot_timer);
  601. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  602. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  603. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  604. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  605. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  606. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  607. }
  608. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  609. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  610. CNSS_WALTEST);
  611. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  612. cnss_request_antenna_sharing(plat_priv);
  613. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  614. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  615. plat_priv->cal_time = jiffies;
  616. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  617. CNSS_CALIBRATION);
  618. } else {
  619. ret = cnss_setup_dms_mac(plat_priv);
  620. ret = cnss_bus_call_driver_probe(plat_priv);
  621. }
  622. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  623. goto out;
  624. else if (ret)
  625. goto shutdown;
  626. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  627. return 0;
  628. shutdown:
  629. cnss_bus_dev_shutdown(plat_priv);
  630. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  631. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  632. out:
  633. return ret;
  634. }
  635. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  636. {
  637. switch (type) {
  638. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  639. return "SERVER_ARRIVE";
  640. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  641. return "SERVER_EXIT";
  642. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  643. return "REQUEST_MEM";
  644. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  645. return "FW_MEM_READY";
  646. case CNSS_DRIVER_EVENT_FW_READY:
  647. return "FW_READY";
  648. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  649. return "COLD_BOOT_CAL_START";
  650. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  651. return "COLD_BOOT_CAL_DONE";
  652. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  653. return "REGISTER_DRIVER";
  654. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  655. return "UNREGISTER_DRIVER";
  656. case CNSS_DRIVER_EVENT_RECOVERY:
  657. return "RECOVERY";
  658. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  659. return "FORCE_FW_ASSERT";
  660. case CNSS_DRIVER_EVENT_POWER_UP:
  661. return "POWER_UP";
  662. case CNSS_DRIVER_EVENT_POWER_DOWN:
  663. return "POWER_DOWN";
  664. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  665. return "IDLE_RESTART";
  666. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  667. return "IDLE_SHUTDOWN";
  668. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  669. return "IMS_WFC_CALL_IND";
  670. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  671. return "WLFW_TWC_CFG_IND";
  672. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  673. return "QDSS_TRACE_REQ_MEM";
  674. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  675. return "FW_MEM_FILE_SAVE";
  676. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  677. return "QDSS_TRACE_FREE";
  678. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  679. return "QDSS_TRACE_REQ_DATA";
  680. case CNSS_DRIVER_EVENT_MAX:
  681. return "EVENT_MAX";
  682. }
  683. return "UNKNOWN";
  684. };
  685. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  686. enum cnss_driver_event_type type,
  687. u32 flags, void *data)
  688. {
  689. struct cnss_driver_event *event;
  690. unsigned long irq_flags;
  691. int gfp = GFP_KERNEL;
  692. int ret = 0;
  693. if (!plat_priv)
  694. return -ENODEV;
  695. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  696. cnss_driver_event_to_str(type), type,
  697. flags ? "-sync" : "", plat_priv->driver_state, flags);
  698. if (type >= CNSS_DRIVER_EVENT_MAX) {
  699. cnss_pr_err("Invalid Event type: %d, can't post", type);
  700. return -EINVAL;
  701. }
  702. if (in_interrupt() || irqs_disabled())
  703. gfp = GFP_ATOMIC;
  704. event = kzalloc(sizeof(*event), gfp);
  705. if (!event)
  706. return -ENOMEM;
  707. cnss_pm_stay_awake(plat_priv);
  708. event->type = type;
  709. event->data = data;
  710. init_completion(&event->complete);
  711. event->ret = CNSS_EVENT_PENDING;
  712. event->sync = !!(flags & CNSS_EVENT_SYNC);
  713. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  714. list_add_tail(&event->list, &plat_priv->event_list);
  715. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  716. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  717. if (!(flags & CNSS_EVENT_SYNC))
  718. goto out;
  719. if (flags & CNSS_EVENT_UNKILLABLE)
  720. wait_for_completion(&event->complete);
  721. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  722. ret = wait_for_completion_killable(&event->complete);
  723. else
  724. ret = wait_for_completion_interruptible(&event->complete);
  725. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  726. cnss_driver_event_to_str(type), type,
  727. plat_priv->driver_state, ret, event->ret);
  728. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  729. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  730. event->sync = false;
  731. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  732. ret = -EINTR;
  733. goto out;
  734. }
  735. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  736. ret = event->ret;
  737. kfree(event);
  738. out:
  739. cnss_pm_relax(plat_priv);
  740. return ret;
  741. }
  742. /**
  743. * cnss_get_timeout - Get timeout for corresponding type.
  744. * @plat_priv: Pointer to platform driver context.
  745. * @cnss_timeout_type: Timeout type.
  746. *
  747. * Return: Timeout in milliseconds.
  748. */
  749. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  750. enum cnss_timeout_type timeout_type)
  751. {
  752. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  753. switch (timeout_type) {
  754. case CNSS_TIMEOUT_QMI:
  755. return qmi_timeout;
  756. case CNSS_TIMEOUT_POWER_UP:
  757. return (qmi_timeout << 2);
  758. case CNSS_TIMEOUT_IDLE_RESTART:
  759. /* In idle restart power up sequence, we have fw_boot_timer to
  760. * handle FW initialization failure.
  761. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  762. * account for FW dump collection and FW re-initialization on
  763. * retry.
  764. */
  765. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  766. case CNSS_TIMEOUT_CALIBRATION:
  767. /* Similar to mission mode, in CBC if FW init fails
  768. * fw recovery is tried. Thus return 2x the CBC timeout.
  769. */
  770. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  771. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  772. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  773. case CNSS_TIMEOUT_RDDM:
  774. return CNSS_RDDM_TIMEOUT_MS;
  775. case CNSS_TIMEOUT_RECOVERY:
  776. return RECOVERY_TIMEOUT;
  777. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  778. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  779. default:
  780. return qmi_timeout;
  781. }
  782. }
  783. unsigned int cnss_get_boot_timeout(struct device *dev)
  784. {
  785. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  786. if (!plat_priv) {
  787. cnss_pr_err("plat_priv is NULL\n");
  788. return 0;
  789. }
  790. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  791. }
  792. EXPORT_SYMBOL(cnss_get_boot_timeout);
  793. int cnss_power_up(struct device *dev)
  794. {
  795. int ret = 0;
  796. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  797. unsigned int timeout;
  798. if (!plat_priv) {
  799. cnss_pr_err("plat_priv is NULL\n");
  800. return -ENODEV;
  801. }
  802. cnss_pr_dbg("Powering up device\n");
  803. ret = cnss_driver_event_post(plat_priv,
  804. CNSS_DRIVER_EVENT_POWER_UP,
  805. CNSS_EVENT_SYNC, NULL);
  806. if (ret)
  807. goto out;
  808. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  809. goto out;
  810. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  811. reinit_completion(&plat_priv->power_up_complete);
  812. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  813. msecs_to_jiffies(timeout));
  814. if (!ret) {
  815. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  816. timeout);
  817. ret = -EAGAIN;
  818. goto out;
  819. }
  820. return 0;
  821. out:
  822. return ret;
  823. }
  824. EXPORT_SYMBOL(cnss_power_up);
  825. int cnss_power_down(struct device *dev)
  826. {
  827. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  828. if (!plat_priv) {
  829. cnss_pr_err("plat_priv is NULL\n");
  830. return -ENODEV;
  831. }
  832. cnss_pr_dbg("Powering down device\n");
  833. return cnss_driver_event_post(plat_priv,
  834. CNSS_DRIVER_EVENT_POWER_DOWN,
  835. CNSS_EVENT_SYNC, NULL);
  836. }
  837. EXPORT_SYMBOL(cnss_power_down);
  838. int cnss_idle_restart(struct device *dev)
  839. {
  840. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  841. unsigned int timeout;
  842. int ret = 0;
  843. if (!plat_priv) {
  844. cnss_pr_err("plat_priv is NULL\n");
  845. return -ENODEV;
  846. }
  847. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  848. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  849. return -EBUSY;
  850. }
  851. cnss_pr_dbg("Doing idle restart\n");
  852. reinit_completion(&plat_priv->power_up_complete);
  853. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  854. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  855. ret = -EINVAL;
  856. goto out;
  857. }
  858. ret = cnss_driver_event_post(plat_priv,
  859. CNSS_DRIVER_EVENT_IDLE_RESTART,
  860. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  861. if (ret)
  862. goto out;
  863. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  864. ret = cnss_bus_call_driver_probe(plat_priv);
  865. goto out;
  866. }
  867. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  868. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  869. msecs_to_jiffies(timeout));
  870. if (plat_priv->power_up_error) {
  871. ret = plat_priv->power_up_error;
  872. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  873. cnss_pr_dbg("Power up error:%d, exiting\n",
  874. plat_priv->power_up_error);
  875. goto out;
  876. }
  877. if (!ret) {
  878. /* This exception occurs after attempting retry of FW recovery.
  879. * Thus we can safely power off the device.
  880. */
  881. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  882. timeout);
  883. ret = -ETIMEDOUT;
  884. cnss_power_down(dev);
  885. CNSS_ASSERT(0);
  886. goto out;
  887. }
  888. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  889. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  890. del_timer(&plat_priv->fw_boot_timer);
  891. ret = -EINVAL;
  892. goto out;
  893. }
  894. mutex_unlock(&plat_priv->driver_ops_lock);
  895. return 0;
  896. out:
  897. mutex_unlock(&plat_priv->driver_ops_lock);
  898. return ret;
  899. }
  900. EXPORT_SYMBOL(cnss_idle_restart);
  901. int cnss_idle_shutdown(struct device *dev)
  902. {
  903. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  904. unsigned int timeout;
  905. int ret;
  906. if (!plat_priv) {
  907. cnss_pr_err("plat_priv is NULL\n");
  908. return -ENODEV;
  909. }
  910. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  911. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  912. return -EAGAIN;
  913. }
  914. cnss_pr_dbg("Doing idle shutdown\n");
  915. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  916. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  917. goto skip_wait;
  918. reinit_completion(&plat_priv->recovery_complete);
  919. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  920. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  921. msecs_to_jiffies(timeout));
  922. if (!ret) {
  923. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  924. timeout);
  925. CNSS_ASSERT(0);
  926. }
  927. skip_wait:
  928. return cnss_driver_event_post(plat_priv,
  929. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  930. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  931. }
  932. EXPORT_SYMBOL(cnss_idle_shutdown);
  933. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  934. {
  935. int ret = 0;
  936. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  937. if (ret) {
  938. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  939. goto out;
  940. }
  941. ret = cnss_get_clk(plat_priv);
  942. if (ret) {
  943. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  944. goto put_vreg;
  945. }
  946. ret = cnss_get_pinctrl(plat_priv);
  947. if (ret) {
  948. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  949. goto put_clk;
  950. }
  951. return 0;
  952. put_clk:
  953. cnss_put_clk(plat_priv);
  954. put_vreg:
  955. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  956. out:
  957. return ret;
  958. }
  959. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  960. {
  961. cnss_put_clk(plat_priv);
  962. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  963. }
  964. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  965. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  966. unsigned long code,
  967. void *ss_handle)
  968. {
  969. struct cnss_plat_data *plat_priv =
  970. container_of(nb, struct cnss_plat_data, modem_nb);
  971. struct cnss_esoc_info *esoc_info;
  972. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  973. if (!plat_priv)
  974. return NOTIFY_DONE;
  975. esoc_info = &plat_priv->esoc_info;
  976. if (code == SUBSYS_AFTER_POWERUP)
  977. esoc_info->modem_current_status = 1;
  978. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  979. esoc_info->modem_current_status = 0;
  980. else
  981. return NOTIFY_DONE;
  982. if (!cnss_bus_call_driver_modem_status(plat_priv,
  983. esoc_info->modem_current_status))
  984. return NOTIFY_DONE;
  985. return NOTIFY_OK;
  986. }
  987. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  988. {
  989. int ret = 0;
  990. struct device *dev;
  991. struct cnss_esoc_info *esoc_info;
  992. struct esoc_desc *esoc_desc;
  993. const char *client_desc;
  994. dev = &plat_priv->plat_dev->dev;
  995. esoc_info = &plat_priv->esoc_info;
  996. esoc_info->notify_modem_status =
  997. of_property_read_bool(dev->of_node,
  998. "qcom,notify-modem-status");
  999. if (!esoc_info->notify_modem_status)
  1000. goto out;
  1001. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1002. &client_desc);
  1003. if (ret) {
  1004. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1005. } else {
  1006. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1007. if (IS_ERR_OR_NULL(esoc_desc)) {
  1008. ret = PTR_RET(esoc_desc);
  1009. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1010. ret);
  1011. goto out;
  1012. }
  1013. esoc_info->esoc_desc = esoc_desc;
  1014. }
  1015. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1016. esoc_info->modem_current_status = 0;
  1017. esoc_info->modem_notify_handler =
  1018. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1019. esoc_info->esoc_desc->name :
  1020. "modem", &plat_priv->modem_nb);
  1021. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1022. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1023. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1024. ret);
  1025. goto unreg_esoc;
  1026. }
  1027. return 0;
  1028. unreg_esoc:
  1029. if (esoc_info->esoc_desc)
  1030. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1031. out:
  1032. return ret;
  1033. }
  1034. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1035. {
  1036. struct device *dev;
  1037. struct cnss_esoc_info *esoc_info;
  1038. dev = &plat_priv->plat_dev->dev;
  1039. esoc_info = &plat_priv->esoc_info;
  1040. if (esoc_info->notify_modem_status)
  1041. subsys_notif_unregister_notifier
  1042. (esoc_info->modem_notify_handler,
  1043. &plat_priv->modem_nb);
  1044. if (esoc_info->esoc_desc)
  1045. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1046. }
  1047. #else
  1048. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1049. {
  1050. return 0;
  1051. }
  1052. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1053. #endif
  1054. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1055. {
  1056. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1057. int ret = 0;
  1058. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1059. return 0;
  1060. enable_irq(sol_gpio->dev_sol_irq);
  1061. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1062. if (ret)
  1063. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1064. ret);
  1065. return ret;
  1066. }
  1067. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1068. {
  1069. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1070. int ret = 0;
  1071. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1072. return 0;
  1073. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1074. if (ret)
  1075. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1076. ret);
  1077. disable_irq(sol_gpio->dev_sol_irq);
  1078. return ret;
  1079. }
  1080. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1081. {
  1082. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1083. if (sol_gpio->dev_sol_gpio < 0)
  1084. return -EINVAL;
  1085. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1086. }
  1087. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1088. {
  1089. struct cnss_plat_data *plat_priv = data;
  1090. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1091. sol_gpio->dev_sol_counter++;
  1092. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1093. irq, sol_gpio->dev_sol_counter);
  1094. /* Make sure abort current suspend */
  1095. cnss_pm_stay_awake(plat_priv);
  1096. cnss_pm_relax(plat_priv);
  1097. pm_system_wakeup();
  1098. cnss_bus_handle_dev_sol_irq(plat_priv);
  1099. return IRQ_HANDLED;
  1100. }
  1101. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1102. {
  1103. struct device *dev = &plat_priv->plat_dev->dev;
  1104. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1105. int ret = 0;
  1106. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1107. "wlan-dev-sol-gpio", 0);
  1108. if (sol_gpio->dev_sol_gpio < 0)
  1109. goto out;
  1110. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1111. sol_gpio->dev_sol_gpio);
  1112. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1113. if (ret) {
  1114. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1115. ret);
  1116. goto out;
  1117. }
  1118. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1119. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1120. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1121. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1122. if (ret) {
  1123. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1124. goto free_gpio;
  1125. }
  1126. return 0;
  1127. free_gpio:
  1128. gpio_free(sol_gpio->dev_sol_gpio);
  1129. out:
  1130. return ret;
  1131. }
  1132. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1133. {
  1134. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1135. if (sol_gpio->dev_sol_gpio < 0)
  1136. return;
  1137. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1138. gpio_free(sol_gpio->dev_sol_gpio);
  1139. }
  1140. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1141. {
  1142. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1143. if (sol_gpio->host_sol_gpio < 0)
  1144. return -EINVAL;
  1145. if (value)
  1146. cnss_pr_dbg("Assert host SOL GPIO\n");
  1147. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1148. return 0;
  1149. }
  1150. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1151. {
  1152. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1153. if (sol_gpio->host_sol_gpio < 0)
  1154. return -EINVAL;
  1155. return gpio_get_value(sol_gpio->host_sol_gpio);
  1156. }
  1157. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1158. {
  1159. struct device *dev = &plat_priv->plat_dev->dev;
  1160. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1161. int ret = 0;
  1162. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1163. "wlan-host-sol-gpio", 0);
  1164. if (sol_gpio->host_sol_gpio < 0)
  1165. goto out;
  1166. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1167. sol_gpio->host_sol_gpio);
  1168. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1169. if (ret) {
  1170. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1171. ret);
  1172. goto out;
  1173. }
  1174. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1175. return 0;
  1176. out:
  1177. return ret;
  1178. }
  1179. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1180. {
  1181. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1182. if (sol_gpio->host_sol_gpio < 0)
  1183. return;
  1184. gpio_free(sol_gpio->host_sol_gpio);
  1185. }
  1186. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1187. {
  1188. int ret;
  1189. ret = cnss_init_dev_sol_gpio(plat_priv);
  1190. if (ret)
  1191. goto out;
  1192. ret = cnss_init_host_sol_gpio(plat_priv);
  1193. if (ret)
  1194. goto deinit_dev_sol;
  1195. return 0;
  1196. deinit_dev_sol:
  1197. cnss_deinit_dev_sol_gpio(plat_priv);
  1198. out:
  1199. return ret;
  1200. }
  1201. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1202. {
  1203. cnss_deinit_host_sol_gpio(plat_priv);
  1204. cnss_deinit_dev_sol_gpio(plat_priv);
  1205. }
  1206. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1207. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1208. {
  1209. struct cnss_plat_data *plat_priv;
  1210. int ret = 0;
  1211. if (!subsys_desc->dev) {
  1212. cnss_pr_err("dev from subsys_desc is NULL\n");
  1213. return -ENODEV;
  1214. }
  1215. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1216. if (!plat_priv) {
  1217. cnss_pr_err("plat_priv is NULL\n");
  1218. return -ENODEV;
  1219. }
  1220. if (!plat_priv->driver_state) {
  1221. cnss_pr_dbg("Powerup is ignored\n");
  1222. return 0;
  1223. }
  1224. ret = cnss_bus_dev_powerup(plat_priv);
  1225. if (ret)
  1226. __pm_relax(plat_priv->recovery_ws);
  1227. return ret;
  1228. }
  1229. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1230. bool force_stop)
  1231. {
  1232. struct cnss_plat_data *plat_priv;
  1233. if (!subsys_desc->dev) {
  1234. cnss_pr_err("dev from subsys_desc is NULL\n");
  1235. return -ENODEV;
  1236. }
  1237. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1238. if (!plat_priv) {
  1239. cnss_pr_err("plat_priv is NULL\n");
  1240. return -ENODEV;
  1241. }
  1242. if (!plat_priv->driver_state) {
  1243. cnss_pr_dbg("shutdown is ignored\n");
  1244. return 0;
  1245. }
  1246. return cnss_bus_dev_shutdown(plat_priv);
  1247. }
  1248. void cnss_device_crashed(struct device *dev)
  1249. {
  1250. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1251. struct cnss_subsys_info *subsys_info;
  1252. if (!plat_priv)
  1253. return;
  1254. subsys_info = &plat_priv->subsys_info;
  1255. if (subsys_info->subsys_device) {
  1256. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1257. subsys_set_crash_status(subsys_info->subsys_device, true);
  1258. subsystem_restart_dev(subsys_info->subsys_device);
  1259. }
  1260. }
  1261. EXPORT_SYMBOL(cnss_device_crashed);
  1262. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1263. {
  1264. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1265. if (!plat_priv) {
  1266. cnss_pr_err("plat_priv is NULL\n");
  1267. return;
  1268. }
  1269. cnss_bus_dev_crash_shutdown(plat_priv);
  1270. }
  1271. static int cnss_subsys_ramdump(int enable,
  1272. const struct subsys_desc *subsys_desc)
  1273. {
  1274. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1275. if (!plat_priv) {
  1276. cnss_pr_err("plat_priv is NULL\n");
  1277. return -ENODEV;
  1278. }
  1279. if (!enable)
  1280. return 0;
  1281. return cnss_bus_dev_ramdump(plat_priv);
  1282. }
  1283. static void cnss_recovery_work_handler(struct work_struct *work)
  1284. {
  1285. }
  1286. #else
  1287. static void cnss_recovery_work_handler(struct work_struct *work)
  1288. {
  1289. int ret;
  1290. struct cnss_plat_data *plat_priv =
  1291. container_of(work, struct cnss_plat_data, recovery_work);
  1292. if (!plat_priv->recovery_enabled)
  1293. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1294. cnss_bus_dev_shutdown(plat_priv);
  1295. cnss_bus_dev_ramdump(plat_priv);
  1296. msleep(POWER_RESET_MIN_DELAY_MS);
  1297. ret = cnss_bus_dev_powerup(plat_priv);
  1298. if (ret)
  1299. __pm_relax(plat_priv->recovery_ws);
  1300. return;
  1301. }
  1302. void cnss_device_crashed(struct device *dev)
  1303. {
  1304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1305. if (!plat_priv)
  1306. return;
  1307. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1308. schedule_work(&plat_priv->recovery_work);
  1309. }
  1310. EXPORT_SYMBOL(cnss_device_crashed);
  1311. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1312. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1313. {
  1314. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1315. struct cnss_ramdump_info *ramdump_info;
  1316. if (!plat_priv)
  1317. return NULL;
  1318. ramdump_info = &plat_priv->ramdump_info;
  1319. *size = ramdump_info->ramdump_size;
  1320. return ramdump_info->ramdump_va;
  1321. }
  1322. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1323. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1324. {
  1325. switch (reason) {
  1326. case CNSS_REASON_DEFAULT:
  1327. return "DEFAULT";
  1328. case CNSS_REASON_LINK_DOWN:
  1329. return "LINK_DOWN";
  1330. case CNSS_REASON_RDDM:
  1331. return "RDDM";
  1332. case CNSS_REASON_TIMEOUT:
  1333. return "TIMEOUT";
  1334. }
  1335. return "UNKNOWN";
  1336. };
  1337. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1338. enum cnss_recovery_reason reason)
  1339. {
  1340. plat_priv->recovery_count++;
  1341. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1342. goto self_recovery;
  1343. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1344. cnss_pr_dbg("Skip device recovery\n");
  1345. return 0;
  1346. }
  1347. /* FW recovery sequence has multiple steps and firmware load requires
  1348. * linux PM in awake state. Thus hold the cnss wake source until
  1349. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1350. * time taken in this process.
  1351. */
  1352. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1353. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1354. true);
  1355. switch (reason) {
  1356. case CNSS_REASON_LINK_DOWN:
  1357. if (!cnss_bus_check_link_status(plat_priv)) {
  1358. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1359. return 0;
  1360. }
  1361. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1362. &plat_priv->ctrl_params.quirks))
  1363. goto self_recovery;
  1364. if (!cnss_bus_recover_link_down(plat_priv)) {
  1365. /* clear recovery bit here to avoid skipping
  1366. * the recovery work for RDDM later
  1367. */
  1368. clear_bit(CNSS_DRIVER_RECOVERY,
  1369. &plat_priv->driver_state);
  1370. return 0;
  1371. }
  1372. break;
  1373. case CNSS_REASON_RDDM:
  1374. cnss_bus_collect_dump_info(plat_priv, false);
  1375. break;
  1376. case CNSS_REASON_DEFAULT:
  1377. case CNSS_REASON_TIMEOUT:
  1378. break;
  1379. default:
  1380. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1381. cnss_recovery_reason_to_str(reason), reason);
  1382. break;
  1383. }
  1384. cnss_bus_device_crashed(plat_priv);
  1385. return 0;
  1386. self_recovery:
  1387. cnss_pr_dbg("Going for self recovery\n");
  1388. cnss_bus_dev_shutdown(plat_priv);
  1389. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1390. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1391. &plat_priv->ctrl_params.quirks);
  1392. cnss_bus_dev_powerup(plat_priv);
  1393. return 0;
  1394. }
  1395. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1396. void *data)
  1397. {
  1398. struct cnss_recovery_data *recovery_data = data;
  1399. int ret = 0;
  1400. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1401. cnss_recovery_reason_to_str(recovery_data->reason),
  1402. recovery_data->reason);
  1403. if (!plat_priv->driver_state) {
  1404. cnss_pr_err("Improper driver state, ignore recovery\n");
  1405. ret = -EINVAL;
  1406. goto out;
  1407. }
  1408. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1409. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1410. ret = -EINVAL;
  1411. goto out;
  1412. }
  1413. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1414. cnss_pr_err("Recovery is already in progress\n");
  1415. CNSS_ASSERT(0);
  1416. ret = -EINVAL;
  1417. goto out;
  1418. }
  1419. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1420. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1421. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1422. ret = -EINVAL;
  1423. goto out;
  1424. }
  1425. switch (plat_priv->device_id) {
  1426. case QCA6174_DEVICE_ID:
  1427. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1428. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1429. &plat_priv->driver_state)) {
  1430. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1431. ret = -EINVAL;
  1432. goto out;
  1433. }
  1434. break;
  1435. default:
  1436. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1437. set_bit(CNSS_FW_BOOT_RECOVERY,
  1438. &plat_priv->driver_state);
  1439. }
  1440. break;
  1441. }
  1442. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1443. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1444. out:
  1445. kfree(data);
  1446. return ret;
  1447. }
  1448. int cnss_self_recovery(struct device *dev,
  1449. enum cnss_recovery_reason reason)
  1450. {
  1451. cnss_schedule_recovery(dev, reason);
  1452. return 0;
  1453. }
  1454. EXPORT_SYMBOL(cnss_self_recovery);
  1455. void cnss_schedule_recovery(struct device *dev,
  1456. enum cnss_recovery_reason reason)
  1457. {
  1458. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1459. struct cnss_recovery_data *data;
  1460. int gfp = GFP_KERNEL;
  1461. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1462. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1463. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1464. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1465. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1466. return;
  1467. }
  1468. if (in_interrupt() || irqs_disabled())
  1469. gfp = GFP_ATOMIC;
  1470. data = kzalloc(sizeof(*data), gfp);
  1471. if (!data)
  1472. return;
  1473. data->reason = reason;
  1474. cnss_driver_event_post(plat_priv,
  1475. CNSS_DRIVER_EVENT_RECOVERY,
  1476. 0, data);
  1477. }
  1478. EXPORT_SYMBOL(cnss_schedule_recovery);
  1479. int cnss_force_fw_assert(struct device *dev)
  1480. {
  1481. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1482. if (!plat_priv) {
  1483. cnss_pr_err("plat_priv is NULL\n");
  1484. return -ENODEV;
  1485. }
  1486. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1487. cnss_pr_info("Forced FW assert is not supported\n");
  1488. return -EOPNOTSUPP;
  1489. }
  1490. if (cnss_bus_is_device_down(plat_priv)) {
  1491. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1492. return 0;
  1493. }
  1494. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1495. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1496. return 0;
  1497. }
  1498. if (in_interrupt() || irqs_disabled())
  1499. cnss_driver_event_post(plat_priv,
  1500. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1501. 0, NULL);
  1502. else
  1503. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1504. return 0;
  1505. }
  1506. EXPORT_SYMBOL(cnss_force_fw_assert);
  1507. int cnss_force_collect_rddm(struct device *dev)
  1508. {
  1509. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1510. unsigned int timeout;
  1511. int ret = 0;
  1512. if (!plat_priv) {
  1513. cnss_pr_err("plat_priv is NULL\n");
  1514. return -ENODEV;
  1515. }
  1516. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1517. cnss_pr_info("Force collect rddm is not supported\n");
  1518. return -EOPNOTSUPP;
  1519. }
  1520. if (cnss_bus_is_device_down(plat_priv)) {
  1521. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1522. goto wait_rddm;
  1523. }
  1524. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1525. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1526. goto wait_rddm;
  1527. }
  1528. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1529. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1530. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1531. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1532. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1533. return 0;
  1534. }
  1535. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1536. if (ret)
  1537. return ret;
  1538. wait_rddm:
  1539. reinit_completion(&plat_priv->rddm_complete);
  1540. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1541. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1542. msecs_to_jiffies(timeout));
  1543. if (!ret) {
  1544. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1545. timeout);
  1546. ret = -ETIMEDOUT;
  1547. } else if (ret > 0) {
  1548. ret = 0;
  1549. }
  1550. return ret;
  1551. }
  1552. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1553. int cnss_qmi_send_get(struct device *dev)
  1554. {
  1555. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1556. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1557. return 0;
  1558. return cnss_bus_qmi_send_get(plat_priv);
  1559. }
  1560. EXPORT_SYMBOL(cnss_qmi_send_get);
  1561. int cnss_qmi_send_put(struct device *dev)
  1562. {
  1563. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1564. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1565. return 0;
  1566. return cnss_bus_qmi_send_put(plat_priv);
  1567. }
  1568. EXPORT_SYMBOL(cnss_qmi_send_put);
  1569. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1570. int cmd_len, void *cb_ctx,
  1571. int (*cb)(void *ctx, void *event, int event_len))
  1572. {
  1573. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1574. int ret;
  1575. if (!plat_priv)
  1576. return -ENODEV;
  1577. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1578. return -EINVAL;
  1579. plat_priv->get_info_cb = cb;
  1580. plat_priv->get_info_cb_ctx = cb_ctx;
  1581. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1582. if (ret) {
  1583. plat_priv->get_info_cb = NULL;
  1584. plat_priv->get_info_cb_ctx = NULL;
  1585. }
  1586. return ret;
  1587. }
  1588. EXPORT_SYMBOL(cnss_qmi_send);
  1589. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1590. {
  1591. int ret = 0;
  1592. u32 retry = 0, timeout;
  1593. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1594. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1595. goto out;
  1596. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1597. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1598. goto out;
  1599. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1600. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1601. goto out;
  1602. }
  1603. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1604. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1605. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1606. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1607. CNSS_ASSERT(0);
  1608. return -EINVAL;
  1609. }
  1610. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1611. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1612. break;
  1613. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1614. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1615. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1616. CNSS_ASSERT(0);
  1617. ret = -EINVAL;
  1618. goto mark_cal_fail;
  1619. }
  1620. }
  1621. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1622. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1623. timeout = cnss_get_timeout(plat_priv,
  1624. CNSS_TIMEOUT_CALIBRATION);
  1625. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1626. timeout / 1000);
  1627. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1628. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1629. msecs_to_jiffies(timeout));
  1630. }
  1631. reinit_completion(&plat_priv->cal_complete);
  1632. ret = cnss_bus_dev_powerup(plat_priv);
  1633. mark_cal_fail:
  1634. if (ret) {
  1635. complete(&plat_priv->cal_complete);
  1636. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1637. /* Set CBC done in driver state to mark attempt and note error
  1638. * since calibration cannot be retried at boot.
  1639. */
  1640. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1641. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1642. }
  1643. out:
  1644. return ret;
  1645. }
  1646. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1647. void *data)
  1648. {
  1649. struct cnss_cal_info *cal_info = data;
  1650. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1651. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1652. goto out;
  1653. switch (cal_info->cal_status) {
  1654. case CNSS_CAL_DONE:
  1655. cnss_pr_dbg("Calibration completed successfully\n");
  1656. plat_priv->cal_done = true;
  1657. break;
  1658. case CNSS_CAL_TIMEOUT:
  1659. case CNSS_CAL_FAILURE:
  1660. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1661. cal_info->cal_status);
  1662. break;
  1663. default:
  1664. cnss_pr_err("Unknown calibration status: %u\n",
  1665. cal_info->cal_status);
  1666. break;
  1667. }
  1668. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1669. cnss_bus_free_qdss_mem(plat_priv);
  1670. cnss_release_antenna_sharing(plat_priv);
  1671. cnss_bus_dev_shutdown(plat_priv);
  1672. msleep(POWER_RESET_MIN_DELAY_MS);
  1673. complete(&plat_priv->cal_complete);
  1674. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1675. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1676. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1677. cnss_cal_mem_upload_to_file(plat_priv);
  1678. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1679. goto out;
  1680. cnss_pr_dbg("Schedule WLAN driver load\n");
  1681. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1682. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1683. 0);
  1684. }
  1685. out:
  1686. kfree(data);
  1687. return 0;
  1688. }
  1689. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1690. {
  1691. int ret;
  1692. ret = cnss_bus_dev_powerup(plat_priv);
  1693. if (ret)
  1694. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1695. return ret;
  1696. }
  1697. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1698. {
  1699. cnss_bus_dev_shutdown(plat_priv);
  1700. return 0;
  1701. }
  1702. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1703. {
  1704. int ret = 0;
  1705. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1706. if (ret < 0)
  1707. return ret;
  1708. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1709. }
  1710. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1711. u32 mem_seg_len, u64 pa, u32 size)
  1712. {
  1713. int i = 0;
  1714. u64 offset = 0;
  1715. void *va = NULL;
  1716. u64 local_pa;
  1717. u32 local_size;
  1718. for (i = 0; i < mem_seg_len; i++) {
  1719. local_pa = (u64)fw_mem[i].pa;
  1720. local_size = (u32)fw_mem[i].size;
  1721. if (pa == local_pa && size <= local_size) {
  1722. va = fw_mem[i].va;
  1723. break;
  1724. }
  1725. if (pa > local_pa &&
  1726. pa < local_pa + local_size &&
  1727. pa + size <= local_pa + local_size) {
  1728. offset = pa - local_pa;
  1729. va = fw_mem[i].va + offset;
  1730. break;
  1731. }
  1732. }
  1733. return va;
  1734. }
  1735. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1736. void *data)
  1737. {
  1738. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1739. struct cnss_fw_mem *fw_mem_seg;
  1740. int ret = 0L;
  1741. void *va = NULL;
  1742. u32 i, fw_mem_seg_len;
  1743. switch (event_data->mem_type) {
  1744. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1745. if (!plat_priv->fw_mem_seg_len)
  1746. goto invalid_mem_save;
  1747. fw_mem_seg = plat_priv->fw_mem;
  1748. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1749. break;
  1750. case QMI_WLFW_MEM_QDSS_V01:
  1751. if (!plat_priv->qdss_mem_seg_len)
  1752. goto invalid_mem_save;
  1753. fw_mem_seg = plat_priv->qdss_mem;
  1754. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1755. break;
  1756. default:
  1757. goto invalid_mem_save;
  1758. }
  1759. for (i = 0; i < event_data->mem_seg_len; i++) {
  1760. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1761. event_data->mem_seg[i].addr,
  1762. event_data->mem_seg[i].size);
  1763. if (!va) {
  1764. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1765. &event_data->mem_seg[i].addr,
  1766. event_data->mem_type);
  1767. ret = -EINVAL;
  1768. break;
  1769. }
  1770. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1771. event_data->file_name,
  1772. event_data->mem_seg[i].size);
  1773. if (ret < 0) {
  1774. cnss_pr_err("Fail to save fw mem data: %d\n",
  1775. ret);
  1776. break;
  1777. }
  1778. }
  1779. kfree(data);
  1780. return ret;
  1781. invalid_mem_save:
  1782. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1783. event_data->mem_type);
  1784. kfree(data);
  1785. return -EINVAL;
  1786. }
  1787. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1788. {
  1789. cnss_bus_free_qdss_mem(plat_priv);
  1790. return 0;
  1791. }
  1792. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1793. void *data)
  1794. {
  1795. int ret = 0;
  1796. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1797. if (!plat_priv)
  1798. return -ENODEV;
  1799. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1800. event_data->total_size);
  1801. kfree(data);
  1802. return ret;
  1803. }
  1804. static void cnss_driver_event_work(struct work_struct *work)
  1805. {
  1806. struct cnss_plat_data *plat_priv =
  1807. container_of(work, struct cnss_plat_data, event_work);
  1808. struct cnss_driver_event *event;
  1809. unsigned long flags;
  1810. int ret = 0;
  1811. if (!plat_priv) {
  1812. cnss_pr_err("plat_priv is NULL!\n");
  1813. return;
  1814. }
  1815. cnss_pm_stay_awake(plat_priv);
  1816. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1817. while (!list_empty(&plat_priv->event_list)) {
  1818. event = list_first_entry(&plat_priv->event_list,
  1819. struct cnss_driver_event, list);
  1820. list_del(&event->list);
  1821. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1822. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1823. cnss_driver_event_to_str(event->type),
  1824. event->sync ? "-sync" : "", event->type,
  1825. plat_priv->driver_state);
  1826. switch (event->type) {
  1827. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1828. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1829. break;
  1830. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1831. ret = cnss_wlfw_server_exit(plat_priv);
  1832. break;
  1833. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1834. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1835. if (ret)
  1836. break;
  1837. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1838. break;
  1839. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1840. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1841. break;
  1842. case CNSS_DRIVER_EVENT_FW_READY:
  1843. ret = cnss_fw_ready_hdlr(plat_priv);
  1844. break;
  1845. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1846. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1847. break;
  1848. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1849. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1850. event->data);
  1851. break;
  1852. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1853. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1854. event->data);
  1855. break;
  1856. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1857. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1858. break;
  1859. case CNSS_DRIVER_EVENT_RECOVERY:
  1860. ret = cnss_driver_recovery_hdlr(plat_priv,
  1861. event->data);
  1862. break;
  1863. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1864. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1865. break;
  1866. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1867. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1868. &plat_priv->driver_state);
  1869. /* fall through */
  1870. case CNSS_DRIVER_EVENT_POWER_UP:
  1871. ret = cnss_power_up_hdlr(plat_priv);
  1872. break;
  1873. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1874. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1875. &plat_priv->driver_state);
  1876. /* fall through */
  1877. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1878. ret = cnss_power_down_hdlr(plat_priv);
  1879. break;
  1880. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1881. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1882. event->data);
  1883. break;
  1884. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1885. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1886. event->data);
  1887. break;
  1888. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1889. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1890. break;
  1891. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1892. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1893. event->data);
  1894. break;
  1895. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1896. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1897. break;
  1898. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1899. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1900. event->data);
  1901. break;
  1902. default:
  1903. cnss_pr_err("Invalid driver event type: %d",
  1904. event->type);
  1905. kfree(event);
  1906. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1907. continue;
  1908. }
  1909. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1910. if (event->sync) {
  1911. event->ret = ret;
  1912. complete(&event->complete);
  1913. continue;
  1914. }
  1915. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1916. kfree(event);
  1917. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1918. }
  1919. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1920. cnss_pm_relax(plat_priv);
  1921. }
  1922. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1923. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1924. {
  1925. int ret = 0;
  1926. struct cnss_subsys_info *subsys_info;
  1927. subsys_info = &plat_priv->subsys_info;
  1928. subsys_info->subsys_desc.name = "wlan";
  1929. subsys_info->subsys_desc.owner = THIS_MODULE;
  1930. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1931. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1932. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1933. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1934. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1935. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1936. if (IS_ERR(subsys_info->subsys_device)) {
  1937. ret = PTR_ERR(subsys_info->subsys_device);
  1938. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1939. goto out;
  1940. }
  1941. subsys_info->subsys_handle =
  1942. subsystem_get(subsys_info->subsys_desc.name);
  1943. if (!subsys_info->subsys_handle) {
  1944. cnss_pr_err("Failed to get subsys_handle!\n");
  1945. ret = -EINVAL;
  1946. goto unregister_subsys;
  1947. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1948. ret = PTR_ERR(subsys_info->subsys_handle);
  1949. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1950. goto unregister_subsys;
  1951. }
  1952. return 0;
  1953. unregister_subsys:
  1954. subsys_unregister(subsys_info->subsys_device);
  1955. out:
  1956. return ret;
  1957. }
  1958. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1959. {
  1960. struct cnss_subsys_info *subsys_info;
  1961. subsys_info = &plat_priv->subsys_info;
  1962. subsystem_put(subsys_info->subsys_handle);
  1963. subsys_unregister(subsys_info->subsys_device);
  1964. }
  1965. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1966. {
  1967. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1968. return create_ramdump_device(subsys_info->subsys_desc.name,
  1969. subsys_info->subsys_desc.dev);
  1970. }
  1971. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1972. void *ramdump_dev)
  1973. {
  1974. destroy_ramdump_device(ramdump_dev);
  1975. }
  1976. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1977. {
  1978. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1979. struct ramdump_segment segment;
  1980. memset(&segment, 0, sizeof(segment));
  1981. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1982. segment.size = ramdump_info->ramdump_size;
  1983. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1984. }
  1985. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1986. {
  1987. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1988. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1989. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1990. struct ramdump_segment *ramdump_segs, *s;
  1991. struct cnss_dump_meta_info meta_info = {0};
  1992. int i, ret = 0;
  1993. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1994. sizeof(*ramdump_segs),
  1995. GFP_KERNEL);
  1996. if (!ramdump_segs)
  1997. return -ENOMEM;
  1998. s = ramdump_segs + 1;
  1999. for (i = 0; i < dump_data->nentries; i++) {
  2000. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2001. cnss_pr_err("Unsupported dump type: %d",
  2002. dump_seg->type);
  2003. continue;
  2004. }
  2005. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2006. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2007. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2008. }
  2009. meta_info.entry[dump_seg->type].entry_num++;
  2010. s->address = dump_seg->address;
  2011. s->v_address = (void __iomem *)dump_seg->v_address;
  2012. s->size = dump_seg->size;
  2013. s++;
  2014. dump_seg++;
  2015. }
  2016. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2017. meta_info.version = CNSS_RAMDUMP_VERSION;
  2018. meta_info.chipset = plat_priv->device_id;
  2019. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2020. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2021. ramdump_segs->size = sizeof(meta_info);
  2022. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2023. dump_data->nentries + 1);
  2024. kfree(ramdump_segs);
  2025. return ret;
  2026. }
  2027. #else
  2028. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2029. void *data)
  2030. {
  2031. struct cnss_plat_data *plat_priv =
  2032. container_of(nb, struct cnss_plat_data, panic_nb);
  2033. cnss_bus_dev_crash_shutdown(plat_priv);
  2034. return NOTIFY_DONE;
  2035. }
  2036. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2037. {
  2038. int ret;
  2039. if (!plat_priv)
  2040. return -ENODEV;
  2041. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2042. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2043. &plat_priv->panic_nb);
  2044. if (ret) {
  2045. cnss_pr_err("Failed to register panic handler\n");
  2046. return -EINVAL;
  2047. }
  2048. return 0;
  2049. }
  2050. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2051. {
  2052. int ret;
  2053. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2054. &plat_priv->panic_nb);
  2055. if (ret)
  2056. cnss_pr_err("Failed to unregister panic handler\n");
  2057. }
  2058. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2059. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2060. {
  2061. return &plat_priv->plat_dev->dev;
  2062. }
  2063. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2064. void *ramdump_dev)
  2065. {
  2066. }
  2067. #endif
  2068. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2069. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2070. {
  2071. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2072. struct qcom_dump_segment segment;
  2073. struct list_head head;
  2074. INIT_LIST_HEAD(&head);
  2075. memset(&segment, 0, sizeof(segment));
  2076. segment.va = ramdump_info->ramdump_va;
  2077. segment.size = ramdump_info->ramdump_size;
  2078. list_add(&segment.node, &head);
  2079. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2080. }
  2081. #else
  2082. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2083. {
  2084. return 0;
  2085. }
  2086. /* Using completion event inside dynamically allocated ramdump_desc
  2087. * may result a race between freeing the event after setting it to
  2088. * complete inside dev coredump free callback and the thread that is
  2089. * waiting for completion.
  2090. */
  2091. DECLARE_COMPLETION(dump_done);
  2092. #define TIMEOUT_SAVE_DUMP_MS 30000
  2093. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2094. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2095. { \
  2096. if (class == ELFCLASS32) \
  2097. return sizeof(struct elf32_##__xhdr); \
  2098. else \
  2099. return sizeof(struct elf64_##__xhdr); \
  2100. }
  2101. SIZEOF_ELF_STRUCT(phdr)
  2102. SIZEOF_ELF_STRUCT(hdr)
  2103. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2104. do { \
  2105. if (class == ELFCLASS32) \
  2106. ((struct elf32_##__xhdr *)arg)->member = value; \
  2107. else \
  2108. ((struct elf64_##__xhdr *)arg)->member = value; \
  2109. } while (0)
  2110. #define set_ehdr_property(arg, class, member, value) \
  2111. set_xhdr_property(hdr, arg, class, member, value)
  2112. #define set_phdr_property(arg, class, member, value) \
  2113. set_xhdr_property(phdr, arg, class, member, value)
  2114. /* These replace qcom_ramdump driver APIs called from common API
  2115. * cnss_do_elf_dump() by the ones defined here.
  2116. */
  2117. #define qcom_dump_segment cnss_qcom_dump_segment
  2118. #define qcom_elf_dump cnss_qcom_elf_dump
  2119. #define dump_enabled cnss_dump_enabled
  2120. struct cnss_qcom_dump_segment {
  2121. struct list_head node;
  2122. dma_addr_t da;
  2123. void *va;
  2124. size_t size;
  2125. };
  2126. struct cnss_qcom_ramdump_desc {
  2127. void *data;
  2128. struct completion dump_done;
  2129. };
  2130. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2131. void *data, size_t datalen)
  2132. {
  2133. struct cnss_qcom_ramdump_desc *desc = data;
  2134. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2135. datalen);
  2136. }
  2137. static void cnss_qcom_devcd_freev(void *data)
  2138. {
  2139. struct cnss_qcom_ramdump_desc *desc = data;
  2140. cnss_pr_dbg("Free dump data for dev coredump\n");
  2141. complete(&dump_done);
  2142. vfree(desc->data);
  2143. kfree(desc);
  2144. }
  2145. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2146. gfp_t gfp)
  2147. {
  2148. struct cnss_qcom_ramdump_desc *desc;
  2149. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2150. int ret;
  2151. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2152. if (!desc)
  2153. return -ENOMEM;
  2154. desc->data = data;
  2155. reinit_completion(&dump_done);
  2156. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2157. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2158. ret = wait_for_completion_timeout(&dump_done,
  2159. msecs_to_jiffies(timeout));
  2160. if (!ret)
  2161. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2162. timeout);
  2163. return ret ? 0 : -ETIMEDOUT;
  2164. }
  2165. /* Since the elf32 and elf64 identification is identical apart from
  2166. * the class, use elf32 by default.
  2167. */
  2168. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2169. {
  2170. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2171. ehdr->e_ident[EI_CLASS] = class;
  2172. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2173. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2174. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2175. }
  2176. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2177. unsigned char class)
  2178. {
  2179. struct cnss_qcom_dump_segment *segment;
  2180. void *phdr, *ehdr;
  2181. size_t data_size, offset;
  2182. int phnum = 0;
  2183. void *data;
  2184. void __iomem *ptr;
  2185. if (!segs || list_empty(segs))
  2186. return -EINVAL;
  2187. data_size = sizeof_elf_hdr(class);
  2188. list_for_each_entry(segment, segs, node) {
  2189. data_size += sizeof_elf_phdr(class) + segment->size;
  2190. phnum++;
  2191. }
  2192. data = vmalloc(data_size);
  2193. if (!data)
  2194. return -ENOMEM;
  2195. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2196. ehdr = data;
  2197. memset(ehdr, 0, sizeof_elf_hdr(class));
  2198. init_elf_identification(ehdr, class);
  2199. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2200. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2201. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2202. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2203. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2204. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2205. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2206. phdr = data + sizeof_elf_hdr(class);
  2207. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2208. list_for_each_entry(segment, segs, node) {
  2209. memset(phdr, 0, sizeof_elf_phdr(class));
  2210. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2211. set_phdr_property(phdr, class, p_offset, offset);
  2212. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2213. set_phdr_property(phdr, class, p_paddr, segment->da);
  2214. set_phdr_property(phdr, class, p_filesz, segment->size);
  2215. set_phdr_property(phdr, class, p_memsz, segment->size);
  2216. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2217. set_phdr_property(phdr, class, p_align, 0);
  2218. if (segment->va) {
  2219. memcpy(data + offset, segment->va, segment->size);
  2220. } else {
  2221. ptr = devm_ioremap(dev, segment->da, segment->size);
  2222. if (!ptr) {
  2223. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2224. &segment->da, segment->size);
  2225. memset(data + offset, 0xff, segment->size);
  2226. } else {
  2227. memcpy_fromio(data + offset, ptr,
  2228. segment->size);
  2229. }
  2230. }
  2231. offset += segment->size;
  2232. phdr += sizeof_elf_phdr(class);
  2233. }
  2234. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2235. }
  2236. /* Saving dump to file system is always needed in this case. */
  2237. static bool cnss_dump_enabled(void)
  2238. {
  2239. return true;
  2240. }
  2241. #endif /* CONFIG_QCOM_RAMDUMP */
  2242. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2243. {
  2244. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2245. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2246. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2247. struct qcom_dump_segment *seg;
  2248. struct cnss_dump_meta_info meta_info = {0};
  2249. struct list_head head;
  2250. int i, ret = 0;
  2251. if (!dump_enabled()) {
  2252. cnss_pr_info("Dump collection is not enabled\n");
  2253. return ret;
  2254. }
  2255. INIT_LIST_HEAD(&head);
  2256. for (i = 0; i < dump_data->nentries; i++) {
  2257. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2258. cnss_pr_err("Unsupported dump type: %d",
  2259. dump_seg->type);
  2260. continue;
  2261. }
  2262. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2263. if (!seg)
  2264. continue;
  2265. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2266. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2267. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2268. }
  2269. meta_info.entry[dump_seg->type].entry_num++;
  2270. seg->da = dump_seg->address;
  2271. seg->va = dump_seg->v_address;
  2272. seg->size = dump_seg->size;
  2273. list_add_tail(&seg->node, &head);
  2274. dump_seg++;
  2275. }
  2276. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2277. if (!seg)
  2278. goto do_elf_dump;
  2279. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2280. meta_info.version = CNSS_RAMDUMP_VERSION;
  2281. meta_info.chipset = plat_priv->device_id;
  2282. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2283. seg->va = &meta_info;
  2284. seg->size = sizeof(meta_info);
  2285. list_add(&seg->node, &head);
  2286. do_elf_dump:
  2287. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2288. while (!list_empty(&head)) {
  2289. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2290. list_del(&seg->node);
  2291. kfree(seg);
  2292. }
  2293. return ret;
  2294. }
  2295. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2296. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2297. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2298. {
  2299. struct cnss_ramdump_info *ramdump_info;
  2300. struct msm_dump_entry dump_entry;
  2301. ramdump_info = &plat_priv->ramdump_info;
  2302. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2303. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2304. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2305. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2306. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2307. sizeof(ramdump_info->dump_data.name));
  2308. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2309. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2310. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2311. &dump_entry);
  2312. }
  2313. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2314. {
  2315. int ret = 0;
  2316. struct device *dev;
  2317. struct cnss_ramdump_info *ramdump_info;
  2318. u32 ramdump_size = 0;
  2319. dev = &plat_priv->plat_dev->dev;
  2320. ramdump_info = &plat_priv->ramdump_info;
  2321. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2322. &ramdump_size) == 0) {
  2323. ramdump_info->ramdump_va =
  2324. dma_alloc_coherent(dev, ramdump_size,
  2325. &ramdump_info->ramdump_pa,
  2326. GFP_KERNEL);
  2327. if (ramdump_info->ramdump_va)
  2328. ramdump_info->ramdump_size = ramdump_size;
  2329. }
  2330. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2331. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2332. if (ramdump_info->ramdump_size == 0) {
  2333. cnss_pr_info("Ramdump will not be collected");
  2334. goto out;
  2335. }
  2336. ret = cnss_init_dump_entry(plat_priv);
  2337. if (ret) {
  2338. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2339. goto free_ramdump;
  2340. }
  2341. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2342. if (!ramdump_info->ramdump_dev) {
  2343. cnss_pr_err("Failed to create ramdump device!");
  2344. ret = -ENOMEM;
  2345. goto free_ramdump;
  2346. }
  2347. return 0;
  2348. free_ramdump:
  2349. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2350. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2351. out:
  2352. return ret;
  2353. }
  2354. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2355. {
  2356. struct device *dev;
  2357. struct cnss_ramdump_info *ramdump_info;
  2358. dev = &plat_priv->plat_dev->dev;
  2359. ramdump_info = &plat_priv->ramdump_info;
  2360. if (ramdump_info->ramdump_dev)
  2361. cnss_destroy_ramdump_device(plat_priv,
  2362. ramdump_info->ramdump_dev);
  2363. if (ramdump_info->ramdump_va)
  2364. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2365. ramdump_info->ramdump_va,
  2366. ramdump_info->ramdump_pa);
  2367. }
  2368. /**
  2369. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2370. * @ret: Error returned by msm_dump_data_register_nominidump
  2371. *
  2372. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2373. * ignore failure.
  2374. *
  2375. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2376. */
  2377. static int cnss_ignore_dump_data_reg_fail(int ret)
  2378. {
  2379. return ret;
  2380. }
  2381. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2382. {
  2383. int ret = 0;
  2384. struct cnss_ramdump_info_v2 *info_v2;
  2385. struct cnss_dump_data *dump_data;
  2386. struct msm_dump_entry dump_entry;
  2387. struct device *dev = &plat_priv->plat_dev->dev;
  2388. u32 ramdump_size = 0;
  2389. info_v2 = &plat_priv->ramdump_info_v2;
  2390. dump_data = &info_v2->dump_data;
  2391. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2392. &ramdump_size) == 0)
  2393. info_v2->ramdump_size = ramdump_size;
  2394. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2395. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2396. if (!info_v2->dump_data_vaddr)
  2397. return -ENOMEM;
  2398. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2399. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2400. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2401. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2402. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2403. sizeof(dump_data->name));
  2404. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2405. dump_entry.addr = virt_to_phys(dump_data);
  2406. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2407. &dump_entry);
  2408. if (ret) {
  2409. ret = cnss_ignore_dump_data_reg_fail(ret);
  2410. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2411. ret ? "Error" : "Ignoring", ret);
  2412. goto free_ramdump;
  2413. }
  2414. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2415. if (!info_v2->ramdump_dev) {
  2416. cnss_pr_err("Failed to create ramdump device!\n");
  2417. ret = -ENOMEM;
  2418. goto free_ramdump;
  2419. }
  2420. return 0;
  2421. free_ramdump:
  2422. kfree(info_v2->dump_data_vaddr);
  2423. info_v2->dump_data_vaddr = NULL;
  2424. return ret;
  2425. }
  2426. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2427. {
  2428. struct cnss_ramdump_info_v2 *info_v2;
  2429. info_v2 = &plat_priv->ramdump_info_v2;
  2430. if (info_v2->ramdump_dev)
  2431. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2432. kfree(info_v2->dump_data_vaddr);
  2433. info_v2->dump_data_vaddr = NULL;
  2434. info_v2->dump_data_valid = false;
  2435. }
  2436. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2437. {
  2438. int ret = 0;
  2439. switch (plat_priv->device_id) {
  2440. case QCA6174_DEVICE_ID:
  2441. ret = cnss_register_ramdump_v1(plat_priv);
  2442. break;
  2443. case QCA6290_DEVICE_ID:
  2444. case QCA6390_DEVICE_ID:
  2445. case QCA6490_DEVICE_ID:
  2446. case KIWI_DEVICE_ID:
  2447. case MANGO_DEVICE_ID:
  2448. ret = cnss_register_ramdump_v2(plat_priv);
  2449. break;
  2450. default:
  2451. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2452. ret = -ENODEV;
  2453. break;
  2454. }
  2455. return ret;
  2456. }
  2457. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2458. {
  2459. switch (plat_priv->device_id) {
  2460. case QCA6174_DEVICE_ID:
  2461. cnss_unregister_ramdump_v1(plat_priv);
  2462. break;
  2463. case QCA6290_DEVICE_ID:
  2464. case QCA6390_DEVICE_ID:
  2465. case QCA6490_DEVICE_ID:
  2466. case KIWI_DEVICE_ID:
  2467. case MANGO_DEVICE_ID:
  2468. cnss_unregister_ramdump_v2(plat_priv);
  2469. break;
  2470. default:
  2471. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2472. break;
  2473. }
  2474. }
  2475. #else
  2476. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2477. {
  2478. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2479. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2480. struct device *dev = &plat_priv->plat_dev->dev;
  2481. u32 ramdump_size = 0;
  2482. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2483. &ramdump_size) == 0)
  2484. info_v2->ramdump_size = ramdump_size;
  2485. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2486. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2487. if (!info_v2->dump_data_vaddr)
  2488. return -ENOMEM;
  2489. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2490. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2491. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2492. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2493. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2494. sizeof(dump_data->name));
  2495. info_v2->ramdump_dev = dev;
  2496. return 0;
  2497. }
  2498. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2499. {
  2500. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2501. info_v2->ramdump_dev = NULL;
  2502. kfree(info_v2->dump_data_vaddr);
  2503. info_v2->dump_data_vaddr = NULL;
  2504. info_v2->dump_data_valid = false;
  2505. }
  2506. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2507. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2508. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2509. phys_addr_t *pa, unsigned long attrs)
  2510. {
  2511. struct sg_table sgt;
  2512. int ret;
  2513. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2514. if (ret) {
  2515. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2516. va, &dma, size, attrs);
  2517. return -EINVAL;
  2518. }
  2519. *pa = page_to_phys(sg_page(sgt.sgl));
  2520. sg_free_table(&sgt);
  2521. return 0;
  2522. }
  2523. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2524. enum cnss_fw_dump_type type, int seg_no,
  2525. void *va, phys_addr_t pa, size_t size)
  2526. {
  2527. struct md_region md_entry;
  2528. int ret;
  2529. switch (type) {
  2530. case CNSS_FW_IMAGE:
  2531. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2532. seg_no);
  2533. break;
  2534. case CNSS_FW_RDDM:
  2535. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2536. seg_no);
  2537. break;
  2538. case CNSS_FW_REMOTE_HEAP:
  2539. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2540. seg_no);
  2541. break;
  2542. default:
  2543. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2544. return -EINVAL;
  2545. }
  2546. md_entry.phys_addr = pa;
  2547. md_entry.virt_addr = (uintptr_t)va;
  2548. md_entry.size = size;
  2549. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2550. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2551. md_entry.name, va, &pa, size);
  2552. ret = msm_minidump_add_region(&md_entry);
  2553. if (ret < 0)
  2554. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2555. return ret;
  2556. }
  2557. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2558. enum cnss_fw_dump_type type, int seg_no,
  2559. void *va, phys_addr_t pa, size_t size)
  2560. {
  2561. struct md_region md_entry;
  2562. int ret;
  2563. switch (type) {
  2564. case CNSS_FW_IMAGE:
  2565. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2566. seg_no);
  2567. break;
  2568. case CNSS_FW_RDDM:
  2569. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2570. seg_no);
  2571. break;
  2572. case CNSS_FW_REMOTE_HEAP:
  2573. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2574. seg_no);
  2575. break;
  2576. default:
  2577. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2578. return -EINVAL;
  2579. }
  2580. md_entry.phys_addr = pa;
  2581. md_entry.virt_addr = (uintptr_t)va;
  2582. md_entry.size = size;
  2583. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2584. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2585. md_entry.name, va, &pa, size);
  2586. ret = msm_minidump_remove_region(&md_entry);
  2587. if (ret)
  2588. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2589. ret);
  2590. return ret;
  2591. }
  2592. #else
  2593. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2594. phys_addr_t *pa, unsigned long attrs)
  2595. {
  2596. return 0;
  2597. }
  2598. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2599. enum cnss_fw_dump_type type, int seg_no,
  2600. void *va, phys_addr_t pa, size_t size)
  2601. {
  2602. return 0;
  2603. }
  2604. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2605. enum cnss_fw_dump_type type, int seg_no,
  2606. void *va, phys_addr_t pa, size_t size)
  2607. {
  2608. return 0;
  2609. }
  2610. #endif /* CONFIG_QCOM_MINIDUMP */
  2611. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2612. const struct firmware **fw_entry,
  2613. const char *filename)
  2614. {
  2615. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2616. return request_firmware_direct(fw_entry, filename,
  2617. &plat_priv->plat_dev->dev);
  2618. else
  2619. return firmware_request_nowarn(fw_entry, filename,
  2620. &plat_priv->plat_dev->dev);
  2621. }
  2622. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2623. /**
  2624. * cnss_register_bus_scale() - Setup interconnect voting data
  2625. * @plat_priv: Platform data structure
  2626. *
  2627. * For different interconnect path configured in device tree setup voting data
  2628. * for list of bandwidth requirements.
  2629. *
  2630. * Result: 0 for success. -EINVAL if not configured
  2631. */
  2632. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2633. {
  2634. int ret = -EINVAL;
  2635. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2636. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2637. struct device *dev = &plat_priv->plat_dev->dev;
  2638. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2639. ret = of_property_read_u32(dev->of_node,
  2640. "qcom,icc-path-count",
  2641. &plat_priv->icc.path_count);
  2642. if (ret) {
  2643. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2644. return 0;
  2645. }
  2646. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2647. "qcom,bus-bw-cfg-count",
  2648. &plat_priv->icc.bus_bw_cfg_count);
  2649. if (ret) {
  2650. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2651. goto cleanup;
  2652. }
  2653. cfg_arr_size = plat_priv->icc.path_count *
  2654. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2655. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2656. if (!cfg_arr) {
  2657. cnss_pr_err("Failed to alloc cfg table mem\n");
  2658. ret = -ENOMEM;
  2659. goto cleanup;
  2660. }
  2661. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2662. "qcom,bus-bw-cfg", cfg_arr,
  2663. cfg_arr_size);
  2664. if (ret) {
  2665. cnss_pr_err("Invalid Bus BW Config Table\n");
  2666. goto cleanup;
  2667. }
  2668. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2669. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2670. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2671. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2672. GFP_KERNEL);
  2673. if (!bus_bw_info) {
  2674. ret = -ENOMEM;
  2675. goto out;
  2676. }
  2677. ret = of_property_read_string_index(dev->of_node,
  2678. "interconnect-names", idx,
  2679. &bus_bw_info->icc_name);
  2680. if (ret)
  2681. goto out;
  2682. bus_bw_info->icc_path =
  2683. of_icc_get(&plat_priv->plat_dev->dev,
  2684. bus_bw_info->icc_name);
  2685. if (IS_ERR(bus_bw_info->icc_path)) {
  2686. ret = PTR_ERR(bus_bw_info->icc_path);
  2687. if (ret != -EPROBE_DEFER) {
  2688. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2689. bus_bw_info->icc_name, ret);
  2690. goto out;
  2691. }
  2692. }
  2693. bus_bw_info->cfg_table =
  2694. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2695. sizeof(*bus_bw_info->cfg_table),
  2696. GFP_KERNEL);
  2697. if (!bus_bw_info->cfg_table) {
  2698. ret = -ENOMEM;
  2699. goto out;
  2700. }
  2701. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2702. bus_bw_info->icc_name);
  2703. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2704. CNSS_ICC_VOTE_MAX);
  2705. i < plat_priv->icc.bus_bw_cfg_count;
  2706. i++, j += 2) {
  2707. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2708. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2709. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2710. i, bus_bw_info->cfg_table[i].avg_bw,
  2711. bus_bw_info->cfg_table[i].peak_bw);
  2712. }
  2713. list_add_tail(&bus_bw_info->list,
  2714. &plat_priv->icc.list_head);
  2715. }
  2716. kfree(cfg_arr);
  2717. return 0;
  2718. out:
  2719. list_for_each_entry_safe(bus_bw_info, tmp,
  2720. &plat_priv->icc.list_head, list) {
  2721. list_del(&bus_bw_info->list);
  2722. }
  2723. cleanup:
  2724. kfree(cfg_arr);
  2725. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2726. return ret;
  2727. }
  2728. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2729. {
  2730. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2731. list_for_each_entry_safe(bus_bw_info, tmp,
  2732. &plat_priv->icc.list_head, list) {
  2733. list_del(&bus_bw_info->list);
  2734. if (bus_bw_info->icc_path)
  2735. icc_put(bus_bw_info->icc_path);
  2736. }
  2737. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2738. }
  2739. #else
  2740. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2741. {
  2742. return 0;
  2743. }
  2744. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2745. #endif /* CONFIG_INTERCONNECT */
  2746. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2747. {
  2748. struct cnss_plat_data *plat_priv = cb_ctx;
  2749. if (!plat_priv) {
  2750. cnss_pr_err("%s: Invalid context\n", __func__);
  2751. return;
  2752. }
  2753. if (status) {
  2754. cnss_pr_info("CNSS Daemon connected\n");
  2755. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2756. complete(&plat_priv->daemon_connected);
  2757. } else {
  2758. cnss_pr_info("CNSS Daemon disconnected\n");
  2759. reinit_completion(&plat_priv->daemon_connected);
  2760. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2761. }
  2762. }
  2763. static ssize_t enable_hds_store(struct device *dev,
  2764. struct device_attribute *attr,
  2765. const char *buf, size_t count)
  2766. {
  2767. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2768. unsigned int enable_hds = 0;
  2769. if (!plat_priv)
  2770. return -ENODEV;
  2771. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2772. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2773. return -EINVAL;
  2774. }
  2775. if (enable_hds)
  2776. plat_priv->hds_enabled = true;
  2777. else
  2778. plat_priv->hds_enabled = false;
  2779. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2780. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2781. return count;
  2782. }
  2783. static ssize_t recovery_show(struct device *dev,
  2784. struct device_attribute *attr,
  2785. char *buf)
  2786. {
  2787. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2788. u32 buf_size = PAGE_SIZE;
  2789. u32 curr_len = 0;
  2790. u32 buf_written = 0;
  2791. if (!plat_priv)
  2792. return -ENODEV;
  2793. buf_written = scnprintf(buf, buf_size,
  2794. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2795. "BIT0 -- wlan fw recovery\n"
  2796. "BIT1 -- wlan pcss recovery\n"
  2797. "---------------------------------\n");
  2798. curr_len += buf_written;
  2799. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2800. "WLAN recovery %s[%d]\n",
  2801. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2802. plat_priv->recovery_enabled);
  2803. curr_len += buf_written;
  2804. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2805. "WLAN PCSS recovery %s[%d]\n",
  2806. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2807. plat_priv->recovery_pcss_enabled);
  2808. curr_len += buf_written;
  2809. /*
  2810. * Now size of curr_len is not over page size for sure,
  2811. * later if new item or none-fixed size item added, need
  2812. * add check to make sure curr_len is not over page size.
  2813. */
  2814. return curr_len;
  2815. }
  2816. static ssize_t time_sync_period_show(struct device *dev,
  2817. struct device_attribute *attr,
  2818. char *buf)
  2819. {
  2820. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2821. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  2822. plat_priv->ctrl_params.time_sync_period);
  2823. }
  2824. static ssize_t time_sync_period_store(struct device *dev,
  2825. struct device_attribute *attr,
  2826. const char *buf, size_t count)
  2827. {
  2828. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2829. unsigned int time_sync_period = 0;
  2830. if (!plat_priv)
  2831. return -ENODEV;
  2832. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  2833. cnss_pr_err("Invalid time sync sysfs command\n");
  2834. return -EINVAL;
  2835. }
  2836. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  2837. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  2838. return count;
  2839. }
  2840. static ssize_t recovery_store(struct device *dev,
  2841. struct device_attribute *attr,
  2842. const char *buf, size_t count)
  2843. {
  2844. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2845. unsigned int recovery = 0;
  2846. int ret;
  2847. if (!plat_priv)
  2848. return -ENODEV;
  2849. if (sscanf(buf, "%du", &recovery) != 1) {
  2850. cnss_pr_err("Invalid recovery sysfs command\n");
  2851. return -EINVAL;
  2852. }
  2853. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2854. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2855. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2856. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2857. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2858. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2859. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2860. if (ret < 0) {
  2861. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2862. plat_priv->recovery_pcss_enabled = false;
  2863. return -EINVAL;
  2864. }
  2865. return count;
  2866. }
  2867. static ssize_t shutdown_store(struct device *dev,
  2868. struct device_attribute *attr,
  2869. const char *buf, size_t count)
  2870. {
  2871. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2872. if (plat_priv) {
  2873. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2874. del_timer(&plat_priv->fw_boot_timer);
  2875. complete_all(&plat_priv->power_up_complete);
  2876. complete_all(&plat_priv->cal_complete);
  2877. }
  2878. cnss_pr_dbg("Received shutdown notification\n");
  2879. return count;
  2880. }
  2881. static ssize_t fs_ready_store(struct device *dev,
  2882. struct device_attribute *attr,
  2883. const char *buf, size_t count)
  2884. {
  2885. int fs_ready = 0;
  2886. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2887. if (sscanf(buf, "%du", &fs_ready) != 1)
  2888. return -EINVAL;
  2889. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2890. fs_ready, count);
  2891. if (!plat_priv) {
  2892. cnss_pr_err("plat_priv is NULL\n");
  2893. return count;
  2894. }
  2895. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2896. cnss_pr_dbg("QMI is bypassed\n");
  2897. return count;
  2898. }
  2899. switch (plat_priv->device_id) {
  2900. case QCA6290_DEVICE_ID:
  2901. case QCA6390_DEVICE_ID:
  2902. case QCA6490_DEVICE_ID:
  2903. case KIWI_DEVICE_ID:
  2904. case MANGO_DEVICE_ID:
  2905. break;
  2906. default:
  2907. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2908. plat_priv->device_id);
  2909. return count;
  2910. }
  2911. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  2912. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2913. cnss_driver_event_post(plat_priv,
  2914. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2915. 0, NULL);
  2916. }
  2917. return count;
  2918. }
  2919. static ssize_t qdss_trace_start_store(struct device *dev,
  2920. struct device_attribute *attr,
  2921. const char *buf, size_t count)
  2922. {
  2923. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2924. wlfw_qdss_trace_start(plat_priv);
  2925. cnss_pr_dbg("Received QDSS start command\n");
  2926. return count;
  2927. }
  2928. static ssize_t qdss_trace_stop_store(struct device *dev,
  2929. struct device_attribute *attr,
  2930. const char *buf, size_t count)
  2931. {
  2932. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2933. u32 option = 0;
  2934. if (sscanf(buf, "%du", &option) != 1)
  2935. return -EINVAL;
  2936. wlfw_qdss_trace_stop(plat_priv, option);
  2937. cnss_pr_dbg("Received QDSS stop command\n");
  2938. return count;
  2939. }
  2940. static ssize_t qdss_conf_download_store(struct device *dev,
  2941. struct device_attribute *attr,
  2942. const char *buf, size_t count)
  2943. {
  2944. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2945. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2946. cnss_pr_dbg("Received QDSS download config command\n");
  2947. return count;
  2948. }
  2949. static ssize_t hw_trace_override_store(struct device *dev,
  2950. struct device_attribute *attr,
  2951. const char *buf, size_t count)
  2952. {
  2953. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2954. int tmp = 0;
  2955. if (sscanf(buf, "%du", &tmp) != 1)
  2956. return -EINVAL;
  2957. plat_priv->hw_trc_override = tmp;
  2958. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2959. return count;
  2960. }
  2961. static ssize_t charger_mode_store(struct device *dev,
  2962. struct device_attribute *attr,
  2963. const char *buf, size_t count)
  2964. {
  2965. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2966. int tmp = 0;
  2967. if (sscanf(buf, "%du", &tmp) != 1)
  2968. return -EINVAL;
  2969. plat_priv->charger_mode = tmp;
  2970. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2971. return count;
  2972. }
  2973. static DEVICE_ATTR_WO(fs_ready);
  2974. static DEVICE_ATTR_WO(shutdown);
  2975. static DEVICE_ATTR_RW(recovery);
  2976. static DEVICE_ATTR_WO(enable_hds);
  2977. static DEVICE_ATTR_WO(qdss_trace_start);
  2978. static DEVICE_ATTR_WO(qdss_trace_stop);
  2979. static DEVICE_ATTR_WO(qdss_conf_download);
  2980. static DEVICE_ATTR_WO(hw_trace_override);
  2981. static DEVICE_ATTR_WO(charger_mode);
  2982. static DEVICE_ATTR_RW(time_sync_period);
  2983. static struct attribute *cnss_attrs[] = {
  2984. &dev_attr_fs_ready.attr,
  2985. &dev_attr_shutdown.attr,
  2986. &dev_attr_recovery.attr,
  2987. &dev_attr_enable_hds.attr,
  2988. &dev_attr_qdss_trace_start.attr,
  2989. &dev_attr_qdss_trace_stop.attr,
  2990. &dev_attr_qdss_conf_download.attr,
  2991. &dev_attr_hw_trace_override.attr,
  2992. &dev_attr_charger_mode.attr,
  2993. &dev_attr_time_sync_period.attr,
  2994. NULL,
  2995. };
  2996. static struct attribute_group cnss_attr_group = {
  2997. .attrs = cnss_attrs,
  2998. };
  2999. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3000. {
  3001. struct device *dev = &plat_priv->plat_dev->dev;
  3002. int ret;
  3003. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3004. if (ret) {
  3005. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3006. ret);
  3007. goto out;
  3008. }
  3009. /* This is only for backward compatibility. */
  3010. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3011. if (ret) {
  3012. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3013. ret);
  3014. goto rm_cnss_link;
  3015. }
  3016. return 0;
  3017. rm_cnss_link:
  3018. sysfs_remove_link(kernel_kobj, "cnss");
  3019. out:
  3020. return ret;
  3021. }
  3022. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3023. {
  3024. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3025. sysfs_remove_link(kernel_kobj, "cnss");
  3026. }
  3027. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3028. {
  3029. int ret = 0;
  3030. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3031. &cnss_attr_group);
  3032. if (ret) {
  3033. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3034. ret);
  3035. goto out;
  3036. }
  3037. cnss_create_sysfs_link(plat_priv);
  3038. return 0;
  3039. out:
  3040. return ret;
  3041. }
  3042. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3043. {
  3044. cnss_remove_sysfs_link(plat_priv);
  3045. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3046. }
  3047. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3048. {
  3049. spin_lock_init(&plat_priv->event_lock);
  3050. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3051. WQ_UNBOUND, 1);
  3052. if (!plat_priv->event_wq) {
  3053. cnss_pr_err("Failed to create event workqueue!\n");
  3054. return -EFAULT;
  3055. }
  3056. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3057. INIT_LIST_HEAD(&plat_priv->event_list);
  3058. return 0;
  3059. }
  3060. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3061. {
  3062. destroy_workqueue(plat_priv->event_wq);
  3063. }
  3064. static int cnss_reboot_notifier(struct notifier_block *nb,
  3065. unsigned long action,
  3066. void *data)
  3067. {
  3068. struct cnss_plat_data *plat_priv =
  3069. container_of(nb, struct cnss_plat_data, reboot_nb);
  3070. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3071. del_timer(&plat_priv->fw_boot_timer);
  3072. complete_all(&plat_priv->power_up_complete);
  3073. complete_all(&plat_priv->cal_complete);
  3074. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3075. return NOTIFY_DONE;
  3076. }
  3077. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3078. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3079. {
  3080. struct Object client_env;
  3081. struct Object app_object;
  3082. u32 wifi_uid = HW_WIFI_UID;
  3083. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3084. int ret;
  3085. u8 state = 0;
  3086. /* get rootObj */
  3087. ret = get_client_env_object(&client_env);
  3088. if (ret) {
  3089. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3090. goto end;
  3091. }
  3092. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3093. if (ret) {
  3094. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3095. if (ret == FEATURE_NOT_SUPPORTED) {
  3096. ret = 0; /* Do not Assert */
  3097. cnss_pr_dbg("Secure HW feature not supported\n");
  3098. }
  3099. goto exit_release_clientenv;
  3100. }
  3101. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3102. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3103. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3104. ObjectCounts_pack(1, 1, 0, 0));
  3105. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3106. if (ret) {
  3107. if (ret == PERIPHERAL_NOT_FOUND) {
  3108. ret = 0; /* Do not Assert */
  3109. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3110. }
  3111. goto exit_release_app_obj;
  3112. }
  3113. if (state == 1)
  3114. set_bit(CNSS_WLAN_HW_DISABLED,
  3115. &plat_priv->driver_state);
  3116. else
  3117. clear_bit(CNSS_WLAN_HW_DISABLED,
  3118. &plat_priv->driver_state);
  3119. exit_release_app_obj:
  3120. Object_release(app_object);
  3121. exit_release_clientenv:
  3122. Object_release(client_env);
  3123. end:
  3124. if (ret) {
  3125. cnss_pr_err("Unable to get HW disable status\n");
  3126. CNSS_ASSERT(0);
  3127. }
  3128. return ret;
  3129. }
  3130. #else
  3131. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3132. {
  3133. return 0;
  3134. }
  3135. #endif
  3136. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3137. {
  3138. int ret;
  3139. ret = cnss_init_sol_gpio(plat_priv);
  3140. if (ret)
  3141. return ret;
  3142. timer_setup(&plat_priv->fw_boot_timer,
  3143. cnss_bus_fw_boot_timeout_hdlr, 0);
  3144. ret = register_pm_notifier(&cnss_pm_notifier);
  3145. if (ret)
  3146. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3147. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3148. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3149. if (ret)
  3150. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3151. ret);
  3152. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3153. if (ret)
  3154. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3155. ret);
  3156. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3157. init_completion(&plat_priv->power_up_complete);
  3158. init_completion(&plat_priv->cal_complete);
  3159. init_completion(&plat_priv->rddm_complete);
  3160. init_completion(&plat_priv->recovery_complete);
  3161. init_completion(&plat_priv->daemon_connected);
  3162. mutex_init(&plat_priv->dev_lock);
  3163. mutex_init(&plat_priv->driver_ops_lock);
  3164. plat_priv->recovery_ws =
  3165. wakeup_source_register(&plat_priv->plat_dev->dev,
  3166. "CNSS_FW_RECOVERY");
  3167. if (!plat_priv->recovery_ws)
  3168. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3169. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3170. cnss_daemon_connection_update_cb,
  3171. plat_priv);
  3172. if (ret)
  3173. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3174. ret);
  3175. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3176. return 0;
  3177. }
  3178. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3179. {
  3180. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3181. plat_priv);
  3182. complete_all(&plat_priv->recovery_complete);
  3183. complete_all(&plat_priv->rddm_complete);
  3184. complete_all(&plat_priv->cal_complete);
  3185. complete_all(&plat_priv->power_up_complete);
  3186. complete_all(&plat_priv->daemon_connected);
  3187. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3188. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3189. unregister_pm_notifier(&cnss_pm_notifier);
  3190. del_timer(&plat_priv->fw_boot_timer);
  3191. wakeup_source_unregister(plat_priv->recovery_ws);
  3192. cnss_deinit_sol_gpio(plat_priv);
  3193. kfree(plat_priv->sram_dump);
  3194. }
  3195. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3196. {
  3197. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3198. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3199. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3200. "qcom,wlan-cbc-enabled");
  3201. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3202. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3203. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3204. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3205. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3206. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3207. * enabled by default
  3208. */
  3209. plat_priv->adsp_pc_enabled = true;
  3210. }
  3211. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3212. {
  3213. struct device *dev = &plat_priv->plat_dev->dev;
  3214. plat_priv->use_pm_domain =
  3215. of_property_read_bool(dev->of_node, "use-pm-domain");
  3216. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3217. }
  3218. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3219. {
  3220. struct device *dev = &plat_priv->plat_dev->dev;
  3221. plat_priv->set_wlaon_pwr_ctrl =
  3222. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3223. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3224. plat_priv->set_wlaon_pwr_ctrl);
  3225. }
  3226. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3227. {
  3228. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3229. "qcom,converged-dt") ||
  3230. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3231. "qcom,same-dt-multi-dev") ||
  3232. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3233. "qcom,multi-wlan-exchg"));
  3234. }
  3235. static const struct platform_device_id cnss_platform_id_table[] = {
  3236. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3237. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3238. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3239. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3240. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3241. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3242. { .name = "qcaconv", .driver_data = 0, },
  3243. { },
  3244. };
  3245. static const struct of_device_id cnss_of_match_table[] = {
  3246. {
  3247. .compatible = "qcom,cnss",
  3248. .data = (void *)&cnss_platform_id_table[0]},
  3249. {
  3250. .compatible = "qcom,cnss-qca6290",
  3251. .data = (void *)&cnss_platform_id_table[1]},
  3252. {
  3253. .compatible = "qcom,cnss-qca6390",
  3254. .data = (void *)&cnss_platform_id_table[2]},
  3255. {
  3256. .compatible = "qcom,cnss-qca6490",
  3257. .data = (void *)&cnss_platform_id_table[3]},
  3258. {
  3259. .compatible = "qcom,cnss-kiwi",
  3260. .data = (void *)&cnss_platform_id_table[4]},
  3261. {
  3262. .compatible = "qcom,cnss-mango",
  3263. .data = (void *)&cnss_platform_id_table[5]},
  3264. {
  3265. .compatible = "qcom,cnss-qca-converged",
  3266. .data = (void *)&cnss_platform_id_table[6]},
  3267. { },
  3268. };
  3269. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3270. static inline bool
  3271. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3272. {
  3273. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3274. "use-nv-mac");
  3275. }
  3276. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3277. {
  3278. struct device_node *child;
  3279. u32 id, i;
  3280. int id_n, device_identifier_gpio, ret;
  3281. u8 gpio_value;
  3282. if (!plat_priv->is_converged_dt)
  3283. return 0;
  3284. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3285. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3286. if (ret) {
  3287. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3288. return ret;
  3289. }
  3290. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3291. gpio_value = gpio_get_value(device_identifier_gpio);
  3292. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3293. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3294. child) {
  3295. if (strcmp(child->name, "chip_cfg"))
  3296. continue;
  3297. id_n = of_property_count_u32_elems(child, "supported-ids");
  3298. if (id_n <= 0) {
  3299. cnss_pr_err("Device id is NOT set\n");
  3300. return -EINVAL;
  3301. }
  3302. for (i = 0; i < id_n; i++) {
  3303. ret = of_property_read_u32_index(child,
  3304. "supported-ids",
  3305. i, &id);
  3306. if (ret) {
  3307. cnss_pr_err("Failed to read supported ids\n");
  3308. return -EINVAL;
  3309. }
  3310. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3311. plat_priv->plat_dev->dev.of_node = child;
  3312. plat_priv->device_id = QCA6490_DEVICE_ID;
  3313. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3314. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3315. child->name, i, id);
  3316. return 0;
  3317. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3318. plat_priv->plat_dev->dev.of_node = child;
  3319. plat_priv->device_id = KIWI_DEVICE_ID;
  3320. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3321. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3322. child->name, i, id);
  3323. return 0;
  3324. }
  3325. }
  3326. }
  3327. return -EINVAL;
  3328. }
  3329. static inline bool
  3330. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3331. {
  3332. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3333. "qcom,converged-dt");
  3334. }
  3335. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3336. {
  3337. int ret = 0;
  3338. int retry = 0;
  3339. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3340. return 0;
  3341. retry:
  3342. ret = cnss_power_on_device(plat_priv);
  3343. if (ret)
  3344. goto end;
  3345. ret = cnss_bus_init(plat_priv);
  3346. if (ret) {
  3347. if ((ret != -EPROBE_DEFER) &&
  3348. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3349. cnss_power_off_device(plat_priv);
  3350. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3351. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3352. goto retry;
  3353. }
  3354. goto power_off;
  3355. }
  3356. return 0;
  3357. power_off:
  3358. cnss_power_off_device(plat_priv);
  3359. end:
  3360. return ret;
  3361. }
  3362. int cnss_wlan_hw_enable(void)
  3363. {
  3364. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3365. int ret = 0;
  3366. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3367. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3368. goto register_driver;
  3369. ret = cnss_wlan_device_init(plat_priv);
  3370. if (ret) {
  3371. CNSS_ASSERT(0);
  3372. return ret;
  3373. }
  3374. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3375. cnss_driver_event_post(plat_priv,
  3376. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3377. 0, NULL);
  3378. register_driver:
  3379. if (plat_priv->driver_ops)
  3380. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3381. return ret;
  3382. }
  3383. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3384. static int cnss_probe(struct platform_device *plat_dev)
  3385. {
  3386. int ret = 0;
  3387. struct cnss_plat_data *plat_priv;
  3388. const struct of_device_id *of_id;
  3389. const struct platform_device_id *device_id;
  3390. if (cnss_get_plat_priv(plat_dev)) {
  3391. cnss_pr_err("Driver is already initialized!\n");
  3392. ret = -EEXIST;
  3393. goto out;
  3394. }
  3395. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3396. if (!of_id || !of_id->data) {
  3397. cnss_pr_err("Failed to find of match device!\n");
  3398. ret = -ENODEV;
  3399. goto out;
  3400. }
  3401. device_id = of_id->data;
  3402. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3403. GFP_KERNEL);
  3404. if (!plat_priv) {
  3405. ret = -ENOMEM;
  3406. goto out;
  3407. }
  3408. plat_priv->plat_dev = plat_dev;
  3409. plat_priv->device_id = device_id->driver_data;
  3410. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3411. plat_priv->use_fw_path_with_prefix =
  3412. cnss_use_fw_path_with_prefix(plat_priv);
  3413. ret = cnss_get_dev_cfg_node(plat_priv);
  3414. if (ret) {
  3415. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3416. goto reset_plat_dev;
  3417. }
  3418. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3419. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3420. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3421. cnss_set_plat_priv(plat_dev, plat_priv);
  3422. platform_set_drvdata(plat_dev, plat_priv);
  3423. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3424. INIT_LIST_HEAD(&plat_priv->clk_list);
  3425. cnss_get_pm_domain_info(plat_priv);
  3426. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3427. cnss_power_misc_params_init(plat_priv);
  3428. cnss_get_tcs_info(plat_priv);
  3429. cnss_get_cpr_info(plat_priv);
  3430. cnss_aop_mbox_init(plat_priv);
  3431. cnss_init_control_params(plat_priv);
  3432. ret = cnss_get_resources(plat_priv);
  3433. if (ret)
  3434. goto reset_ctx;
  3435. ret = cnss_register_esoc(plat_priv);
  3436. if (ret)
  3437. goto free_res;
  3438. ret = cnss_register_bus_scale(plat_priv);
  3439. if (ret)
  3440. goto unreg_esoc;
  3441. ret = cnss_create_sysfs(plat_priv);
  3442. if (ret)
  3443. goto unreg_bus_scale;
  3444. ret = cnss_event_work_init(plat_priv);
  3445. if (ret)
  3446. goto remove_sysfs;
  3447. ret = cnss_qmi_init(plat_priv);
  3448. if (ret)
  3449. goto deinit_event_work;
  3450. ret = cnss_dms_init(plat_priv);
  3451. if (ret)
  3452. goto deinit_qmi;
  3453. ret = cnss_debugfs_create(plat_priv);
  3454. if (ret)
  3455. goto deinit_dms;
  3456. ret = cnss_misc_init(plat_priv);
  3457. if (ret)
  3458. goto destroy_debugfs;
  3459. ret = cnss_wlan_hw_disable_check(plat_priv);
  3460. if (ret)
  3461. goto deinit_misc;
  3462. /* Make sure all platform related init are done before
  3463. * device power on and bus init.
  3464. */
  3465. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3466. ret = cnss_wlan_device_init(plat_priv);
  3467. if (ret)
  3468. goto deinit_misc;
  3469. } else {
  3470. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3471. }
  3472. cnss_register_coex_service(plat_priv);
  3473. cnss_register_ims_service(plat_priv);
  3474. ret = cnss_genl_init();
  3475. if (ret < 0)
  3476. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3477. cnss_pr_info("Platform driver probed successfully.\n");
  3478. return 0;
  3479. deinit_misc:
  3480. cnss_misc_deinit(plat_priv);
  3481. destroy_debugfs:
  3482. cnss_debugfs_destroy(plat_priv);
  3483. deinit_dms:
  3484. cnss_dms_deinit(plat_priv);
  3485. deinit_qmi:
  3486. cnss_qmi_deinit(plat_priv);
  3487. deinit_event_work:
  3488. cnss_event_work_deinit(plat_priv);
  3489. remove_sysfs:
  3490. cnss_remove_sysfs(plat_priv);
  3491. unreg_bus_scale:
  3492. cnss_unregister_bus_scale(plat_priv);
  3493. unreg_esoc:
  3494. cnss_unregister_esoc(plat_priv);
  3495. free_res:
  3496. cnss_put_resources(plat_priv);
  3497. reset_ctx:
  3498. platform_set_drvdata(plat_dev, NULL);
  3499. reset_plat_dev:
  3500. cnss_set_plat_priv(plat_dev, NULL);
  3501. out:
  3502. return ret;
  3503. }
  3504. static int cnss_remove(struct platform_device *plat_dev)
  3505. {
  3506. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3507. cnss_genl_exit();
  3508. cnss_unregister_ims_service(plat_priv);
  3509. cnss_unregister_coex_service(plat_priv);
  3510. cnss_bus_deinit(plat_priv);
  3511. cnss_misc_deinit(plat_priv);
  3512. cnss_debugfs_destroy(plat_priv);
  3513. cnss_dms_deinit(plat_priv);
  3514. cnss_qmi_deinit(plat_priv);
  3515. cnss_event_work_deinit(plat_priv);
  3516. cnss_remove_sysfs(plat_priv);
  3517. cnss_unregister_bus_scale(plat_priv);
  3518. cnss_unregister_esoc(plat_priv);
  3519. cnss_put_resources(plat_priv);
  3520. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3521. mbox_free_channel(plat_priv->mbox_chan);
  3522. platform_set_drvdata(plat_dev, NULL);
  3523. plat_env = NULL;
  3524. return 0;
  3525. }
  3526. static struct platform_driver cnss_platform_driver = {
  3527. .probe = cnss_probe,
  3528. .remove = cnss_remove,
  3529. .driver = {
  3530. .name = "cnss2",
  3531. .of_match_table = cnss_of_match_table,
  3532. #ifdef CONFIG_CNSS_ASYNC
  3533. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3534. #endif
  3535. },
  3536. };
  3537. static bool cnss_check_compatible_node(void)
  3538. {
  3539. struct device_node *dn = NULL;
  3540. for_each_matching_node(dn, cnss_of_match_table) {
  3541. if (of_device_is_available(dn)) {
  3542. cnss_allow_driver_loading = true;
  3543. return true;
  3544. }
  3545. }
  3546. return false;
  3547. }
  3548. /**
  3549. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3550. *
  3551. * Valid device tree node means a node with "compatible" property from the
  3552. * device match table and "status" property is not disabled.
  3553. *
  3554. * Return: true if valid device tree node found, false if not found
  3555. */
  3556. static bool cnss_is_valid_dt_node_found(void)
  3557. {
  3558. struct device_node *dn = NULL;
  3559. for_each_matching_node(dn, cnss_of_match_table) {
  3560. if (of_device_is_available(dn))
  3561. break;
  3562. }
  3563. if (dn)
  3564. return true;
  3565. return false;
  3566. }
  3567. static int __init cnss_initialize(void)
  3568. {
  3569. int ret = 0;
  3570. if (!cnss_is_valid_dt_node_found())
  3571. return -ENODEV;
  3572. if (!cnss_check_compatible_node())
  3573. return ret;
  3574. cnss_debug_init();
  3575. ret = platform_driver_register(&cnss_platform_driver);
  3576. if (ret)
  3577. cnss_debug_deinit();
  3578. return ret;
  3579. }
  3580. static void __exit cnss_exit(void)
  3581. {
  3582. platform_driver_unregister(&cnss_platform_driver);
  3583. cnss_debug_deinit();
  3584. }
  3585. module_init(cnss_initialize);
  3586. module_exit(cnss_exit);
  3587. MODULE_LICENSE("GPL v2");
  3588. MODULE_DESCRIPTION("CNSS2 Platform Driver");