dp_li_rx.c 46 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_li_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_li_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_li_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef WIFI_MONITOR_SUPPORT
  37. #include <dp_mon.h>
  38. #endif
  39. #ifdef FEATURE_WDS
  40. #include "dp_txrx_wds.h"
  41. #endif
  42. #include "dp_hist.h"
  43. #include "dp_rx_buffer_pool.h"
  44. #include "dp_li.h"
  45. static inline
  46. bool is_sa_da_idx_valid(uint32_t max_ast,
  47. qdf_nbuf_t nbuf, struct hal_rx_msdu_metadata msdu_info)
  48. {
  49. if ((qdf_nbuf_is_sa_valid(nbuf) && (msdu_info.sa_idx > max_ast)) ||
  50. (!qdf_nbuf_is_da_mcbc(nbuf) && qdf_nbuf_is_da_valid(nbuf) &&
  51. (msdu_info.da_idx > max_ast)))
  52. return false;
  53. return true;
  54. }
  55. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  56. #if defined(FEATURE_MCL_REPEATER) && defined(FEATURE_MEC)
  57. /**
  58. * dp_rx_mec_check_wrapper() - wrapper to dp_rx_mcast_echo_check
  59. * @soc: core DP main context
  60. * @txrx_peer: dp peer handler
  61. * @rx_tlv_hdr: start of the rx TLV header
  62. * @nbuf: pkt buffer
  63. *
  64. * Return: bool (true if it is a looped back pkt else false)
  65. */
  66. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  67. struct dp_txrx_peer *txrx_peer,
  68. uint8_t *rx_tlv_hdr,
  69. qdf_nbuf_t nbuf)
  70. {
  71. return dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf);
  72. }
  73. #else
  74. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  75. struct dp_txrx_peer *txrx_peer,
  76. uint8_t *rx_tlv_hdr,
  77. qdf_nbuf_t nbuf)
  78. {
  79. return false;
  80. }
  81. #endif
  82. #endif
  83. #ifndef QCA_HOST_MODE_WIFI_DISABLE
  84. static bool
  85. dp_rx_intrabss_ucast_check_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  86. struct dp_txrx_peer *ta_txrx_peer,
  87. struct hal_rx_msdu_metadata *msdu_metadata,
  88. uint8_t *p_tx_vdev_id)
  89. {
  90. uint16_t da_peer_id;
  91. struct dp_txrx_peer *da_peer;
  92. struct dp_ast_entry *ast_entry;
  93. dp_txrx_ref_handle txrx_ref_handle = NULL;
  94. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  95. return false;
  96. ast_entry = soc->ast_table[msdu_metadata->da_idx];
  97. if (!ast_entry)
  98. return false;
  99. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  100. ast_entry->is_active = TRUE;
  101. return false;
  102. }
  103. da_peer_id = ast_entry->peer_id;
  104. /* TA peer cannot be same as peer(DA) on which AST is present
  105. * this indicates a change in topology and that AST entries
  106. * are yet to be updated.
  107. */
  108. if (da_peer_id == ta_txrx_peer->peer_id ||
  109. da_peer_id == HTT_INVALID_PEER)
  110. return false;
  111. da_peer = dp_txrx_peer_get_ref_by_id(soc, da_peer_id,
  112. &txrx_ref_handle, DP_MOD_ID_RX);
  113. if (!da_peer)
  114. return false;
  115. *p_tx_vdev_id = da_peer->vdev->vdev_id;
  116. /* If the source or destination peer in the isolation
  117. * list then dont forward instead push to bridge stack.
  118. */
  119. if (dp_get_peer_isolation(ta_txrx_peer) ||
  120. dp_get_peer_isolation(da_peer) ||
  121. da_peer->vdev->vdev_id != ta_txrx_peer->vdev->vdev_id) {
  122. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  123. return false;
  124. }
  125. if (da_peer->bss_peer) {
  126. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  127. return false;
  128. }
  129. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  130. return true;
  131. }
  132. /*
  133. * dp_rx_intrabss_fwd_li() - Implements the Intra-BSS forwarding logic
  134. *
  135. * @soc: core txrx main context
  136. * @ta_txrx_peer : source peer entry
  137. * @rx_tlv_hdr : start address of rx tlvs
  138. * @nbuf : nbuf that has to be intrabss forwarded
  139. *
  140. * Return: bool: true if it is forwarded else false
  141. */
  142. static bool
  143. dp_rx_intrabss_fwd_li(struct dp_soc *soc,
  144. struct dp_txrx_peer *ta_txrx_peer,
  145. uint8_t *rx_tlv_hdr,
  146. qdf_nbuf_t nbuf,
  147. struct hal_rx_msdu_metadata msdu_metadata,
  148. struct cdp_tid_rx_stats *tid_stats)
  149. {
  150. uint8_t tx_vdev_id;
  151. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  152. * source, then clone the pkt and send the cloned pkt for
  153. * intra BSS forwarding and original pkt up the network stack
  154. * Note: how do we handle multicast pkts. do we forward
  155. * all multicast pkts as is or let a higher layer module
  156. * like igmpsnoop decide whether to forward or not with
  157. * Mcast enhancement.
  158. */
  159. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_txrx_peer->bss_peer)
  160. return dp_rx_intrabss_mcbc_fwd(soc, ta_txrx_peer, rx_tlv_hdr,
  161. nbuf, tid_stats, 0);
  162. if (dp_rx_intrabss_eapol_drop_check(soc, ta_txrx_peer, rx_tlv_hdr,
  163. nbuf))
  164. return true;
  165. if (dp_rx_intrabss_ucast_check_li(soc, nbuf, ta_txrx_peer,
  166. &msdu_metadata, &tx_vdev_id))
  167. return dp_rx_intrabss_ucast_fwd(soc, ta_txrx_peer, tx_vdev_id,
  168. rx_tlv_hdr, nbuf, tid_stats,
  169. 0);
  170. return false;
  171. }
  172. #endif
  173. uint32_t dp_rx_process_li(struct dp_intr *int_ctx,
  174. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  175. uint32_t quota)
  176. {
  177. hal_ring_desc_t ring_desc;
  178. hal_ring_desc_t last_prefetched_hw_desc;
  179. hal_soc_handle_t hal_soc;
  180. struct dp_rx_desc *rx_desc = NULL;
  181. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  182. qdf_nbuf_t nbuf, next;
  183. bool near_full;
  184. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  185. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  186. uint32_t num_pending = 0;
  187. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  188. uint16_t msdu_len = 0;
  189. uint16_t peer_id;
  190. uint8_t vdev_id;
  191. struct dp_txrx_peer *txrx_peer;
  192. dp_txrx_ref_handle txrx_ref_handle = NULL;
  193. struct dp_vdev *vdev;
  194. uint32_t pkt_len = 0;
  195. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  196. struct hal_rx_msdu_desc_info msdu_desc_info;
  197. enum hal_reo_error_status error;
  198. uint32_t peer_mdata;
  199. uint8_t *rx_tlv_hdr;
  200. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  201. uint8_t mac_id = 0;
  202. struct dp_pdev *rx_pdev;
  203. struct dp_srng *dp_rxdma_srng;
  204. struct rx_desc_pool *rx_desc_pool;
  205. struct dp_soc *soc = int_ctx->soc;
  206. struct cdp_tid_rx_stats *tid_stats;
  207. qdf_nbuf_t nbuf_head;
  208. qdf_nbuf_t nbuf_tail;
  209. qdf_nbuf_t deliver_list_head;
  210. qdf_nbuf_t deliver_list_tail;
  211. uint32_t num_rx_bufs_reaped = 0;
  212. uint32_t intr_id;
  213. struct hif_opaque_softc *scn;
  214. int32_t tid = 0;
  215. bool is_prev_msdu_last = true;
  216. uint32_t rx_ol_pkt_cnt = 0;
  217. uint32_t num_entries = 0;
  218. struct hal_rx_msdu_metadata msdu_metadata;
  219. QDF_STATUS status;
  220. qdf_nbuf_t ebuf_head;
  221. qdf_nbuf_t ebuf_tail;
  222. uint8_t pkt_capture_offload = 0;
  223. int max_reap_limit;
  224. uint32_t old_tid;
  225. uint32_t peer_ext_stats;
  226. uint32_t dsf;
  227. uint32_t max_ast;
  228. uint64_t current_time = 0;
  229. uint16_t buf_size;
  230. DP_HIST_INIT();
  231. qdf_assert_always(soc && hal_ring_hdl);
  232. hal_soc = soc->hal_soc;
  233. qdf_assert_always(hal_soc);
  234. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  235. scn = soc->hif_handle;
  236. intr_id = int_ctx->dp_intr_id;
  237. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  238. dp_runtime_pm_mark_last_busy(soc);
  239. more_data:
  240. /* reset local variables here to be re-used in the function */
  241. nbuf_head = NULL;
  242. nbuf_tail = NULL;
  243. deliver_list_head = NULL;
  244. deliver_list_tail = NULL;
  245. txrx_peer = NULL;
  246. vdev = NULL;
  247. num_rx_bufs_reaped = 0;
  248. ebuf_head = NULL;
  249. ebuf_tail = NULL;
  250. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  251. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  252. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  253. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  254. qdf_mem_zero(head, sizeof(head));
  255. qdf_mem_zero(tail, sizeof(tail));
  256. old_tid = 0xff;
  257. dsf = 0;
  258. peer_ext_stats = 0;
  259. max_ast = 0;
  260. rx_pdev = NULL;
  261. tid_stats = NULL;
  262. dp_pkt_get_timestamp(&current_time);
  263. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  264. /*
  265. * Need API to convert from hal_ring pointer to
  266. * Ring Type / Ring Id combo
  267. */
  268. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  269. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  270. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  271. goto done;
  272. }
  273. if (!num_pending)
  274. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  275. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  276. if (num_pending > quota)
  277. num_pending = quota;
  278. last_prefetched_hw_desc = dp_srng_dst_prefetch(hal_soc, hal_ring_hdl,
  279. num_pending);
  280. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  281. max_ast = wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx);
  282. /*
  283. * start reaping the buffers from reo ring and queue
  284. * them in per vdev queue.
  285. * Process the received pkts in a different per vdev loop.
  286. */
  287. while (qdf_likely(num_pending)) {
  288. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  289. if (qdf_unlikely(!ring_desc))
  290. break;
  291. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  292. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  293. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  294. soc, hal_ring_hdl, error);
  295. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  296. 1);
  297. /* Don't know how to deal with this -- assert */
  298. qdf_assert(0);
  299. }
  300. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  301. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  302. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  303. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  304. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  305. break;
  306. }
  307. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  308. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  309. ring_desc, rx_desc);
  310. if (QDF_IS_STATUS_ERROR(status)) {
  311. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  312. qdf_assert_always(!rx_desc->unmapped);
  313. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  314. rx_desc->unmapped = 1;
  315. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  316. rx_desc->pool_id);
  317. dp_rx_add_to_free_desc_list(
  318. &head[rx_desc->pool_id],
  319. &tail[rx_desc->pool_id],
  320. rx_desc);
  321. }
  322. continue;
  323. }
  324. /*
  325. * this is a unlikely scenario where the host is reaping
  326. * a descriptor which it already reaped just a while ago
  327. * but is yet to replenish it back to HW.
  328. * In this case host will dump the last 128 descriptors
  329. * including the software descriptor rx_desc and assert.
  330. */
  331. if (qdf_unlikely(!rx_desc->in_use)) {
  332. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  333. dp_info_rl("Reaping rx_desc not in use!");
  334. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  335. ring_desc, rx_desc);
  336. /* ignore duplicate RX desc and continue to process */
  337. /* Pop out the descriptor */
  338. continue;
  339. }
  340. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  341. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  342. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  343. dp_info_rl("Nbuf sanity check failure!");
  344. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  345. ring_desc, rx_desc);
  346. rx_desc->in_err_state = 1;
  347. continue;
  348. }
  349. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  350. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  351. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  352. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  353. ring_desc, rx_desc);
  354. }
  355. /* Get MPDU DESC info */
  356. hal_rx_mpdu_desc_info_get_li(ring_desc, &mpdu_desc_info);
  357. /* Get MSDU DESC info */
  358. hal_rx_msdu_desc_info_get_li(ring_desc, &msdu_desc_info);
  359. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  360. HAL_MSDU_F_MSDU_CONTINUATION)) {
  361. /* previous msdu has end bit set, so current one is
  362. * the new MPDU
  363. */
  364. if (is_prev_msdu_last) {
  365. /* For new MPDU check if we can read complete
  366. * MPDU by comparing the number of buffers
  367. * available and number of buffers needed to
  368. * reap this MPDU
  369. */
  370. if ((msdu_desc_info.msdu_len /
  371. (buf_size -
  372. soc->rx_pkt_tlv_size) + 1) >
  373. num_pending) {
  374. DP_STATS_INC(soc,
  375. rx.msdu_scatter_wait_break,
  376. 1);
  377. dp_rx_cookie_reset_invalid_bit(
  378. ring_desc);
  379. /* As we are going to break out of the
  380. * loop because of unavailability of
  381. * descs to form complete SG, we need to
  382. * reset the TP in the REO destination
  383. * ring.
  384. */
  385. hal_srng_dst_dec_tp(hal_soc,
  386. hal_ring_hdl);
  387. break;
  388. }
  389. is_prev_msdu_last = false;
  390. }
  391. }
  392. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  393. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  394. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  395. HAL_MPDU_F_RAW_AMPDU))
  396. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  397. if (!is_prev_msdu_last &&
  398. !(msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION))
  399. is_prev_msdu_last = true;
  400. rx_bufs_reaped[rx_desc->pool_id]++;
  401. peer_mdata = mpdu_desc_info.peer_meta_data;
  402. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  403. dp_rx_peer_metadata_peer_id_get_li(soc, peer_mdata);
  404. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  405. DP_PEER_METADATA_VDEV_ID_GET_LI(peer_mdata);
  406. /* to indicate whether this msdu is rx offload */
  407. pkt_capture_offload =
  408. DP_PEER_METADATA_OFFLOAD_GET_LI(peer_mdata);
  409. /*
  410. * save msdu flags first, last and continuation msdu in
  411. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  412. * length to nbuf->cb. This ensures the info required for
  413. * per pkt processing is always in the same cache line.
  414. * This helps in improving throughput for smaller pkt
  415. * sizes.
  416. */
  417. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  418. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  419. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  420. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  421. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  422. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  423. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  424. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  425. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  426. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  427. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  428. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  429. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  430. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  431. /* set reo dest indication */
  432. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  433. rx_desc->nbuf,
  434. HAL_RX_REO_MSDU_REO_DST_IND_GET(ring_desc));
  435. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  436. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  437. /*
  438. * move unmap after scattered msdu waiting break logic
  439. * in case double skb unmap happened.
  440. */
  441. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  442. rx_desc->unmapped = 1;
  443. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  444. ebuf_tail, rx_desc);
  445. quota -= 1;
  446. num_pending -= 1;
  447. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  448. &tail[rx_desc->pool_id], rx_desc);
  449. num_rx_bufs_reaped++;
  450. dp_rx_prefetch_hw_sw_nbuf_desc(soc, hal_soc, num_pending,
  451. hal_ring_hdl,
  452. &last_prefetched_hw_desc,
  453. &last_prefetched_sw_desc);
  454. /*
  455. * only if complete msdu is received for scatter case,
  456. * then allow break.
  457. */
  458. if (is_prev_msdu_last &&
  459. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  460. max_reap_limit))
  461. break;
  462. }
  463. done:
  464. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  465. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  466. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  467. /*
  468. * continue with next mac_id if no pkts were reaped
  469. * from that pool
  470. */
  471. if (!rx_bufs_reaped[mac_id])
  472. continue;
  473. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  474. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  475. dp_rx_buffers_replenish_simple(soc, mac_id, dp_rxdma_srng,
  476. rx_desc_pool,
  477. rx_bufs_reaped[mac_id],
  478. &head[mac_id], &tail[mac_id]);
  479. }
  480. dp_verbose_debug("replenished %u", rx_bufs_reaped[0]);
  481. /* Peer can be NULL is case of LFR */
  482. if (qdf_likely(txrx_peer))
  483. vdev = NULL;
  484. /*
  485. * BIG loop where each nbuf is dequeued from global queue,
  486. * processed and queued back on a per vdev basis. These nbufs
  487. * are sent to stack as and when we run out of nbufs
  488. * or a new nbuf dequeued from global queue has a different
  489. * vdev when compared to previous nbuf.
  490. */
  491. nbuf = nbuf_head;
  492. while (nbuf) {
  493. next = nbuf->next;
  494. dp_rx_prefetch_nbuf_data(nbuf, next);
  495. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  496. nbuf = next;
  497. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  498. continue;
  499. }
  500. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  501. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  502. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  503. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  504. peer_id, vdev_id)) {
  505. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  506. deliver_list_head,
  507. deliver_list_tail);
  508. deliver_list_head = NULL;
  509. deliver_list_tail = NULL;
  510. }
  511. /* Get TID from struct cb->tid_val, save to tid */
  512. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  513. tid = qdf_nbuf_get_tid_val(nbuf);
  514. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  515. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  516. dp_rx_nbuf_free(nbuf);
  517. nbuf = next;
  518. continue;
  519. }
  520. if (qdf_unlikely(!txrx_peer)) {
  521. txrx_peer =
  522. dp_rx_get_txrx_peer_and_vdev(soc, nbuf, peer_id,
  523. &txrx_ref_handle,
  524. pkt_capture_offload,
  525. &vdev,
  526. &rx_pdev, &dsf,
  527. &old_tid);
  528. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  529. nbuf = next;
  530. continue;
  531. }
  532. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  533. dp_txrx_peer_unref_delete(txrx_ref_handle,
  534. DP_MOD_ID_RX);
  535. txrx_peer =
  536. dp_rx_get_txrx_peer_and_vdev(soc, nbuf, peer_id,
  537. &txrx_ref_handle,
  538. pkt_capture_offload,
  539. &vdev,
  540. &rx_pdev, &dsf,
  541. &old_tid);
  542. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  543. nbuf = next;
  544. continue;
  545. }
  546. }
  547. if (txrx_peer) {
  548. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  549. qdf_dp_trace_set_track(nbuf, QDF_RX);
  550. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  551. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  552. QDF_NBUF_RX_PKT_DATA_TRACK;
  553. }
  554. rx_bufs_used++;
  555. /* when hlos tid override is enabled, save tid in
  556. * skb->priority
  557. */
  558. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  559. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  560. qdf_nbuf_set_priority(nbuf, tid);
  561. DP_RX_TID_SAVE(nbuf, tid);
  562. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  563. dp_rx_pkt_tracepoints_enabled())
  564. qdf_nbuf_set_timestamp(nbuf);
  565. if (qdf_likely(old_tid != tid)) {
  566. tid_stats =
  567. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  568. old_tid = tid;
  569. }
  570. /*
  571. * Check if DMA completed -- msdu_done is the last bit
  572. * to be written
  573. */
  574. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(nbuf))) {
  575. if (qdf_unlikely(!hal_rx_attn_msdu_done_get_li(
  576. rx_tlv_hdr))) {
  577. dp_err_rl("MSDU DONE failure");
  578. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  579. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  580. QDF_TRACE_LEVEL_INFO);
  581. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  582. qdf_assert(0);
  583. dp_rx_nbuf_free(nbuf);
  584. nbuf = next;
  585. continue;
  586. } else if (qdf_unlikely(hal_rx_attn_msdu_len_err_get_li(
  587. rx_tlv_hdr))) {
  588. DP_STATS_INC(soc, rx.err.msdu_len_err, 1);
  589. dp_rx_nbuf_free(nbuf);
  590. nbuf = next;
  591. continue;
  592. }
  593. }
  594. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  595. /*
  596. * First IF condition:
  597. * 802.11 Fragmented pkts are reinjected to REO
  598. * HW block as SG pkts and for these pkts we only
  599. * need to pull the RX TLVS header length.
  600. * Second IF condition:
  601. * The below condition happens when an MSDU is spread
  602. * across multiple buffers. This can happen in two cases
  603. * 1. The nbuf size is smaller then the received msdu.
  604. * ex: we have set the nbuf size to 2048 during
  605. * nbuf_alloc. but we received an msdu which is
  606. * 2304 bytes in size then this msdu is spread
  607. * across 2 nbufs.
  608. *
  609. * 2. AMSDUs when RAW mode is enabled.
  610. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  611. * across 1st nbuf and 2nd nbuf and last MSDU is
  612. * spread across 2nd nbuf and 3rd nbuf.
  613. *
  614. * for these scenarios let us create a skb frag_list and
  615. * append these buffers till the last MSDU of the AMSDU
  616. * Third condition:
  617. * This is the most likely case, we receive 802.3 pkts
  618. * decapsulated by HW, here we need to set the pkt length.
  619. */
  620. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  621. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  622. bool is_mcbc, is_sa_vld, is_da_vld;
  623. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  624. rx_tlv_hdr);
  625. is_sa_vld =
  626. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  627. rx_tlv_hdr);
  628. is_da_vld =
  629. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  630. rx_tlv_hdr);
  631. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  632. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  633. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  634. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  635. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  636. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  637. nbuf = dp_rx_sg_create(soc, nbuf);
  638. next = nbuf->next;
  639. if (qdf_nbuf_is_raw_frame(nbuf)) {
  640. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  641. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  642. rx.raw, 1,
  643. msdu_len,
  644. 0);
  645. } else {
  646. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  647. if (!dp_rx_is_sg_supported()) {
  648. dp_rx_nbuf_free(nbuf);
  649. dp_info_rl("sg msdu len %d, dropped",
  650. msdu_len);
  651. nbuf = next;
  652. continue;
  653. }
  654. }
  655. } else {
  656. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  657. pkt_len = msdu_len +
  658. msdu_metadata.l3_hdr_pad +
  659. soc->rx_pkt_tlv_size;
  660. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  661. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  662. }
  663. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  664. /*
  665. * process frame for mulitpass phrase processing
  666. */
  667. if (qdf_unlikely(vdev->multipass_en)) {
  668. if (dp_rx_multipass_process(txrx_peer, nbuf,
  669. tid) == false) {
  670. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  671. rx.multipass_rx_pkt_drop,
  672. 1, 0);
  673. dp_rx_nbuf_free(nbuf);
  674. nbuf = next;
  675. continue;
  676. }
  677. }
  678. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  679. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  680. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  681. rx.policy_check_drop,
  682. 1, 0);
  683. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  684. /* Drop & free packet */
  685. dp_rx_nbuf_free(nbuf);
  686. /* Statistics */
  687. nbuf = next;
  688. continue;
  689. }
  690. if (qdf_unlikely(txrx_peer && (txrx_peer->nawds_enabled) &&
  691. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  692. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  693. rx_tlv_hdr) ==
  694. false))) {
  695. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  696. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  697. rx.nawds_mcast_drop,
  698. 1, 0);
  699. dp_rx_nbuf_free(nbuf);
  700. nbuf = next;
  701. continue;
  702. }
  703. /*
  704. * Drop non-EAPOL frames from unauthorized peer.
  705. */
  706. if (qdf_likely(txrx_peer) &&
  707. qdf_unlikely(!txrx_peer->authorize) &&
  708. !qdf_nbuf_is_raw_frame(nbuf)) {
  709. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  710. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  711. if (!is_eapol) {
  712. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  713. rx.peer_unauth_rx_pkt_drop,
  714. 1, 0);
  715. dp_rx_nbuf_free(nbuf);
  716. nbuf = next;
  717. continue;
  718. }
  719. }
  720. if (soc->process_rx_status)
  721. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  722. /* Update the protocol tag in SKB based on CCE metadata */
  723. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  724. reo_ring_num, false, true);
  725. /* Update the flow tag in SKB based on FSE metadata */
  726. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  727. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  728. reo_ring_num, tid_stats, 0);
  729. if (qdf_unlikely(vdev->mesh_vdev)) {
  730. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  731. == QDF_STATUS_SUCCESS) {
  732. dp_rx_info("%pK: mesh pkt filtered", soc);
  733. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  734. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  735. 1);
  736. dp_rx_nbuf_free(nbuf);
  737. nbuf = next;
  738. continue;
  739. }
  740. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  741. txrx_peer);
  742. }
  743. if (qdf_likely(vdev->rx_decap_type ==
  744. htt_cmn_pkt_type_ethernet) &&
  745. qdf_likely(!vdev->mesh_vdev)) {
  746. /* Due to HW issue, sometimes we see that the sa_idx
  747. * and da_idx are invalid with sa_valid and da_valid
  748. * bits set
  749. *
  750. * in this case we also see that value of
  751. * sa_sw_peer_id is set as 0
  752. *
  753. * Drop the packet if sa_idx and da_idx OOB or
  754. * sa_sw_peerid is 0
  755. */
  756. if (!is_sa_da_idx_valid(max_ast, nbuf,
  757. msdu_metadata)) {
  758. dp_rx_nbuf_free(nbuf);
  759. nbuf = next;
  760. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  761. continue;
  762. }
  763. if (qdf_unlikely(dp_rx_mec_check_wrapper(soc,
  764. txrx_peer,
  765. rx_tlv_hdr,
  766. nbuf))) {
  767. /* this is a looped back MCBC pkt,drop it */
  768. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  769. rx.mec_drop, 1,
  770. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  771. 0);
  772. dp_rx_nbuf_free(nbuf);
  773. nbuf = next;
  774. continue;
  775. }
  776. /* WDS Source Port Learning */
  777. if (qdf_likely(vdev->wds_enabled))
  778. dp_rx_wds_srcport_learn(soc,
  779. rx_tlv_hdr,
  780. txrx_peer,
  781. nbuf,
  782. msdu_metadata);
  783. /* Intrabss-fwd */
  784. if (dp_rx_check_ap_bridge(vdev))
  785. if (dp_rx_intrabss_fwd_li(soc, txrx_peer,
  786. rx_tlv_hdr,
  787. nbuf,
  788. msdu_metadata,
  789. tid_stats)) {
  790. nbuf = next;
  791. tid_stats->intrabss_cnt++;
  792. continue; /* Get next desc */
  793. }
  794. }
  795. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  796. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  797. nbuf);
  798. dp_rx_update_stats(soc, nbuf);
  799. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  800. current_time, nbuf);
  801. DP_RX_LIST_APPEND(deliver_list_head,
  802. deliver_list_tail,
  803. nbuf);
  804. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, to_stack, 1,
  805. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  806. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  807. rx.rx_success, 1,
  808. QDF_NBUF_CB_RX_PKT_LEN(nbuf), 0);
  809. if (qdf_unlikely(txrx_peer->in_twt))
  810. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  811. rx.to_stack_twt, 1,
  812. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  813. 0);
  814. tid_stats->delivered_to_stack++;
  815. nbuf = next;
  816. }
  817. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  818. pkt_capture_offload,
  819. deliver_list_head,
  820. deliver_list_tail);
  821. if (qdf_likely(txrx_peer))
  822. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  823. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  824. if (quota) {
  825. num_pending =
  826. dp_rx_srng_get_num_pending(hal_soc,
  827. hal_ring_hdl,
  828. num_entries,
  829. &near_full);
  830. if (num_pending) {
  831. DP_STATS_INC(soc, rx.hp_oos2, 1);
  832. if (!hif_exec_should_yield(scn, intr_id))
  833. goto more_data;
  834. if (qdf_unlikely(near_full)) {
  835. DP_STATS_INC(soc, rx.near_full, 1);
  836. goto more_data;
  837. }
  838. }
  839. }
  840. if (vdev && vdev->osif_fisa_flush)
  841. vdev->osif_fisa_flush(soc, reo_ring_num);
  842. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  843. vdev->osif_gro_flush(vdev->osif_vdev,
  844. reo_ring_num);
  845. }
  846. }
  847. /* Update histogram statistics by looping through pdev's */
  848. DP_RX_HIST_STATS_PER_PDEV();
  849. return rx_bufs_used; /* Assume no scale factor for now */
  850. }
  851. QDF_STATUS dp_rx_desc_pool_init_li(struct dp_soc *soc,
  852. struct rx_desc_pool *rx_desc_pool,
  853. uint32_t pool_id)
  854. {
  855. return dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
  856. }
  857. void dp_rx_desc_pool_deinit_li(struct dp_soc *soc,
  858. struct rx_desc_pool *rx_desc_pool,
  859. uint32_t pool_id)
  860. {
  861. }
  862. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_li(
  863. struct dp_soc *soc,
  864. void *ring_desc,
  865. struct dp_rx_desc **r_rx_desc)
  866. {
  867. struct hal_buf_info buf_info = {0};
  868. hal_soc_handle_t hal_soc = soc->hal_soc;
  869. /* only cookie and rbm will be valid in buf_info */
  870. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  871. &buf_info);
  872. if (qdf_unlikely(buf_info.rbm !=
  873. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id))) {
  874. /* TODO */
  875. /* Call appropriate handler */
  876. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  877. dp_rx_err("%pK: Invalid RBM %d", soc, buf_info.rbm);
  878. return QDF_STATUS_E_INVAL;
  879. }
  880. if (!dp_rx_is_sw_cookie_valid(soc, buf_info.sw_cookie)) {
  881. dp_rx_err("invalid sw_cookie 0x%x", buf_info.sw_cookie);
  882. return QDF_STATUS_E_INVAL;
  883. }
  884. *r_rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  885. return QDF_STATUS_SUCCESS;
  886. }
  887. bool dp_rx_chain_msdus_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  888. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  889. {
  890. bool mpdu_done = false;
  891. qdf_nbuf_t curr_nbuf = NULL;
  892. qdf_nbuf_t tmp_nbuf = NULL;
  893. /* TODO: Currently only single radio is supported, hence
  894. * pdev hard coded to '0' index
  895. */
  896. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  897. if (!dp_pdev) {
  898. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  899. return mpdu_done;
  900. }
  901. /* if invalid peer SG list has max values free the buffers in list
  902. * and treat current buffer as start of list
  903. *
  904. * current logic to detect the last buffer from attn_tlv is not reliable
  905. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  906. * up
  907. */
  908. if (!dp_pdev->first_nbuf ||
  909. (dp_pdev->invalid_peer_head_msdu &&
  910. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  911. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  912. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  913. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  914. rx_tlv_hdr);
  915. dp_pdev->first_nbuf = true;
  916. /* If the new nbuf received is the first msdu of the
  917. * amsdu and there are msdus in the invalid peer msdu
  918. * list, then let us free all the msdus of the invalid
  919. * peer msdu list.
  920. * This scenario can happen when we start receiving
  921. * new a-msdu even before the previous a-msdu is completely
  922. * received.
  923. */
  924. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  925. while (curr_nbuf) {
  926. tmp_nbuf = curr_nbuf->next;
  927. dp_rx_nbuf_free(curr_nbuf);
  928. curr_nbuf = tmp_nbuf;
  929. }
  930. dp_pdev->invalid_peer_head_msdu = NULL;
  931. dp_pdev->invalid_peer_tail_msdu = NULL;
  932. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  933. }
  934. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  935. rx_tlv_hdr) &&
  936. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  937. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  938. qdf_assert_always(dp_pdev->first_nbuf);
  939. dp_pdev->first_nbuf = false;
  940. mpdu_done = true;
  941. }
  942. /*
  943. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  944. * should be NULL here, add the checking for debugging purpose
  945. * in case some corner case.
  946. */
  947. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  948. dp_pdev->invalid_peer_tail_msdu);
  949. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  950. dp_pdev->invalid_peer_tail_msdu,
  951. nbuf);
  952. return mpdu_done;
  953. }
  954. static struct dp_soc *dp_rx_replensih_soc_get_li(struct dp_soc *soc,
  955. uint8_t chip_id)
  956. {
  957. return soc;
  958. }
  959. qdf_nbuf_t
  960. dp_rx_wbm_err_reap_desc_li(struct dp_intr *int_ctx, struct dp_soc *soc,
  961. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  962. uint32_t *rx_bufs_used)
  963. {
  964. hal_ring_desc_t ring_desc;
  965. hal_soc_handle_t hal_soc;
  966. struct dp_rx_desc *rx_desc;
  967. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  968. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  969. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  970. uint8_t buf_type;
  971. uint8_t mac_id;
  972. struct dp_srng *dp_rxdma_srng;
  973. struct rx_desc_pool *rx_desc_pool;
  974. qdf_nbuf_t nbuf_head = NULL;
  975. qdf_nbuf_t nbuf_tail = NULL;
  976. qdf_nbuf_t nbuf;
  977. union hal_wbm_err_info_u wbm_err_info = { 0 };
  978. uint8_t msdu_continuation = 0;
  979. bool process_sg_buf = false;
  980. uint32_t wbm_err_src;
  981. QDF_STATUS status;
  982. struct dp_soc *replenish_soc;
  983. uint8_t chip_id = 0;
  984. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  985. uint8_t *rx_tlv_hdr;
  986. uint32_t peer_mdata;
  987. qdf_assert(soc && hal_ring_hdl);
  988. hal_soc = soc->hal_soc;
  989. qdf_assert(hal_soc);
  990. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  991. /* TODO */
  992. /*
  993. * Need API to convert from hal_ring pointer to
  994. * Ring Type / Ring Id combo
  995. */
  996. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  997. soc, hal_ring_hdl);
  998. goto done;
  999. }
  1000. while (qdf_likely(quota)) {
  1001. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1002. if (qdf_unlikely(!ring_desc))
  1003. break;
  1004. /* XXX */
  1005. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1006. if (dp_assert_always_internal_stat(
  1007. buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF,
  1008. soc, rx.err.wbm_err_buf_rel_type))
  1009. continue;
  1010. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1011. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1012. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1013. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  1014. ring_desc,
  1015. &rx_desc)) {
  1016. dp_rx_err_err("get rx desc from hal_desc failed");
  1017. continue;
  1018. }
  1019. if (dp_assert_always_internal_stat(rx_desc, soc,
  1020. rx.err.rx_desc_null))
  1021. continue;
  1022. if (!dp_rx_desc_check_magic(rx_desc)) {
  1023. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  1024. soc, rx_desc);
  1025. continue;
  1026. }
  1027. /*
  1028. * this is a unlikely scenario where the host is reaping
  1029. * a descriptor which it already reaped just a while ago
  1030. * but is yet to replenish it back to HW.
  1031. * In this case host will dump the last 128 descriptors
  1032. * including the software descriptor rx_desc and assert.
  1033. */
  1034. if (qdf_unlikely(!rx_desc->in_use)) {
  1035. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1036. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1037. ring_desc, rx_desc);
  1038. continue;
  1039. }
  1040. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info.info_bit,
  1041. hal_soc);
  1042. nbuf = rx_desc->nbuf;
  1043. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1044. ring_desc, rx_desc);
  1045. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1046. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1047. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  1048. nbuf);
  1049. rx_desc->in_err_state = 1;
  1050. rx_desc->unmapped = 1;
  1051. rx_bufs_reaped[rx_desc->pool_id]++;
  1052. dp_rx_add_to_free_desc_list(
  1053. &head[rx_desc->pool_id],
  1054. &tail[rx_desc->pool_id],
  1055. rx_desc);
  1056. continue;
  1057. }
  1058. /* Update peer_id in nbuf cb */
  1059. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1060. peer_mdata = hal_rx_tlv_peer_meta_data_get(soc->hal_soc,
  1061. rx_tlv_hdr);
  1062. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1063. dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  1064. /* Get MPDU DESC info */
  1065. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1066. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  1067. HAL_MPDU_F_QOS_CONTROL_VALID))
  1068. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  1069. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1070. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1071. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1072. rx_desc->unmapped = 1;
  1073. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1074. if (qdf_unlikely(
  1075. soc->wbm_release_desc_rx_sg_support &&
  1076. dp_rx_is_sg_formation_required(&wbm_err_info.info_bit))) {
  1077. /* SG is detected from continuation bit */
  1078. msdu_continuation =
  1079. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1080. ring_desc);
  1081. if (msdu_continuation &&
  1082. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1083. /* Update length from first buffer in SG */
  1084. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1085. hal_rx_msdu_start_msdu_len_get(
  1086. soc->hal_soc,
  1087. qdf_nbuf_data(nbuf));
  1088. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1089. true;
  1090. }
  1091. if (msdu_continuation) {
  1092. /* MSDU continued packets */
  1093. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1094. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1095. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1096. } else {
  1097. /* This is the terminal packet in SG */
  1098. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1099. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1100. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1101. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1102. process_sg_buf = true;
  1103. }
  1104. }
  1105. /*
  1106. * save the wbm desc info in nbuf CB/TLV. We will need this
  1107. * info when we do the actual nbuf processing
  1108. */
  1109. wbm_err_info.info_bit.pool_id = rx_desc->pool_id;
  1110. dp_rx_set_wbm_err_info_in_nbuf(soc, nbuf, wbm_err_info);
  1111. rx_bufs_reaped[rx_desc->pool_id]++;
  1112. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1113. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1114. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1115. nbuf);
  1116. if (process_sg_buf) {
  1117. if (!dp_rx_buffer_pool_refill(
  1118. soc,
  1119. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1120. rx_desc->pool_id))
  1121. DP_RX_MERGE_TWO_LIST(
  1122. nbuf_head, nbuf_tail,
  1123. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1124. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1125. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1126. dp_rx_wbm_sg_list_reset(soc);
  1127. process_sg_buf = false;
  1128. }
  1129. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1130. rx_desc->pool_id)) {
  1131. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1132. }
  1133. dp_rx_add_to_free_desc_list
  1134. (&head[rx_desc->pool_id],
  1135. &tail[rx_desc->pool_id], rx_desc);
  1136. /*
  1137. * if continuation bit is set then we have MSDU spread
  1138. * across multiple buffers, let us not decrement quota
  1139. * till we reap all buffers of that MSDU.
  1140. */
  1141. if (qdf_likely(!msdu_continuation))
  1142. quota -= 1;
  1143. }
  1144. done:
  1145. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1146. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1147. /*
  1148. * continue with next mac_id if no pkts were reaped
  1149. * from that pool
  1150. */
  1151. if (!rx_bufs_reaped[mac_id])
  1152. continue;
  1153. replenish_soc =
  1154. dp_rx_replensih_soc_get_li(soc, chip_id);
  1155. dp_rxdma_srng =
  1156. &replenish_soc->rx_refill_buf_ring[mac_id];
  1157. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1158. dp_rx_buffers_replenish_simple(
  1159. replenish_soc, mac_id,
  1160. dp_rxdma_srng,
  1161. rx_desc_pool,
  1162. rx_bufs_reaped[mac_id],
  1163. &head[mac_id],
  1164. &tail[mac_id]);
  1165. *rx_bufs_used += rx_bufs_reaped[mac_id];
  1166. }
  1167. return nbuf_head;
  1168. }
  1169. QDF_STATUS
  1170. dp_rx_null_q_desc_handle_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1171. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1172. struct dp_txrx_peer *txrx_peer,
  1173. bool is_reo_exception,
  1174. uint8_t link_id)
  1175. {
  1176. uint32_t pkt_len;
  1177. uint16_t msdu_len;
  1178. struct dp_vdev *vdev;
  1179. uint8_t tid;
  1180. qdf_ether_header_t *eh;
  1181. struct hal_rx_msdu_metadata msdu_metadata;
  1182. uint16_t sa_idx = 0;
  1183. bool is_eapol = 0;
  1184. bool enh_flag;
  1185. uint16_t buf_size;
  1186. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1187. qdf_nbuf_set_rx_chfrag_start(
  1188. nbuf,
  1189. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1190. rx_tlv_hdr));
  1191. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1192. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1193. rx_tlv_hdr));
  1194. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1195. rx_tlv_hdr));
  1196. qdf_nbuf_set_da_valid(nbuf,
  1197. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1198. rx_tlv_hdr));
  1199. qdf_nbuf_set_sa_valid(nbuf,
  1200. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1201. rx_tlv_hdr));
  1202. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1203. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1204. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1205. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1206. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1207. if (dp_rx_check_pkt_len(soc, pkt_len))
  1208. goto drop_nbuf;
  1209. /* Set length in nbuf */
  1210. qdf_nbuf_set_pktlen(nbuf, qdf_min(pkt_len, (uint32_t)buf_size));
  1211. }
  1212. /*
  1213. * Check if DMA completed -- msdu_done is the last bit
  1214. * to be written
  1215. */
  1216. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1217. dp_err_rl("MSDU DONE failure");
  1218. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1219. QDF_TRACE_LEVEL_INFO);
  1220. qdf_assert(0);
  1221. }
  1222. if (!txrx_peer &&
  1223. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1224. rx_tlv_hdr, nbuf))
  1225. return QDF_STATUS_E_FAILURE;
  1226. if (!txrx_peer) {
  1227. bool mpdu_done = false;
  1228. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1229. if (!pdev) {
  1230. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1231. return QDF_STATUS_E_FAILURE;
  1232. }
  1233. dp_err_rl("txrx_peer is NULL");
  1234. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1235. qdf_nbuf_len(nbuf));
  1236. /* QCN9000 has the support enabled */
  1237. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1238. mpdu_done = true;
  1239. nbuf->next = NULL;
  1240. /* Trigger invalid peer handler wrapper */
  1241. dp_rx_process_invalid_peer_wrapper(soc,
  1242. nbuf,
  1243. mpdu_done,
  1244. pool_id);
  1245. } else {
  1246. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1247. rx_tlv_hdr,
  1248. pool_id);
  1249. /* Trigger invalid peer handler wrapper */
  1250. dp_rx_process_invalid_peer_wrapper(
  1251. soc,
  1252. pdev->invalid_peer_head_msdu,
  1253. mpdu_done, pool_id);
  1254. }
  1255. if (mpdu_done) {
  1256. pdev->invalid_peer_head_msdu = NULL;
  1257. pdev->invalid_peer_tail_msdu = NULL;
  1258. }
  1259. return QDF_STATUS_E_FAILURE;
  1260. }
  1261. vdev = txrx_peer->vdev;
  1262. if (!vdev) {
  1263. dp_err_rl("Null vdev!");
  1264. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1265. goto drop_nbuf;
  1266. }
  1267. /*
  1268. * Advance the packet start pointer by total size of
  1269. * pre-header TLV's
  1270. */
  1271. if (qdf_nbuf_is_frag(nbuf))
  1272. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1273. else
  1274. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1275. soc->rx_pkt_tlv_size));
  1276. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1277. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1278. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1279. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1280. 0);
  1281. goto drop_nbuf;
  1282. }
  1283. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1284. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1285. if ((sa_idx < 0) ||
  1286. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1287. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1288. goto drop_nbuf;
  1289. }
  1290. }
  1291. if ((!soc->mec_fw_offload) &&
  1292. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1293. /* this is a looped back MCBC pkt, drop it */
  1294. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1295. qdf_nbuf_len(nbuf), 0);
  1296. goto drop_nbuf;
  1297. }
  1298. /*
  1299. * In qwrap mode if the received packet matches with any of the vdev
  1300. * mac addresses, drop it. Donot receive multicast packets originated
  1301. * from any proxysta.
  1302. */
  1303. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1304. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1305. qdf_nbuf_len(nbuf), 0);
  1306. goto drop_nbuf;
  1307. }
  1308. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1309. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1310. rx_tlv_hdr))) {
  1311. dp_err_rl("free buffer for multicast packet");
  1312. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1313. 0);
  1314. goto drop_nbuf;
  1315. }
  1316. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1317. dp_err_rl("mcast Policy Check Drop pkt");
  1318. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1319. 0);
  1320. goto drop_nbuf;
  1321. }
  1322. /* WDS Source Port Learning */
  1323. if (!soc->ast_offload_support &&
  1324. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1325. vdev->wds_enabled))
  1326. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1327. msdu_metadata);
  1328. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1329. struct dp_peer *peer;
  1330. struct dp_rx_tid *rx_tid;
  1331. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1332. DP_MOD_ID_RX_ERR);
  1333. if (peer) {
  1334. rx_tid = &peer->rx_tid[tid];
  1335. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1336. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned) {
  1337. /* For Mesh peer, if on one of the mesh AP the
  1338. * mesh peer is not deleted, the new addition of mesh
  1339. * peer on other mesh AP doesn't do BA negotiation
  1340. * leading to mismatch in BA windows.
  1341. * To avoid this send max BA window during init.
  1342. */
  1343. if (qdf_unlikely(vdev->mesh_vdev) ||
  1344. qdf_unlikely(txrx_peer->nawds_enabled))
  1345. dp_rx_tid_setup_wifi3(
  1346. peer, tid,
  1347. hal_get_rx_max_ba_window(soc->hal_soc,tid),
  1348. IEEE80211_SEQ_MAX);
  1349. else
  1350. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1351. IEEE80211_SEQ_MAX);
  1352. }
  1353. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1354. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1355. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1356. }
  1357. }
  1358. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1359. if (!txrx_peer->authorize) {
  1360. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1361. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1362. if (!dp_rx_err_match_dhost(eh, vdev))
  1363. goto drop_nbuf;
  1364. } else {
  1365. goto drop_nbuf;
  1366. }
  1367. }
  1368. /*
  1369. * Drop packets in this path if cce_match is found. Packets will come
  1370. * in following path depending on whether tidQ is setup.
  1371. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1372. * cce_match = 1
  1373. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1374. * dropped.
  1375. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1376. * cce_match = 1
  1377. * These packets need to be dropped and should not get delivered
  1378. * to stack.
  1379. */
  1380. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1381. goto drop_nbuf;
  1382. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1383. qdf_nbuf_set_raw_frame(nbuf, 1);
  1384. qdf_nbuf_set_next(nbuf, NULL);
  1385. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, 0);
  1386. } else {
  1387. enh_flag = vdev->pdev->enhanced_stats_en;
  1388. qdf_nbuf_set_next(nbuf, NULL);
  1389. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1390. enh_flag);
  1391. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  1392. rx.rx_success, 1,
  1393. qdf_nbuf_len(nbuf), 0);
  1394. /*
  1395. * Update the protocol tag in SKB based on
  1396. * CCE metadata
  1397. */
  1398. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1399. EXCEPTION_DEST_RING_ID,
  1400. true, true);
  1401. /* Update the flow tag in SKB based on FSE metadata */
  1402. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1403. rx_tlv_hdr, true);
  1404. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1405. soc->hal_soc, rx_tlv_hdr) &&
  1406. (vdev->rx_decap_type ==
  1407. htt_cmn_pkt_type_ethernet))) {
  1408. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1409. enh_flag, 0);
  1410. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1411. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1412. qdf_nbuf_len(nbuf),
  1413. enh_flag, 0);
  1414. } else {
  1415. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  1416. qdf_nbuf_len(nbuf),
  1417. enh_flag,
  1418. 0);
  1419. }
  1420. qdf_nbuf_set_exc_frame(nbuf, 1);
  1421. if (qdf_unlikely(vdev->multipass_en)) {
  1422. if (dp_rx_multipass_process(txrx_peer, nbuf,
  1423. tid) == false) {
  1424. DP_PEER_PER_PKT_STATS_INC
  1425. (txrx_peer,
  1426. rx.multipass_rx_pkt_drop,
  1427. 1, link_id);
  1428. goto drop_nbuf;
  1429. }
  1430. }
  1431. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1432. is_eapol);
  1433. }
  1434. return QDF_STATUS_SUCCESS;
  1435. drop_nbuf:
  1436. dp_rx_nbuf_free(nbuf);
  1437. return QDF_STATUS_E_FAILURE;
  1438. }