dp_tx.c 191 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "htt.h"
  20. #include "dp_htt.h"
  21. #include "hal_hw_headers.h"
  22. #include "dp_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include "dp_peer.h"
  25. #include "dp_types.h"
  26. #include "hal_tx.h"
  27. #include "qdf_mem.h"
  28. #include "qdf_nbuf.h"
  29. #include "qdf_net_types.h"
  30. #include "qdf_module.h"
  31. #include <wlan_cfg.h>
  32. #include "dp_ipa.h"
  33. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  34. #include "if_meta_hdr.h"
  35. #endif
  36. #include "enet.h"
  37. #include "dp_internal.h"
  38. #ifdef ATH_SUPPORT_IQUE
  39. #include "dp_txrx_me.h"
  40. #endif
  41. #include "dp_hist.h"
  42. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  43. #include <wlan_dp_swlm.h>
  44. #endif
  45. #ifdef WIFI_MONITOR_SUPPORT
  46. #include <dp_mon.h>
  47. #endif
  48. #ifdef FEATURE_WDS
  49. #include "dp_txrx_wds.h"
  50. #endif
  51. #include "cdp_txrx_cmn_reg.h"
  52. #ifdef CONFIG_SAWF
  53. #include <dp_sawf.h>
  54. #endif
  55. /* Flag to skip CCE classify when mesh or tid override enabled */
  56. #define DP_TX_SKIP_CCE_CLASSIFY \
  57. (DP_TXRX_HLOS_TID_OVERRIDE_ENABLED | DP_TX_MESH_ENABLED)
  58. /* TODO Add support in TSO */
  59. #define DP_DESC_NUM_FRAG(x) 0
  60. /* disable TQM_BYPASS */
  61. #define TQM_BYPASS_WAR 0
  62. #define DP_RETRY_COUNT 7
  63. #ifdef WLAN_PEER_JITTER
  64. #define DP_AVG_JITTER_WEIGHT_DENOM 4
  65. #define DP_AVG_DELAY_WEIGHT_DENOM 3
  66. #endif
  67. #ifdef QCA_DP_TX_FW_METADATA_V2
  68. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  69. HTT_TX_TCL_METADATA_V2_PDEV_ID_SET(_var, _val)
  70. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  71. HTT_TX_TCL_METADATA_V2_VALID_HTT_SET(_var, _val)
  72. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  73. HTT_TX_TCL_METADATA_TYPE_V2_SET(_var, _val)
  74. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  75. HTT_TX_TCL_METADATA_V2_HOST_INSPECTED_SET(_var, _val)
  76. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  77. HTT_TX_TCL_METADATA_V2_PEER_ID_SET(_var, _val)
  78. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  79. HTT_TX_TCL_METADATA_V2_VDEV_ID_SET(_var, _val)
  80. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  81. HTT_TCL_METADATA_V2_TYPE_PEER_BASED
  82. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  83. HTT_TCL_METADATA_V2_TYPE_VDEV_BASED
  84. #else
  85. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  86. HTT_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)
  87. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  88. HTT_TX_TCL_METADATA_VALID_HTT_SET(_var, _val)
  89. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  90. HTT_TX_TCL_METADATA_TYPE_SET(_var, _val)
  91. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  92. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val)
  93. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  94. HTT_TX_TCL_METADATA_PEER_ID_SET(_var, _val)
  95. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  96. HTT_TX_TCL_METADATA_VDEV_ID_SET(_var, _val)
  97. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  98. HTT_TCL_METADATA_TYPE_PEER_BASED
  99. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  100. HTT_TCL_METADATA_TYPE_VDEV_BASED
  101. #endif
  102. #define DP_GET_HW_LINK_ID_FRM_PPDU_ID(PPDU_ID, LINK_ID_OFFSET, LINK_ID_BITS) \
  103. (((PPDU_ID) >> (LINK_ID_OFFSET)) & ((1 << (LINK_ID_BITS)) - 1))
  104. /*mapping between hal encrypt type and cdp_sec_type*/
  105. uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  106. HAL_TX_ENCRYPT_TYPE_WEP_128,
  107. HAL_TX_ENCRYPT_TYPE_WEP_104,
  108. HAL_TX_ENCRYPT_TYPE_WEP_40,
  109. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  110. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  111. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  112. HAL_TX_ENCRYPT_TYPE_WAPI,
  113. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  114. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  115. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  116. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  117. qdf_export_symbol(sec_type_map);
  118. #ifdef WLAN_FEATURE_DP_TX_DESC_HISTORY
  119. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  120. {
  121. enum dp_tx_event_type type;
  122. if (flags & DP_TX_DESC_FLAG_FLUSH)
  123. type = DP_TX_DESC_FLUSH;
  124. else if (flags & DP_TX_DESC_FLAG_TX_COMP_ERR)
  125. type = DP_TX_COMP_UNMAP_ERR;
  126. else if (flags & DP_TX_DESC_FLAG_COMPLETED_TX)
  127. type = DP_TX_COMP_UNMAP;
  128. else
  129. type = DP_TX_DESC_UNMAP;
  130. return type;
  131. }
  132. static inline void
  133. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  134. qdf_nbuf_t skb, uint32_t sw_cookie,
  135. enum dp_tx_event_type type)
  136. {
  137. struct dp_tx_tcl_history *tx_tcl_history = &soc->tx_tcl_history;
  138. struct dp_tx_comp_history *tx_comp_history = &soc->tx_comp_history;
  139. struct dp_tx_desc_event *entry;
  140. uint32_t idx;
  141. uint16_t slot;
  142. switch (type) {
  143. case DP_TX_COMP_UNMAP:
  144. case DP_TX_COMP_UNMAP_ERR:
  145. case DP_TX_COMP_MSDU_EXT:
  146. if (qdf_unlikely(!tx_comp_history->allocated))
  147. return;
  148. dp_get_frag_hist_next_atomic_idx(&tx_comp_history->index, &idx,
  149. &slot,
  150. DP_TX_COMP_HIST_SLOT_SHIFT,
  151. DP_TX_COMP_HIST_PER_SLOT_MAX,
  152. DP_TX_COMP_HISTORY_SIZE);
  153. entry = &tx_comp_history->entry[slot][idx];
  154. break;
  155. case DP_TX_DESC_MAP:
  156. case DP_TX_DESC_UNMAP:
  157. case DP_TX_DESC_COOKIE:
  158. case DP_TX_DESC_FLUSH:
  159. if (qdf_unlikely(!tx_tcl_history->allocated))
  160. return;
  161. dp_get_frag_hist_next_atomic_idx(&tx_tcl_history->index, &idx,
  162. &slot,
  163. DP_TX_TCL_HIST_SLOT_SHIFT,
  164. DP_TX_TCL_HIST_PER_SLOT_MAX,
  165. DP_TX_TCL_HISTORY_SIZE);
  166. entry = &tx_tcl_history->entry[slot][idx];
  167. break;
  168. default:
  169. dp_info_rl("Invalid dp_tx_event_type: %d", type);
  170. return;
  171. }
  172. entry->skb = skb;
  173. entry->paddr = paddr;
  174. entry->sw_cookie = sw_cookie;
  175. entry->type = type;
  176. entry->ts = qdf_get_log_timestamp();
  177. }
  178. static inline void
  179. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  180. struct qdf_tso_seg_elem_t *tso_seg,
  181. qdf_nbuf_t skb, uint32_t sw_cookie,
  182. enum dp_tx_event_type type)
  183. {
  184. int i;
  185. for (i = 1; i < tso_seg->seg.num_frags; i++) {
  186. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[i].paddr,
  187. skb, sw_cookie, type);
  188. }
  189. if (!tso_seg->next)
  190. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[0].paddr,
  191. skb, 0xFFFFFFFF, type);
  192. }
  193. static inline void
  194. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  195. qdf_nbuf_t skb, uint32_t sw_cookie,
  196. enum dp_tx_event_type type)
  197. {
  198. struct qdf_tso_seg_elem_t *curr_seg = tso_info.tso_seg_list;
  199. uint32_t num_segs = tso_info.num_segs;
  200. while (num_segs) {
  201. dp_tx_tso_seg_history_add(soc, curr_seg, skb, sw_cookie, type);
  202. curr_seg = curr_seg->next;
  203. num_segs--;
  204. }
  205. }
  206. #else
  207. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  208. {
  209. return DP_TX_DESC_INVAL_EVT;
  210. }
  211. static inline void
  212. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  213. qdf_nbuf_t skb, uint32_t sw_cookie,
  214. enum dp_tx_event_type type)
  215. {
  216. }
  217. static inline void
  218. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  219. struct qdf_tso_seg_elem_t *tso_seg,
  220. qdf_nbuf_t skb, uint32_t sw_cookie,
  221. enum dp_tx_event_type type)
  222. {
  223. }
  224. static inline void
  225. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  226. qdf_nbuf_t skb, uint32_t sw_cookie,
  227. enum dp_tx_event_type type)
  228. {
  229. }
  230. #endif /* WLAN_FEATURE_DP_TX_DESC_HISTORY */
  231. /**
  232. * dp_is_tput_high() - Check if throughput is high
  233. *
  234. * @soc: core txrx main context
  235. *
  236. * The current function is based of the RTPM tput policy variable where RTPM is
  237. * avoided based on throughput.
  238. */
  239. static inline int dp_is_tput_high(struct dp_soc *soc)
  240. {
  241. return dp_get_rtpm_tput_policy_requirement(soc);
  242. }
  243. #if defined(FEATURE_TSO)
  244. /**
  245. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  246. *
  247. * @soc: core txrx main context
  248. * @seg_desc: tso segment descriptor
  249. * @num_seg_desc: tso number segment descriptor
  250. */
  251. static void dp_tx_tso_unmap_segment(
  252. struct dp_soc *soc,
  253. struct qdf_tso_seg_elem_t *seg_desc,
  254. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  255. {
  256. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  257. if (qdf_unlikely(!seg_desc)) {
  258. DP_TRACE(ERROR, "%s %d TSO desc is NULL!",
  259. __func__, __LINE__);
  260. qdf_assert(0);
  261. } else if (qdf_unlikely(!num_seg_desc)) {
  262. DP_TRACE(ERROR, "%s %d TSO num desc is NULL!",
  263. __func__, __LINE__);
  264. qdf_assert(0);
  265. } else {
  266. bool is_last_seg;
  267. /* no tso segment left to do dma unmap */
  268. if (num_seg_desc->num_seg.tso_cmn_num_seg < 1)
  269. return;
  270. is_last_seg = (num_seg_desc->num_seg.tso_cmn_num_seg == 1) ?
  271. true : false;
  272. qdf_nbuf_unmap_tso_segment(soc->osdev,
  273. seg_desc, is_last_seg);
  274. num_seg_desc->num_seg.tso_cmn_num_seg--;
  275. }
  276. }
  277. /**
  278. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  279. * back to the freelist
  280. *
  281. * @soc: soc device handle
  282. * @tx_desc: Tx software descriptor
  283. */
  284. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  285. struct dp_tx_desc_s *tx_desc)
  286. {
  287. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  288. if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_desc)) {
  289. dp_tx_err("SO desc is NULL!");
  290. qdf_assert(0);
  291. } else if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_num_desc)) {
  292. dp_tx_err("TSO num desc is NULL!");
  293. qdf_assert(0);
  294. } else {
  295. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  296. (struct qdf_tso_num_seg_elem_t *)tx_desc->
  297. msdu_ext_desc->tso_num_desc;
  298. /* Add the tso num segment into the free list */
  299. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  300. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  301. tx_desc->msdu_ext_desc->
  302. tso_num_desc);
  303. tx_desc->msdu_ext_desc->tso_num_desc = NULL;
  304. DP_STATS_INC(tx_desc->pdev, tso_stats.tso_comp, 1);
  305. }
  306. /* Add the tso segment into the free list*/
  307. dp_tx_tso_desc_free(soc,
  308. tx_desc->pool_id, tx_desc->msdu_ext_desc->
  309. tso_desc);
  310. tx_desc->msdu_ext_desc->tso_desc = NULL;
  311. }
  312. }
  313. #else
  314. static void dp_tx_tso_unmap_segment(
  315. struct dp_soc *soc,
  316. struct qdf_tso_seg_elem_t *seg_desc,
  317. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  318. {
  319. }
  320. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  321. struct dp_tx_desc_s *tx_desc)
  322. {
  323. }
  324. #endif
  325. #ifdef WLAN_SUPPORT_PPEDS
  326. static inline int
  327. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  328. uint8_t desc_pool_id)
  329. {
  330. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  331. __dp_tx_outstanding_dec(soc);
  332. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  333. return 1;
  334. }
  335. return 0;
  336. }
  337. #else
  338. static inline int
  339. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  340. uint8_t desc_pool_id)
  341. {
  342. return 0;
  343. }
  344. #endif
  345. void
  346. dp_tx_desc_release(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  347. uint8_t desc_pool_id)
  348. {
  349. struct dp_pdev *pdev = tx_desc->pdev;
  350. uint8_t comp_status = 0;
  351. if (dp_tx_release_ds_tx_desc(soc, tx_desc, desc_pool_id))
  352. return;
  353. qdf_assert(pdev);
  354. soc = pdev->soc;
  355. dp_tx_outstanding_dec(pdev);
  356. if (tx_desc->msdu_ext_desc) {
  357. if (tx_desc->frm_type == dp_tx_frm_tso)
  358. dp_tx_tso_desc_release(soc, tx_desc);
  359. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  360. dp_tx_me_free_buf(tx_desc->pdev,
  361. tx_desc->msdu_ext_desc->me_buffer);
  362. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  363. tx_desc->msdu_ext_desc = NULL;
  364. }
  365. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  366. qdf_atomic_dec(&soc->num_tx_exception);
  367. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  368. tx_desc->buffer_src)
  369. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
  370. soc->hal_soc);
  371. else
  372. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  373. dp_tx_debug("Tx Completion Release desc %d status %d outstanding %d",
  374. tx_desc->id, comp_status,
  375. qdf_atomic_read(&pdev->num_tx_outstanding));
  376. if (tx_desc->flags & DP_TX_DESC_FLAG_SPECIAL)
  377. dp_tx_spcl_desc_free(soc, tx_desc, desc_pool_id);
  378. else
  379. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  380. return;
  381. }
  382. /**
  383. * dp_tx_prepare_htt_metadata() - Prepare HTT metadata for special frames
  384. * @vdev: DP vdev Handle
  385. * @nbuf: skb
  386. * @msdu_info: msdu_info required to create HTT metadata
  387. *
  388. * Prepares and fills HTT metadata in the frame pre-header for special frames
  389. * that should be transmitted using varying transmit parameters.
  390. * There are 2 VDEV modes that currently needs this special metadata -
  391. * 1) Mesh Mode
  392. * 2) DSRC Mode
  393. *
  394. * Return: HTT metadata size
  395. *
  396. */
  397. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  398. struct dp_tx_msdu_info_s *msdu_info)
  399. {
  400. uint32_t *meta_data = msdu_info->meta_data;
  401. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  402. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  403. uint8_t htt_desc_size;
  404. /* Size rounded of multiple of 8 bytes */
  405. uint8_t htt_desc_size_aligned;
  406. uint8_t *hdr = NULL;
  407. /*
  408. * Metadata - HTT MSDU Extension header
  409. */
  410. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  411. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  412. if (vdev->mesh_vdev || msdu_info->is_tx_sniffer ||
  413. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->
  414. meta_data[0]) ||
  415. msdu_info->exception_fw) {
  416. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  417. htt_desc_size_aligned)) {
  418. nbuf = qdf_nbuf_realloc_headroom(nbuf,
  419. htt_desc_size_aligned);
  420. if (!nbuf) {
  421. /*
  422. * qdf_nbuf_realloc_headroom won't do skb_clone
  423. * as skb_realloc_headroom does. so, no free is
  424. * needed here.
  425. */
  426. DP_STATS_INC(vdev,
  427. tx_i.dropped.headroom_insufficient,
  428. 1);
  429. qdf_print(" %s[%d] skb_realloc_headroom failed",
  430. __func__, __LINE__);
  431. return 0;
  432. }
  433. }
  434. /* Fill and add HTT metaheader */
  435. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  436. if (!hdr) {
  437. dp_tx_err("Error in filling HTT metadata");
  438. return 0;
  439. }
  440. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  441. } else if (vdev->opmode == wlan_op_mode_ocb) {
  442. /* Todo - Add support for DSRC */
  443. }
  444. return htt_desc_size_aligned;
  445. }
  446. /**
  447. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  448. * @tso_seg: TSO segment to process
  449. * @ext_desc: Pointer to MSDU extension descriptor
  450. *
  451. * Return: void
  452. */
  453. #if defined(FEATURE_TSO)
  454. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  455. void *ext_desc)
  456. {
  457. uint8_t num_frag;
  458. uint32_t tso_flags;
  459. /*
  460. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  461. * tcp_flag_mask
  462. *
  463. * Checksum enable flags are set in TCL descriptor and not in Extension
  464. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  465. */
  466. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  467. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  468. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  469. tso_seg->tso_flags.ip_len);
  470. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  471. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  472. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  473. uint32_t lo = 0;
  474. uint32_t hi = 0;
  475. qdf_assert_always((tso_seg->tso_frags[num_frag].paddr) &&
  476. (tso_seg->tso_frags[num_frag].length));
  477. qdf_dmaaddr_to_32s(
  478. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  479. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  480. tso_seg->tso_frags[num_frag].length);
  481. }
  482. return;
  483. }
  484. #else
  485. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  486. void *ext_desc)
  487. {
  488. return;
  489. }
  490. #endif
  491. #if defined(FEATURE_TSO)
  492. /**
  493. * dp_tx_free_tso_seg_list() - Loop through the tso segments
  494. * allocated and free them
  495. * @soc: soc handle
  496. * @free_seg: list of tso segments
  497. * @msdu_info: msdu descriptor
  498. *
  499. * Return: void
  500. */
  501. static void dp_tx_free_tso_seg_list(
  502. struct dp_soc *soc,
  503. struct qdf_tso_seg_elem_t *free_seg,
  504. struct dp_tx_msdu_info_s *msdu_info)
  505. {
  506. struct qdf_tso_seg_elem_t *next_seg;
  507. while (free_seg) {
  508. next_seg = free_seg->next;
  509. dp_tx_tso_desc_free(soc,
  510. msdu_info->tx_queue.desc_pool_id,
  511. free_seg);
  512. free_seg = next_seg;
  513. }
  514. }
  515. /**
  516. * dp_tx_free_tso_num_seg_list() - Loop through the tso num segments
  517. * allocated and free them
  518. * @soc: soc handle
  519. * @free_num_seg: list of tso number segments
  520. * @msdu_info: msdu descriptor
  521. *
  522. * Return: void
  523. */
  524. static void dp_tx_free_tso_num_seg_list(
  525. struct dp_soc *soc,
  526. struct qdf_tso_num_seg_elem_t *free_num_seg,
  527. struct dp_tx_msdu_info_s *msdu_info)
  528. {
  529. struct qdf_tso_num_seg_elem_t *next_num_seg;
  530. while (free_num_seg) {
  531. next_num_seg = free_num_seg->next;
  532. dp_tso_num_seg_free(soc,
  533. msdu_info->tx_queue.desc_pool_id,
  534. free_num_seg);
  535. free_num_seg = next_num_seg;
  536. }
  537. }
  538. /**
  539. * dp_tx_unmap_tso_seg_list() - Loop through the tso segments
  540. * do dma unmap for each segment
  541. * @soc: soc handle
  542. * @free_seg: list of tso segments
  543. * @num_seg_desc: tso number segment descriptor
  544. *
  545. * Return: void
  546. */
  547. static void dp_tx_unmap_tso_seg_list(
  548. struct dp_soc *soc,
  549. struct qdf_tso_seg_elem_t *free_seg,
  550. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  551. {
  552. struct qdf_tso_seg_elem_t *next_seg;
  553. if (qdf_unlikely(!num_seg_desc)) {
  554. DP_TRACE(ERROR, "TSO number seg desc is NULL!");
  555. return;
  556. }
  557. while (free_seg) {
  558. next_seg = free_seg->next;
  559. dp_tx_tso_unmap_segment(soc, free_seg, num_seg_desc);
  560. free_seg = next_seg;
  561. }
  562. }
  563. #ifdef FEATURE_TSO_STATS
  564. /**
  565. * dp_tso_get_stats_idx() - Retrieve the tso packet id
  566. * @pdev: pdev handle
  567. *
  568. * Return: id
  569. */
  570. static uint32_t dp_tso_get_stats_idx(struct dp_pdev *pdev)
  571. {
  572. uint32_t stats_idx;
  573. stats_idx = (((uint32_t)qdf_atomic_inc_return(&pdev->tso_idx))
  574. % CDP_MAX_TSO_PACKETS);
  575. return stats_idx;
  576. }
  577. #else
  578. static int dp_tso_get_stats_idx(struct dp_pdev *pdev)
  579. {
  580. return 0;
  581. }
  582. #endif /* FEATURE_TSO_STATS */
  583. /**
  584. * dp_tx_free_remaining_tso_desc() - do dma unmap for tso segments if any,
  585. * free the tso segments descriptor and
  586. * tso num segments descriptor
  587. * @soc: soc handle
  588. * @msdu_info: msdu descriptor
  589. * @tso_seg_unmap: flag to show if dma unmap is necessary
  590. *
  591. * Return: void
  592. */
  593. static void dp_tx_free_remaining_tso_desc(struct dp_soc *soc,
  594. struct dp_tx_msdu_info_s *msdu_info,
  595. bool tso_seg_unmap)
  596. {
  597. struct qdf_tso_info_t *tso_info = &msdu_info->u.tso_info;
  598. struct qdf_tso_seg_elem_t *free_seg = tso_info->tso_seg_list;
  599. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  600. tso_info->tso_num_seg_list;
  601. /* do dma unmap for each segment */
  602. if (tso_seg_unmap)
  603. dp_tx_unmap_tso_seg_list(soc, free_seg, tso_num_desc);
  604. /* free all tso number segment descriptor though looks only have 1 */
  605. dp_tx_free_tso_num_seg_list(soc, tso_num_desc, msdu_info);
  606. /* free all tso segment descriptor */
  607. dp_tx_free_tso_seg_list(soc, free_seg, msdu_info);
  608. }
  609. /**
  610. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  611. * @vdev: virtual device handle
  612. * @msdu: network buffer
  613. * @msdu_info: meta data associated with the msdu
  614. *
  615. * Return: QDF_STATUS_SUCCESS success
  616. */
  617. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  618. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  619. {
  620. struct qdf_tso_seg_elem_t *tso_seg;
  621. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  622. struct dp_soc *soc = vdev->pdev->soc;
  623. struct dp_pdev *pdev = vdev->pdev;
  624. struct qdf_tso_info_t *tso_info;
  625. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  626. tso_info = &msdu_info->u.tso_info;
  627. tso_info->curr_seg = NULL;
  628. tso_info->tso_seg_list = NULL;
  629. tso_info->num_segs = num_seg;
  630. msdu_info->frm_type = dp_tx_frm_tso;
  631. tso_info->tso_num_seg_list = NULL;
  632. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  633. while (num_seg) {
  634. tso_seg = dp_tx_tso_desc_alloc(
  635. soc, msdu_info->tx_queue.desc_pool_id);
  636. if (tso_seg) {
  637. tso_seg->next = tso_info->tso_seg_list;
  638. tso_info->tso_seg_list = tso_seg;
  639. num_seg--;
  640. } else {
  641. dp_err_rl("Failed to alloc tso seg desc");
  642. DP_STATS_INC_PKT(vdev->pdev,
  643. tso_stats.tso_no_mem_dropped, 1,
  644. qdf_nbuf_len(msdu));
  645. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  646. return QDF_STATUS_E_NOMEM;
  647. }
  648. }
  649. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  650. tso_num_seg = dp_tso_num_seg_alloc(soc,
  651. msdu_info->tx_queue.desc_pool_id);
  652. if (tso_num_seg) {
  653. tso_num_seg->next = tso_info->tso_num_seg_list;
  654. tso_info->tso_num_seg_list = tso_num_seg;
  655. } else {
  656. DP_TRACE(ERROR, "%s: Failed to alloc - Number of segs desc",
  657. __func__);
  658. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  659. return QDF_STATUS_E_NOMEM;
  660. }
  661. msdu_info->num_seg =
  662. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  663. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  664. msdu_info->num_seg);
  665. if (!(msdu_info->num_seg)) {
  666. /*
  667. * Free allocated TSO seg desc and number seg desc,
  668. * do unmap for segments if dma map has done.
  669. */
  670. DP_TRACE(ERROR, "%s: Failed to get tso info", __func__);
  671. dp_tx_free_remaining_tso_desc(soc, msdu_info, true);
  672. return QDF_STATUS_E_INVAL;
  673. }
  674. dp_tx_tso_history_add(soc, msdu_info->u.tso_info,
  675. msdu, 0, DP_TX_DESC_MAP);
  676. tso_info->curr_seg = tso_info->tso_seg_list;
  677. tso_info->msdu_stats_idx = dp_tso_get_stats_idx(pdev);
  678. dp_tso_packet_update(pdev, tso_info->msdu_stats_idx,
  679. msdu, msdu_info->num_seg);
  680. dp_tso_segment_stats_update(pdev, tso_info->tso_seg_list,
  681. tso_info->msdu_stats_idx);
  682. dp_stats_tso_segment_histogram_update(pdev, msdu_info->num_seg);
  683. return QDF_STATUS_SUCCESS;
  684. }
  685. #else
  686. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  687. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  688. {
  689. return QDF_STATUS_E_NOMEM;
  690. }
  691. #endif
  692. QDF_COMPILE_TIME_ASSERT(dp_tx_htt_metadata_len_check,
  693. (DP_TX_MSDU_INFO_META_DATA_DWORDS * 4 >=
  694. sizeof(struct htt_tx_msdu_desc_ext2_t)));
  695. /**
  696. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  697. * @vdev: DP Vdev handle
  698. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  699. * @desc_pool_id: Descriptor Pool ID
  700. *
  701. * Return:
  702. */
  703. static
  704. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  705. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  706. {
  707. uint8_t i;
  708. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  709. struct dp_tx_seg_info_s *seg_info;
  710. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  711. struct dp_soc *soc = vdev->pdev->soc;
  712. /* Allocate an extension descriptor */
  713. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  714. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  715. if (!msdu_ext_desc) {
  716. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  717. return NULL;
  718. }
  719. if (msdu_info->exception_fw &&
  720. qdf_unlikely(vdev->mesh_vdev)) {
  721. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  722. &msdu_info->meta_data[0],
  723. sizeof(struct htt_tx_msdu_desc_ext2_t));
  724. qdf_atomic_inc(&soc->num_tx_exception);
  725. msdu_ext_desc->flags |= DP_TX_EXT_DESC_FLAG_METADATA_VALID;
  726. }
  727. switch (msdu_info->frm_type) {
  728. case dp_tx_frm_sg:
  729. case dp_tx_frm_me:
  730. case dp_tx_frm_raw:
  731. seg_info = msdu_info->u.sg_info.curr_seg;
  732. /* Update the buffer pointers in MSDU Extension Descriptor */
  733. for (i = 0; i < seg_info->frag_cnt; i++) {
  734. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  735. seg_info->frags[i].paddr_lo,
  736. seg_info->frags[i].paddr_hi,
  737. seg_info->frags[i].len);
  738. }
  739. break;
  740. case dp_tx_frm_tso:
  741. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  742. &cached_ext_desc[0]);
  743. break;
  744. default:
  745. break;
  746. }
  747. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  748. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  749. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  750. msdu_ext_desc->vaddr);
  751. return msdu_ext_desc;
  752. }
  753. /**
  754. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  755. * @soc: datapath SOC
  756. * @skb: skb to be traced
  757. * @msdu_id: msdu_id of the packet
  758. * @vdev_id: vdev_id of the packet
  759. * @op_mode: Vdev Operation mode
  760. *
  761. * Return: None
  762. */
  763. #ifdef DP_DISABLE_TX_PKT_TRACE
  764. static void dp_tx_trace_pkt(struct dp_soc *soc,
  765. qdf_nbuf_t skb, uint16_t msdu_id,
  766. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  767. {
  768. }
  769. #else
  770. static void dp_tx_trace_pkt(struct dp_soc *soc,
  771. qdf_nbuf_t skb, uint16_t msdu_id,
  772. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  773. {
  774. if (dp_is_tput_high(soc))
  775. return;
  776. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  777. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  778. DPTRACE(qdf_dp_trace_ptr(skb,
  779. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  780. QDF_TRACE_DEFAULT_PDEV_ID,
  781. qdf_nbuf_data_addr(skb),
  782. sizeof(qdf_nbuf_data(skb)),
  783. msdu_id, vdev_id, 0,
  784. op_mode));
  785. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID,
  786. op_mode);
  787. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  788. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  789. msdu_id, QDF_TX));
  790. }
  791. #endif
  792. #ifdef WLAN_DP_FEATURE_MARK_ICMP_REQ_TO_FW
  793. /**
  794. * dp_tx_is_nbuf_marked_exception() - Check if the packet has been marked as
  795. * exception by the upper layer (OS_IF)
  796. * @soc: DP soc handle
  797. * @nbuf: packet to be transmitted
  798. *
  799. * Return: 1 if the packet is marked as exception,
  800. * 0, if the packet is not marked as exception.
  801. */
  802. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  803. qdf_nbuf_t nbuf)
  804. {
  805. return QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf);
  806. }
  807. #else
  808. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  809. qdf_nbuf_t nbuf)
  810. {
  811. return 0;
  812. }
  813. #endif
  814. #ifdef DP_TRAFFIC_END_INDICATION
  815. /**
  816. * dp_tx_get_traffic_end_indication_pkt() - Allocate and prepare packet to send
  817. * as indication to fw to inform that
  818. * data stream has ended
  819. * @vdev: DP vdev handle
  820. * @nbuf: original buffer from network stack
  821. *
  822. * Return: NULL on failure,
  823. * nbuf on success
  824. */
  825. static inline qdf_nbuf_t
  826. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  827. qdf_nbuf_t nbuf)
  828. {
  829. /* Packet length should be enough to copy upto L3 header */
  830. uint8_t end_nbuf_len = 64;
  831. uint8_t htt_desc_size_aligned;
  832. uint8_t htt_desc_size;
  833. qdf_nbuf_t end_nbuf;
  834. if (qdf_unlikely(QDF_NBUF_CB_GET_PACKET_TYPE(nbuf) ==
  835. QDF_NBUF_CB_PACKET_TYPE_END_INDICATION)) {
  836. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  837. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  838. end_nbuf = qdf_nbuf_queue_remove(&vdev->end_ind_pkt_q);
  839. if (!end_nbuf) {
  840. end_nbuf = qdf_nbuf_alloc(NULL,
  841. (htt_desc_size_aligned +
  842. end_nbuf_len),
  843. htt_desc_size_aligned,
  844. 8, false);
  845. if (!end_nbuf) {
  846. dp_err("Packet allocation failed");
  847. goto out;
  848. }
  849. } else {
  850. qdf_nbuf_reset(end_nbuf, htt_desc_size_aligned, 8);
  851. }
  852. qdf_mem_copy(qdf_nbuf_data(end_nbuf), qdf_nbuf_data(nbuf),
  853. end_nbuf_len);
  854. qdf_nbuf_set_pktlen(end_nbuf, end_nbuf_len);
  855. return end_nbuf;
  856. }
  857. out:
  858. return NULL;
  859. }
  860. /**
  861. * dp_tx_send_traffic_end_indication_pkt() - Send indication packet to FW
  862. * via exception path.
  863. * @vdev: DP vdev handle
  864. * @end_nbuf: skb to send as indication
  865. * @msdu_info: msdu_info of original nbuf
  866. * @peer_id: peer id
  867. *
  868. * Return: None
  869. */
  870. static inline void
  871. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  872. qdf_nbuf_t end_nbuf,
  873. struct dp_tx_msdu_info_s *msdu_info,
  874. uint16_t peer_id)
  875. {
  876. struct dp_tx_msdu_info_s e_msdu_info = {0};
  877. qdf_nbuf_t nbuf;
  878. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  879. (struct htt_tx_msdu_desc_ext2_t *)(e_msdu_info.meta_data);
  880. e_msdu_info.tx_queue = msdu_info->tx_queue;
  881. e_msdu_info.tid = msdu_info->tid;
  882. e_msdu_info.exception_fw = 1;
  883. desc_ext->host_tx_desc_pool = 1;
  884. desc_ext->traffic_end_indication = 1;
  885. nbuf = dp_tx_send_msdu_single(vdev, end_nbuf, &e_msdu_info,
  886. peer_id, NULL);
  887. if (nbuf) {
  888. dp_err("Traffic end indication packet tx failed");
  889. qdf_nbuf_free(nbuf);
  890. }
  891. }
  892. /**
  893. * dp_tx_traffic_end_indication_set_desc_flag() - Set tx descriptor flag to
  894. * mark it traffic end indication
  895. * packet.
  896. * @tx_desc: Tx descriptor pointer
  897. * @msdu_info: msdu_info structure pointer
  898. *
  899. * Return: None
  900. */
  901. static inline void
  902. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  903. struct dp_tx_msdu_info_s *msdu_info)
  904. {
  905. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  906. (struct htt_tx_msdu_desc_ext2_t *)(msdu_info->meta_data);
  907. if (qdf_unlikely(desc_ext->traffic_end_indication))
  908. tx_desc->flags |= DP_TX_DESC_FLAG_TRAFFIC_END_IND;
  909. }
  910. /**
  911. * dp_tx_traffic_end_indication_enq_ind_pkt() - Enqueue the packet instead of
  912. * freeing which are associated
  913. * with traffic end indication
  914. * flagged descriptor.
  915. * @soc: dp soc handle
  916. * @desc: Tx descriptor pointer
  917. * @nbuf: buffer pointer
  918. *
  919. * Return: True if packet gets enqueued else false
  920. */
  921. static bool
  922. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  923. struct dp_tx_desc_s *desc,
  924. qdf_nbuf_t nbuf)
  925. {
  926. struct dp_vdev *vdev = NULL;
  927. if (qdf_unlikely((desc->flags &
  928. DP_TX_DESC_FLAG_TRAFFIC_END_IND) != 0)) {
  929. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  930. DP_MOD_ID_TX_COMP);
  931. if (vdev) {
  932. qdf_nbuf_queue_add(&vdev->end_ind_pkt_q, nbuf);
  933. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_COMP);
  934. return true;
  935. }
  936. }
  937. return false;
  938. }
  939. /**
  940. * dp_tx_traffic_end_indication_is_enabled() - get the feature
  941. * enable/disable status
  942. * @vdev: dp vdev handle
  943. *
  944. * Return: True if feature is enable else false
  945. */
  946. static inline bool
  947. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  948. {
  949. return qdf_unlikely(vdev->traffic_end_ind_en);
  950. }
  951. static inline qdf_nbuf_t
  952. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  953. struct dp_tx_msdu_info_s *msdu_info,
  954. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  955. {
  956. if (dp_tx_traffic_end_indication_is_enabled(vdev))
  957. end_nbuf = dp_tx_get_traffic_end_indication_pkt(vdev, nbuf);
  958. nbuf = dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  959. if (qdf_unlikely(end_nbuf))
  960. dp_tx_send_traffic_end_indication_pkt(vdev, end_nbuf,
  961. msdu_info, peer_id);
  962. return nbuf;
  963. }
  964. #else
  965. static inline qdf_nbuf_t
  966. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  967. qdf_nbuf_t nbuf)
  968. {
  969. return NULL;
  970. }
  971. static inline void
  972. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  973. qdf_nbuf_t end_nbuf,
  974. struct dp_tx_msdu_info_s *msdu_info,
  975. uint16_t peer_id)
  976. {}
  977. static inline void
  978. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  979. struct dp_tx_msdu_info_s *msdu_info)
  980. {}
  981. static inline bool
  982. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  983. struct dp_tx_desc_s *desc,
  984. qdf_nbuf_t nbuf)
  985. {
  986. return false;
  987. }
  988. static inline bool
  989. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  990. {
  991. return false;
  992. }
  993. static inline qdf_nbuf_t
  994. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  995. struct dp_tx_msdu_info_s *msdu_info,
  996. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  997. {
  998. return dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  999. }
  1000. #endif
  1001. #if defined(QCA_SUPPORT_WDS_EXTENDED)
  1002. static bool
  1003. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1004. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1005. {
  1006. if (soc->features.wds_ext_ast_override_enable &&
  1007. tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1008. return true;
  1009. return false;
  1010. }
  1011. #else
  1012. static bool
  1013. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1014. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1015. {
  1016. return false;
  1017. }
  1018. #endif
  1019. /**
  1020. * dp_tx_prepare_desc_single() - Allocate and prepare Tx descriptor
  1021. * @vdev: DP vdev handle
  1022. * @nbuf: skb
  1023. * @desc_pool_id: Descriptor pool ID
  1024. * @msdu_info: Metadata to the fw
  1025. * @tx_exc_metadata: Handle that holds exception path metadata
  1026. *
  1027. * Allocate and prepare Tx descriptor with msdu information.
  1028. *
  1029. * Return: Pointer to Tx Descriptor on success,
  1030. * NULL on failure
  1031. */
  1032. static
  1033. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  1034. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  1035. struct dp_tx_msdu_info_s *msdu_info,
  1036. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1037. {
  1038. uint8_t align_pad;
  1039. uint8_t is_exception = 0;
  1040. uint8_t htt_hdr_size;
  1041. struct dp_tx_desc_s *tx_desc;
  1042. struct dp_pdev *pdev = vdev->pdev;
  1043. struct dp_soc *soc = pdev->soc;
  1044. if (dp_tx_limit_check(vdev, nbuf))
  1045. return NULL;
  1046. /* Allocate software Tx descriptor */
  1047. if (nbuf->protocol == QDF_NBUF_TRAC_EAPOL_ETH_TYPE)
  1048. tx_desc = dp_tx_spcl_desc_alloc(soc, desc_pool_id);
  1049. else
  1050. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1051. if (qdf_unlikely(!tx_desc)) {
  1052. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1053. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_alloc_fail.num, 1);
  1054. return NULL;
  1055. }
  1056. dp_tx_outstanding_inc(pdev);
  1057. /* Initialize the SW tx descriptor */
  1058. tx_desc->nbuf = nbuf;
  1059. tx_desc->frm_type = dp_tx_frm_std;
  1060. tx_desc->tx_encap_type = ((tx_exc_metadata &&
  1061. (tx_exc_metadata->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE)) ?
  1062. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  1063. tx_desc->vdev_id = vdev->vdev_id;
  1064. tx_desc->pdev = pdev;
  1065. tx_desc->msdu_ext_desc = NULL;
  1066. tx_desc->pkt_offset = 0;
  1067. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1068. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1069. vdev->qdf_opmode);
  1070. if (qdf_unlikely(vdev->multipass_en)) {
  1071. if (!dp_tx_multipass_process(soc, vdev, nbuf, msdu_info))
  1072. goto failure;
  1073. }
  1074. /* Packets marked by upper layer (OS-IF) to be sent to FW */
  1075. if (dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1076. is_exception = 1;
  1077. /* for BE chipsets if wds extension was enbled will not mark FW
  1078. * in desc will mark ast index based search for ast index.
  1079. */
  1080. if (dp_tx_is_wds_ast_override_en(soc, tx_exc_metadata))
  1081. return tx_desc;
  1082. /*
  1083. * For special modes (vdev_type == ocb or mesh), data frames should be
  1084. * transmitted using varying transmit parameters (tx spec) which include
  1085. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  1086. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  1087. * These frames are sent as exception packets to firmware.
  1088. *
  1089. * HW requirement is that metadata should always point to a
  1090. * 8-byte aligned address. So we add alignment pad to start of buffer.
  1091. * HTT Metadata should be ensured to be multiple of 8-bytes,
  1092. * to get 8-byte aligned start address along with align_pad added
  1093. *
  1094. * |-----------------------------|
  1095. * | |
  1096. * |-----------------------------| <-----Buffer Pointer Address given
  1097. * | | ^ in HW descriptor (aligned)
  1098. * | HTT Metadata | |
  1099. * | | |
  1100. * | | | Packet Offset given in descriptor
  1101. * | | |
  1102. * |-----------------------------| |
  1103. * | Alignment Pad | v
  1104. * |-----------------------------| <----- Actual buffer start address
  1105. * | SKB Data | (Unaligned)
  1106. * | |
  1107. * | |
  1108. * | |
  1109. * | |
  1110. * | |
  1111. * |-----------------------------|
  1112. */
  1113. if (qdf_unlikely((msdu_info->exception_fw)) ||
  1114. (vdev->opmode == wlan_op_mode_ocb) ||
  1115. (tx_exc_metadata &&
  1116. tx_exc_metadata->is_tx_sniffer)) {
  1117. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  1118. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  1119. DP_STATS_INC(vdev,
  1120. tx_i.dropped.headroom_insufficient, 1);
  1121. goto failure;
  1122. }
  1123. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  1124. dp_tx_err("qdf_nbuf_push_head failed");
  1125. goto failure;
  1126. }
  1127. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  1128. msdu_info);
  1129. if (htt_hdr_size == 0)
  1130. goto failure;
  1131. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1132. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  1133. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1134. dp_tx_traffic_end_indication_set_desc_flag(tx_desc,
  1135. msdu_info);
  1136. is_exception = 1;
  1137. tx_desc->length -= tx_desc->pkt_offset;
  1138. }
  1139. #if !TQM_BYPASS_WAR
  1140. if (is_exception || tx_exc_metadata)
  1141. #endif
  1142. {
  1143. /* Temporary WAR due to TQM VP issues */
  1144. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1145. qdf_atomic_inc(&soc->num_tx_exception);
  1146. }
  1147. return tx_desc;
  1148. failure:
  1149. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1150. return NULL;
  1151. }
  1152. /**
  1153. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment
  1154. * frame
  1155. * @vdev: DP vdev handle
  1156. * @nbuf: skb
  1157. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  1158. * @desc_pool_id : Descriptor Pool ID
  1159. *
  1160. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  1161. * information. For frames with fragments, allocate and prepare
  1162. * an MSDU extension descriptor
  1163. *
  1164. * Return: Pointer to Tx Descriptor on success,
  1165. * NULL on failure
  1166. */
  1167. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  1168. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  1169. uint8_t desc_pool_id)
  1170. {
  1171. struct dp_tx_desc_s *tx_desc;
  1172. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  1173. struct dp_pdev *pdev = vdev->pdev;
  1174. struct dp_soc *soc = pdev->soc;
  1175. if (dp_tx_limit_check(vdev, nbuf))
  1176. return NULL;
  1177. /* Allocate software Tx descriptor */
  1178. if (nbuf->protocol == QDF_NBUF_TRAC_EAPOL_ETH_TYPE)
  1179. tx_desc = dp_tx_spcl_desc_alloc(soc, desc_pool_id);
  1180. else
  1181. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1182. if (!tx_desc) {
  1183. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1184. return NULL;
  1185. }
  1186. dp_tx_tso_seg_history_add(soc, msdu_info->u.tso_info.curr_seg,
  1187. nbuf, tx_desc->id, DP_TX_DESC_COOKIE);
  1188. dp_tx_outstanding_inc(pdev);
  1189. /* Initialize the SW tx descriptor */
  1190. tx_desc->nbuf = nbuf;
  1191. tx_desc->frm_type = msdu_info->frm_type;
  1192. tx_desc->tx_encap_type = vdev->tx_encap_type;
  1193. tx_desc->vdev_id = vdev->vdev_id;
  1194. tx_desc->pdev = pdev;
  1195. tx_desc->pkt_offset = 0;
  1196. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1197. vdev->qdf_opmode);
  1198. /* Handle scattered frames - TSO/SG/ME */
  1199. /* Allocate and prepare an extension descriptor for scattered frames */
  1200. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  1201. if (!msdu_ext_desc) {
  1202. dp_tx_info("Tx Extension Descriptor Alloc Fail");
  1203. goto failure;
  1204. }
  1205. #if !TQM_BYPASS_WAR
  1206. if (qdf_unlikely(msdu_info->exception_fw) ||
  1207. dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1208. #endif
  1209. {
  1210. /* Temporary WAR due to TQM VP issues */
  1211. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1212. qdf_atomic_inc(&soc->num_tx_exception);
  1213. }
  1214. tx_desc->msdu_ext_desc = msdu_ext_desc;
  1215. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  1216. msdu_ext_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  1217. msdu_ext_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  1218. tx_desc->dma_addr = msdu_ext_desc->paddr;
  1219. if (msdu_ext_desc->flags & DP_TX_EXT_DESC_FLAG_METADATA_VALID)
  1220. tx_desc->length = HAL_TX_EXT_DESC_WITH_META_DATA;
  1221. else
  1222. tx_desc->length = HAL_TX_EXTENSION_DESC_LEN_BYTES;
  1223. return tx_desc;
  1224. failure:
  1225. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1226. return NULL;
  1227. }
  1228. /**
  1229. * dp_tx_prepare_raw() - Prepare RAW packet TX
  1230. * @vdev: DP vdev handle
  1231. * @nbuf: buffer pointer
  1232. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1233. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  1234. * descriptor
  1235. *
  1236. * Return:
  1237. */
  1238. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1239. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1240. {
  1241. qdf_nbuf_t curr_nbuf = NULL;
  1242. uint16_t total_len = 0;
  1243. qdf_dma_addr_t paddr;
  1244. int32_t i;
  1245. int32_t mapped_buf_num = 0;
  1246. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  1247. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  1248. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  1249. /* Continue only if frames are of DATA type */
  1250. if (!DP_FRAME_IS_DATA(qos_wh)) {
  1251. DP_STATS_INC(vdev, tx_i.raw.invalid_raw_pkt_datatype, 1);
  1252. dp_tx_debug("Pkt. recd is of not data type");
  1253. goto error;
  1254. }
  1255. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  1256. if (vdev->raw_mode_war &&
  1257. (qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) &&
  1258. (qos_wh->i_qos[0] & IEEE80211_QOS_AMSDU))
  1259. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  1260. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  1261. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  1262. /*
  1263. * Number of nbuf's must not exceed the size of the frags
  1264. * array in seg_info.
  1265. */
  1266. if (i >= DP_TX_MAX_NUM_FRAGS) {
  1267. dp_err_rl("nbuf cnt exceeds the max number of segs");
  1268. DP_STATS_INC(vdev, tx_i.raw.num_frags_overflow_err, 1);
  1269. goto error;
  1270. }
  1271. if (QDF_STATUS_SUCCESS !=
  1272. qdf_nbuf_map_nbytes_single(vdev->osdev,
  1273. curr_nbuf,
  1274. QDF_DMA_TO_DEVICE,
  1275. curr_nbuf->len)) {
  1276. dp_tx_err("%s dma map error ", __func__);
  1277. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  1278. goto error;
  1279. }
  1280. /* Update the count of mapped nbuf's */
  1281. mapped_buf_num++;
  1282. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  1283. seg_info->frags[i].paddr_lo = paddr;
  1284. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  1285. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  1286. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  1287. total_len += qdf_nbuf_len(curr_nbuf);
  1288. }
  1289. seg_info->frag_cnt = i;
  1290. seg_info->total_len = total_len;
  1291. seg_info->next = NULL;
  1292. sg_info->curr_seg = seg_info;
  1293. msdu_info->frm_type = dp_tx_frm_raw;
  1294. msdu_info->num_seg = 1;
  1295. return nbuf;
  1296. error:
  1297. i = 0;
  1298. while (nbuf) {
  1299. curr_nbuf = nbuf;
  1300. if (i < mapped_buf_num) {
  1301. qdf_nbuf_unmap_nbytes_single(vdev->osdev, curr_nbuf,
  1302. QDF_DMA_TO_DEVICE,
  1303. curr_nbuf->len);
  1304. i++;
  1305. }
  1306. nbuf = qdf_nbuf_next(nbuf);
  1307. qdf_nbuf_free(curr_nbuf);
  1308. }
  1309. return NULL;
  1310. }
  1311. /**
  1312. * dp_tx_raw_prepare_unset() - unmap the chain of nbufs belonging to RAW frame.
  1313. * @soc: DP soc handle
  1314. * @nbuf: Buffer pointer
  1315. *
  1316. * unmap the chain of nbufs that belong to this RAW frame.
  1317. *
  1318. * Return: None
  1319. */
  1320. static void dp_tx_raw_prepare_unset(struct dp_soc *soc,
  1321. qdf_nbuf_t nbuf)
  1322. {
  1323. qdf_nbuf_t cur_nbuf = nbuf;
  1324. do {
  1325. qdf_nbuf_unmap_nbytes_single(soc->osdev, cur_nbuf,
  1326. QDF_DMA_TO_DEVICE,
  1327. cur_nbuf->len);
  1328. cur_nbuf = qdf_nbuf_next(cur_nbuf);
  1329. } while (cur_nbuf);
  1330. }
  1331. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1332. void dp_vdev_peer_stats_update_protocol_cnt_tx(struct dp_vdev *vdev_hdl,
  1333. qdf_nbuf_t nbuf)
  1334. {
  1335. qdf_nbuf_t nbuf_local;
  1336. struct dp_vdev *vdev_local = vdev_hdl;
  1337. do {
  1338. if (qdf_likely(!((vdev_local)->peer_protocol_count_track)))
  1339. break;
  1340. nbuf_local = nbuf;
  1341. if (qdf_unlikely(((vdev_local)->tx_encap_type) ==
  1342. htt_cmn_pkt_type_raw))
  1343. break;
  1344. else if (qdf_unlikely(qdf_nbuf_is_nonlinear((nbuf_local))))
  1345. break;
  1346. else if (qdf_nbuf_is_tso((nbuf_local)))
  1347. break;
  1348. dp_vdev_peer_stats_update_protocol_cnt((vdev_local),
  1349. (nbuf_local),
  1350. NULL, 1, 0);
  1351. } while (0);
  1352. }
  1353. #endif
  1354. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1355. void dp_tx_update_stats(struct dp_soc *soc,
  1356. struct dp_tx_desc_s *tx_desc,
  1357. uint8_t ring_id)
  1358. {
  1359. uint32_t stats_len = dp_tx_get_pkt_len(tx_desc);
  1360. DP_STATS_INC_PKT(soc, tx.egress[ring_id], 1, stats_len);
  1361. }
  1362. int
  1363. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1364. struct dp_tx_desc_s *tx_desc,
  1365. uint8_t tid,
  1366. struct dp_tx_msdu_info_s *msdu_info,
  1367. uint8_t ring_id)
  1368. {
  1369. struct dp_swlm *swlm = &soc->swlm;
  1370. union swlm_data swlm_query_data;
  1371. struct dp_swlm_tcl_data tcl_data;
  1372. QDF_STATUS status;
  1373. int ret;
  1374. if (!swlm->is_enabled)
  1375. return msdu_info->skip_hp_update;
  1376. tcl_data.nbuf = tx_desc->nbuf;
  1377. tcl_data.tid = tid;
  1378. tcl_data.ring_id = ring_id;
  1379. tcl_data.pkt_len = dp_tx_get_pkt_len(tx_desc);
  1380. tcl_data.num_ll_connections = vdev->num_latency_critical_conn;
  1381. swlm_query_data.tcl_data = &tcl_data;
  1382. status = dp_swlm_tcl_pre_check(soc, &tcl_data);
  1383. if (QDF_IS_STATUS_ERROR(status)) {
  1384. dp_swlm_tcl_reset_session_data(soc, ring_id);
  1385. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1386. return 0;
  1387. }
  1388. ret = dp_swlm_query_policy(soc, TCL_DATA, swlm_query_data);
  1389. if (ret) {
  1390. DP_STATS_INC(swlm, tcl[ring_id].coalesce_success, 1);
  1391. } else {
  1392. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1393. }
  1394. return ret;
  1395. }
  1396. void
  1397. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1398. int coalesce)
  1399. {
  1400. if (coalesce)
  1401. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1402. else
  1403. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1404. }
  1405. static inline void
  1406. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1407. {
  1408. if (((i + 1) < msdu_info->num_seg))
  1409. msdu_info->skip_hp_update = 1;
  1410. else
  1411. msdu_info->skip_hp_update = 0;
  1412. }
  1413. static inline void
  1414. dp_flush_tcp_hp(struct dp_soc *soc, uint8_t ring_id)
  1415. {
  1416. hal_ring_handle_t hal_ring_hdl =
  1417. dp_tx_get_hal_ring_hdl(soc, ring_id);
  1418. if (dp_tx_hal_ring_access_start(soc, hal_ring_hdl)) {
  1419. dp_err("Fillmore: SRNG access start failed");
  1420. return;
  1421. }
  1422. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, 0);
  1423. }
  1424. static inline void
  1425. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1426. QDF_STATUS status,
  1427. struct dp_tx_msdu_info_s *msdu_info)
  1428. {
  1429. if (QDF_IS_STATUS_ERROR(status) && !msdu_info->skip_hp_update) {
  1430. dp_flush_tcp_hp(soc,
  1431. (msdu_info->tx_queue.ring_id & DP_TX_QUEUE_MASK));
  1432. }
  1433. }
  1434. #else
  1435. static inline void
  1436. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1437. {
  1438. }
  1439. static inline void
  1440. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1441. QDF_STATUS status,
  1442. struct dp_tx_msdu_info_s *msdu_info)
  1443. {
  1444. }
  1445. #endif
  1446. #ifdef FEATURE_RUNTIME_PM
  1447. void
  1448. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1449. hal_ring_handle_t hal_ring_hdl,
  1450. int coalesce)
  1451. {
  1452. int ret;
  1453. /*
  1454. * Avoid runtime get and put APIs under high throughput scenarios.
  1455. */
  1456. if (dp_get_rtpm_tput_policy_requirement(soc)) {
  1457. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1458. return;
  1459. }
  1460. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  1461. if (QDF_IS_STATUS_SUCCESS(ret)) {
  1462. if (hif_system_pm_state_check(soc->hif_handle)) {
  1463. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1464. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1465. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1466. } else {
  1467. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1468. }
  1469. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  1470. } else {
  1471. dp_runtime_get(soc);
  1472. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1473. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1474. qdf_atomic_inc(&soc->tx_pending_rtpm);
  1475. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1476. dp_runtime_put(soc);
  1477. }
  1478. }
  1479. #else
  1480. #ifdef DP_POWER_SAVE
  1481. void
  1482. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1483. hal_ring_handle_t hal_ring_hdl,
  1484. int coalesce)
  1485. {
  1486. if (hif_system_pm_state_check(soc->hif_handle)) {
  1487. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1488. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1489. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1490. } else {
  1491. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1492. }
  1493. }
  1494. #endif
  1495. #endif
  1496. /**
  1497. * dp_tx_get_tid() - Obtain TID to be used for this frame
  1498. * @vdev: DP vdev handle
  1499. * @nbuf: skb
  1500. * @msdu_info: msdu descriptor
  1501. *
  1502. * Extract the DSCP or PCP information from frame and map into TID value.
  1503. *
  1504. * Return: void
  1505. */
  1506. static void dp_tx_get_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1507. struct dp_tx_msdu_info_s *msdu_info)
  1508. {
  1509. uint8_t tos = 0, dscp_tid_override = 0;
  1510. uint8_t *hdr_ptr, *L3datap;
  1511. uint8_t is_mcast = 0;
  1512. qdf_ether_header_t *eh = NULL;
  1513. qdf_ethervlan_header_t *evh = NULL;
  1514. uint16_t ether_type;
  1515. qdf_llc_t *llcHdr;
  1516. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1517. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1518. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1519. eh = (qdf_ether_header_t *)nbuf->data;
  1520. hdr_ptr = (uint8_t *)(eh->ether_dhost);
  1521. L3datap = hdr_ptr + sizeof(qdf_ether_header_t);
  1522. } else {
  1523. qdf_dot3_qosframe_t *qos_wh =
  1524. (qdf_dot3_qosframe_t *) nbuf->data;
  1525. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  1526. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  1527. return;
  1528. }
  1529. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  1530. ether_type = eh->ether_type;
  1531. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(qdf_ether_header_t));
  1532. /*
  1533. * Check if packet is dot3 or eth2 type.
  1534. */
  1535. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  1536. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1537. sizeof(*llcHdr));
  1538. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1539. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  1540. sizeof(*llcHdr);
  1541. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE
  1542. + sizeof(*llcHdr) +
  1543. sizeof(qdf_net_vlanhdr_t));
  1544. } else {
  1545. L3datap = hdr_ptr + sizeof(qdf_ether_header_t) +
  1546. sizeof(*llcHdr);
  1547. }
  1548. } else {
  1549. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1550. evh = (qdf_ethervlan_header_t *) eh;
  1551. ether_type = evh->ether_type;
  1552. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1553. }
  1554. }
  1555. /*
  1556. * Find priority from IP TOS DSCP field
  1557. */
  1558. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1559. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1560. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1561. /* Only for unicast frames */
  1562. if (!is_mcast) {
  1563. /* send it on VO queue */
  1564. msdu_info->tid = DP_VO_TID;
  1565. }
  1566. } else {
  1567. /*
  1568. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1569. * from TOS byte.
  1570. */
  1571. tos = ip->ip_tos;
  1572. dscp_tid_override = 1;
  1573. }
  1574. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1575. /* TODO
  1576. * use flowlabel
  1577. *igmpmld cases to be handled in phase 2
  1578. */
  1579. unsigned long ver_pri_flowlabel;
  1580. unsigned long pri;
  1581. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1582. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1583. DP_IPV6_PRIORITY_SHIFT;
  1584. tos = pri;
  1585. dscp_tid_override = 1;
  1586. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1587. msdu_info->tid = DP_VO_TID;
  1588. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1589. /* Only for unicast frames */
  1590. if (!is_mcast) {
  1591. /* send ucast arp on VO queue */
  1592. msdu_info->tid = DP_VO_TID;
  1593. }
  1594. }
  1595. /*
  1596. * Assign all MCAST packets to BE
  1597. */
  1598. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1599. if (is_mcast) {
  1600. tos = 0;
  1601. dscp_tid_override = 1;
  1602. }
  1603. }
  1604. if (dscp_tid_override == 1) {
  1605. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1606. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1607. }
  1608. if (msdu_info->tid >= CDP_MAX_DATA_TIDS)
  1609. msdu_info->tid = CDP_MAX_DATA_TIDS - 1;
  1610. return;
  1611. }
  1612. /**
  1613. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  1614. * @vdev: DP vdev handle
  1615. * @nbuf: skb
  1616. * @msdu_info: msdu descriptor
  1617. *
  1618. * Software based TID classification is required when more than 2 DSCP-TID
  1619. * mapping tables are needed.
  1620. * Hardware supports 2 DSCP-TID mapping tables for HKv1 and 48 for HKv2.
  1621. *
  1622. * Return: void
  1623. */
  1624. static inline void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1625. struct dp_tx_msdu_info_s *msdu_info)
  1626. {
  1627. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1628. /*
  1629. * skip_sw_tid_classification flag will set in below cases-
  1630. * 1. vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map
  1631. * 2. hlos_tid_override enabled for vdev
  1632. * 3. mesh mode enabled for vdev
  1633. */
  1634. if (qdf_likely(vdev->skip_sw_tid_classification)) {
  1635. /* Update tid in msdu_info from skb priority */
  1636. if (qdf_unlikely(vdev->skip_sw_tid_classification
  1637. & DP_TXRX_HLOS_TID_OVERRIDE_ENABLED)) {
  1638. uint32_t tid = qdf_nbuf_get_priority(nbuf);
  1639. if (tid == DP_TX_INVALID_QOS_TAG)
  1640. return;
  1641. msdu_info->tid = tid;
  1642. return;
  1643. }
  1644. return;
  1645. }
  1646. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1647. }
  1648. #ifdef FEATURE_WLAN_TDLS
  1649. /**
  1650. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1651. * @soc: datapath SOC
  1652. * @vdev: datapath vdev
  1653. * @tx_desc: TX descriptor
  1654. *
  1655. * Return: None
  1656. */
  1657. static void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1658. struct dp_vdev *vdev,
  1659. struct dp_tx_desc_s *tx_desc)
  1660. {
  1661. if (vdev) {
  1662. if (vdev->is_tdls_frame) {
  1663. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1664. vdev->is_tdls_frame = false;
  1665. }
  1666. }
  1667. }
  1668. static uint8_t dp_htt_tx_comp_get_status(struct dp_soc *soc, char *htt_desc)
  1669. {
  1670. uint8_t tx_status = HTT_TX_FW2WBM_TX_STATUS_MAX;
  1671. switch (soc->arch_id) {
  1672. case CDP_ARCH_TYPE_LI:
  1673. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  1674. break;
  1675. case CDP_ARCH_TYPE_BE:
  1676. tx_status = HTT_TX_WBM_COMPLETION_V3_TX_STATUS_GET(htt_desc[0]);
  1677. break;
  1678. case CDP_ARCH_TYPE_RH:
  1679. {
  1680. uint32_t *msg_word = (uint32_t *)htt_desc;
  1681. tx_status = HTT_TX_MSDU_INFO_RELEASE_REASON_GET(
  1682. *(msg_word + 3));
  1683. }
  1684. break;
  1685. default:
  1686. dp_err("Incorrect CDP_ARCH %d", soc->arch_id);
  1687. QDF_BUG(0);
  1688. }
  1689. return tx_status;
  1690. }
  1691. /**
  1692. * dp_non_std_htt_tx_comp_free_buff() - Free the non std tx packet buffer
  1693. * @soc: dp_soc handle
  1694. * @tx_desc: TX descriptor
  1695. *
  1696. * Return: None
  1697. */
  1698. static void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1699. struct dp_tx_desc_s *tx_desc)
  1700. {
  1701. uint8_t tx_status = 0;
  1702. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  1703. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1704. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id,
  1705. DP_MOD_ID_TDLS);
  1706. if (qdf_unlikely(!vdev)) {
  1707. dp_err_rl("vdev is null!");
  1708. goto error;
  1709. }
  1710. hal_tx_comp_get_htt_desc(&tx_desc->comp, htt_tx_status);
  1711. tx_status = dp_htt_tx_comp_get_status(soc, htt_tx_status);
  1712. dp_debug("vdev_id: %d tx_status: %d", tx_desc->vdev_id, tx_status);
  1713. if (vdev->tx_non_std_data_callback.func) {
  1714. qdf_nbuf_set_next(nbuf, NULL);
  1715. vdev->tx_non_std_data_callback.func(
  1716. vdev->tx_non_std_data_callback.ctxt,
  1717. nbuf, tx_status);
  1718. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1719. return;
  1720. } else {
  1721. dp_err_rl("callback func is null");
  1722. }
  1723. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1724. error:
  1725. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  1726. qdf_nbuf_free(nbuf);
  1727. }
  1728. /**
  1729. * dp_tx_msdu_single_map() - do nbuf map
  1730. * @vdev: DP vdev handle
  1731. * @tx_desc: DP TX descriptor pointer
  1732. * @nbuf: skb pointer
  1733. *
  1734. * For TDLS frame, use qdf_nbuf_map_single() to align with the unmap
  1735. * operation done in other component.
  1736. *
  1737. * Return: QDF_STATUS
  1738. */
  1739. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1740. struct dp_tx_desc_s *tx_desc,
  1741. qdf_nbuf_t nbuf)
  1742. {
  1743. if (qdf_likely(!(tx_desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)))
  1744. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1745. nbuf,
  1746. QDF_DMA_TO_DEVICE,
  1747. nbuf->len);
  1748. else
  1749. return qdf_nbuf_map_single(vdev->osdev, nbuf,
  1750. QDF_DMA_TO_DEVICE);
  1751. }
  1752. #else
  1753. static inline void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1754. struct dp_vdev *vdev,
  1755. struct dp_tx_desc_s *tx_desc)
  1756. {
  1757. }
  1758. static inline void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1759. struct dp_tx_desc_s *tx_desc)
  1760. {
  1761. }
  1762. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1763. struct dp_tx_desc_s *tx_desc,
  1764. qdf_nbuf_t nbuf)
  1765. {
  1766. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1767. nbuf,
  1768. QDF_DMA_TO_DEVICE,
  1769. nbuf->len);
  1770. }
  1771. #endif
  1772. static inline
  1773. qdf_dma_addr_t dp_tx_nbuf_map_regular(struct dp_vdev *vdev,
  1774. struct dp_tx_desc_s *tx_desc,
  1775. qdf_nbuf_t nbuf)
  1776. {
  1777. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1778. ret = dp_tx_msdu_single_map(vdev, tx_desc, nbuf);
  1779. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret)))
  1780. return 0;
  1781. return qdf_nbuf_mapped_paddr_get(nbuf);
  1782. }
  1783. static inline
  1784. void dp_tx_nbuf_unmap_regular(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1785. {
  1786. qdf_nbuf_unmap_nbytes_single_paddr(soc->osdev,
  1787. desc->nbuf,
  1788. desc->dma_addr,
  1789. QDF_DMA_TO_DEVICE,
  1790. desc->length);
  1791. }
  1792. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  1793. static inline bool
  1794. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1795. {
  1796. struct net_device *ingress_dev;
  1797. skb_frag_t *frag;
  1798. uint16_t buf_len = 0;
  1799. uint16_t linear_data_len = 0;
  1800. uint8_t *payload_addr = NULL;
  1801. ingress_dev = dev_get_by_index(dev_net(nbuf->dev), nbuf->skb_iif);
  1802. if (!ingress_dev)
  1803. return false;
  1804. if ((ingress_dev->priv_flags & IFF_PHONY_HEADROOM)) {
  1805. qdf_net_if_release_dev((struct qdf_net_if *)ingress_dev);
  1806. frag = &(skb_shinfo(nbuf)->frags[0]);
  1807. buf_len = skb_frag_size(frag);
  1808. payload_addr = (uint8_t *)skb_frag_address(frag);
  1809. linear_data_len = skb_headlen(nbuf);
  1810. buf_len += linear_data_len;
  1811. payload_addr = payload_addr - linear_data_len;
  1812. memcpy(payload_addr, nbuf->data, linear_data_len);
  1813. msdu_info->frm_type = dp_tx_frm_rmnet;
  1814. msdu_info->buf_len = buf_len;
  1815. msdu_info->payload_addr = payload_addr;
  1816. return true;
  1817. }
  1818. qdf_net_if_release_dev((struct qdf_net_if *)ingress_dev);
  1819. return false;
  1820. }
  1821. static inline
  1822. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1823. struct dp_tx_desc_s *tx_desc)
  1824. {
  1825. qdf_dma_addr_t paddr;
  1826. paddr = (qdf_dma_addr_t)qdf_mem_virt_to_phys(msdu_info->payload_addr);
  1827. tx_desc->length = msdu_info->buf_len;
  1828. qdf_nbuf_dma_clean_range((void *)msdu_info->payload_addr,
  1829. (void *)(msdu_info->payload_addr +
  1830. msdu_info->buf_len));
  1831. tx_desc->flags |= DP_TX_DESC_FLAG_RMNET;
  1832. return paddr;
  1833. }
  1834. #else
  1835. static inline bool
  1836. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1837. {
  1838. return false;
  1839. }
  1840. static inline
  1841. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1842. struct dp_tx_desc_s *tx_desc)
  1843. {
  1844. return 0;
  1845. }
  1846. #endif
  1847. #if defined(QCA_DP_TX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  1848. static inline
  1849. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1850. struct dp_tx_desc_s *tx_desc,
  1851. qdf_nbuf_t nbuf)
  1852. {
  1853. if (qdf_likely(tx_desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  1854. qdf_nbuf_dma_clean_range((void *)nbuf->data,
  1855. (void *)(nbuf->data + nbuf->len));
  1856. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  1857. } else {
  1858. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1859. }
  1860. }
  1861. static inline
  1862. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1863. struct dp_tx_desc_s *desc)
  1864. {
  1865. if (qdf_unlikely(!(desc->flags &
  1866. (DP_TX_DESC_FLAG_SIMPLE | DP_TX_DESC_FLAG_RMNET))))
  1867. return dp_tx_nbuf_unmap_regular(soc, desc);
  1868. }
  1869. #else
  1870. static inline
  1871. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1872. struct dp_tx_desc_s *tx_desc,
  1873. qdf_nbuf_t nbuf)
  1874. {
  1875. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1876. }
  1877. static inline
  1878. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1879. struct dp_tx_desc_s *desc)
  1880. {
  1881. return dp_tx_nbuf_unmap_regular(soc, desc);
  1882. }
  1883. #endif
  1884. #if defined(WLAN_TX_PKT_CAPTURE_ENH) || defined(FEATURE_PERPKT_INFO)
  1885. static inline
  1886. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1887. {
  1888. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE))) {
  1889. dp_tx_nbuf_unmap(soc, desc);
  1890. desc->flags |= DP_TX_DESC_FLAG_UNMAP_DONE;
  1891. }
  1892. }
  1893. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1894. {
  1895. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE)))
  1896. dp_tx_nbuf_unmap(soc, desc);
  1897. }
  1898. #else
  1899. static inline
  1900. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1901. {
  1902. }
  1903. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1904. {
  1905. dp_tx_nbuf_unmap(soc, desc);
  1906. }
  1907. #endif
  1908. #ifdef MESH_MODE_SUPPORT
  1909. /**
  1910. * dp_tx_update_mesh_flags() - Update descriptor flags for mesh VAP
  1911. * @soc: datapath SOC
  1912. * @vdev: datapath vdev
  1913. * @tx_desc: TX descriptor
  1914. *
  1915. * Return: None
  1916. */
  1917. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1918. struct dp_vdev *vdev,
  1919. struct dp_tx_desc_s *tx_desc)
  1920. {
  1921. if (qdf_unlikely(vdev->mesh_vdev))
  1922. tx_desc->flags |= DP_TX_DESC_FLAG_MESH_MODE;
  1923. }
  1924. /**
  1925. * dp_mesh_tx_comp_free_buff() - Free the mesh tx packet buffer
  1926. * @soc: dp_soc handle
  1927. * @tx_desc: TX descriptor
  1928. * @delayed_free: delay the nbuf free
  1929. *
  1930. * Return: nbuf to be freed late
  1931. */
  1932. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1933. struct dp_tx_desc_s *tx_desc,
  1934. bool delayed_free)
  1935. {
  1936. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1937. struct dp_vdev *vdev = NULL;
  1938. vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id, DP_MOD_ID_MESH);
  1939. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  1940. if (vdev)
  1941. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  1942. if (delayed_free)
  1943. return nbuf;
  1944. qdf_nbuf_free(nbuf);
  1945. } else {
  1946. if (vdev && vdev->osif_tx_free_ext) {
  1947. vdev->osif_tx_free_ext((nbuf));
  1948. } else {
  1949. if (delayed_free)
  1950. return nbuf;
  1951. qdf_nbuf_free(nbuf);
  1952. }
  1953. }
  1954. if (vdev)
  1955. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  1956. return NULL;
  1957. }
  1958. #else
  1959. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1960. struct dp_vdev *vdev,
  1961. struct dp_tx_desc_s *tx_desc)
  1962. {
  1963. }
  1964. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1965. struct dp_tx_desc_s *tx_desc,
  1966. bool delayed_free)
  1967. {
  1968. return NULL;
  1969. }
  1970. #endif
  1971. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac)
  1972. {
  1973. struct dp_pdev *pdev = NULL;
  1974. struct dp_ast_entry *src_ast_entry = NULL;
  1975. struct dp_ast_entry *dst_ast_entry = NULL;
  1976. struct dp_soc *soc = NULL;
  1977. qdf_assert(vdev);
  1978. pdev = vdev->pdev;
  1979. qdf_assert(pdev);
  1980. soc = pdev->soc;
  1981. dst_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1982. (soc, dstmac, vdev->pdev->pdev_id);
  1983. src_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1984. (soc, srcmac, vdev->pdev->pdev_id);
  1985. if (dst_ast_entry && src_ast_entry) {
  1986. if (dst_ast_entry->peer_id ==
  1987. src_ast_entry->peer_id)
  1988. return 1;
  1989. }
  1990. return 0;
  1991. }
  1992. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1993. defined(WLAN_MCAST_MLO)
  1994. /* MLO peer id for reinject*/
  1995. #define DP_MLO_MCAST_REINJECT_PEER_ID 0XFFFD
  1996. /* MLO vdev id inc offset */
  1997. #define DP_MLO_VDEV_ID_OFFSET 0x80
  1998. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1999. static inline bool
  2000. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  2001. {
  2002. if (tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  2003. return true;
  2004. return false;
  2005. }
  2006. #else
  2007. static inline bool
  2008. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  2009. {
  2010. return false;
  2011. }
  2012. #endif
  2013. static inline void
  2014. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2015. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2016. {
  2017. /* wds ext enabled will not set the TO_FW bit */
  2018. if (dp_tx_wds_ext_check(tx_exc_metadata))
  2019. return;
  2020. if (!(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)) {
  2021. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2022. qdf_atomic_inc(&soc->num_tx_exception);
  2023. }
  2024. }
  2025. static inline void
  2026. dp_tx_update_mcast_param(uint16_t peer_id,
  2027. uint16_t *htt_tcl_metadata,
  2028. struct dp_vdev *vdev,
  2029. struct dp_tx_msdu_info_s *msdu_info)
  2030. {
  2031. if (peer_id == DP_MLO_MCAST_REINJECT_PEER_ID) {
  2032. *htt_tcl_metadata = 0;
  2033. DP_TX_TCL_METADATA_TYPE_SET(
  2034. *htt_tcl_metadata,
  2035. HTT_TCL_METADATA_V2_TYPE_GLOBAL_SEQ_BASED);
  2036. HTT_TX_TCL_METADATA_GLBL_SEQ_NO_SET(*htt_tcl_metadata,
  2037. msdu_info->gsn);
  2038. msdu_info->vdev_id = vdev->vdev_id + DP_MLO_VDEV_ID_OFFSET;
  2039. HTT_TX_TCL_METADATA_GLBL_SEQ_HOST_INSPECTED_SET(
  2040. *htt_tcl_metadata, 1);
  2041. } else {
  2042. msdu_info->vdev_id = vdev->vdev_id;
  2043. }
  2044. }
  2045. #else
  2046. static inline void
  2047. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2048. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2049. {
  2050. }
  2051. static inline void
  2052. dp_tx_update_mcast_param(uint16_t peer_id,
  2053. uint16_t *htt_tcl_metadata,
  2054. struct dp_vdev *vdev,
  2055. struct dp_tx_msdu_info_s *msdu_info)
  2056. {
  2057. }
  2058. #endif
  2059. #ifdef DP_TX_SW_DROP_STATS_INC
  2060. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2061. qdf_nbuf_t nbuf,
  2062. enum cdp_tx_sw_drop drop_code)
  2063. {
  2064. /* EAPOL Drop stats */
  2065. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) {
  2066. switch (drop_code) {
  2067. case TX_DESC_ERR:
  2068. DP_STATS_INC(pdev, eap_drop_stats.tx_desc_err, 1);
  2069. break;
  2070. case TX_HAL_RING_ACCESS_ERR:
  2071. DP_STATS_INC(pdev,
  2072. eap_drop_stats.tx_hal_ring_access_err, 1);
  2073. break;
  2074. case TX_DMA_MAP_ERR:
  2075. DP_STATS_INC(pdev, eap_drop_stats.tx_dma_map_err, 1);
  2076. break;
  2077. case TX_HW_ENQUEUE:
  2078. DP_STATS_INC(pdev, eap_drop_stats.tx_hw_enqueue, 1);
  2079. break;
  2080. case TX_SW_ENQUEUE:
  2081. DP_STATS_INC(pdev, eap_drop_stats.tx_sw_enqueue, 1);
  2082. break;
  2083. default:
  2084. dp_info_rl("Invalid eapol_drop code: %d", drop_code);
  2085. break;
  2086. }
  2087. }
  2088. }
  2089. #else
  2090. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2091. qdf_nbuf_t nbuf,
  2092. enum cdp_tx_sw_drop drop_code)
  2093. {
  2094. }
  2095. #endif
  2096. qdf_nbuf_t
  2097. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2098. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  2099. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2100. {
  2101. struct dp_pdev *pdev = vdev->pdev;
  2102. struct dp_soc *soc = pdev->soc;
  2103. struct dp_tx_desc_s *tx_desc;
  2104. QDF_STATUS status;
  2105. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  2106. uint16_t htt_tcl_metadata = 0;
  2107. enum cdp_tx_sw_drop drop_code = TX_MAX_DROP;
  2108. uint8_t tid = msdu_info->tid;
  2109. struct cdp_tid_tx_stats *tid_stats = NULL;
  2110. qdf_dma_addr_t paddr;
  2111. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  2112. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  2113. msdu_info, tx_exc_metadata);
  2114. if (!tx_desc) {
  2115. dp_err_rl("Tx_desc prepare Fail vdev_id %d vdev %pK queue %d",
  2116. vdev->vdev_id, vdev, tx_q->desc_pool_id);
  2117. drop_code = TX_DESC_ERR;
  2118. goto fail_return;
  2119. }
  2120. dp_tx_update_tdls_flags(soc, vdev, tx_desc);
  2121. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  2122. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2123. DP_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  2124. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  2125. DP_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  2126. DP_TCL_METADATA_TYPE_PEER_BASED);
  2127. DP_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  2128. peer_id);
  2129. dp_tx_bypass_reinjection(soc, tx_desc, tx_exc_metadata);
  2130. } else
  2131. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2132. if (msdu_info->exception_fw)
  2133. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2134. dp_tx_desc_update_fast_comp_flag(soc, tx_desc,
  2135. !pdev->enhanced_stats_en);
  2136. dp_tx_update_mesh_flags(soc, vdev, tx_desc);
  2137. if (qdf_unlikely(msdu_info->frm_type == dp_tx_frm_rmnet))
  2138. paddr = dp_tx_rmnet_nbuf_map(msdu_info, tx_desc);
  2139. else
  2140. paddr = dp_tx_nbuf_map(vdev, tx_desc, nbuf);
  2141. if (!paddr) {
  2142. /* Handle failure */
  2143. dp_err("qdf_nbuf_map failed");
  2144. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  2145. drop_code = TX_DMA_MAP_ERR;
  2146. goto release_desc;
  2147. }
  2148. tx_desc->dma_addr = paddr;
  2149. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2150. tx_desc->id, DP_TX_DESC_MAP);
  2151. dp_tx_update_mcast_param(peer_id, &htt_tcl_metadata, vdev, msdu_info);
  2152. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  2153. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2154. htt_tcl_metadata,
  2155. tx_exc_metadata, msdu_info);
  2156. if (status != QDF_STATUS_SUCCESS) {
  2157. dp_tx_err_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2158. tx_desc, tx_q->ring_id);
  2159. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2160. tx_desc->id, DP_TX_DESC_UNMAP);
  2161. dp_tx_nbuf_unmap(soc, tx_desc);
  2162. drop_code = TX_HW_ENQUEUE;
  2163. goto release_desc;
  2164. }
  2165. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2166. return NULL;
  2167. release_desc:
  2168. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2169. fail_return:
  2170. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2171. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2172. tid_stats = &pdev->stats.tid_stats.
  2173. tid_tx_stats[tx_q->ring_id][tid];
  2174. tid_stats->swdrop_cnt[drop_code]++;
  2175. return nbuf;
  2176. }
  2177. /**
  2178. * dp_tdls_tx_comp_free_buff() - Free non std buffer when TDLS flag is set
  2179. * @soc: Soc handle
  2180. * @desc: software Tx descriptor to be processed
  2181. *
  2182. * Return: 0 if Success
  2183. */
  2184. #ifdef FEATURE_WLAN_TDLS
  2185. static inline int
  2186. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2187. {
  2188. /* If it is TDLS mgmt, don't unmap or free the frame */
  2189. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME) {
  2190. dp_non_std_htt_tx_comp_free_buff(soc, desc);
  2191. return 0;
  2192. }
  2193. return 1;
  2194. }
  2195. #else
  2196. static inline int
  2197. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2198. {
  2199. return 1;
  2200. }
  2201. #endif
  2202. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  2203. bool delayed_free)
  2204. {
  2205. qdf_nbuf_t nbuf = desc->nbuf;
  2206. enum dp_tx_event_type type = dp_tx_get_event_type(desc->flags);
  2207. /* nbuf already freed in vdev detach path */
  2208. if (!nbuf)
  2209. return NULL;
  2210. if (!dp_tdls_tx_comp_free_buff(soc, desc))
  2211. return NULL;
  2212. /* 0 : MSDU buffer, 1 : MLE */
  2213. if (desc->msdu_ext_desc) {
  2214. /* TSO free */
  2215. if (hal_tx_ext_desc_get_tso_enable(
  2216. desc->msdu_ext_desc->vaddr)) {
  2217. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  2218. desc->id, DP_TX_COMP_MSDU_EXT);
  2219. dp_tx_tso_seg_history_add(soc,
  2220. desc->msdu_ext_desc->tso_desc,
  2221. desc->nbuf, desc->id, type);
  2222. /* unmap eash TSO seg before free the nbuf */
  2223. dp_tx_tso_unmap_segment(soc,
  2224. desc->msdu_ext_desc->tso_desc,
  2225. desc->msdu_ext_desc->
  2226. tso_num_desc);
  2227. goto nbuf_free;
  2228. }
  2229. if (qdf_unlikely(desc->frm_type == dp_tx_frm_sg)) {
  2230. void *msdu_ext_desc = desc->msdu_ext_desc->vaddr;
  2231. qdf_dma_addr_t iova;
  2232. uint32_t frag_len;
  2233. uint32_t i;
  2234. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  2235. QDF_DMA_TO_DEVICE,
  2236. qdf_nbuf_headlen(nbuf));
  2237. for (i = 1; i < DP_TX_MAX_NUM_FRAGS; i++) {
  2238. hal_tx_ext_desc_get_frag_info(msdu_ext_desc, i,
  2239. &iova,
  2240. &frag_len);
  2241. if (!iova || !frag_len)
  2242. break;
  2243. qdf_mem_unmap_page(soc->osdev, iova, frag_len,
  2244. QDF_DMA_TO_DEVICE);
  2245. }
  2246. goto nbuf_free;
  2247. }
  2248. }
  2249. /* If it's ME frame, dont unmap the cloned nbuf's */
  2250. if ((desc->flags & DP_TX_DESC_FLAG_ME) && qdf_nbuf_is_cloned(nbuf))
  2251. goto nbuf_free;
  2252. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf, desc->id, type);
  2253. dp_tx_unmap(soc, desc);
  2254. if (desc->flags & DP_TX_DESC_FLAG_MESH_MODE)
  2255. return dp_mesh_tx_comp_free_buff(soc, desc, delayed_free);
  2256. if (dp_tx_traffic_end_indication_enq_ind_pkt(soc, desc, nbuf))
  2257. return NULL;
  2258. nbuf_free:
  2259. if (delayed_free)
  2260. return nbuf;
  2261. qdf_nbuf_free(nbuf);
  2262. return NULL;
  2263. }
  2264. /**
  2265. * dp_tx_sg_unmap_buf() - Unmap scatter gather fragments
  2266. * @soc: DP soc handle
  2267. * @nbuf: skb
  2268. * @msdu_info: MSDU info
  2269. *
  2270. * Return: None
  2271. */
  2272. static inline void
  2273. dp_tx_sg_unmap_buf(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2274. struct dp_tx_msdu_info_s *msdu_info)
  2275. {
  2276. uint32_t cur_idx;
  2277. struct dp_tx_seg_info_s *seg = msdu_info->u.sg_info.curr_seg;
  2278. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE,
  2279. qdf_nbuf_headlen(nbuf));
  2280. for (cur_idx = 1; cur_idx < seg->frag_cnt; cur_idx++)
  2281. qdf_mem_unmap_page(soc->osdev, (qdf_dma_addr_t)
  2282. (seg->frags[cur_idx].paddr_lo | ((uint64_t)
  2283. seg->frags[cur_idx].paddr_hi) << 32),
  2284. seg->frags[cur_idx].len,
  2285. QDF_DMA_TO_DEVICE);
  2286. }
  2287. #if QDF_LOCK_STATS
  2288. noinline
  2289. #else
  2290. #endif
  2291. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2292. struct dp_tx_msdu_info_s *msdu_info)
  2293. {
  2294. uint32_t i;
  2295. struct dp_pdev *pdev = vdev->pdev;
  2296. struct dp_soc *soc = pdev->soc;
  2297. struct dp_tx_desc_s *tx_desc;
  2298. bool is_cce_classified = false;
  2299. QDF_STATUS status;
  2300. uint16_t htt_tcl_metadata = 0;
  2301. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  2302. struct cdp_tid_tx_stats *tid_stats = NULL;
  2303. uint8_t prep_desc_fail = 0, hw_enq_fail = 0;
  2304. if (msdu_info->frm_type == dp_tx_frm_me)
  2305. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2306. i = 0;
  2307. /* Print statement to track i and num_seg */
  2308. /*
  2309. * For each segment (maps to 1 MSDU) , prepare software and hardware
  2310. * descriptors using information in msdu_info
  2311. */
  2312. while (i < msdu_info->num_seg) {
  2313. /*
  2314. * Setup Tx descriptor for an MSDU, and MSDU extension
  2315. * descriptor
  2316. */
  2317. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  2318. tx_q->desc_pool_id);
  2319. if (!tx_desc) {
  2320. if (msdu_info->frm_type == dp_tx_frm_me) {
  2321. prep_desc_fail++;
  2322. dp_tx_me_free_buf(pdev,
  2323. (void *)(msdu_info->u.sg_info
  2324. .curr_seg->frags[0].vaddr));
  2325. if (prep_desc_fail == msdu_info->num_seg) {
  2326. /*
  2327. * Unmap is needed only if descriptor
  2328. * preparation failed for all segments.
  2329. */
  2330. qdf_nbuf_unmap(soc->osdev,
  2331. msdu_info->u.sg_info.
  2332. curr_seg->nbuf,
  2333. QDF_DMA_TO_DEVICE);
  2334. }
  2335. /*
  2336. * Free the nbuf for the current segment
  2337. * and make it point to the next in the list.
  2338. * For me, there are as many segments as there
  2339. * are no of clients.
  2340. */
  2341. qdf_nbuf_free(msdu_info->u.sg_info
  2342. .curr_seg->nbuf);
  2343. if (msdu_info->u.sg_info.curr_seg->next) {
  2344. msdu_info->u.sg_info.curr_seg =
  2345. msdu_info->u.sg_info
  2346. .curr_seg->next;
  2347. nbuf = msdu_info->u.sg_info
  2348. .curr_seg->nbuf;
  2349. }
  2350. i++;
  2351. continue;
  2352. }
  2353. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2354. dp_tx_tso_seg_history_add(
  2355. soc,
  2356. msdu_info->u.tso_info.curr_seg,
  2357. nbuf, 0, DP_TX_DESC_UNMAP);
  2358. dp_tx_tso_unmap_segment(soc,
  2359. msdu_info->u.tso_info.
  2360. curr_seg,
  2361. msdu_info->u.tso_info.
  2362. tso_num_seg_list);
  2363. if (msdu_info->u.tso_info.curr_seg->next) {
  2364. msdu_info->u.tso_info.curr_seg =
  2365. msdu_info->u.tso_info.curr_seg->next;
  2366. i++;
  2367. continue;
  2368. }
  2369. }
  2370. if (msdu_info->frm_type == dp_tx_frm_sg)
  2371. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2372. goto done;
  2373. }
  2374. if (msdu_info->frm_type == dp_tx_frm_me) {
  2375. tx_desc->msdu_ext_desc->me_buffer =
  2376. (struct dp_tx_me_buf_t *)msdu_info->
  2377. u.sg_info.curr_seg->frags[0].vaddr;
  2378. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  2379. }
  2380. if (is_cce_classified)
  2381. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2382. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2383. if (msdu_info->exception_fw) {
  2384. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2385. }
  2386. dp_tx_is_hp_update_required(i, msdu_info);
  2387. /*
  2388. * For frames with multiple segments (TSO, ME), jump to next
  2389. * segment.
  2390. */
  2391. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2392. if (msdu_info->u.tso_info.curr_seg->next) {
  2393. msdu_info->u.tso_info.curr_seg =
  2394. msdu_info->u.tso_info.curr_seg->next;
  2395. /*
  2396. * If this is a jumbo nbuf, then increment the
  2397. * number of nbuf users for each additional
  2398. * segment of the msdu. This will ensure that
  2399. * the skb is freed only after receiving tx
  2400. * completion for all segments of an nbuf
  2401. */
  2402. qdf_nbuf_inc_users(nbuf);
  2403. /* Check with MCL if this is needed */
  2404. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf;
  2405. */
  2406. }
  2407. }
  2408. dp_tx_update_mcast_param(DP_INVALID_PEER,
  2409. &htt_tcl_metadata,
  2410. vdev,
  2411. msdu_info);
  2412. /*
  2413. * Enqueue the Tx MSDU descriptor to HW for transmit
  2414. */
  2415. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2416. htt_tcl_metadata,
  2417. NULL, msdu_info);
  2418. dp_tx_check_and_flush_hp(soc, status, msdu_info);
  2419. if (status != QDF_STATUS_SUCCESS) {
  2420. dp_info_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2421. tx_desc, tx_q->ring_id);
  2422. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2423. tid_stats = &pdev->stats.tid_stats.
  2424. tid_tx_stats[tx_q->ring_id][msdu_info->tid];
  2425. tid_stats->swdrop_cnt[TX_HW_ENQUEUE]++;
  2426. if (msdu_info->frm_type == dp_tx_frm_me) {
  2427. hw_enq_fail++;
  2428. if (hw_enq_fail == msdu_info->num_seg) {
  2429. /*
  2430. * Unmap is needed only if enqueue
  2431. * failed for all segments.
  2432. */
  2433. qdf_nbuf_unmap(soc->osdev,
  2434. msdu_info->u.sg_info.
  2435. curr_seg->nbuf,
  2436. QDF_DMA_TO_DEVICE);
  2437. }
  2438. /*
  2439. * Free the nbuf for the current segment
  2440. * and make it point to the next in the list.
  2441. * For me, there are as many segments as there
  2442. * are no of clients.
  2443. */
  2444. qdf_nbuf_free(msdu_info->u.sg_info
  2445. .curr_seg->nbuf);
  2446. dp_tx_desc_release(soc, tx_desc,
  2447. tx_q->desc_pool_id);
  2448. if (msdu_info->u.sg_info.curr_seg->next) {
  2449. msdu_info->u.sg_info.curr_seg =
  2450. msdu_info->u.sg_info
  2451. .curr_seg->next;
  2452. nbuf = msdu_info->u.sg_info
  2453. .curr_seg->nbuf;
  2454. } else
  2455. break;
  2456. i++;
  2457. continue;
  2458. }
  2459. /*
  2460. * For TSO frames, the nbuf users increment done for
  2461. * the current segment has to be reverted, since the
  2462. * hw enqueue for this segment failed
  2463. */
  2464. if (msdu_info->frm_type == dp_tx_frm_tso &&
  2465. msdu_info->u.tso_info.curr_seg) {
  2466. /*
  2467. * unmap and free current,
  2468. * retransmit remaining segments
  2469. */
  2470. dp_tx_comp_free_buf(soc, tx_desc, false);
  2471. i++;
  2472. dp_tx_desc_release(soc, tx_desc,
  2473. tx_q->desc_pool_id);
  2474. continue;
  2475. }
  2476. if (msdu_info->frm_type == dp_tx_frm_sg)
  2477. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2478. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2479. goto done;
  2480. }
  2481. /*
  2482. * TODO
  2483. * if tso_info structure can be modified to have curr_seg
  2484. * as first element, following 2 blocks of code (for TSO and SG)
  2485. * can be combined into 1
  2486. */
  2487. /*
  2488. * For Multicast-Unicast converted packets,
  2489. * each converted frame (for a client) is represented as
  2490. * 1 segment
  2491. */
  2492. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  2493. (msdu_info->frm_type == dp_tx_frm_me)) {
  2494. if (msdu_info->u.sg_info.curr_seg->next) {
  2495. msdu_info->u.sg_info.curr_seg =
  2496. msdu_info->u.sg_info.curr_seg->next;
  2497. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2498. } else
  2499. break;
  2500. }
  2501. i++;
  2502. }
  2503. nbuf = NULL;
  2504. done:
  2505. return nbuf;
  2506. }
  2507. /**
  2508. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  2509. * for SG frames
  2510. * @vdev: DP vdev handle
  2511. * @nbuf: skb
  2512. * @seg_info: Pointer to Segment info Descriptor to be prepared
  2513. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2514. *
  2515. * Return: NULL on success,
  2516. * nbuf when it fails to send
  2517. */
  2518. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2519. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  2520. {
  2521. uint32_t cur_frag, nr_frags, i;
  2522. qdf_dma_addr_t paddr;
  2523. struct dp_tx_sg_info_s *sg_info;
  2524. sg_info = &msdu_info->u.sg_info;
  2525. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  2526. if (QDF_STATUS_SUCCESS !=
  2527. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  2528. QDF_DMA_TO_DEVICE,
  2529. qdf_nbuf_headlen(nbuf))) {
  2530. dp_tx_err("dma map error");
  2531. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2532. qdf_nbuf_free(nbuf);
  2533. return NULL;
  2534. }
  2535. paddr = qdf_nbuf_mapped_paddr_get(nbuf);
  2536. seg_info->frags[0].paddr_lo = paddr;
  2537. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  2538. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  2539. seg_info->frags[0].vaddr = (void *) nbuf;
  2540. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  2541. if (QDF_STATUS_SUCCESS != qdf_nbuf_frag_map(vdev->osdev,
  2542. nbuf, 0,
  2543. QDF_DMA_TO_DEVICE,
  2544. cur_frag)) {
  2545. dp_tx_err("frag dma map error");
  2546. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2547. goto map_err;
  2548. }
  2549. paddr = qdf_nbuf_get_tx_frag_paddr(nbuf);
  2550. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  2551. seg_info->frags[cur_frag + 1].paddr_hi =
  2552. ((uint64_t) paddr) >> 32;
  2553. seg_info->frags[cur_frag + 1].len =
  2554. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  2555. }
  2556. seg_info->frag_cnt = (cur_frag + 1);
  2557. seg_info->total_len = qdf_nbuf_len(nbuf);
  2558. seg_info->next = NULL;
  2559. sg_info->curr_seg = seg_info;
  2560. msdu_info->frm_type = dp_tx_frm_sg;
  2561. msdu_info->num_seg = 1;
  2562. return nbuf;
  2563. map_err:
  2564. /* restore paddr into nbuf before calling unmap */
  2565. qdf_nbuf_mapped_paddr_set(nbuf,
  2566. (qdf_dma_addr_t)(seg_info->frags[0].paddr_lo |
  2567. ((uint64_t)
  2568. seg_info->frags[0].paddr_hi) << 32));
  2569. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  2570. QDF_DMA_TO_DEVICE,
  2571. seg_info->frags[0].len);
  2572. for (i = 1; i <= cur_frag; i++) {
  2573. qdf_mem_unmap_page(vdev->osdev, (qdf_dma_addr_t)
  2574. (seg_info->frags[i].paddr_lo | ((uint64_t)
  2575. seg_info->frags[i].paddr_hi) << 32),
  2576. seg_info->frags[i].len,
  2577. QDF_DMA_TO_DEVICE);
  2578. }
  2579. qdf_nbuf_free(nbuf);
  2580. return NULL;
  2581. }
  2582. /**
  2583. * dp_tx_add_tx_sniffer_meta_data()- Add tx_sniffer meta hdr info
  2584. * @vdev: DP vdev handle
  2585. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2586. * @ppdu_cookie: PPDU cookie that should be replayed in the ppdu completions
  2587. *
  2588. * Return: NULL on failure,
  2589. * nbuf when extracted successfully
  2590. */
  2591. static
  2592. void dp_tx_add_tx_sniffer_meta_data(struct dp_vdev *vdev,
  2593. struct dp_tx_msdu_info_s *msdu_info,
  2594. uint16_t ppdu_cookie)
  2595. {
  2596. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2597. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2598. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2599. HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET
  2600. (msdu_info->meta_data[5], 1);
  2601. HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET
  2602. (msdu_info->meta_data[5], 1);
  2603. HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET
  2604. (msdu_info->meta_data[6], ppdu_cookie);
  2605. msdu_info->exception_fw = 1;
  2606. msdu_info->is_tx_sniffer = 1;
  2607. }
  2608. #ifdef MESH_MODE_SUPPORT
  2609. /**
  2610. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  2611. * and prepare msdu_info for mesh frames.
  2612. * @vdev: DP vdev handle
  2613. * @nbuf: skb
  2614. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2615. *
  2616. * Return: NULL on failure,
  2617. * nbuf when extracted successfully
  2618. */
  2619. static
  2620. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2621. struct dp_tx_msdu_info_s *msdu_info)
  2622. {
  2623. struct meta_hdr_s *mhdr;
  2624. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2625. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2626. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  2627. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  2628. msdu_info->exception_fw = 0;
  2629. goto remove_meta_hdr;
  2630. }
  2631. msdu_info->exception_fw = 1;
  2632. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2633. meta_data->host_tx_desc_pool = 1;
  2634. meta_data->update_peer_cache = 1;
  2635. meta_data->learning_frame = 1;
  2636. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  2637. meta_data->power = mhdr->power;
  2638. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  2639. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  2640. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  2641. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  2642. meta_data->dyn_bw = 1;
  2643. meta_data->valid_pwr = 1;
  2644. meta_data->valid_mcs_mask = 1;
  2645. meta_data->valid_nss_mask = 1;
  2646. meta_data->valid_preamble_type = 1;
  2647. meta_data->valid_retries = 1;
  2648. meta_data->valid_bw_info = 1;
  2649. }
  2650. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  2651. meta_data->encrypt_type = 0;
  2652. meta_data->valid_encrypt_type = 1;
  2653. meta_data->learning_frame = 0;
  2654. }
  2655. meta_data->valid_key_flags = 1;
  2656. meta_data->key_flags = (mhdr->keyix & 0x3);
  2657. remove_meta_hdr:
  2658. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2659. dp_tx_err("qdf_nbuf_pull_head failed");
  2660. qdf_nbuf_free(nbuf);
  2661. return NULL;
  2662. }
  2663. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  2664. dp_tx_info("Meta hdr %0x %0x %0x %0x %0x %0x"
  2665. " tid %d to_fw %d",
  2666. msdu_info->meta_data[0],
  2667. msdu_info->meta_data[1],
  2668. msdu_info->meta_data[2],
  2669. msdu_info->meta_data[3],
  2670. msdu_info->meta_data[4],
  2671. msdu_info->meta_data[5],
  2672. msdu_info->tid, msdu_info->exception_fw);
  2673. return nbuf;
  2674. }
  2675. #else
  2676. static
  2677. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2678. struct dp_tx_msdu_info_s *msdu_info)
  2679. {
  2680. return nbuf;
  2681. }
  2682. #endif
  2683. /**
  2684. * dp_check_exc_metadata() - Checks if parameters are valid
  2685. * @tx_exc: holds all exception path parameters
  2686. *
  2687. * Return: true when all the parameters are valid else false
  2688. *
  2689. */
  2690. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  2691. {
  2692. bool invalid_tid = (tx_exc->tid >= DP_MAX_TIDS && tx_exc->tid !=
  2693. HTT_INVALID_TID);
  2694. bool invalid_encap_type =
  2695. (tx_exc->tx_encap_type > htt_cmn_pkt_num_types &&
  2696. tx_exc->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE);
  2697. bool invalid_sec_type = (tx_exc->sec_type > cdp_num_sec_types &&
  2698. tx_exc->sec_type != CDP_INVALID_SEC_TYPE);
  2699. bool invalid_cookie = (tx_exc->is_tx_sniffer == 1 &&
  2700. tx_exc->ppdu_cookie == 0);
  2701. if (tx_exc->is_intrabss_fwd)
  2702. return true;
  2703. if (invalid_tid || invalid_encap_type || invalid_sec_type ||
  2704. invalid_cookie) {
  2705. return false;
  2706. }
  2707. return true;
  2708. }
  2709. #ifdef ATH_SUPPORT_IQUE
  2710. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2711. {
  2712. qdf_ether_header_t *eh;
  2713. /* Mcast to Ucast Conversion*/
  2714. if (qdf_likely(!vdev->mcast_enhancement_en))
  2715. return true;
  2716. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2717. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  2718. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  2719. dp_verbose_debug("Mcast frm for ME %pK", vdev);
  2720. qdf_nbuf_set_next(nbuf, NULL);
  2721. DP_STATS_INC_PKT(vdev, tx_i.mcast_en.mcast_pkt, 1,
  2722. qdf_nbuf_len(nbuf));
  2723. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  2724. QDF_STATUS_SUCCESS) {
  2725. return false;
  2726. }
  2727. if (qdf_unlikely(vdev->igmp_mcast_enhanc_en > 0)) {
  2728. if (dp_tx_prepare_send_igmp_me(vdev, nbuf) ==
  2729. QDF_STATUS_SUCCESS) {
  2730. return false;
  2731. }
  2732. }
  2733. }
  2734. return true;
  2735. }
  2736. #else
  2737. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2738. {
  2739. return true;
  2740. }
  2741. #endif
  2742. #ifdef QCA_SUPPORT_WDS_EXTENDED
  2743. /**
  2744. * dp_tx_mcast_drop() - Drop mcast frame if drop_tx_mcast is set in WDS_EXT
  2745. * @vdev: vdev handle
  2746. * @nbuf: skb
  2747. *
  2748. * Return: true if frame is dropped, false otherwise
  2749. */
  2750. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2751. {
  2752. /* Drop tx mcast and WDS Extended feature check */
  2753. if (qdf_unlikely((vdev->drop_tx_mcast) && (vdev->wds_ext_enabled))) {
  2754. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2755. qdf_nbuf_data(nbuf);
  2756. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  2757. DP_STATS_INC(vdev, tx_i.dropped.tx_mcast_drop, 1);
  2758. return true;
  2759. }
  2760. }
  2761. return false;
  2762. }
  2763. #else
  2764. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2765. {
  2766. return false;
  2767. }
  2768. #endif
  2769. /**
  2770. * dp_tx_per_pkt_vdev_id_check() - vdev id check for frame
  2771. * @nbuf: qdf_nbuf_t
  2772. * @vdev: struct dp_vdev *
  2773. *
  2774. * Allow packet for processing only if it is for peer client which is
  2775. * connected with same vap. Drop packet if client is connected to
  2776. * different vap.
  2777. *
  2778. * Return: QDF_STATUS
  2779. */
  2780. static inline QDF_STATUS
  2781. dp_tx_per_pkt_vdev_id_check(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  2782. {
  2783. struct dp_ast_entry *dst_ast_entry = NULL;
  2784. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2785. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) ||
  2786. DP_FRAME_IS_BROADCAST((eh)->ether_dhost))
  2787. return QDF_STATUS_SUCCESS;
  2788. qdf_spin_lock_bh(&vdev->pdev->soc->ast_lock);
  2789. dst_ast_entry = dp_peer_ast_hash_find_by_vdevid(vdev->pdev->soc,
  2790. eh->ether_dhost,
  2791. vdev->vdev_id);
  2792. /* If there is no ast entry, return failure */
  2793. if (qdf_unlikely(!dst_ast_entry)) {
  2794. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2795. return QDF_STATUS_E_FAILURE;
  2796. }
  2797. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2798. return QDF_STATUS_SUCCESS;
  2799. }
  2800. /**
  2801. * dp_tx_nawds_handler() - NAWDS handler
  2802. *
  2803. * @soc: DP soc handle
  2804. * @vdev: DP vdev handle
  2805. * @msdu_info: msdu_info required to create HTT metadata
  2806. * @nbuf: skb
  2807. * @sa_peer_id:
  2808. *
  2809. * This API transfers the multicast frames with the peer id
  2810. * on NAWDS enabled peer.
  2811. *
  2812. * Return: none
  2813. */
  2814. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  2815. struct dp_tx_msdu_info_s *msdu_info,
  2816. qdf_nbuf_t nbuf, uint16_t sa_peer_id)
  2817. {
  2818. struct dp_peer *peer = NULL;
  2819. qdf_nbuf_t nbuf_clone = NULL;
  2820. uint16_t peer_id = DP_INVALID_PEER;
  2821. struct dp_txrx_peer *txrx_peer;
  2822. uint8_t link_id = 0;
  2823. /* This check avoids pkt forwarding which is entered
  2824. * in the ast table but still doesn't have valid peerid.
  2825. */
  2826. if (sa_peer_id == HTT_INVALID_PEER)
  2827. return;
  2828. qdf_spin_lock_bh(&vdev->peer_list_lock);
  2829. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2830. txrx_peer = dp_get_txrx_peer(peer);
  2831. if (!txrx_peer)
  2832. continue;
  2833. if (!txrx_peer->bss_peer && txrx_peer->nawds_enabled) {
  2834. peer_id = peer->peer_id;
  2835. if (!dp_peer_is_primary_link_peer(peer))
  2836. continue;
  2837. /* In the case of wds ext peer mcast traffic will be
  2838. * sent as part of VLAN interface
  2839. */
  2840. if (dp_peer_is_wds_ext_peer(txrx_peer))
  2841. continue;
  2842. /* Multicast packets needs to be
  2843. * dropped in case of intra bss forwarding
  2844. */
  2845. if (sa_peer_id == txrx_peer->peer_id) {
  2846. dp_tx_debug("multicast packet");
  2847. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2848. tx.nawds_mcast_drop,
  2849. 1, link_id);
  2850. continue;
  2851. }
  2852. nbuf_clone = qdf_nbuf_clone(nbuf);
  2853. if (!nbuf_clone) {
  2854. QDF_TRACE(QDF_MODULE_ID_DP,
  2855. QDF_TRACE_LEVEL_ERROR,
  2856. FL("nbuf clone failed"));
  2857. break;
  2858. }
  2859. nbuf_clone = dp_tx_send_msdu_single(vdev, nbuf_clone,
  2860. msdu_info, peer_id,
  2861. NULL);
  2862. if (nbuf_clone) {
  2863. dp_tx_debug("pkt send failed");
  2864. qdf_nbuf_free(nbuf_clone);
  2865. } else {
  2866. if (peer_id != DP_INVALID_PEER)
  2867. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2868. tx.nawds_mcast,
  2869. 1, qdf_nbuf_len(nbuf), link_id);
  2870. }
  2871. }
  2872. }
  2873. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  2874. }
  2875. #ifdef WLAN_MCAST_MLO
  2876. static inline bool
  2877. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2878. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2879. {
  2880. if (!tx_exc_metadata->is_mlo_mcast && qdf_unlikely(vdev->mesh_vdev))
  2881. return true;
  2882. return false;
  2883. }
  2884. #else
  2885. static inline bool
  2886. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2887. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2888. {
  2889. if (qdf_unlikely(vdev->mesh_vdev))
  2890. return true;
  2891. return false;
  2892. }
  2893. #endif
  2894. qdf_nbuf_t
  2895. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2896. qdf_nbuf_t nbuf,
  2897. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2898. {
  2899. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2900. struct dp_tx_msdu_info_s msdu_info;
  2901. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2902. DP_MOD_ID_TX_EXCEPTION);
  2903. if (qdf_unlikely(!vdev))
  2904. goto fail;
  2905. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  2906. if (!tx_exc_metadata)
  2907. goto fail;
  2908. msdu_info.tid = tx_exc_metadata->tid;
  2909. dp_verbose_debug("skb "QDF_MAC_ADDR_FMT,
  2910. QDF_MAC_ADDR_REF(nbuf->data));
  2911. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  2912. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  2913. dp_tx_err("Invalid parameters in exception path");
  2914. goto fail;
  2915. }
  2916. /* for peer based metadata check if peer is valid */
  2917. if (tx_exc_metadata->peer_id != CDP_INVALID_PEER) {
  2918. struct dp_peer *peer = NULL;
  2919. peer = dp_peer_get_ref_by_id(vdev->pdev->soc,
  2920. tx_exc_metadata->peer_id,
  2921. DP_MOD_ID_TX_EXCEPTION);
  2922. if (qdf_unlikely(!peer)) {
  2923. DP_STATS_INC(vdev,
  2924. tx_i.dropped.invalid_peer_id_in_exc_path,
  2925. 1);
  2926. goto fail;
  2927. }
  2928. dp_peer_unref_delete(peer, DP_MOD_ID_TX_EXCEPTION);
  2929. }
  2930. /* Basic sanity checks for unsupported packets */
  2931. /* MESH mode */
  2932. if (dp_tx_check_mesh_vdev(vdev, tx_exc_metadata)) {
  2933. dp_tx_err("Mesh mode is not supported in exception path");
  2934. goto fail;
  2935. }
  2936. /*
  2937. * Classify the frame and call corresponding
  2938. * "prepare" function which extracts the segment (TSO)
  2939. * and fragmentation information (for TSO , SG, ME, or Raw)
  2940. * into MSDU_INFO structure which is later used to fill
  2941. * SW and HW descriptors.
  2942. */
  2943. if (qdf_nbuf_is_tso(nbuf)) {
  2944. dp_verbose_debug("TSO frame %pK", vdev);
  2945. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  2946. qdf_nbuf_len(nbuf));
  2947. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  2948. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  2949. qdf_nbuf_len(nbuf));
  2950. goto fail;
  2951. }
  2952. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  2953. goto send_multiple;
  2954. }
  2955. /* SG */
  2956. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  2957. struct dp_tx_seg_info_s seg_info = {0};
  2958. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  2959. if (!nbuf)
  2960. goto fail;
  2961. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  2962. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  2963. qdf_nbuf_len(nbuf));
  2964. goto send_multiple;
  2965. }
  2966. if (qdf_likely(tx_exc_metadata->is_tx_sniffer)) {
  2967. DP_STATS_INC_PKT(vdev, tx_i.sniffer_rcvd, 1,
  2968. qdf_nbuf_len(nbuf));
  2969. dp_tx_add_tx_sniffer_meta_data(vdev, &msdu_info,
  2970. tx_exc_metadata->ppdu_cookie);
  2971. }
  2972. /*
  2973. * Get HW Queue to use for this frame.
  2974. * TCL supports upto 4 DMA rings, out of which 3 rings are
  2975. * dedicated for data and 1 for command.
  2976. * "queue_id" maps to one hardware ring.
  2977. * With each ring, we also associate a unique Tx descriptor pool
  2978. * to minimize lock contention for these resources.
  2979. */
  2980. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2981. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  2982. 1);
  2983. /*
  2984. * if the packet is mcast packet send through mlo_macst handler
  2985. * for all prnt_vdevs
  2986. */
  2987. if (soc->arch_ops.dp_tx_mlo_mcast_send) {
  2988. nbuf = soc->arch_ops.dp_tx_mlo_mcast_send(soc, vdev,
  2989. nbuf,
  2990. tx_exc_metadata);
  2991. if (!nbuf)
  2992. goto fail;
  2993. }
  2994. if (qdf_likely(tx_exc_metadata->is_intrabss_fwd)) {
  2995. if (qdf_unlikely(vdev->nawds_enabled)) {
  2996. /*
  2997. * This is a multicast packet
  2998. */
  2999. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  3000. tx_exc_metadata->peer_id);
  3001. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  3002. 1, qdf_nbuf_len(nbuf));
  3003. }
  3004. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  3005. DP_INVALID_PEER, NULL);
  3006. } else {
  3007. /*
  3008. * Check exception descriptors
  3009. */
  3010. if (dp_tx_exception_limit_check(vdev))
  3011. goto fail;
  3012. /* Single linear frame */
  3013. /*
  3014. * If nbuf is a simple linear frame, use send_single function to
  3015. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3016. * SRNG. There is no need to setup a MSDU extension descriptor.
  3017. */
  3018. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  3019. tx_exc_metadata->peer_id,
  3020. tx_exc_metadata);
  3021. }
  3022. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3023. return nbuf;
  3024. send_multiple:
  3025. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3026. fail:
  3027. if (vdev)
  3028. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3029. dp_verbose_debug("pkt send failed");
  3030. return nbuf;
  3031. }
  3032. qdf_nbuf_t
  3033. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3034. uint8_t vdev_id, qdf_nbuf_t nbuf,
  3035. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3036. {
  3037. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3038. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3039. DP_MOD_ID_TX_EXCEPTION);
  3040. if (qdf_unlikely(!vdev))
  3041. goto fail;
  3042. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3043. == QDF_STATUS_E_FAILURE)) {
  3044. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3045. goto fail;
  3046. }
  3047. /* Unref count as it will again be taken inside dp_tx_exception */
  3048. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3049. return dp_tx_send_exception(soc_hdl, vdev_id, nbuf, tx_exc_metadata);
  3050. fail:
  3051. if (vdev)
  3052. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3053. dp_verbose_debug("pkt send failed");
  3054. return nbuf;
  3055. }
  3056. #ifdef MESH_MODE_SUPPORT
  3057. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3058. qdf_nbuf_t nbuf)
  3059. {
  3060. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3061. struct meta_hdr_s *mhdr;
  3062. qdf_nbuf_t nbuf_mesh = NULL;
  3063. qdf_nbuf_t nbuf_clone = NULL;
  3064. struct dp_vdev *vdev;
  3065. uint8_t no_enc_frame = 0;
  3066. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  3067. if (!nbuf_mesh) {
  3068. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3069. "qdf_nbuf_unshare failed");
  3070. return nbuf;
  3071. }
  3072. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_MESH);
  3073. if (!vdev) {
  3074. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3075. "vdev is NULL for vdev_id %d", vdev_id);
  3076. return nbuf;
  3077. }
  3078. nbuf = nbuf_mesh;
  3079. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  3080. if ((vdev->sec_type != cdp_sec_type_none) &&
  3081. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  3082. no_enc_frame = 1;
  3083. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  3084. qdf_nbuf_set_priority(nbuf, HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST);
  3085. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  3086. !no_enc_frame) {
  3087. nbuf_clone = qdf_nbuf_clone(nbuf);
  3088. if (!nbuf_clone) {
  3089. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3090. "qdf_nbuf_clone failed");
  3091. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3092. return nbuf;
  3093. }
  3094. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  3095. }
  3096. if (nbuf_clone) {
  3097. if (!dp_tx_send(soc_hdl, vdev_id, nbuf_clone)) {
  3098. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3099. } else {
  3100. qdf_nbuf_free(nbuf_clone);
  3101. }
  3102. }
  3103. if (no_enc_frame)
  3104. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  3105. else
  3106. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  3107. nbuf = dp_tx_send(soc_hdl, vdev_id, nbuf);
  3108. if ((!nbuf) && no_enc_frame) {
  3109. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3110. }
  3111. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3112. return nbuf;
  3113. }
  3114. #else
  3115. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3116. qdf_nbuf_t nbuf)
  3117. {
  3118. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3119. }
  3120. #endif
  3121. #ifdef QCA_DP_TX_NBUF_AND_NBUF_DATA_PREFETCH
  3122. static inline
  3123. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3124. {
  3125. if (nbuf) {
  3126. qdf_prefetch(&nbuf->len);
  3127. qdf_prefetch(&nbuf->data);
  3128. }
  3129. }
  3130. #else
  3131. static inline
  3132. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3133. {
  3134. }
  3135. #endif
  3136. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3137. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3138. qdf_nbuf_t nbuf)
  3139. {
  3140. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3141. struct dp_vdev *vdev = NULL;
  3142. vdev = soc->vdev_id_map[vdev_id];
  3143. if (qdf_unlikely(!vdev))
  3144. return nbuf;
  3145. DP_STATS_INC(vdev, tx_i.dropped.drop_ingress, 1);
  3146. return nbuf;
  3147. }
  3148. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3149. qdf_nbuf_t nbuf,
  3150. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3151. {
  3152. return dp_tx_drop(soc_hdl, vdev_id, nbuf);
  3153. }
  3154. #endif
  3155. #ifdef FEATURE_DIRECT_LINK
  3156. /**
  3157. * dp_vdev_tx_mark_to_fw() - Mark to_fw bit for the tx packet
  3158. * @nbuf: skb
  3159. * @vdev: DP vdev handle
  3160. *
  3161. * Return: None
  3162. */
  3163. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3164. {
  3165. if (qdf_unlikely(vdev->to_fw))
  3166. QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf) = 1;
  3167. }
  3168. #else
  3169. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3170. {
  3171. }
  3172. #endif
  3173. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3174. qdf_nbuf_t nbuf)
  3175. {
  3176. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3177. uint16_t peer_id = HTT_INVALID_PEER;
  3178. /*
  3179. * doing a memzero is causing additional function call overhead
  3180. * so doing static stack clearing
  3181. */
  3182. struct dp_tx_msdu_info_s msdu_info = {0};
  3183. struct dp_vdev *vdev = NULL;
  3184. qdf_nbuf_t end_nbuf = NULL;
  3185. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3186. return nbuf;
  3187. /*
  3188. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3189. * this in per packet path.
  3190. *
  3191. * As in this path vdev memory is already protected with netdev
  3192. * tx lock
  3193. */
  3194. vdev = soc->vdev_id_map[vdev_id];
  3195. if (qdf_unlikely(!vdev))
  3196. return nbuf;
  3197. dp_vdev_tx_mark_to_fw(nbuf, vdev);
  3198. /*
  3199. * Set Default Host TID value to invalid TID
  3200. * (TID override disabled)
  3201. */
  3202. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  3203. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  3204. if (qdf_unlikely(vdev->mesh_vdev)) {
  3205. qdf_nbuf_t nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  3206. &msdu_info);
  3207. if (!nbuf_mesh) {
  3208. dp_verbose_debug("Extracting mesh metadata failed");
  3209. return nbuf;
  3210. }
  3211. nbuf = nbuf_mesh;
  3212. }
  3213. /*
  3214. * Get HW Queue to use for this frame.
  3215. * TCL supports upto 4 DMA rings, out of which 3 rings are
  3216. * dedicated for data and 1 for command.
  3217. * "queue_id" maps to one hardware ring.
  3218. * With each ring, we also associate a unique Tx descriptor pool
  3219. * to minimize lock contention for these resources.
  3220. */
  3221. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  3222. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  3223. 1);
  3224. /*
  3225. * TCL H/W supports 2 DSCP-TID mapping tables.
  3226. * Table 1 - Default DSCP-TID mapping table
  3227. * Table 2 - 1 DSCP-TID override table
  3228. *
  3229. * If we need a different DSCP-TID mapping for this vap,
  3230. * call tid_classify to extract DSCP/ToS from frame and
  3231. * map to a TID and store in msdu_info. This is later used
  3232. * to fill in TCL Input descriptor (per-packet TID override).
  3233. */
  3234. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  3235. /*
  3236. * Classify the frame and call corresponding
  3237. * "prepare" function which extracts the segment (TSO)
  3238. * and fragmentation information (for TSO , SG, ME, or Raw)
  3239. * into MSDU_INFO structure which is later used to fill
  3240. * SW and HW descriptors.
  3241. */
  3242. if (qdf_nbuf_is_tso(nbuf)) {
  3243. dp_verbose_debug("TSO frame %pK", vdev);
  3244. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  3245. qdf_nbuf_len(nbuf));
  3246. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  3247. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  3248. qdf_nbuf_len(nbuf));
  3249. return nbuf;
  3250. }
  3251. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  3252. goto send_multiple;
  3253. }
  3254. /* SG */
  3255. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  3256. if (qdf_nbuf_get_nr_frags(nbuf) > DP_TX_MAX_NUM_FRAGS - 1) {
  3257. if (qdf_unlikely(qdf_nbuf_linearize(nbuf)))
  3258. return nbuf;
  3259. } else {
  3260. struct dp_tx_seg_info_s seg_info = {0};
  3261. if (qdf_unlikely(is_nbuf_frm_rmnet(nbuf, &msdu_info)))
  3262. goto send_single;
  3263. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info,
  3264. &msdu_info);
  3265. if (!nbuf)
  3266. return NULL;
  3267. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  3268. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  3269. qdf_nbuf_len(nbuf));
  3270. goto send_multiple;
  3271. }
  3272. }
  3273. if (qdf_unlikely(!dp_tx_mcast_enhance(vdev, nbuf)))
  3274. return NULL;
  3275. if (qdf_unlikely(dp_tx_mcast_drop(vdev, nbuf)))
  3276. return nbuf;
  3277. /* RAW */
  3278. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  3279. struct dp_tx_seg_info_s seg_info = {0};
  3280. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  3281. if (!nbuf)
  3282. return NULL;
  3283. dp_verbose_debug("Raw frame %pK", vdev);
  3284. goto send_multiple;
  3285. }
  3286. if (qdf_unlikely(vdev->nawds_enabled)) {
  3287. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  3288. qdf_nbuf_data(nbuf);
  3289. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  3290. uint16_t sa_peer_id = DP_INVALID_PEER;
  3291. if (!soc->ast_offload_support) {
  3292. struct dp_ast_entry *ast_entry = NULL;
  3293. qdf_spin_lock_bh(&soc->ast_lock);
  3294. ast_entry = dp_peer_ast_hash_find_by_pdevid
  3295. (soc,
  3296. (uint8_t *)(eh->ether_shost),
  3297. vdev->pdev->pdev_id);
  3298. if (ast_entry)
  3299. sa_peer_id = ast_entry->peer_id;
  3300. qdf_spin_unlock_bh(&soc->ast_lock);
  3301. }
  3302. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  3303. sa_peer_id);
  3304. }
  3305. peer_id = DP_INVALID_PEER;
  3306. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  3307. 1, qdf_nbuf_len(nbuf));
  3308. }
  3309. send_single:
  3310. /* Single linear frame */
  3311. /*
  3312. * If nbuf is a simple linear frame, use send_single function to
  3313. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3314. * SRNG. There is no need to setup a MSDU extension descriptor.
  3315. */
  3316. dp_tx_prefetch_nbuf_data(nbuf);
  3317. nbuf = dp_tx_send_msdu_single_wrapper(vdev, nbuf, &msdu_info,
  3318. peer_id, end_nbuf);
  3319. return nbuf;
  3320. send_multiple:
  3321. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3322. if (qdf_unlikely(nbuf && msdu_info.frm_type == dp_tx_frm_raw))
  3323. dp_tx_raw_prepare_unset(vdev->pdev->soc, nbuf);
  3324. return nbuf;
  3325. }
  3326. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3327. uint8_t vdev_id, qdf_nbuf_t nbuf)
  3328. {
  3329. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3330. struct dp_vdev *vdev = NULL;
  3331. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3332. return nbuf;
  3333. /*
  3334. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3335. * this in per packet path.
  3336. *
  3337. * As in this path vdev memory is already protected with netdev
  3338. * tx lock
  3339. */
  3340. vdev = soc->vdev_id_map[vdev_id];
  3341. if (qdf_unlikely(!vdev))
  3342. return nbuf;
  3343. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3344. == QDF_STATUS_E_FAILURE)) {
  3345. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3346. return nbuf;
  3347. }
  3348. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3349. }
  3350. #ifdef UMAC_SUPPORT_PROXY_ARP
  3351. /**
  3352. * dp_tx_proxy_arp() - Tx proxy arp handler
  3353. * @vdev: datapath vdev handle
  3354. * @nbuf: sk buffer
  3355. *
  3356. * Return: status
  3357. */
  3358. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3359. {
  3360. if (vdev->osif_proxy_arp)
  3361. return vdev->osif_proxy_arp(vdev->osif_vdev, nbuf);
  3362. /*
  3363. * when UMAC_SUPPORT_PROXY_ARP is defined, we expect
  3364. * osif_proxy_arp has a valid function pointer assigned
  3365. * to it
  3366. */
  3367. dp_tx_err("valid function pointer for osif_proxy_arp is expected!!\n");
  3368. return QDF_STATUS_NOT_INITIALIZED;
  3369. }
  3370. #else
  3371. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3372. {
  3373. return QDF_STATUS_SUCCESS;
  3374. }
  3375. #endif
  3376. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  3377. !defined(CONFIG_MLO_SINGLE_DEV)
  3378. #ifdef WLAN_MCAST_MLO
  3379. static bool
  3380. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3381. struct dp_tx_desc_s *tx_desc,
  3382. qdf_nbuf_t nbuf,
  3383. uint8_t reinject_reason)
  3384. {
  3385. if (reinject_reason == HTT_TX_FW2WBM_REINJECT_REASON_MLO_MCAST) {
  3386. if (soc->arch_ops.dp_tx_mcast_handler)
  3387. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, nbuf);
  3388. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3389. return true;
  3390. }
  3391. return false;
  3392. }
  3393. #else /* WLAN_MCAST_MLO */
  3394. static inline bool
  3395. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3396. struct dp_tx_desc_s *tx_desc,
  3397. qdf_nbuf_t nbuf,
  3398. uint8_t reinject_reason)
  3399. {
  3400. return false;
  3401. }
  3402. #endif /* WLAN_MCAST_MLO */
  3403. #else
  3404. static inline bool
  3405. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3406. struct dp_tx_desc_s *tx_desc,
  3407. qdf_nbuf_t nbuf,
  3408. uint8_t reinject_reason)
  3409. {
  3410. return false;
  3411. }
  3412. #endif
  3413. void dp_tx_reinject_handler(struct dp_soc *soc,
  3414. struct dp_vdev *vdev,
  3415. struct dp_tx_desc_s *tx_desc,
  3416. uint8_t *status,
  3417. uint8_t reinject_reason)
  3418. {
  3419. struct dp_peer *peer = NULL;
  3420. uint32_t peer_id = HTT_INVALID_PEER;
  3421. qdf_nbuf_t nbuf = tx_desc->nbuf;
  3422. qdf_nbuf_t nbuf_copy = NULL;
  3423. struct dp_tx_msdu_info_s msdu_info;
  3424. #ifdef WDS_VENDOR_EXTENSION
  3425. int is_mcast = 0, is_ucast = 0;
  3426. int num_peers_3addr = 0;
  3427. qdf_ether_header_t *eth_hdr = (qdf_ether_header_t *)(qdf_nbuf_data(nbuf));
  3428. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  3429. #endif
  3430. struct dp_txrx_peer *txrx_peer;
  3431. qdf_assert(vdev);
  3432. dp_tx_debug("Tx reinject path");
  3433. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  3434. qdf_nbuf_len(tx_desc->nbuf));
  3435. if (dp_tx_reinject_mlo_hdl(soc, vdev, tx_desc, nbuf, reinject_reason))
  3436. return;
  3437. #ifdef WDS_VENDOR_EXTENSION
  3438. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  3439. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  3440. } else {
  3441. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  3442. }
  3443. is_ucast = !is_mcast;
  3444. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3445. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3446. txrx_peer = dp_get_txrx_peer(peer);
  3447. if (!txrx_peer || txrx_peer->bss_peer)
  3448. continue;
  3449. /* Detect wds peers that use 3-addr framing for mcast.
  3450. * if there are any, the bss_peer is used to send the
  3451. * the mcast frame using 3-addr format. all wds enabled
  3452. * peers that use 4-addr framing for mcast frames will
  3453. * be duplicated and sent as 4-addr frames below.
  3454. */
  3455. if (!txrx_peer->wds_enabled ||
  3456. !txrx_peer->wds_ecm.wds_tx_mcast_4addr) {
  3457. num_peers_3addr = 1;
  3458. break;
  3459. }
  3460. }
  3461. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3462. #endif
  3463. if (qdf_unlikely(vdev->mesh_vdev)) {
  3464. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  3465. } else {
  3466. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3467. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3468. txrx_peer = dp_get_txrx_peer(peer);
  3469. if (!txrx_peer)
  3470. continue;
  3471. if ((txrx_peer->peer_id != HTT_INVALID_PEER) &&
  3472. #ifdef WDS_VENDOR_EXTENSION
  3473. /*
  3474. * . if 3-addr STA, then send on BSS Peer
  3475. * . if Peer WDS enabled and accept 4-addr mcast,
  3476. * send mcast on that peer only
  3477. * . if Peer WDS enabled and accept 4-addr ucast,
  3478. * send ucast on that peer only
  3479. */
  3480. ((txrx_peer->bss_peer && num_peers_3addr && is_mcast) ||
  3481. (txrx_peer->wds_enabled &&
  3482. ((is_mcast && txrx_peer->wds_ecm.wds_tx_mcast_4addr) ||
  3483. (is_ucast &&
  3484. txrx_peer->wds_ecm.wds_tx_ucast_4addr))))) {
  3485. #else
  3486. (txrx_peer->bss_peer &&
  3487. (dp_tx_proxy_arp(vdev, nbuf) == QDF_STATUS_SUCCESS))) {
  3488. #endif
  3489. peer_id = DP_INVALID_PEER;
  3490. nbuf_copy = qdf_nbuf_copy(nbuf);
  3491. if (!nbuf_copy) {
  3492. dp_tx_debug("nbuf copy failed");
  3493. break;
  3494. }
  3495. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  3496. dp_tx_get_queue(vdev, nbuf,
  3497. &msdu_info.tx_queue);
  3498. nbuf_copy = dp_tx_send_msdu_single(vdev,
  3499. nbuf_copy,
  3500. &msdu_info,
  3501. peer_id,
  3502. NULL);
  3503. if (nbuf_copy) {
  3504. dp_tx_debug("pkt send failed");
  3505. qdf_nbuf_free(nbuf_copy);
  3506. }
  3507. }
  3508. }
  3509. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3510. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  3511. QDF_DMA_TO_DEVICE, nbuf->len);
  3512. qdf_nbuf_free(nbuf);
  3513. }
  3514. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3515. }
  3516. void dp_tx_inspect_handler(struct dp_soc *soc,
  3517. struct dp_vdev *vdev,
  3518. struct dp_tx_desc_s *tx_desc,
  3519. uint8_t *status)
  3520. {
  3521. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3522. "%s Tx inspect path",
  3523. __func__);
  3524. DP_STATS_INC_PKT(vdev, tx_i.inspect_pkts, 1,
  3525. qdf_nbuf_len(tx_desc->nbuf));
  3526. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  3527. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3528. }
  3529. #ifdef MESH_MODE_SUPPORT
  3530. /**
  3531. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  3532. * in mesh meta header
  3533. * @tx_desc: software descriptor head pointer
  3534. * @ts: pointer to tx completion stats
  3535. * Return: none
  3536. */
  3537. static
  3538. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3539. struct hal_tx_completion_status *ts)
  3540. {
  3541. qdf_nbuf_t netbuf = tx_desc->nbuf;
  3542. if (!tx_desc->msdu_ext_desc) {
  3543. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  3544. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3545. "netbuf %pK offset %d",
  3546. netbuf, tx_desc->pkt_offset);
  3547. return;
  3548. }
  3549. }
  3550. }
  3551. #else
  3552. static
  3553. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3554. struct hal_tx_completion_status *ts)
  3555. {
  3556. }
  3557. #endif
  3558. #ifdef CONFIG_SAWF
  3559. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3560. struct dp_vdev *vdev,
  3561. struct dp_txrx_peer *txrx_peer,
  3562. struct dp_tx_desc_s *tx_desc,
  3563. struct hal_tx_completion_status *ts,
  3564. uint8_t tid)
  3565. {
  3566. dp_sawf_tx_compl_update_peer_stats(soc, vdev, txrx_peer, tx_desc,
  3567. ts, tid);
  3568. }
  3569. static void dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3570. uint32_t nw_delay,
  3571. uint32_t sw_delay,
  3572. uint32_t hw_delay)
  3573. {
  3574. dp_peer_tid_delay_avg(tx_delay,
  3575. nw_delay,
  3576. sw_delay,
  3577. hw_delay);
  3578. }
  3579. #else
  3580. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3581. struct dp_vdev *vdev,
  3582. struct dp_txrx_peer *txrx_peer,
  3583. struct dp_tx_desc_s *tx_desc,
  3584. struct hal_tx_completion_status *ts,
  3585. uint8_t tid)
  3586. {
  3587. }
  3588. static inline void
  3589. dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3590. uint32_t nw_delay, uint32_t sw_delay,
  3591. uint32_t hw_delay)
  3592. {
  3593. }
  3594. #endif
  3595. #ifdef QCA_PEER_EXT_STATS
  3596. #ifdef WLAN_CONFIG_TX_DELAY
  3597. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3598. struct dp_tx_desc_s *tx_desc,
  3599. struct hal_tx_completion_status *ts,
  3600. struct dp_vdev *vdev)
  3601. {
  3602. struct dp_soc *soc = vdev->pdev->soc;
  3603. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3604. int64_t timestamp_ingress, timestamp_hw_enqueue;
  3605. uint32_t sw_enqueue_delay, fwhw_transmit_delay = 0;
  3606. if (!ts->valid)
  3607. return;
  3608. timestamp_ingress = qdf_nbuf_get_timestamp_us(tx_desc->nbuf);
  3609. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3610. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3611. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3612. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3613. if (!soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3614. &fwhw_transmit_delay))
  3615. dp_hist_update_stats(&tx_delay->hwtx_delay,
  3616. fwhw_transmit_delay);
  3617. dp_tx_compute_delay_avg(tx_delay, 0, sw_enqueue_delay,
  3618. fwhw_transmit_delay);
  3619. }
  3620. #else
  3621. /**
  3622. * dp_tx_compute_tid_delay() - Compute per TID delay
  3623. * @stats: Per TID delay stats
  3624. * @tx_desc: Software Tx descriptor
  3625. * @ts: Tx completion status
  3626. * @vdev: vdev
  3627. *
  3628. * Compute the software enqueue and hw enqueue delays and
  3629. * update the respective histograms
  3630. *
  3631. * Return: void
  3632. */
  3633. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3634. struct dp_tx_desc_s *tx_desc,
  3635. struct hal_tx_completion_status *ts,
  3636. struct dp_vdev *vdev)
  3637. {
  3638. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3639. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3640. uint32_t sw_enqueue_delay, fwhw_transmit_delay;
  3641. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3642. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3643. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3644. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3645. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3646. timestamp_hw_enqueue);
  3647. /*
  3648. * Update the Tx software enqueue delay and HW enque-Completion delay.
  3649. */
  3650. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3651. dp_hist_update_stats(&tx_delay->hwtx_delay, fwhw_transmit_delay);
  3652. }
  3653. #endif
  3654. /**
  3655. * dp_tx_update_peer_delay_stats() - Update the peer delay stats
  3656. * @txrx_peer: DP peer context
  3657. * @tx_desc: Tx software descriptor
  3658. * @ts: Tx completion status
  3659. * @ring_id: Rx CPU context ID/CPU_ID
  3660. *
  3661. * Update the peer extended stats. These are enhanced other
  3662. * delay stats per msdu level.
  3663. *
  3664. * Return: void
  3665. */
  3666. static void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3667. struct dp_tx_desc_s *tx_desc,
  3668. struct hal_tx_completion_status *ts,
  3669. uint8_t ring_id)
  3670. {
  3671. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3672. struct dp_soc *soc = NULL;
  3673. struct dp_peer_delay_stats *delay_stats = NULL;
  3674. uint8_t tid;
  3675. soc = pdev->soc;
  3676. if (qdf_likely(!wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)))
  3677. return;
  3678. if (!txrx_peer->delay_stats)
  3679. return;
  3680. tid = ts->tid;
  3681. delay_stats = txrx_peer->delay_stats;
  3682. /*
  3683. * For non-TID packets use the TID 9
  3684. */
  3685. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3686. tid = CDP_MAX_DATA_TIDS - 1;
  3687. dp_tx_compute_tid_delay(&delay_stats->delay_tid_stats[tid][ring_id],
  3688. tx_desc, ts, txrx_peer->vdev);
  3689. }
  3690. #else
  3691. static inline
  3692. void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3693. struct dp_tx_desc_s *tx_desc,
  3694. struct hal_tx_completion_status *ts,
  3695. uint8_t ring_id)
  3696. {
  3697. }
  3698. #endif
  3699. #ifdef WLAN_PEER_JITTER
  3700. /**
  3701. * dp_tx_jitter_get_avg_jitter() - compute the average jitter
  3702. * @curr_delay: Current delay
  3703. * @prev_delay: Previous delay
  3704. * @avg_jitter: Average Jitter
  3705. * Return: Newly Computed Average Jitter
  3706. */
  3707. static uint32_t dp_tx_jitter_get_avg_jitter(uint32_t curr_delay,
  3708. uint32_t prev_delay,
  3709. uint32_t avg_jitter)
  3710. {
  3711. uint32_t curr_jitter;
  3712. int32_t jitter_diff;
  3713. curr_jitter = qdf_abs(curr_delay - prev_delay);
  3714. if (!avg_jitter)
  3715. return curr_jitter;
  3716. jitter_diff = curr_jitter - avg_jitter;
  3717. if (jitter_diff < 0)
  3718. avg_jitter = avg_jitter -
  3719. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3720. else
  3721. avg_jitter = avg_jitter +
  3722. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3723. return avg_jitter;
  3724. }
  3725. /**
  3726. * dp_tx_jitter_get_avg_delay() - compute the average delay
  3727. * @curr_delay: Current delay
  3728. * @avg_delay: Average delay
  3729. * Return: Newly Computed Average Delay
  3730. */
  3731. static uint32_t dp_tx_jitter_get_avg_delay(uint32_t curr_delay,
  3732. uint32_t avg_delay)
  3733. {
  3734. int32_t delay_diff;
  3735. if (!avg_delay)
  3736. return curr_delay;
  3737. delay_diff = curr_delay - avg_delay;
  3738. if (delay_diff < 0)
  3739. avg_delay = avg_delay - (qdf_abs(delay_diff) >>
  3740. DP_AVG_DELAY_WEIGHT_DENOM);
  3741. else
  3742. avg_delay = avg_delay + (qdf_abs(delay_diff) >>
  3743. DP_AVG_DELAY_WEIGHT_DENOM);
  3744. return avg_delay;
  3745. }
  3746. #ifdef WLAN_CONFIG_TX_DELAY
  3747. /**
  3748. * dp_tx_compute_cur_delay() - get the current delay
  3749. * @soc: soc handle
  3750. * @vdev: vdev structure for data path state
  3751. * @ts: Tx completion status
  3752. * @curr_delay: current delay
  3753. * @tx_desc: tx descriptor
  3754. * Return: void
  3755. */
  3756. static
  3757. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3758. struct dp_vdev *vdev,
  3759. struct hal_tx_completion_status *ts,
  3760. uint32_t *curr_delay,
  3761. struct dp_tx_desc_s *tx_desc)
  3762. {
  3763. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3764. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3765. status = soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3766. curr_delay);
  3767. return status;
  3768. }
  3769. #else
  3770. static
  3771. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3772. struct dp_vdev *vdev,
  3773. struct hal_tx_completion_status *ts,
  3774. uint32_t *curr_delay,
  3775. struct dp_tx_desc_s *tx_desc)
  3776. {
  3777. int64_t current_timestamp, timestamp_hw_enqueue;
  3778. current_timestamp = qdf_ktime_to_us(qdf_ktime_real_get());
  3779. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3780. *curr_delay = (uint32_t)(current_timestamp - timestamp_hw_enqueue);
  3781. return QDF_STATUS_SUCCESS;
  3782. }
  3783. #endif
  3784. /**
  3785. * dp_tx_compute_tid_jitter() - compute per tid per ring jitter
  3786. * @jitter: per tid per ring jitter stats
  3787. * @ts: Tx completion status
  3788. * @vdev: vdev structure for data path state
  3789. * @tx_desc: tx descriptor
  3790. * Return: void
  3791. */
  3792. static void dp_tx_compute_tid_jitter(struct cdp_peer_tid_stats *jitter,
  3793. struct hal_tx_completion_status *ts,
  3794. struct dp_vdev *vdev,
  3795. struct dp_tx_desc_s *tx_desc)
  3796. {
  3797. uint32_t curr_delay, avg_delay, avg_jitter, prev_delay;
  3798. struct dp_soc *soc = vdev->pdev->soc;
  3799. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3800. if (ts->status != HAL_TX_TQM_RR_FRAME_ACKED) {
  3801. jitter->tx_drop += 1;
  3802. return;
  3803. }
  3804. status = dp_tx_compute_cur_delay(soc, vdev, ts, &curr_delay,
  3805. tx_desc);
  3806. if (QDF_IS_STATUS_SUCCESS(status)) {
  3807. avg_delay = jitter->tx_avg_delay;
  3808. avg_jitter = jitter->tx_avg_jitter;
  3809. prev_delay = jitter->tx_prev_delay;
  3810. avg_jitter = dp_tx_jitter_get_avg_jitter(curr_delay,
  3811. prev_delay,
  3812. avg_jitter);
  3813. avg_delay = dp_tx_jitter_get_avg_delay(curr_delay, avg_delay);
  3814. jitter->tx_avg_delay = avg_delay;
  3815. jitter->tx_avg_jitter = avg_jitter;
  3816. jitter->tx_prev_delay = curr_delay;
  3817. jitter->tx_total_success += 1;
  3818. } else if (status == QDF_STATUS_E_FAILURE) {
  3819. jitter->tx_avg_err += 1;
  3820. }
  3821. }
  3822. /* dp_tx_update_peer_jitter_stats() - Update the peer jitter stats
  3823. * @txrx_peer: DP peer context
  3824. * @tx_desc: Tx software descriptor
  3825. * @ts: Tx completion status
  3826. * @ring_id: Rx CPU context ID/CPU_ID
  3827. * Return: void
  3828. */
  3829. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3830. struct dp_tx_desc_s *tx_desc,
  3831. struct hal_tx_completion_status *ts,
  3832. uint8_t ring_id)
  3833. {
  3834. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3835. struct dp_soc *soc = pdev->soc;
  3836. struct cdp_peer_tid_stats *jitter_stats = NULL;
  3837. uint8_t tid;
  3838. struct cdp_peer_tid_stats *rx_tid = NULL;
  3839. if (qdf_likely(!wlan_cfg_is_peer_jitter_stats_enabled(soc->wlan_cfg_ctx)))
  3840. return;
  3841. if (!txrx_peer->jitter_stats)
  3842. return;
  3843. tid = ts->tid;
  3844. jitter_stats = txrx_peer->jitter_stats;
  3845. /*
  3846. * For non-TID packets use the TID 9
  3847. */
  3848. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3849. tid = CDP_MAX_DATA_TIDS - 1;
  3850. rx_tid = &jitter_stats[tid * CDP_MAX_TXRX_CTX + ring_id];
  3851. dp_tx_compute_tid_jitter(rx_tid,
  3852. ts, txrx_peer->vdev, tx_desc);
  3853. }
  3854. #else
  3855. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3856. struct dp_tx_desc_s *tx_desc,
  3857. struct hal_tx_completion_status *ts,
  3858. uint8_t ring_id)
  3859. {
  3860. }
  3861. #endif
  3862. #ifdef HW_TX_DELAY_STATS_ENABLE
  3863. /**
  3864. * dp_update_tx_delay_stats() - update the delay stats
  3865. * @vdev: vdev handle
  3866. * @delay: delay in ms or us based on the flag delay_in_us
  3867. * @tid: tid value
  3868. * @mode: type of tx delay mode
  3869. * @ring_id: ring number
  3870. * @delay_in_us: flag to indicate whether the delay is in ms or us
  3871. *
  3872. * Return: none
  3873. */
  3874. static inline
  3875. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3876. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3877. {
  3878. struct cdp_tid_tx_stats *tstats =
  3879. &vdev->stats.tid_tx_stats[ring_id][tid];
  3880. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3881. delay_in_us);
  3882. }
  3883. #else
  3884. static inline
  3885. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3886. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3887. {
  3888. struct cdp_tid_tx_stats *tstats =
  3889. &vdev->pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  3890. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3891. delay_in_us);
  3892. }
  3893. #endif
  3894. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  3895. uint8_t tid, uint8_t ring_id)
  3896. {
  3897. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3898. uint32_t sw_enqueue_delay, fwhw_transmit_delay, interframe_delay;
  3899. uint32_t fwhw_transmit_delay_us;
  3900. if (qdf_likely(!vdev->pdev->delay_stats_flag) &&
  3901. qdf_likely(!dp_is_vdev_tx_delay_stats_enabled(vdev)))
  3902. return;
  3903. if (dp_is_vdev_tx_delay_stats_enabled(vdev)) {
  3904. fwhw_transmit_delay_us =
  3905. qdf_ktime_to_us(qdf_ktime_real_get()) -
  3906. qdf_ktime_to_us(tx_desc->timestamp);
  3907. /*
  3908. * Delay between packet enqueued to HW and Tx completion in us
  3909. */
  3910. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay_us, tid,
  3911. CDP_DELAY_STATS_FW_HW_TRANSMIT,
  3912. ring_id, true);
  3913. /*
  3914. * For MCL, only enqueue to completion delay is required
  3915. * so return if the vdev flag is enabled.
  3916. */
  3917. return;
  3918. }
  3919. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3920. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3921. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3922. timestamp_hw_enqueue);
  3923. if (!timestamp_hw_enqueue)
  3924. return;
  3925. /*
  3926. * Delay between packet enqueued to HW and Tx completion in ms
  3927. */
  3928. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay, tid,
  3929. CDP_DELAY_STATS_FW_HW_TRANSMIT, ring_id,
  3930. false);
  3931. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3932. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3933. interframe_delay = (uint32_t)(timestamp_ingress -
  3934. vdev->prev_tx_enq_tstamp);
  3935. /*
  3936. * Delay in software enqueue
  3937. */
  3938. dp_update_tx_delay_stats(vdev, sw_enqueue_delay, tid,
  3939. CDP_DELAY_STATS_SW_ENQ, ring_id,
  3940. false);
  3941. /*
  3942. * Update interframe delay stats calculated at hardstart receive point.
  3943. * Value of vdev->prev_tx_enq_tstamp will be 0 for 1st frame, so
  3944. * interframe delay will not be calculate correctly for 1st frame.
  3945. * On the other side, this will help in avoiding extra per packet check
  3946. * of !vdev->prev_tx_enq_tstamp.
  3947. */
  3948. dp_update_tx_delay_stats(vdev, interframe_delay, tid,
  3949. CDP_DELAY_STATS_TX_INTERFRAME, ring_id,
  3950. false);
  3951. vdev->prev_tx_enq_tstamp = timestamp_ingress;
  3952. }
  3953. #ifdef DISABLE_DP_STATS
  3954. static
  3955. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf,
  3956. struct dp_txrx_peer *txrx_peer,
  3957. uint8_t link_id)
  3958. {
  3959. }
  3960. #else
  3961. static inline void
  3962. dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_txrx_peer *txrx_peer,
  3963. uint8_t link_id)
  3964. {
  3965. enum qdf_proto_subtype subtype = QDF_PROTO_INVALID;
  3966. DPTRACE(qdf_dp_track_noack_check(nbuf, &subtype));
  3967. if (subtype != QDF_PROTO_INVALID)
  3968. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.no_ack_count[subtype],
  3969. 1, link_id);
  3970. }
  3971. #endif
  3972. #ifndef QCA_ENHANCED_STATS_SUPPORT
  3973. #ifdef DP_PEER_EXTENDED_API
  3974. static inline uint8_t
  3975. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3976. {
  3977. return txrx_peer->mpdu_retry_threshold;
  3978. }
  3979. #else
  3980. static inline uint8_t
  3981. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3982. {
  3983. return 0;
  3984. }
  3985. #endif
  3986. /**
  3987. * dp_tx_update_peer_extd_stats()- Update Tx extended path stats for peer
  3988. *
  3989. * @ts: Tx compltion status
  3990. * @txrx_peer: datapath txrx_peer handle
  3991. * @link_id: Link id
  3992. *
  3993. * Return: void
  3994. */
  3995. static inline void
  3996. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  3997. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  3998. {
  3999. uint8_t mcs, pkt_type, dst_mcs_idx;
  4000. uint8_t retry_threshold = dp_tx_get_mpdu_retry_threshold(txrx_peer);
  4001. mcs = ts->mcs;
  4002. pkt_type = ts->pkt_type;
  4003. /* do HW to SW pkt type conversion */
  4004. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  4005. hal_2_dp_pkt_type_map[pkt_type]);
  4006. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  4007. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  4008. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4009. tx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  4010. 1, link_id);
  4011. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.sgi_count[ts->sgi], 1, link_id);
  4012. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.bw[ts->bw], 1, link_id);
  4013. DP_PEER_EXTD_STATS_UPD(txrx_peer, tx.last_ack_rssi, ts->ack_frame_rssi,
  4014. link_id);
  4015. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4016. tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1,
  4017. link_id);
  4018. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.stbc, 1, ts->stbc, link_id);
  4019. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.ldpc, 1, ts->ldpc, link_id);
  4020. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries, 1, ts->transmit_cnt > 1,
  4021. link_id);
  4022. if (ts->first_msdu) {
  4023. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries_mpdu, 1,
  4024. ts->transmit_cnt > 1, link_id);
  4025. if (!retry_threshold)
  4026. return;
  4027. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.mpdu_success_with_retries,
  4028. qdf_do_div(ts->transmit_cnt,
  4029. retry_threshold),
  4030. ts->transmit_cnt > retry_threshold,
  4031. link_id);
  4032. }
  4033. }
  4034. #else
  4035. static inline void
  4036. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  4037. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  4038. {
  4039. }
  4040. #endif
  4041. #if defined(WLAN_FEATURE_11BE_MLO) && \
  4042. (defined(QCA_ENHANCED_STATS_SUPPORT) || \
  4043. defined(DP_MLO_LINK_STATS_SUPPORT))
  4044. static inline uint8_t
  4045. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4046. struct hal_tx_completion_status *ts,
  4047. struct dp_txrx_peer *txrx_peer,
  4048. struct dp_vdev *vdev)
  4049. {
  4050. uint8_t hw_link_id = 0;
  4051. uint32_t ppdu_id;
  4052. uint8_t link_id_offset, link_id_bits;
  4053. if (!txrx_peer->is_mld_peer || !vdev->pdev->link_peer_stats)
  4054. return 0;
  4055. link_id_offset = soc->link_id_offset;
  4056. link_id_bits = soc->link_id_bits;
  4057. ppdu_id = ts->ppdu_id;
  4058. hw_link_id = ((DP_GET_HW_LINK_ID_FRM_PPDU_ID(ppdu_id, link_id_offset,
  4059. link_id_bits)) + 1);
  4060. if (hw_link_id > DP_MAX_MLO_LINKS) {
  4061. hw_link_id = 0;
  4062. DP_PEER_PER_PKT_STATS_INC(
  4063. txrx_peer,
  4064. tx.inval_link_id_pkt_cnt, 1, hw_link_id);
  4065. }
  4066. return hw_link_id;
  4067. }
  4068. #else
  4069. static inline uint8_t
  4070. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4071. struct hal_tx_completion_status *ts,
  4072. struct dp_txrx_peer *txrx_peer,
  4073. struct dp_vdev *vdev)
  4074. {
  4075. return 0;
  4076. }
  4077. #endif
  4078. /**
  4079. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  4080. * per wbm ring
  4081. *
  4082. * @tx_desc: software descriptor head pointer
  4083. * @ts: Tx completion status
  4084. * @txrx_peer: peer handle
  4085. * @ring_id: ring number
  4086. * @link_id: Link id
  4087. *
  4088. * Return: None
  4089. */
  4090. static inline void
  4091. dp_tx_update_peer_stats(struct dp_tx_desc_s *tx_desc,
  4092. struct hal_tx_completion_status *ts,
  4093. struct dp_txrx_peer *txrx_peer, uint8_t ring_id,
  4094. uint8_t link_id)
  4095. {
  4096. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  4097. uint8_t tid = ts->tid;
  4098. uint32_t length;
  4099. struct cdp_tid_tx_stats *tid_stats;
  4100. if (!pdev)
  4101. return;
  4102. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  4103. tid = CDP_MAX_DATA_TIDS - 1;
  4104. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  4105. if (ts->release_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) {
  4106. dp_err_rl("Release source:%d is not from TQM", ts->release_src);
  4107. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.release_src_not_tqm, 1,
  4108. link_id);
  4109. return;
  4110. }
  4111. length = qdf_nbuf_len(tx_desc->nbuf);
  4112. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4113. if (qdf_unlikely(pdev->delay_stats_flag) ||
  4114. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(txrx_peer->vdev)))
  4115. dp_tx_compute_delay(txrx_peer->vdev, tx_desc, tid, ring_id);
  4116. if (ts->status < CDP_MAX_TX_TQM_STATUS) {
  4117. tid_stats->tqm_status_cnt[ts->status]++;
  4118. }
  4119. if (qdf_likely(ts->status == HAL_TX_TQM_RR_FRAME_ACKED)) {
  4120. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.retry_count, 1,
  4121. ts->transmit_cnt > 1, link_id);
  4122. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.multiple_retry_count,
  4123. 1, ts->transmit_cnt > 2, link_id);
  4124. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.ofdma, 1, ts->ofdma,
  4125. link_id);
  4126. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.amsdu_cnt, 1,
  4127. ts->msdu_part_of_amsdu, link_id);
  4128. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.non_amsdu_cnt, 1,
  4129. !ts->msdu_part_of_amsdu, link_id);
  4130. txrx_peer->stats[link_id].per_pkt_stats.tx.last_tx_ts =
  4131. qdf_system_ticks();
  4132. dp_tx_update_peer_extd_stats(ts, txrx_peer, link_id);
  4133. return;
  4134. }
  4135. /*
  4136. * tx_failed is ideally supposed to be updated from HTT ppdu
  4137. * completion stats. But in IPQ807X/IPQ6018 chipsets owing to
  4138. * hw limitation there are no completions for failed cases.
  4139. * Hence updating tx_failed from data path. Please note that
  4140. * if tx_failed is fixed to be from ppdu, then this has to be
  4141. * removed
  4142. */
  4143. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4144. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.failed_retry_count, 1,
  4145. ts->transmit_cnt > DP_RETRY_COUNT,
  4146. link_id);
  4147. dp_update_no_ack_stats(tx_desc->nbuf, txrx_peer, link_id);
  4148. if (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED) {
  4149. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.age_out, 1,
  4150. link_id);
  4151. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_REM) {
  4152. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.dropped.fw_rem, 1,
  4153. length, link_id);
  4154. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX) {
  4155. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_notx, 1,
  4156. link_id);
  4157. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TX) {
  4158. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_tx, 1,
  4159. link_id);
  4160. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON1) {
  4161. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason1, 1,
  4162. link_id);
  4163. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON2) {
  4164. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason2, 1,
  4165. link_id);
  4166. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON3) {
  4167. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason3, 1,
  4168. link_id);
  4169. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_DISABLE_QUEUE) {
  4170. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4171. tx.dropped.fw_rem_queue_disable, 1,
  4172. link_id);
  4173. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TILL_NONMATCHING) {
  4174. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4175. tx.dropped.fw_rem_no_match, 1,
  4176. link_id);
  4177. } else if (ts->status == HAL_TX_TQM_RR_DROP_THRESHOLD) {
  4178. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4179. tx.dropped.drop_threshold, 1,
  4180. link_id);
  4181. } else if (ts->status == HAL_TX_TQM_RR_LINK_DESC_UNAVAILABLE) {
  4182. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4183. tx.dropped.drop_link_desc_na, 1,
  4184. link_id);
  4185. } else if (ts->status == HAL_TX_TQM_RR_DROP_OR_INVALID_MSDU) {
  4186. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4187. tx.dropped.invalid_drop, 1,
  4188. link_id);
  4189. } else if (ts->status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4190. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4191. tx.dropped.mcast_vdev_drop, 1,
  4192. link_id);
  4193. } else {
  4194. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.invalid_rr, 1,
  4195. link_id);
  4196. }
  4197. }
  4198. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4199. /**
  4200. * dp_tx_flow_pool_lock() - take flow pool lock
  4201. * @soc: core txrx main context
  4202. * @tx_desc: tx desc
  4203. *
  4204. * Return: None
  4205. */
  4206. static inline
  4207. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  4208. struct dp_tx_desc_s *tx_desc)
  4209. {
  4210. struct dp_tx_desc_pool_s *pool;
  4211. uint8_t desc_pool_id;
  4212. desc_pool_id = tx_desc->pool_id;
  4213. pool = &soc->tx_desc[desc_pool_id];
  4214. qdf_spin_lock_bh(&pool->flow_pool_lock);
  4215. }
  4216. /**
  4217. * dp_tx_flow_pool_unlock() - release flow pool lock
  4218. * @soc: core txrx main context
  4219. * @tx_desc: tx desc
  4220. *
  4221. * Return: None
  4222. */
  4223. static inline
  4224. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  4225. struct dp_tx_desc_s *tx_desc)
  4226. {
  4227. struct dp_tx_desc_pool_s *pool;
  4228. uint8_t desc_pool_id;
  4229. desc_pool_id = tx_desc->pool_id;
  4230. pool = &soc->tx_desc[desc_pool_id];
  4231. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  4232. }
  4233. #else
  4234. static inline
  4235. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4236. {
  4237. }
  4238. static inline
  4239. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4240. {
  4241. }
  4242. #endif
  4243. /**
  4244. * dp_tx_notify_completion() - Notify tx completion for this desc
  4245. * @soc: core txrx main context
  4246. * @vdev: datapath vdev handle
  4247. * @tx_desc: tx desc
  4248. * @netbuf: buffer
  4249. * @status: tx status
  4250. *
  4251. * Return: none
  4252. */
  4253. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  4254. struct dp_vdev *vdev,
  4255. struct dp_tx_desc_s *tx_desc,
  4256. qdf_nbuf_t netbuf,
  4257. uint8_t status)
  4258. {
  4259. void *osif_dev;
  4260. ol_txrx_completion_fp tx_compl_cbk = NULL;
  4261. uint16_t flag = BIT(QDF_TX_RX_STATUS_DOWNLOAD_SUCC);
  4262. qdf_assert(tx_desc);
  4263. if (!vdev ||
  4264. !vdev->osif_vdev) {
  4265. return;
  4266. }
  4267. osif_dev = vdev->osif_vdev;
  4268. tx_compl_cbk = vdev->tx_comp;
  4269. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4270. flag |= BIT(QDF_TX_RX_STATUS_OK);
  4271. if (tx_compl_cbk)
  4272. tx_compl_cbk(netbuf, osif_dev, flag);
  4273. }
  4274. /**
  4275. * dp_tx_sojourn_stats_process() - Collect sojourn stats
  4276. * @pdev: pdev handle
  4277. * @txrx_peer: DP peer context
  4278. * @tid: tid value
  4279. * @txdesc_ts: timestamp from txdesc
  4280. * @ppdu_id: ppdu id
  4281. * @link_id: link id
  4282. *
  4283. * Return: none
  4284. */
  4285. #ifdef FEATURE_PERPKT_INFO
  4286. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4287. struct dp_txrx_peer *txrx_peer,
  4288. uint8_t tid,
  4289. uint64_t txdesc_ts,
  4290. uint32_t ppdu_id,
  4291. uint8_t link_id)
  4292. {
  4293. uint64_t delta_ms;
  4294. struct cdp_tx_sojourn_stats *sojourn_stats;
  4295. struct dp_peer *primary_link_peer = NULL;
  4296. struct dp_soc *link_peer_soc = NULL;
  4297. if (qdf_unlikely(!pdev->enhanced_stats_en))
  4298. return;
  4299. if (qdf_unlikely(tid == HTT_INVALID_TID ||
  4300. tid >= CDP_DATA_TID_MAX))
  4301. return;
  4302. if (qdf_unlikely(!pdev->sojourn_buf))
  4303. return;
  4304. primary_link_peer = dp_get_primary_link_peer_by_id(pdev->soc,
  4305. txrx_peer->peer_id,
  4306. DP_MOD_ID_TX_COMP);
  4307. if (qdf_unlikely(!primary_link_peer))
  4308. return;
  4309. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  4310. qdf_nbuf_data(pdev->sojourn_buf);
  4311. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  4312. sojourn_stats->cookie = (void *)
  4313. dp_monitor_peer_get_peerstats_ctx(link_peer_soc,
  4314. primary_link_peer);
  4315. delta_ms = qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4316. txdesc_ts;
  4317. qdf_ewma_tx_lag_add(&txrx_peer->stats[link_id].per_pkt_stats.tx.avg_sojourn_msdu[tid],
  4318. delta_ms);
  4319. sojourn_stats->sum_sojourn_msdu[tid] = delta_ms;
  4320. sojourn_stats->num_msdus[tid] = 1;
  4321. sojourn_stats->avg_sojourn_msdu[tid].internal =
  4322. txrx_peer->stats[link_id].
  4323. per_pkt_stats.tx.avg_sojourn_msdu[tid].internal;
  4324. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  4325. pdev->sojourn_buf, HTT_INVALID_PEER,
  4326. WDI_NO_VAL, pdev->pdev_id);
  4327. sojourn_stats->sum_sojourn_msdu[tid] = 0;
  4328. sojourn_stats->num_msdus[tid] = 0;
  4329. sojourn_stats->avg_sojourn_msdu[tid].internal = 0;
  4330. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_TX_COMP);
  4331. }
  4332. #else
  4333. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4334. struct dp_txrx_peer *txrx_peer,
  4335. uint8_t tid,
  4336. uint64_t txdesc_ts,
  4337. uint32_t ppdu_id)
  4338. {
  4339. }
  4340. #endif
  4341. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  4342. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  4343. struct dp_tx_desc_s *desc,
  4344. struct hal_tx_completion_status *ts)
  4345. {
  4346. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_TX_DATA, soc,
  4347. desc, ts->peer_id,
  4348. WDI_NO_VAL, desc->pdev->pdev_id);
  4349. }
  4350. #endif
  4351. void
  4352. dp_tx_comp_process_desc(struct dp_soc *soc,
  4353. struct dp_tx_desc_s *desc,
  4354. struct hal_tx_completion_status *ts,
  4355. struct dp_txrx_peer *txrx_peer)
  4356. {
  4357. uint64_t time_latency = 0;
  4358. uint16_t peer_id = DP_INVALID_PEER_ID;
  4359. /*
  4360. * m_copy/tx_capture modes are not supported for
  4361. * scatter gather packets
  4362. */
  4363. if (qdf_unlikely(!!desc->pdev->latency_capture_enable)) {
  4364. time_latency = (qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4365. qdf_ktime_to_ms(desc->timestamp));
  4366. }
  4367. dp_send_completion_to_pkt_capture(soc, desc, ts);
  4368. if (dp_tx_pkt_tracepoints_enabled())
  4369. qdf_trace_dp_packet(desc->nbuf, QDF_TX,
  4370. desc->msdu_ext_desc ?
  4371. desc->msdu_ext_desc->tso_desc : NULL,
  4372. qdf_ktime_to_us(desc->timestamp));
  4373. if (!(desc->msdu_ext_desc)) {
  4374. dp_tx_enh_unmap(soc, desc);
  4375. if (txrx_peer)
  4376. peer_id = txrx_peer->peer_id;
  4377. if (QDF_STATUS_SUCCESS ==
  4378. dp_monitor_tx_add_to_comp_queue(soc, desc, ts, peer_id)) {
  4379. return;
  4380. }
  4381. if (QDF_STATUS_SUCCESS ==
  4382. dp_get_completion_indication_for_stack(soc,
  4383. desc->pdev,
  4384. txrx_peer, ts,
  4385. desc->nbuf,
  4386. time_latency)) {
  4387. dp_send_completion_to_stack(soc,
  4388. desc->pdev,
  4389. ts->peer_id,
  4390. ts->ppdu_id,
  4391. desc->nbuf);
  4392. return;
  4393. }
  4394. }
  4395. desc->flags |= DP_TX_DESC_FLAG_COMPLETED_TX;
  4396. dp_tx_comp_free_buf(soc, desc, false);
  4397. }
  4398. #ifdef DISABLE_DP_STATS
  4399. /**
  4400. * dp_tx_update_connectivity_stats() - update tx connectivity stats
  4401. * @soc: core txrx main context
  4402. * @vdev: virtual device instance
  4403. * @tx_desc: tx desc
  4404. * @status: tx status
  4405. *
  4406. * Return: none
  4407. */
  4408. static inline
  4409. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4410. struct dp_vdev *vdev,
  4411. struct dp_tx_desc_s *tx_desc,
  4412. uint8_t status)
  4413. {
  4414. }
  4415. #else
  4416. static inline
  4417. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4418. struct dp_vdev *vdev,
  4419. struct dp_tx_desc_s *tx_desc,
  4420. uint8_t status)
  4421. {
  4422. void *osif_dev;
  4423. ol_txrx_stats_rx_fp stats_cbk;
  4424. uint8_t pkt_type;
  4425. qdf_assert(tx_desc);
  4426. if (!vdev ||
  4427. !vdev->osif_vdev ||
  4428. !vdev->stats_cb)
  4429. return;
  4430. osif_dev = vdev->osif_vdev;
  4431. stats_cbk = vdev->stats_cb;
  4432. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_HOST_FW_SENT, &pkt_type);
  4433. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4434. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_ACK_CNT,
  4435. &pkt_type);
  4436. }
  4437. #endif
  4438. #if defined(WLAN_FEATURE_TSF_AUTO_REPORT) || defined(WLAN_CONFIG_TX_DELAY)
  4439. /* Mask for bit29 ~ bit31 */
  4440. #define DP_TX_TS_BIT29_31_MASK 0xE0000000
  4441. /* Timestamp value (unit us) if bit29 is set */
  4442. #define DP_TX_TS_BIT29_SET_VALUE BIT(29)
  4443. /**
  4444. * dp_tx_adjust_enqueue_buffer_ts() - adjust the enqueue buffer_timestamp
  4445. * @ack_ts: OTA ack timestamp, unit us.
  4446. * @enqueue_ts: TCL enqueue TX data to TQM timestamp, unit us.
  4447. * @base_delta_ts: base timestamp delta for ack_ts and enqueue_ts
  4448. *
  4449. * this function will restore the bit29 ~ bit31 3 bits value for
  4450. * buffer_timestamp in wbm2sw ring entry, currently buffer_timestamp only
  4451. * can support 0x7FFF * 1024 us (29 bits), but if the timestamp is >
  4452. * 0x7FFF * 1024 us, bit29~ bit31 will be lost.
  4453. *
  4454. * Return: the adjusted buffer_timestamp value
  4455. */
  4456. static inline
  4457. uint32_t dp_tx_adjust_enqueue_buffer_ts(uint32_t ack_ts,
  4458. uint32_t enqueue_ts,
  4459. uint32_t base_delta_ts)
  4460. {
  4461. uint32_t ack_buffer_ts;
  4462. uint32_t ack_buffer_ts_bit29_31;
  4463. uint32_t adjusted_enqueue_ts;
  4464. /* corresponding buffer_timestamp value when receive OTA Ack */
  4465. ack_buffer_ts = ack_ts - base_delta_ts;
  4466. ack_buffer_ts_bit29_31 = ack_buffer_ts & DP_TX_TS_BIT29_31_MASK;
  4467. /* restore the bit29 ~ bit31 value */
  4468. adjusted_enqueue_ts = ack_buffer_ts_bit29_31 | enqueue_ts;
  4469. /*
  4470. * if actual enqueue_ts value occupied 29 bits only, this enqueue_ts
  4471. * value + real UL delay overflow 29 bits, then 30th bit (bit-29)
  4472. * should not be marked, otherwise extra 0x20000000 us is added to
  4473. * enqueue_ts.
  4474. */
  4475. if (qdf_unlikely(adjusted_enqueue_ts > ack_buffer_ts))
  4476. adjusted_enqueue_ts -= DP_TX_TS_BIT29_SET_VALUE;
  4477. return adjusted_enqueue_ts;
  4478. }
  4479. QDF_STATUS
  4480. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  4481. uint32_t delta_tsf,
  4482. uint32_t *delay_us)
  4483. {
  4484. uint32_t buffer_ts;
  4485. uint32_t delay;
  4486. if (!delay_us)
  4487. return QDF_STATUS_E_INVAL;
  4488. /* Tx_rate_stats_info_valid is 0 and tsf is invalid then */
  4489. if (!ts->valid)
  4490. return QDF_STATUS_E_INVAL;
  4491. /* buffer_timestamp is in units of 1024 us and is [31:13] of
  4492. * WBM_RELEASE_RING_4. After left shift 10 bits, it's
  4493. * valid up to 29 bits.
  4494. */
  4495. buffer_ts = ts->buffer_timestamp << 10;
  4496. buffer_ts = dp_tx_adjust_enqueue_buffer_ts(ts->tsf,
  4497. buffer_ts, delta_tsf);
  4498. delay = ts->tsf - buffer_ts - delta_tsf;
  4499. if (qdf_unlikely(delay & 0x80000000)) {
  4500. dp_err_rl("delay = 0x%x (-ve)\n"
  4501. "release_src = %d\n"
  4502. "ppdu_id = 0x%x\n"
  4503. "peer_id = 0x%x\n"
  4504. "tid = 0x%x\n"
  4505. "release_reason = %d\n"
  4506. "tsf = %u (0x%x)\n"
  4507. "buffer_timestamp = %u (0x%x)\n"
  4508. "delta_tsf = %u (0x%x)\n",
  4509. delay, ts->release_src, ts->ppdu_id, ts->peer_id,
  4510. ts->tid, ts->status, ts->tsf, ts->tsf,
  4511. ts->buffer_timestamp, ts->buffer_timestamp,
  4512. delta_tsf, delta_tsf);
  4513. delay = 0;
  4514. goto end;
  4515. }
  4516. delay &= 0x1FFFFFFF; /* mask 29 BITS */
  4517. if (delay > 0x1000000) {
  4518. dp_info_rl("----------------------\n"
  4519. "Tx completion status:\n"
  4520. "----------------------\n"
  4521. "release_src = %d\n"
  4522. "ppdu_id = 0x%x\n"
  4523. "release_reason = %d\n"
  4524. "tsf = %u (0x%x)\n"
  4525. "buffer_timestamp = %u (0x%x)\n"
  4526. "delta_tsf = %u (0x%x)\n",
  4527. ts->release_src, ts->ppdu_id, ts->status,
  4528. ts->tsf, ts->tsf, ts->buffer_timestamp,
  4529. ts->buffer_timestamp, delta_tsf, delta_tsf);
  4530. return QDF_STATUS_E_FAILURE;
  4531. }
  4532. end:
  4533. *delay_us = delay;
  4534. return QDF_STATUS_SUCCESS;
  4535. }
  4536. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4537. uint32_t delta_tsf)
  4538. {
  4539. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4540. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4541. DP_MOD_ID_CDP);
  4542. if (!vdev) {
  4543. dp_err_rl("vdev %d does not exist", vdev_id);
  4544. return;
  4545. }
  4546. vdev->delta_tsf = delta_tsf;
  4547. dp_debug("vdev id %u delta_tsf %u", vdev_id, delta_tsf);
  4548. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4549. }
  4550. #endif
  4551. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  4552. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  4553. uint8_t vdev_id, bool enable)
  4554. {
  4555. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4556. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4557. DP_MOD_ID_CDP);
  4558. if (!vdev) {
  4559. dp_err_rl("vdev %d does not exist", vdev_id);
  4560. return QDF_STATUS_E_FAILURE;
  4561. }
  4562. qdf_atomic_set(&vdev->ul_delay_report, enable);
  4563. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4564. return QDF_STATUS_SUCCESS;
  4565. }
  4566. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4567. uint32_t *val)
  4568. {
  4569. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4570. struct dp_vdev *vdev;
  4571. uint32_t delay_accum;
  4572. uint32_t pkts_accum;
  4573. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  4574. if (!vdev) {
  4575. dp_err_rl("vdev %d does not exist", vdev_id);
  4576. return QDF_STATUS_E_FAILURE;
  4577. }
  4578. if (!qdf_atomic_read(&vdev->ul_delay_report)) {
  4579. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4580. return QDF_STATUS_E_FAILURE;
  4581. }
  4582. /* Average uplink delay based on current accumulated values */
  4583. delay_accum = qdf_atomic_read(&vdev->ul_delay_accum);
  4584. pkts_accum = qdf_atomic_read(&vdev->ul_pkts_accum);
  4585. *val = delay_accum / pkts_accum;
  4586. dp_debug("uplink_delay %u delay_accum %u pkts_accum %u", *val,
  4587. delay_accum, pkts_accum);
  4588. /* Reset accumulated values to 0 */
  4589. qdf_atomic_set(&vdev->ul_delay_accum, 0);
  4590. qdf_atomic_set(&vdev->ul_pkts_accum, 0);
  4591. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4592. return QDF_STATUS_SUCCESS;
  4593. }
  4594. static void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4595. struct hal_tx_completion_status *ts)
  4596. {
  4597. uint32_t ul_delay;
  4598. if (qdf_unlikely(!vdev)) {
  4599. dp_info_rl("vdev is null or delete in progress");
  4600. return;
  4601. }
  4602. if (!qdf_atomic_read(&vdev->ul_delay_report))
  4603. return;
  4604. if (QDF_IS_STATUS_ERROR(dp_tx_compute_hw_delay_us(ts,
  4605. vdev->delta_tsf,
  4606. &ul_delay)))
  4607. return;
  4608. ul_delay /= 1000; /* in unit of ms */
  4609. qdf_atomic_add(ul_delay, &vdev->ul_delay_accum);
  4610. qdf_atomic_inc(&vdev->ul_pkts_accum);
  4611. }
  4612. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY */
  4613. static inline
  4614. void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4615. struct hal_tx_completion_status *ts)
  4616. {
  4617. }
  4618. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
  4619. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  4620. struct dp_tx_desc_s *tx_desc,
  4621. struct hal_tx_completion_status *ts,
  4622. struct dp_txrx_peer *txrx_peer,
  4623. uint8_t ring_id)
  4624. {
  4625. uint32_t length;
  4626. qdf_ether_header_t *eh;
  4627. struct dp_vdev *vdev = NULL;
  4628. qdf_nbuf_t nbuf = tx_desc->nbuf;
  4629. enum qdf_dp_tx_rx_status dp_status;
  4630. uint8_t link_id = 0;
  4631. enum QDF_OPMODE op_mode = QDF_MAX_NO_OF_MODE;
  4632. if (!nbuf) {
  4633. dp_info_rl("invalid tx descriptor. nbuf NULL");
  4634. goto out;
  4635. }
  4636. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  4637. length = dp_tx_get_pkt_len(tx_desc);
  4638. dp_status = dp_tx_hw_to_qdf(ts->status);
  4639. dp_tx_comp_debug("-------------------- \n"
  4640. "Tx Completion Stats: \n"
  4641. "-------------------- \n"
  4642. "ack_frame_rssi = %d \n"
  4643. "first_msdu = %d \n"
  4644. "last_msdu = %d \n"
  4645. "msdu_part_of_amsdu = %d \n"
  4646. "rate_stats valid = %d \n"
  4647. "bw = %d \n"
  4648. "pkt_type = %d \n"
  4649. "stbc = %d \n"
  4650. "ldpc = %d \n"
  4651. "sgi = %d \n"
  4652. "mcs = %d \n"
  4653. "ofdma = %d \n"
  4654. "tones_in_ru = %d \n"
  4655. "tsf = %d \n"
  4656. "ppdu_id = %d \n"
  4657. "transmit_cnt = %d \n"
  4658. "tid = %d \n"
  4659. "peer_id = %d\n"
  4660. "tx_status = %d\n"
  4661. "tx_release_source = %d\n",
  4662. ts->ack_frame_rssi, ts->first_msdu,
  4663. ts->last_msdu, ts->msdu_part_of_amsdu,
  4664. ts->valid, ts->bw, ts->pkt_type, ts->stbc,
  4665. ts->ldpc, ts->sgi, ts->mcs, ts->ofdma,
  4666. ts->tones_in_ru, ts->tsf, ts->ppdu_id,
  4667. ts->transmit_cnt, ts->tid, ts->peer_id,
  4668. ts->status, ts->release_src);
  4669. /* Update SoC level stats */
  4670. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  4671. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  4672. if (!txrx_peer) {
  4673. dp_info_rl("peer is null or deletion in progress");
  4674. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  4675. goto out_log;
  4676. }
  4677. vdev = txrx_peer->vdev;
  4678. link_id = dp_tx_get_link_id_from_ppdu_id(soc, ts, txrx_peer, vdev);
  4679. dp_tx_set_nbuf_band(nbuf, txrx_peer, link_id);
  4680. op_mode = vdev->qdf_opmode;
  4681. dp_tx_update_connectivity_stats(soc, vdev, tx_desc, ts->status);
  4682. dp_tx_update_uplink_delay(soc, vdev, ts);
  4683. /* check tx complete notification */
  4684. if (qdf_nbuf_tx_notify_comp_get(nbuf))
  4685. dp_tx_notify_completion(soc, vdev, tx_desc,
  4686. nbuf, ts->status);
  4687. /* Update per-packet stats for mesh mode */
  4688. if (qdf_unlikely(vdev->mesh_vdev) &&
  4689. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  4690. dp_tx_comp_fill_tx_completion_stats(tx_desc, ts);
  4691. /* Update peer level stats */
  4692. if (qdf_unlikely(txrx_peer->bss_peer &&
  4693. vdev->opmode == wlan_op_mode_ap)) {
  4694. if (ts->status != HAL_TX_TQM_RR_REM_CMD_REM) {
  4695. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.mcast, 1,
  4696. length, link_id);
  4697. if (txrx_peer->vdev->tx_encap_type ==
  4698. htt_cmn_pkt_type_ethernet &&
  4699. QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  4700. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4701. tx.bcast, 1,
  4702. length, link_id);
  4703. }
  4704. }
  4705. } else {
  4706. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.ucast, 1, length,
  4707. link_id);
  4708. if (ts->status == HAL_TX_TQM_RR_FRAME_ACKED) {
  4709. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.tx_success,
  4710. 1, length, link_id);
  4711. if (qdf_unlikely(txrx_peer->in_twt)) {
  4712. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4713. tx.tx_success_twt,
  4714. 1, length,
  4715. link_id);
  4716. }
  4717. }
  4718. }
  4719. dp_tx_update_peer_stats(tx_desc, ts, txrx_peer, ring_id, link_id);
  4720. dp_tx_update_peer_delay_stats(txrx_peer, tx_desc, ts, ring_id);
  4721. dp_tx_update_peer_jitter_stats(txrx_peer, tx_desc, ts, ring_id);
  4722. dp_tx_update_peer_sawf_stats(soc, vdev, txrx_peer, tx_desc,
  4723. ts, ts->tid);
  4724. dp_tx_send_pktlog(soc, vdev->pdev, tx_desc, nbuf, dp_status);
  4725. #ifdef QCA_SUPPORT_RDK_STATS
  4726. if (soc->peerstats_enabled)
  4727. dp_tx_sojourn_stats_process(vdev->pdev, txrx_peer, ts->tid,
  4728. qdf_ktime_to_ms(tx_desc->timestamp),
  4729. ts->ppdu_id, link_id);
  4730. #endif
  4731. out_log:
  4732. DPTRACE(qdf_dp_trace_ptr(tx_desc->nbuf,
  4733. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  4734. QDF_TRACE_DEFAULT_PDEV_ID,
  4735. qdf_nbuf_data_addr(nbuf),
  4736. sizeof(qdf_nbuf_data(nbuf)),
  4737. tx_desc->id, ts->status, dp_status, op_mode));
  4738. out:
  4739. return;
  4740. }
  4741. #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
  4742. defined(QCA_ENHANCED_STATS_SUPPORT)
  4743. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4744. uint32_t length, uint8_t tx_status,
  4745. bool update)
  4746. {
  4747. if (update || (!txrx_peer->hw_txrx_stats_en)) {
  4748. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4749. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4750. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4751. }
  4752. }
  4753. #elif defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT)
  4754. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4755. uint32_t length, uint8_t tx_status,
  4756. bool update)
  4757. {
  4758. if (!txrx_peer->hw_txrx_stats_en) {
  4759. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4760. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4761. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4762. }
  4763. }
  4764. #else
  4765. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4766. uint32_t length, uint8_t tx_status,
  4767. bool update)
  4768. {
  4769. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4770. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4771. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4772. }
  4773. #endif
  4774. /**
  4775. * dp_tx_prefetch_next_nbuf_data(): Prefetch nbuf and nbuf data
  4776. * @next: descriptor of the nrxt buffer
  4777. *
  4778. * Return: none
  4779. */
  4780. #ifdef QCA_DP_RX_NBUF_AND_NBUF_DATA_PREFETCH
  4781. static inline
  4782. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4783. {
  4784. qdf_nbuf_t nbuf = NULL;
  4785. if (next)
  4786. nbuf = next->nbuf;
  4787. if (nbuf)
  4788. qdf_prefetch(nbuf);
  4789. }
  4790. #else
  4791. static inline
  4792. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4793. {
  4794. }
  4795. #endif
  4796. /**
  4797. * dp_tx_mcast_reinject_handler() - Tx reinjected multicast packets handler
  4798. * @soc: core txrx main context
  4799. * @desc: software descriptor
  4800. *
  4801. * Return: true when packet is reinjected
  4802. */
  4803. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  4804. defined(WLAN_MCAST_MLO) && !defined(CONFIG_MLO_SINGLE_DEV)
  4805. static inline bool
  4806. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4807. {
  4808. struct dp_vdev *vdev = NULL;
  4809. if (desc->tx_status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4810. if (!soc->arch_ops.dp_tx_mcast_handler ||
  4811. !soc->arch_ops.dp_tx_is_mcast_primary)
  4812. return false;
  4813. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  4814. DP_MOD_ID_REINJECT);
  4815. if (qdf_unlikely(!vdev)) {
  4816. dp_tx_comp_info_rl("Unable to get vdev ref %d",
  4817. desc->id);
  4818. return false;
  4819. }
  4820. if (!(soc->arch_ops.dp_tx_is_mcast_primary(soc, vdev))) {
  4821. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4822. return false;
  4823. }
  4824. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  4825. qdf_nbuf_len(desc->nbuf));
  4826. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, desc->nbuf);
  4827. dp_tx_desc_release(soc, desc, desc->pool_id);
  4828. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4829. return true;
  4830. }
  4831. return false;
  4832. }
  4833. #else
  4834. static inline bool
  4835. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4836. {
  4837. return false;
  4838. }
  4839. #endif
  4840. #ifdef QCA_DP_TX_NBUF_LIST_FREE
  4841. static inline void
  4842. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4843. {
  4844. qdf_nbuf_queue_head_init(nbuf_queue_head);
  4845. }
  4846. static inline void
  4847. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4848. struct dp_tx_desc_s *desc)
  4849. {
  4850. qdf_nbuf_t nbuf = NULL;
  4851. nbuf = desc->nbuf;
  4852. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_FAST))
  4853. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4854. else
  4855. qdf_nbuf_free(nbuf);
  4856. }
  4857. static inline void
  4858. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4859. qdf_nbuf_t nbuf)
  4860. {
  4861. if (!nbuf)
  4862. return;
  4863. if (nbuf->is_from_recycler)
  4864. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4865. else
  4866. qdf_nbuf_free(nbuf);
  4867. }
  4868. static inline void
  4869. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4870. {
  4871. qdf_nbuf_dev_kfree_list(nbuf_queue_head);
  4872. }
  4873. #else
  4874. static inline void
  4875. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4876. {
  4877. }
  4878. static inline void
  4879. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4880. struct dp_tx_desc_s *desc)
  4881. {
  4882. qdf_nbuf_free(desc->nbuf);
  4883. }
  4884. static inline void
  4885. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4886. qdf_nbuf_t nbuf)
  4887. {
  4888. qdf_nbuf_free(nbuf);
  4889. }
  4890. static inline void
  4891. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4892. {
  4893. }
  4894. #endif
  4895. #ifdef WLAN_SUPPORT_PPEDS
  4896. static inline void
  4897. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4898. struct dp_txrx_peer *txrx_peer,
  4899. struct hal_tx_completion_status *ts,
  4900. struct dp_tx_desc_s *desc,
  4901. uint8_t ring_id)
  4902. {
  4903. uint8_t link_id = 0;
  4904. struct dp_vdev *vdev = NULL;
  4905. if (qdf_likely(txrx_peer)) {
  4906. if (!(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4907. hal_tx_comp_get_status(&desc->comp,
  4908. ts,
  4909. soc->hal_soc);
  4910. vdev = txrx_peer->vdev;
  4911. link_id = dp_tx_get_link_id_from_ppdu_id(soc,
  4912. ts,
  4913. txrx_peer,
  4914. vdev);
  4915. if (link_id < 1 || link_id > DP_MAX_MLO_LINKS)
  4916. link_id = 0;
  4917. dp_tx_update_peer_stats(desc, ts,
  4918. txrx_peer,
  4919. ring_id,
  4920. link_id);
  4921. } else {
  4922. dp_tx_update_peer_basic_stats(txrx_peer, desc->length,
  4923. desc->tx_status, false);
  4924. }
  4925. }
  4926. }
  4927. #else
  4928. static inline void
  4929. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4930. struct dp_txrx_peer *txrx_peer,
  4931. struct hal_tx_completion_status *ts,
  4932. struct dp_tx_desc_s *desc,
  4933. uint8_t ring_id)
  4934. {
  4935. }
  4936. #endif
  4937. void
  4938. dp_tx_comp_process_desc_list_fast(struct dp_soc *soc,
  4939. struct dp_tx_desc_s *head_desc,
  4940. struct dp_tx_desc_s *tail_desc,
  4941. uint8_t ring_id,
  4942. uint32_t fast_desc_count)
  4943. {
  4944. struct dp_tx_desc_pool_s *pool = NULL;
  4945. pool = dp_get_tx_desc_pool(soc, head_desc->pool_id);
  4946. dp_tx_outstanding_sub(head_desc->pdev, fast_desc_count);
  4947. dp_tx_desc_free_list(pool, head_desc, tail_desc, fast_desc_count);
  4948. }
  4949. void
  4950. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  4951. struct dp_tx_desc_s *comp_head, uint8_t ring_id)
  4952. {
  4953. struct dp_tx_desc_s *desc;
  4954. struct dp_tx_desc_s *next;
  4955. struct hal_tx_completion_status ts;
  4956. struct dp_txrx_peer *txrx_peer = NULL;
  4957. uint16_t peer_id = DP_INVALID_PEER;
  4958. dp_txrx_ref_handle txrx_ref_handle = NULL;
  4959. qdf_nbuf_queue_head_t h;
  4960. desc = comp_head;
  4961. dp_tx_nbuf_queue_head_init(&h);
  4962. while (desc) {
  4963. next = desc->next;
  4964. dp_tx_prefetch_next_nbuf_data(next);
  4965. if (peer_id != desc->peer_id) {
  4966. if (txrx_peer)
  4967. dp_txrx_peer_unref_delete(txrx_ref_handle,
  4968. DP_MOD_ID_TX_COMP);
  4969. peer_id = desc->peer_id;
  4970. txrx_peer =
  4971. dp_txrx_peer_get_ref_by_id(soc, peer_id,
  4972. &txrx_ref_handle,
  4973. DP_MOD_ID_TX_COMP);
  4974. }
  4975. if (dp_tx_mcast_reinject_handler(soc, desc)) {
  4976. desc = next;
  4977. continue;
  4978. }
  4979. if (desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  4980. qdf_nbuf_t nbuf;
  4981. dp_tx_update_ppeds_tx_comp_stats(soc, txrx_peer, &ts,
  4982. desc, ring_id);
  4983. if (desc->pool_id != DP_TX_PPEDS_POOL_ID) {
  4984. nbuf = desc->nbuf;
  4985. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4986. if (desc->flags & DP_TX_DESC_FLAG_SPECIAL)
  4987. dp_tx_spcl_desc_free(soc, desc,
  4988. desc->pool_id);
  4989. else
  4990. dp_tx_desc_free(soc, desc,
  4991. desc->pool_id);
  4992. __dp_tx_outstanding_dec(soc);
  4993. } else {
  4994. nbuf = dp_ppeds_tx_desc_free(soc, desc);
  4995. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4996. }
  4997. desc = next;
  4998. continue;
  4999. }
  5000. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  5001. struct dp_pdev *pdev = desc->pdev;
  5002. if (qdf_likely(txrx_peer))
  5003. dp_tx_update_peer_basic_stats(txrx_peer,
  5004. desc->length,
  5005. desc->tx_status,
  5006. false);
  5007. qdf_assert(pdev);
  5008. dp_tx_outstanding_dec(pdev);
  5009. /*
  5010. * Calling a QDF WRAPPER here is creating significant
  5011. * performance impact so avoided the wrapper call here
  5012. */
  5013. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  5014. desc->id, DP_TX_COMP_UNMAP);
  5015. dp_tx_nbuf_unmap(soc, desc);
  5016. dp_tx_nbuf_dev_queue_free(&h, desc);
  5017. dp_tx_desc_free(soc, desc, desc->pool_id);
  5018. desc = next;
  5019. continue;
  5020. }
  5021. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  5022. dp_tx_comp_process_tx_status(soc, desc, &ts, txrx_peer,
  5023. ring_id);
  5024. dp_tx_comp_process_desc(soc, desc, &ts, txrx_peer);
  5025. dp_tx_desc_release(soc, desc, desc->pool_id);
  5026. desc = next;
  5027. }
  5028. dp_tx_nbuf_dev_kfree_list(&h);
  5029. if (txrx_peer)
  5030. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_TX_COMP);
  5031. }
  5032. #ifndef WLAN_SOFTUMAC_SUPPORT
  5033. /**
  5034. * dp_tx_dump_tx_desc() - Dump tx desc for debugging
  5035. * @tx_desc: software descriptor head pointer
  5036. *
  5037. * This function will dump tx desc for further debugging
  5038. *
  5039. * Return: none
  5040. */
  5041. static
  5042. void dp_tx_dump_tx_desc(struct dp_tx_desc_s *tx_desc)
  5043. {
  5044. if (tx_desc) {
  5045. dp_tx_comp_warn("tx_desc->nbuf: %pK", tx_desc->nbuf);
  5046. dp_tx_comp_warn("tx_desc->flags: 0x%x", tx_desc->flags);
  5047. dp_tx_comp_warn("tx_desc->id: %u", tx_desc->id);
  5048. dp_tx_comp_warn("tx_desc->dma_addr: 0x%x",
  5049. tx_desc->dma_addr);
  5050. dp_tx_comp_warn("tx_desc->vdev_id: %u",
  5051. tx_desc->vdev_id);
  5052. dp_tx_comp_warn("tx_desc->tx_status: %u",
  5053. tx_desc->tx_status);
  5054. dp_tx_comp_warn("tx_desc->pdev: %pK",
  5055. tx_desc->pdev);
  5056. dp_tx_comp_warn("tx_desc->tx_encap_type: %u",
  5057. tx_desc->tx_encap_type);
  5058. dp_tx_comp_warn("tx_desc->buffer_src: %u",
  5059. tx_desc->buffer_src);
  5060. dp_tx_comp_warn("tx_desc->frm_type: %u",
  5061. tx_desc->frm_type);
  5062. dp_tx_comp_warn("tx_desc->pkt_offset: %u",
  5063. tx_desc->pkt_offset);
  5064. dp_tx_comp_warn("tx_desc->pool_id: %u",
  5065. tx_desc->pool_id);
  5066. }
  5067. }
  5068. #endif
  5069. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  5070. static inline
  5071. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5072. int max_reap_limit)
  5073. {
  5074. bool limit_hit = false;
  5075. limit_hit =
  5076. (num_reaped >= max_reap_limit) ? true : false;
  5077. if (limit_hit)
  5078. DP_STATS_INC(soc, tx.tx_comp_loop_pkt_limit_hit, 1);
  5079. return limit_hit;
  5080. }
  5081. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5082. {
  5083. return soc->wlan_cfg_ctx->tx_comp_enable_eol_data_check;
  5084. }
  5085. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5086. {
  5087. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  5088. return cfg->tx_comp_loop_pkt_limit;
  5089. }
  5090. #else
  5091. static inline
  5092. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5093. int max_reap_limit)
  5094. {
  5095. return false;
  5096. }
  5097. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5098. {
  5099. return false;
  5100. }
  5101. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5102. {
  5103. return 0;
  5104. }
  5105. #endif
  5106. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  5107. static inline int
  5108. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5109. int *max_reap_limit)
  5110. {
  5111. return soc->arch_ops.dp_srng_test_and_update_nf_params(soc, dp_srng,
  5112. max_reap_limit);
  5113. }
  5114. #else
  5115. static inline int
  5116. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5117. int *max_reap_limit)
  5118. {
  5119. return 0;
  5120. }
  5121. #endif
  5122. #ifdef DP_TX_TRACKING
  5123. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  5124. {
  5125. if ((tx_desc->magic != DP_TX_MAGIC_PATTERN_INUSE) &&
  5126. (tx_desc->magic != DP_TX_MAGIC_PATTERN_FREE)) {
  5127. dp_err_rl("tx_desc %u is corrupted", tx_desc->id);
  5128. qdf_trigger_self_recovery(NULL, QDF_TX_DESC_LEAK);
  5129. }
  5130. }
  5131. #endif
  5132. #ifndef WLAN_SOFTUMAC_SUPPORT
  5133. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  5134. hal_ring_handle_t hal_ring_hdl, uint8_t ring_id,
  5135. uint32_t quota)
  5136. {
  5137. void *tx_comp_hal_desc;
  5138. void *last_prefetched_hw_desc = NULL;
  5139. struct dp_tx_desc_s *last_prefetched_sw_desc = NULL;
  5140. hal_soc_handle_t hal_soc;
  5141. uint8_t buffer_src;
  5142. struct dp_tx_desc_s *tx_desc = NULL;
  5143. struct dp_tx_desc_s *head_desc = NULL;
  5144. struct dp_tx_desc_s *tail_desc = NULL;
  5145. struct dp_tx_desc_s *fast_head_desc = NULL;
  5146. struct dp_tx_desc_s *fast_tail_desc = NULL;
  5147. uint32_t num_processed = 0;
  5148. uint32_t fast_desc_count = 0;
  5149. uint32_t count;
  5150. uint32_t num_avail_for_reap = 0;
  5151. bool force_break = false;
  5152. struct dp_srng *tx_comp_ring = &soc->tx_comp_ring[ring_id];
  5153. int max_reap_limit, ring_near_full;
  5154. uint32_t num_entries;
  5155. qdf_nbuf_queue_head_t h;
  5156. DP_HIST_INIT();
  5157. num_entries = hal_srng_get_num_entries(soc->hal_soc, hal_ring_hdl);
  5158. more_data:
  5159. hal_soc = soc->hal_soc;
  5160. /* Re-initialize local variables to be re-used */
  5161. head_desc = NULL;
  5162. tail_desc = NULL;
  5163. count = 0;
  5164. max_reap_limit = dp_tx_comp_get_loop_pkt_limit(soc);
  5165. ring_near_full = dp_srng_test_and_update_nf_params(soc, tx_comp_ring,
  5166. &max_reap_limit);
  5167. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  5168. dp_err("HAL RING Access Failed -- %pK", hal_ring_hdl);
  5169. return 0;
  5170. }
  5171. if (!num_avail_for_reap)
  5172. num_avail_for_reap = hal_srng_dst_num_valid(hal_soc,
  5173. hal_ring_hdl, 0);
  5174. if (num_avail_for_reap >= quota)
  5175. num_avail_for_reap = quota;
  5176. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_avail_for_reap);
  5177. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  5178. hal_ring_hdl,
  5179. num_avail_for_reap);
  5180. dp_tx_nbuf_queue_head_init(&h);
  5181. /* Find head descriptor from completion ring */
  5182. while (qdf_likely(num_avail_for_reap--)) {
  5183. tx_comp_hal_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  5184. if (qdf_unlikely(!tx_comp_hal_desc))
  5185. break;
  5186. buffer_src = hal_tx_comp_get_buffer_source(hal_soc,
  5187. tx_comp_hal_desc);
  5188. /* If this buffer was not released by TQM or FW, then it is not
  5189. * Tx completion indication, assert */
  5190. if (qdf_unlikely(buffer_src !=
  5191. HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  5192. (qdf_unlikely(buffer_src !=
  5193. HAL_TX_COMP_RELEASE_SOURCE_FW))) {
  5194. uint8_t wbm_internal_error;
  5195. dp_err_rl(
  5196. "Tx comp release_src != TQM | FW but from %d",
  5197. buffer_src);
  5198. hal_dump_comp_desc(tx_comp_hal_desc);
  5199. DP_STATS_INC(soc, tx.invalid_release_source, 1);
  5200. /* When WBM sees NULL buffer_addr_info in any of
  5201. * ingress rings it sends an error indication,
  5202. * with wbm_internal_error=1, to a specific ring.
  5203. * The WBM2SW ring used to indicate these errors is
  5204. * fixed in HW, and that ring is being used as Tx
  5205. * completion ring. These errors are not related to
  5206. * Tx completions, and should just be ignored
  5207. */
  5208. wbm_internal_error = hal_get_wbm_internal_error(
  5209. hal_soc,
  5210. tx_comp_hal_desc);
  5211. if (wbm_internal_error) {
  5212. dp_err_rl("Tx comp wbm_internal_error!!");
  5213. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_ALL], 1);
  5214. if (HAL_TX_COMP_RELEASE_SOURCE_REO ==
  5215. buffer_src)
  5216. dp_handle_wbm_internal_error(
  5217. soc,
  5218. tx_comp_hal_desc,
  5219. hal_tx_comp_get_buffer_type(
  5220. tx_comp_hal_desc));
  5221. } else {
  5222. dp_err_rl("Tx comp wbm_internal_error false");
  5223. DP_STATS_INC(soc, tx.non_wbm_internal_err, 1);
  5224. }
  5225. continue;
  5226. }
  5227. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  5228. tx_comp_hal_desc,
  5229. &tx_desc);
  5230. if (qdf_unlikely(!tx_desc)) {
  5231. dp_err("unable to retrieve tx_desc!");
  5232. hal_dump_comp_desc(tx_comp_hal_desc);
  5233. DP_STATS_INC(soc, tx.invalid_tx_comp_desc, 1);
  5234. QDF_BUG(0);
  5235. continue;
  5236. }
  5237. tx_desc->buffer_src = buffer_src;
  5238. if (tx_desc->flags & DP_TX_DESC_FLAG_FASTPATH_SIMPLE ||
  5239. tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5240. goto add_to_pool2;
  5241. /*
  5242. * If the release source is FW, process the HTT status
  5243. */
  5244. if (qdf_unlikely(buffer_src ==
  5245. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  5246. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  5247. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  5248. htt_tx_status);
  5249. /* Collect hw completion contents */
  5250. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5251. &tx_desc->comp, 1);
  5252. soc->arch_ops.dp_tx_process_htt_completion(
  5253. soc,
  5254. tx_desc,
  5255. htt_tx_status,
  5256. ring_id);
  5257. if (qdf_unlikely(!tx_desc->pdev)) {
  5258. dp_tx_dump_tx_desc(tx_desc);
  5259. }
  5260. } else {
  5261. tx_desc->tx_status =
  5262. hal_tx_comp_get_tx_status(tx_comp_hal_desc);
  5263. tx_desc->buffer_src = buffer_src;
  5264. /*
  5265. * If the fast completion mode is enabled extended
  5266. * metadata from descriptor is not copied
  5267. */
  5268. if (qdf_likely(tx_desc->flags &
  5269. DP_TX_DESC_FLAG_SIMPLE))
  5270. goto add_to_pool;
  5271. /*
  5272. * If the descriptor is already freed in vdev_detach,
  5273. * continue to next descriptor
  5274. */
  5275. if (qdf_unlikely
  5276. ((tx_desc->vdev_id == DP_INVALID_VDEV_ID) &&
  5277. !tx_desc->flags)) {
  5278. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  5279. tx_desc->id);
  5280. DP_STATS_INC(soc, tx.tx_comp_exception, 1);
  5281. dp_tx_desc_check_corruption(tx_desc);
  5282. continue;
  5283. }
  5284. if (qdf_unlikely(!tx_desc->pdev)) {
  5285. dp_tx_comp_warn("The pdev is NULL in TX desc, ignored.");
  5286. dp_tx_dump_tx_desc(tx_desc);
  5287. DP_STATS_INC(soc, tx.tx_comp_exception, 1);
  5288. continue;
  5289. }
  5290. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  5291. dp_tx_comp_info_rl("pdev in down state %d",
  5292. tx_desc->id);
  5293. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  5294. dp_tx_comp_free_buf(soc, tx_desc, false);
  5295. dp_tx_desc_release(soc, tx_desc,
  5296. tx_desc->pool_id);
  5297. goto next_desc;
  5298. }
  5299. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  5300. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  5301. dp_tx_comp_alert("Txdesc invalid, flgs = %x,id = %d",
  5302. tx_desc->flags, tx_desc->id);
  5303. qdf_assert_always(0);
  5304. }
  5305. /* Collect hw completion contents */
  5306. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5307. &tx_desc->comp, 1);
  5308. add_to_pool:
  5309. DP_HIST_PACKET_COUNT_INC(tx_desc->pdev->pdev_id);
  5310. add_to_pool2:
  5311. /* First ring descriptor on the cycle */
  5312. if (tx_desc->flags & DP_TX_DESC_FLAG_FASTPATH_SIMPLE ||
  5313. tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  5314. dp_tx_nbuf_dev_queue_free(&h, tx_desc);
  5315. fast_desc_count++;
  5316. if (!fast_head_desc) {
  5317. fast_head_desc = tx_desc;
  5318. fast_tail_desc = tx_desc;
  5319. }
  5320. fast_tail_desc->next = tx_desc;
  5321. fast_tail_desc = tx_desc;
  5322. dp_tx_desc_clear(tx_desc);
  5323. } else {
  5324. if (!head_desc) {
  5325. head_desc = tx_desc;
  5326. tail_desc = tx_desc;
  5327. }
  5328. tail_desc->next = tx_desc;
  5329. tx_desc->next = NULL;
  5330. tail_desc = tx_desc;
  5331. }
  5332. }
  5333. next_desc:
  5334. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  5335. /*
  5336. * Processed packet count is more than given quota
  5337. * stop to processing
  5338. */
  5339. count++;
  5340. dp_tx_prefetch_hw_sw_nbuf_desc(soc, hal_soc,
  5341. num_avail_for_reap,
  5342. hal_ring_hdl,
  5343. &last_prefetched_hw_desc,
  5344. &last_prefetched_sw_desc);
  5345. if (dp_tx_comp_loop_pkt_limit_hit(soc, count, max_reap_limit))
  5346. break;
  5347. }
  5348. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  5349. /* Process the reaped descriptors that were sent via fast path */
  5350. if (fast_head_desc) {
  5351. dp_tx_comp_process_desc_list_fast(soc, fast_head_desc,
  5352. fast_tail_desc, ring_id,
  5353. fast_desc_count);
  5354. dp_tx_nbuf_dev_kfree_list(&h);
  5355. }
  5356. /* Process the reaped descriptors */
  5357. if (head_desc)
  5358. dp_tx_comp_process_desc_list(soc, head_desc, ring_id);
  5359. DP_STATS_INC(soc, tx.tx_comp[ring_id], count);
  5360. /*
  5361. * If we are processing in near-full condition, there are 3 scenario
  5362. * 1) Ring entries has reached critical state
  5363. * 2) Ring entries are still near high threshold
  5364. * 3) Ring entries are below the safe level
  5365. *
  5366. * One more loop will move the state to normal processing and yield
  5367. */
  5368. if (ring_near_full)
  5369. goto more_data;
  5370. if (dp_tx_comp_enable_eol_data_check(soc)) {
  5371. if (num_processed >= quota)
  5372. force_break = true;
  5373. if (!force_break &&
  5374. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  5375. hal_ring_hdl)) {
  5376. DP_STATS_INC(soc, tx.hp_oos2, 1);
  5377. if (!hif_exec_should_yield(soc->hif_handle,
  5378. int_ctx->dp_intr_id))
  5379. goto more_data;
  5380. num_avail_for_reap =
  5381. hal_srng_dst_num_valid_locked(soc->hal_soc,
  5382. hal_ring_hdl,
  5383. true);
  5384. if (qdf_unlikely(num_entries &&
  5385. (num_avail_for_reap >=
  5386. num_entries >> 1))) {
  5387. DP_STATS_INC(soc, tx.near_full, 1);
  5388. goto more_data;
  5389. }
  5390. }
  5391. }
  5392. DP_TX_HIST_STATS_PER_PDEV();
  5393. return num_processed;
  5394. }
  5395. #endif
  5396. #ifdef FEATURE_WLAN_TDLS
  5397. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  5398. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  5399. {
  5400. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  5401. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  5402. DP_MOD_ID_TDLS);
  5403. if (!vdev) {
  5404. dp_err("vdev handle for id %d is NULL", vdev_id);
  5405. return NULL;
  5406. }
  5407. if (tx_spec & OL_TX_SPEC_NO_FREE)
  5408. vdev->is_tdls_frame = true;
  5409. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  5410. return dp_tx_send(soc_hdl, vdev_id, msdu_list);
  5411. }
  5412. #endif
  5413. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  5414. {
  5415. int pdev_id;
  5416. /*
  5417. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  5418. */
  5419. DP_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  5420. DP_TCL_METADATA_TYPE_VDEV_BASED);
  5421. DP_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  5422. vdev->vdev_id);
  5423. pdev_id =
  5424. dp_get_target_pdev_id_for_host_pdev_id(vdev->pdev->soc,
  5425. vdev->pdev->pdev_id);
  5426. DP_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata, pdev_id);
  5427. /*
  5428. * Set HTT Extension Valid bit to 0 by default
  5429. */
  5430. DP_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  5431. dp_tx_vdev_update_search_flags(vdev);
  5432. return QDF_STATUS_SUCCESS;
  5433. }
  5434. #ifndef FEATURE_WDS
  5435. static inline bool dp_tx_da_search_override(struct dp_vdev *vdev)
  5436. {
  5437. return false;
  5438. }
  5439. #endif
  5440. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  5441. {
  5442. struct dp_soc *soc = vdev->pdev->soc;
  5443. /*
  5444. * Enable both AddrY (SA based search) and AddrX (Da based search)
  5445. * for TDLS link
  5446. *
  5447. * Enable AddrY (SA based search) only for non-WDS STA and
  5448. * ProxySTA VAP (in HKv1) modes.
  5449. *
  5450. * In all other VAP modes, only DA based search should be
  5451. * enabled
  5452. */
  5453. if (vdev->opmode == wlan_op_mode_sta &&
  5454. vdev->tdls_link_connected)
  5455. vdev->hal_desc_addr_search_flags =
  5456. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  5457. else if ((vdev->opmode == wlan_op_mode_sta) &&
  5458. !dp_tx_da_search_override(vdev))
  5459. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  5460. else
  5461. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  5462. if (vdev->opmode == wlan_op_mode_sta && !vdev->tdls_link_connected)
  5463. vdev->search_type = soc->sta_mode_search_policy;
  5464. else
  5465. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  5466. }
  5467. #ifdef WLAN_SUPPORT_PPEDS
  5468. static inline bool
  5469. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5470. struct dp_vdev *vdev,
  5471. struct dp_tx_desc_s *tx_desc)
  5472. {
  5473. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5474. return false;
  5475. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5476. return true;
  5477. /*
  5478. * if vdev is given, then only check whether desc
  5479. * vdev match. if vdev is NULL, then check whether
  5480. * desc pdev match.
  5481. */
  5482. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5483. (tx_desc->pdev == pdev);
  5484. }
  5485. #else
  5486. static inline bool
  5487. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5488. struct dp_vdev *vdev,
  5489. struct dp_tx_desc_s *tx_desc)
  5490. {
  5491. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5492. return false;
  5493. /*
  5494. * if vdev is given, then only check whether desc
  5495. * vdev match. if vdev is NULL, then check whether
  5496. * desc pdev match.
  5497. */
  5498. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5499. (tx_desc->pdev == pdev);
  5500. }
  5501. #endif
  5502. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5503. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5504. bool force_free)
  5505. {
  5506. uint8_t i;
  5507. uint32_t j;
  5508. uint32_t num_desc, page_id, offset;
  5509. uint16_t num_desc_per_page;
  5510. struct dp_soc *soc = pdev->soc;
  5511. struct dp_tx_desc_s *tx_desc = NULL;
  5512. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5513. if (!vdev && !force_free) {
  5514. dp_err("Reset TX desc vdev, Vdev param is required!");
  5515. return;
  5516. }
  5517. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  5518. tx_desc_pool = &soc->tx_desc[i];
  5519. if (!(tx_desc_pool->pool_size) ||
  5520. IS_TX_DESC_POOL_STATUS_INACTIVE(tx_desc_pool) ||
  5521. !(tx_desc_pool->desc_pages.cacheable_pages))
  5522. continue;
  5523. /*
  5524. * Add flow pool lock protection in case pool is freed
  5525. * due to all tx_desc is recycled when handle TX completion.
  5526. * this is not necessary when do force flush as:
  5527. * a. double lock will happen if dp_tx_desc_release is
  5528. * also trying to acquire it.
  5529. * b. dp interrupt has been disabled before do force TX desc
  5530. * flush in dp_pdev_deinit().
  5531. */
  5532. if (!force_free)
  5533. qdf_spin_lock_bh(&tx_desc_pool->flow_pool_lock);
  5534. num_desc = tx_desc_pool->pool_size;
  5535. num_desc_per_page =
  5536. tx_desc_pool->desc_pages.num_element_per_page;
  5537. for (j = 0; j < num_desc; j++) {
  5538. page_id = j / num_desc_per_page;
  5539. offset = j % num_desc_per_page;
  5540. if (qdf_unlikely(!(tx_desc_pool->
  5541. desc_pages.cacheable_pages)))
  5542. break;
  5543. tx_desc = dp_tx_desc_find(soc, i, page_id, offset,
  5544. false);
  5545. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5546. /*
  5547. * Free TX desc if force free is
  5548. * required, otherwise only reset vdev
  5549. * in this TX desc.
  5550. */
  5551. if (force_free) {
  5552. tx_desc->flags |= DP_TX_DESC_FLAG_FLUSH;
  5553. dp_tx_comp_free_buf(soc, tx_desc,
  5554. false);
  5555. dp_tx_desc_release(soc, tx_desc, i);
  5556. } else {
  5557. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5558. }
  5559. }
  5560. }
  5561. if (!force_free)
  5562. qdf_spin_unlock_bh(&tx_desc_pool->flow_pool_lock);
  5563. }
  5564. }
  5565. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5566. /**
  5567. * dp_tx_desc_reset_vdev() - reset vdev to NULL in TX Desc
  5568. *
  5569. * @soc: Handle to DP soc structure
  5570. * @tx_desc: pointer of one TX desc
  5571. * @desc_pool_id: TX Desc pool id
  5572. * @spcl_pool: Special pool
  5573. */
  5574. static inline void
  5575. dp_tx_desc_reset_vdev(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  5576. uint8_t desc_pool_id, bool spcl_pool)
  5577. {
  5578. struct dp_tx_desc_pool_s *pool = NULL;
  5579. pool = spcl_pool ? dp_get_spcl_tx_desc_pool(soc, desc_pool_id) :
  5580. dp_get_tx_desc_pool(soc, desc_pool_id);
  5581. TX_DESC_LOCK_LOCK(&pool->lock);
  5582. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5583. TX_DESC_LOCK_UNLOCK(&pool->lock);
  5584. }
  5585. void __dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5586. bool force_free, bool spcl_pool)
  5587. {
  5588. uint8_t i, num_pool;
  5589. uint32_t j;
  5590. uint32_t num_desc, num_desc_t, page_id, offset;
  5591. uint16_t num_desc_per_page;
  5592. struct dp_soc *soc = pdev->soc;
  5593. struct dp_tx_desc_s *tx_desc = NULL;
  5594. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5595. if (!vdev && !force_free) {
  5596. dp_err("Reset TX desc vdev, Vdev param is required!");
  5597. return;
  5598. }
  5599. num_desc = spcl_pool ? wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx) :
  5600. wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5601. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5602. for (i = 0; i < num_pool; i++) {
  5603. tx_desc_pool = spcl_pool ? dp_get_spcl_tx_desc_pool(soc, i) :
  5604. dp_get_tx_desc_pool(soc, i);
  5605. if (!tx_desc_pool->desc_pages.cacheable_pages)
  5606. continue;
  5607. if (spcl_pool)
  5608. num_desc_t = num_desc;
  5609. else
  5610. num_desc_t = dp_get_updated_tx_desc(soc->ctrl_psoc, i,
  5611. num_desc);
  5612. num_desc_per_page =
  5613. tx_desc_pool->desc_pages.num_element_per_page;
  5614. for (j = 0; j < num_desc_t; j++) {
  5615. page_id = j / num_desc_per_page;
  5616. offset = j % num_desc_per_page;
  5617. tx_desc = dp_tx_desc_find(soc, i, page_id, offset,
  5618. spcl_pool);
  5619. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5620. if (force_free) {
  5621. dp_tx_comp_free_buf(soc, tx_desc,
  5622. false);
  5623. dp_tx_desc_release(soc, tx_desc, i);
  5624. } else {
  5625. dp_tx_desc_reset_vdev(soc, tx_desc,
  5626. i, spcl_pool);
  5627. }
  5628. }
  5629. }
  5630. }
  5631. }
  5632. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5633. bool force_free)
  5634. {
  5635. __dp_tx_desc_flush(pdev, vdev, force_free, false);
  5636. __dp_tx_desc_flush(pdev, vdev, force_free, true);
  5637. }
  5638. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5639. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  5640. {
  5641. struct dp_pdev *pdev = vdev->pdev;
  5642. /* Reset TX desc associated to this Vdev as NULL */
  5643. dp_tx_desc_flush(pdev, vdev, false);
  5644. return QDF_STATUS_SUCCESS;
  5645. }
  5646. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5647. /* Pools will be allocated dynamically */
  5648. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5649. int num_desc)
  5650. {
  5651. uint8_t i;
  5652. for (i = 0; i < num_pool; i++) {
  5653. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  5654. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  5655. }
  5656. return QDF_STATUS_SUCCESS;
  5657. }
  5658. static QDF_STATUS dp_tx_spcl_alloc_static_pools(struct dp_soc *soc,
  5659. int num_pool,
  5660. int num_spcl_desc)
  5661. {
  5662. return QDF_STATUS_SUCCESS;
  5663. }
  5664. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5665. uint32_t num_desc)
  5666. {
  5667. return QDF_STATUS_SUCCESS;
  5668. }
  5669. static QDF_STATUS dp_tx_spcl_init_static_pools(struct dp_soc *soc, int num_pool,
  5670. uint32_t num_spcl_desc)
  5671. {
  5672. return QDF_STATUS_SUCCESS;
  5673. }
  5674. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5675. {
  5676. }
  5677. static void dp_tx_spcl_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5678. {
  5679. }
  5680. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5681. {
  5682. uint8_t i;
  5683. for (i = 0; i < num_pool; i++)
  5684. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  5685. }
  5686. static void dp_tx_spcl_delete_static_pools(struct dp_soc *soc, int num_pool)
  5687. {
  5688. }
  5689. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5690. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5691. uint32_t num_desc)
  5692. {
  5693. uint8_t i, count;
  5694. struct dp_global_context *dp_global;
  5695. dp_global = wlan_objmgr_get_global_ctx();
  5696. /* Allocate software Tx descriptor pools */
  5697. if (dp_global->tx_desc_pool_alloc_cnt[soc->arch_id] == 0) {
  5698. for (i = 0; i < num_pool; i++) {
  5699. if (dp_tx_desc_pool_alloc(soc, i, num_desc, false)) {
  5700. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5701. FL("Tx Desc Pool alloc %d failed %pK"),
  5702. i, soc);
  5703. goto fail;
  5704. }
  5705. }
  5706. }
  5707. dp_global->tx_desc_pool_alloc_cnt[soc->arch_id]++;
  5708. return QDF_STATUS_SUCCESS;
  5709. fail:
  5710. for (count = 0; count < i; count++)
  5711. dp_tx_desc_pool_free(soc, count, false);
  5712. return QDF_STATUS_E_NOMEM;
  5713. }
  5714. static QDF_STATUS dp_tx_spcl_alloc_static_pools(struct dp_soc *soc,
  5715. int num_pool,
  5716. uint32_t num_spcl_desc)
  5717. {
  5718. uint8_t j, count;
  5719. struct dp_global_context *dp_global;
  5720. dp_global = wlan_objmgr_get_global_ctx();
  5721. /* Allocate software Tx descriptor pools */
  5722. if (dp_global->spcl_tx_desc_pool_alloc_cnt[soc->arch_id] == 0) {
  5723. for (j = 0; j < num_pool; j++) {
  5724. if (dp_tx_desc_pool_alloc(soc, j, num_spcl_desc, true)) {
  5725. QDF_TRACE(QDF_MODULE_ID_DP,
  5726. QDF_TRACE_LEVEL_ERROR,
  5727. FL("Tx special Desc Pool alloc %d failed %pK"),
  5728. j, soc);
  5729. goto fail;
  5730. }
  5731. }
  5732. }
  5733. dp_global->spcl_tx_desc_pool_alloc_cnt[soc->arch_id]++;
  5734. return QDF_STATUS_SUCCESS;
  5735. fail:
  5736. for (count = 0; count < j; count++)
  5737. dp_tx_desc_pool_free(soc, count, true);
  5738. return QDF_STATUS_E_NOMEM;
  5739. }
  5740. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5741. uint32_t num_desc)
  5742. {
  5743. uint8_t i;
  5744. struct dp_global_context *dp_global;
  5745. dp_global = wlan_objmgr_get_global_ctx();
  5746. if (dp_global->tx_desc_pool_init_cnt[soc->arch_id] == 0) {
  5747. for (i = 0; i < num_pool; i++) {
  5748. if (dp_tx_desc_pool_init(soc, i, num_desc, false)) {
  5749. QDF_TRACE(QDF_MODULE_ID_DP,
  5750. QDF_TRACE_LEVEL_ERROR,
  5751. FL("Tx Desc Pool init %d failed %pK"),
  5752. i, soc);
  5753. return QDF_STATUS_E_NOMEM;
  5754. }
  5755. }
  5756. }
  5757. dp_global->tx_desc_pool_init_cnt[soc->arch_id]++;
  5758. return QDF_STATUS_SUCCESS;
  5759. }
  5760. static QDF_STATUS dp_tx_spcl_init_static_pools(struct dp_soc *soc, int num_pool,
  5761. uint32_t num_spcl_desc)
  5762. {
  5763. uint8_t i;
  5764. struct dp_global_context *dp_global;
  5765. dp_global = wlan_objmgr_get_global_ctx();
  5766. if (dp_global->spcl_tx_desc_pool_init_cnt[soc->arch_id] == 0) {
  5767. for (i = 0; i < num_pool; i++) {
  5768. if (dp_tx_desc_pool_init(soc, i, num_spcl_desc, true)) {
  5769. QDF_TRACE(QDF_MODULE_ID_DP,
  5770. QDF_TRACE_LEVEL_ERROR,
  5771. FL("Tx special Desc Pool init %d failed %pK"),
  5772. i, soc);
  5773. return QDF_STATUS_E_NOMEM;
  5774. }
  5775. }
  5776. }
  5777. dp_global->spcl_tx_desc_pool_init_cnt[soc->arch_id]++;
  5778. return QDF_STATUS_SUCCESS;
  5779. }
  5780. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5781. {
  5782. uint8_t i;
  5783. struct dp_global_context *dp_global;
  5784. dp_global = wlan_objmgr_get_global_ctx();
  5785. dp_global->tx_desc_pool_init_cnt[soc->arch_id]--;
  5786. if (dp_global->tx_desc_pool_init_cnt[soc->arch_id] == 0) {
  5787. for (i = 0; i < num_pool; i++)
  5788. dp_tx_desc_pool_deinit(soc, i, false);
  5789. }
  5790. }
  5791. static void dp_tx_spcl_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5792. {
  5793. uint8_t i;
  5794. struct dp_global_context *dp_global;
  5795. dp_global = wlan_objmgr_get_global_ctx();
  5796. dp_global->spcl_tx_desc_pool_init_cnt[soc->arch_id]--;
  5797. if (dp_global->spcl_tx_desc_pool_init_cnt[soc->arch_id] == 0) {
  5798. for (i = 0; i < num_pool; i++)
  5799. dp_tx_desc_pool_deinit(soc, i, true);
  5800. }
  5801. }
  5802. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5803. {
  5804. uint8_t i;
  5805. struct dp_global_context *dp_global;
  5806. dp_global = wlan_objmgr_get_global_ctx();
  5807. dp_global->tx_desc_pool_alloc_cnt[soc->arch_id]--;
  5808. if (dp_global->tx_desc_pool_alloc_cnt[soc->arch_id] == 0) {
  5809. for (i = 0; i < num_pool; i++)
  5810. dp_tx_desc_pool_free(soc, i, false);
  5811. }
  5812. }
  5813. static void dp_tx_spcl_delete_static_pools(struct dp_soc *soc, int num_pool)
  5814. {
  5815. uint8_t i;
  5816. struct dp_global_context *dp_global;
  5817. dp_global = wlan_objmgr_get_global_ctx();
  5818. dp_global->spcl_tx_desc_pool_alloc_cnt[soc->arch_id]--;
  5819. if (dp_global->spcl_tx_desc_pool_alloc_cnt[soc->arch_id] == 0) {
  5820. for (i = 0; i < num_pool; i++)
  5821. dp_tx_desc_pool_free(soc, i, true);
  5822. }
  5823. }
  5824. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5825. /**
  5826. * dp_tx_tso_cmn_desc_pool_deinit() - de-initialize TSO descriptors
  5827. * @soc: core txrx main context
  5828. * @num_pool: number of pools
  5829. *
  5830. */
  5831. static void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool)
  5832. {
  5833. dp_tx_tso_desc_pool_deinit(soc, num_pool);
  5834. dp_tx_tso_num_seg_pool_deinit(soc, num_pool);
  5835. }
  5836. /**
  5837. * dp_tx_tso_cmn_desc_pool_free() - free TSO descriptors
  5838. * @soc: core txrx main context
  5839. * @num_pool: number of pools
  5840. *
  5841. */
  5842. static void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool)
  5843. {
  5844. dp_tx_tso_desc_pool_free(soc, num_pool);
  5845. dp_tx_tso_num_seg_pool_free(soc, num_pool);
  5846. }
  5847. #ifndef WLAN_SOFTUMAC_SUPPORT
  5848. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5849. {
  5850. uint8_t num_pool, num_ext_pool;
  5851. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5852. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5853. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5854. dp_tx_ext_desc_pool_free(soc, num_ext_pool);
  5855. dp_tx_delete_static_pools(soc, num_pool);
  5856. dp_tx_spcl_delete_static_pools(soc, num_pool);
  5857. }
  5858. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5859. {
  5860. uint8_t num_pool, num_ext_pool;
  5861. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5862. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5863. dp_tx_flow_control_deinit(soc);
  5864. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5865. dp_tx_ext_desc_pool_deinit(soc, num_ext_pool);
  5866. dp_tx_deinit_static_pools(soc, num_pool);
  5867. dp_tx_spcl_deinit_static_pools(soc, num_pool);
  5868. }
  5869. #else
  5870. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5871. {
  5872. uint8_t num_pool;
  5873. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5874. dp_tx_delete_static_pools(soc, num_pool);
  5875. dp_tx_spcl_delete_static_pools(soc, num_pool);
  5876. }
  5877. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5878. {
  5879. uint8_t num_pool;
  5880. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5881. dp_tx_flow_control_deinit(soc);
  5882. dp_tx_deinit_static_pools(soc, num_pool);
  5883. dp_tx_spcl_deinit_static_pools(soc, num_pool);
  5884. }
  5885. #endif /*WLAN_SOFTUMAC_SUPPORT*/
  5886. /**
  5887. * dp_tx_tso_cmn_desc_pool_alloc() - TSO cmn desc pool allocator
  5888. * @soc: DP soc handle
  5889. * @num_pool: Number of pools
  5890. * @num_desc: Number of descriptors
  5891. *
  5892. * Reserve TSO descriptor buffers
  5893. *
  5894. * Return: QDF_STATUS_E_FAILURE on failure or
  5895. * QDF_STATUS_SUCCESS on success
  5896. */
  5897. static QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  5898. uint8_t num_pool,
  5899. uint32_t num_desc)
  5900. {
  5901. if (dp_tx_tso_desc_pool_alloc(soc, num_pool, num_desc)) {
  5902. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5903. return QDF_STATUS_E_FAILURE;
  5904. }
  5905. if (dp_tx_tso_num_seg_pool_alloc(soc, num_pool, num_desc)) {
  5906. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5907. num_pool, soc);
  5908. return QDF_STATUS_E_FAILURE;
  5909. }
  5910. return QDF_STATUS_SUCCESS;
  5911. }
  5912. /**
  5913. * dp_tx_tso_cmn_desc_pool_init() - TSO cmn desc pool init
  5914. * @soc: DP soc handle
  5915. * @num_pool: Number of pools
  5916. * @num_desc: Number of descriptors
  5917. *
  5918. * Initialize TSO descriptor pools
  5919. *
  5920. * Return: QDF_STATUS_E_FAILURE on failure or
  5921. * QDF_STATUS_SUCCESS on success
  5922. */
  5923. static QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  5924. uint8_t num_pool,
  5925. uint32_t num_desc)
  5926. {
  5927. if (dp_tx_tso_desc_pool_init(soc, num_pool, num_desc)) {
  5928. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5929. return QDF_STATUS_E_FAILURE;
  5930. }
  5931. if (dp_tx_tso_num_seg_pool_init(soc, num_pool, num_desc)) {
  5932. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5933. num_pool, soc);
  5934. return QDF_STATUS_E_FAILURE;
  5935. }
  5936. return QDF_STATUS_SUCCESS;
  5937. }
  5938. #ifndef WLAN_SOFTUMAC_SUPPORT
  5939. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5940. {
  5941. uint8_t num_pool, num_ext_pool;
  5942. uint32_t num_desc;
  5943. uint32_t num_spcl_desc;
  5944. uint32_t num_ext_desc;
  5945. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5946. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5947. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5948. num_spcl_desc = wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
  5949. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5950. dp_info("Tx Desc Alloc num_pool: %d descs: %d", num_pool, num_desc);
  5951. if ((num_pool > MAX_TXDESC_POOLS) ||
  5952. (num_ext_pool > MAX_TXDESC_POOLS) ||
  5953. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX) ||
  5954. (num_spcl_desc > WLAN_CFG_NUM_TX_SPL_DESC_MAX))
  5955. goto fail1;
  5956. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5957. goto fail1;
  5958. if (dp_tx_spcl_alloc_static_pools(soc, num_pool, num_spcl_desc))
  5959. goto fail2;
  5960. if (dp_tx_ext_desc_pool_alloc(soc, num_ext_pool, num_ext_desc))
  5961. goto fail3;
  5962. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5963. return QDF_STATUS_SUCCESS;
  5964. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_ext_pool, num_ext_desc))
  5965. goto fail4;
  5966. return QDF_STATUS_SUCCESS;
  5967. fail4:
  5968. dp_tx_ext_desc_pool_free(soc, num_ext_pool);
  5969. fail3:
  5970. dp_tx_spcl_delete_static_pools(soc, num_pool);
  5971. fail2:
  5972. dp_tx_delete_static_pools(soc, num_pool);
  5973. fail1:
  5974. return QDF_STATUS_E_RESOURCES;
  5975. }
  5976. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5977. {
  5978. uint8_t num_pool, num_ext_pool;
  5979. uint32_t num_desc;
  5980. uint32_t num_spcl_desc;
  5981. uint32_t num_ext_desc;
  5982. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5983. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5984. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5985. num_spcl_desc = wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
  5986. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5987. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5988. goto fail1;
  5989. if (dp_tx_spcl_init_static_pools(soc, num_pool, num_spcl_desc))
  5990. goto fail2;
  5991. if (dp_tx_ext_desc_pool_init(soc, num_ext_pool, num_ext_desc))
  5992. goto fail3;
  5993. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5994. return QDF_STATUS_SUCCESS;
  5995. if (dp_tx_tso_cmn_desc_pool_init(soc, num_ext_pool, num_ext_desc))
  5996. goto fail4;
  5997. dp_tx_flow_control_init(soc);
  5998. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5999. return QDF_STATUS_SUCCESS;
  6000. fail4:
  6001. dp_tx_ext_desc_pool_deinit(soc, num_ext_pool);
  6002. fail3:
  6003. dp_tx_spcl_deinit_static_pools(soc, num_pool);
  6004. fail2:
  6005. dp_tx_deinit_static_pools(soc, num_pool);
  6006. fail1:
  6007. return QDF_STATUS_E_RESOURCES;
  6008. }
  6009. #else
  6010. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  6011. {
  6012. uint8_t num_pool;
  6013. uint32_t num_desc;
  6014. uint32_t num_spcl_desc;
  6015. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  6016. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  6017. num_spcl_desc = wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
  6018. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6019. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  6020. __func__, num_pool, num_desc);
  6021. if ((num_pool > MAX_TXDESC_POOLS) ||
  6022. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX) ||
  6023. (num_spcl_desc > WLAN_CFG_NUM_TX_SPL_DESC_MAX))
  6024. goto fail1;
  6025. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  6026. goto fail1;
  6027. if (dp_tx_spcl_alloc_static_pools(soc, num_pool, num_spcl_desc))
  6028. goto fail2;
  6029. return QDF_STATUS_SUCCESS;
  6030. fail2:
  6031. dp_tx_delete_static_pools(soc, num_pool);
  6032. fail1:
  6033. return QDF_STATUS_E_RESOURCES;
  6034. }
  6035. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  6036. {
  6037. uint8_t num_pool;
  6038. uint32_t num_desc;
  6039. uint32_t num_spcl_desc;
  6040. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  6041. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  6042. num_spcl_desc = wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
  6043. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  6044. goto fail;
  6045. if (dp_tx_spcl_init_static_pools(soc, num_pool, num_spcl_desc))
  6046. goto fail1;
  6047. dp_tx_flow_control_init(soc);
  6048. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  6049. return QDF_STATUS_SUCCESS;
  6050. fail1:
  6051. dp_tx_deinit_static_pools(soc, num_pool);
  6052. fail:
  6053. return QDF_STATUS_E_RESOURCES;
  6054. }
  6055. #endif
  6056. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc)
  6057. {
  6058. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  6059. uint8_t num_ext_desc_pool;
  6060. uint32_t num_ext_desc;
  6061. num_ext_desc_pool = dp_get_ext_tx_desc_pool_num(soc);
  6062. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  6063. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_ext_desc_pool, num_ext_desc))
  6064. return QDF_STATUS_E_FAILURE;
  6065. if (dp_tx_tso_cmn_desc_pool_init(soc, num_ext_desc_pool, num_ext_desc))
  6066. return QDF_STATUS_E_FAILURE;
  6067. return QDF_STATUS_SUCCESS;
  6068. }
  6069. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc)
  6070. {
  6071. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  6072. uint8_t num_ext_desc_pool = dp_get_ext_tx_desc_pool_num(soc);
  6073. dp_tx_tso_cmn_desc_pool_deinit(soc, num_ext_desc_pool);
  6074. dp_tx_tso_cmn_desc_pool_free(soc, num_ext_desc_pool);
  6075. return QDF_STATUS_SUCCESS;
  6076. }
  6077. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  6078. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  6079. enum qdf_pkt_timestamp_index index, uint64_t time,
  6080. qdf_nbuf_t nbuf)
  6081. {
  6082. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled())) {
  6083. uint64_t tsf_time;
  6084. if (vdev->get_tsf_time) {
  6085. vdev->get_tsf_time(vdev->osif_vdev, time, &tsf_time);
  6086. qdf_add_dp_pkt_timestamp(nbuf, index, tsf_time);
  6087. }
  6088. }
  6089. }
  6090. void dp_pkt_get_timestamp(uint64_t *time)
  6091. {
  6092. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled()))
  6093. *time = qdf_get_log_timestamp();
  6094. }
  6095. #endif
  6096. #ifdef QCA_MULTIPASS_SUPPORT
  6097. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  6098. struct dp_tx_msdu_info_s *msdu_info,
  6099. uint16_t group_key)
  6100. {
  6101. struct htt_tx_msdu_desc_ext2_t *meta_data =
  6102. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  6103. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  6104. /*
  6105. * When attempting to send a multicast packet with multi-passphrase,
  6106. * host shall add HTT EXT meta data "struct htt_tx_msdu_desc_ext2_t"
  6107. * ref htt.h indicating the group_id field in "key_flags" also having
  6108. * "valid_key_flags" as 1. Assign “key_flags = group_key_ix”.
  6109. */
  6110. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info->meta_data[0],
  6111. 1);
  6112. HTT_TX_MSDU_EXT2_DESC_KEY_FLAGS_SET(msdu_info->meta_data[2], group_key);
  6113. }
  6114. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  6115. defined(WLAN_MCAST_MLO)
  6116. /**
  6117. * dp_tx_need_mcast_reinject() - If frame needs to be processed in reinject path
  6118. * @vdev: DP vdev handle
  6119. *
  6120. * Return: true if reinject handling is required else false
  6121. */
  6122. static inline bool
  6123. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  6124. {
  6125. if (vdev->mlo_vdev && vdev->opmode == wlan_op_mode_ap)
  6126. return true;
  6127. return false;
  6128. }
  6129. #else
  6130. static inline bool
  6131. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  6132. {
  6133. return false;
  6134. }
  6135. #endif
  6136. /**
  6137. * dp_tx_need_multipass_process() - If frame needs multipass phrase processing
  6138. * @soc: dp soc handle
  6139. * @vdev: DP vdev handle
  6140. * @buf: frame
  6141. * @vlan_id: vlan id of frame
  6142. *
  6143. * Return: whether peer is special or classic
  6144. */
  6145. static
  6146. uint8_t dp_tx_need_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  6147. qdf_nbuf_t buf, uint16_t *vlan_id)
  6148. {
  6149. struct dp_txrx_peer *txrx_peer = NULL;
  6150. struct dp_peer *peer = NULL;
  6151. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(buf);
  6152. struct vlan_ethhdr *veh = NULL;
  6153. bool not_vlan = ((vdev->tx_encap_type == htt_cmn_pkt_type_raw) ||
  6154. (htons(eh->ether_type) != ETH_P_8021Q));
  6155. if (qdf_unlikely(not_vlan))
  6156. return DP_VLAN_UNTAGGED;
  6157. veh = (struct vlan_ethhdr *)eh;
  6158. *vlan_id = (ntohs(veh->h_vlan_TCI) & VLAN_VID_MASK);
  6159. if (qdf_unlikely(DP_FRAME_IS_MULTICAST((eh)->ether_dhost))) {
  6160. /* look for handling of multicast packets in reinject path */
  6161. if (dp_tx_need_mcast_reinject(vdev))
  6162. return DP_VLAN_UNTAGGED;
  6163. qdf_spin_lock_bh(&vdev->mpass_peer_mutex);
  6164. TAILQ_FOREACH(txrx_peer, &vdev->mpass_peer_list,
  6165. mpass_peer_list_elem) {
  6166. if (*vlan_id == txrx_peer->vlan_id) {
  6167. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  6168. return DP_VLAN_TAGGED_MULTICAST;
  6169. }
  6170. }
  6171. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  6172. return DP_VLAN_UNTAGGED;
  6173. }
  6174. peer = dp_peer_find_hash_find(soc, eh->ether_dhost, 0, DP_VDEV_ALL,
  6175. DP_MOD_ID_TX_MULTIPASS);
  6176. if (qdf_unlikely(!peer))
  6177. return DP_VLAN_UNTAGGED;
  6178. /*
  6179. * Do not drop the frame when vlan_id doesn't match.
  6180. * Send the frame as it is.
  6181. */
  6182. if (*vlan_id == peer->txrx_peer->vlan_id) {
  6183. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  6184. return DP_VLAN_TAGGED_UNICAST;
  6185. }
  6186. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  6187. return DP_VLAN_UNTAGGED;
  6188. }
  6189. #ifndef WLAN_REPEATER_NOT_SUPPORTED
  6190. static inline void
  6191. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  6192. qdf_nbuf_t nbuf,
  6193. struct dp_tx_msdu_info_s *msdu_info)
  6194. {
  6195. qdf_nbuf_t nbuf_copy = NULL;
  6196. /* AP can have classic clients, special clients &
  6197. * classic repeaters.
  6198. * 1. Classic clients & special client:
  6199. * Remove vlan header, find corresponding group key
  6200. * index, fill in metaheader and enqueue multicast
  6201. * frame to TCL.
  6202. * 2. Classic repeater:
  6203. * Pass through to classic repeater with vlan tag
  6204. * intact without any group key index. Hardware
  6205. * will know which key to use to send frame to
  6206. * repeater.
  6207. */
  6208. nbuf_copy = qdf_nbuf_copy(nbuf);
  6209. /*
  6210. * Send multicast frame to special peers even
  6211. * if pass through to classic repeater fails.
  6212. */
  6213. if (nbuf_copy) {
  6214. struct dp_tx_msdu_info_s msdu_info_copy;
  6215. qdf_mem_zero(&msdu_info_copy, sizeof(msdu_info_copy));
  6216. msdu_info_copy.tid = HTT_TX_EXT_TID_INVALID;
  6217. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info_copy.meta_data[0], 1);
  6218. nbuf_copy = dp_tx_send_msdu_single(vdev, nbuf_copy,
  6219. &msdu_info_copy,
  6220. HTT_INVALID_PEER, NULL);
  6221. if (nbuf_copy) {
  6222. qdf_nbuf_free(nbuf_copy);
  6223. dp_info_rl("nbuf_copy send failed");
  6224. }
  6225. }
  6226. }
  6227. #else
  6228. static inline void
  6229. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  6230. qdf_nbuf_t nbuf,
  6231. struct dp_tx_msdu_info_s *msdu_info)
  6232. {
  6233. }
  6234. #endif
  6235. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  6236. qdf_nbuf_t nbuf,
  6237. struct dp_tx_msdu_info_s *msdu_info)
  6238. {
  6239. uint16_t vlan_id = 0;
  6240. uint16_t group_key = 0;
  6241. uint8_t is_spcl_peer = DP_VLAN_UNTAGGED;
  6242. if (HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->meta_data[0]))
  6243. return true;
  6244. is_spcl_peer = dp_tx_need_multipass_process(soc, vdev, nbuf, &vlan_id);
  6245. if ((is_spcl_peer != DP_VLAN_TAGGED_MULTICAST) &&
  6246. (is_spcl_peer != DP_VLAN_TAGGED_UNICAST))
  6247. return true;
  6248. if (is_spcl_peer == DP_VLAN_TAGGED_UNICAST) {
  6249. dp_tx_remove_vlan_tag(vdev, nbuf);
  6250. return true;
  6251. }
  6252. dp_tx_multipass_send_pkt_to_repeater(soc, vdev, nbuf, msdu_info);
  6253. group_key = vdev->iv_vlan_map[vlan_id];
  6254. /*
  6255. * If group key is not installed, drop the frame.
  6256. */
  6257. if (!group_key)
  6258. return false;
  6259. dp_tx_remove_vlan_tag(vdev, nbuf);
  6260. dp_tx_add_groupkey_metadata(vdev, msdu_info, group_key);
  6261. msdu_info->exception_fw = 1;
  6262. return true;
  6263. }
  6264. #endif /* QCA_MULTIPASS_SUPPORT */