dp_be.c 107 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_utility.h>
  20. #include <dp_internal.h>
  21. #include "dp_rings.h"
  22. #include <dp_htt.h>
  23. #include "dp_be.h"
  24. #include "dp_be_tx.h"
  25. #include "dp_be_rx.h"
  26. #ifdef WIFI_MONITOR_SUPPORT
  27. #if !defined(DISABLE_MON_CONFIG) && (defined(WLAN_PKT_CAPTURE_TX_2_0) || \
  28. defined(WLAN_PKT_CAPTURE_RX_2_0))
  29. #include "dp_mon_2.0.h"
  30. #endif
  31. #include "dp_mon.h"
  32. #endif
  33. #include <hal_be_api.h>
  34. #ifdef WLAN_SUPPORT_PPEDS
  35. #include "be/dp_ppeds.h"
  36. #include <ppe_vp_public.h>
  37. #include <ppe_drv_sc.h>
  38. #endif
  39. #ifdef WLAN_SUPPORT_PPEDS
  40. static const char *ring_usage_dump[RING_USAGE_MAX] = {
  41. "100%",
  42. "Greater than 90%",
  43. "70 to 90%",
  44. "50 to 70%",
  45. "Less than 50%"
  46. };
  47. #endif
  48. /* Generic AST entry aging timer value */
  49. #define DP_AST_AGING_TIMER_DEFAULT_MS 5000
  50. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  51. #define DP_TX_VDEV_ID_CHECK_ENABLE 0
  52. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  53. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  54. {1, 4, HAL_BE_WBM_SW4_BM_ID, 0},
  55. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  56. #ifdef QCA_WIFI_KIWI_V2
  57. {3, 5, HAL_BE_WBM_SW5_BM_ID, 0},
  58. {4, 6, HAL_BE_WBM_SW6_BM_ID, 0}
  59. #else
  60. {3, 6, HAL_BE_WBM_SW5_BM_ID, 0},
  61. {4, 7, HAL_BE_WBM_SW6_BM_ID, 0}
  62. #endif
  63. };
  64. #else
  65. #define DP_TX_VDEV_ID_CHECK_ENABLE 1
  66. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  67. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  68. {1, 1, HAL_BE_WBM_SW1_BM_ID, 0},
  69. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  70. {3, 3, HAL_BE_WBM_SW3_BM_ID, 0},
  71. {4, 4, HAL_BE_WBM_SW4_BM_ID, 0}
  72. };
  73. #endif
  74. #ifdef WLAN_SUPPORT_PPEDS
  75. static struct cdp_ppeds_txrx_ops dp_ops_ppeds_be = {
  76. .ppeds_entry_attach = dp_ppeds_attach_vdev_be,
  77. .ppeds_entry_detach = dp_ppeds_detach_vdev_be,
  78. .ppeds_set_int_pri2tid = dp_ppeds_set_int_pri2tid_be,
  79. .ppeds_update_int_pri2tid = dp_ppeds_update_int_pri2tid_be,
  80. .ppeds_entry_dump = dp_ppeds_dump_ppe_vp_tbl_be,
  81. .ppeds_enable_pri2tid = dp_ppeds_vdev_enable_pri2tid_be,
  82. .ppeds_vp_setup_recovery = dp_ppeds_vp_setup_on_fw_recovery,
  83. .ppeds_stats_sync = dp_ppeds_stats_sync_be,
  84. };
  85. static void dp_ppeds_rings_status(struct dp_soc *soc)
  86. {
  87. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  88. dp_print_ring_stat_from_hal(soc, &be_soc->reo2ppe_ring, REO2PPE);
  89. dp_print_ring_stat_from_hal(soc, &be_soc->ppe2tcl_ring, PPE2TCL);
  90. dp_print_ring_stat_from_hal(soc, &be_soc->ppeds_wbm_release_ring,
  91. WBM2SW_RELEASE);
  92. }
  93. #ifdef GLOBAL_ASSERT_AVOIDANCE
  94. void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
  95. {
  96. DP_PRINT_STATS("PPE-DS Tx WAR stats: [%u] [%u] [%u]",
  97. be_soc->ppeds_stats.tx.tx_comp_buf_src,
  98. be_soc->ppeds_stats.tx.tx_comp_desc_null,
  99. be_soc->ppeds_stats.tx.tx_comp_invalid_flag);
  100. }
  101. static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
  102. {
  103. be_soc->ppeds_stats.tx.tx_comp_buf_src = 0;
  104. be_soc->ppeds_stats.tx.tx_comp_desc_null = 0;
  105. be_soc->ppeds_stats.tx.tx_comp_invalid_flag = 0;
  106. }
  107. #else
  108. static void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
  109. {
  110. }
  111. static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
  112. {
  113. }
  114. #endif
  115. static void dp_ppeds_inuse_desc(struct dp_soc *soc)
  116. {
  117. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  118. DP_PRINT_STATS("PPE-DS Tx Descriptors in Use = %u num_free %u",
  119. be_soc->ppeds_tx_desc.num_allocated,
  120. be_soc->ppeds_tx_desc.num_free);
  121. DP_PRINT_STATS("PPE-DS Tx desc alloc failed %u",
  122. be_soc->ppeds_stats.tx.desc_alloc_failed);
  123. dp_ppeds_print_assert_war_stats(be_soc);
  124. }
  125. static void dp_ppeds_clear_stats(struct dp_soc *soc)
  126. {
  127. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  128. be_soc->ppeds_stats.tx.desc_alloc_failed = 0;
  129. dp_ppeds_clear_assert_war_stats(be_soc);
  130. }
  131. static void dp_ppeds_rings_stats(struct dp_soc *soc)
  132. {
  133. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  134. int i = 0;
  135. DP_PRINT_STATS("Ring utilization statistics");
  136. DP_PRINT_STATS("WBM2SW_RELEASE");
  137. for (i = 0; i < RING_USAGE_MAX; i++)
  138. DP_PRINT_STATS("\t %s utilized %d instances",
  139. ring_usage_dump[i],
  140. be_soc->ppeds_wbm_release_ring.stats.util[i]);
  141. DP_PRINT_STATS("PPE2TCL");
  142. for (i = 0; i < RING_USAGE_MAX; i++)
  143. DP_PRINT_STATS("\t %s utilized %d instances",
  144. ring_usage_dump[i],
  145. be_soc->ppe2tcl_ring.stats.util[i]);
  146. }
  147. static void dp_ppeds_clear_rings_stats(struct dp_soc *soc)
  148. {
  149. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  150. memset(&be_soc->ppeds_wbm_release_ring.stats, 0,
  151. sizeof(struct ring_util_stats));
  152. memset(&be_soc->ppe2tcl_ring.stats, 0, sizeof(struct ring_util_stats));
  153. }
  154. #endif
  155. static void dp_soc_cfg_attach_be(struct dp_soc *soc)
  156. {
  157. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  158. dp_soc_cfg_attach(soc);
  159. wlan_cfg_set_rx_rel_ring_id(soc_cfg_ctx, WBM2SW_REL_ERR_RING_NUM);
  160. soc->wlan_cfg_ctx->tcl_wbm_map_array = g_tcl_wbm_map_array;
  161. /* this is used only when dmac mode is enabled */
  162. soc->num_rx_refill_buf_rings = 1;
  163. soc->wlan_cfg_ctx->notify_frame_support =
  164. DP_MARK_NOTIFY_FRAME_SUPPORT;
  165. }
  166. qdf_size_t dp_get_context_size_be(enum dp_context_type context_type)
  167. {
  168. switch (context_type) {
  169. case DP_CONTEXT_TYPE_SOC:
  170. return sizeof(struct dp_soc_be);
  171. case DP_CONTEXT_TYPE_PDEV:
  172. return sizeof(struct dp_pdev_be);
  173. case DP_CONTEXT_TYPE_VDEV:
  174. return sizeof(struct dp_vdev_be);
  175. case DP_CONTEXT_TYPE_PEER:
  176. return sizeof(struct dp_peer_be);
  177. default:
  178. return 0;
  179. }
  180. }
  181. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  182. static uint64_t dp_get_cmem_chunk(struct dp_soc *soc, uint64_t size,
  183. enum CMEM_MEM_CLIENTS client)
  184. {
  185. uint64_t cmem_chunk;
  186. dp_info("cmem base 0x%llx, total size 0x%llx avail_size 0x%llx",
  187. soc->cmem_base, soc->cmem_total_size, soc->cmem_avail_size);
  188. /* Check if requested cmem space is available */
  189. if (soc->cmem_avail_size < size) {
  190. dp_err("cmem_size 0x%llx bytes < requested size 0x%llx bytes",
  191. soc->cmem_avail_size, size);
  192. return 0;
  193. }
  194. cmem_chunk = soc->cmem_base +
  195. (soc->cmem_total_size - soc->cmem_avail_size);
  196. soc->cmem_avail_size -= size;
  197. dp_info("Reserved cmem space 0x%llx, size 0x%llx for client %d",
  198. cmem_chunk, size, client);
  199. return cmem_chunk;
  200. }
  201. #endif
  202. #ifdef WLAN_SUPPORT_RX_FISA
  203. static uint64_t dp_get_fst_cmem_base_be(struct dp_soc *soc, uint64_t size)
  204. {
  205. return dp_get_cmem_chunk(soc, size, FISA_FST);
  206. }
  207. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  208. {
  209. arch_ops->dp_get_fst_cmem_base = dp_get_fst_cmem_base_be;
  210. }
  211. #else
  212. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  213. {
  214. }
  215. #endif
  216. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  217. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  218. /**
  219. * dp_cc_wbm_sw_en_cfg() - configure HW cookie conversion enablement
  220. * per wbm2sw ring
  221. *
  222. * @cc_cfg: HAL HW cookie conversion configuration structure pointer
  223. *
  224. * Return: None
  225. */
  226. #ifdef IPA_OPT_WIFI_DP
  227. static inline
  228. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  229. {
  230. cc_cfg->wbm2sw6_cc_en = 1;
  231. cc_cfg->wbm2sw5_cc_en = 0;
  232. cc_cfg->wbm2sw4_cc_en = 1;
  233. cc_cfg->wbm2sw3_cc_en = 1;
  234. cc_cfg->wbm2sw2_cc_en = 1;
  235. /* disable wbm2sw1 hw cc as it's for FW */
  236. cc_cfg->wbm2sw1_cc_en = 0;
  237. cc_cfg->wbm2sw0_cc_en = 1;
  238. cc_cfg->wbm2fw_cc_en = 0;
  239. }
  240. #else
  241. static inline
  242. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  243. {
  244. cc_cfg->wbm2sw6_cc_en = 1;
  245. cc_cfg->wbm2sw5_cc_en = 1;
  246. cc_cfg->wbm2sw4_cc_en = 1;
  247. cc_cfg->wbm2sw3_cc_en = 1;
  248. cc_cfg->wbm2sw2_cc_en = 1;
  249. /* disable wbm2sw1 hw cc as it's for FW */
  250. cc_cfg->wbm2sw1_cc_en = 0;
  251. cc_cfg->wbm2sw0_cc_en = 1;
  252. cc_cfg->wbm2fw_cc_en = 0;
  253. }
  254. #endif
  255. #else
  256. static inline
  257. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  258. {
  259. cc_cfg->wbm2sw6_cc_en = 1;
  260. cc_cfg->wbm2sw5_cc_en = 1;
  261. cc_cfg->wbm2sw4_cc_en = 1;
  262. cc_cfg->wbm2sw3_cc_en = 1;
  263. cc_cfg->wbm2sw2_cc_en = 1;
  264. cc_cfg->wbm2sw1_cc_en = 1;
  265. cc_cfg->wbm2sw0_cc_en = 1;
  266. cc_cfg->wbm2fw_cc_en = 0;
  267. }
  268. #endif
  269. /**
  270. * dp_cc_reg_cfg_init() - initialize and configure HW cookie
  271. * conversion register
  272. *
  273. * @soc: SOC handle
  274. * @is_4k_align: page address 4k aligned
  275. *
  276. * Return: None
  277. */
  278. static void dp_cc_reg_cfg_init(struct dp_soc *soc,
  279. bool is_4k_align)
  280. {
  281. struct hal_hw_cc_config cc_cfg = { 0 };
  282. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  283. if (soc->cdp_soc.ol_ops->get_con_mode &&
  284. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_FTM_MODE)
  285. return;
  286. if (!soc->wlan_cfg_ctx->hw_cc_enabled) {
  287. dp_info("INI skip HW CC register setting");
  288. return;
  289. }
  290. cc_cfg.lut_base_addr_31_0 = be_soc->cc_cmem_base;
  291. cc_cfg.cc_global_en = true;
  292. cc_cfg.page_4k_align = is_4k_align;
  293. cc_cfg.cookie_offset_msb = DP_CC_DESC_ID_SPT_VA_OS_MSB;
  294. cc_cfg.cookie_page_msb = DP_CC_DESC_ID_PPT_PAGE_OS_MSB;
  295. /* 36th bit should be 1 then HW know this is CMEM address */
  296. cc_cfg.lut_base_addr_39_32 = 0x10;
  297. cc_cfg.error_path_cookie_conv_en = true;
  298. cc_cfg.release_path_cookie_conv_en = true;
  299. dp_cc_wbm_sw_en_cfg(&cc_cfg);
  300. hal_cookie_conversion_reg_cfg_be(soc->hal_soc, &cc_cfg);
  301. }
  302. /**
  303. * dp_hw_cc_cmem_write() - DP wrapper function for CMEM buffer writing
  304. * @hal_soc_hdl: HAL SOC handle
  305. * @offset: CMEM address
  306. * @value: value to write
  307. *
  308. * Return: None.
  309. */
  310. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  311. uint32_t offset,
  312. uint32_t value)
  313. {
  314. hal_cmem_write(hal_soc_hdl, offset, value);
  315. }
  316. /**
  317. * dp_hw_cc_cmem_addr_init() - Check and initialize CMEM base address for
  318. * HW cookie conversion
  319. *
  320. * @soc: SOC handle
  321. *
  322. * Return: 0 in case of success, else error value
  323. */
  324. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  325. {
  326. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  327. be_soc->cc_cmem_base = dp_get_cmem_chunk(soc, DP_CC_PPT_MEM_SIZE,
  328. COOKIE_CONVERSION);
  329. return QDF_STATUS_SUCCESS;
  330. }
  331. #else
  332. static inline void dp_cc_reg_cfg_init(struct dp_soc *soc,
  333. bool is_4k_align) {}
  334. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  335. uint32_t offset,
  336. uint32_t value)
  337. { }
  338. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  339. {
  340. return QDF_STATUS_SUCCESS;
  341. }
  342. #endif
  343. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  344. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  345. uint8_t for_feature)
  346. {
  347. QDF_STATUS status = QDF_STATUS_E_NOMEM;
  348. switch (for_feature) {
  349. case COOKIE_CONVERSION:
  350. status = dp_hw_cc_cmem_addr_init(soc);
  351. break;
  352. default:
  353. dp_err("Invalid CMEM request");
  354. }
  355. return status;
  356. }
  357. #else
  358. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  359. uint8_t for_feature)
  360. {
  361. return QDF_STATUS_SUCCESS;
  362. }
  363. #endif
  364. QDF_STATUS
  365. dp_hw_cookie_conversion_attach(struct dp_soc_be *be_soc,
  366. struct dp_hw_cookie_conversion_t *cc_ctx,
  367. uint32_t num_descs,
  368. enum qdf_dp_desc_type desc_type,
  369. uint8_t desc_pool_id)
  370. {
  371. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  372. uint32_t num_spt_pages, i = 0;
  373. struct dp_spt_page_desc *spt_desc;
  374. struct qdf_mem_dma_page_t *dma_page;
  375. uint8_t chip_id;
  376. /* estimate how many SPT DDR pages needed */
  377. num_spt_pages = qdf_do_div(
  378. num_descs + (DP_CC_SPT_PAGE_MAX_ENTRIES - 1),
  379. DP_CC_SPT_PAGE_MAX_ENTRIES);
  380. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  381. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  382. dp_info("num_spt_pages needed %d", num_spt_pages);
  383. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  384. &cc_ctx->page_pool, qdf_page_size,
  385. num_spt_pages, 0, false);
  386. if (!cc_ctx->page_pool.dma_pages) {
  387. dp_err("spt ddr pages allocation failed");
  388. return QDF_STATUS_E_RESOURCES;
  389. }
  390. cc_ctx->page_desc_base = qdf_mem_malloc(
  391. num_spt_pages * sizeof(struct dp_spt_page_desc));
  392. if (!cc_ctx->page_desc_base) {
  393. dp_err("spt page descs allocation failed");
  394. goto fail_0;
  395. }
  396. chip_id = dp_mlo_get_chip_id(soc);
  397. cc_ctx->cmem_offset = dp_desc_pool_get_cmem_base(chip_id, desc_pool_id,
  398. desc_type);
  399. /* initial page desc */
  400. spt_desc = cc_ctx->page_desc_base;
  401. dma_page = cc_ctx->page_pool.dma_pages;
  402. while (i < num_spt_pages) {
  403. /* check if page address 4K aligned */
  404. if (qdf_unlikely(dma_page[i].page_p_addr & 0xFFF)) {
  405. dp_err("non-4k aligned pages addr %pK",
  406. (void *)dma_page[i].page_p_addr);
  407. goto fail_1;
  408. }
  409. spt_desc[i].page_v_addr =
  410. dma_page[i].page_v_addr_start;
  411. spt_desc[i].page_p_addr =
  412. dma_page[i].page_p_addr;
  413. i++;
  414. }
  415. cc_ctx->total_page_num = num_spt_pages;
  416. qdf_spinlock_create(&cc_ctx->cc_lock);
  417. return QDF_STATUS_SUCCESS;
  418. fail_1:
  419. qdf_mem_free(cc_ctx->page_desc_base);
  420. cc_ctx->page_desc_base = NULL;
  421. fail_0:
  422. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  423. &cc_ctx->page_pool, 0, false);
  424. return QDF_STATUS_E_FAILURE;
  425. }
  426. QDF_STATUS
  427. dp_hw_cookie_conversion_detach(struct dp_soc_be *be_soc,
  428. struct dp_hw_cookie_conversion_t *cc_ctx)
  429. {
  430. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  431. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  432. &cc_ctx->page_pool, 0, false);
  433. if (cc_ctx->page_desc_base)
  434. qdf_spinlock_destroy(&cc_ctx->cc_lock);
  435. qdf_mem_free(cc_ctx->page_desc_base);
  436. cc_ctx->page_desc_base = NULL;
  437. return QDF_STATUS_SUCCESS;
  438. }
  439. QDF_STATUS
  440. dp_hw_cookie_conversion_init(struct dp_soc_be *be_soc,
  441. struct dp_hw_cookie_conversion_t *cc_ctx)
  442. {
  443. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  444. uint32_t i = 0;
  445. struct dp_spt_page_desc *spt_desc;
  446. uint32_t ppt_index;
  447. uint32_t ppt_id_start;
  448. if (!cc_ctx->total_page_num) {
  449. dp_err("total page num is 0");
  450. return QDF_STATUS_E_INVAL;
  451. }
  452. ppt_id_start = DP_CMEM_OFFSET_TO_PPT_ID(cc_ctx->cmem_offset);
  453. spt_desc = cc_ctx->page_desc_base;
  454. while (i < cc_ctx->total_page_num) {
  455. /* write page PA to CMEM */
  456. dp_hw_cc_cmem_write(soc->hal_soc,
  457. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  458. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  459. (spt_desc[i].page_p_addr >>
  460. DP_CC_PPT_ENTRY_HW_APEND_BITS_4K_ALIGNED));
  461. ppt_index = ppt_id_start + i;
  462. if (ppt_index >= DP_CC_PPT_MAX_ENTRIES)
  463. qdf_assert_always(0);
  464. spt_desc[i].ppt_index = ppt_index;
  465. be_soc->page_desc_base[ppt_index].page_v_addr =
  466. spt_desc[i].page_v_addr;
  467. i++;
  468. }
  469. return QDF_STATUS_SUCCESS;
  470. }
  471. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  472. QDF_STATUS
  473. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  474. struct dp_hw_cookie_conversion_t *cc_ctx)
  475. {
  476. uint32_t ppt_index;
  477. struct dp_spt_page_desc *spt_desc;
  478. int i = 0;
  479. spt_desc = cc_ctx->page_desc_base;
  480. while (i < cc_ctx->total_page_num) {
  481. ppt_index = spt_desc[i].ppt_index;
  482. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  483. i++;
  484. }
  485. return QDF_STATUS_SUCCESS;
  486. }
  487. #else
  488. QDF_STATUS
  489. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  490. struct dp_hw_cookie_conversion_t *cc_ctx)
  491. {
  492. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  493. uint32_t ppt_index;
  494. struct dp_spt_page_desc *spt_desc;
  495. int i = 0;
  496. spt_desc = cc_ctx->page_desc_base;
  497. while (i < cc_ctx->total_page_num) {
  498. /* reset PA in CMEM to NULL */
  499. dp_hw_cc_cmem_write(soc->hal_soc,
  500. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  501. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  502. 0);
  503. ppt_index = spt_desc[i].ppt_index;
  504. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  505. i++;
  506. }
  507. return QDF_STATUS_SUCCESS;
  508. }
  509. #endif
  510. #ifdef WLAN_SUPPORT_PPEDS
  511. static QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  512. {
  513. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  514. int target_type = hal_get_target_type(soc->hal_soc);
  515. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  516. /*
  517. * Check if PPE DS is enabled and wlan soc supports it.
  518. */
  519. if (!wlan_cfg_get_dp_soc_ppeds_enable(soc->wlan_cfg_ctx) ||
  520. !dp_ppeds_target_supported(target_type))
  521. return QDF_STATUS_SUCCESS;
  522. if (dp_ppeds_attach_soc_be(be_soc) != QDF_STATUS_SUCCESS)
  523. return QDF_STATUS_SUCCESS;
  524. cdp_ops->ppeds_ops = &dp_ops_ppeds_be;
  525. return QDF_STATUS_SUCCESS;
  526. }
  527. static QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  528. {
  529. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  530. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  531. if (!be_soc->ppeds_handle)
  532. return QDF_STATUS_E_FAILURE;
  533. dp_ppeds_detach_soc_be(be_soc);
  534. cdp_ops->ppeds_ops = NULL;
  535. return QDF_STATUS_SUCCESS;
  536. }
  537. static QDF_STATUS dp_peer_ppeds_default_route_be(struct dp_soc *soc,
  538. struct dp_peer_be *be_peer,
  539. uint8_t vdev_id,
  540. uint16_t src_info)
  541. {
  542. uint16_t service_code;
  543. uint8_t priority_valid;
  544. uint8_t use_ppe_ds = PEER_ROUTING_USE_PPE;
  545. uint8_t peer_routing_enabled = PEER_ROUTING_ENABLED;
  546. QDF_STATUS status = QDF_STATUS_SUCCESS;
  547. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  548. struct dp_vdev_be *be_vdev;
  549. be_vdev = dp_get_be_vdev_from_dp_vdev(be_peer->peer.vdev);
  550. /*
  551. * Program service code bypass to avoid L2 new mac address
  552. * learning exception when fdb learning is disabled.
  553. */
  554. service_code = PPE_DRV_SC_SPF_BYPASS;
  555. priority_valid = be_peer->priority_valid;
  556. /*
  557. * if FST is enabled then let flow rule take the decision of
  558. * routing the pkt to DS or host
  559. */
  560. if (wlan_cfg_is_rx_flow_tag_enabled(cfg))
  561. use_ppe_ds = 0;
  562. if (soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing) {
  563. status =
  564. soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing
  565. (soc->ctrl_psoc,
  566. be_peer->peer.mac_addr.raw,
  567. service_code, priority_valid,
  568. src_info, vdev_id, use_ppe_ds,
  569. peer_routing_enabled);
  570. if (status != QDF_STATUS_SUCCESS) {
  571. dp_err("vdev_id: %d, PPE peer routing mac:"
  572. QDF_MAC_ADDR_FMT, vdev_id,
  573. QDF_MAC_ADDR_REF(be_peer->peer.mac_addr.raw));
  574. return QDF_STATUS_E_FAILURE;
  575. }
  576. }
  577. return QDF_STATUS_SUCCESS;
  578. }
  579. #ifdef WLAN_FEATURE_11BE_MLO
  580. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  581. struct dp_peer *peer,
  582. struct dp_vdev_be *be_vdev,
  583. void *args)
  584. {
  585. struct dp_peer *mld_peer;
  586. struct dp_soc *mld_soc;
  587. struct dp_soc_be *be_soc;
  588. struct cdp_soc_t *cdp_soc;
  589. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  590. struct cdp_ds_vp_params vp_params = {0};
  591. struct dp_ppe_vp_profile *ppe_vp_profile = (struct dp_ppe_vp_profile *)args;
  592. uint16_t src_info = ppe_vp_profile->vp_num;
  593. uint8_t vdev_id = be_vdev->vdev.vdev_id;
  594. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  595. if (!be_peer) {
  596. dp_err("BE peer is null");
  597. return QDF_STATUS_E_NULL_VALUE;
  598. }
  599. if (IS_DP_LEGACY_PEER(peer)) {
  600. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  601. vdev_id, src_info);
  602. } else if (IS_MLO_DP_MLD_PEER(peer)) {
  603. int i;
  604. struct dp_peer *link_peer = NULL;
  605. struct dp_mld_link_peers link_peers_info;
  606. /* get link peers with reference */
  607. dp_get_link_peers_ref_from_mld_peer(soc, peer, &link_peers_info,
  608. DP_MOD_ID_DS);
  609. for (i = 0; i < link_peers_info.num_links; i++) {
  610. link_peer = link_peers_info.link_peers[i];
  611. be_peer = dp_get_be_peer_from_dp_peer(link_peer);
  612. if (!be_peer) {
  613. dp_err("BE peer is null");
  614. continue;
  615. }
  616. be_vdev = dp_get_be_vdev_from_dp_vdev(link_peer->vdev);
  617. if (!be_vdev) {
  618. dp_err("BE vap is null for peer id %d ",
  619. link_peer->peer_id);
  620. continue;
  621. }
  622. vdev_id = be_vdev->vdev.vdev_id;
  623. soc = link_peer->vdev->pdev->soc;
  624. qdf_status = dp_peer_ppeds_default_route_be(soc,
  625. be_peer,
  626. vdev_id,
  627. src_info);
  628. }
  629. dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_DS);
  630. } else {
  631. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  632. if (!mld_peer)
  633. return qdf_status;
  634. /*
  635. * In case of MLO link peer,
  636. * Fetch the VP profile from the mld vdev.
  637. */
  638. be_vdev = dp_get_be_vdev_from_dp_vdev(mld_peer->vdev);
  639. if (!be_vdev) {
  640. dp_err("BE vap is null");
  641. return QDF_STATUS_E_NULL_VALUE;
  642. }
  643. /*
  644. * Extract the VP profile from the vap
  645. * in case of MLO peer, we have to get the profile from
  646. * the MLD vdev's osif handle and not the link peer.
  647. */
  648. mld_soc = mld_peer->vdev->pdev->soc;
  649. cdp_soc = &mld_soc->cdp_soc;
  650. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  651. dp_err("%pK: Register PPEDS profile info API before use", cdp_soc);
  652. return QDF_STATUS_E_NULL_VALUE;
  653. }
  654. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(mld_soc->ctrl_psoc,
  655. mld_peer->vdev->vdev_id,
  656. &vp_params);
  657. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  658. dp_err("%pK: Failed to get ppeds profile for mld soc", mld_soc);
  659. return qdf_status;
  660. }
  661. /*
  662. * Check if PPE DS routing is enabled on
  663. * the associated vap.
  664. */
  665. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  666. return qdf_status;
  667. be_soc = dp_get_be_soc_from_dp_soc(mld_soc);
  668. ppe_vp_profile = &be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx];
  669. src_info = ppe_vp_profile->vp_num;
  670. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  671. vdev_id, src_info);
  672. }
  673. return qdf_status;
  674. }
  675. #else
  676. static QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  677. struct dp_peer *peer,
  678. struct dp_vdev_be *be_vdev
  679. void *args)
  680. {
  681. struct dp_ppe_vp_profile *vp_profile = (struct dp_ppe_vp_profile *)args;
  682. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  683. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  684. if (!be_peer) {
  685. dp_err("BE peer is null");
  686. return QDF_STATUS_E_NULL_VALUE;
  687. }
  688. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  689. be_vdev->vdev.vdev_id,
  690. vp_profile->vp_num);
  691. return qdf_status;
  692. }
  693. #endif
  694. #else
  695. static QDF_STATUS dp_ppeds_init_soc_be(struct dp_soc *soc)
  696. {
  697. return QDF_STATUS_SUCCESS;
  698. }
  699. static QDF_STATUS dp_ppeds_deinit_soc_be(struct dp_soc *soc)
  700. {
  701. return QDF_STATUS_SUCCESS;
  702. }
  703. static inline QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  704. {
  705. return QDF_STATUS_SUCCESS;
  706. }
  707. static inline QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  708. {
  709. return QDF_STATUS_SUCCESS;
  710. }
  711. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc, struct dp_peer *peer,
  712. struct dp_vdev_be *be_vdev,
  713. void *args)
  714. {
  715. return QDF_STATUS_SUCCESS;
  716. }
  717. static inline void dp_ppeds_stop_soc_be(struct dp_soc *soc)
  718. {
  719. }
  720. #endif /* WLAN_SUPPORT_PPEDS */
  721. void dp_reo_shared_qaddr_detach(struct dp_soc *soc)
  722. {
  723. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  724. REO_QUEUE_REF_ML_TABLE_SIZE,
  725. soc->reo_qref.mlo_reo_qref_table_vaddr,
  726. soc->reo_qref.mlo_reo_qref_table_paddr, 0);
  727. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  728. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  729. soc->reo_qref.non_mlo_reo_qref_table_vaddr,
  730. soc->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  731. }
  732. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  733. static void dp_soc_tx_cookie_detach_be(struct dp_soc *soc)
  734. {
  735. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  736. int i = 0;
  737. struct dp_global_context *dp_global;
  738. dp_global = wlan_objmgr_get_global_ctx();
  739. dp_global->tx_cookie_ctx_alloc_cnt--;
  740. if (dp_global->tx_cookie_ctx_alloc_cnt == 0) {
  741. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  742. dp_hw_cookie_conversion_detach(be_soc,
  743. dp_global->tx_cc_ctx[i]);
  744. qdf_mem_free(dp_global->tx_cc_ctx[i]);
  745. }
  746. }
  747. dp_global->spcl_tx_cookie_ctx_alloc_cnt--;
  748. if (dp_global->spcl_tx_cookie_ctx_alloc_cnt == 0) {
  749. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  750. dp_hw_cookie_conversion_detach(
  751. be_soc,
  752. dp_global->spcl_tx_cc_ctx[i]);
  753. qdf_mem_free(dp_global->spcl_tx_cc_ctx[i]);
  754. }
  755. }
  756. }
  757. static QDF_STATUS dp_soc_tx_cookie_attach_be(struct dp_soc *soc)
  758. {
  759. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  760. struct dp_hw_cookie_conversion_t *cc_ctx;
  761. struct dp_global_context *dp_global;
  762. struct dp_hw_cookie_conversion_t *spcl_cc_ctx;
  763. uint32_t num_entries;
  764. int i = 0;
  765. QDF_STATUS qdf_status;
  766. dp_global = wlan_objmgr_get_global_ctx();
  767. if (dp_global->tx_cookie_ctx_alloc_cnt == 0) {
  768. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  769. dp_global->tx_cc_ctx[i] =
  770. qdf_mem_malloc(
  771. sizeof(struct dp_hw_cookie_conversion_t));
  772. cc_ctx = dp_global->tx_cc_ctx[i];
  773. num_entries =
  774. wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  775. qdf_status =
  776. dp_hw_cookie_conversion_attach(
  777. be_soc,
  778. cc_ctx,
  779. num_entries,
  780. QDF_DP_TX_DESC_TYPE, i);
  781. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  782. return QDF_STATUS_E_FAILURE;
  783. }
  784. }
  785. dp_global->tx_cookie_ctx_alloc_cnt++;
  786. if (dp_global->spcl_tx_cookie_ctx_alloc_cnt == 0) {
  787. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  788. dp_global->spcl_tx_cc_ctx[i] =
  789. qdf_mem_malloc(
  790. sizeof(struct dp_hw_cookie_conversion_t));
  791. spcl_cc_ctx = dp_global->spcl_tx_cc_ctx[i];
  792. num_entries =
  793. wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
  794. qdf_status =
  795. dp_hw_cookie_conversion_attach(
  796. be_soc,
  797. spcl_cc_ctx,
  798. num_entries,
  799. QDF_DP_TX_SPCL_DESC_TYPE, i);
  800. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  801. return QDF_STATUS_E_FAILURE;
  802. }
  803. }
  804. dp_global->spcl_tx_cookie_ctx_alloc_cnt++;
  805. return QDF_STATUS_SUCCESS;
  806. }
  807. static void dp_soc_tx_cookie_deinit_be(struct dp_soc *soc)
  808. {
  809. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  810. struct dp_global_context *dp_global;
  811. int i = 0;
  812. dp_global = wlan_objmgr_get_global_ctx();
  813. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  814. dp_hw_cookie_conversion_deinit(
  815. be_soc,
  816. dp_global->tx_cc_ctx[i]);
  817. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  818. dp_hw_cookie_conversion_deinit(be_soc,
  819. dp_global->spcl_tx_cc_ctx[i]);
  820. }
  821. static QDF_STATUS dp_soc_tx_cookie_init_be(struct dp_soc *soc)
  822. {
  823. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  824. struct dp_global_context *dp_global;
  825. struct dp_hw_cookie_conversion_t *cc_ctx;
  826. struct dp_hw_cookie_conversion_t *spcl_cc_ctx;
  827. QDF_STATUS qdf_status;
  828. int i = 0;
  829. dp_global = wlan_objmgr_get_global_ctx();
  830. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  831. cc_ctx = dp_global->tx_cc_ctx[i];
  832. qdf_status =
  833. dp_hw_cookie_conversion_init(be_soc,
  834. cc_ctx);
  835. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  836. return QDF_STATUS_E_FAILURE;
  837. }
  838. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  839. spcl_cc_ctx = dp_global->spcl_tx_cc_ctx[i];
  840. qdf_status =
  841. dp_hw_cookie_conversion_init(be_soc,
  842. spcl_cc_ctx);
  843. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  844. return QDF_STATUS_E_FAILURE;
  845. }
  846. return QDF_STATUS_SUCCESS;
  847. }
  848. #else
  849. static void dp_soc_tx_cookie_detach_be(struct dp_soc *soc)
  850. {
  851. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  852. int i = 0;
  853. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  854. dp_hw_cookie_conversion_detach(
  855. be_soc,
  856. &be_soc->tx_cc_ctx[i]);
  857. }
  858. }
  859. static QDF_STATUS dp_soc_tx_cookie_attach_be(struct dp_soc *soc)
  860. {
  861. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  862. uint32_t num_entries;
  863. int i = 0;
  864. QDF_STATUS qdf_status;
  865. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  866. num_entries = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  867. qdf_status =
  868. dp_hw_cookie_conversion_attach(
  869. be_soc,
  870. &be_soc->tx_cc_ctx[i],
  871. num_entries,
  872. QDF_DP_TX_DESC_TYPE, i);
  873. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  874. return QDF_STATUS_E_FAILURE;
  875. }
  876. return QDF_STATUS_SUCCESS;
  877. }
  878. static void dp_soc_tx_cookie_deinit_be(struct dp_soc *soc)
  879. {
  880. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  881. int i = 0;
  882. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  883. dp_hw_cookie_conversion_deinit(
  884. be_soc,
  885. &be_soc->tx_cc_ctx[i]);
  886. }
  887. static QDF_STATUS dp_soc_tx_cookie_init_be(struct dp_soc *soc)
  888. {
  889. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  890. int i = 0;
  891. QDF_STATUS qdf_status;
  892. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  893. qdf_status =
  894. dp_hw_cookie_conversion_init(
  895. be_soc,
  896. &be_soc->tx_cc_ctx[i]);
  897. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  898. return QDF_STATUS_E_FAILURE;
  899. }
  900. return QDF_STATUS_SUCCESS;
  901. }
  902. #endif
  903. static QDF_STATUS dp_soc_detach_be(struct dp_soc *soc)
  904. {
  905. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  906. dp_mlo_dev_obj_t mlo_dev_obj;
  907. int i = 0;
  908. dp_soc_ppeds_detach_be(soc);
  909. dp_reo_shared_qaddr_detach(soc);
  910. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  911. dp_mlo_dev_ctxt_list_detach_wrapper(mlo_dev_obj);
  912. dp_soc_tx_cookie_detach_be(soc);
  913. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  914. dp_hw_cookie_conversion_detach(be_soc,
  915. &be_soc->rx_cc_ctx[i]);
  916. qdf_mem_free(be_soc->page_desc_base);
  917. be_soc->page_desc_base = NULL;
  918. return QDF_STATUS_SUCCESS;
  919. }
  920. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  921. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  922. {
  923. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  924. if (dp_global)
  925. dp_global->fst_ctx = fst;
  926. }
  927. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  928. {
  929. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  930. if (dp_global)
  931. return dp_global->fst_ctx;
  932. return NULL;
  933. }
  934. static uint32_t dp_rx_fst_release_ref_be(void)
  935. {
  936. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  937. uint32_t rx_fst_ref_cnt;
  938. if (dp_global) {
  939. rx_fst_ref_cnt = qdf_atomic_read(&dp_global->rx_fst_ref_cnt);
  940. qdf_atomic_dec(&dp_global->rx_fst_ref_cnt);
  941. return rx_fst_ref_cnt;
  942. }
  943. return 1;
  944. }
  945. static void dp_rx_fst_get_ref_be(void)
  946. {
  947. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  948. if (dp_global)
  949. qdf_atomic_inc(&dp_global->rx_fst_ref_cnt);
  950. }
  951. #else
  952. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  953. {
  954. }
  955. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  956. {
  957. return NULL;
  958. }
  959. static uint32_t dp_rx_fst_release_ref_be(void)
  960. {
  961. return 1;
  962. }
  963. static void dp_rx_fst_get_ref_be(void)
  964. {
  965. }
  966. #endif
  967. #ifdef WLAN_MLO_MULTI_CHIP
  968. #ifdef WLAN_MCAST_MLO
  969. static inline void
  970. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  971. {
  972. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  973. be_vdev->mcast_primary = false;
  974. hal_tx_mcast_mlo_reinject_routing_set(
  975. soc->hal_soc,
  976. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  977. if (vdev->opmode == wlan_op_mode_ap) {
  978. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  979. vdev->vdev_id,
  980. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  981. }
  982. }
  983. static inline void
  984. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  985. {
  986. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  987. be_vdev->mcast_primary = false;
  988. vdev->mlo_vdev = 0;
  989. }
  990. #else
  991. static inline void
  992. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  993. {
  994. }
  995. static inline void
  996. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  997. {
  998. }
  999. #endif
  1000. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  1001. struct cdp_lro_hash_config *lro_hash)
  1002. {
  1003. dp_mlo_get_rx_hash_key(soc, lro_hash);
  1004. }
  1005. #ifdef WLAN_DP_MLO_DEV_CTX
  1006. static inline void
  1007. dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1008. struct dp_vdev *vdev,
  1009. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1010. {
  1011. uint8_t pdev_id = vdev->pdev->pdev_id;
  1012. qdf_spin_lock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1013. if (vdev->is_bridge_vdev) {
  1014. if (mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id]
  1015. != CDP_INVALID_VDEV_ID)
  1016. dp_alert("bridge vdevId in MLO dev ctx is not Invalid"
  1017. "chip_id: %u, pdev_id: %u,"
  1018. "existing vdev_id: %u, new vdev_id : %u",
  1019. be_soc->mlo_chip_id, pdev_id,
  1020. mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id],
  1021. vdev->vdev_id);
  1022. mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id] =
  1023. vdev->vdev_id;
  1024. mlo_dev_ctxt->is_bridge_vdev_present = 1;
  1025. } else {
  1026. if (mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id]
  1027. != CDP_INVALID_VDEV_ID)
  1028. dp_alert("vdevId in MLO dev ctx is not Invalid"
  1029. "chip_id: %u, pdev_id: %u,"
  1030. "existing vdev_id: %u, new vdev_id : %u",
  1031. be_soc->mlo_chip_id, pdev_id,
  1032. mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id],
  1033. vdev->vdev_id);
  1034. mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] =
  1035. vdev->vdev_id;
  1036. }
  1037. mlo_dev_ctxt->vdev_count++;
  1038. qdf_spin_unlock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1039. }
  1040. static inline QDF_STATUS
  1041. dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1042. struct dp_vdev *vdev,
  1043. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1044. {
  1045. uint8_t pdev_id = vdev->pdev->pdev_id;
  1046. if (mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] ==
  1047. CDP_INVALID_VDEV_ID) {
  1048. return QDF_STATUS_E_INVAL;
  1049. }
  1050. qdf_spin_lock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1051. if (vdev->is_bridge_vdev) {
  1052. mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id] =
  1053. CDP_INVALID_VDEV_ID;
  1054. } else {
  1055. mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] =
  1056. CDP_INVALID_VDEV_ID;
  1057. }
  1058. mlo_dev_ctxt->vdev_count--;
  1059. qdf_spin_unlock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1060. return QDF_STATUS_SUCCESS;
  1061. }
  1062. #endif /* WLAN_DP_MLO_DEV_CTX */
  1063. #else
  1064. static inline void
  1065. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  1066. {
  1067. }
  1068. static inline void
  1069. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  1070. {
  1071. }
  1072. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  1073. struct cdp_lro_hash_config *lro_hash)
  1074. {
  1075. dp_get_rx_hash_key_bytes(lro_hash);
  1076. }
  1077. #ifdef WLAN_DP_MLO_DEV_CTX
  1078. static inline void
  1079. dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1080. struct dp_vdev *vdev,
  1081. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1082. {
  1083. }
  1084. static inline QDF_STATUS
  1085. dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1086. struct dp_vdev *vdev,
  1087. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1088. {
  1089. }
  1090. #endif /* WLAN_DP_MLO_DEV_CTX */
  1091. #endif
  1092. static QDF_STATUS dp_soc_attach_be(struct dp_soc *soc,
  1093. struct cdp_soc_attach_params *params)
  1094. {
  1095. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1096. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1097. uint32_t max_tx_rx_desc_num, num_spt_pages;
  1098. uint32_t num_entries;
  1099. int i = 0;
  1100. dp_mlo_dev_obj_t mlo_dev_obj;
  1101. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  1102. max_tx_rx_desc_num = WLAN_CFG_NUM_TX_DESC_MAX * MAX_TXDESC_POOLS +
  1103. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX * MAX_RXDESC_POOLS +
  1104. WLAN_CFG_NUM_PPEDS_TX_DESC_MAX * MAX_PPE_TXDESC_POOLS;
  1105. /* estimate how many SPT DDR pages needed */
  1106. num_spt_pages = max_tx_rx_desc_num / DP_CC_SPT_PAGE_MAX_ENTRIES;
  1107. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  1108. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  1109. be_soc->page_desc_base = qdf_mem_malloc(
  1110. DP_CC_PPT_MAX_ENTRIES * sizeof(struct dp_spt_page_desc));
  1111. if (!be_soc->page_desc_base) {
  1112. dp_err("spt page descs allocation failed");
  1113. return QDF_STATUS_E_NOMEM;
  1114. }
  1115. soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id();
  1116. qdf_status = dp_get_cmem_allocation(soc, COOKIE_CONVERSION);
  1117. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1118. goto fail;
  1119. dp_soc_mlo_fill_params(soc, params);
  1120. /* Initialize common cdp mlo ops */
  1121. dp_soc_initialize_cdp_cmn_mlo_ops(soc);
  1122. /* Initialize MLO device ctxt list */
  1123. dp_mlo_dev_ctxt_list_attach_wrapper(mlo_dev_obj);
  1124. qdf_status = dp_soc_ppeds_attach_be(soc);
  1125. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1126. goto fail;
  1127. qdf_status = dp_soc_tx_cookie_attach_be(soc);
  1128. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1129. goto fail;
  1130. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  1131. num_entries =
  1132. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  1133. qdf_status =
  1134. dp_hw_cookie_conversion_attach(be_soc,
  1135. &be_soc->rx_cc_ctx[i],
  1136. num_entries,
  1137. QDF_DP_RX_DESC_BUF_TYPE,
  1138. i);
  1139. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1140. goto fail;
  1141. }
  1142. return qdf_status;
  1143. fail:
  1144. dp_soc_detach_be(soc);
  1145. return qdf_status;
  1146. }
  1147. static QDF_STATUS dp_soc_deinit_be(struct dp_soc *soc)
  1148. {
  1149. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1150. int i = 0;
  1151. qdf_atomic_set(&soc->cmn_init_done, 0);
  1152. dp_ppeds_stop_soc_be(soc);
  1153. dp_tx_deinit_bank_profiles(be_soc);
  1154. dp_soc_tx_cookie_deinit_be(soc);
  1155. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  1156. dp_hw_cookie_conversion_deinit(be_soc,
  1157. &be_soc->rx_cc_ctx[i]);
  1158. dp_ppeds_deinit_soc_be(soc);
  1159. return QDF_STATUS_SUCCESS;
  1160. }
  1161. static QDF_STATUS dp_soc_deinit_be_wrapper(struct dp_soc *soc)
  1162. {
  1163. QDF_STATUS qdf_status;
  1164. qdf_status = dp_soc_deinit_be(soc);
  1165. if (QDF_IS_STATUS_ERROR(qdf_status))
  1166. return qdf_status;
  1167. dp_soc_deinit(soc);
  1168. return QDF_STATUS_SUCCESS;
  1169. }
  1170. static void *dp_soc_init_be(struct dp_soc *soc, HTC_HANDLE htc_handle,
  1171. struct hif_opaque_softc *hif_handle)
  1172. {
  1173. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1174. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1175. int i = 0;
  1176. void *ret_addr;
  1177. wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
  1178. WLAN_MD_DP_SOC, "dp_soc");
  1179. soc->hif_handle = hif_handle;
  1180. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  1181. if (!soc->hal_soc)
  1182. return NULL;
  1183. dp_ppeds_init_soc_be(soc);
  1184. qdf_status = dp_soc_tx_cookie_init_be(soc);
  1185. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1186. goto fail;
  1187. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  1188. qdf_status =
  1189. dp_hw_cookie_conversion_init(be_soc,
  1190. &be_soc->rx_cc_ctx[i]);
  1191. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1192. goto fail;
  1193. }
  1194. /* route vdev_id mismatch notification via FW completion */
  1195. hal_tx_vdev_mismatch_routing_set(soc->hal_soc,
  1196. HAL_TX_VDEV_MISMATCH_FW_NOTIFY);
  1197. qdf_status = dp_tx_init_bank_profiles(be_soc);
  1198. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1199. goto fail;
  1200. /* write WBM/REO cookie conversion CFG register */
  1201. dp_cc_reg_cfg_init(soc, true);
  1202. ret_addr = dp_soc_init(soc, htc_handle, hif_handle);
  1203. if (!ret_addr)
  1204. goto fail;
  1205. return ret_addr;
  1206. fail:
  1207. dp_soc_deinit_be(soc);
  1208. return NULL;
  1209. }
  1210. static QDF_STATUS dp_pdev_attach_be(struct dp_pdev *pdev,
  1211. struct cdp_pdev_attach_params *params)
  1212. {
  1213. dp_pdev_mlo_fill_params(pdev, params);
  1214. return QDF_STATUS_SUCCESS;
  1215. }
  1216. static QDF_STATUS dp_pdev_detach_be(struct dp_pdev *pdev)
  1217. {
  1218. dp_mlo_update_link_to_pdev_unmap(pdev->soc, pdev);
  1219. return QDF_STATUS_SUCCESS;
  1220. }
  1221. #ifdef INTRA_BSS_FWD_OFFLOAD
  1222. static
  1223. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  1224. {
  1225. soc->cdp_soc.ol_ops->vdev_set_intra_bss(soc->ctrl_psoc, vdev_id,
  1226. enable);
  1227. }
  1228. #else
  1229. static
  1230. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  1231. {
  1232. }
  1233. #endif
  1234. static QDF_STATUS dp_vdev_attach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1235. {
  1236. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1237. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1238. struct dp_pdev *pdev = vdev->pdev;
  1239. if (vdev->opmode == wlan_op_mode_monitor)
  1240. return QDF_STATUS_SUCCESS;
  1241. be_vdev->vdev_id_check_en = DP_TX_VDEV_ID_CHECK_ENABLE;
  1242. be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);
  1243. vdev->bank_id = be_vdev->bank_id;
  1244. if (be_vdev->bank_id == DP_BE_INVALID_BANK_ID) {
  1245. QDF_BUG(0);
  1246. return QDF_STATUS_E_FAULT;
  1247. }
  1248. if (vdev->opmode == wlan_op_mode_sta) {
  1249. if (soc->cdp_soc.ol_ops->set_mec_timer)
  1250. soc->cdp_soc.ol_ops->set_mec_timer(
  1251. soc->ctrl_psoc,
  1252. vdev->vdev_id,
  1253. DP_AST_AGING_TIMER_DEFAULT_MS);
  1254. if (pdev->isolation)
  1255. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1256. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1257. else
  1258. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1259. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1260. } else if (vdev->ap_bridge_enabled) {
  1261. dp_vdev_set_intra_bss(soc, vdev->vdev_id, true);
  1262. }
  1263. dp_mlo_mcast_init(soc, vdev);
  1264. return QDF_STATUS_SUCCESS;
  1265. }
  1266. static QDF_STATUS dp_vdev_detach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1267. {
  1268. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1269. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1270. if (vdev->opmode == wlan_op_mode_monitor)
  1271. return QDF_STATUS_SUCCESS;
  1272. if (vdev->opmode == wlan_op_mode_ap)
  1273. dp_mlo_mcast_deinit(soc, vdev);
  1274. dp_tx_put_bank_profile(be_soc, be_vdev);
  1275. return QDF_STATUS_SUCCESS;
  1276. }
  1277. #ifdef WLAN_SUPPORT_PPEDS
  1278. static void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1279. uint8_t *peer_mac)
  1280. {
  1281. struct dp_vdev_be *be_vdev;
  1282. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1283. struct dp_soc_be *be_soc;
  1284. struct cdp_ds_vp_params vp_params = {0};
  1285. struct cdp_soc_t *cdp_soc;
  1286. enum wlan_op_mode vdev_opmode;
  1287. struct dp_peer *peer;
  1288. struct dp_peer *tgt_peer = NULL;
  1289. struct dp_soc *tgt_soc = NULL;
  1290. peer = dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, DP_MOD_ID_CDP);
  1291. if (!peer)
  1292. return;
  1293. vdev_opmode = peer->vdev->opmode;
  1294. if (vdev_opmode != wlan_op_mode_ap &&
  1295. vdev_opmode != wlan_op_mode_sta) {
  1296. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1297. return;
  1298. }
  1299. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  1300. tgt_soc = tgt_peer->vdev->pdev->soc;
  1301. be_soc = dp_get_be_soc_from_dp_soc(tgt_soc);
  1302. cdp_soc = &tgt_soc->cdp_soc;
  1303. be_vdev = dp_get_be_vdev_from_dp_vdev(tgt_peer->vdev);
  1304. if (!be_vdev) {
  1305. qdf_err("BE vap is null");
  1306. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1307. goto fail;
  1308. }
  1309. /*
  1310. * Extract the VP profile from the VAP
  1311. */
  1312. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  1313. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  1314. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1315. goto fail;
  1316. }
  1317. /*
  1318. * Check if PPE DS routing is enabled on the associated vap.
  1319. */
  1320. qdf_status =
  1321. cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(tgt_soc->ctrl_psoc,
  1322. tgt_peer->vdev->vdev_id,
  1323. &vp_params);
  1324. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  1325. dp_err("%pK: Could not find ppeds profile info vdev", be_vdev);
  1326. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1327. goto fail;
  1328. }
  1329. if (vp_params.ppe_vp_type == PPE_VP_USER_TYPE_DS) {
  1330. qdf_status = dp_peer_setup_ppeds_be(tgt_soc, tgt_peer, be_vdev,
  1331. (void *)&be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx]);
  1332. }
  1333. fail:
  1334. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1335. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1336. dp_err("Unable to do ppeds peer setup");
  1337. qdf_assert_always(0);
  1338. }
  1339. }
  1340. #else
  1341. static inline
  1342. void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1343. uint8_t *peer_mac)
  1344. {
  1345. }
  1346. #endif
  1347. static QDF_STATUS dp_peer_setup_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1348. uint8_t *peer_mac,
  1349. struct cdp_peer_setup_info *setup_info)
  1350. {
  1351. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  1352. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1353. qdf_status = dp_peer_setup_wifi3(soc_hdl, vdev_id, peer_mac,
  1354. setup_info);
  1355. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1356. dp_err("Unable to dp peer setup");
  1357. return qdf_status;
  1358. }
  1359. dp_soc_txrx_peer_setup_be(soc, vdev_id, peer_mac);
  1360. return QDF_STATUS_SUCCESS;
  1361. }
  1362. qdf_size_t dp_get_soc_context_size_be(void)
  1363. {
  1364. return sizeof(struct dp_soc_be);
  1365. }
  1366. #ifdef CONFIG_WORD_BASED_TLV
  1367. /**
  1368. * dp_rxdma_ring_wmask_cfg_be() - Setup RXDMA ring word mask config
  1369. * @soc: Common DP soc handle
  1370. * @htt_tlv_filter: Rx SRNG TLV and filter setting
  1371. *
  1372. * Return: none
  1373. */
  1374. static inline void
  1375. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1376. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1377. {
  1378. htt_tlv_filter->rx_msdu_end_wmask =
  1379. hal_rx_msdu_end_wmask_get(soc->hal_soc);
  1380. htt_tlv_filter->rx_mpdu_start_wmask =
  1381. hal_rx_mpdu_start_wmask_get(soc->hal_soc);
  1382. }
  1383. #else
  1384. static inline void
  1385. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1386. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1387. {
  1388. }
  1389. #endif
  1390. #ifdef WLAN_SUPPORT_PPEDS
  1391. static
  1392. void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1393. int ring_type, int ring_num)
  1394. {
  1395. if (srng->irq >= 0) {
  1396. qdf_dev_clear_irq_status_flags(srng->irq, IRQ_DISABLE_UNLAZY);
  1397. if (ring_type == WBM2SW_RELEASE &&
  1398. ring_num == WBM2_SW_PPE_REL_RING_ID)
  1399. pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
  1400. else if (ring_type == REO2PPE || ring_type == PPE2TCL)
  1401. pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
  1402. dp_get_ppe_ds_ctxt(soc));
  1403. }
  1404. }
  1405. static
  1406. int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1407. int vector, int ring_type, int ring_num)
  1408. {
  1409. int irq = -1, ret = 0;
  1410. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1411. int pci_slot = pld_get_pci_slot(soc->osdev->dev);
  1412. srng->irq = -1;
  1413. irq = pld_get_msi_irq(soc->osdev->dev, vector);
  1414. qdf_dev_set_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1415. if (ring_type == WBM2SW_RELEASE &&
  1416. ring_num == WBM2_SW_PPE_REL_RING_ID) {
  1417. snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
  1418. "pci%d_ppe_wbm_rel", pci_slot);
  1419. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1420. dp_ppeds_handle_tx_comp,
  1421. IRQF_SHARED | IRQF_NO_SUSPEND,
  1422. be_soc->irq_name[2], (void *)soc);
  1423. if (ret)
  1424. goto fail;
  1425. } else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
  1426. snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
  1427. "pci%d_reo2ppe", pci_slot);
  1428. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1429. dp_ppe_ds_reo2ppe_irq_handler,
  1430. IRQF_SHARED | IRQF_NO_SUSPEND,
  1431. be_soc->irq_name[0],
  1432. dp_get_ppe_ds_ctxt(soc));
  1433. if (ret)
  1434. goto fail;
  1435. } else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
  1436. snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
  1437. "pci%d_ppe2tcl", pci_slot);
  1438. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1439. dp_ppe_ds_ppe2tcl_irq_handler,
  1440. IRQF_NO_SUSPEND,
  1441. be_soc->irq_name[1],
  1442. dp_get_ppe_ds_ctxt(soc));
  1443. if (ret)
  1444. goto fail;
  1445. pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
  1446. } else {
  1447. return 0;
  1448. }
  1449. srng->irq = irq;
  1450. dp_info("Registered irq %d for soc %pK ring type %d",
  1451. irq, soc, ring_type);
  1452. return 0;
  1453. fail:
  1454. dp_err("Unable to config irq : ring type %d irq %d vector %d",
  1455. ring_type, irq, vector);
  1456. qdf_dev_clear_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1457. return ret;
  1458. }
  1459. void dp_ppeds_disable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1460. {
  1461. if (srng->irq >= 0)
  1462. pld_pfrm_disable_irq_nosync(soc->osdev->dev, srng->irq);
  1463. }
  1464. void dp_ppeds_enable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1465. {
  1466. if (srng->irq >= 0)
  1467. pld_pfrm_enable_irq(soc->osdev->dev, srng->irq);
  1468. }
  1469. #endif
  1470. #ifdef NO_RX_PKT_HDR_TLV
  1471. /**
  1472. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1473. * @soc: Common DP soc handle
  1474. *
  1475. * Return: QDF_STATUS
  1476. */
  1477. static QDF_STATUS
  1478. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1479. {
  1480. int i;
  1481. int mac_id;
  1482. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1483. struct dp_srng *rx_mac_srng;
  1484. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1485. uint16_t buf_size;
  1486. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1487. /*
  1488. * In Beryllium chipset msdu_start, mpdu_end
  1489. * and rx_attn are part of msdu_end/mpdu_start
  1490. */
  1491. htt_tlv_filter.msdu_start = 0;
  1492. htt_tlv_filter.mpdu_end = 0;
  1493. htt_tlv_filter.attention = 0;
  1494. htt_tlv_filter.mpdu_start = 1;
  1495. htt_tlv_filter.msdu_end = 1;
  1496. htt_tlv_filter.packet = 1;
  1497. htt_tlv_filter.packet_header = 0;
  1498. htt_tlv_filter.ppdu_start = 0;
  1499. htt_tlv_filter.ppdu_end = 0;
  1500. htt_tlv_filter.ppdu_end_user_stats = 0;
  1501. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1502. htt_tlv_filter.ppdu_end_status_done = 0;
  1503. htt_tlv_filter.enable_fp = 1;
  1504. htt_tlv_filter.enable_md = 0;
  1505. htt_tlv_filter.enable_md = 0;
  1506. htt_tlv_filter.enable_mo = 0;
  1507. htt_tlv_filter.fp_mgmt_filter = 0;
  1508. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1509. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1510. FILTER_DATA_DATA);
  1511. htt_tlv_filter.fp_data_filter |=
  1512. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1513. FILTER_DATA_MCAST : 0;
  1514. htt_tlv_filter.mo_mgmt_filter = 0;
  1515. htt_tlv_filter.mo_ctrl_filter = 0;
  1516. htt_tlv_filter.mo_data_filter = 0;
  1517. htt_tlv_filter.md_data_filter = 0;
  1518. htt_tlv_filter.offset_valid = true;
  1519. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1520. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1521. htt_tlv_filter.rx_msdu_start_offset = 0;
  1522. htt_tlv_filter.rx_attn_offset = 0;
  1523. /*
  1524. * For monitor mode, the packet hdr tlv is enabled later during
  1525. * filter update
  1526. */
  1527. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1528. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1529. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1530. else
  1531. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1532. /*Not subscribing rx_pkt_header*/
  1533. htt_tlv_filter.rx_header_offset = 0;
  1534. htt_tlv_filter.rx_mpdu_start_offset =
  1535. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1536. htt_tlv_filter.rx_msdu_end_offset =
  1537. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1538. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1539. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1540. struct dp_pdev *pdev = soc->pdev_list[i];
  1541. if (!pdev)
  1542. continue;
  1543. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1544. int mac_for_pdev =
  1545. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1546. /*
  1547. * Obtain lmac id from pdev to access the LMAC ring
  1548. * in soc context
  1549. */
  1550. int lmac_id =
  1551. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1552. pdev->pdev_id);
  1553. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1554. if (!rx_mac_srng->hal_srng)
  1555. continue;
  1556. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1557. rx_mac_srng->hal_srng,
  1558. RXDMA_BUF, buf_size,
  1559. &htt_tlv_filter);
  1560. }
  1561. }
  1562. return status;
  1563. }
  1564. #else
  1565. /**
  1566. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1567. * @soc: Common DP soc handle
  1568. *
  1569. * Return: QDF_STATUS
  1570. */
  1571. static QDF_STATUS
  1572. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1573. {
  1574. int i;
  1575. int mac_id;
  1576. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1577. struct dp_srng *rx_mac_srng;
  1578. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1579. uint16_t buf_size;
  1580. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1581. /*
  1582. * In Beryllium chipset msdu_start, mpdu_end
  1583. * and rx_attn are part of msdu_end/mpdu_start
  1584. */
  1585. htt_tlv_filter.msdu_start = 0;
  1586. htt_tlv_filter.mpdu_end = 0;
  1587. htt_tlv_filter.attention = 0;
  1588. htt_tlv_filter.mpdu_start = 1;
  1589. htt_tlv_filter.msdu_end = 1;
  1590. htt_tlv_filter.packet = 1;
  1591. htt_tlv_filter.packet_header = 1;
  1592. htt_tlv_filter.ppdu_start = 0;
  1593. htt_tlv_filter.ppdu_end = 0;
  1594. htt_tlv_filter.ppdu_end_user_stats = 0;
  1595. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1596. htt_tlv_filter.ppdu_end_status_done = 0;
  1597. htt_tlv_filter.enable_fp = 1;
  1598. htt_tlv_filter.enable_md = 0;
  1599. htt_tlv_filter.enable_md = 0;
  1600. htt_tlv_filter.enable_mo = 0;
  1601. htt_tlv_filter.fp_mgmt_filter = 0;
  1602. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1603. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1604. FILTER_DATA_DATA);
  1605. htt_tlv_filter.fp_data_filter |=
  1606. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1607. FILTER_DATA_MCAST : 0;
  1608. htt_tlv_filter.mo_mgmt_filter = 0;
  1609. htt_tlv_filter.mo_ctrl_filter = 0;
  1610. htt_tlv_filter.mo_data_filter = 0;
  1611. htt_tlv_filter.md_data_filter = 0;
  1612. htt_tlv_filter.offset_valid = true;
  1613. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1614. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1615. htt_tlv_filter.rx_msdu_start_offset = 0;
  1616. htt_tlv_filter.rx_attn_offset = 0;
  1617. /*
  1618. * For monitor mode, the packet hdr tlv is enabled later during
  1619. * filter update
  1620. */
  1621. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1622. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1623. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1624. else
  1625. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1626. htt_tlv_filter.rx_header_offset =
  1627. hal_rx_pkt_tlv_offset_get(soc->hal_soc);
  1628. htt_tlv_filter.rx_mpdu_start_offset =
  1629. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1630. htt_tlv_filter.rx_msdu_end_offset =
  1631. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1632. dp_info("TLV subscription\n"
  1633. "msdu_start %d, mpdu_end %d, attention %d"
  1634. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n"
  1635. "TLV offsets\n"
  1636. "msdu_start %d, mpdu_end %d, attention %d"
  1637. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n",
  1638. htt_tlv_filter.msdu_start,
  1639. htt_tlv_filter.mpdu_end,
  1640. htt_tlv_filter.attention,
  1641. htt_tlv_filter.mpdu_start,
  1642. htt_tlv_filter.msdu_end,
  1643. htt_tlv_filter.packet_header,
  1644. htt_tlv_filter.packet,
  1645. htt_tlv_filter.rx_msdu_start_offset,
  1646. htt_tlv_filter.rx_mpdu_end_offset,
  1647. htt_tlv_filter.rx_attn_offset,
  1648. htt_tlv_filter.rx_mpdu_start_offset,
  1649. htt_tlv_filter.rx_msdu_end_offset,
  1650. htt_tlv_filter.rx_header_offset,
  1651. htt_tlv_filter.rx_packet_offset);
  1652. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1653. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1654. struct dp_pdev *pdev = soc->pdev_list[i];
  1655. if (!pdev)
  1656. continue;
  1657. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1658. int mac_for_pdev =
  1659. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1660. /*
  1661. * Obtain lmac id from pdev to access the LMAC ring
  1662. * in soc context
  1663. */
  1664. int lmac_id =
  1665. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1666. pdev->pdev_id);
  1667. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1668. if (!rx_mac_srng->hal_srng)
  1669. continue;
  1670. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1671. rx_mac_srng->hal_srng,
  1672. RXDMA_BUF, buf_size,
  1673. &htt_tlv_filter);
  1674. }
  1675. }
  1676. return status;
  1677. }
  1678. #endif
  1679. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1680. /**
  1681. * dp_service_near_full_srngs_be() - Main bottom half callback for the
  1682. * near-full IRQs.
  1683. * @soc: Datapath SoC handle
  1684. * @int_ctx: Interrupt context
  1685. * @dp_budget: Budget of the work that can be done in the bottom half
  1686. *
  1687. * Return: work done in the handler
  1688. */
  1689. static uint32_t
  1690. dp_service_near_full_srngs_be(struct dp_soc *soc, struct dp_intr *int_ctx,
  1691. uint32_t dp_budget)
  1692. {
  1693. int ring = 0;
  1694. int budget = dp_budget;
  1695. uint32_t work_done = 0;
  1696. uint32_t remaining_quota = dp_budget;
  1697. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1698. int tx_ring_near_full_mask = int_ctx->tx_ring_near_full_mask;
  1699. int rx_near_full_grp_1_mask = int_ctx->rx_near_full_grp_1_mask;
  1700. int rx_near_full_grp_2_mask = int_ctx->rx_near_full_grp_2_mask;
  1701. int rx_near_full_mask = rx_near_full_grp_1_mask |
  1702. rx_near_full_grp_2_mask;
  1703. dp_verbose_debug("rx_ring_near_full 0x%x tx_ring_near_full 0x%x",
  1704. rx_near_full_mask,
  1705. tx_ring_near_full_mask);
  1706. if (rx_near_full_mask) {
  1707. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1708. if (!(rx_near_full_mask & (1 << ring)))
  1709. continue;
  1710. work_done = dp_rx_nf_process(int_ctx,
  1711. soc->reo_dest_ring[ring].hal_srng,
  1712. ring, remaining_quota);
  1713. if (work_done) {
  1714. intr_stats->num_rx_ring_near_full_masks[ring]++;
  1715. dp_verbose_debug("rx NF mask 0x%x ring %d, work_done %d budget %d",
  1716. rx_near_full_mask, ring,
  1717. work_done,
  1718. budget);
  1719. budget -= work_done;
  1720. if (budget <= 0)
  1721. goto budget_done;
  1722. remaining_quota = budget;
  1723. }
  1724. }
  1725. }
  1726. if (tx_ring_near_full_mask) {
  1727. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  1728. if (!(tx_ring_near_full_mask & (1 << ring)))
  1729. continue;
  1730. work_done = dp_tx_comp_nf_handler(int_ctx, soc,
  1731. soc->tx_comp_ring[ring].hal_srng,
  1732. ring, remaining_quota);
  1733. if (work_done) {
  1734. intr_stats->num_tx_comp_ring_near_full_masks[ring]++;
  1735. dp_verbose_debug("tx NF mask 0x%x ring %d, work_done %d budget %d",
  1736. tx_ring_near_full_mask, ring,
  1737. work_done, budget);
  1738. budget -= work_done;
  1739. if (budget <= 0)
  1740. break;
  1741. remaining_quota = budget;
  1742. }
  1743. }
  1744. }
  1745. intr_stats->num_near_full_masks++;
  1746. budget_done:
  1747. return dp_budget - budget;
  1748. }
  1749. /**
  1750. * dp_srng_test_and_update_nf_params_be() - Check if the srng is in near full
  1751. * state and set the reap_limit appropriately
  1752. * as per the near full state
  1753. * @soc: Datapath soc handle
  1754. * @dp_srng: Datapath handle for SRNG
  1755. * @max_reap_limit: [Output Buffer] Buffer to set the max reap limit as per
  1756. * the srng near-full state
  1757. *
  1758. * Return: 1, if the srng is in near-full state
  1759. * 0, if the srng is not in near-full state
  1760. */
  1761. static int
  1762. dp_srng_test_and_update_nf_params_be(struct dp_soc *soc,
  1763. struct dp_srng *dp_srng,
  1764. int *max_reap_limit)
  1765. {
  1766. return _dp_srng_test_and_update_nf_params(soc, dp_srng, max_reap_limit);
  1767. }
  1768. /**
  1769. * dp_init_near_full_arch_ops_be() - Initialize the arch ops handler for the
  1770. * near full IRQ handling operations.
  1771. * @arch_ops: arch ops handle
  1772. *
  1773. * Return: none
  1774. */
  1775. static inline void
  1776. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1777. {
  1778. arch_ops->dp_service_near_full_srngs = dp_service_near_full_srngs_be;
  1779. arch_ops->dp_srng_test_and_update_nf_params =
  1780. dp_srng_test_and_update_nf_params_be;
  1781. }
  1782. #else
  1783. static inline void
  1784. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1785. {
  1786. }
  1787. #endif
  1788. static inline
  1789. QDF_STATUS dp_srng_init_be(struct dp_soc *soc, struct dp_srng *srng,
  1790. int ring_type, int ring_num, int mac_id)
  1791. {
  1792. return dp_srng_init_idx(soc, srng, ring_type, ring_num, mac_id, 0);
  1793. }
  1794. static QDF_STATUS dp_soc_interrupt_attach_be(struct cdp_soc_t *txrx_soc)
  1795. {
  1796. return dp_soc_interrupt_attach(txrx_soc);
  1797. }
  1798. static QDF_STATUS dp_soc_attach_poll_be(struct cdp_soc_t *txrx_soc)
  1799. {
  1800. return dp_soc_attach_poll(txrx_soc);
  1801. }
  1802. static void dp_soc_interrupt_detach_be(struct cdp_soc_t *txrx_soc)
  1803. {
  1804. return dp_soc_interrupt_detach(txrx_soc);
  1805. }
  1806. static uint32_t dp_service_srngs_be(void *dp_ctx, uint32_t dp_budget, int cpu)
  1807. {
  1808. return dp_service_srngs(dp_ctx, dp_budget, cpu);
  1809. }
  1810. #ifdef WLAN_SUPPORT_PPEDS
  1811. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1812. {
  1813. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1814. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1815. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1816. if (!be_soc->ppeds_handle)
  1817. return;
  1818. dp_srng_deinit(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0);
  1819. wlan_minidump_remove(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1820. be_soc->ppe2tcl_ring.alloc_size,
  1821. soc->ctrl_psoc,
  1822. WLAN_MD_DP_SRNG_PPE2TCL,
  1823. "ppe2tcl_ring");
  1824. dp_srng_deinit(soc, &be_soc->reo2ppe_ring, REO2PPE, 0);
  1825. wlan_minidump_remove(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1826. be_soc->reo2ppe_ring.alloc_size,
  1827. soc->ctrl_psoc,
  1828. WLAN_MD_DP_SRNG_REO2PPE,
  1829. "reo2ppe_ring");
  1830. dp_srng_deinit(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1831. WBM2_SW_PPE_REL_RING_ID);
  1832. wlan_minidump_remove(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1833. be_soc->ppeds_wbm_release_ring.alloc_size,
  1834. soc->ctrl_psoc,
  1835. WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1836. "ppeds_wbm_release_ring");
  1837. }
  1838. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1839. {
  1840. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1841. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1842. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1843. dp_srng_free(soc, &be_soc->ppeds_wbm_release_ring);
  1844. dp_srng_free(soc, &be_soc->ppe2tcl_ring);
  1845. dp_srng_free(soc, &be_soc->reo2ppe_ring);
  1846. }
  1847. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1848. {
  1849. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1850. uint32_t entries;
  1851. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1852. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1853. if (!be_soc->ppeds_handle)
  1854. return QDF_STATUS_SUCCESS;
  1855. entries = wlan_cfg_get_dp_soc_reo2ppe_ring_size(soc_cfg_ctx);
  1856. if (dp_srng_alloc(soc, &be_soc->reo2ppe_ring, REO2PPE,
  1857. entries, 0)) {
  1858. dp_err("%pK: dp_srng_alloc failed for reo2ppe", soc);
  1859. goto fail;
  1860. }
  1861. entries = wlan_cfg_get_dp_soc_ppe2tcl_ring_size(soc_cfg_ctx);
  1862. if (dp_srng_alloc(soc, &be_soc->ppe2tcl_ring, PPE2TCL,
  1863. entries, 0)) {
  1864. dp_err("%pK: dp_srng_alloc failed for ppe2tcl_ring", soc);
  1865. goto fail;
  1866. }
  1867. entries = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1868. if (dp_srng_alloc(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1869. entries, 1)) {
  1870. dp_err("%pK: dp_srng_alloc failed for ppeds_wbm_release_ring",
  1871. soc);
  1872. goto fail;
  1873. }
  1874. return QDF_STATUS_SUCCESS;
  1875. fail:
  1876. dp_soc_ppeds_srng_free(soc);
  1877. return QDF_STATUS_E_NOMEM;
  1878. }
  1879. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1880. {
  1881. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1882. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1883. hal_soc_handle_t hal_soc = soc->hal_soc;
  1884. struct dp_ppe_ds_idxs idx = {0};
  1885. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1886. if (!be_soc->ppeds_handle)
  1887. return QDF_STATUS_SUCCESS;
  1888. if (dp_ppeds_register_soc_be(be_soc, &idx)) {
  1889. dp_err("%pK: ppeds registration failed", soc);
  1890. goto fail;
  1891. }
  1892. if (dp_srng_init_idx(soc, &be_soc->reo2ppe_ring, REO2PPE, 0, 0,
  1893. idx.reo2ppe_start_idx)) {
  1894. dp_err("%pK: dp_srng_init failed for reo2ppe", soc);
  1895. goto fail;
  1896. }
  1897. wlan_minidump_log(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1898. be_soc->reo2ppe_ring.alloc_size,
  1899. soc->ctrl_psoc,
  1900. WLAN_MD_DP_SRNG_REO2PPE,
  1901. "reo2ppe_ring");
  1902. hal_reo_config_reo2ppe_dest_info(hal_soc);
  1903. if (dp_srng_init_idx(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0, 0,
  1904. idx.ppe2tcl_start_idx)) {
  1905. dp_err("%pK: dp_srng_init failed for ppe2tcl_ring", soc);
  1906. goto fail;
  1907. }
  1908. wlan_minidump_log(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1909. be_soc->ppe2tcl_ring.alloc_size,
  1910. soc->ctrl_psoc,
  1911. WLAN_MD_DP_SRNG_PPE2TCL,
  1912. "ppe2tcl_ring");
  1913. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  1914. be_soc->ppe2tcl_ring.hal_srng,
  1915. WBM2_SW_PPE_REL_MAP_ID);
  1916. if (dp_srng_init(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1917. WBM2_SW_PPE_REL_RING_ID, 0)) {
  1918. dp_err("%pK: dp_srng_init failed for ppeds_wbm_release_ring",
  1919. soc);
  1920. goto fail;
  1921. }
  1922. wlan_minidump_log(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1923. be_soc->ppeds_wbm_release_ring.alloc_size,
  1924. soc->ctrl_psoc, WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1925. "ppeds_wbm_release_ring");
  1926. return QDF_STATUS_SUCCESS;
  1927. fail:
  1928. dp_soc_ppeds_srng_deinit(soc);
  1929. return QDF_STATUS_E_NOMEM;
  1930. }
  1931. #else
  1932. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1933. {
  1934. }
  1935. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1936. {
  1937. }
  1938. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1939. {
  1940. return QDF_STATUS_SUCCESS;
  1941. }
  1942. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1943. {
  1944. return QDF_STATUS_SUCCESS;
  1945. }
  1946. #endif
  1947. static void dp_soc_srng_deinit_be(struct dp_soc *soc)
  1948. {
  1949. uint32_t i;
  1950. dp_soc_ppeds_srng_deinit(soc);
  1951. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1952. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1953. dp_srng_deinit(soc, &soc->rx_refill_buf_ring[i],
  1954. RXDMA_BUF, 0);
  1955. }
  1956. }
  1957. }
  1958. static void dp_soc_srng_free_be(struct dp_soc *soc)
  1959. {
  1960. uint32_t i;
  1961. dp_soc_ppeds_srng_free(soc);
  1962. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1963. for (i = 0; i < soc->num_rx_refill_buf_rings; i++)
  1964. dp_srng_free(soc, &soc->rx_refill_buf_ring[i]);
  1965. }
  1966. }
  1967. static QDF_STATUS dp_soc_srng_alloc_be(struct dp_soc *soc)
  1968. {
  1969. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1970. uint32_t ring_size;
  1971. uint32_t i;
  1972. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1973. ring_size = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  1974. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1975. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1976. if (dp_srng_alloc(soc, &soc->rx_refill_buf_ring[i],
  1977. RXDMA_BUF, ring_size, 0)) {
  1978. dp_err("%pK: dp_srng_alloc failed refill ring",
  1979. soc);
  1980. goto fail;
  1981. }
  1982. }
  1983. }
  1984. if (dp_soc_ppeds_srng_alloc(soc)) {
  1985. dp_err("%pK: ppe rings alloc failed",
  1986. soc);
  1987. goto fail;
  1988. }
  1989. return QDF_STATUS_SUCCESS;
  1990. fail:
  1991. dp_soc_srng_free_be(soc);
  1992. return QDF_STATUS_E_NOMEM;
  1993. }
  1994. static QDF_STATUS dp_soc_srng_init_be(struct dp_soc *soc)
  1995. {
  1996. int i = 0;
  1997. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1998. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1999. if (dp_srng_init(soc, &soc->rx_refill_buf_ring[i],
  2000. RXDMA_BUF, 0, 0)) {
  2001. dp_err("%pK: dp_srng_init failed refill ring",
  2002. soc);
  2003. goto fail;
  2004. }
  2005. }
  2006. }
  2007. if (dp_soc_ppeds_srng_init(soc)) {
  2008. dp_err("%pK: ppe ds rings init failed",
  2009. soc);
  2010. goto fail;
  2011. }
  2012. return QDF_STATUS_SUCCESS;
  2013. fail:
  2014. dp_soc_srng_deinit_be(soc);
  2015. return QDF_STATUS_E_NOMEM;
  2016. }
  2017. #ifdef WLAN_FEATURE_11BE_MLO
  2018. static inline unsigned
  2019. dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,
  2020. union dp_align_mac_addr *mac_addr)
  2021. {
  2022. uint32_t index;
  2023. index =
  2024. mac_addr->align2.bytes_ab ^
  2025. mac_addr->align2.bytes_cd ^
  2026. mac_addr->align2.bytes_ef;
  2027. index ^= index >> mld_hash_obj->mld_peer_hash.idx_bits;
  2028. index &= mld_hash_obj->mld_peer_hash.mask;
  2029. return index;
  2030. }
  2031. QDF_STATUS
  2032. dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,
  2033. int hash_elems)
  2034. {
  2035. int i, log2;
  2036. if (!mld_hash_obj)
  2037. return QDF_STATUS_E_FAILURE;
  2038. hash_elems *= DP_PEER_HASH_LOAD_MULT;
  2039. hash_elems >>= DP_PEER_HASH_LOAD_SHIFT;
  2040. log2 = dp_log2_ceil(hash_elems);
  2041. hash_elems = 1 << log2;
  2042. mld_hash_obj->mld_peer_hash.mask = hash_elems - 1;
  2043. mld_hash_obj->mld_peer_hash.idx_bits = log2;
  2044. /* allocate an array of TAILQ peer object lists */
  2045. mld_hash_obj->mld_peer_hash.bins = qdf_mem_malloc(
  2046. hash_elems * sizeof(TAILQ_HEAD(anonymous_tail_q, dp_peer)));
  2047. if (!mld_hash_obj->mld_peer_hash.bins)
  2048. return QDF_STATUS_E_NOMEM;
  2049. for (i = 0; i < hash_elems; i++)
  2050. TAILQ_INIT(&mld_hash_obj->mld_peer_hash.bins[i]);
  2051. qdf_spinlock_create(&mld_hash_obj->mld_peer_hash_lock);
  2052. return QDF_STATUS_SUCCESS;
  2053. }
  2054. void
  2055. dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)
  2056. {
  2057. if (!mld_hash_obj)
  2058. return;
  2059. if (mld_hash_obj->mld_peer_hash.bins) {
  2060. qdf_mem_free(mld_hash_obj->mld_peer_hash.bins);
  2061. mld_hash_obj->mld_peer_hash.bins = NULL;
  2062. qdf_spinlock_destroy(&mld_hash_obj->mld_peer_hash_lock);
  2063. }
  2064. }
  2065. #ifdef WLAN_MLO_MULTI_CHIP
  2066. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  2067. {
  2068. /* In case of MULTI chip MLO peer hash table when MLO global object
  2069. * is created, avoid from SOC attach path
  2070. */
  2071. return QDF_STATUS_SUCCESS;
  2072. }
  2073. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  2074. {
  2075. }
  2076. void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2077. {
  2078. }
  2079. void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2080. {
  2081. }
  2082. #else
  2083. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  2084. {
  2085. dp_mld_peer_hash_obj_t mld_hash_obj;
  2086. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2087. if (!mld_hash_obj)
  2088. return QDF_STATUS_E_FAILURE;
  2089. return dp_mlo_peer_find_hash_attach_be(mld_hash_obj, soc->max_peers);
  2090. }
  2091. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  2092. {
  2093. dp_mld_peer_hash_obj_t mld_hash_obj;
  2094. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2095. if (!mld_hash_obj)
  2096. return;
  2097. return dp_mlo_peer_find_hash_detach_be(mld_hash_obj);
  2098. }
  2099. void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2100. {
  2101. dp_mlo_dev_ctxt_list_attach(mlo_dev_obj);
  2102. }
  2103. void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2104. {
  2105. dp_mlo_dev_ctxt_list_detach(mlo_dev_obj);
  2106. }
  2107. #endif
  2108. #ifdef QCA_ENHANCED_STATS_SUPPORT
  2109. static uint8_t
  2110. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  2111. {
  2112. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  2113. return be_pdev->mlo_link_id;
  2114. }
  2115. #else
  2116. static uint8_t
  2117. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  2118. {
  2119. return 0;
  2120. }
  2121. #endif /* QCA_ENHANCED_STATS_SUPPORT */
  2122. static struct dp_peer *
  2123. dp_mlo_peer_find_hash_find_be(struct dp_soc *soc,
  2124. uint8_t *peer_mac_addr,
  2125. int mac_addr_is_aligned,
  2126. enum dp_mod_id mod_id,
  2127. uint8_t vdev_id)
  2128. {
  2129. union dp_align_mac_addr local_mac_addr_aligned, *mac_addr;
  2130. uint32_t index;
  2131. struct dp_peer *peer;
  2132. struct dp_vdev *vdev;
  2133. dp_mld_peer_hash_obj_t mld_hash_obj;
  2134. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2135. if (!mld_hash_obj)
  2136. return NULL;
  2137. if (!mld_hash_obj->mld_peer_hash.bins)
  2138. return NULL;
  2139. if (mac_addr_is_aligned) {
  2140. mac_addr = (union dp_align_mac_addr *)peer_mac_addr;
  2141. } else {
  2142. qdf_mem_copy(
  2143. &local_mac_addr_aligned.raw[0],
  2144. peer_mac_addr, QDF_MAC_ADDR_SIZE);
  2145. mac_addr = &local_mac_addr_aligned;
  2146. }
  2147. if (vdev_id != DP_VDEV_ALL) {
  2148. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, mod_id);
  2149. if (!vdev) {
  2150. dp_err("vdev is null");
  2151. return NULL;
  2152. }
  2153. } else {
  2154. vdev = NULL;
  2155. }
  2156. /* search mld peer table if no link peer for given mac address */
  2157. index = dp_mlo_peer_find_hash_index(mld_hash_obj, mac_addr);
  2158. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2159. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  2160. hash_list_elem) {
  2161. if (dp_peer_find_mac_addr_cmp(mac_addr, &peer->mac_addr) == 0) {
  2162. if ((vdev_id == DP_VDEV_ALL) || (
  2163. dp_peer_find_mac_addr_cmp(
  2164. &peer->vdev->mld_mac_addr,
  2165. &vdev->mld_mac_addr) == 0)) {
  2166. /* take peer reference before returning */
  2167. if (dp_peer_get_ref(NULL, peer, mod_id) !=
  2168. QDF_STATUS_SUCCESS)
  2169. peer = NULL;
  2170. if (vdev)
  2171. dp_vdev_unref_delete(soc, vdev, mod_id);
  2172. qdf_spin_unlock_bh(
  2173. &mld_hash_obj->mld_peer_hash_lock);
  2174. return peer;
  2175. }
  2176. }
  2177. }
  2178. if (vdev)
  2179. dp_vdev_unref_delete(soc, vdev, mod_id);
  2180. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2181. return NULL; /* failure */
  2182. }
  2183. static void
  2184. dp_mlo_peer_find_hash_remove_be(struct dp_soc *soc, struct dp_peer *peer)
  2185. {
  2186. uint32_t index;
  2187. struct dp_peer *tmppeer = NULL;
  2188. int found = 0;
  2189. dp_mld_peer_hash_obj_t mld_hash_obj;
  2190. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2191. if (!mld_hash_obj)
  2192. return;
  2193. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  2194. QDF_ASSERT(!TAILQ_EMPTY(&mld_hash_obj->mld_peer_hash.bins[index]));
  2195. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2196. TAILQ_FOREACH(tmppeer, &mld_hash_obj->mld_peer_hash.bins[index],
  2197. hash_list_elem) {
  2198. if (tmppeer == peer) {
  2199. found = 1;
  2200. break;
  2201. }
  2202. }
  2203. QDF_ASSERT(found);
  2204. TAILQ_REMOVE(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  2205. hash_list_elem);
  2206. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") removed. (found %u)",
  2207. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw), found);
  2208. dp_peer_unref_delete(peer, DP_MOD_ID_CONFIG);
  2209. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2210. }
  2211. static void
  2212. dp_mlo_peer_find_hash_add_be(struct dp_soc *soc, struct dp_peer *peer)
  2213. {
  2214. uint32_t index;
  2215. dp_mld_peer_hash_obj_t mld_hash_obj;
  2216. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2217. if (!mld_hash_obj)
  2218. return;
  2219. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  2220. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2221. if (QDF_IS_STATUS_ERROR(dp_peer_get_ref(NULL, peer,
  2222. DP_MOD_ID_CONFIG))) {
  2223. dp_err("fail to get peer ref:" QDF_MAC_ADDR_FMT,
  2224. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  2225. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2226. return;
  2227. }
  2228. TAILQ_INSERT_TAIL(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  2229. hash_list_elem);
  2230. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2231. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") added",
  2232. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  2233. }
  2234. void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
  2235. {
  2236. uint32_t index;
  2237. struct dp_peer *peer;
  2238. dp_mld_peer_hash_obj_t mld_hash_obj;
  2239. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2240. if (!mld_hash_obj)
  2241. return;
  2242. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2243. for (index = 0; index < mld_hash_obj->mld_peer_hash.mask; index++) {
  2244. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  2245. hash_list_elem) {
  2246. dp_print_peer_ast_entries(soc, peer, NULL);
  2247. }
  2248. }
  2249. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2250. }
  2251. #else /* WLAN_FEATURE_11BE_MLO */
  2252. void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2253. {
  2254. }
  2255. void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2256. {
  2257. }
  2258. #endif /* WLAN_FEATURE_11BE_MLO */
  2259. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  2260. static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
  2261. struct dp_vdev *vdev)
  2262. {
  2263. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2264. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2265. hal_soc_handle_t hal_soc = soc->hal_soc;
  2266. uint8_t vdev_id = vdev->vdev_id;
  2267. if (vdev->opmode == wlan_op_mode_sta) {
  2268. if (vdev->pdev->isolation)
  2269. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  2270. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2271. else
  2272. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  2273. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  2274. } else if (vdev->opmode == wlan_op_mode_ap) {
  2275. hal_tx_mcast_mlo_reinject_routing_set(
  2276. hal_soc,
  2277. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  2278. if (vdev->mlo_vdev) {
  2279. hal_tx_vdev_mcast_ctrl_set(
  2280. hal_soc,
  2281. vdev_id,
  2282. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2283. } else {
  2284. hal_tx_vdev_mcast_ctrl_set(hal_soc,
  2285. vdev_id,
  2286. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2287. }
  2288. }
  2289. }
  2290. static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
  2291. {
  2292. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2293. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2294. union hal_tx_bank_config *bank_config;
  2295. if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
  2296. return;
  2297. bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
  2298. hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
  2299. be_vdev->bank_id);
  2300. }
  2301. #endif
  2302. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  2303. defined(WLAN_MCAST_MLO)
  2304. static void dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be *be_vdev,
  2305. struct dp_vdev *ptnr_vdev,
  2306. void *arg)
  2307. {
  2308. struct dp_vdev_be *be_ptnr_vdev =
  2309. dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  2310. be_ptnr_vdev->mcast_primary = false;
  2311. }
  2312. #if defined(CONFIG_MLO_SINGLE_DEV)
  2313. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2314. struct dp_vdev *vdev,
  2315. cdp_config_param_type val)
  2316. {
  2317. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2318. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2319. be_vdev->vdev.pdev->soc);
  2320. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2321. vdev->mlo_vdev = 1;
  2322. if (be_vdev->mcast_primary) {
  2323. struct cdp_txrx_peer_params_update params = {0};
  2324. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2325. dp_mlo_mcast_reset_pri_mcast,
  2326. (void *)&be_vdev->mcast_primary,
  2327. DP_MOD_ID_TX_MCAST,
  2328. DP_LINK_VDEV_ITER,
  2329. DP_VDEV_ITERATE_SKIP_SELF);
  2330. params.chip_id = be_soc->mlo_chip_id;
  2331. params.pdev_id = be_vdev->vdev.pdev->pdev_id;
  2332. params.vdev_id = vdev->vdev_id;
  2333. dp_wdi_event_handler(
  2334. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2335. be_vdev->vdev.pdev->soc,
  2336. (void *)&params, CDP_INVALID_PEER,
  2337. WDI_NO_VAL, params.pdev_id);
  2338. }
  2339. }
  2340. static
  2341. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2342. struct dp_peer *peer,
  2343. struct cdp_vdev_stats **vdev_stats)
  2344. {
  2345. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2346. if (!IS_DP_LEGACY_PEER(peer))
  2347. *vdev_stats = &be_vdev->mlo_stats;
  2348. }
  2349. #else
  2350. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2351. struct dp_vdev *vdev,
  2352. cdp_config_param_type val)
  2353. {
  2354. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2355. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2356. be_vdev->vdev.pdev->soc);
  2357. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2358. vdev->mlo_vdev = 1;
  2359. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2360. vdev->vdev_id,
  2361. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2362. if (be_vdev->mcast_primary) {
  2363. struct cdp_txrx_peer_params_update params = {0};
  2364. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2365. dp_mlo_mcast_reset_pri_mcast,
  2366. (void *)&be_vdev->mcast_primary,
  2367. DP_MOD_ID_TX_MCAST,
  2368. DP_LINK_VDEV_ITER,
  2369. DP_VDEV_ITERATE_SKIP_SELF);
  2370. params.chip_id = be_soc->mlo_chip_id;
  2371. params.pdev_id = vdev->pdev->pdev_id;
  2372. params.vdev_id = vdev->vdev_id;
  2373. dp_wdi_event_handler(
  2374. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2375. vdev->pdev->soc,
  2376. (void *)&params, CDP_INVALID_PEER,
  2377. WDI_NO_VAL, params.pdev_id);
  2378. }
  2379. }
  2380. #endif
  2381. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2382. struct dp_vdev *vdev,
  2383. cdp_config_param_type val)
  2384. {
  2385. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2386. be_vdev->mcast_primary = false;
  2387. vdev->mlo_vdev = 0;
  2388. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2389. vdev->vdev_id,
  2390. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2391. }
  2392. /**
  2393. * dp_txrx_get_vdev_mcast_param_be() - Target specific ops for getting vdev
  2394. * params related to multicast
  2395. * @soc: DP soc handle
  2396. * @vdev: pointer to vdev structure
  2397. * @val: buffer address
  2398. *
  2399. * Return: QDF_STATUS
  2400. */
  2401. static
  2402. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2403. struct dp_vdev *vdev,
  2404. cdp_config_param_type *val)
  2405. {
  2406. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2407. if (be_vdev->mcast_primary)
  2408. val->cdp_vdev_param_mcast_vdev = true;
  2409. else
  2410. val->cdp_vdev_param_mcast_vdev = false;
  2411. return QDF_STATUS_SUCCESS;
  2412. }
  2413. #else
  2414. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2415. struct dp_vdev *vdev,
  2416. cdp_config_param_type val)
  2417. {
  2418. }
  2419. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2420. struct dp_vdev *vdev,
  2421. cdp_config_param_type val)
  2422. {
  2423. }
  2424. static
  2425. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2426. struct dp_vdev *vdev,
  2427. cdp_config_param_type *val)
  2428. {
  2429. return QDF_STATUS_SUCCESS;
  2430. }
  2431. static
  2432. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2433. struct dp_peer *peer,
  2434. struct cdp_vdev_stats **vdev_stats)
  2435. {
  2436. }
  2437. #endif
  2438. #ifdef DP_TX_IMPLICIT_RBM_MAPPING
  2439. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2440. uint8_t tx_ring_id,
  2441. uint8_t bm_id)
  2442. {
  2443. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  2444. soc->tcl_data_ring[tx_ring_id].hal_srng,
  2445. bm_id);
  2446. }
  2447. #else
  2448. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2449. uint8_t tx_ring_id,
  2450. uint8_t bm_id)
  2451. {
  2452. }
  2453. #endif
  2454. /**
  2455. * dp_txrx_set_vdev_param_be() - Target specific ops while setting vdev params
  2456. * @soc: DP soc handle
  2457. * @vdev: pointer to vdev structure
  2458. * @param: parameter type to get value
  2459. * @val: value
  2460. *
  2461. * Return: QDF_STATUS
  2462. */
  2463. static
  2464. QDF_STATUS dp_txrx_set_vdev_param_be(struct dp_soc *soc,
  2465. struct dp_vdev *vdev,
  2466. enum cdp_vdev_param_type param,
  2467. cdp_config_param_type val)
  2468. {
  2469. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2470. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2471. switch (param) {
  2472. case CDP_TX_ENCAP_TYPE:
  2473. case CDP_UPDATE_DSCP_TO_TID_MAP:
  2474. case CDP_UPDATE_TDLS_FLAGS:
  2475. dp_tx_update_bank_profile(be_soc, be_vdev);
  2476. break;
  2477. case CDP_ENABLE_CIPHER:
  2478. if (vdev->tx_encap_type == htt_cmn_pkt_type_raw)
  2479. dp_tx_update_bank_profile(be_soc, be_vdev);
  2480. break;
  2481. case CDP_SET_MCAST_VDEV:
  2482. dp_txrx_set_mlo_mcast_primary_vdev_param_be(vdev, val);
  2483. break;
  2484. case CDP_RESET_MLO_MCAST_VDEV:
  2485. dp_txrx_reset_mlo_mcast_primary_vdev_param_be(vdev, val);
  2486. break;
  2487. default:
  2488. dp_warn("invalid param %d", param);
  2489. break;
  2490. }
  2491. return QDF_STATUS_SUCCESS;
  2492. }
  2493. #ifdef WLAN_FEATURE_11BE_MLO
  2494. #ifdef DP_USE_REDUCED_PEER_ID_FIELD_WIDTH
  2495. static inline void
  2496. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2497. {
  2498. soc->peer_id_shift = dp_log2_ceil(soc->max_peers);
  2499. soc->peer_id_mask = (1 << soc->peer_id_shift) - 1;
  2500. /*
  2501. * Double the peers since we use ML indication bit
  2502. * alongwith peer_id to find peers.
  2503. */
  2504. soc->max_peer_id = 1 << (soc->peer_id_shift + 1);
  2505. }
  2506. #else
  2507. static inline void
  2508. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2509. {
  2510. soc->max_peer_id =
  2511. (1 << (HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_S + 1)) - 1;
  2512. }
  2513. #endif /* DP_USE_REDUCED_PEER_ID_FIELD_WIDTH */
  2514. #else
  2515. static inline void
  2516. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2517. {
  2518. soc->max_peer_id = soc->max_peers;
  2519. }
  2520. #endif /* WLAN_FEATURE_11BE_MLO */
  2521. static void dp_peer_map_detach_be(struct dp_soc *soc)
  2522. {
  2523. if (soc->host_ast_db_enable)
  2524. dp_peer_ast_hash_detach(soc);
  2525. }
  2526. static QDF_STATUS dp_peer_map_attach_be(struct dp_soc *soc)
  2527. {
  2528. QDF_STATUS status;
  2529. if (soc->host_ast_db_enable) {
  2530. status = dp_peer_ast_hash_attach(soc);
  2531. if (QDF_IS_STATUS_ERROR(status))
  2532. return status;
  2533. }
  2534. dp_soc_max_peer_id_set(soc);
  2535. return QDF_STATUS_SUCCESS;
  2536. }
  2537. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_DP_MLO_DEV_CTX)
  2538. void dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)
  2539. {
  2540. TAILQ_INIT(&mlo_dev_obj->mlo_dev_list);
  2541. qdf_spinlock_create(&mlo_dev_obj->mlo_dev_list_lock);
  2542. }
  2543. void dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)
  2544. {
  2545. struct dp_mlo_dev_ctxt *mld_ctxt = NULL;
  2546. struct dp_mlo_dev_ctxt *tmp_mld_ctxt = NULL;
  2547. if (!TAILQ_EMPTY(&mlo_dev_obj->mlo_dev_list)) {
  2548. dp_alert("DP MLO dev list is not empty");
  2549. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2550. TAILQ_FOREACH_SAFE(mld_ctxt, &mlo_dev_obj->mlo_dev_list,
  2551. ml_dev_list_elem, tmp_mld_ctxt) {
  2552. if (mld_ctxt) {
  2553. dp_alert("MLD MAC " QDF_MAC_ADDR_FMT " ",
  2554. QDF_MAC_ADDR_REF(
  2555. &mld_ctxt->mld_mac_addr.raw));
  2556. qdf_mem_free(mld_ctxt);
  2557. }
  2558. }
  2559. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2560. }
  2561. qdf_spinlock_destroy(&mlo_dev_obj->mlo_dev_list_lock);
  2562. }
  2563. void dp_mlo_dev_ctxt_unref_delete(struct dp_mlo_dev_ctxt *mlo_dev_ctxt,
  2564. enum dp_mod_id mod_id)
  2565. {
  2566. QDF_ASSERT(qdf_atomic_dec_return(&mlo_dev_ctxt->mod_refs[mod_id]) >= 0);
  2567. /* Return if this is not the last reference*/
  2568. if (!qdf_atomic_dec_and_test(&mlo_dev_ctxt->ref_cnt))
  2569. return;
  2570. QDF_ASSERT(mlo_dev_ctxt->ref_delete_pending);
  2571. qdf_spinlock_destroy(&mlo_dev_ctxt->vdev_list_lock);
  2572. qdf_mem_free(mlo_dev_ctxt);
  2573. }
  2574. QDF_STATUS dp_mlo_dev_get_ref(struct dp_mlo_dev_ctxt *mlo_dev_ctxt,
  2575. enum dp_mod_id mod_id)
  2576. {
  2577. if (!qdf_atomic_inc_return(&mlo_dev_ctxt->ref_cnt))
  2578. return QDF_STATUS_E_INVAL;
  2579. qdf_atomic_inc(&mlo_dev_ctxt->mod_refs[mod_id]);
  2580. return QDF_STATUS_SUCCESS;
  2581. }
  2582. struct dp_mlo_dev_ctxt *
  2583. dp_get_mlo_dev_ctx_by_mld_mac_addr(struct dp_soc_be *be_soc,
  2584. uint8_t *mldaddr,
  2585. enum dp_mod_id mod_id)
  2586. {
  2587. struct dp_mlo_dev_ctxt *mld_cur = NULL;
  2588. struct dp_mlo_dev_ctxt *tmp_mld_cur = NULL;
  2589. dp_mlo_dev_obj_t mlo_dev_obj;
  2590. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  2591. if (!mlo_dev_obj) {
  2592. dp_err("DP Global MLO Context is NULL");
  2593. return NULL;
  2594. }
  2595. /*
  2596. * Iterate through ml dev list, till mldaddr matches with
  2597. * entry of list
  2598. */
  2599. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2600. TAILQ_FOREACH_SAFE(mld_cur, &mlo_dev_obj->mlo_dev_list,
  2601. ml_dev_list_elem, tmp_mld_cur) {
  2602. if (!qdf_mem_cmp(&mld_cur->mld_mac_addr.raw, mldaddr,
  2603. QDF_MAC_ADDR_SIZE)) {
  2604. if (dp_mlo_dev_get_ref(mld_cur, mod_id)
  2605. == QDF_STATUS_SUCCESS) {
  2606. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2607. return mld_cur;
  2608. }
  2609. }
  2610. }
  2611. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2612. return NULL;
  2613. }
  2614. /**
  2615. * dp_mlo_dev_ctxt_create() - Allocate DP MLO dev context
  2616. * @soc_hdl: SOC handle
  2617. * @mld_mac_addr: MLD MAC address
  2618. *
  2619. * Return: QDF_STATUS
  2620. */
  2621. static inline
  2622. QDF_STATUS dp_mlo_dev_ctxt_create(struct cdp_soc_t *soc_hdl,
  2623. uint8_t *mld_mac_addr)
  2624. {
  2625. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2626. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2627. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2628. dp_mlo_dev_obj_t mlo_dev_obj;
  2629. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  2630. if (!mlo_dev_obj) {
  2631. dp_err("DP Global MLO Context is NULL");
  2632. return QDF_STATUS_E_FAILURE;
  2633. }
  2634. /* check if MLO dev ctx already available */
  2635. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2636. mld_mac_addr,
  2637. DP_MOD_ID_MLO_DEV);
  2638. if (mlo_dev_ctxt) {
  2639. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2640. /* assert if we get two create request for same MLD MAC */
  2641. qdf_assert_always(0);
  2642. }
  2643. /* Allocate MLO dev ctx */
  2644. mlo_dev_ctxt = qdf_mem_malloc(sizeof(struct dp_mlo_dev_ctxt));
  2645. if (!mlo_dev_ctxt) {
  2646. dp_err("Failed to allocate DP MLO Dev Context");
  2647. return QDF_STATUS_E_NOMEM;
  2648. }
  2649. qdf_copy_macaddr((struct qdf_mac_addr *)&mlo_dev_ctxt->mld_mac_addr.raw[0],
  2650. (struct qdf_mac_addr *)mld_mac_addr);
  2651. qdf_mem_set(mlo_dev_ctxt->vdev_list,
  2652. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  2653. CDP_INVALID_VDEV_ID);
  2654. qdf_mem_set(mlo_dev_ctxt->bridge_vdev,
  2655. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  2656. CDP_INVALID_VDEV_ID);
  2657. mlo_dev_ctxt->seq_num = 0;
  2658. /* Add mlo_dev_ctxt to the global DP MLO list */
  2659. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2660. TAILQ_INSERT_TAIL(&mlo_dev_obj->mlo_dev_list,
  2661. mlo_dev_ctxt, ml_dev_list_elem);
  2662. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2663. /* Ref for MLO ctxt saved in global list */
  2664. dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_CONFIG);
  2665. mlo_dev_ctxt->ref_delete_pending = 0;
  2666. qdf_spinlock_create(&mlo_dev_ctxt->vdev_list_lock);
  2667. return QDF_STATUS_SUCCESS;
  2668. }
  2669. /**
  2670. * dp_mlo_dev_ctxt_destroy() - Destroy DP MLO dev context
  2671. * @soc_hdl: SOC handle
  2672. * @mld_mac_addr: MLD MAC address
  2673. *
  2674. * Return: QDF_STATUS
  2675. */
  2676. static inline
  2677. QDF_STATUS dp_mlo_dev_ctxt_destroy(struct cdp_soc_t *soc_hdl,
  2678. uint8_t *mld_mac_addr)
  2679. {
  2680. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2681. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2682. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2683. dp_mlo_dev_obj_t mlo_dev_obj;
  2684. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  2685. if (!mlo_dev_obj) {
  2686. dp_err("DP Global MLO Context is NULL");
  2687. return QDF_STATUS_E_INVAL;
  2688. }
  2689. /* GET mlo_dev_ctxt from the global list */
  2690. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2691. mld_mac_addr,
  2692. DP_MOD_ID_MLO_DEV);
  2693. if (!mlo_dev_ctxt) {
  2694. dp_err("Failed to get DP MLO Dev Context by MLD mac addr");
  2695. return QDF_STATUS_E_INVAL;
  2696. }
  2697. if (mlo_dev_ctxt->vdev_count)
  2698. dp_alert("deleting MLO dev ctxt with non zero vdev count");
  2699. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2700. TAILQ_REMOVE(&mlo_dev_obj->mlo_dev_list,
  2701. mlo_dev_ctxt, ml_dev_list_elem);
  2702. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2703. /* unref for MLO ctxt ref released from Global list */
  2704. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_CONFIG);
  2705. mlo_dev_ctxt->ref_delete_pending = 1;
  2706. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2707. return QDF_STATUS_SUCCESS;
  2708. }
  2709. /**
  2710. * dp_mlo_dev_ctxt_vdev_attach() - Attach vdev to DP MLO dev context
  2711. * @soc_hdl: SOC handle
  2712. * @vdev_id: vdev id for the vdev to be attached
  2713. * @mld_mac_addr: MLD MAC address
  2714. *
  2715. * Return: QDF_STATUS
  2716. */
  2717. static inline
  2718. QDF_STATUS dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t *soc_hdl,
  2719. uint8_t vdev_id,
  2720. uint8_t *mld_mac_addr)
  2721. {
  2722. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2723. struct dp_vdev *vdev = NULL;
  2724. struct dp_vdev_be *be_vdev = NULL;
  2725. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2726. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2727. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  2728. if (!vdev)
  2729. return QDF_STATUS_E_FAILURE;
  2730. be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2731. /* GET mlo_dev_ctxt from the global list */
  2732. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2733. mld_mac_addr,
  2734. DP_MOD_ID_MLO_DEV);
  2735. if (!mlo_dev_ctxt) {
  2736. dp_err("Failed to get MLO ctxt for " QDF_MAC_ADDR_FMT "",
  2737. QDF_MAC_ADDR_REF(mld_mac_addr));
  2738. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2739. return QDF_STATUS_E_INVAL;
  2740. }
  2741. dp_attach_vdev_list_in_mlo_dev_ctxt(be_soc, vdev, mlo_dev_ctxt);
  2742. be_vdev->mlo_dev_ctxt = mlo_dev_ctxt;
  2743. /* ref for holding MLO ctxt in be_vdev */
  2744. dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_CHILD);
  2745. /* unref for mlo ctxt taken at the start of this function */
  2746. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2747. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2748. return QDF_STATUS_SUCCESS;
  2749. }
  2750. /**
  2751. * dp_mlo_dev_ctxt_vdev_detach() - Detach vdev from DP MLO dev context
  2752. * @soc_hdl: SOC handle
  2753. * @vdev_id: vdev id for the vdev to be attached
  2754. * @mld_mac_addr: MLD MAC address
  2755. *
  2756. * Return: QDF_STATUS
  2757. */
  2758. static inline
  2759. QDF_STATUS dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t *soc_hdl,
  2760. uint8_t vdev_id,
  2761. uint8_t *mld_mac_addr)
  2762. {
  2763. struct dp_vdev *vdev = NULL;
  2764. struct dp_vdev_be *be_vdev = NULL;
  2765. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2766. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2767. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2768. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  2769. if (!vdev)
  2770. return QDF_STATUS_E_FAILURE;
  2771. be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2772. /* GET mlo_dev_ctxt from the global list */
  2773. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2774. mld_mac_addr,
  2775. DP_MOD_ID_MLO_DEV);
  2776. if (!mlo_dev_ctxt) {
  2777. dp_err("Failed to get DP MLO Dev Context by MLD mac addr");
  2778. if (!be_vdev->mlo_dev_ctxt) {
  2779. dp_err("Failed to get DP MLO Dev Context from vdev");
  2780. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2781. return QDF_STATUS_E_INVAL;
  2782. }
  2783. mlo_dev_ctxt = be_vdev->mlo_dev_ctxt;
  2784. dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2785. }
  2786. if (dp_detach_vdev_list_in_mlo_dev_ctxt(be_soc, vdev, mlo_dev_ctxt)
  2787. != QDF_STATUS_SUCCESS) {
  2788. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2789. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2790. return QDF_STATUS_SUCCESS;
  2791. }
  2792. be_vdev->mlo_dev_ctxt = NULL;
  2793. /* Save vdev stats in MLO dev ctx */
  2794. dp_update_mlo_ctxt_stats(&mlo_dev_ctxt->stats, &vdev->stats);
  2795. /* reset vdev stats to zero */
  2796. qdf_mem_set(&vdev->stats, sizeof(struct cdp_vdev_stats), 0);
  2797. /* unref for mlo ctxt removed from be_vdev*/
  2798. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_CHILD);
  2799. /* unref for mlo ctxt taken at the start of this function */
  2800. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2801. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2802. return QDF_STATUS_SUCCESS;
  2803. }
  2804. #else
  2805. void dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)
  2806. {
  2807. }
  2808. void dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)
  2809. {
  2810. }
  2811. static inline
  2812. QDF_STATUS dp_mlo_dev_ctxt_create(struct cdp_soc_t *soc_hdl,
  2813. uint8_t *mld_mac_addr)
  2814. {
  2815. return QDF_STATUS_SUCCESS;
  2816. }
  2817. static inline
  2818. QDF_STATUS dp_mlo_dev_ctxt_destroy(struct cdp_soc_t *soc_hdl,
  2819. uint8_t *mld_mac_addr)
  2820. {
  2821. return QDF_STATUS_SUCCESS;
  2822. }
  2823. static inline
  2824. QDF_STATUS dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t *soc_hdl,
  2825. uint8_t vdev_id,
  2826. uint8_t *mld_mac_addr)
  2827. {
  2828. return QDF_STATUS_SUCCESS;
  2829. }
  2830. static inline
  2831. QDF_STATUS dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t *soc_hdl,
  2832. uint8_t vdev_id,
  2833. uint8_t *mld_mac_addr)
  2834. {
  2835. return QDF_STATUS_SUCCESS;
  2836. }
  2837. #endif /* WLAN_DP_MLO_DEV_CTX */
  2838. #ifdef WLAN_FEATURE_11BE_MLO
  2839. #ifdef WLAN_MCAST_MLO
  2840. static inline void
  2841. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2842. {
  2843. arch_ops->dp_tx_mcast_handler = dp_tx_mlo_mcast_handler_be;
  2844. arch_ops->dp_rx_mcast_handler = dp_rx_mlo_igmp_handler;
  2845. arch_ops->dp_tx_is_mcast_primary = dp_tx_mlo_is_mcast_primary_be;
  2846. }
  2847. #else /* WLAN_MCAST_MLO */
  2848. static inline void
  2849. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2850. {
  2851. }
  2852. #endif /* WLAN_MCAST_MLO */
  2853. #ifdef WLAN_MLO_MULTI_CHIP
  2854. static inline void
  2855. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2856. {
  2857. arch_ops->dp_partner_chips_map = dp_mlo_partner_chips_map;
  2858. arch_ops->dp_partner_chips_unmap = dp_mlo_partner_chips_unmap;
  2859. arch_ops->dp_soc_get_by_idle_bm_id = dp_soc_get_by_idle_bm_id;
  2860. arch_ops->dp_get_soc_by_chip_id = dp_get_soc_by_chip_id_be;
  2861. arch_ops->dp_mlo_print_ptnr_info = dp_mlo_debug_print_ptnr_info;
  2862. arch_ops->dp_get_interface_stats = dp_get_interface_stats_be;
  2863. arch_ops->mlo_get_chip_id = dp_mlo_get_chip_id;
  2864. arch_ops->mlo_link_peer_find_hash_find_by_chip_id =
  2865. dp_mlo_link_peer_hash_find_by_chip_id;
  2866. }
  2867. #else
  2868. static inline void
  2869. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2870. {
  2871. }
  2872. #endif
  2873. static inline void
  2874. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2875. {
  2876. dp_initialize_arch_ops_be_mcast_mlo(arch_ops);
  2877. dp_initialize_arch_ops_be_mlo_multi_chip(arch_ops);
  2878. arch_ops->mlo_peer_find_hash_detach =
  2879. dp_mlo_peer_find_hash_detach_wrapper;
  2880. arch_ops->mlo_peer_find_hash_attach =
  2881. dp_mlo_peer_find_hash_attach_wrapper;
  2882. arch_ops->mlo_peer_find_hash_add = dp_mlo_peer_find_hash_add_be;
  2883. arch_ops->mlo_peer_find_hash_remove = dp_mlo_peer_find_hash_remove_be;
  2884. arch_ops->mlo_peer_find_hash_find = dp_mlo_peer_find_hash_find_be;
  2885. arch_ops->get_hw_link_id = dp_get_hw_link_id_be;
  2886. }
  2887. static struct cdp_cmn_mlo_ops dp_cmn_mlo_ops = {
  2888. .mlo_dev_ctxt_create = dp_mlo_dev_ctxt_create,
  2889. .mlo_dev_ctxt_attach = dp_mlo_dev_ctxt_vdev_attach,
  2890. .mlo_dev_ctxt_detach = dp_mlo_dev_ctxt_vdev_detach,
  2891. .mlo_dev_ctxt_destroy = dp_mlo_dev_ctxt_destroy,
  2892. };
  2893. void dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc *soc)
  2894. {
  2895. soc->cdp_soc.ops->cmn_mlo_ops = &dp_cmn_mlo_ops;
  2896. }
  2897. #else /* WLAN_FEATURE_11BE_MLO */
  2898. static inline void
  2899. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2900. {
  2901. }
  2902. void dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc *soc)
  2903. {
  2904. }
  2905. #endif /* WLAN_FEATURE_11BE_MLO */
  2906. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2907. #define DP_LMAC_PEER_ID_MSB_LEGACY 2
  2908. #define DP_LMAC_PEER_ID_MSB_MLO 3
  2909. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2910. struct cdp_peer_setup_info *setup_info,
  2911. enum cdp_host_reo_dest_ring *reo_dest,
  2912. bool *hash_based,
  2913. uint8_t *lmac_peer_id_msb)
  2914. {
  2915. struct dp_soc *soc = vdev->pdev->soc;
  2916. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2917. if (!be_soc->mlo_enabled)
  2918. return dp_vdev_get_default_reo_hash(vdev, reo_dest,
  2919. hash_based);
  2920. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2921. *reo_dest = vdev->pdev->reo_dest;
  2922. /* Not a ML link peer use non-mlo */
  2923. if (!setup_info) {
  2924. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2925. return;
  2926. }
  2927. /* For STA ML VAP we do not have num links info at this point
  2928. * use MLO case always
  2929. */
  2930. if (vdev->opmode == wlan_op_mode_sta) {
  2931. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2932. return;
  2933. }
  2934. /* For AP ML VAP consider the peer as ML only it associates with
  2935. * multiple links
  2936. */
  2937. if (setup_info->num_links == 1) {
  2938. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2939. return;
  2940. }
  2941. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2942. }
  2943. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2944. uint32_t *remap0,
  2945. uint32_t *remap1,
  2946. uint32_t *remap2)
  2947. {
  2948. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2949. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  2950. uint32_t reo_mlo_config =
  2951. wlan_cfg_mlo_rx_ring_map_get(soc->wlan_cfg_ctx);
  2952. if (!be_soc->mlo_enabled)
  2953. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2954. *remap0 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2955. *remap1 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_config);
  2956. *remap2 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2957. return true;
  2958. }
  2959. #else
  2960. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2961. struct cdp_peer_setup_info *setup_info,
  2962. enum cdp_host_reo_dest_ring *reo_dest,
  2963. bool *hash_based,
  2964. uint8_t *lmac_peer_id_msb)
  2965. {
  2966. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2967. }
  2968. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2969. uint32_t *remap0,
  2970. uint32_t *remap1,
  2971. uint32_t *remap2)
  2972. {
  2973. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2974. }
  2975. #endif
  2976. #ifdef CONFIG_MLO_SINGLE_DEV
  2977. static inline
  2978. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2979. {
  2980. arch_ops->dp_tx_mlo_mcast_send = dp_tx_mlo_mcast_send_be;
  2981. }
  2982. #else
  2983. static inline
  2984. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2985. {
  2986. }
  2987. #endif
  2988. #ifdef IPA_OFFLOAD
  2989. static int8_t dp_ipa_get_bank_id_be(struct dp_soc *soc)
  2990. {
  2991. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2992. return be_soc->ipa_bank_id;
  2993. }
  2994. #ifdef QCA_IPA_LL_TX_FLOW_CONTROL
  2995. static void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2996. {
  2997. *wdi_ver = IPA_WDI_4;
  2998. }
  2999. #else
  3000. static inline void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  3001. {
  3002. }
  3003. #endif
  3004. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  3005. {
  3006. arch_ops->ipa_get_bank_id = dp_ipa_get_bank_id_be;
  3007. arch_ops->ipa_get_wdi_ver = dp_ipa_get_wdi_version_be;
  3008. }
  3009. #else /* !IPA_OFFLOAD */
  3010. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  3011. {
  3012. }
  3013. #endif /* IPA_OFFLOAD */
  3014. void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
  3015. {
  3016. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  3017. arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
  3018. arch_ops->dp_rx_process = dp_rx_process_be;
  3019. arch_ops->dp_tx_send_fast = dp_tx_fast_send_be;
  3020. arch_ops->tx_comp_get_params_from_hal_desc =
  3021. dp_tx_comp_get_params_from_hal_desc_be;
  3022. arch_ops->dp_tx_process_htt_completion =
  3023. dp_tx_process_htt_completion_be;
  3024. arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_be;
  3025. arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_be;
  3026. arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_be;
  3027. arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_be;
  3028. arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_be;
  3029. arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_be;
  3030. arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
  3031. dp_wbm_get_rx_desc_from_hal_desc_be;
  3032. arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
  3033. arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
  3034. arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
  3035. #endif
  3036. arch_ops->txrx_get_context_size = dp_get_context_size_be;
  3037. #ifdef WIFI_MONITOR_SUPPORT
  3038. arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_be;
  3039. #endif
  3040. arch_ops->dp_rx_desc_cookie_2_va =
  3041. dp_rx_desc_cookie_2_va_be;
  3042. arch_ops->dp_rx_intrabss_mcast_handler =
  3043. dp_rx_intrabss_mcast_handler_be;
  3044. arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_be;
  3045. arch_ops->txrx_soc_attach = dp_soc_attach_be;
  3046. arch_ops->txrx_soc_detach = dp_soc_detach_be;
  3047. arch_ops->txrx_soc_init = dp_soc_init_be;
  3048. arch_ops->txrx_soc_deinit = dp_soc_deinit_be_wrapper;
  3049. arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_be;
  3050. arch_ops->txrx_soc_srng_init = dp_soc_srng_init_be;
  3051. arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_be;
  3052. arch_ops->txrx_soc_srng_free = dp_soc_srng_free_be;
  3053. arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
  3054. arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
  3055. arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
  3056. arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
  3057. arch_ops->txrx_peer_setup = dp_peer_setup_be;
  3058. arch_ops->txrx_peer_map_attach = dp_peer_map_attach_be;
  3059. arch_ops->txrx_peer_map_detach = dp_peer_map_detach_be;
  3060. arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
  3061. arch_ops->dp_rx_peer_metadata_peer_id_get =
  3062. dp_rx_peer_metadata_peer_id_get_be;
  3063. arch_ops->soc_cfg_attach = dp_soc_cfg_attach_be;
  3064. arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_be;
  3065. arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_be;
  3066. dp_initialize_arch_ops_be_mlo(arch_ops);
  3067. arch_ops->dp_soc_get_num_soc = dp_soc_get_num_soc_be;
  3068. arch_ops->dp_peer_rx_reorder_queue_setup =
  3069. dp_peer_rx_reorder_queue_setup_be;
  3070. arch_ops->dp_rx_peer_set_link_id = dp_rx_set_link_id_be;
  3071. arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
  3072. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  3073. arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
  3074. arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
  3075. dp_reconfig_tx_vdev_mcast_ctrl_be;
  3076. arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
  3077. #endif
  3078. #ifdef WLAN_SUPPORT_PPEDS
  3079. arch_ops->ppeds_handle_attached = dp_ppeds_handle_attached;
  3080. arch_ops->dp_txrx_ppeds_rings_status = dp_ppeds_rings_status;
  3081. arch_ops->txrx_soc_ppeds_start = dp_ppeds_start_soc_be;
  3082. arch_ops->txrx_soc_ppeds_stop = dp_ppeds_stop_soc_be;
  3083. arch_ops->dp_register_ppeds_interrupts = dp_register_ppeds_interrupts;
  3084. arch_ops->dp_free_ppeds_interrupts = dp_free_ppeds_interrupts;
  3085. arch_ops->dp_tx_ppeds_inuse_desc = dp_ppeds_inuse_desc;
  3086. arch_ops->dp_ppeds_clear_stats = dp_ppeds_clear_stats;
  3087. arch_ops->dp_txrx_ppeds_rings_stats = dp_ppeds_rings_stats;
  3088. arch_ops->dp_txrx_ppeds_clear_rings_stats = dp_ppeds_clear_rings_stats;
  3089. arch_ops->dp_tx_ppeds_cfg_astidx_cache_mapping =
  3090. dp_tx_ppeds_cfg_astidx_cache_mapping;
  3091. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3092. arch_ops->txrx_soc_ppeds_interrupt_stop = dp_ppeds_interrupt_stop_be;
  3093. arch_ops->txrx_soc_ppeds_interrupt_start = dp_ppeds_interrupt_start_be;
  3094. arch_ops->txrx_soc_ppeds_service_status_update =
  3095. dp_ppeds_service_status_update_be;
  3096. arch_ops->txrx_soc_ppeds_enabled_check = dp_ppeds_is_enabled_on_soc;
  3097. arch_ops->txrx_soc_ppeds_txdesc_pool_reset =
  3098. dp_ppeds_tx_desc_pool_reset;
  3099. #endif
  3100. #endif
  3101. dp_init_near_full_arch_ops_be(arch_ops);
  3102. arch_ops->get_reo_qdesc_addr = dp_rx_get_reo_qdesc_addr_be;
  3103. arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
  3104. arch_ops->dp_set_rx_fst = dp_set_rx_fst_be;
  3105. arch_ops->dp_get_rx_fst = dp_get_rx_fst_be;
  3106. arch_ops->dp_rx_fst_deref = dp_rx_fst_release_ref_be;
  3107. arch_ops->dp_rx_fst_ref = dp_rx_fst_get_ref_be;
  3108. arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;
  3109. arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_be;
  3110. arch_ops->reo_remap_config = dp_reo_remap_config_be;
  3111. arch_ops->txrx_get_vdev_mcast_param = dp_txrx_get_vdev_mcast_param_be;
  3112. arch_ops->txrx_srng_init = dp_srng_init_be;
  3113. arch_ops->dp_get_vdev_stats_for_unmap_peer =
  3114. dp_get_vdev_stats_for_unmap_peer_be;
  3115. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  3116. arch_ops->dp_update_ring_hptp = dp_update_ring_hptp;
  3117. #endif
  3118. arch_ops->dp_flush_tx_ring = dp_flush_tcl_ring;
  3119. arch_ops->dp_soc_interrupt_attach = dp_soc_interrupt_attach_be;
  3120. arch_ops->dp_soc_attach_poll = dp_soc_attach_poll_be;
  3121. arch_ops->dp_soc_interrupt_detach = dp_soc_interrupt_detach_be;
  3122. arch_ops->dp_service_srngs = dp_service_srngs_be;
  3123. dp_initialize_arch_ops_be_ipa(arch_ops);
  3124. dp_initialize_arch_ops_be_single_dev(arch_ops);
  3125. dp_initialize_arch_ops_be_fisa(arch_ops);
  3126. }
  3127. #ifdef QCA_SUPPORT_PRIMARY_LINK_MIGRATE
  3128. static void
  3129. dp_primary_link_migration(struct dp_soc *soc, void *cb_ctxt,
  3130. union hal_reo_status *reo_status)
  3131. {
  3132. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  3133. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  3134. struct dp_soc *pr_soc = NULL;
  3135. struct dp_peer_info *pr_peer_info = (struct dp_peer_info *)cb_ctxt;
  3136. struct dp_peer *new_primary_peer = NULL;
  3137. struct dp_peer *mld_peer = NULL;
  3138. uint8_t primary_vdev_id;
  3139. struct cdp_txrx_peer_params_update params = {0};
  3140. uint8_t tid;
  3141. uint8_t is_wds = 0;
  3142. uint16_t hw_peer_id;
  3143. uint16_t ast_hash;
  3144. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, pr_peer_info->chip_id);
  3145. if (!pr_soc) {
  3146. dp_htt_err("Invalid soc");
  3147. qdf_mem_free(pr_peer_info);
  3148. return;
  3149. }
  3150. new_primary_peer = pr_soc->peer_id_to_obj_map[
  3151. pr_peer_info->primary_peer_id];
  3152. if (!new_primary_peer) {
  3153. dp_htt_err("New primary peer is NULL");
  3154. qdf_mem_free(pr_peer_info);
  3155. return;
  3156. }
  3157. mld_peer = DP_GET_MLD_PEER_FROM_PEER(new_primary_peer);
  3158. if (!mld_peer) {
  3159. dp_htt_err("MLD peer is NULL");
  3160. qdf_mem_free(pr_peer_info);
  3161. return;
  3162. }
  3163. new_primary_peer->primary_link = 1;
  3164. hw_peer_id = pr_peer_info->hw_peer_id;
  3165. ast_hash = pr_peer_info->ast_hash;
  3166. /* Add ast enteries for new primary peer */
  3167. if (pr_soc->ast_offload_support && pr_soc->host_ast_db_enable) {
  3168. dp_peer_host_add_map_ast(pr_soc, mld_peer->peer_id, mld_peer->mac_addr.raw,
  3169. hw_peer_id, new_primary_peer->vdev->vdev_id,
  3170. ast_hash, is_wds);
  3171. }
  3172. /*
  3173. * Check if reo_qref_table_en is set and if
  3174. * rx_tid qdesc for tid 0 is already setup and perform
  3175. * qref write to LUT for Tid 0 and 16.
  3176. *
  3177. */
  3178. if (hal_reo_shared_qaddr_is_enable(pr_soc->hal_soc) &&
  3179. mld_peer->rx_tid[0].hw_qdesc_vaddr_unaligned) {
  3180. for (tid = 0; tid < DP_MAX_TIDS; tid++)
  3181. hal_reo_shared_qaddr_write(pr_soc->hal_soc,
  3182. mld_peer->peer_id,
  3183. tid,
  3184. mld_peer->rx_tid[tid].hw_qdesc_paddr);
  3185. }
  3186. if (pr_soc && pr_soc->cdp_soc.ol_ops->update_primary_link)
  3187. pr_soc->cdp_soc.ol_ops->update_primary_link(pr_soc->ctrl_psoc,
  3188. new_primary_peer->mac_addr.raw);
  3189. primary_vdev_id = new_primary_peer->vdev->vdev_id;
  3190. dp_vdev_unref_delete(soc, mld_peer->vdev, DP_MOD_ID_CHILD);
  3191. mld_peer->vdev = dp_vdev_get_ref_by_id(pr_soc, primary_vdev_id,
  3192. DP_MOD_ID_CHILD);
  3193. mld_peer->txrx_peer->vdev = mld_peer->vdev;
  3194. params.vdev_id = new_primary_peer->vdev->vdev_id;
  3195. params.peer_mac = mld_peer->mac_addr.raw;
  3196. params.chip_id = pr_peer_info->chip_id;
  3197. params.pdev_id = new_primary_peer->vdev->pdev->pdev_id;
  3198. if (new_primary_peer->vdev->opmode == wlan_op_mode_sta) {
  3199. dp_wdi_event_handler(
  3200. WDI_EVENT_STA_PRIMARY_UMAC_UPDATE,
  3201. pr_soc, (void *)&params,
  3202. new_primary_peer->peer_id,
  3203. WDI_NO_VAL, params.pdev_id);
  3204. } else {
  3205. dp_wdi_event_handler(
  3206. WDI_EVENT_PEER_PRIMARY_UMAC_UPDATE,
  3207. pr_soc, (void *)&params,
  3208. new_primary_peer->peer_id,
  3209. WDI_NO_VAL, params.pdev_id);
  3210. }
  3211. qdf_mem_free(pr_peer_info);
  3212. }
  3213. #ifdef WLAN_SUPPORT_PPEDS
  3214. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  3215. struct dp_peer *pr_peer,
  3216. uint16_t *src_info)
  3217. {
  3218. struct dp_soc_be *be_soc_mld = NULL;
  3219. struct cdp_ds_vp_params vp_params = {0};
  3220. struct dp_ppe_vp_profile *ppe_vp_profile;
  3221. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  3222. struct cdp_soc_t *cdp_soc = &pr_soc->cdp_soc;
  3223. /*
  3224. * Extract the VP profile from the VAP
  3225. */
  3226. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  3227. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  3228. return QDF_STATUS_E_NULL_VALUE;
  3229. }
  3230. /*
  3231. * Check if PPE DS routing is enabled on the associated vap.
  3232. */
  3233. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(
  3234. pr_soc->ctrl_psoc,
  3235. pr_peer->vdev->vdev_id,
  3236. &vp_params);
  3237. if (QDF_IS_STATUS_ERROR(qdf_status)) {
  3238. dp_err("Could not find ppeds profile info");
  3239. return QDF_STATUS_E_NULL_VALUE;
  3240. }
  3241. /* Check if PPE DS routing is enabled on
  3242. * the associated vap.
  3243. */
  3244. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  3245. return qdf_status;
  3246. be_soc_mld = dp_get_be_soc_from_dp_soc(pr_soc);
  3247. ppe_vp_profile = &be_soc_mld->ppe_vp_profile[
  3248. vp_params.ppe_vp_profile_idx];
  3249. *src_info = ppe_vp_profile->vp_num;
  3250. return qdf_status;
  3251. }
  3252. #else
  3253. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  3254. struct dp_peer *pr_peer,
  3255. uint16_t *src_info)
  3256. {
  3257. return QDF_STATUS_E_NOSUPPORT;
  3258. }
  3259. #endif
  3260. QDF_STATUS dp_htt_reo_migration(struct dp_soc *soc, uint16_t peer_id,
  3261. uint16_t ml_peer_id, uint16_t vdev_id,
  3262. uint8_t pdev_id, uint8_t chip_id)
  3263. {
  3264. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  3265. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  3266. uint16_t mld_peer_id = dp_gen_ml_peer_id(soc, ml_peer_id);
  3267. struct dp_soc *pr_soc = NULL;
  3268. struct dp_soc *current_pr_soc = NULL;
  3269. struct hal_reo_cmd_params params;
  3270. struct dp_rx_tid *rx_tid;
  3271. struct dp_peer *pr_peer = NULL;
  3272. struct dp_peer *mld_peer = NULL;
  3273. struct dp_soc *mld_soc = NULL;
  3274. struct dp_peer *current_pr_peer = NULL;
  3275. struct dp_peer_info *peer_info;
  3276. struct dp_vdev_be *be_vdev;
  3277. uint16_t src_info = 0;
  3278. QDF_STATUS status;
  3279. struct dp_ast_entry *ast_entry;
  3280. uint16_t hw_peer_id;
  3281. uint16_t ast_hash;
  3282. if (!dp_mlo) {
  3283. dp_htt_err("Invalid dp_mlo ctxt");
  3284. return QDF_STATUS_E_FAILURE;
  3285. }
  3286. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, chip_id);
  3287. if (!pr_soc) {
  3288. dp_htt_err("Invalid soc");
  3289. return QDF_STATUS_E_FAILURE;
  3290. }
  3291. pr_peer = pr_soc->peer_id_to_obj_map[peer_id];
  3292. if (!pr_peer || !(IS_MLO_DP_LINK_PEER(pr_peer))) {
  3293. dp_htt_err("Invalid peer");
  3294. return QDF_STATUS_E_FAILURE;
  3295. }
  3296. mld_peer = DP_GET_MLD_PEER_FROM_PEER(pr_peer);
  3297. if (!mld_peer || (mld_peer->peer_id != mld_peer_id)) {
  3298. dp_htt_err("Invalid mld peer");
  3299. return QDF_STATUS_E_FAILURE;
  3300. }
  3301. be_vdev = dp_get_be_vdev_from_dp_vdev(pr_peer->vdev);
  3302. if (!be_vdev) {
  3303. dp_htt_err("Invalid be vdev");
  3304. return QDF_STATUS_E_FAILURE;
  3305. }
  3306. mld_soc = mld_peer->vdev->pdev->soc;
  3307. status = dp_get_ppe_info_for_vap(pr_soc, pr_peer, &src_info);
  3308. if (status == QDF_STATUS_E_NULL_VALUE) {
  3309. dp_htt_err("Invalid ppe info for the vdev");
  3310. return QDF_STATUS_E_FAILURE;
  3311. }
  3312. current_pr_peer = dp_get_primary_link_peer_by_id(
  3313. pr_soc,
  3314. mld_peer->peer_id,
  3315. DP_MOD_ID_HTT);
  3316. /* Making existing primary peer as non primary */
  3317. if (current_pr_peer) {
  3318. current_pr_peer->primary_link = 0;
  3319. dp_peer_unref_delete(current_pr_peer, DP_MOD_ID_HTT);
  3320. }
  3321. current_pr_soc = mld_peer->vdev->pdev->soc;
  3322. dp_peer_rx_reo_shared_qaddr_delete(current_pr_soc, mld_peer);
  3323. /* delete ast entry for current primary peer */
  3324. qdf_spin_lock_bh(&current_pr_soc->ast_lock);
  3325. ast_entry = dp_peer_ast_hash_find_soc(current_pr_soc, mld_peer->mac_addr.raw);
  3326. if (!ast_entry) {
  3327. dp_htt_err("Invalid ast entry");
  3328. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  3329. return QDF_STATUS_E_FAILURE;
  3330. }
  3331. hw_peer_id = ast_entry->ast_idx;
  3332. ast_hash = ast_entry->ast_hash_value;
  3333. dp_peer_unlink_ast_entry(current_pr_soc, ast_entry, mld_peer);
  3334. if (ast_entry->is_mapped)
  3335. current_pr_soc->ast_table[ast_entry->ast_idx] = NULL;
  3336. dp_peer_free_ast_entry(current_pr_soc, ast_entry);
  3337. mld_peer->self_ast_entry = NULL;
  3338. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  3339. peer_info = qdf_mem_malloc(sizeof(struct dp_peer_info));
  3340. if (!peer_info) {
  3341. dp_htt_err("Malloc failed");
  3342. return QDF_STATUS_E_FAILURE;
  3343. }
  3344. peer_info->primary_peer_id = peer_id;
  3345. peer_info->chip_id = chip_id;
  3346. peer_info->hw_peer_id = hw_peer_id;
  3347. peer_info->ast_hash = ast_hash;
  3348. qdf_mem_zero(&params, sizeof(params));
  3349. rx_tid = &mld_peer->rx_tid[0];
  3350. params.std.need_status = 1;
  3351. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  3352. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  3353. params.u.fl_cache_params.flush_no_inval = 0;
  3354. params.u.fl_cache_params.flush_entire_cache = 1;
  3355. status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_CACHE, &params,
  3356. dp_primary_link_migration,
  3357. (void *)peer_info);
  3358. if (status != QDF_STATUS_SUCCESS) {
  3359. dp_htt_err("Reo flush failed");
  3360. qdf_mem_free(peer_info);
  3361. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  3362. chip_id, peer_id, ml_peer_id,
  3363. src_info, QDF_STATUS_E_FAILURE);
  3364. }
  3365. qdf_mem_zero(&params, sizeof(params));
  3366. params.std.need_status = 0;
  3367. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  3368. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  3369. params.u.unblk_cache_params.type = UNBLOCK_CACHE;
  3370. dp_reo_send_cmd(current_pr_soc, CMD_UNBLOCK_CACHE, &params, NULL, NULL);
  3371. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  3372. chip_id, peer_id, ml_peer_id,
  3373. src_info, QDF_STATUS_SUCCESS);
  3374. return QDF_STATUS_SUCCESS;
  3375. }
  3376. #endif