sde_rm.c 47 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s] " fmt, __func__
  6. #include "sde_kms.h"
  7. #include "sde_hw_lm.h"
  8. #include "sde_hw_ctl.h"
  9. #include "sde_hw_cdm.h"
  10. #include "sde_hw_dspp.h"
  11. #include "sde_hw_ds.h"
  12. #include "sde_hw_pingpong.h"
  13. #include "sde_hw_intf.h"
  14. #include "sde_hw_wb.h"
  15. #include "sde_encoder.h"
  16. #include "sde_connector.h"
  17. #include "sde_hw_dsc.h"
  18. #define RESERVED_BY_OTHER(h, r) \
  19. (((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) ||\
  20. ((h)->rsvp_nxt && ((h)->rsvp_nxt->enc_id != (r)->enc_id)))
  21. #define RM_RQ_LOCK(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK))
  22. #define RM_RQ_CLEAR(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_CLEAR))
  23. #define RM_RQ_DSPP(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DSPP))
  24. #define RM_RQ_DS(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DS))
  25. #define RM_RQ_CWB(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_CWB))
  26. #define RM_IS_TOPOLOGY_MATCH(t, r) ((t).num_lm == (r).num_lm && \
  27. (t).num_comp_enc == (r).num_enc && \
  28. (t).num_intf == (r).num_intf)
  29. /**
  30. * toplogy information to be used when ctl path version does not
  31. * support driving more than one interface per ctl_path
  32. */
  33. static const struct sde_rm_topology_def g_top_table[] = {
  34. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  35. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  36. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  37. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 2, true },
  38. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 2, true },
  39. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  40. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  41. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  42. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  43. };
  44. /**
  45. * topology information to be used when the ctl path version
  46. * is SDE_CTL_CFG_VERSION_1_0_0
  47. */
  48. static const struct sde_rm_topology_def g_ctl_ver_1_top_table[] = {
  49. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  50. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  51. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  52. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 1, true },
  53. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 1, true },
  54. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  55. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  56. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  57. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  58. };
  59. /**
  60. * struct sde_rm_requirements - Reservation requirements parameter bundle
  61. * @top_ctrl: topology control preference from kernel client
  62. * @top: selected topology for the display
  63. * @hw_res: Hardware resources required as reported by the encoders
  64. */
  65. struct sde_rm_requirements {
  66. uint64_t top_ctrl;
  67. const struct sde_rm_topology_def *topology;
  68. struct sde_encoder_hw_resources hw_res;
  69. };
  70. /**
  71. * struct sde_rm_rsvp - Use Case Reservation tagging structure
  72. * Used to tag HW blocks as reserved by a CRTC->Encoder->Connector chain
  73. * By using as a tag, rather than lists of pointers to HW blocks used
  74. * we can avoid some list management since we don't know how many blocks
  75. * of each type a given use case may require.
  76. * @list: List head for list of all reservations
  77. * @seq: Global RSVP sequence number for debugging, especially for
  78. * differentiating differenct allocations for same encoder.
  79. * @enc_id: Reservations are tracked by Encoder DRM object ID.
  80. * CRTCs may be connected to multiple Encoders.
  81. * An encoder or connector id identifies the display path.
  82. * @topology DRM<->HW topology use case
  83. */
  84. struct sde_rm_rsvp {
  85. struct list_head list;
  86. uint32_t seq;
  87. uint32_t enc_id;
  88. enum sde_rm_topology_name topology;
  89. };
  90. /**
  91. * struct sde_rm_hw_blk - hardware block tracking list member
  92. * @list: List head for list of all hardware blocks tracking items
  93. * @rsvp: Pointer to use case reservation if reserved by a client
  94. * @rsvp_nxt: Temporary pointer used during reservation to the incoming
  95. * request. Will be swapped into rsvp if proposal is accepted
  96. * @type: Type of hardware block this structure tracks
  97. * @id: Hardware ID number, within it's own space, ie. LM_X
  98. * @catalog: Pointer to the hardware catalog entry for this block
  99. * @hw: Pointer to the hardware register access object for this block
  100. */
  101. struct sde_rm_hw_blk {
  102. struct list_head list;
  103. struct sde_rm_rsvp *rsvp;
  104. struct sde_rm_rsvp *rsvp_nxt;
  105. enum sde_hw_blk_type type;
  106. uint32_t id;
  107. struct sde_hw_blk *hw;
  108. };
  109. /**
  110. * sde_rm_dbg_rsvp_stage - enum of steps in making reservation for event logging
  111. */
  112. enum sde_rm_dbg_rsvp_stage {
  113. SDE_RM_STAGE_BEGIN,
  114. SDE_RM_STAGE_AFTER_CLEAR,
  115. SDE_RM_STAGE_AFTER_RSVPNEXT,
  116. SDE_RM_STAGE_FINAL
  117. };
  118. static void _sde_rm_print_rsvps(
  119. struct sde_rm *rm,
  120. enum sde_rm_dbg_rsvp_stage stage)
  121. {
  122. struct sde_rm_rsvp *rsvp;
  123. struct sde_rm_hw_blk *blk;
  124. enum sde_hw_blk_type type;
  125. SDE_DEBUG("%d\n", stage);
  126. list_for_each_entry(rsvp, &rm->rsvps, list) {
  127. SDE_DEBUG("%d rsvp[s%ue%u] topology %d\n", stage, rsvp->seq,
  128. rsvp->enc_id, rsvp->topology);
  129. SDE_EVT32(stage, rsvp->seq, rsvp->enc_id, rsvp->topology);
  130. }
  131. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  132. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  133. if (!blk->rsvp && !blk->rsvp_nxt)
  134. continue;
  135. SDE_DEBUG("%d rsvp[s%ue%u->s%ue%u] %d %d\n", stage,
  136. (blk->rsvp) ? blk->rsvp->seq : 0,
  137. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  138. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  139. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  140. blk->type, blk->id);
  141. SDE_EVT32(stage,
  142. (blk->rsvp) ? blk->rsvp->seq : 0,
  143. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  144. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  145. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  146. blk->type, blk->id);
  147. }
  148. }
  149. }
  150. struct sde_hw_mdp *sde_rm_get_mdp(struct sde_rm *rm)
  151. {
  152. return rm->hw_mdp;
  153. }
  154. void sde_rm_init_hw_iter(
  155. struct sde_rm_hw_iter *iter,
  156. uint32_t enc_id,
  157. enum sde_hw_blk_type type)
  158. {
  159. memset(iter, 0, sizeof(*iter));
  160. iter->enc_id = enc_id;
  161. iter->type = type;
  162. }
  163. enum sde_rm_topology_name sde_rm_get_topology_name(
  164. struct msm_display_topology topology)
  165. {
  166. int i;
  167. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  168. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], topology))
  169. return g_top_table[i].top_name;
  170. return SDE_RM_TOPOLOGY_NONE;
  171. }
  172. static bool _sde_rm_get_hw_locked(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  173. {
  174. struct list_head *blk_list;
  175. if (!rm || !i || i->type >= SDE_HW_BLK_MAX) {
  176. SDE_ERROR("invalid rm\n");
  177. return false;
  178. }
  179. i->hw = NULL;
  180. blk_list = &rm->hw_blks[i->type];
  181. if (i->blk && (&i->blk->list == blk_list)) {
  182. SDE_DEBUG("attempt resume iteration past last\n");
  183. return false;
  184. }
  185. i->blk = list_prepare_entry(i->blk, blk_list, list);
  186. list_for_each_entry_continue(i->blk, blk_list, list) {
  187. struct sde_rm_rsvp *rsvp = i->blk->rsvp;
  188. if (i->blk->type != i->type) {
  189. SDE_ERROR("found incorrect block type %d on %d list\n",
  190. i->blk->type, i->type);
  191. return false;
  192. }
  193. if ((i->enc_id == 0) || (rsvp && rsvp->enc_id == i->enc_id)) {
  194. i->hw = i->blk->hw;
  195. SDE_DEBUG("found type %d id %d for enc %d\n",
  196. i->type, i->blk->id, i->enc_id);
  197. return true;
  198. }
  199. }
  200. SDE_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
  201. return false;
  202. }
  203. static bool _sde_rm_request_hw_blk_locked(struct sde_rm *rm,
  204. struct sde_rm_hw_request *hw_blk_info)
  205. {
  206. struct list_head *blk_list;
  207. struct sde_rm_hw_blk *blk = NULL;
  208. if (!rm || !hw_blk_info || hw_blk_info->type >= SDE_HW_BLK_MAX) {
  209. SDE_ERROR("invalid rm\n");
  210. return false;
  211. }
  212. hw_blk_info->hw = NULL;
  213. blk_list = &rm->hw_blks[hw_blk_info->type];
  214. blk = list_prepare_entry(blk, blk_list, list);
  215. list_for_each_entry_continue(blk, blk_list, list) {
  216. if (blk->type != hw_blk_info->type) {
  217. SDE_ERROR("found incorrect block type %d on %d list\n",
  218. blk->type, hw_blk_info->type);
  219. return false;
  220. }
  221. if (blk->hw->id == hw_blk_info->id) {
  222. hw_blk_info->hw = blk->hw;
  223. SDE_DEBUG("found type %d id %d\n",
  224. blk->type, blk->id);
  225. return true;
  226. }
  227. }
  228. SDE_DEBUG("no match, type %d id %d\n", hw_blk_info->type,
  229. hw_blk_info->id);
  230. return false;
  231. }
  232. bool sde_rm_get_hw(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  233. {
  234. bool ret;
  235. mutex_lock(&rm->rm_lock);
  236. ret = _sde_rm_get_hw_locked(rm, i);
  237. mutex_unlock(&rm->rm_lock);
  238. return ret;
  239. }
  240. bool sde_rm_request_hw_blk(struct sde_rm *rm, struct sde_rm_hw_request *hw)
  241. {
  242. bool ret;
  243. mutex_lock(&rm->rm_lock);
  244. ret = _sde_rm_request_hw_blk_locked(rm, hw);
  245. mutex_unlock(&rm->rm_lock);
  246. return ret;
  247. }
  248. static void _sde_rm_hw_destroy(enum sde_hw_blk_type type, void *hw)
  249. {
  250. switch (type) {
  251. case SDE_HW_BLK_LM:
  252. sde_hw_lm_destroy(hw);
  253. break;
  254. case SDE_HW_BLK_DSPP:
  255. sde_hw_dspp_destroy(hw);
  256. break;
  257. case SDE_HW_BLK_DS:
  258. sde_hw_ds_destroy(hw);
  259. break;
  260. case SDE_HW_BLK_CTL:
  261. sde_hw_ctl_destroy(hw);
  262. break;
  263. case SDE_HW_BLK_CDM:
  264. sde_hw_cdm_destroy(hw);
  265. break;
  266. case SDE_HW_BLK_PINGPONG:
  267. sde_hw_pingpong_destroy(hw);
  268. break;
  269. case SDE_HW_BLK_INTF:
  270. sde_hw_intf_destroy(hw);
  271. break;
  272. case SDE_HW_BLK_WB:
  273. sde_hw_wb_destroy(hw);
  274. break;
  275. case SDE_HW_BLK_DSC:
  276. sde_hw_dsc_destroy(hw);
  277. break;
  278. case SDE_HW_BLK_SSPP:
  279. /* SSPPs are not managed by the resource manager */
  280. case SDE_HW_BLK_TOP:
  281. /* Top is a singleton, not managed in hw_blks list */
  282. case SDE_HW_BLK_MAX:
  283. default:
  284. SDE_ERROR("unsupported block type %d\n", type);
  285. break;
  286. }
  287. }
  288. int sde_rm_destroy(struct sde_rm *rm)
  289. {
  290. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  291. struct sde_rm_hw_blk *hw_cur, *hw_nxt;
  292. enum sde_hw_blk_type type;
  293. if (!rm) {
  294. SDE_ERROR("invalid rm\n");
  295. return -EINVAL;
  296. }
  297. list_for_each_entry_safe(rsvp_cur, rsvp_nxt, &rm->rsvps, list) {
  298. list_del(&rsvp_cur->list);
  299. kfree(rsvp_cur);
  300. }
  301. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  302. list_for_each_entry_safe(hw_cur, hw_nxt, &rm->hw_blks[type],
  303. list) {
  304. list_del(&hw_cur->list);
  305. _sde_rm_hw_destroy(hw_cur->type, hw_cur->hw);
  306. kfree(hw_cur);
  307. }
  308. }
  309. sde_hw_mdp_destroy(rm->hw_mdp);
  310. rm->hw_mdp = NULL;
  311. mutex_destroy(&rm->rm_lock);
  312. return 0;
  313. }
  314. static int _sde_rm_hw_blk_create(
  315. struct sde_rm *rm,
  316. struct sde_mdss_cfg *cat,
  317. void __iomem *mmio,
  318. enum sde_hw_blk_type type,
  319. uint32_t id,
  320. void *hw_catalog_info)
  321. {
  322. struct sde_rm_hw_blk *blk;
  323. struct sde_hw_mdp *hw_mdp;
  324. void *hw;
  325. hw_mdp = rm->hw_mdp;
  326. switch (type) {
  327. case SDE_HW_BLK_LM:
  328. hw = sde_hw_lm_init(id, mmio, cat);
  329. break;
  330. case SDE_HW_BLK_DSPP:
  331. hw = sde_hw_dspp_init(id, mmio, cat);
  332. break;
  333. case SDE_HW_BLK_DS:
  334. hw = sde_hw_ds_init(id, mmio, cat);
  335. break;
  336. case SDE_HW_BLK_CTL:
  337. hw = sde_hw_ctl_init(id, mmio, cat);
  338. break;
  339. case SDE_HW_BLK_CDM:
  340. hw = sde_hw_cdm_init(id, mmio, cat, hw_mdp);
  341. break;
  342. case SDE_HW_BLK_PINGPONG:
  343. hw = sde_hw_pingpong_init(id, mmio, cat);
  344. break;
  345. case SDE_HW_BLK_INTF:
  346. hw = sde_hw_intf_init(id, mmio, cat);
  347. break;
  348. case SDE_HW_BLK_WB:
  349. hw = sde_hw_wb_init(id, mmio, cat, hw_mdp);
  350. break;
  351. case SDE_HW_BLK_DSC:
  352. hw = sde_hw_dsc_init(id, mmio, cat);
  353. break;
  354. case SDE_HW_BLK_SSPP:
  355. /* SSPPs are not managed by the resource manager */
  356. case SDE_HW_BLK_TOP:
  357. /* Top is a singleton, not managed in hw_blks list */
  358. case SDE_HW_BLK_MAX:
  359. default:
  360. SDE_ERROR("unsupported block type %d\n", type);
  361. return -EINVAL;
  362. }
  363. if (IS_ERR_OR_NULL(hw)) {
  364. SDE_ERROR("failed hw object creation: type %d, err %ld\n",
  365. type, PTR_ERR(hw));
  366. return -EFAULT;
  367. }
  368. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  369. if (!blk) {
  370. _sde_rm_hw_destroy(type, hw);
  371. return -ENOMEM;
  372. }
  373. blk->type = type;
  374. blk->id = id;
  375. blk->hw = hw;
  376. list_add_tail(&blk->list, &rm->hw_blks[type]);
  377. return 0;
  378. }
  379. static int _sde_rm_hw_blk_create_new(struct sde_rm *rm,
  380. struct sde_mdss_cfg *cat,
  381. void __iomem *mmio)
  382. {
  383. int i, rc = 0;
  384. for (i = 0; i < cat->dspp_count; i++) {
  385. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSPP,
  386. cat->dspp[i].id, &cat->dspp[i]);
  387. if (rc) {
  388. SDE_ERROR("failed: dspp hw not available\n");
  389. goto fail;
  390. }
  391. }
  392. if (cat->mdp[0].has_dest_scaler) {
  393. for (i = 0; i < cat->ds_count; i++) {
  394. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DS,
  395. cat->ds[i].id, &cat->ds[i]);
  396. if (rc) {
  397. SDE_ERROR("failed: ds hw not available\n");
  398. goto fail;
  399. }
  400. }
  401. }
  402. for (i = 0; i < cat->pingpong_count; i++) {
  403. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_PINGPONG,
  404. cat->pingpong[i].id, &cat->pingpong[i]);
  405. if (rc) {
  406. SDE_ERROR("failed: pp hw not available\n");
  407. goto fail;
  408. }
  409. }
  410. for (i = 0; i < cat->dsc_count; i++) {
  411. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSC,
  412. cat->dsc[i].id, &cat->dsc[i]);
  413. if (rc) {
  414. SDE_ERROR("failed: dsc hw not available\n");
  415. goto fail;
  416. }
  417. }
  418. for (i = 0; i < cat->intf_count; i++) {
  419. if (cat->intf[i].type == INTF_NONE) {
  420. SDE_DEBUG("skip intf %d with type none\n", i);
  421. continue;
  422. }
  423. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_INTF,
  424. cat->intf[i].id, &cat->intf[i]);
  425. if (rc) {
  426. SDE_ERROR("failed: intf hw not available\n");
  427. goto fail;
  428. }
  429. }
  430. for (i = 0; i < cat->wb_count; i++) {
  431. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_WB,
  432. cat->wb[i].id, &cat->wb[i]);
  433. if (rc) {
  434. SDE_ERROR("failed: wb hw not available\n");
  435. goto fail;
  436. }
  437. }
  438. for (i = 0; i < cat->ctl_count; i++) {
  439. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CTL,
  440. cat->ctl[i].id, &cat->ctl[i]);
  441. if (rc) {
  442. SDE_ERROR("failed: ctl hw not available\n");
  443. goto fail;
  444. }
  445. }
  446. for (i = 0; i < cat->cdm_count; i++) {
  447. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CDM,
  448. cat->cdm[i].id, &cat->cdm[i]);
  449. if (rc) {
  450. SDE_ERROR("failed: cdm hw not available\n");
  451. goto fail;
  452. }
  453. }
  454. fail:
  455. return rc;
  456. }
  457. int sde_rm_init(struct sde_rm *rm,
  458. struct sde_mdss_cfg *cat,
  459. void __iomem *mmio,
  460. struct drm_device *dev)
  461. {
  462. int i, rc = 0;
  463. enum sde_hw_blk_type type;
  464. if (!rm || !cat || !mmio || !dev) {
  465. SDE_ERROR("invalid input params\n");
  466. return -EINVAL;
  467. }
  468. /* Clear, setup lists */
  469. memset(rm, 0, sizeof(*rm));
  470. mutex_init(&rm->rm_lock);
  471. INIT_LIST_HEAD(&rm->rsvps);
  472. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  473. INIT_LIST_HEAD(&rm->hw_blks[type]);
  474. rm->dev = dev;
  475. if (IS_SDE_CTL_REV_100(cat->ctl_rev))
  476. rm->topology_tbl = g_ctl_ver_1_top_table;
  477. else
  478. rm->topology_tbl = g_top_table;
  479. /* Some of the sub-blocks require an mdptop to be created */
  480. rm->hw_mdp = sde_hw_mdptop_init(MDP_TOP, mmio, cat);
  481. if (IS_ERR_OR_NULL(rm->hw_mdp)) {
  482. rc = PTR_ERR(rm->hw_mdp);
  483. rm->hw_mdp = NULL;
  484. SDE_ERROR("failed: mdp hw not available\n");
  485. goto fail;
  486. }
  487. /* Interrogate HW catalog and create tracking items for hw blocks */
  488. for (i = 0; i < cat->mixer_count; i++) {
  489. struct sde_lm_cfg *lm = &cat->mixer[i];
  490. if (lm->pingpong == PINGPONG_MAX) {
  491. SDE_ERROR("mixer %d without pingpong\n", lm->id);
  492. goto fail;
  493. }
  494. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_LM,
  495. cat->mixer[i].id, &cat->mixer[i]);
  496. if (rc) {
  497. SDE_ERROR("failed: lm hw not available\n");
  498. goto fail;
  499. }
  500. if (!rm->lm_max_width) {
  501. rm->lm_max_width = lm->sblk->maxwidth;
  502. } else if (rm->lm_max_width != lm->sblk->maxwidth) {
  503. /*
  504. * Don't expect to have hw where lm max widths differ.
  505. * If found, take the min.
  506. */
  507. SDE_ERROR("unsupported: lm maxwidth differs\n");
  508. if (rm->lm_max_width > lm->sblk->maxwidth)
  509. rm->lm_max_width = lm->sblk->maxwidth;
  510. }
  511. }
  512. rc = _sde_rm_hw_blk_create_new(rm, cat, mmio);
  513. if (!rc)
  514. return 0;
  515. fail:
  516. sde_rm_destroy(rm);
  517. return rc;
  518. }
  519. static bool _sde_rm_check_lm(
  520. struct sde_rm *rm,
  521. struct sde_rm_rsvp *rsvp,
  522. struct sde_rm_requirements *reqs,
  523. const struct sde_lm_cfg *lm_cfg,
  524. struct sde_rm_hw_blk *lm,
  525. struct sde_rm_hw_blk **dspp,
  526. struct sde_rm_hw_blk **ds,
  527. struct sde_rm_hw_blk **pp)
  528. {
  529. bool is_valid_dspp, is_valid_ds, ret;
  530. is_valid_dspp = (lm_cfg->dspp != DSPP_MAX) ? true : false;
  531. is_valid_ds = (lm_cfg->ds != DS_MAX) ? true : false;
  532. /**
  533. * RM_RQ_X: specification of which LMs to choose
  534. * is_valid_X: indicates whether LM is tied with block X
  535. * ret: true if given LM matches the user requirement,
  536. * false otherwise
  537. */
  538. if (RM_RQ_DSPP(reqs) && RM_RQ_DS(reqs))
  539. ret = (is_valid_dspp && is_valid_ds);
  540. else if (RM_RQ_DSPP(reqs))
  541. ret = is_valid_dspp;
  542. else if (RM_RQ_DS(reqs))
  543. ret = is_valid_ds;
  544. else
  545. ret = !(is_valid_dspp || is_valid_ds);
  546. if (!ret) {
  547. SDE_DEBUG(
  548. "fail:lm(%d)req_dspp(%d)dspp(%d)req_ds(%d)ds(%d)\n",
  549. lm_cfg->id, (bool)(RM_RQ_DSPP(reqs)),
  550. lm_cfg->dspp, (bool)(RM_RQ_DS(reqs)),
  551. lm_cfg->ds);
  552. return ret;
  553. }
  554. return true;
  555. }
  556. static bool _sde_rm_reserve_dspp(
  557. struct sde_rm *rm,
  558. struct sde_rm_rsvp *rsvp,
  559. const struct sde_lm_cfg *lm_cfg,
  560. struct sde_rm_hw_blk *lm,
  561. struct sde_rm_hw_blk **dspp)
  562. {
  563. struct sde_rm_hw_iter iter;
  564. if (lm_cfg->dspp != DSPP_MAX) {
  565. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSPP);
  566. while (_sde_rm_get_hw_locked(rm, &iter)) {
  567. if (iter.blk->id == lm_cfg->dspp) {
  568. *dspp = iter.blk;
  569. break;
  570. }
  571. }
  572. if (!*dspp) {
  573. SDE_DEBUG("lm %d failed to retrieve dspp %d\n", lm->id,
  574. lm_cfg->dspp);
  575. return false;
  576. }
  577. if (RESERVED_BY_OTHER(*dspp, rsvp)) {
  578. SDE_DEBUG("lm %d dspp %d already reserved\n",
  579. lm->id, (*dspp)->id);
  580. return false;
  581. }
  582. }
  583. return true;
  584. }
  585. static bool _sde_rm_reserve_ds(
  586. struct sde_rm *rm,
  587. struct sde_rm_rsvp *rsvp,
  588. const struct sde_lm_cfg *lm_cfg,
  589. struct sde_rm_hw_blk *lm,
  590. struct sde_rm_hw_blk **ds)
  591. {
  592. struct sde_rm_hw_iter iter;
  593. if (lm_cfg->ds != DS_MAX) {
  594. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DS);
  595. while (_sde_rm_get_hw_locked(rm, &iter)) {
  596. if (iter.blk->id == lm_cfg->ds) {
  597. *ds = iter.blk;
  598. break;
  599. }
  600. }
  601. if (!*ds) {
  602. SDE_DEBUG("lm %d failed to retrieve ds %d\n", lm->id,
  603. lm_cfg->ds);
  604. return false;
  605. }
  606. if (RESERVED_BY_OTHER(*ds, rsvp)) {
  607. SDE_DEBUG("lm %d ds %d already reserved\n",
  608. lm->id, (*ds)->id);
  609. return false;
  610. }
  611. }
  612. return true;
  613. }
  614. static bool _sde_rm_reserve_pp(
  615. struct sde_rm *rm,
  616. struct sde_rm_rsvp *rsvp,
  617. struct sde_rm_requirements *reqs,
  618. const struct sde_lm_cfg *lm_cfg,
  619. const struct sde_pingpong_cfg *pp_cfg,
  620. struct sde_rm_hw_blk *lm,
  621. struct sde_rm_hw_blk **dspp,
  622. struct sde_rm_hw_blk **ds,
  623. struct sde_rm_hw_blk **pp)
  624. {
  625. struct sde_rm_hw_iter iter;
  626. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_PINGPONG);
  627. while (_sde_rm_get_hw_locked(rm, &iter)) {
  628. if (iter.blk->id == lm_cfg->pingpong) {
  629. *pp = iter.blk;
  630. break;
  631. }
  632. }
  633. if (!*pp) {
  634. SDE_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
  635. return false;
  636. }
  637. if (RESERVED_BY_OTHER(*pp, rsvp)) {
  638. SDE_DEBUG("lm %d pp %d already reserved\n", lm->id,
  639. (*pp)->id);
  640. *dspp = NULL;
  641. *ds = NULL;
  642. return false;
  643. }
  644. pp_cfg = to_sde_hw_pingpong((*pp)->hw)->caps;
  645. if ((reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) &&
  646. !(test_bit(SDE_PINGPONG_SPLIT, &pp_cfg->features))) {
  647. SDE_DEBUG("pp %d doesn't support ppsplit\n", pp_cfg->id);
  648. *dspp = NULL;
  649. *ds = NULL;
  650. return false;
  651. }
  652. return true;
  653. }
  654. /**
  655. * _sde_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
  656. * proposed use case requirements, incl. hardwired dependent blocks like
  657. * pingpong, and dspp.
  658. * @rm: sde resource manager handle
  659. * @rsvp: reservation currently being created
  660. * @reqs: proposed use case requirements
  661. * @lm: proposed layer mixer, function checks if lm, and all other hardwired
  662. * blocks connected to the lm (pp, dspp) are available and appropriate
  663. * @dspp: output parameter, dspp block attached to the layer mixer.
  664. * NULL if dspp was not available, or not matching requirements.
  665. * @pp: output parameter, pingpong block attached to the layer mixer.
  666. * NULL if dspp was not available, or not matching requirements.
  667. * @primary_lm: if non-null, this function check if lm is compatible primary_lm
  668. * as well as satisfying all other requirements
  669. * @Return: true if lm matches all requirements, false otherwise
  670. */
  671. static bool _sde_rm_check_lm_and_get_connected_blks(
  672. struct sde_rm *rm,
  673. struct sde_rm_rsvp *rsvp,
  674. struct sde_rm_requirements *reqs,
  675. struct sde_rm_hw_blk *lm,
  676. struct sde_rm_hw_blk **dspp,
  677. struct sde_rm_hw_blk **ds,
  678. struct sde_rm_hw_blk **pp,
  679. struct sde_rm_hw_blk *primary_lm)
  680. {
  681. const struct sde_lm_cfg *lm_cfg = to_sde_hw_mixer(lm->hw)->cap;
  682. const struct sde_pingpong_cfg *pp_cfg;
  683. bool ret;
  684. u32 display_pref, cwb_pref;
  685. *dspp = NULL;
  686. *ds = NULL;
  687. *pp = NULL;
  688. display_pref = lm_cfg->features & BIT(SDE_DISP_PRIMARY_PREF);
  689. cwb_pref = lm_cfg->features & BIT(SDE_DISP_CWB_PREF);
  690. SDE_DEBUG("check lm %d: dspp %d ds %d pp %d disp_pref: %d cwb_pref%d\n",
  691. lm_cfg->id, lm_cfg->dspp, lm_cfg->ds,
  692. lm_cfg->pingpong, display_pref, cwb_pref);
  693. /* Check if this layer mixer is a peer of the proposed primary LM */
  694. if (primary_lm) {
  695. const struct sde_lm_cfg *prim_lm_cfg =
  696. to_sde_hw_mixer(primary_lm->hw)->cap;
  697. if (!test_bit(lm_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
  698. SDE_DEBUG("lm %d not peer of lm %d\n", lm_cfg->id,
  699. prim_lm_cfg->id);
  700. return false;
  701. }
  702. }
  703. /* bypass rest of the checks if LM for primary display is found */
  704. if (!display_pref) {
  705. /* Check lm for valid requirements */
  706. ret = _sde_rm_check_lm(rm, rsvp, reqs, lm_cfg, lm,
  707. dspp, ds, pp);
  708. if (!ret)
  709. return ret;
  710. /**
  711. * If CWB is enabled and LM is not CWB supported
  712. * then return false.
  713. */
  714. if (RM_RQ_CWB(reqs) && !cwb_pref) {
  715. SDE_DEBUG("fail: cwb supported lm not allocated\n");
  716. return false;
  717. }
  718. } else if (!(reqs->hw_res.is_primary && display_pref)) {
  719. SDE_DEBUG(
  720. "display preference is not met. is_primary: %d display_pref: %d\n",
  721. (int)reqs->hw_res.is_primary, (int)display_pref);
  722. return false;
  723. }
  724. /* Already reserved? */
  725. if (RESERVED_BY_OTHER(lm, rsvp)) {
  726. SDE_DEBUG("lm %d already reserved\n", lm_cfg->id);
  727. return false;
  728. }
  729. /* Reserve dspp */
  730. ret = _sde_rm_reserve_dspp(rm, rsvp, lm_cfg, lm, dspp);
  731. if (!ret)
  732. return ret;
  733. /* Reserve ds */
  734. ret = _sde_rm_reserve_ds(rm, rsvp, lm_cfg, lm, ds);
  735. if (!ret)
  736. return ret;
  737. /* Reserve pp */
  738. ret = _sde_rm_reserve_pp(rm, rsvp, reqs, lm_cfg, pp_cfg, lm,
  739. dspp, ds, pp);
  740. if (!ret)
  741. return ret;
  742. return true;
  743. }
  744. static int _sde_rm_reserve_lms(
  745. struct sde_rm *rm,
  746. struct sde_rm_rsvp *rsvp,
  747. struct sde_rm_requirements *reqs,
  748. u8 *_lm_ids)
  749. {
  750. struct sde_rm_hw_blk *lm[MAX_BLOCKS];
  751. struct sde_rm_hw_blk *dspp[MAX_BLOCKS];
  752. struct sde_rm_hw_blk *ds[MAX_BLOCKS];
  753. struct sde_rm_hw_blk *pp[MAX_BLOCKS];
  754. struct sde_rm_hw_iter iter_i, iter_j;
  755. int lm_count = 0;
  756. int i, rc = 0;
  757. if (!reqs->topology->num_lm) {
  758. SDE_ERROR("invalid number of lm: %d\n", reqs->topology->num_lm);
  759. return -EINVAL;
  760. }
  761. /* Find a primary mixer */
  762. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_LM);
  763. while (lm_count != reqs->topology->num_lm &&
  764. _sde_rm_get_hw_locked(rm, &iter_i)) {
  765. memset(&lm, 0, sizeof(lm));
  766. memset(&dspp, 0, sizeof(dspp));
  767. memset(&ds, 0, sizeof(ds));
  768. memset(&pp, 0, sizeof(pp));
  769. lm_count = 0;
  770. lm[lm_count] = iter_i.blk;
  771. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  772. iter_i.blk->id,
  773. lm_count,
  774. _lm_ids ? _lm_ids[lm_count] : -1);
  775. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  776. continue;
  777. if (!_sde_rm_check_lm_and_get_connected_blks(
  778. rm, rsvp, reqs, lm[lm_count],
  779. &dspp[lm_count], &ds[lm_count],
  780. &pp[lm_count], NULL))
  781. continue;
  782. ++lm_count;
  783. /* Valid primary mixer found, find matching peers */
  784. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_LM);
  785. while (lm_count != reqs->topology->num_lm &&
  786. _sde_rm_get_hw_locked(rm, &iter_j)) {
  787. if (iter_i.blk == iter_j.blk)
  788. continue;
  789. if (!_sde_rm_check_lm_and_get_connected_blks(
  790. rm, rsvp, reqs, iter_j.blk,
  791. &dspp[lm_count], &ds[lm_count],
  792. &pp[lm_count], iter_i.blk))
  793. continue;
  794. lm[lm_count] = iter_j.blk;
  795. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  796. iter_i.blk->id,
  797. lm_count,
  798. _lm_ids ? _lm_ids[lm_count] : -1);
  799. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  800. continue;
  801. ++lm_count;
  802. }
  803. }
  804. if (lm_count != reqs->topology->num_lm) {
  805. SDE_DEBUG("unable to find appropriate mixers\n");
  806. return -ENAVAIL;
  807. }
  808. for (i = 0; i < ARRAY_SIZE(lm); i++) {
  809. if (!lm[i])
  810. break;
  811. lm[i]->rsvp_nxt = rsvp;
  812. pp[i]->rsvp_nxt = rsvp;
  813. if (dspp[i])
  814. dspp[i]->rsvp_nxt = rsvp;
  815. if (ds[i])
  816. ds[i]->rsvp_nxt = rsvp;
  817. SDE_EVT32(lm[i]->type, rsvp->enc_id, lm[i]->id, pp[i]->id,
  818. dspp[i] ? dspp[i]->id : 0,
  819. ds[i] ? ds[i]->id : 0);
  820. }
  821. if (reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) {
  822. /* reserve a free PINGPONG_SLAVE block */
  823. rc = -ENAVAIL;
  824. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_PINGPONG);
  825. while (_sde_rm_get_hw_locked(rm, &iter_i)) {
  826. const struct sde_hw_pingpong *pp =
  827. to_sde_hw_pingpong(iter_i.blk->hw);
  828. const struct sde_pingpong_cfg *pp_cfg = pp->caps;
  829. if (!(test_bit(SDE_PINGPONG_SLAVE, &pp_cfg->features)))
  830. continue;
  831. if (RESERVED_BY_OTHER(iter_i.blk, rsvp))
  832. continue;
  833. iter_i.blk->rsvp_nxt = rsvp;
  834. rc = 0;
  835. break;
  836. }
  837. }
  838. return rc;
  839. }
  840. static int _sde_rm_reserve_ctls(
  841. struct sde_rm *rm,
  842. struct sde_rm_rsvp *rsvp,
  843. struct sde_rm_requirements *reqs,
  844. const struct sde_rm_topology_def *top,
  845. u8 *_ctl_ids)
  846. {
  847. struct sde_rm_hw_blk *ctls[MAX_BLOCKS];
  848. struct sde_rm_hw_iter iter;
  849. int i = 0;
  850. memset(&ctls, 0, sizeof(ctls));
  851. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CTL);
  852. while (_sde_rm_get_hw_locked(rm, &iter)) {
  853. const struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter.blk->hw);
  854. unsigned long features = ctl->caps->features;
  855. bool has_split_display, has_ppsplit, primary_pref;
  856. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  857. continue;
  858. has_split_display = BIT(SDE_CTL_SPLIT_DISPLAY) & features;
  859. has_ppsplit = BIT(SDE_CTL_PINGPONG_SPLIT) & features;
  860. primary_pref = BIT(SDE_CTL_PRIMARY_PREF) & features;
  861. SDE_DEBUG("ctl %d caps 0x%lX\n", iter.blk->id, features);
  862. /*
  863. * bypass rest feature checks on finding CTL preferred
  864. * for primary displays.
  865. */
  866. if (!primary_pref && !_ctl_ids) {
  867. if (top->needs_split_display != has_split_display)
  868. continue;
  869. if (top->top_name == SDE_RM_TOPOLOGY_PPSPLIT &&
  870. !has_ppsplit)
  871. continue;
  872. } else if (!(reqs->hw_res.is_primary && primary_pref) &&
  873. !_ctl_ids) {
  874. SDE_DEBUG(
  875. "display pref not met. is_primary: %d primary_pref: %d\n",
  876. reqs->hw_res.is_primary, primary_pref);
  877. continue;
  878. }
  879. ctls[i] = iter.blk;
  880. SDE_DEBUG("blk id = %d, _ctl_ids[%d] = %d\n",
  881. iter.blk->id, i,
  882. _ctl_ids ? _ctl_ids[i] : -1);
  883. if (_ctl_ids && (ctls[i]->id != _ctl_ids[i]))
  884. continue;
  885. SDE_DEBUG("ctl %d match\n", iter.blk->id);
  886. if (++i == top->num_ctl)
  887. break;
  888. }
  889. if (i != top->num_ctl)
  890. return -ENAVAIL;
  891. for (i = 0; i < ARRAY_SIZE(ctls) && i < top->num_ctl; i++) {
  892. ctls[i]->rsvp_nxt = rsvp;
  893. SDE_EVT32(ctls[i]->type, rsvp->enc_id, ctls[i]->id);
  894. }
  895. return 0;
  896. }
  897. static int _sde_rm_reserve_dsc(
  898. struct sde_rm *rm,
  899. struct sde_rm_rsvp *rsvp,
  900. const struct sde_rm_topology_def *top,
  901. u8 *_dsc_ids)
  902. {
  903. struct sde_rm_hw_iter iter;
  904. int alloc_count = 0;
  905. int num_dsc_enc = top->num_lm;
  906. if (!top->num_comp_enc)
  907. return 0;
  908. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSC);
  909. while (_sde_rm_get_hw_locked(rm, &iter)) {
  910. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  911. continue;
  912. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  913. iter.blk->id,
  914. alloc_count,
  915. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  916. if (_dsc_ids && (iter.blk->id != _dsc_ids[alloc_count]))
  917. continue;
  918. iter.blk->rsvp_nxt = rsvp;
  919. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  920. if (++alloc_count == num_dsc_enc)
  921. return 0;
  922. }
  923. SDE_ERROR("couldn't reserve %d dsc blocks for enc id %d\n",
  924. num_dsc_enc, rsvp->enc_id);
  925. return -ENAVAIL;
  926. }
  927. static int _sde_rm_reserve_cdm(
  928. struct sde_rm *rm,
  929. struct sde_rm_rsvp *rsvp,
  930. uint32_t id,
  931. enum sde_hw_blk_type type)
  932. {
  933. struct sde_rm_hw_iter iter;
  934. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CDM);
  935. while (_sde_rm_get_hw_locked(rm, &iter)) {
  936. const struct sde_hw_cdm *cdm = to_sde_hw_cdm(iter.blk->hw);
  937. const struct sde_cdm_cfg *caps = cdm->caps;
  938. bool match = false;
  939. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  940. continue;
  941. if (type == SDE_HW_BLK_INTF && id != INTF_MAX)
  942. match = test_bit(id, &caps->intf_connect);
  943. else if (type == SDE_HW_BLK_WB && id != WB_MAX)
  944. match = test_bit(id, &caps->wb_connect);
  945. SDE_DEBUG("type %d id %d, cdm intfs %lu wbs %lu match %d\n",
  946. type, id, caps->intf_connect, caps->wb_connect,
  947. match);
  948. if (!match)
  949. continue;
  950. iter.blk->rsvp_nxt = rsvp;
  951. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  952. break;
  953. }
  954. if (!iter.hw) {
  955. SDE_ERROR("couldn't reserve cdm for type %d id %d\n", type, id);
  956. return -ENAVAIL;
  957. }
  958. return 0;
  959. }
  960. static int _sde_rm_reserve_intf_or_wb(
  961. struct sde_rm *rm,
  962. struct sde_rm_rsvp *rsvp,
  963. uint32_t id,
  964. enum sde_hw_blk_type type,
  965. bool needs_cdm)
  966. {
  967. struct sde_rm_hw_iter iter;
  968. int ret = 0;
  969. /* Find the block entry in the rm, and note the reservation */
  970. sde_rm_init_hw_iter(&iter, 0, type);
  971. while (_sde_rm_get_hw_locked(rm, &iter)) {
  972. if (iter.blk->id != id)
  973. continue;
  974. if (RESERVED_BY_OTHER(iter.blk, rsvp)) {
  975. SDE_ERROR("type %d id %d already reserved\n", type, id);
  976. return -ENAVAIL;
  977. }
  978. iter.blk->rsvp_nxt = rsvp;
  979. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  980. break;
  981. }
  982. /* Shouldn't happen since wbs / intfs are fixed at probe */
  983. if (!iter.hw) {
  984. SDE_ERROR("couldn't find type %d id %d\n", type, id);
  985. return -EINVAL;
  986. }
  987. /* Expected only one intf or wb will request cdm */
  988. if (needs_cdm)
  989. ret = _sde_rm_reserve_cdm(rm, rsvp, id, type);
  990. return ret;
  991. }
  992. static int _sde_rm_reserve_intf_related_hw(
  993. struct sde_rm *rm,
  994. struct sde_rm_rsvp *rsvp,
  995. struct sde_encoder_hw_resources *hw_res)
  996. {
  997. int i, ret = 0;
  998. u32 id;
  999. for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) {
  1000. if (hw_res->intfs[i] == INTF_MODE_NONE)
  1001. continue;
  1002. id = i + INTF_0;
  1003. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1004. SDE_HW_BLK_INTF, hw_res->needs_cdm);
  1005. if (ret)
  1006. return ret;
  1007. }
  1008. for (i = 0; i < ARRAY_SIZE(hw_res->wbs); i++) {
  1009. if (hw_res->wbs[i] == INTF_MODE_NONE)
  1010. continue;
  1011. id = i + WB_0;
  1012. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1013. SDE_HW_BLK_WB, hw_res->needs_cdm);
  1014. if (ret)
  1015. return ret;
  1016. }
  1017. return ret;
  1018. }
  1019. static bool _sde_rm_is_display_in_cont_splash(struct sde_kms *sde_kms,
  1020. struct drm_encoder *enc)
  1021. {
  1022. int i;
  1023. struct sde_splash_display *splash_dpy;
  1024. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  1025. splash_dpy = &sde_kms->splash_data.splash_display[i];
  1026. if (splash_dpy->encoder == enc)
  1027. return splash_dpy->cont_splash_enabled;
  1028. }
  1029. return false;
  1030. }
  1031. static int _sde_rm_make_lm_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1032. struct sde_rm_requirements *reqs,
  1033. struct sde_splash_display *splash_display)
  1034. {
  1035. int ret, i;
  1036. u8 *hw_ids = NULL;
  1037. /* Check if splash data provided lm_ids */
  1038. if (splash_display) {
  1039. hw_ids = splash_display->lm_ids;
  1040. for (i = 0; i < splash_display->lm_cnt; i++)
  1041. SDE_DEBUG("splash_display->lm_ids[%d] = %d\n",
  1042. i, splash_display->lm_ids[i]);
  1043. if (splash_display->lm_cnt != reqs->topology->num_lm)
  1044. SDE_DEBUG("Configured splash LMs != needed LM cnt\n");
  1045. }
  1046. /*
  1047. * Assign LMs and blocks whose usage is tied to them: DSPP & Pingpong.
  1048. * Do assignment preferring to give away low-resource mixers first:
  1049. * - Check mixers without DSPPs
  1050. * - Only then allow to grab from mixers with DSPP capability
  1051. */
  1052. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1053. if (ret && !RM_RQ_DSPP(reqs)) {
  1054. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1055. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1056. }
  1057. return ret;
  1058. }
  1059. static int _sde_rm_make_ctl_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1060. struct sde_rm_requirements *reqs,
  1061. struct sde_splash_display *splash_display)
  1062. {
  1063. int ret, i;
  1064. u8 *hw_ids = NULL;
  1065. struct sde_rm_topology_def topology;
  1066. /* Check if splash data provided ctl_ids */
  1067. if (splash_display) {
  1068. hw_ids = splash_display->ctl_ids;
  1069. for (i = 0; i < splash_display->ctl_cnt; i++)
  1070. SDE_DEBUG("splash_display->ctl_ids[%d] = %d\n",
  1071. i, splash_display->ctl_ids[i]);
  1072. }
  1073. /*
  1074. * Do assignment preferring to give away low-resource CTLs first:
  1075. * - Check mixers without Split Display
  1076. * - Only then allow to grab from CTLs with split display capability
  1077. */
  1078. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, reqs->topology, hw_ids);
  1079. if (ret && !reqs->topology->needs_split_display &&
  1080. reqs->topology->num_ctl > SINGLE_CTL) {
  1081. memcpy(&topology, reqs->topology, sizeof(topology));
  1082. topology.needs_split_display = true;
  1083. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, &topology, hw_ids);
  1084. }
  1085. return ret;
  1086. }
  1087. static int _sde_rm_make_dsc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1088. struct sde_rm_requirements *reqs,
  1089. struct sde_splash_display *splash_display)
  1090. {
  1091. int ret, i;
  1092. u8 *hw_ids = NULL;
  1093. /* Check if splash data provided dsc_ids */
  1094. if (splash_display) {
  1095. hw_ids = splash_display->dsc_ids;
  1096. for (i = 0; i < splash_display->dsc_cnt; i++)
  1097. SDE_DEBUG("splash_data.dsc_ids[%d] = %d\n",
  1098. i, splash_display->dsc_ids[i]);
  1099. }
  1100. ret = _sde_rm_reserve_dsc(rm, rsvp, reqs->topology, hw_ids);
  1101. return ret;
  1102. }
  1103. static int _sde_rm_make_next_rsvp(struct sde_rm *rm, struct drm_encoder *enc,
  1104. struct drm_crtc_state *crtc_state,
  1105. struct drm_connector_state *conn_state,
  1106. struct sde_rm_rsvp *rsvp,
  1107. struct sde_rm_requirements *reqs)
  1108. {
  1109. struct msm_drm_private *priv;
  1110. struct sde_kms *sde_kms;
  1111. struct sde_splash_display *splash_display = NULL;
  1112. struct sde_splash_data *splash_data;
  1113. int i, ret;
  1114. priv = enc->dev->dev_private;
  1115. sde_kms = to_sde_kms(priv->kms);
  1116. splash_data = &sde_kms->splash_data;
  1117. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1118. for (i = 0; i < ARRAY_SIZE(splash_data->splash_display); i++) {
  1119. if (enc == splash_data->splash_display[i].encoder)
  1120. splash_display =
  1121. &splash_data->splash_display[i];
  1122. }
  1123. if (!splash_display) {
  1124. SDE_ERROR("rm is in cont_splash but data not found\n");
  1125. return -EINVAL;
  1126. }
  1127. }
  1128. /* Create reservation info, tag reserved blocks with it as we go */
  1129. rsvp->seq = ++rm->rsvp_next_seq;
  1130. rsvp->enc_id = enc->base.id;
  1131. rsvp->topology = reqs->topology->top_name;
  1132. list_add_tail(&rsvp->list, &rm->rsvps);
  1133. ret = _sde_rm_make_lm_rsvp(rm, rsvp, reqs, splash_display);
  1134. if (ret) {
  1135. SDE_ERROR("unable to find appropriate mixers\n");
  1136. return ret;
  1137. }
  1138. ret = _sde_rm_make_ctl_rsvp(rm, rsvp, reqs, splash_display);
  1139. if (ret) {
  1140. SDE_ERROR("unable to find appropriate CTL\n");
  1141. return ret;
  1142. }
  1143. /* Assign INTFs, WBs, and blks whose usage is tied to them: CTL & CDM */
  1144. ret = _sde_rm_reserve_intf_related_hw(rm, rsvp, &reqs->hw_res);
  1145. if (ret)
  1146. return ret;
  1147. ret = _sde_rm_make_dsc_rsvp(rm, rsvp, reqs, splash_display);
  1148. if (ret)
  1149. return ret;
  1150. return ret;
  1151. }
  1152. /**
  1153. * _sde_rm_get_hw_blk_for_cont_splash - retrieve the LM blocks on given CTL
  1154. * and populate the connected HW blk ids in sde_splash_display
  1155. * @rm: Pointer to resource manager structure
  1156. * @ctl: Pointer to CTL hardware block
  1157. * @splash_display: Pointer to struct sde_splash_display
  1158. * return: number of active LM blocks for this CTL block
  1159. */
  1160. static int _sde_rm_get_hw_blk_for_cont_splash(struct sde_rm *rm,
  1161. struct sde_hw_ctl *ctl,
  1162. struct sde_splash_display *splash_display)
  1163. {
  1164. u32 lm_reg;
  1165. struct sde_rm_hw_iter iter_lm, iter_pp;
  1166. struct sde_hw_pingpong *pp;
  1167. if (!rm || !ctl || !splash_display) {
  1168. SDE_ERROR("invalid input parameters\n");
  1169. return 0;
  1170. }
  1171. sde_rm_init_hw_iter(&iter_lm, 0, SDE_HW_BLK_LM);
  1172. sde_rm_init_hw_iter(&iter_pp, 0, SDE_HW_BLK_PINGPONG);
  1173. while (_sde_rm_get_hw_locked(rm, &iter_lm)) {
  1174. _sde_rm_get_hw_locked(rm, &iter_pp);
  1175. if (splash_display->lm_cnt >= MAX_DATA_PATH_PER_DSIPLAY)
  1176. break;
  1177. lm_reg = ctl->ops.read_ctl_layers(ctl, iter_lm.blk->id);
  1178. if (!lm_reg)
  1179. continue;
  1180. splash_display->lm_ids[splash_display->lm_cnt++] =
  1181. iter_lm.blk->id;
  1182. SDE_DEBUG("lm_cnt=%d lm_reg[%d]=0x%x\n", splash_display->lm_cnt,
  1183. iter_lm.blk->id - LM_0, lm_reg);
  1184. if (ctl->ops.get_staged_sspp &&
  1185. ctl->ops.get_staged_sspp(ctl, iter_lm.blk->id,
  1186. &splash_display->pipes[
  1187. splash_display->pipe_cnt], 1)) {
  1188. splash_display->pipe_cnt++;
  1189. } else {
  1190. SDE_ERROR("no pipe detected on LM-%d\n",
  1191. iter_lm.blk->id - LM_0);
  1192. return 0;
  1193. }
  1194. pp = to_sde_hw_pingpong(iter_pp.blk->hw);
  1195. if (pp && pp->ops.get_dsc_status &&
  1196. pp->ops.get_dsc_status(pp)) {
  1197. splash_display->dsc_ids[splash_display->dsc_cnt++] =
  1198. iter_pp.blk->id;
  1199. SDE_DEBUG("lm/pp[%d] path, using dsc[%d]\n",
  1200. iter_lm.blk->id - LM_0,
  1201. iter_pp.blk->id - DSC_0);
  1202. }
  1203. }
  1204. return splash_display->lm_cnt;
  1205. }
  1206. int sde_rm_cont_splash_res_init(struct msm_drm_private *priv,
  1207. struct sde_rm *rm,
  1208. struct sde_splash_data *splash_data,
  1209. struct sde_mdss_cfg *cat)
  1210. {
  1211. struct sde_rm_hw_iter iter_c;
  1212. int index = 0, ctl_top_cnt;
  1213. struct sde_kms *sde_kms = NULL;
  1214. struct sde_hw_mdp *hw_mdp;
  1215. struct sde_splash_display *splash_display;
  1216. u8 intf_sel;
  1217. if (!priv || !rm || !cat || !splash_data) {
  1218. SDE_ERROR("invalid input parameters\n");
  1219. return -EINVAL;
  1220. }
  1221. SDE_DEBUG("mixer_count=%d, ctl_count=%d, dsc_count=%d\n",
  1222. cat->mixer_count,
  1223. cat->ctl_count,
  1224. cat->dsc_count);
  1225. ctl_top_cnt = cat->ctl_count;
  1226. if (!priv->kms) {
  1227. SDE_ERROR("invalid kms\n");
  1228. return -EINVAL;
  1229. }
  1230. sde_kms = to_sde_kms(priv->kms);
  1231. hw_mdp = sde_rm_get_mdp(rm);
  1232. sde_rm_init_hw_iter(&iter_c, 0, SDE_HW_BLK_CTL);
  1233. while (_sde_rm_get_hw_locked(rm, &iter_c)) {
  1234. struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter_c.blk->hw);
  1235. if (!ctl->ops.get_ctl_intf) {
  1236. SDE_ERROR("get_ctl_intf not initialized\n");
  1237. return -EINVAL;
  1238. }
  1239. intf_sel = ctl->ops.get_ctl_intf(ctl);
  1240. if (intf_sel) {
  1241. splash_display = &splash_data->splash_display[index];
  1242. SDE_DEBUG("finding resources for display=%d ctl=%d\n",
  1243. index, iter_c.blk->id - CTL_0);
  1244. _sde_rm_get_hw_blk_for_cont_splash(rm,
  1245. ctl, splash_display);
  1246. splash_display->cont_splash_enabled = true;
  1247. splash_display->ctl_ids[splash_display->ctl_cnt++] =
  1248. iter_c.blk->id;
  1249. if (hw_mdp && hw_mdp->ops.get_split_flush_status) {
  1250. splash_display->single_flush_en =
  1251. hw_mdp->ops.get_split_flush_status(
  1252. hw_mdp);
  1253. }
  1254. if (!splash_display->single_flush_en ||
  1255. (iter_c.blk->id != CTL_0))
  1256. index++;
  1257. if (index >= ARRAY_SIZE(splash_data->splash_display))
  1258. break;
  1259. }
  1260. }
  1261. if (index != splash_data->num_splash_displays) {
  1262. SDE_DEBUG("mismatch active displays vs actually enabled :%d/%d",
  1263. splash_data->num_splash_displays, index);
  1264. return -EINVAL;
  1265. }
  1266. return 0;
  1267. }
  1268. static int _sde_rm_populate_requirements(
  1269. struct sde_rm *rm,
  1270. struct drm_encoder *enc,
  1271. struct drm_crtc_state *crtc_state,
  1272. struct drm_connector_state *conn_state,
  1273. struct sde_rm_requirements *reqs)
  1274. {
  1275. const struct drm_display_mode *mode = &crtc_state->mode;
  1276. int i;
  1277. memset(reqs, 0, sizeof(*reqs));
  1278. reqs->top_ctrl = sde_connector_get_property(conn_state,
  1279. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1280. sde_encoder_get_hw_resources(enc, &reqs->hw_res, conn_state);
  1281. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++) {
  1282. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i],
  1283. reqs->hw_res.topology)) {
  1284. reqs->topology = &rm->topology_tbl[i];
  1285. break;
  1286. }
  1287. }
  1288. if (!reqs->topology) {
  1289. SDE_ERROR("invalid topology for the display\n");
  1290. return -EINVAL;
  1291. }
  1292. /*
  1293. * select dspp HW block for all dsi displays and ds for only
  1294. * primary dsi display.
  1295. */
  1296. if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) {
  1297. if (!RM_RQ_DSPP(reqs))
  1298. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1299. if (!RM_RQ_DS(reqs) && rm->hw_mdp->caps->has_dest_scaler &&
  1300. sde_encoder_is_primary_display(enc))
  1301. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DS);
  1302. }
  1303. /**
  1304. * Set the requirement for LM which has CWB support if CWB is
  1305. * found enabled.
  1306. */
  1307. if (!RM_RQ_CWB(reqs) && sde_encoder_in_clone_mode(enc))
  1308. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_CWB);
  1309. SDE_DEBUG("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
  1310. reqs->hw_res.display_num_of_h_tiles);
  1311. SDE_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
  1312. reqs->topology->num_lm, reqs->topology->num_ctl,
  1313. reqs->topology->top_name,
  1314. reqs->topology->needs_split_display);
  1315. SDE_EVT32(mode->hdisplay, rm->lm_max_width, reqs->topology->num_lm,
  1316. reqs->top_ctrl, reqs->topology->top_name,
  1317. reqs->topology->num_ctl);
  1318. return 0;
  1319. }
  1320. static struct sde_rm_rsvp *_sde_rm_get_rsvp(
  1321. struct sde_rm *rm,
  1322. struct drm_encoder *enc)
  1323. {
  1324. struct sde_rm_rsvp *i;
  1325. if (!rm || !enc) {
  1326. SDE_ERROR("invalid params\n");
  1327. return NULL;
  1328. }
  1329. if (list_empty(&rm->rsvps))
  1330. return NULL;
  1331. list_for_each_entry(i, &rm->rsvps, list)
  1332. if (i->enc_id == enc->base.id)
  1333. return i;
  1334. return NULL;
  1335. }
  1336. static struct sde_rm_rsvp *_sde_rm_get_rsvp_nxt(
  1337. struct sde_rm *rm,
  1338. struct drm_encoder *enc)
  1339. {
  1340. struct sde_rm_rsvp *i;
  1341. if (list_empty(&rm->rsvps))
  1342. return NULL;
  1343. list_for_each_entry(i, &rm->rsvps, list)
  1344. if (i->enc_id == enc->base.id)
  1345. break;
  1346. list_for_each_entry_continue(i, &rm->rsvps, list)
  1347. if (i->enc_id == enc->base.id)
  1348. return i;
  1349. return NULL;
  1350. }
  1351. static struct drm_connector *_sde_rm_get_connector(
  1352. struct drm_encoder *enc)
  1353. {
  1354. struct drm_connector *conn = NULL;
  1355. struct list_head *connector_list =
  1356. &enc->dev->mode_config.connector_list;
  1357. list_for_each_entry(conn, connector_list, head)
  1358. if (conn->encoder == enc)
  1359. return conn;
  1360. return NULL;
  1361. }
  1362. int sde_rm_update_topology(struct drm_connector_state *conn_state,
  1363. struct msm_display_topology *topology)
  1364. {
  1365. int i, ret = 0;
  1366. struct msm_display_topology top;
  1367. enum sde_rm_topology_name top_name = SDE_RM_TOPOLOGY_NONE;
  1368. if (!conn_state)
  1369. return -EINVAL;
  1370. if (topology) {
  1371. top = *topology;
  1372. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  1373. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], top)) {
  1374. top_name = g_top_table[i].top_name;
  1375. break;
  1376. }
  1377. }
  1378. ret = msm_property_set_property(
  1379. sde_connector_get_propinfo(conn_state->connector),
  1380. sde_connector_get_property_state(conn_state),
  1381. CONNECTOR_PROP_TOPOLOGY_NAME, top_name);
  1382. return ret;
  1383. }
  1384. /**
  1385. * _sde_rm_release_rsvp - release resources and release a reservation
  1386. * @rm: KMS handle
  1387. * @rsvp: RSVP pointer to release and release resources for
  1388. */
  1389. static void _sde_rm_release_rsvp(
  1390. struct sde_rm *rm,
  1391. struct sde_rm_rsvp *rsvp,
  1392. struct drm_connector *conn)
  1393. {
  1394. struct sde_rm_rsvp *rsvp_c, *rsvp_n;
  1395. struct sde_rm_hw_blk *blk;
  1396. enum sde_hw_blk_type type;
  1397. if (!rsvp)
  1398. return;
  1399. SDE_DEBUG("rel rsvp %d enc %d\n", rsvp->seq, rsvp->enc_id);
  1400. list_for_each_entry_safe(rsvp_c, rsvp_n, &rm->rsvps, list) {
  1401. if (rsvp == rsvp_c) {
  1402. list_del(&rsvp_c->list);
  1403. break;
  1404. }
  1405. }
  1406. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1407. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1408. if (blk->rsvp == rsvp) {
  1409. blk->rsvp = NULL;
  1410. SDE_DEBUG("rel rsvp %d enc %d %d %d\n",
  1411. rsvp->seq, rsvp->enc_id,
  1412. blk->type, blk->id);
  1413. }
  1414. if (blk->rsvp_nxt == rsvp) {
  1415. blk->rsvp_nxt = NULL;
  1416. SDE_DEBUG("rel rsvp_nxt %d enc %d %d %d\n",
  1417. rsvp->seq, rsvp->enc_id,
  1418. blk->type, blk->id);
  1419. }
  1420. }
  1421. }
  1422. kfree(rsvp);
  1423. }
  1424. void sde_rm_release(struct sde_rm *rm, struct drm_encoder *enc, bool nxt)
  1425. {
  1426. struct sde_rm_rsvp *rsvp;
  1427. struct drm_connector *conn;
  1428. struct msm_drm_private *priv;
  1429. struct sde_kms *sde_kms;
  1430. uint64_t top_ctrl;
  1431. if (!rm || !enc) {
  1432. SDE_ERROR("invalid params\n");
  1433. return;
  1434. }
  1435. priv = enc->dev->dev_private;
  1436. if (!priv->kms) {
  1437. SDE_ERROR("invalid kms\n");
  1438. return;
  1439. }
  1440. sde_kms = to_sde_kms(priv->kms);
  1441. mutex_lock(&rm->rm_lock);
  1442. if (nxt)
  1443. rsvp = _sde_rm_get_rsvp_nxt(rm, enc);
  1444. else
  1445. rsvp = _sde_rm_get_rsvp(rm, enc);
  1446. if (!rsvp) {
  1447. SDE_DEBUG("failed to find rsvp for enc %d, nxt %d",
  1448. enc->base.id, nxt);
  1449. goto end;
  1450. }
  1451. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1452. _sde_rm_release_rsvp(rm, rsvp, conn);
  1453. goto end;
  1454. }
  1455. conn = _sde_rm_get_connector(enc);
  1456. if (!conn) {
  1457. SDE_ERROR("failed to get connector for enc %d, nxt %d",
  1458. enc->base.id, nxt);
  1459. goto end;
  1460. }
  1461. top_ctrl = sde_connector_get_property(conn->state,
  1462. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1463. if (top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK)) {
  1464. SDE_DEBUG("rsvp[s%de%d] not releasing locked resources\n",
  1465. rsvp->seq, rsvp->enc_id);
  1466. } else {
  1467. SDE_DEBUG("release rsvp[s%de%d]\n", rsvp->seq,
  1468. rsvp->enc_id);
  1469. _sde_rm_release_rsvp(rm, rsvp, conn);
  1470. }
  1471. end:
  1472. mutex_unlock(&rm->rm_lock);
  1473. }
  1474. static int _sde_rm_commit_rsvp(
  1475. struct sde_rm *rm,
  1476. struct sde_rm_rsvp *rsvp,
  1477. struct drm_connector_state *conn_state)
  1478. {
  1479. struct sde_rm_hw_blk *blk;
  1480. enum sde_hw_blk_type type;
  1481. int ret = 0;
  1482. /* Swap next rsvp to be the active */
  1483. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1484. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1485. if (blk->rsvp_nxt) {
  1486. blk->rsvp = blk->rsvp_nxt;
  1487. blk->rsvp_nxt = NULL;
  1488. }
  1489. }
  1490. }
  1491. if (!ret) {
  1492. SDE_DEBUG("rsrv enc %d topology %d\n", rsvp->enc_id,
  1493. rsvp->topology);
  1494. SDE_EVT32(rsvp->enc_id, rsvp->topology);
  1495. }
  1496. return ret;
  1497. }
  1498. int sde_rm_reserve(
  1499. struct sde_rm *rm,
  1500. struct drm_encoder *enc,
  1501. struct drm_crtc_state *crtc_state,
  1502. struct drm_connector_state *conn_state,
  1503. bool test_only)
  1504. {
  1505. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  1506. struct sde_rm_requirements reqs;
  1507. struct msm_drm_private *priv;
  1508. struct sde_kms *sde_kms;
  1509. int ret;
  1510. if (!rm || !enc || !crtc_state || !conn_state) {
  1511. SDE_ERROR("invalid arguments\n");
  1512. return -EINVAL;
  1513. }
  1514. if (!enc->dev || !enc->dev->dev_private) {
  1515. SDE_ERROR("drm device invalid\n");
  1516. return -EINVAL;
  1517. }
  1518. priv = enc->dev->dev_private;
  1519. if (!priv->kms) {
  1520. SDE_ERROR("invalid kms\n");
  1521. return -EINVAL;
  1522. }
  1523. sde_kms = to_sde_kms(priv->kms);
  1524. /* Check if this is just a page-flip */
  1525. if (!_sde_rm_is_display_in_cont_splash(sde_kms, enc) &&
  1526. !drm_atomic_crtc_needs_modeset(crtc_state))
  1527. return 0;
  1528. SDE_DEBUG("reserving hw for conn %d enc %d crtc %d test_only %d\n",
  1529. conn_state->connector->base.id, enc->base.id,
  1530. crtc_state->crtc->base.id, test_only);
  1531. SDE_EVT32(enc->base.id, conn_state->connector->base.id);
  1532. mutex_lock(&rm->rm_lock);
  1533. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_BEGIN);
  1534. rsvp_cur = _sde_rm_get_rsvp(rm, enc);
  1535. rsvp_nxt = _sde_rm_get_rsvp_nxt(rm, enc);
  1536. if (!test_only && rsvp_nxt)
  1537. goto commit_rsvp;
  1538. ret = _sde_rm_populate_requirements(rm, enc, crtc_state,
  1539. conn_state, &reqs);
  1540. if (ret) {
  1541. SDE_ERROR("failed to populate hw requirements\n");
  1542. goto end;
  1543. }
  1544. /*
  1545. * We only support one active reservation per-hw-block. But to implement
  1546. * transactional semantics for test-only, and for allowing failure while
  1547. * modifying your existing reservation, over the course of this
  1548. * function we can have two reservations:
  1549. * Current: Existing reservation
  1550. * Next: Proposed reservation. The proposed reservation may fail, or may
  1551. * be discarded if in test-only mode.
  1552. * If reservation is successful, and we're not in test-only, then we
  1553. * replace the current with the next.
  1554. */
  1555. rsvp_nxt = kzalloc(sizeof(*rsvp_nxt), GFP_KERNEL);
  1556. if (!rsvp_nxt) {
  1557. ret = -ENOMEM;
  1558. goto end;
  1559. }
  1560. /*
  1561. * User can request that we clear out any reservation during the
  1562. * atomic_check phase by using this CLEAR bit
  1563. */
  1564. if (rsvp_cur && test_only && RM_RQ_CLEAR(&reqs)) {
  1565. SDE_DEBUG("test_only & CLEAR: clear rsvp[s%de%d]\n",
  1566. rsvp_cur->seq, rsvp_cur->enc_id);
  1567. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1568. rsvp_cur = NULL;
  1569. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_CLEAR);
  1570. }
  1571. /* Check the proposed reservation, store it in hw's "next" field */
  1572. ret = _sde_rm_make_next_rsvp(rm, enc, crtc_state, conn_state,
  1573. rsvp_nxt, &reqs);
  1574. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_RSVPNEXT);
  1575. if (ret) {
  1576. SDE_ERROR("failed to reserve hw resources: %d, test_only %d\n",
  1577. ret, test_only);
  1578. _sde_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector);
  1579. goto end;
  1580. } else if (test_only && !RM_RQ_LOCK(&reqs)) {
  1581. /*
  1582. * Normally, if test_only, test the reservation and then undo
  1583. * However, if the user requests LOCK, then keep the reservation
  1584. * made during the atomic_check phase.
  1585. */
  1586. SDE_DEBUG("test_only: rsvp[s%de%d]\n",
  1587. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1588. goto end;
  1589. } else {
  1590. if (test_only && RM_RQ_LOCK(&reqs))
  1591. SDE_DEBUG("test_only & LOCK: lock rsvp[s%de%d]\n",
  1592. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1593. }
  1594. commit_rsvp:
  1595. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1596. ret = _sde_rm_commit_rsvp(rm, rsvp_nxt, conn_state);
  1597. end:
  1598. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_FINAL);
  1599. mutex_unlock(&rm->rm_lock);
  1600. return ret;
  1601. }