rouleur.c 72 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. WCD_SUPPLIES_LPM_MODE,
  43. };
  44. /* TODO: Check on the step values */
  45. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  46. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  47. static int rouleur_handle_post_irq(void *data);
  48. static int rouleur_reset(struct device *dev, int val);
  49. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  69. .name = "rouleur",
  70. .irqs = ROULEUR_IRQs,
  71. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  72. .num_regs = 3,
  73. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  74. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  75. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  76. .use_ack = 1,
  77. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  78. .runtime_pm = false,
  79. .handle_post_irq = rouleur_handle_post_irq,
  80. .irq_drv_data = NULL,
  81. };
  82. static int rouleur_handle_post_irq(void *data)
  83. {
  84. struct rouleur_priv *rouleur = data;
  85. u32 status1 = 0, status2 = 0, status3 = 0;
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  88. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  89. rouleur->tx_swr_dev->slave_irq_pending =
  90. ((status1 || status2 || status3) ? true : false);
  91. return IRQ_HANDLED;
  92. }
  93. static int rouleur_init_reg(struct snd_soc_component *component)
  94. {
  95. /* Disable HPH OCP */
  96. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  97. 0x03, 0x00);
  98. /* Enable surge protection */
  99. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  100. 0xC0, 0xC0);
  101. /* Disable mic bias pull down */
  102. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  103. 0x01, 0x00);
  104. return 0;
  105. }
  106. static int rouleur_set_port_params(struct snd_soc_component *component,
  107. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  108. u8 *ch_mask, u32 *ch_rate,
  109. u8 *port_type, u8 path)
  110. {
  111. int i, j;
  112. u8 num_ports = 0;
  113. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  114. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  115. switch (path) {
  116. case CODEC_RX:
  117. map = &rouleur->rx_port_mapping;
  118. num_ports = rouleur->num_rx_ports;
  119. break;
  120. case CODEC_TX:
  121. map = &rouleur->tx_port_mapping;
  122. num_ports = rouleur->num_tx_ports;
  123. break;
  124. default:
  125. dev_err(component->dev, "%s Invalid path: %d\n",
  126. __func__, path);
  127. return -EINVAL;
  128. }
  129. for (i = 0; i <= num_ports; i++) {
  130. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  131. if ((*map)[i][j].slave_port_type == slv_prt_type)
  132. goto found;
  133. }
  134. }
  135. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  136. __func__, slv_prt_type);
  137. return -EINVAL;
  138. found:
  139. *port_id = i;
  140. *num_ch = (*map)[i][j].num_ch;
  141. *ch_mask = (*map)[i][j].ch_mask;
  142. *ch_rate = (*map)[i][j].ch_rate;
  143. *port_type = (*map)[i][j].master_port_type;
  144. return 0;
  145. }
  146. static int rouleur_parse_port_mapping(struct device *dev,
  147. char *prop, u8 path)
  148. {
  149. u32 *dt_array, map_size, map_length;
  150. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  151. u32 slave_port_type, master_port_type;
  152. u32 i, ch_iter = 0;
  153. int ret = 0;
  154. u8 *num_ports = NULL;
  155. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  156. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  157. switch (path) {
  158. case CODEC_RX:
  159. map = &rouleur->rx_port_mapping;
  160. num_ports = &rouleur->num_rx_ports;
  161. break;
  162. case CODEC_TX:
  163. map = &rouleur->tx_port_mapping;
  164. num_ports = &rouleur->num_tx_ports;
  165. break;
  166. default:
  167. dev_err(dev, "%s Invalid path: %d\n",
  168. __func__, path);
  169. return -EINVAL;
  170. }
  171. if (!of_find_property(dev->of_node, prop,
  172. &map_size)) {
  173. dev_err(dev, "missing port mapping prop %s\n", prop);
  174. ret = -EINVAL;
  175. goto err;
  176. }
  177. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  178. dt_array = kzalloc(map_size, GFP_KERNEL);
  179. if (!dt_array) {
  180. ret = -ENOMEM;
  181. goto err;
  182. }
  183. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  184. NUM_SWRS_DT_PARAMS * map_length);
  185. if (ret) {
  186. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  187. __func__, prop);
  188. ret = -EINVAL;
  189. goto err_pdata_fail;
  190. }
  191. for (i = 0; i < map_length; i++) {
  192. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  193. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  194. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  195. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  196. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  197. if (port_num != old_port_num)
  198. ch_iter = 0;
  199. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  200. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  201. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  202. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  203. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  204. old_port_num = port_num;
  205. }
  206. *num_ports = port_num;
  207. err_pdata_fail:
  208. kfree(dt_array);
  209. err:
  210. return ret;
  211. }
  212. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  213. u8 slv_port_type, u8 enable)
  214. {
  215. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  216. u8 port_id;
  217. u8 num_ch;
  218. u8 ch_mask;
  219. u32 ch_rate;
  220. u8 port_type;
  221. u8 num_port = 1;
  222. int ret = 0;
  223. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  224. &num_ch, &ch_mask, &ch_rate,
  225. &port_type, CODEC_TX);
  226. if (ret) {
  227. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  228. __func__, ret);
  229. return ret;
  230. }
  231. if (enable)
  232. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  233. num_port, &ch_mask, &ch_rate,
  234. &num_ch, &port_type);
  235. else
  236. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  237. num_port, &ch_mask, &port_type);
  238. return ret;
  239. }
  240. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  241. u8 slv_port_type, u8 enable)
  242. {
  243. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  244. u8 port_id;
  245. u8 num_ch;
  246. u8 ch_mask;
  247. u32 ch_rate;
  248. u8 port_type;
  249. u8 num_port = 1;
  250. int ret = 0;
  251. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  252. &num_ch, &ch_mask, &ch_rate,
  253. &port_type, CODEC_RX);
  254. if (ret) {
  255. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  256. __func__, ret);
  257. return ret;
  258. }
  259. if (enable)
  260. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  261. num_port, &ch_mask, &ch_rate,
  262. &num_ch, &port_type);
  263. else
  264. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  265. num_port, &ch_mask, &port_type);
  266. return ret;
  267. }
  268. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  269. {
  270. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  271. mutex_lock(&rouleur->main_bias_lock);
  272. if (rouleur->mbias_cnt == 0) {
  273. snd_soc_component_update_bits(component,
  274. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  275. snd_soc_component_update_bits(component,
  276. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  277. usleep_range(1000, 1100);
  278. }
  279. rouleur->mbias_cnt++;
  280. mutex_unlock(&rouleur->main_bias_lock);
  281. return 0;
  282. }
  283. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  284. {
  285. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  286. mutex_lock(&rouleur->main_bias_lock);
  287. if (rouleur->mbias_cnt == 0) {
  288. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  289. mutex_unlock(&rouleur->main_bias_lock);
  290. return 0;
  291. }
  292. rouleur->mbias_cnt--;
  293. if (rouleur->mbias_cnt == 0) {
  294. snd_soc_component_update_bits(component,
  295. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  296. snd_soc_component_update_bits(component,
  297. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  298. }
  299. mutex_unlock(&rouleur->main_bias_lock);
  300. return 0;
  301. }
  302. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  303. {
  304. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  305. mutex_lock(&rouleur->rx_clk_lock);
  306. if (rouleur->rx_clk_cnt == 0) {
  307. snd_soc_component_update_bits(component,
  308. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  309. snd_soc_component_update_bits(component,
  310. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  311. usleep_range(5000, 5100);
  312. rouleur_global_mbias_enable(component);
  313. snd_soc_component_update_bits(component,
  314. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  315. snd_soc_component_update_bits(component,
  316. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  317. snd_soc_component_update_bits(component,
  318. ROULEUR_ANA_NCP_VCTRL, 0x07, 0x06);
  319. snd_soc_component_update_bits(component,
  320. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  321. usleep_range(500, 510);
  322. }
  323. rouleur->rx_clk_cnt++;
  324. mutex_unlock(&rouleur->rx_clk_lock);
  325. return 0;
  326. }
  327. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  328. {
  329. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  330. mutex_lock(&rouleur->rx_clk_lock);
  331. if (rouleur->rx_clk_cnt == 0) {
  332. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  333. mutex_unlock(&rouleur->rx_clk_lock);
  334. return 0;
  335. }
  336. rouleur->rx_clk_cnt--;
  337. if (rouleur->rx_clk_cnt == 0) {
  338. snd_soc_component_update_bits(component,
  339. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  340. snd_soc_component_update_bits(component,
  341. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  342. snd_soc_component_update_bits(component,
  343. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  344. snd_soc_component_update_bits(component,
  345. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  346. snd_soc_component_update_bits(component,
  347. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  348. rouleur_global_mbias_disable(component);
  349. }
  350. mutex_unlock(&rouleur->rx_clk_lock);
  351. return 0;
  352. }
  353. /*
  354. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  355. * @component: handle to snd_soc_component *
  356. *
  357. * return rouleur_mbhc handle or error code in case of failure
  358. */
  359. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  360. {
  361. struct rouleur_priv *rouleur;
  362. if (!component) {
  363. pr_err("%s: Invalid params, NULL component\n", __func__);
  364. return NULL;
  365. }
  366. rouleur = snd_soc_component_get_drvdata(component);
  367. if (!rouleur) {
  368. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  369. return NULL;
  370. }
  371. return rouleur->mbhc;
  372. }
  373. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  374. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  375. struct snd_kcontrol *kcontrol,
  376. int event)
  377. {
  378. struct snd_soc_component *component =
  379. snd_soc_dapm_to_component(w->dapm);
  380. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  381. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  382. w->name, event);
  383. switch (event) {
  384. case SND_SOC_DAPM_PRE_PMU:
  385. rouleur_rx_clk_enable(component);
  386. snd_soc_component_update_bits(component,
  387. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  388. 0x02, 0x02);
  389. snd_soc_component_update_bits(component,
  390. ROULEUR_SWR_HPHPA_HD2,
  391. 0x38, 0x38);
  392. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  393. break;
  394. case SND_SOC_DAPM_POST_PMU:
  395. if (rouleur->comp1_enable) {
  396. snd_soc_component_update_bits(component,
  397. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  398. 0x02, 0x02);
  399. if (rouleur->comp2_enable)
  400. snd_soc_component_update_bits(component,
  401. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  402. 0x01, 0x01);
  403. /*
  404. * 5ms sleep is required after COMP is enabled as per
  405. * HW requirement
  406. */
  407. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  408. usleep_range(5000, 5100);
  409. clear_bit(HPH_COMP_DELAY,
  410. &rouleur->status_mask);
  411. }
  412. } else {
  413. snd_soc_component_update_bits(component,
  414. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  415. 0x02, 0x00);
  416. }
  417. snd_soc_component_update_bits(component,
  418. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  419. 0x80, 0x00);
  420. snd_soc_component_update_bits(component,
  421. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  422. 0x04, 0x04);
  423. snd_soc_component_update_bits(component,
  424. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  425. break;
  426. case SND_SOC_DAPM_POST_PMD:
  427. snd_soc_component_update_bits(component,
  428. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  429. 0x01, 0x00);
  430. snd_soc_component_update_bits(component,
  431. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  432. 0x04, 0x00);
  433. snd_soc_component_update_bits(component,
  434. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  435. 0x80, 0x80);
  436. if (rouleur->comp1_enable)
  437. snd_soc_component_update_bits(component,
  438. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  439. 0x02, 0x00);
  440. break;
  441. }
  442. return 0;
  443. }
  444. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  445. struct snd_kcontrol *kcontrol,
  446. int event)
  447. {
  448. struct snd_soc_component *component =
  449. snd_soc_dapm_to_component(w->dapm);
  450. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  451. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  452. w->name, event);
  453. switch (event) {
  454. case SND_SOC_DAPM_PRE_PMU:
  455. rouleur_rx_clk_enable(component);
  456. snd_soc_component_update_bits(component,
  457. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  458. 0x02, 0x02);
  459. snd_soc_component_update_bits(component,
  460. ROULEUR_SWR_HPHPA_HD2,
  461. 0x07, 0x07);
  462. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  463. break;
  464. case SND_SOC_DAPM_POST_PMU:
  465. if (rouleur->comp2_enable) {
  466. snd_soc_component_update_bits(component,
  467. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  468. 0x01, 0x01);
  469. if (rouleur->comp1_enable)
  470. snd_soc_component_update_bits(component,
  471. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  472. 0x02, 0x02);
  473. /*
  474. * 5ms sleep is required after COMP is enabled as per
  475. * HW requirement
  476. */
  477. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  478. usleep_range(5000, 5100);
  479. clear_bit(HPH_COMP_DELAY,
  480. &rouleur->status_mask);
  481. }
  482. } else {
  483. snd_soc_component_update_bits(component,
  484. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  485. 0x01, 0x00);
  486. }
  487. snd_soc_component_update_bits(component,
  488. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  489. 0x80, 0x00);
  490. snd_soc_component_update_bits(component,
  491. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  492. 0x08, 0x08);
  493. snd_soc_component_update_bits(component,
  494. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  495. break;
  496. case SND_SOC_DAPM_POST_PMD:
  497. snd_soc_component_update_bits(component,
  498. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  499. snd_soc_component_update_bits(component,
  500. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  501. 0x08, 0x00);
  502. snd_soc_component_update_bits(component,
  503. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  504. 0x80, 0x80);
  505. if (rouleur->comp2_enable)
  506. snd_soc_component_update_bits(component,
  507. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  508. 0x01, 0x00);
  509. break;
  510. }
  511. return 0;
  512. }
  513. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  514. struct snd_kcontrol *kcontrol,
  515. int event)
  516. {
  517. struct snd_soc_component *component =
  518. snd_soc_dapm_to_component(w->dapm);
  519. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  520. w->name, event);
  521. switch (event) {
  522. case SND_SOC_DAPM_PRE_PMU:
  523. rouleur_rx_clk_enable(component);
  524. snd_soc_component_update_bits(component,
  525. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  526. 0x80, 0x00);
  527. snd_soc_component_update_bits(component,
  528. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  529. 0x01, 0x01);
  530. snd_soc_component_update_bits(component,
  531. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  532. 0x04, 0x04);
  533. break;
  534. case SND_SOC_DAPM_POST_PMD:
  535. snd_soc_component_update_bits(component,
  536. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  537. 0x01, 0x00);
  538. snd_soc_component_update_bits(component,
  539. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  540. 0x04, 0x00);
  541. snd_soc_component_update_bits(component,
  542. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  543. 0x80, 0x80);
  544. break;
  545. };
  546. return 0;
  547. }
  548. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  549. struct snd_kcontrol *kcontrol,
  550. int event)
  551. {
  552. struct snd_soc_component *component =
  553. snd_soc_dapm_to_component(w->dapm);
  554. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  555. int ret = 0;
  556. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  557. w->name, event);
  558. switch (event) {
  559. case SND_SOC_DAPM_PRE_PMU:
  560. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  561. rouleur->rx_swr_dev->dev_num,
  562. true);
  563. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  564. usleep_range(200, 210);
  565. snd_soc_component_update_bits(component,
  566. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  567. 0x03, 0x03);
  568. break;
  569. case SND_SOC_DAPM_POST_PMU:
  570. /*
  571. * 5ms sleep is required after PA is enabled as per
  572. * HW requirement.
  573. */
  574. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  575. usleep_range(5000, 5100);
  576. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  577. }
  578. if (rouleur->update_wcd_event)
  579. rouleur->update_wcd_event(rouleur->handle,
  580. WCD_BOLERO_EVT_RX_MUTE,
  581. (WCD_RX2 << 0x10));
  582. wcd_enable_irq(&rouleur->irq_info,
  583. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  584. break;
  585. case SND_SOC_DAPM_PRE_PMD:
  586. wcd_disable_irq(&rouleur->irq_info,
  587. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  588. if (rouleur->update_wcd_event)
  589. rouleur->update_wcd_event(rouleur->handle,
  590. WCD_BOLERO_EVT_RX_MUTE,
  591. (WCD_RX2 << 0x10 | 0x1));
  592. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  593. WCD_EVENT_PRE_HPHR_PA_OFF,
  594. &rouleur->mbhc->wcd_mbhc);
  595. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  596. break;
  597. case SND_SOC_DAPM_POST_PMD:
  598. /*
  599. * 5ms sleep is required after PA is disabled as per
  600. * HW requirement.
  601. */
  602. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  603. usleep_range(5000, 5100);
  604. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  605. }
  606. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  607. WCD_EVENT_POST_HPHR_PA_OFF,
  608. &rouleur->mbhc->wcd_mbhc);
  609. snd_soc_component_update_bits(component,
  610. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  611. 0x03, 0x00);
  612. break;
  613. };
  614. return ret;
  615. }
  616. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  617. struct snd_kcontrol *kcontrol,
  618. int event)
  619. {
  620. struct snd_soc_component *component =
  621. snd_soc_dapm_to_component(w->dapm);
  622. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  623. int ret = 0;
  624. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  625. w->name, event);
  626. switch (event) {
  627. case SND_SOC_DAPM_PRE_PMU:
  628. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  629. rouleur->rx_swr_dev->dev_num,
  630. true);
  631. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  632. usleep_range(200, 210);
  633. snd_soc_component_update_bits(component,
  634. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  635. 0x03, 0x03);
  636. break;
  637. case SND_SOC_DAPM_POST_PMU:
  638. /*
  639. * 5ms sleep is required after PA is enabled as per
  640. * HW requirement.
  641. */
  642. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  643. usleep_range(5000, 5100);
  644. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  645. }
  646. if (rouleur->update_wcd_event)
  647. rouleur->update_wcd_event(rouleur->handle,
  648. WCD_BOLERO_EVT_RX_MUTE,
  649. (WCD_RX1 << 0x10));
  650. wcd_enable_irq(&rouleur->irq_info,
  651. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  652. break;
  653. case SND_SOC_DAPM_PRE_PMD:
  654. wcd_disable_irq(&rouleur->irq_info,
  655. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  656. if (rouleur->update_wcd_event)
  657. rouleur->update_wcd_event(rouleur->handle,
  658. WCD_BOLERO_EVT_RX_MUTE,
  659. (WCD_RX1 << 0x10 | 0x1));
  660. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  661. WCD_EVENT_PRE_HPHL_PA_OFF,
  662. &rouleur->mbhc->wcd_mbhc);
  663. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  664. break;
  665. case SND_SOC_DAPM_POST_PMD:
  666. /*
  667. * 5ms sleep is required after PA is disabled as per
  668. * HW requirement.
  669. */
  670. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  671. usleep_range(5000, 5100);
  672. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  673. }
  674. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  675. WCD_EVENT_POST_HPHL_PA_OFF,
  676. &rouleur->mbhc->wcd_mbhc);
  677. snd_soc_component_update_bits(component,
  678. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  679. 0x03, 0x00);
  680. break;
  681. };
  682. return ret;
  683. }
  684. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  685. struct snd_kcontrol *kcontrol,
  686. int event)
  687. {
  688. struct snd_soc_component *component =
  689. snd_soc_dapm_to_component(w->dapm);
  690. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  691. int ret = 0;
  692. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  693. w->name, event);
  694. switch (event) {
  695. case SND_SOC_DAPM_PRE_PMU:
  696. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  697. rouleur->rx_swr_dev->dev_num,
  698. true);
  699. snd_soc_component_update_bits(component,
  700. ROULEUR_ANA_COMBOPA_CTL_5,
  701. 0x04, 0x00);
  702. usleep_range(1000, 1010);
  703. snd_soc_component_update_bits(component,
  704. ROULEUR_ANA_COMBOPA_CTL_4,
  705. 0x0F, 0x0F);
  706. usleep_range(1000, 1010);
  707. snd_soc_component_update_bits(component,
  708. ROULEUR_ANA_COMBOPA_CTL,
  709. 0x40, 0x00);
  710. snd_soc_component_update_bits(component,
  711. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  712. 0x03, 0x03);
  713. break;
  714. case SND_SOC_DAPM_POST_PMU:
  715. usleep_range(5000, 5100);
  716. snd_soc_component_update_bits(component,
  717. ROULEUR_ANA_COMBOPA_CTL_4,
  718. 0x0F, 0x04);
  719. if (rouleur->update_wcd_event)
  720. rouleur->update_wcd_event(rouleur->handle,
  721. WCD_BOLERO_EVT_RX_MUTE,
  722. (WCD_RX1 << 0x10));
  723. wcd_enable_irq(&rouleur->irq_info,
  724. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  725. break;
  726. case SND_SOC_DAPM_PRE_PMD:
  727. wcd_disable_irq(&rouleur->irq_info,
  728. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  729. if (rouleur->update_wcd_event)
  730. rouleur->update_wcd_event(rouleur->handle,
  731. WCD_BOLERO_EVT_RX_MUTE,
  732. (WCD_RX1 << 0x10 | 0x1));
  733. break;
  734. case SND_SOC_DAPM_POST_PMD:
  735. usleep_range(5000, 5100);
  736. snd_soc_component_update_bits(component,
  737. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  738. 0x03, 0x00);
  739. };
  740. return ret;
  741. }
  742. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  743. struct snd_kcontrol *kcontrol,
  744. int event)
  745. {
  746. struct snd_soc_component *component =
  747. snd_soc_dapm_to_component(w->dapm);
  748. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  749. int ret = 0;
  750. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  751. w->name, event);
  752. switch (event) {
  753. case SND_SOC_DAPM_PRE_PMU:
  754. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  755. rouleur->rx_swr_dev->dev_num,
  756. true);
  757. snd_soc_component_update_bits(component,
  758. ROULEUR_ANA_COMBOPA_CTL_5,
  759. 0x04, 0x00);
  760. usleep_range(1000, 1010);
  761. snd_soc_component_update_bits(component,
  762. ROULEUR_ANA_COMBOPA_CTL_4,
  763. 0x0F, 0x0F);
  764. usleep_range(1000, 1010);
  765. snd_soc_component_update_bits(component,
  766. ROULEUR_ANA_COMBOPA_CTL,
  767. 0x40, 0x40);
  768. snd_soc_component_update_bits(component,
  769. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  770. 0x03, 0x03);
  771. break;
  772. case SND_SOC_DAPM_POST_PMU:
  773. usleep_range(5000, 5100);
  774. snd_soc_component_update_bits(component,
  775. ROULEUR_ANA_COMBOPA_CTL_4,
  776. 0x0F, 0x04);
  777. if (rouleur->update_wcd_event)
  778. rouleur->update_wcd_event(rouleur->handle,
  779. WCD_BOLERO_EVT_RX_MUTE,
  780. (WCD_RX1 << 0x10));
  781. wcd_enable_irq(&rouleur->irq_info,
  782. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  783. break;
  784. case SND_SOC_DAPM_PRE_PMD:
  785. wcd_disable_irq(&rouleur->irq_info,
  786. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  787. if (rouleur->update_wcd_event)
  788. rouleur->update_wcd_event(rouleur->handle,
  789. WCD_BOLERO_EVT_RX_MUTE,
  790. (WCD_RX1 << 0x10 | 0x1));
  791. break;
  792. case SND_SOC_DAPM_POST_PMD:
  793. snd_soc_component_update_bits(component,
  794. ROULEUR_ANA_COMBOPA_CTL,
  795. 0x40, 0x00);
  796. usleep_range(5000, 5100);
  797. snd_soc_component_update_bits(component,
  798. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  799. 0x03, 0x00);
  800. };
  801. return ret;
  802. }
  803. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  804. struct snd_kcontrol *kcontrol,
  805. int event)
  806. {
  807. struct snd_soc_component *component =
  808. snd_soc_dapm_to_component(w->dapm);
  809. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  810. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  811. w->name, event);
  812. switch (event) {
  813. case SND_SOC_DAPM_PRE_PMU:
  814. rouleur_rx_connect_port(component, HPH_L, true);
  815. if (rouleur->comp1_enable)
  816. rouleur_rx_connect_port(component, COMP_L, true);
  817. break;
  818. case SND_SOC_DAPM_POST_PMD:
  819. rouleur_rx_connect_port(component, HPH_L, false);
  820. if (rouleur->comp1_enable)
  821. rouleur_rx_connect_port(component, COMP_L, false);
  822. rouleur_rx_clk_disable(component);
  823. break;
  824. };
  825. return 0;
  826. }
  827. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  828. struct snd_kcontrol *kcontrol, int event)
  829. {
  830. struct snd_soc_component *component =
  831. snd_soc_dapm_to_component(w->dapm);
  832. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  833. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  834. w->name, event);
  835. switch (event) {
  836. case SND_SOC_DAPM_PRE_PMU:
  837. rouleur_rx_connect_port(component, HPH_R, true);
  838. if (rouleur->comp2_enable)
  839. rouleur_rx_connect_port(component, COMP_R, true);
  840. break;
  841. case SND_SOC_DAPM_POST_PMD:
  842. rouleur_rx_connect_port(component, HPH_R, false);
  843. if (rouleur->comp2_enable)
  844. rouleur_rx_connect_port(component, COMP_R, false);
  845. rouleur_rx_clk_disable(component);
  846. break;
  847. };
  848. return 0;
  849. }
  850. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  851. struct snd_kcontrol *kcontrol,
  852. int event)
  853. {
  854. struct snd_soc_component *component =
  855. snd_soc_dapm_to_component(w->dapm);
  856. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  857. u16 dmic_clk_reg;
  858. s32 *dmic_clk_cnt;
  859. unsigned int dmic;
  860. char *wname;
  861. int ret = 0;
  862. wname = strpbrk(w->name, "01");
  863. if (!wname) {
  864. dev_err(component->dev, "%s: widget not found\n", __func__);
  865. return -EINVAL;
  866. }
  867. ret = kstrtouint(wname, 10, &dmic);
  868. if (ret < 0) {
  869. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  870. __func__);
  871. return -EINVAL;
  872. }
  873. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  874. w->name, event);
  875. switch (dmic) {
  876. case 0:
  877. case 1:
  878. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  879. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  880. break;
  881. default:
  882. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  883. __func__);
  884. return -EINVAL;
  885. };
  886. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  887. __func__, event, dmic, *dmic_clk_cnt);
  888. switch (event) {
  889. case SND_SOC_DAPM_PRE_PMU:
  890. snd_soc_component_update_bits(component,
  891. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  892. snd_soc_component_update_bits(component,
  893. dmic_clk_reg, 0x08, 0x08);
  894. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  895. break;
  896. case SND_SOC_DAPM_POST_PMD:
  897. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  898. snd_soc_component_update_bits(component,
  899. dmic_clk_reg, 0x08, 0x00);
  900. snd_soc_component_update_bits(component,
  901. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  902. break;
  903. };
  904. return 0;
  905. }
  906. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  907. struct snd_kcontrol *kcontrol,
  908. int event)
  909. {
  910. struct snd_soc_component *component =
  911. snd_soc_dapm_to_component(w->dapm);
  912. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  913. int ret = 0;
  914. switch (event) {
  915. case SND_SOC_DAPM_PRE_PMU:
  916. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  917. rouleur->tx_swr_dev->dev_num,
  918. true);
  919. break;
  920. case SND_SOC_DAPM_POST_PMD:
  921. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  922. rouleur->tx_swr_dev->dev_num,
  923. false);
  924. break;
  925. };
  926. return ret;
  927. }
  928. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  929. struct snd_kcontrol *kcontrol,
  930. int event)
  931. {
  932. struct snd_soc_component *component =
  933. snd_soc_dapm_to_component(w->dapm);
  934. struct rouleur_priv *rouleur =
  935. snd_soc_component_get_drvdata(component);
  936. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  937. w->name, event);
  938. switch (event) {
  939. case SND_SOC_DAPM_PRE_PMU:
  940. /* Enable BCS for Headset mic */
  941. if (w->shift == 1 && !(snd_soc_component_read32(component,
  942. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  943. rouleur_tx_connect_port(component, MBHC, true);
  944. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  945. }
  946. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  947. rouleur_global_mbias_enable(component);
  948. if (w->shift)
  949. snd_soc_component_update_bits(component,
  950. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  951. 0x30, 0x30);
  952. else
  953. snd_soc_component_update_bits(component,
  954. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  955. 0x03, 0x03);
  956. break;
  957. case SND_SOC_DAPM_POST_PMD:
  958. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  959. if (w->shift == 1 &&
  960. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  961. rouleur_tx_connect_port(component, MBHC, false);
  962. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  963. }
  964. if (w->shift)
  965. snd_soc_component_update_bits(component,
  966. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  967. 0x30, 0x00);
  968. else
  969. snd_soc_component_update_bits(component,
  970. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  971. 0x03, 0x00);
  972. rouleur_global_mbias_disable(component);
  973. break;
  974. };
  975. return 0;
  976. }
  977. /*
  978. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  979. * @micb_mv: micbias in mv
  980. *
  981. * return register value converted
  982. */
  983. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  984. {
  985. /* min micbias voltage is 1.6V and maximum is 2.85V */
  986. if (micb_mv < 1600 || micb_mv > 2850) {
  987. pr_err("%s: unsupported micbias voltage\n", __func__);
  988. return -EINVAL;
  989. }
  990. return (micb_mv - 1600) / 50;
  991. }
  992. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  993. /*
  994. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  995. * @component: handle to snd_soc_component *
  996. * @req_volt: micbias voltage to be set
  997. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  998. *
  999. * return 0 if adjustment is success or error code in case of failure
  1000. */
  1001. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  1002. int req_volt, int micb_num)
  1003. {
  1004. struct rouleur_priv *rouleur =
  1005. snd_soc_component_get_drvdata(component);
  1006. int cur_vout_ctl, req_vout_ctl;
  1007. int micb_reg, micb_val, micb_en;
  1008. int ret = 0;
  1009. int pullup_mask;
  1010. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1011. switch (micb_num) {
  1012. case MIC_BIAS_1:
  1013. micb_val = snd_soc_component_read32(component, micb_reg);
  1014. micb_en = (micb_val & 0x40) >> 6;
  1015. pullup_mask = 0x20;
  1016. break;
  1017. case MIC_BIAS_2:
  1018. micb_val = snd_soc_component_read32(component, micb_reg);
  1019. micb_en = (micb_val & 0x04) >> 2;
  1020. pullup_mask = 0x02;
  1021. break;
  1022. case MIC_BIAS_3:
  1023. default:
  1024. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1025. __func__, micb_num);
  1026. return -EINVAL;
  1027. }
  1028. mutex_lock(&rouleur->micb_lock);
  1029. /*
  1030. * If requested micbias voltage is same as current micbias
  1031. * voltage, then just return. Otherwise, adjust voltage as
  1032. * per requested value. If micbias is already enabled, then
  1033. * to avoid slow micbias ramp-up or down enable pull-up
  1034. * momentarily, change the micbias value and then re-enable
  1035. * micbias.
  1036. */
  1037. cur_vout_ctl = (snd_soc_component_read32(component,
  1038. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1039. cur_vout_ctl = cur_vout_ctl >> 3;
  1040. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1041. if (req_vout_ctl < 0) {
  1042. ret = -EINVAL;
  1043. goto exit;
  1044. }
  1045. if (cur_vout_ctl == req_vout_ctl) {
  1046. ret = 0;
  1047. goto exit;
  1048. }
  1049. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1050. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1051. req_volt, micb_en);
  1052. if (micb_en == 0x1)
  1053. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1054. pullup_mask);
  1055. snd_soc_component_update_bits(component,
  1056. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1057. if (micb_en == 0x1) {
  1058. snd_soc_component_update_bits(component, micb_reg,
  1059. pullup_mask, 0x00);
  1060. /*
  1061. * Add 2ms delay as per HW requirement after enabling
  1062. * micbias
  1063. */
  1064. usleep_range(2000, 2100);
  1065. }
  1066. exit:
  1067. mutex_unlock(&rouleur->micb_lock);
  1068. return ret;
  1069. }
  1070. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1071. int rouleur_micbias_control(struct snd_soc_component *component,
  1072. int micb_num, int req, bool is_dapm)
  1073. {
  1074. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1075. int micb_index = micb_num - 1;
  1076. u16 micb_reg;
  1077. int pre_off_event = 0, post_off_event = 0;
  1078. int post_on_event = 0, post_dapm_off = 0;
  1079. int post_dapm_on = 0;
  1080. u8 pullup_mask = 0, enable_mask = 0;
  1081. int ret = 0;
  1082. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1083. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1084. __func__, micb_index);
  1085. return -EINVAL;
  1086. }
  1087. switch (micb_num) {
  1088. case MIC_BIAS_1:
  1089. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1090. pullup_mask = 0x20;
  1091. enable_mask = 0x40;
  1092. break;
  1093. case MIC_BIAS_2:
  1094. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1095. pullup_mask = 0x02;
  1096. enable_mask = 0x04;
  1097. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1098. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1099. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1100. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1101. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1102. break;
  1103. case MIC_BIAS_3:
  1104. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1105. pullup_mask = 0x02;
  1106. break;
  1107. default:
  1108. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1109. __func__, micb_num);
  1110. return -EINVAL;
  1111. };
  1112. mutex_lock(&rouleur->micb_lock);
  1113. switch (req) {
  1114. case MICB_PULLUP_ENABLE:
  1115. if (!rouleur->dev_up) {
  1116. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1117. __func__, req);
  1118. ret = -ENODEV;
  1119. goto done;
  1120. }
  1121. rouleur->pullup_ref[micb_index]++;
  1122. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1123. (rouleur->micb_ref[micb_index] == 0))
  1124. snd_soc_component_update_bits(component, micb_reg,
  1125. pullup_mask, pullup_mask);
  1126. break;
  1127. case MICB_PULLUP_DISABLE:
  1128. if (!rouleur->dev_up) {
  1129. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1130. __func__, req);
  1131. ret = -ENODEV;
  1132. goto done;
  1133. }
  1134. if (rouleur->pullup_ref[micb_index] > 0)
  1135. rouleur->pullup_ref[micb_index]--;
  1136. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1137. (rouleur->micb_ref[micb_index] == 0))
  1138. snd_soc_component_update_bits(component, micb_reg,
  1139. pullup_mask, 0x00);
  1140. break;
  1141. case MICB_ENABLE:
  1142. if (!rouleur->dev_up) {
  1143. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1144. __func__, req);
  1145. ret = -ENODEV;
  1146. goto done;
  1147. }
  1148. rouleur->micb_ref[micb_index]++;
  1149. if (rouleur->micb_ref[micb_index] == 1) {
  1150. rouleur_global_mbias_enable(component);
  1151. snd_soc_component_update_bits(component,
  1152. micb_reg, enable_mask, enable_mask);
  1153. if (post_on_event)
  1154. blocking_notifier_call_chain(
  1155. &rouleur->mbhc->notifier, post_on_event,
  1156. &rouleur->mbhc->wcd_mbhc);
  1157. }
  1158. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1159. blocking_notifier_call_chain(
  1160. &rouleur->mbhc->notifier, post_dapm_on,
  1161. &rouleur->mbhc->wcd_mbhc);
  1162. break;
  1163. case MICB_DISABLE:
  1164. if (rouleur->micb_ref[micb_index] > 0)
  1165. rouleur->micb_ref[micb_index]--;
  1166. if (!rouleur->dev_up) {
  1167. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1168. __func__, req);
  1169. ret = -ENODEV;
  1170. goto done;
  1171. }
  1172. if ((rouleur->micb_ref[micb_index] == 0) &&
  1173. (rouleur->pullup_ref[micb_index] > 0)) {
  1174. snd_soc_component_update_bits(component, micb_reg,
  1175. pullup_mask, pullup_mask);
  1176. snd_soc_component_update_bits(component, micb_reg,
  1177. enable_mask, 0x00);
  1178. rouleur_global_mbias_disable(component);
  1179. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1180. (rouleur->pullup_ref[micb_index] == 0)) {
  1181. if (pre_off_event && rouleur->mbhc)
  1182. blocking_notifier_call_chain(
  1183. &rouleur->mbhc->notifier, pre_off_event,
  1184. &rouleur->mbhc->wcd_mbhc);
  1185. snd_soc_component_update_bits(component, micb_reg,
  1186. enable_mask, 0x00);
  1187. rouleur_global_mbias_disable(component);
  1188. if (post_off_event && rouleur->mbhc)
  1189. blocking_notifier_call_chain(
  1190. &rouleur->mbhc->notifier,
  1191. post_off_event,
  1192. &rouleur->mbhc->wcd_mbhc);
  1193. }
  1194. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1195. blocking_notifier_call_chain(
  1196. &rouleur->mbhc->notifier, post_dapm_off,
  1197. &rouleur->mbhc->wcd_mbhc);
  1198. break;
  1199. };
  1200. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1201. __func__, micb_num, rouleur->micb_ref[micb_index],
  1202. rouleur->pullup_ref[micb_index]);
  1203. done:
  1204. mutex_unlock(&rouleur->micb_lock);
  1205. return 0;
  1206. }
  1207. EXPORT_SYMBOL(rouleur_micbias_control);
  1208. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1209. bool bcs_disable)
  1210. {
  1211. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1212. if (rouleur->update_wcd_event) {
  1213. if (bcs_disable)
  1214. rouleur->update_wcd_event(rouleur->handle,
  1215. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1216. else
  1217. rouleur->update_wcd_event(rouleur->handle,
  1218. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1219. }
  1220. }
  1221. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1222. {
  1223. int ret = 0;
  1224. uint8_t devnum = 0;
  1225. int num_retry = NUM_ATTEMPTS;
  1226. do {
  1227. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1228. if (ret) {
  1229. dev_err(&swr_dev->dev,
  1230. "%s get devnum %d for dev addr %lx failed\n",
  1231. __func__, devnum, swr_dev->addr);
  1232. /* retry after 1ms */
  1233. usleep_range(1000, 1010);
  1234. }
  1235. } while (ret && --num_retry);
  1236. swr_dev->dev_num = devnum;
  1237. return 0;
  1238. }
  1239. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1240. struct wcd_mbhc_config *mbhc_cfg)
  1241. {
  1242. if (mbhc_cfg->enable_usbc_analog) {
  1243. if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
  1244. & 0x20))
  1245. return true;
  1246. }
  1247. return false;
  1248. }
  1249. static int rouleur_event_notify(struct notifier_block *block,
  1250. unsigned long val,
  1251. void *data)
  1252. {
  1253. u16 event = (val & 0xffff);
  1254. int ret = 0;
  1255. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1256. struct snd_soc_component *component = rouleur->component;
  1257. struct wcd_mbhc *mbhc;
  1258. switch (event) {
  1259. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1260. snd_soc_component_update_bits(component,
  1261. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1262. 0xC0, 0x00);
  1263. snd_soc_component_update_bits(component,
  1264. ROULEUR_ANA_COMBOPA_CTL,
  1265. 0x40, 0x00);
  1266. snd_soc_component_update_bits(component,
  1267. ROULEUR_ANA_COMBOPA_CTL,
  1268. 0x80, 0x00);
  1269. snd_soc_component_update_bits(component,
  1270. ROULEUR_ANA_COMBOPA_CTL,
  1271. 0x40, 0x40);
  1272. snd_soc_component_update_bits(component,
  1273. ROULEUR_ANA_COMBOPA_CTL,
  1274. 0x80, 0x00);
  1275. break;
  1276. case BOLERO_WCD_EVT_SSR_DOWN:
  1277. rouleur->dev_up = false;
  1278. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1279. mbhc = &rouleur->mbhc->wcd_mbhc;
  1280. rouleur->usbc_hs_status = get_usbc_hs_status(component,
  1281. mbhc->mbhc_cfg);
  1282. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1283. rouleur_reset(rouleur->dev, 0x01);
  1284. break;
  1285. case BOLERO_WCD_EVT_SSR_UP:
  1286. rouleur_reset(rouleur->dev, 0x00);
  1287. /* allow reset to take effect */
  1288. usleep_range(10000, 10010);
  1289. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1290. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1291. rouleur_init_reg(component);
  1292. regcache_mark_dirty(rouleur->regmap);
  1293. regcache_sync(rouleur->regmap);
  1294. rouleur->dev_up = true;
  1295. /* Initialize MBHC module */
  1296. mbhc = &rouleur->mbhc->wcd_mbhc;
  1297. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1298. if (ret) {
  1299. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1300. __func__);
  1301. } else {
  1302. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1303. if (rouleur->usbc_hs_status)
  1304. mdelay(500);
  1305. }
  1306. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1307. break;
  1308. default:
  1309. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1310. event);
  1311. break;
  1312. }
  1313. return 0;
  1314. }
  1315. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1316. int event)
  1317. {
  1318. struct snd_soc_component *component =
  1319. snd_soc_dapm_to_component(w->dapm);
  1320. int micb_num;
  1321. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1322. __func__, w->name, event);
  1323. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1324. micb_num = MIC_BIAS_1;
  1325. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1326. micb_num = MIC_BIAS_2;
  1327. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1328. micb_num = MIC_BIAS_3;
  1329. else
  1330. return -EINVAL;
  1331. switch (event) {
  1332. case SND_SOC_DAPM_PRE_PMU:
  1333. /* Micbias LD0 enable not supported for MicBias 3*/
  1334. if (micb_num == MIC_BIAS_3)
  1335. rouleur_micbias_control(component, micb_num,
  1336. MICB_PULLUP_ENABLE, true);
  1337. else
  1338. rouleur_micbias_control(component, micb_num,
  1339. MICB_ENABLE, true);
  1340. break;
  1341. case SND_SOC_DAPM_POST_PMU:
  1342. usleep_range(1000, 1100);
  1343. break;
  1344. case SND_SOC_DAPM_POST_PMD:
  1345. if (micb_num == MIC_BIAS_3)
  1346. rouleur_micbias_control(component, micb_num,
  1347. MICB_PULLUP_DISABLE, true);
  1348. else
  1349. rouleur_micbias_control(component, micb_num,
  1350. MICB_DISABLE, true);
  1351. break;
  1352. };
  1353. return 0;
  1354. }
  1355. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1356. struct snd_kcontrol *kcontrol,
  1357. int event)
  1358. {
  1359. return __rouleur_codec_enable_micbias(w, event);
  1360. }
  1361. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1362. int event)
  1363. {
  1364. struct snd_soc_component *component =
  1365. snd_soc_dapm_to_component(w->dapm);
  1366. int micb_num;
  1367. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1368. __func__, w->name, event);
  1369. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1370. micb_num = MIC_BIAS_1;
  1371. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1372. micb_num = MIC_BIAS_2;
  1373. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1374. micb_num = MIC_BIAS_3;
  1375. else
  1376. return -EINVAL;
  1377. switch (event) {
  1378. case SND_SOC_DAPM_PRE_PMU:
  1379. rouleur_micbias_control(component, micb_num,
  1380. MICB_PULLUP_ENABLE, true);
  1381. break;
  1382. case SND_SOC_DAPM_POST_PMU:
  1383. /* 1 msec delay as per HW requirement */
  1384. usleep_range(1000, 1100);
  1385. break;
  1386. case SND_SOC_DAPM_POST_PMD:
  1387. rouleur_micbias_control(component, micb_num,
  1388. MICB_PULLUP_DISABLE, true);
  1389. break;
  1390. };
  1391. return 0;
  1392. }
  1393. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1394. struct snd_kcontrol *kcontrol,
  1395. int event)
  1396. {
  1397. return __rouleur_codec_enable_micbias_pullup(w, event);
  1398. }
  1399. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1400. struct snd_ctl_elem_value *ucontrol)
  1401. {
  1402. struct snd_soc_component *component =
  1403. snd_soc_kcontrol_component(kcontrol);
  1404. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1405. bool hphr;
  1406. struct soc_multi_mixer_control *mc;
  1407. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1408. hphr = mc->shift;
  1409. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1410. rouleur->comp1_enable;
  1411. return 0;
  1412. }
  1413. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1414. struct snd_ctl_elem_value *ucontrol)
  1415. {
  1416. struct snd_soc_component *component =
  1417. snd_soc_kcontrol_component(kcontrol);
  1418. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1419. int value = ucontrol->value.integer.value[0];
  1420. bool hphr;
  1421. struct soc_multi_mixer_control *mc;
  1422. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1423. hphr = mc->shift;
  1424. if (hphr)
  1425. rouleur->comp2_enable = value;
  1426. else
  1427. rouleur->comp1_enable = value;
  1428. return 0;
  1429. }
  1430. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1431. struct snd_kcontrol *kcontrol,
  1432. int event)
  1433. {
  1434. struct snd_soc_component *component =
  1435. snd_soc_dapm_to_component(w->dapm);
  1436. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1437. struct rouleur_pdata *pdata = NULL;
  1438. int ret = 0;
  1439. pdata = dev_get_platdata(rouleur->dev);
  1440. if (!pdata) {
  1441. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1442. return -EINVAL;
  1443. }
  1444. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1445. w->name, event);
  1446. switch (event) {
  1447. case SND_SOC_DAPM_PRE_PMU:
  1448. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1449. dev_dbg(component->dev,
  1450. "%s: vpos already in enabled state\n",
  1451. __func__);
  1452. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1453. return 0;
  1454. }
  1455. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1456. rouleur->supplies,
  1457. pdata->regulator,
  1458. pdata->num_supplies,
  1459. "cdc-pa-vpos");
  1460. if (ret == -EINVAL) {
  1461. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1462. __func__);
  1463. return ret;
  1464. }
  1465. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1466. /*
  1467. * 200us sleep is required after LDO15 is enabled as per
  1468. * HW requirement
  1469. */
  1470. usleep_range(200, 250);
  1471. break;
  1472. case SND_SOC_DAPM_POST_PMD:
  1473. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1474. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1475. rouleur->rx_swr_dev->dev_num,
  1476. false);
  1477. break;
  1478. }
  1479. return 0;
  1480. }
  1481. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1482. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1483. rouleur_get_compander, rouleur_set_compander),
  1484. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1485. rouleur_get_compander, rouleur_set_compander),
  1486. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1487. line_gain),
  1488. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1489. line_gain),
  1490. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1491. analog_gain),
  1492. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1493. analog_gain),
  1494. };
  1495. static const struct snd_kcontrol_new adc1_switch[] = {
  1496. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1497. };
  1498. static const struct snd_kcontrol_new adc2_switch[] = {
  1499. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1500. };
  1501. static const struct snd_kcontrol_new dmic1_switch[] = {
  1502. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1503. };
  1504. static const struct snd_kcontrol_new dmic2_switch[] = {
  1505. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1506. };
  1507. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1508. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1509. };
  1510. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1511. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1512. };
  1513. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1514. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1515. };
  1516. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1517. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1518. };
  1519. static const char * const adc2_mux_text[] = {
  1520. "INP2", "INP3"
  1521. };
  1522. static const struct soc_enum adc2_enum =
  1523. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1524. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1525. static const struct snd_kcontrol_new tx_adc2_mux =
  1526. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1527. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1528. /*input widgets*/
  1529. SND_SOC_DAPM_INPUT("AMIC1"),
  1530. SND_SOC_DAPM_INPUT("AMIC2"),
  1531. SND_SOC_DAPM_INPUT("AMIC3"),
  1532. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1533. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1534. /*tx widgets*/
  1535. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1536. rouleur_codec_enable_adc,
  1537. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1538. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1539. rouleur_codec_enable_adc,
  1540. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1541. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1542. &tx_adc2_mux),
  1543. /*tx mixers*/
  1544. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1545. adc1_switch, ARRAY_SIZE(adc1_switch),
  1546. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1547. SND_SOC_DAPM_POST_PMD),
  1548. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1549. adc2_switch, ARRAY_SIZE(adc2_switch),
  1550. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1551. SND_SOC_DAPM_POST_PMD),
  1552. /* micbias widgets*/
  1553. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1554. rouleur_codec_enable_micbias,
  1555. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1556. SND_SOC_DAPM_POST_PMD),
  1557. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1558. rouleur_codec_enable_micbias,
  1559. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1560. SND_SOC_DAPM_POST_PMD),
  1561. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1562. rouleur_codec_enable_micbias,
  1563. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1564. SND_SOC_DAPM_POST_PMD),
  1565. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1566. rouleur_codec_enable_pa_vpos,
  1567. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1568. /*rx widgets*/
  1569. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1570. rouleur_codec_enable_ear_pa,
  1571. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1572. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1573. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1574. rouleur_codec_enable_lo_pa,
  1575. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1576. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1577. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1578. 0, rouleur_codec_enable_hphl_pa,
  1579. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1580. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1581. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1582. 0, rouleur_codec_enable_hphr_pa,
  1583. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1584. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1585. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1586. rouleur_codec_hphl_dac_event,
  1587. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1588. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1589. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1590. rouleur_codec_hphr_dac_event,
  1591. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1592. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1593. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1594. rouleur_codec_ear_lo_dac_event,
  1595. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1596. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1597. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1598. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1599. SND_SOC_DAPM_POST_PMD),
  1600. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1601. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1602. SND_SOC_DAPM_POST_PMD),
  1603. /* rx mixer widgets*/
  1604. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1605. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1606. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1607. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1608. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1609. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1610. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1611. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1612. /*output widgets tx*/
  1613. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1614. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1615. /*output widgets rx*/
  1616. SND_SOC_DAPM_OUTPUT("EAR"),
  1617. SND_SOC_DAPM_OUTPUT("LO"),
  1618. SND_SOC_DAPM_OUTPUT("HPHL"),
  1619. SND_SOC_DAPM_OUTPUT("HPHR"),
  1620. /* micbias pull up widgets*/
  1621. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1622. rouleur_codec_enable_micbias_pullup,
  1623. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1624. SND_SOC_DAPM_POST_PMD),
  1625. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1626. rouleur_codec_enable_micbias_pullup,
  1627. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1628. SND_SOC_DAPM_POST_PMD),
  1629. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1630. rouleur_codec_enable_micbias_pullup,
  1631. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1632. SND_SOC_DAPM_POST_PMD),
  1633. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1634. rouleur_codec_enable_dmic,
  1635. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1636. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1637. rouleur_codec_enable_dmic,
  1638. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1639. /*tx mixer widgets*/
  1640. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1641. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1642. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1643. SND_SOC_DAPM_POST_PMD),
  1644. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1645. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1646. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1647. SND_SOC_DAPM_POST_PMD),
  1648. /*output widgets*/
  1649. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1650. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1651. };
  1652. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1653. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1654. {"ADC1_MIXER", "Switch", "ADC1"},
  1655. {"ADC1", NULL, "AMIC1"},
  1656. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1657. {"ADC2_MIXER", "Switch", "ADC2"},
  1658. {"ADC2", NULL, "ADC2 MUX"},
  1659. {"ADC2 MUX", "INP3", "AMIC3"},
  1660. {"ADC2 MUX", "INP2", "AMIC2"},
  1661. {"IN1_HPHL", NULL, "PA_VPOS"},
  1662. {"RX1", NULL, "IN1_HPHL"},
  1663. {"RDAC1", NULL, "RX1"},
  1664. {"HPHL_RDAC", "Switch", "RDAC1"},
  1665. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1666. {"HPHL", NULL, "HPHL PGA"},
  1667. {"IN2_HPHR", NULL, "PA_VPOS"},
  1668. {"RX2", NULL, "IN2_HPHR"},
  1669. {"RDAC2", NULL, "RX2"},
  1670. {"HPHR_RDAC", "Switch", "RDAC2"},
  1671. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1672. {"HPHR", NULL, "HPHR PGA"},
  1673. {"RDAC3", NULL, "RX1"},
  1674. {"EAR_RDAC", "Switch", "RDAC3"},
  1675. {"EAR PGA", NULL, "EAR_RDAC"},
  1676. {"EAR", NULL, "EAR PGA"},
  1677. {"RDAC3", NULL, "RX1"},
  1678. {"LO_RDAC", "Switch", "RDAC3"},
  1679. {"LO PGA", NULL, "LO_RDAC"},
  1680. {"LO", NULL, "LO PGA"},
  1681. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1682. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1683. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1684. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1685. };
  1686. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1687. void *file_private_data,
  1688. struct file *file,
  1689. char __user *buf, size_t count,
  1690. loff_t pos)
  1691. {
  1692. struct rouleur_priv *priv;
  1693. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1694. int len = 0;
  1695. priv = (struct rouleur_priv *) entry->private_data;
  1696. if (!priv) {
  1697. pr_err("%s: rouleur priv is null\n", __func__);
  1698. return -EINVAL;
  1699. }
  1700. switch (priv->version) {
  1701. case ROULEUR_VERSION_1_0:
  1702. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1703. break;
  1704. default:
  1705. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1706. }
  1707. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1708. }
  1709. static struct snd_info_entry_ops rouleur_info_ops = {
  1710. .read = rouleur_version_read,
  1711. };
  1712. /*
  1713. * rouleur_info_create_codec_entry - creates rouleur module
  1714. * @codec_root: The parent directory
  1715. * @component: component instance
  1716. *
  1717. * Creates rouleur module and version entry under the given
  1718. * parent directory.
  1719. *
  1720. * Return: 0 on success or negative error code on failure.
  1721. */
  1722. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1723. struct snd_soc_component *component)
  1724. {
  1725. struct snd_info_entry *version_entry;
  1726. struct rouleur_priv *priv;
  1727. struct snd_soc_card *card;
  1728. if (!codec_root || !component)
  1729. return -EINVAL;
  1730. priv = snd_soc_component_get_drvdata(component);
  1731. if (priv->entry) {
  1732. dev_dbg(priv->dev,
  1733. "%s:rouleur module already created\n", __func__);
  1734. return 0;
  1735. }
  1736. card = component->card;
  1737. priv->entry = snd_info_create_subdir(codec_root->module,
  1738. "rouleur", codec_root);
  1739. if (!priv->entry) {
  1740. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1741. __func__);
  1742. return -ENOMEM;
  1743. }
  1744. version_entry = snd_info_create_card_entry(card->snd_card,
  1745. "version",
  1746. priv->entry);
  1747. if (!version_entry) {
  1748. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1749. __func__);
  1750. return -ENOMEM;
  1751. }
  1752. version_entry->private_data = priv;
  1753. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1754. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1755. version_entry->c.ops = &rouleur_info_ops;
  1756. if (snd_info_register(version_entry) < 0) {
  1757. snd_info_free_entry(version_entry);
  1758. return -ENOMEM;
  1759. }
  1760. priv->version_entry = version_entry;
  1761. return 0;
  1762. }
  1763. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1764. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1765. struct rouleur_pdata *pdata)
  1766. {
  1767. int vout_ctl = 0;
  1768. int rc = 0;
  1769. if (!pdata) {
  1770. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1771. return -ENODEV;
  1772. }
  1773. /* set micbias voltage */
  1774. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1775. if (vout_ctl < 0) {
  1776. rc = -EINVAL;
  1777. goto done;
  1778. }
  1779. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1780. 0xF8, vout_ctl << 3);
  1781. done:
  1782. return rc;
  1783. }
  1784. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1785. {
  1786. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1787. struct snd_soc_dapm_context *dapm =
  1788. snd_soc_component_get_dapm(component);
  1789. int ret = -EINVAL;
  1790. dev_info(component->dev, "%s()\n", __func__);
  1791. rouleur = snd_soc_component_get_drvdata(component);
  1792. if (!rouleur)
  1793. return -EINVAL;
  1794. rouleur->component = component;
  1795. snd_soc_component_init_regmap(component, rouleur->regmap);
  1796. rouleur->fw_data = devm_kzalloc(component->dev,
  1797. sizeof(*(rouleur->fw_data)),
  1798. GFP_KERNEL);
  1799. if (!rouleur->fw_data) {
  1800. dev_err(component->dev, "Failed to allocate fw_data\n");
  1801. ret = -ENOMEM;
  1802. goto done;
  1803. }
  1804. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1805. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1806. WCD9XXX_CODEC_HWDEP_NODE, component);
  1807. if (ret < 0) {
  1808. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1809. goto done;
  1810. }
  1811. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1812. if (ret) {
  1813. pr_err("%s: mbhc initialization failed\n", __func__);
  1814. goto done;
  1815. }
  1816. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1817. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1818. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1819. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1820. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1821. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1822. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1823. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1824. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1825. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1826. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1827. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1828. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1829. snd_soc_dapm_sync(dapm);
  1830. rouleur_init_reg(component);
  1831. rouleur->version = ROULEUR_VERSION_1_0;
  1832. /* Register event notifier */
  1833. rouleur->nblock.notifier_call = rouleur_event_notify;
  1834. if (rouleur->register_notifier) {
  1835. ret = rouleur->register_notifier(rouleur->handle,
  1836. &rouleur->nblock,
  1837. true);
  1838. if (ret) {
  1839. dev_err(component->dev,
  1840. "%s: Failed to register notifier %d\n",
  1841. __func__, ret);
  1842. return ret;
  1843. }
  1844. }
  1845. rouleur->dev_up = true;
  1846. done:
  1847. return ret;
  1848. }
  1849. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1850. {
  1851. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1852. if (!rouleur)
  1853. return;
  1854. if (rouleur->register_notifier)
  1855. rouleur->register_notifier(rouleur->handle,
  1856. &rouleur->nblock,
  1857. false);
  1858. }
  1859. static int rouleur_soc_codec_suspend(struct snd_soc_component *component)
  1860. {
  1861. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1862. if (!rouleur)
  1863. return 0;
  1864. rouleur->dapm_bias_off = true;
  1865. return 0;
  1866. }
  1867. static int rouleur_soc_codec_resume(struct snd_soc_component *component)
  1868. {
  1869. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1870. if (!rouleur)
  1871. return 0;
  1872. rouleur->dapm_bias_off = false;
  1873. return 0;
  1874. }
  1875. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1876. .name = DRV_NAME,
  1877. .probe = rouleur_soc_codec_probe,
  1878. .remove = rouleur_soc_codec_remove,
  1879. .controls = rouleur_snd_controls,
  1880. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1881. .dapm_widgets = rouleur_dapm_widgets,
  1882. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1883. .dapm_routes = rouleur_audio_map,
  1884. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1885. .suspend = rouleur_soc_codec_suspend,
  1886. .resume = rouleur_soc_codec_resume,
  1887. };
  1888. #ifdef CONFIG_PM_SLEEP
  1889. static int rouleur_suspend(struct device *dev)
  1890. {
  1891. struct rouleur_priv *rouleur = NULL;
  1892. int ret = 0;
  1893. struct rouleur_pdata *pdata = NULL;
  1894. if (!dev)
  1895. return -ENODEV;
  1896. rouleur = dev_get_drvdata(dev);
  1897. if (!rouleur)
  1898. return -EINVAL;
  1899. pdata = dev_get_platdata(rouleur->dev);
  1900. if (!pdata) {
  1901. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1902. return -EINVAL;
  1903. }
  1904. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1905. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1906. rouleur->supplies,
  1907. pdata->regulator,
  1908. pdata->num_supplies,
  1909. "cdc-pa-vpos");
  1910. if (ret == -EINVAL) {
  1911. dev_err(dev, "%s: pa vpos is not disabled\n",
  1912. __func__);
  1913. return 0;
  1914. }
  1915. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1916. }
  1917. if (rouleur->dapm_bias_off) {
  1918. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  1919. rouleur->supplies,
  1920. pdata->regulator,
  1921. pdata->num_supplies,
  1922. true);
  1923. set_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  1924. }
  1925. return 0;
  1926. }
  1927. static int rouleur_resume(struct device *dev)
  1928. {
  1929. struct rouleur_priv *rouleur = NULL;
  1930. struct rouleur_pdata *pdata = NULL;
  1931. if (!dev)
  1932. return -ENODEV;
  1933. rouleur = dev_get_drvdata(dev);
  1934. if (!rouleur)
  1935. return -EINVAL;
  1936. pdata = dev_get_platdata(rouleur->dev);
  1937. if (!pdata) {
  1938. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1939. return -EINVAL;
  1940. }
  1941. if (test_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask)) {
  1942. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  1943. rouleur->supplies,
  1944. pdata->regulator,
  1945. pdata->num_supplies,
  1946. false);
  1947. clear_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  1948. }
  1949. return 0;
  1950. }
  1951. #endif
  1952. static int rouleur_reset(struct device *dev, int reset_val)
  1953. {
  1954. struct rouleur_priv *rouleur = NULL;
  1955. if (!dev)
  1956. return -ENODEV;
  1957. rouleur = dev_get_drvdata(dev);
  1958. if (!rouleur)
  1959. return -EINVAL;
  1960. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1961. return 0;
  1962. }
  1963. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1964. u32 *val)
  1965. {
  1966. int rc = 0;
  1967. rc = of_property_read_u32(dev->of_node, name, val);
  1968. if (rc)
  1969. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1970. __func__, name, dev->of_node->full_name);
  1971. return rc;
  1972. }
  1973. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1974. struct rouleur_micbias_setting *mb)
  1975. {
  1976. u32 prop_val = 0;
  1977. int rc = 0;
  1978. /* MB1 */
  1979. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1980. NULL)) {
  1981. rc = rouleur_read_of_property_u32(dev,
  1982. "qcom,cdc-micbias1-mv",
  1983. &prop_val);
  1984. if (!rc)
  1985. mb->micb1_mv = prop_val;
  1986. } else {
  1987. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1988. __func__);
  1989. }
  1990. /* MB2 */
  1991. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1992. NULL)) {
  1993. rc = rouleur_read_of_property_u32(dev,
  1994. "qcom,cdc-micbias2-mv",
  1995. &prop_val);
  1996. if (!rc)
  1997. mb->micb2_mv = prop_val;
  1998. } else {
  1999. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2000. __func__);
  2001. }
  2002. /* MB3 */
  2003. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2004. NULL)) {
  2005. rc = rouleur_read_of_property_u32(dev,
  2006. "qcom,cdc-micbias3-mv",
  2007. &prop_val);
  2008. if (!rc)
  2009. mb->micb3_mv = prop_val;
  2010. } else {
  2011. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2012. __func__);
  2013. }
  2014. }
  2015. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  2016. {
  2017. struct rouleur_pdata *pdata = NULL;
  2018. u32 reg;
  2019. int ret = 0;
  2020. pdata = kzalloc(sizeof(struct rouleur_pdata),
  2021. GFP_KERNEL);
  2022. if (!pdata)
  2023. return NULL;
  2024. pdata->spmi_np = of_parse_phandle(dev->of_node,
  2025. "qcom,pmic-spmi-node", 0);
  2026. if (!pdata->spmi_np) {
  2027. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2028. __func__, "qcom,pmic-spmi-node",
  2029. dev->of_node->full_name);
  2030. kfree(pdata);
  2031. return NULL;
  2032. }
  2033. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  2034. if (ret) {
  2035. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  2036. __func__, ret);
  2037. kfree(pdata);
  2038. return NULL;
  2039. }
  2040. pdata->reset_reg = reg;
  2041. /* Parse power supplies */
  2042. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2043. &pdata->num_supplies);
  2044. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2045. dev_err(dev, "%s: no power supplies defined for codec\n",
  2046. __func__);
  2047. kfree(pdata);
  2048. return NULL;
  2049. }
  2050. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2051. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2052. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  2053. return pdata;
  2054. }
  2055. static int rouleur_wakeup(void *handle, bool enable)
  2056. {
  2057. struct rouleur_priv *priv;
  2058. if (!handle) {
  2059. pr_err("%s: NULL handle\n", __func__);
  2060. return -EINVAL;
  2061. }
  2062. priv = (struct rouleur_priv *)handle;
  2063. if (!priv->tx_swr_dev) {
  2064. pr_err("%s: tx swr dev is NULL\n", __func__);
  2065. return -EINVAL;
  2066. }
  2067. if (enable)
  2068. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2069. else
  2070. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2071. }
  2072. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  2073. {
  2074. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2075. __func__, irq);
  2076. return IRQ_HANDLED;
  2077. }
  2078. static int rouleur_bind(struct device *dev)
  2079. {
  2080. int ret = 0, i = 0;
  2081. struct rouleur_priv *rouleur = NULL;
  2082. struct rouleur_pdata *pdata = NULL;
  2083. struct wcd_ctrl_platform_data *plat_data = NULL;
  2084. struct platform_device *pdev = NULL;
  2085. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  2086. if (!rouleur)
  2087. return -ENOMEM;
  2088. dev_set_drvdata(dev, rouleur);
  2089. pdata = rouleur_populate_dt_data(dev);
  2090. if (!pdata) {
  2091. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2092. kfree(rouleur);
  2093. return -EINVAL;
  2094. }
  2095. rouleur->dev = dev;
  2096. rouleur->dev->platform_data = pdata;
  2097. pdev = of_find_device_by_node(pdata->spmi_np);
  2098. if (!pdev) {
  2099. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2100. __func__);
  2101. ret = -EINVAL;
  2102. goto err_bind_all;
  2103. }
  2104. rouleur->spmi_dev = &pdev->dev;
  2105. rouleur->reset_reg = pdata->reset_reg;
  2106. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2107. pdata->regulator, pdata->num_supplies);
  2108. if (!rouleur->supplies) {
  2109. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2110. __func__);
  2111. goto err_bind_all;
  2112. }
  2113. plat_data = dev_get_platdata(dev->parent);
  2114. if (!plat_data) {
  2115. dev_err(dev, "%s: platform data from parent is NULL\n",
  2116. __func__);
  2117. ret = -EINVAL;
  2118. goto err_bind_all;
  2119. }
  2120. rouleur->handle = (void *)plat_data->handle;
  2121. if (!rouleur->handle) {
  2122. dev_err(dev, "%s: handle is NULL\n", __func__);
  2123. ret = -EINVAL;
  2124. goto err_bind_all;
  2125. }
  2126. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2127. if (!rouleur->update_wcd_event) {
  2128. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2129. __func__);
  2130. ret = -EINVAL;
  2131. goto err_bind_all;
  2132. }
  2133. rouleur->register_notifier = plat_data->register_notifier;
  2134. if (!rouleur->register_notifier) {
  2135. dev_err(dev, "%s: register_notifier api is null!\n",
  2136. __func__);
  2137. ret = -EINVAL;
  2138. goto err_bind_all;
  2139. }
  2140. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2141. pdata->regulator,
  2142. pdata->num_supplies);
  2143. if (ret) {
  2144. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2145. __func__);
  2146. goto err_bind_all;
  2147. }
  2148. rouleur_reset(dev, 0x01);
  2149. usleep_range(20, 30);
  2150. rouleur_reset(dev, 0x00);
  2151. /*
  2152. * Add 5msec delay to provide sufficient time for
  2153. * soundwire auto enumeration of slave devices as
  2154. * as per HW requirement.
  2155. */
  2156. usleep_range(5000, 5010);
  2157. rouleur->wakeup = rouleur_wakeup;
  2158. ret = component_bind_all(dev, rouleur);
  2159. if (ret) {
  2160. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2161. __func__, ret);
  2162. goto err_bind_all;
  2163. }
  2164. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2165. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2166. if (ret) {
  2167. dev_err(dev, "Failed to read port mapping\n");
  2168. goto err;
  2169. }
  2170. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2171. if (!rouleur->rx_swr_dev) {
  2172. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2173. __func__);
  2174. ret = -ENODEV;
  2175. goto err;
  2176. }
  2177. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2178. if (!rouleur->tx_swr_dev) {
  2179. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2180. __func__);
  2181. ret = -ENODEV;
  2182. goto err;
  2183. }
  2184. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2185. &rouleur_regmap_config);
  2186. if (!rouleur->regmap) {
  2187. dev_err(dev, "%s: Regmap init failed\n",
  2188. __func__);
  2189. goto err;
  2190. }
  2191. /* Set all interupts as edge triggered */
  2192. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2193. regmap_write(rouleur->regmap,
  2194. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2195. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2196. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2197. rouleur->irq_info.codec_name = "rouleur";
  2198. rouleur->irq_info.regmap = rouleur->regmap;
  2199. rouleur->irq_info.dev = dev;
  2200. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2201. if (ret) {
  2202. dev_err(dev, "%s: IRQ init failed: %d\n",
  2203. __func__, ret);
  2204. goto err;
  2205. }
  2206. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2207. mutex_init(&rouleur->micb_lock);
  2208. mutex_init(&rouleur->main_bias_lock);
  2209. mutex_init(&rouleur->rx_clk_lock);
  2210. ret = rouleur_set_micbias_data(rouleur, pdata);
  2211. if (ret < 0) {
  2212. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2213. goto err_irq;
  2214. }
  2215. /* Request for watchdog interrupt */
  2216. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2217. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2218. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2219. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2220. /* Disable watchdog interrupt for HPH */
  2221. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2222. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2223. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2224. NULL, 0);
  2225. if (ret) {
  2226. dev_err(dev, "%s: Codec registration failed\n",
  2227. __func__);
  2228. goto err_irq;
  2229. }
  2230. return ret;
  2231. err_irq:
  2232. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2233. mutex_destroy(&rouleur->micb_lock);
  2234. mutex_destroy(&rouleur->main_bias_lock);
  2235. mutex_destroy(&rouleur->rx_clk_lock);
  2236. err:
  2237. component_unbind_all(dev, rouleur);
  2238. err_bind_all:
  2239. dev_set_drvdata(dev, NULL);
  2240. kfree(pdata);
  2241. kfree(rouleur);
  2242. return ret;
  2243. }
  2244. static void rouleur_unbind(struct device *dev)
  2245. {
  2246. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2247. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2248. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2249. snd_soc_unregister_component(dev);
  2250. component_unbind_all(dev, rouleur);
  2251. mutex_destroy(&rouleur->micb_lock);
  2252. mutex_destroy(&rouleur->main_bias_lock);
  2253. mutex_destroy(&rouleur->rx_clk_lock);
  2254. dev_set_drvdata(dev, NULL);
  2255. kfree(pdata);
  2256. kfree(rouleur);
  2257. }
  2258. static const struct of_device_id rouleur_dt_match[] = {
  2259. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2260. {}
  2261. };
  2262. static const struct component_master_ops rouleur_comp_ops = {
  2263. .bind = rouleur_bind,
  2264. .unbind = rouleur_unbind,
  2265. };
  2266. static int rouleur_compare_of(struct device *dev, void *data)
  2267. {
  2268. return dev->of_node == data;
  2269. }
  2270. static void rouleur_release_of(struct device *dev, void *data)
  2271. {
  2272. of_node_put(data);
  2273. }
  2274. static int rouleur_add_slave_components(struct device *dev,
  2275. struct component_match **matchptr)
  2276. {
  2277. struct device_node *np, *rx_node, *tx_node;
  2278. np = dev->of_node;
  2279. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2280. if (!rx_node) {
  2281. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2282. return -ENODEV;
  2283. }
  2284. of_node_get(rx_node);
  2285. component_match_add_release(dev, matchptr,
  2286. rouleur_release_of,
  2287. rouleur_compare_of,
  2288. rx_node);
  2289. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2290. if (!tx_node) {
  2291. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2292. return -ENODEV;
  2293. }
  2294. of_node_get(tx_node);
  2295. component_match_add_release(dev, matchptr,
  2296. rouleur_release_of,
  2297. rouleur_compare_of,
  2298. tx_node);
  2299. return 0;
  2300. }
  2301. static int rouleur_probe(struct platform_device *pdev)
  2302. {
  2303. struct component_match *match = NULL;
  2304. int ret;
  2305. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2306. if (ret)
  2307. return ret;
  2308. return component_master_add_with_match(&pdev->dev,
  2309. &rouleur_comp_ops, match);
  2310. }
  2311. static int rouleur_remove(struct platform_device *pdev)
  2312. {
  2313. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2314. dev_set_drvdata(&pdev->dev, NULL);
  2315. return 0;
  2316. }
  2317. #ifdef CONFIG_PM_SLEEP
  2318. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2319. .suspend_late = rouleur_suspend,
  2320. .resume_early = rouleur_resume
  2321. };
  2322. #endif
  2323. static struct platform_driver rouleur_codec_driver = {
  2324. .probe = rouleur_probe,
  2325. .remove = rouleur_remove,
  2326. .driver = {
  2327. .name = "rouleur_codec",
  2328. .owner = THIS_MODULE,
  2329. .of_match_table = of_match_ptr(rouleur_dt_match),
  2330. #ifdef CONFIG_PM_SLEEP
  2331. .pm = &rouleur_dev_pm_ops,
  2332. #endif
  2333. .suppress_bind_attrs = true,
  2334. },
  2335. };
  2336. module_platform_driver(rouleur_codec_driver);
  2337. MODULE_DESCRIPTION("Rouleur Codec driver");
  2338. MODULE_LICENSE("GPL v2");