dp_be_rx.c 33 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "cdp_txrx_cmn_struct.h"
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_be_rx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_be_rx.h"
  26. #include "hal_api.h"
  27. #include "hal_be_api.h"
  28. #include "qdf_nbuf.h"
  29. #ifdef MESH_MODE_SUPPORT
  30. #include "if_meta_hdr.h"
  31. #endif
  32. #include "dp_internal.h"
  33. #include "dp_ipa.h"
  34. #ifdef FEATURE_WDS
  35. #include "dp_txrx_wds.h"
  36. #endif
  37. #include "dp_hist.h"
  38. #include "dp_rx_buffer_pool.h"
  39. #ifndef AST_OFFLOAD_ENABLE
  40. static void
  41. dp_rx_wds_learn(struct dp_soc *soc,
  42. struct dp_vdev *vdev,
  43. uint8_t *rx_tlv_hdr,
  44. struct dp_peer *peer,
  45. qdf_nbuf_t nbuf,
  46. struct hal_rx_msdu_metadata msdu_metadata)
  47. {
  48. /* WDS Source Port Learning */
  49. if (qdf_likely(vdev->wds_enabled))
  50. dp_rx_wds_srcport_learn(soc,
  51. rx_tlv_hdr,
  52. peer,
  53. nbuf,
  54. msdu_metadata);
  55. }
  56. #else
  57. static void
  58. dp_rx_wds_learn(struct dp_soc *soc,
  59. struct dp_vdev *vdev,
  60. uint8_t *rx_tlv_hdr,
  61. struct dp_peer *ta_peer,
  62. qdf_nbuf_t nbuf,
  63. struct hal_rx_msdu_metadata msdu_metadata)
  64. {
  65. }
  66. #endif
  67. /**
  68. * dp_rx_process_be() - Brain of the Rx processing functionality
  69. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  70. * @int_ctx: per interrupt context
  71. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  72. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  73. * @quota: No. of units (packets) that can be serviced in one shot.
  74. *
  75. * This function implements the core of Rx functionality. This is
  76. * expected to handle only non-error frames.
  77. *
  78. * Return: uint32_t: No. of elements processed
  79. */
  80. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  81. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  82. uint32_t quota)
  83. {
  84. hal_ring_desc_t ring_desc;
  85. hal_soc_handle_t hal_soc;
  86. struct dp_rx_desc *rx_desc = NULL;
  87. qdf_nbuf_t nbuf, next;
  88. bool near_full;
  89. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  90. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  91. uint32_t num_pending;
  92. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  93. uint16_t msdu_len = 0;
  94. uint16_t peer_id;
  95. uint8_t vdev_id;
  96. struct dp_peer *peer;
  97. struct dp_vdev *vdev;
  98. uint32_t pkt_len = 0;
  99. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  100. struct hal_rx_msdu_desc_info msdu_desc_info;
  101. enum hal_reo_error_status error;
  102. uint32_t peer_mdata;
  103. uint8_t *rx_tlv_hdr;
  104. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  105. uint8_t mac_id = 0;
  106. struct dp_pdev *rx_pdev;
  107. struct dp_srng *dp_rxdma_srng;
  108. struct rx_desc_pool *rx_desc_pool;
  109. struct dp_soc *soc = int_ctx->soc;
  110. uint8_t core_id = 0;
  111. struct cdp_tid_rx_stats *tid_stats;
  112. qdf_nbuf_t nbuf_head;
  113. qdf_nbuf_t nbuf_tail;
  114. qdf_nbuf_t deliver_list_head;
  115. qdf_nbuf_t deliver_list_tail;
  116. uint32_t num_rx_bufs_reaped = 0;
  117. uint32_t intr_id;
  118. struct hif_opaque_softc *scn;
  119. int32_t tid = 0;
  120. bool is_prev_msdu_last = true;
  121. uint32_t num_entries_avail = 0;
  122. uint32_t rx_ol_pkt_cnt = 0;
  123. uint32_t num_entries = 0;
  124. struct hal_rx_msdu_metadata msdu_metadata;
  125. QDF_STATUS status;
  126. qdf_nbuf_t ebuf_head;
  127. qdf_nbuf_t ebuf_tail;
  128. uint8_t pkt_capture_offload = 0;
  129. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  130. int max_reap_limit, ring_near_full;
  131. DP_HIST_INIT();
  132. qdf_assert_always(soc && hal_ring_hdl);
  133. hal_soc = soc->hal_soc;
  134. qdf_assert_always(hal_soc);
  135. scn = soc->hif_handle;
  136. hif_pm_runtime_mark_dp_rx_busy(scn);
  137. intr_id = int_ctx->dp_intr_id;
  138. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  139. more_data:
  140. /* reset local variables here to be re-used in the function */
  141. nbuf_head = NULL;
  142. nbuf_tail = NULL;
  143. deliver_list_head = NULL;
  144. deliver_list_tail = NULL;
  145. peer = NULL;
  146. vdev = NULL;
  147. num_rx_bufs_reaped = 0;
  148. ebuf_head = NULL;
  149. ebuf_tail = NULL;
  150. ring_near_full = 0;
  151. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  152. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  153. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  154. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  155. qdf_mem_zero(head, sizeof(head));
  156. qdf_mem_zero(tail, sizeof(tail));
  157. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  158. &max_reap_limit);
  159. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  160. /*
  161. * Need API to convert from hal_ring pointer to
  162. * Ring Type / Ring Id combo
  163. */
  164. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  165. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  166. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  167. goto done;
  168. }
  169. /*
  170. * start reaping the buffers from reo ring and queue
  171. * them in per vdev queue.
  172. * Process the received pkts in a different per vdev loop.
  173. */
  174. while (qdf_likely(quota &&
  175. (ring_desc = hal_srng_dst_peek(hal_soc,
  176. hal_ring_hdl)))) {
  177. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  178. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  179. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  180. soc, hal_ring_hdl, error);
  181. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  182. 1);
  183. /* Don't know how to deal with this -- assert */
  184. qdf_assert(0);
  185. }
  186. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  187. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  188. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  189. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  190. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  191. break;
  192. }
  193. rx_desc = (struct dp_rx_desc *)
  194. hal_rx_get_reo_desc_va(ring_desc);
  195. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  196. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  197. ring_desc, rx_desc);
  198. if (QDF_IS_STATUS_ERROR(status)) {
  199. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  200. qdf_assert_always(!rx_desc->unmapped);
  201. dp_ipa_reo_ctx_buf_mapping_lock(
  202. soc,
  203. reo_ring_num);
  204. dp_ipa_handle_rx_buf_smmu_mapping(
  205. soc,
  206. rx_desc->nbuf,
  207. RX_DATA_BUFFER_SIZE,
  208. false);
  209. qdf_nbuf_unmap_nbytes_single(
  210. soc->osdev,
  211. rx_desc->nbuf,
  212. QDF_DMA_FROM_DEVICE,
  213. RX_DATA_BUFFER_SIZE);
  214. rx_desc->unmapped = 1;
  215. dp_ipa_reo_ctx_buf_mapping_unlock(
  216. soc,
  217. reo_ring_num);
  218. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  219. rx_desc->pool_id);
  220. dp_rx_add_to_free_desc_list(
  221. &head[rx_desc->pool_id],
  222. &tail[rx_desc->pool_id],
  223. rx_desc);
  224. }
  225. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  226. continue;
  227. }
  228. /*
  229. * this is a unlikely scenario where the host is reaping
  230. * a descriptor which it already reaped just a while ago
  231. * but is yet to replenish it back to HW.
  232. * In this case host will dump the last 128 descriptors
  233. * including the software descriptor rx_desc and assert.
  234. */
  235. if (qdf_unlikely(!rx_desc->in_use)) {
  236. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  237. dp_info_rl("Reaping rx_desc not in use!");
  238. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  239. ring_desc, rx_desc);
  240. /* ignore duplicate RX desc and continue to process */
  241. /* Pop out the descriptor */
  242. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  243. continue;
  244. }
  245. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  246. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  247. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  248. dp_info_rl("Nbuf sanity check failure!");
  249. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  250. ring_desc, rx_desc);
  251. rx_desc->in_err_state = 1;
  252. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  253. continue;
  254. }
  255. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  256. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  257. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  258. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  259. ring_desc, rx_desc);
  260. }
  261. /* Get MPDU DESC info */
  262. hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
  263. /* Get MSDU DESC info */
  264. hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
  265. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  266. HAL_MSDU_F_MSDU_CONTINUATION)) {
  267. /* previous msdu has end bit set, so current one is
  268. * the new MPDU
  269. */
  270. if (is_prev_msdu_last) {
  271. /* Get number of entries available in HW ring */
  272. num_entries_avail =
  273. hal_srng_dst_num_valid(hal_soc,
  274. hal_ring_hdl, 1);
  275. /* For new MPDU check if we can read complete
  276. * MPDU by comparing the number of buffers
  277. * available and number of buffers needed to
  278. * reap this MPDU
  279. */
  280. if ((msdu_desc_info.msdu_len /
  281. (RX_DATA_BUFFER_SIZE -
  282. soc->rx_pkt_tlv_size) + 1) >
  283. num_entries_avail) {
  284. DP_STATS_INC(soc,
  285. rx.msdu_scatter_wait_break,
  286. 1);
  287. dp_rx_cookie_reset_invalid_bit(
  288. ring_desc);
  289. break;
  290. }
  291. is_prev_msdu_last = false;
  292. }
  293. }
  294. core_id = smp_processor_id();
  295. DP_STATS_INC(soc, rx.ring_packets[core_id][reo_ring_num], 1);
  296. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  297. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  298. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  299. HAL_MPDU_F_RAW_AMPDU))
  300. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  301. if (!is_prev_msdu_last &&
  302. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  303. is_prev_msdu_last = true;
  304. /* Pop out the descriptor*/
  305. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  306. rx_bufs_reaped[rx_desc->pool_id]++;
  307. peer_mdata = mpdu_desc_info.peer_meta_data;
  308. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  309. dp_rx_peer_metadata_peer_id_get_be(soc, peer_mdata);
  310. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  311. dp_rx_peer_metadata_vdev_id_get_be(soc, peer_mdata);
  312. /* to indicate whether this msdu is rx offload */
  313. pkt_capture_offload =
  314. DP_PEER_METADATA_OFFLOAD_GET_BE(peer_mdata);
  315. /*
  316. * save msdu flags first, last and continuation msdu in
  317. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  318. * length to nbuf->cb. This ensures the info required for
  319. * per pkt processing is always in the same cache line.
  320. * This helps in improving throughput for smaller pkt
  321. * sizes.
  322. */
  323. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  324. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  325. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  326. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  327. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  328. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  329. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  330. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  331. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  332. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  333. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  334. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  335. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_INTRA_BSS)
  336. qdf_nbuf_set_intra_bss(rx_desc->nbuf, 1);
  337. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  338. HAL_MPDU_F_QOS_CONTROL_VALID))
  339. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  340. /* set sw exception */
  341. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  342. rx_desc->nbuf,
  343. hal_rx_sw_exception_get_be(ring_desc));
  344. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  345. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  346. /*
  347. * move unmap after scattered msdu waiting break logic
  348. * in case double skb unmap happened.
  349. */
  350. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  351. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  352. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  353. rx_desc_pool->buf_size,
  354. false);
  355. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  356. QDF_DMA_FROM_DEVICE,
  357. rx_desc_pool->buf_size);
  358. rx_desc->unmapped = 1;
  359. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  360. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  361. ebuf_tail, rx_desc);
  362. /*
  363. * if continuation bit is set then we have MSDU spread
  364. * across multiple buffers, let us not decrement quota
  365. * till we reap all buffers of that MSDU.
  366. */
  367. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  368. quota -= 1;
  369. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  370. &tail[rx_desc->pool_id], rx_desc);
  371. num_rx_bufs_reaped++;
  372. /*
  373. * only if complete msdu is received for scatter case,
  374. * then allow break.
  375. */
  376. if (is_prev_msdu_last &&
  377. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  378. max_reap_limit))
  379. break;
  380. }
  381. done:
  382. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  383. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  384. /*
  385. * continue with next mac_id if no pkts were reaped
  386. * from that pool
  387. */
  388. if (!rx_bufs_reaped[mac_id])
  389. continue;
  390. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  391. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  392. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  393. rx_desc_pool, rx_bufs_reaped[mac_id],
  394. &head[mac_id], &tail[mac_id]);
  395. }
  396. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  397. /* Peer can be NULL is case of LFR */
  398. if (qdf_likely(peer))
  399. vdev = NULL;
  400. /*
  401. * BIG loop where each nbuf is dequeued from global queue,
  402. * processed and queued back on a per vdev basis. These nbufs
  403. * are sent to stack as and when we run out of nbufs
  404. * or a new nbuf dequeued from global queue has a different
  405. * vdev when compared to previous nbuf.
  406. */
  407. nbuf = nbuf_head;
  408. while (nbuf) {
  409. next = nbuf->next;
  410. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  411. nbuf = next;
  412. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  413. continue;
  414. }
  415. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  416. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  417. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  418. if (dp_rx_is_list_ready(deliver_list_head, vdev, peer,
  419. peer_id, vdev_id)) {
  420. dp_rx_deliver_to_stack(soc, vdev, peer,
  421. deliver_list_head,
  422. deliver_list_tail);
  423. deliver_list_head = NULL;
  424. deliver_list_tail = NULL;
  425. }
  426. /* Get TID from struct cb->tid_val, save to tid */
  427. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  428. tid = qdf_nbuf_get_tid_val(nbuf);
  429. if (qdf_unlikely(!peer)) {
  430. peer = dp_peer_get_ref_by_id(soc, peer_id,
  431. DP_MOD_ID_RX);
  432. } else if (peer && peer->peer_id != peer_id) {
  433. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  434. peer = dp_peer_get_ref_by_id(soc, peer_id,
  435. DP_MOD_ID_RX);
  436. }
  437. if (peer) {
  438. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  439. qdf_dp_trace_set_track(nbuf, QDF_RX);
  440. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  441. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  442. QDF_NBUF_RX_PKT_DATA_TRACK;
  443. }
  444. rx_bufs_used++;
  445. if (qdf_likely(peer)) {
  446. vdev = peer->vdev;
  447. } else {
  448. nbuf->next = NULL;
  449. dp_rx_deliver_to_pkt_capture_no_peer(
  450. soc, nbuf, pkt_capture_offload);
  451. if (!pkt_capture_offload)
  452. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  453. nbuf = next;
  454. continue;
  455. }
  456. if (qdf_unlikely(!vdev)) {
  457. qdf_nbuf_free(nbuf);
  458. nbuf = next;
  459. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  460. continue;
  461. }
  462. /* when hlos tid override is enabled, save tid in
  463. * skb->priority
  464. */
  465. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  466. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  467. qdf_nbuf_set_priority(nbuf, tid);
  468. rx_pdev = vdev->pdev;
  469. DP_RX_TID_SAVE(nbuf, tid);
  470. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  471. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  472. soc->wlan_cfg_ctx)))
  473. qdf_nbuf_set_timestamp(nbuf);
  474. tid_stats =
  475. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  476. /*
  477. * Check if DMA completed -- msdu_done is the last bit
  478. * to be written
  479. */
  480. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  481. !hal_rx_attn_msdu_done_get(hal_soc,
  482. rx_tlv_hdr))) {
  483. dp_err("MSDU DONE failure");
  484. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  485. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  486. QDF_TRACE_LEVEL_INFO);
  487. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  488. qdf_nbuf_free(nbuf);
  489. qdf_assert(0);
  490. nbuf = next;
  491. continue;
  492. }
  493. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  494. /*
  495. * First IF condition:
  496. * 802.11 Fragmented pkts are reinjected to REO
  497. * HW block as SG pkts and for these pkts we only
  498. * need to pull the RX TLVS header length.
  499. * Second IF condition:
  500. * The below condition happens when an MSDU is spread
  501. * across multiple buffers. This can happen in two cases
  502. * 1. The nbuf size is smaller then the received msdu.
  503. * ex: we have set the nbuf size to 2048 during
  504. * nbuf_alloc. but we received an msdu which is
  505. * 2304 bytes in size then this msdu is spread
  506. * across 2 nbufs.
  507. *
  508. * 2. AMSDUs when RAW mode is enabled.
  509. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  510. * across 1st nbuf and 2nd nbuf and last MSDU is
  511. * spread across 2nd nbuf and 3rd nbuf.
  512. *
  513. * for these scenarios let us create a skb frag_list and
  514. * append these buffers till the last MSDU of the AMSDU
  515. * Third condition:
  516. * This is the most likely case, we receive 802.3 pkts
  517. * decapsulated by HW, here we need to set the pkt length.
  518. */
  519. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  520. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  521. bool is_mcbc, is_sa_vld, is_da_vld;
  522. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  523. rx_tlv_hdr);
  524. is_sa_vld =
  525. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  526. rx_tlv_hdr);
  527. is_da_vld =
  528. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  529. rx_tlv_hdr);
  530. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  531. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  532. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  533. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  534. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  535. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  536. nbuf = dp_rx_sg_create(soc, nbuf);
  537. next = nbuf->next;
  538. if (qdf_nbuf_is_raw_frame(nbuf)) {
  539. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  540. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  541. } else {
  542. qdf_nbuf_free(nbuf);
  543. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  544. dp_info_rl("scatter msdu len %d, dropped",
  545. msdu_len);
  546. nbuf = next;
  547. continue;
  548. }
  549. } else {
  550. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  551. pkt_len = msdu_len +
  552. msdu_metadata.l3_hdr_pad +
  553. soc->rx_pkt_tlv_size;
  554. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  555. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  556. }
  557. /*
  558. * process frame for mulitpass phrase processing
  559. */
  560. if (qdf_unlikely(vdev->multipass_en)) {
  561. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  562. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  563. qdf_nbuf_free(nbuf);
  564. nbuf = next;
  565. continue;
  566. }
  567. }
  568. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  569. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  570. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  571. /* Drop & free packet */
  572. qdf_nbuf_free(nbuf);
  573. /* Statistics */
  574. nbuf = next;
  575. continue;
  576. }
  577. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  578. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  579. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  580. rx_tlv_hdr) ==
  581. false))) {
  582. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  583. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  584. qdf_nbuf_free(nbuf);
  585. nbuf = next;
  586. continue;
  587. }
  588. /*
  589. * Drop non-EAPOL frames from unauthorized peer.
  590. */
  591. if (qdf_likely(peer) && qdf_unlikely(!peer->authorize) &&
  592. !qdf_nbuf_is_raw_frame(nbuf)) {
  593. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  594. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  595. if (!is_eapol) {
  596. DP_STATS_INC(soc,
  597. rx.err.peer_unauth_rx_pkt_drop,
  598. 1);
  599. qdf_nbuf_free(nbuf);
  600. nbuf = next;
  601. continue;
  602. }
  603. }
  604. if (soc->process_rx_status)
  605. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  606. /* Update the protocol tag in SKB based on CCE metadata */
  607. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  608. reo_ring_num, false, true);
  609. /* Update the flow tag in SKB based on FSE metadata */
  610. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  611. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  612. reo_ring_num, tid_stats);
  613. if (qdf_unlikely(vdev->mesh_vdev)) {
  614. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  615. == QDF_STATUS_SUCCESS) {
  616. dp_rx_info("%pK: mesh pkt filtered", soc);
  617. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  618. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  619. 1);
  620. qdf_nbuf_free(nbuf);
  621. nbuf = next;
  622. continue;
  623. }
  624. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  625. }
  626. if (qdf_likely(vdev->rx_decap_type ==
  627. htt_cmn_pkt_type_ethernet) &&
  628. qdf_likely(!vdev->mesh_vdev)) {
  629. dp_rx_wds_learn(soc, vdev,
  630. rx_tlv_hdr,
  631. peer,
  632. nbuf,
  633. msdu_metadata);
  634. /* Intrabss-fwd */
  635. if (dp_rx_check_ap_bridge(vdev))
  636. if (dp_rx_intrabss_fwd_be(soc, peer, rx_tlv_hdr,
  637. nbuf,
  638. msdu_metadata)) {
  639. nbuf = next;
  640. tid_stats->intrabss_cnt++;
  641. continue; /* Get next desc */
  642. }
  643. }
  644. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  645. dp_rx_update_stats(soc, nbuf);
  646. DP_RX_LIST_APPEND(deliver_list_head,
  647. deliver_list_tail,
  648. nbuf);
  649. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  650. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  651. if (qdf_unlikely(peer->in_twt))
  652. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  653. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  654. tid_stats->delivered_to_stack++;
  655. nbuf = next;
  656. }
  657. if (qdf_likely(deliver_list_head)) {
  658. if (qdf_likely(peer)) {
  659. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  660. pkt_capture_offload,
  661. deliver_list_head);
  662. if (!pkt_capture_offload)
  663. dp_rx_deliver_to_stack(soc, vdev, peer,
  664. deliver_list_head,
  665. deliver_list_tail);
  666. } else {
  667. nbuf = deliver_list_head;
  668. while (nbuf) {
  669. next = nbuf->next;
  670. nbuf->next = NULL;
  671. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  672. nbuf = next;
  673. }
  674. }
  675. }
  676. if (qdf_likely(peer))
  677. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  678. /*
  679. * If we are processing in near-full condition, there are 3 scenario
  680. * 1) Ring entries has reached critical state
  681. * 2) Ring entries are still near high threshold
  682. * 3) Ring entries are below the safe level
  683. *
  684. * One more loop will move the state to normal processing and yield
  685. */
  686. if (ring_near_full)
  687. goto more_data;
  688. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  689. if (quota) {
  690. num_pending =
  691. dp_rx_srng_get_num_pending(hal_soc,
  692. hal_ring_hdl,
  693. num_entries,
  694. &near_full);
  695. if (num_pending) {
  696. DP_STATS_INC(soc, rx.hp_oos2, 1);
  697. if (!hif_exec_should_yield(scn, intr_id))
  698. goto more_data;
  699. if (qdf_unlikely(near_full)) {
  700. DP_STATS_INC(soc, rx.near_full, 1);
  701. goto more_data;
  702. }
  703. }
  704. }
  705. if (vdev && vdev->osif_fisa_flush)
  706. vdev->osif_fisa_flush(soc, reo_ring_num);
  707. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  708. vdev->osif_gro_flush(vdev->osif_vdev,
  709. reo_ring_num);
  710. }
  711. }
  712. /* Update histogram statistics by looping through pdev's */
  713. DP_RX_HIST_STATS_PER_PDEV();
  714. return rx_bufs_used; /* Assume no scale factor for now */
  715. }
  716. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  717. /**
  718. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  719. * @soc: Handle to DP Soc structure
  720. * @rx_desc_pool: Rx descriptor pool handler
  721. * @pool_id: Rx descriptor pool ID
  722. *
  723. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  724. */
  725. static QDF_STATUS
  726. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  727. struct rx_desc_pool *rx_desc_pool,
  728. uint32_t pool_id)
  729. {
  730. struct dp_soc_be *be_soc;
  731. union dp_rx_desc_list_elem_t *rx_desc_elem;
  732. struct dp_spt_page_desc *page_desc;
  733. struct dp_spt_page_desc_list *page_desc_list;
  734. be_soc = dp_get_be_soc_from_dp_soc(soc);
  735. page_desc_list = &be_soc->rx_spt_page_desc[pool_id];
  736. /* allocate SPT pages from page desc pool */
  737. page_desc_list->num_spt_pages =
  738. dp_cc_spt_page_desc_alloc(be_soc,
  739. &page_desc_list->spt_page_list_head,
  740. &page_desc_list->spt_page_list_tail,
  741. rx_desc_pool->pool_size);
  742. if (!page_desc_list->num_spt_pages) {
  743. dp_err("fail to allocate cookie conversion spt pages");
  744. return QDF_STATUS_E_FAILURE;
  745. }
  746. /* put each RX Desc VA to SPT pages and get corresponding ID */
  747. page_desc = page_desc_list->spt_page_list_head;
  748. rx_desc_elem = rx_desc_pool->freelist;
  749. while (rx_desc_elem) {
  750. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  751. page_desc->avail_entry_index,
  752. &rx_desc_elem->rx_desc);
  753. rx_desc_elem->rx_desc.cookie =
  754. dp_cc_desc_id_generate(page_desc->ppt_index,
  755. page_desc->avail_entry_index);
  756. rx_desc_elem->rx_desc.pool_id = pool_id;
  757. rx_desc_elem->rx_desc.in_use = 0;
  758. rx_desc_elem = rx_desc_elem->next;
  759. page_desc->avail_entry_index++;
  760. if (page_desc->avail_entry_index >=
  761. DP_CC_SPT_PAGE_MAX_ENTRIES)
  762. page_desc = page_desc->next;
  763. }
  764. return QDF_STATUS_SUCCESS;
  765. }
  766. #else
  767. static QDF_STATUS
  768. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  769. struct rx_desc_pool *rx_desc_pool,
  770. uint32_t pool_id)
  771. {
  772. struct dp_soc_be *be_soc;
  773. struct dp_spt_page_desc *page_desc;
  774. struct dp_spt_page_desc_list *page_desc_list;
  775. int i;
  776. be_soc = dp_get_be_soc_from_dp_soc(soc);
  777. page_desc_list = &be_soc->rx_spt_page_desc[pool_id];
  778. /* allocate SPT pages from page desc pool */
  779. page_desc_list->num_spt_pages =
  780. dp_cc_spt_page_desc_alloc(
  781. be_soc,
  782. &page_desc_list->spt_page_list_head,
  783. &page_desc_list->spt_page_list_tail,
  784. rx_desc_pool->pool_size);
  785. if (!page_desc_list->num_spt_pages) {
  786. dp_err("fail to allocate cookie conversion spt pages");
  787. return QDF_STATUS_E_FAILURE;
  788. }
  789. /* put each RX Desc VA to SPT pages and get corresponding ID */
  790. page_desc = page_desc_list->spt_page_list_head;
  791. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  792. if (i == rx_desc_pool->pool_size - 1)
  793. rx_desc_pool->array[i].next = NULL;
  794. else
  795. rx_desc_pool->array[i].next =
  796. &rx_desc_pool->array[i + 1];
  797. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  798. page_desc->avail_entry_index,
  799. &rx_desc_pool->array[i].rx_desc);
  800. rx_desc_pool->array[i].rx_desc.cookie =
  801. dp_cc_desc_id_generate(page_desc->ppt_index,
  802. page_desc->avail_entry_index);
  803. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  804. rx_desc_pool->array[i].rx_desc.in_use = 0;
  805. page_desc->avail_entry_index++;
  806. if (page_desc->avail_entry_index >=
  807. DP_CC_SPT_PAGE_MAX_ENTRIES)
  808. page_desc = page_desc->next;
  809. }
  810. return QDF_STATUS_SUCCESS;
  811. }
  812. #endif
  813. static void
  814. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  815. struct rx_desc_pool *rx_desc_pool,
  816. uint32_t pool_id)
  817. {
  818. struct dp_soc_be *be_soc;
  819. struct dp_spt_page_desc *page_desc;
  820. struct dp_spt_page_desc_list *page_desc_list;
  821. be_soc = dp_get_be_soc_from_dp_soc(soc);
  822. page_desc_list = &be_soc->rx_spt_page_desc[pool_id];
  823. if (!page_desc_list->num_spt_pages) {
  824. dp_warn("page_desc_list is empty for pool_id %d", pool_id);
  825. return;
  826. }
  827. /* cleanup for each page */
  828. page_desc = page_desc_list->spt_page_list_head;
  829. while (page_desc) {
  830. page_desc->avail_entry_index = 0;
  831. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  832. page_desc = page_desc->next;
  833. }
  834. /* free pages desc back to pool */
  835. dp_cc_spt_page_desc_free(be_soc,
  836. &page_desc_list->spt_page_list_head,
  837. &page_desc_list->spt_page_list_tail,
  838. page_desc_list->num_spt_pages);
  839. page_desc_list->num_spt_pages = 0;
  840. }
  841. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  842. struct rx_desc_pool *rx_desc_pool,
  843. uint32_t pool_id)
  844. {
  845. QDF_STATUS status = QDF_STATUS_SUCCESS;
  846. /* Only regular RX buffer desc pool use HW cookie conversion */
  847. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  848. dp_info("rx_desc_buf pool init");
  849. status = dp_rx_desc_pool_init_be_cc(soc,
  850. rx_desc_pool,
  851. pool_id);
  852. } else {
  853. dp_info("non_rx_desc_buf_pool init");
  854. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
  855. }
  856. return status;
  857. }
  858. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  859. struct rx_desc_pool *rx_desc_pool,
  860. uint32_t pool_id)
  861. {
  862. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  863. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  864. }
  865. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  866. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  867. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  868. void *ring_desc,
  869. struct dp_rx_desc **r_rx_desc)
  870. {
  871. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  872. /* HW cookie conversion done */
  873. *r_rx_desc = (struct dp_rx_desc *)
  874. hal_rx_wbm_get_desc_va(ring_desc);
  875. } else {
  876. /* SW do cookie conversion */
  877. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  878. *r_rx_desc = (struct dp_rx_desc *)
  879. dp_cc_desc_find(soc, cookie);
  880. }
  881. return QDF_STATUS_SUCCESS;
  882. }
  883. #else
  884. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  885. void *ring_desc,
  886. struct dp_rx_desc **r_rx_desc)
  887. {
  888. *r_rx_desc = (struct dp_rx_desc *)
  889. hal_rx_wbm_get_desc_va(ring_desc);
  890. return QDF_STATUS_SUCCESS;
  891. }
  892. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  893. #else
  894. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  895. void *ring_desc,
  896. struct dp_rx_desc **r_rx_desc)
  897. {
  898. /* SW do cookie conversion */
  899. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  900. *r_rx_desc = (struct dp_rx_desc *)
  901. dp_cc_desc_find(soc, cookie);
  902. return QDF_STATUS_SUCCESS;
  903. }
  904. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  905. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  906. uint32_t cookie)
  907. {
  908. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  909. }
  910. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  911. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  912. hal_ring_handle_t hal_ring_hdl,
  913. uint8_t reo_ring_num,
  914. uint32_t quota)
  915. {
  916. struct dp_soc *soc = int_ctx->soc;
  917. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  918. uint32_t work_done = 0;
  919. if (dp_srng_get_near_full_level(soc, rx_ring) <
  920. DP_SRNG_THRESH_NEAR_FULL)
  921. return 0;
  922. qdf_atomic_set(&rx_ring->near_full, 1);
  923. work_done++;
  924. return work_done;
  925. }
  926. #endif
  927. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  928. #ifdef INTRA_BSS_FW_OFFLOAD
  929. static bool
  930. dp_rx_intrabss_ucast_check_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  931. struct dp_peer *ta_peer,
  932. struct hal_rx_msdu_metadata *msdu_metadata)
  933. {
  934. return qdf_nbuf_is_intra_bss(nbuf);
  935. }
  936. #else
  937. static bool
  938. dp_rx_intrabss_ucast_check_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  939. struct dp_peer *ta_peer,
  940. struct hal_rx_msdu_metadata *msdu_metadata)
  941. {
  942. uint16_t da_peer_id;
  943. struct dp_peer *da_peer;
  944. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  945. return false;
  946. /* The field da_idx here holds DA peer id
  947. */
  948. da_peer_id = msdu_metadata->da_idx;
  949. /* TA peer cannot be same as peer(DA) on which AST is present
  950. * this indicates a change in topology and that AST entries
  951. * are yet to be updated.
  952. */
  953. if ((da_peer_id == ta_peer->peer_id) ||
  954. (da_peer_id == HTT_INVALID_PEER))
  955. return false;
  956. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  957. DP_MOD_ID_RX);
  958. if (!da_peer)
  959. return false;
  960. /* If the source or destination peer in the isolation
  961. * list then dont forward instead push to bridge stack.
  962. */
  963. if (dp_get_peer_isolation(ta_peer) ||
  964. dp_get_peer_isolation(da_peer) ||
  965. (da_peer->vdev->vdev_id != ta_peer->vdev->vdev_id)) {
  966. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  967. return false;
  968. }
  969. if (da_peer->bss_peer) {
  970. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  971. return false;
  972. }
  973. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  974. return true;
  975. }
  976. #endif
  977. /*
  978. * dp_rx_intrabss_fwd_be() - API for intrabss fwd. For EAPOL
  979. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  980. * @soc: core txrx main context
  981. * @ta_peer: source peer entry
  982. * @rx_tlv_hdr: start address of rx tlvs
  983. * @nbuf: nbuf that has to be intrabss forwarded
  984. * @msdu_metadata: msdu metadata
  985. *
  986. * Return: true if it is forwarded else false
  987. */
  988. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_peer *ta_peer,
  989. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  990. struct hal_rx_msdu_metadata msdu_metadata)
  991. {
  992. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  993. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  994. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  995. tid_stats.tid_rx_stats[ring_id][tid];
  996. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  997. * source, then clone the pkt and send the cloned pkt for
  998. * intra BSS forwarding and original pkt up the network stack
  999. * Note: how do we handle multicast pkts. do we forward
  1000. * all multicast pkts as is or let a higher layer module
  1001. * like igmpsnoop decide whether to forward or not with
  1002. * Mcast enhancement.
  1003. */
  1004. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer)
  1005. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1006. nbuf, tid_stats);
  1007. if (dp_rx_intrabss_ucast_check_be(soc, nbuf, ta_peer, &msdu_metadata))
  1008. return dp_rx_intrabss_ucast_fwd(soc, ta_peer, rx_tlv_hdr,
  1009. nbuf, tid_stats);
  1010. return false;
  1011. }
  1012. #endif