dp_rx.h 42 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifdef NO_RX_PKT_HDR_TLV
  26. #define RX_BUFFER_ALIGNMENT 0
  27. #else
  28. #define RX_BUFFER_ALIGNMENT 128
  29. #endif /* NO_RX_PKT_HDR_TLV */
  30. #else /* RXDMA_OPTIMIZATION */
  31. #define RX_BUFFER_ALIGNMENT 4
  32. #endif /* RXDMA_OPTIMIZATION */
  33. #ifdef QCA_HOST2FW_RXBUF_RING
  34. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  35. /**
  36. * For MCL cases, allocate as many RX descriptors as buffers in the SW2RXDMA
  37. * ring. This value may need to be tuned later.
  38. */
  39. #define DP_RX_DESC_ALLOC_MULTIPLIER 1
  40. #else
  41. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  42. /**
  43. * AP use cases need to allocate more RX Descriptors than the number of
  44. * entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
  45. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  46. * multiplication factor of 3, to allocate three times as many RX descriptors
  47. * as RX buffers.
  48. */
  49. #define DP_RX_DESC_ALLOC_MULTIPLIER 3
  50. #endif /* QCA_HOST2FW_RXBUF_RING */
  51. #define RX_BUFFER_RESERVATION 0
  52. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  53. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  54. #define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
  55. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  56. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  57. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  58. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  59. #define DP_PEER_METADATA_ID_GET(_peer_metadata) \
  60. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  61. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  62. #define DP_RX_DESC_MAGIC 0xdec0de
  63. /**
  64. * struct dp_rx_desc
  65. *
  66. * @nbuf : VA of the "skb" posted
  67. * @rx_buf_start : VA of the original Rx buffer, before
  68. * movement of any skb->data pointer
  69. * @cookie : index into the sw array which holds
  70. * the sw Rx descriptors
  71. * Cookie space is 21 bits:
  72. * lower 18 bits -- index
  73. * upper 3 bits -- pool_id
  74. * @pool_id : pool Id for which this allocated.
  75. * Can only be used if there is no flow
  76. * steering
  77. * @in_use rx_desc is in use
  78. * @unmapped used to mark rx_desc an unmapped if the corresponding
  79. * nbuf is already unmapped
  80. */
  81. struct dp_rx_desc {
  82. qdf_nbuf_t nbuf;
  83. uint8_t *rx_buf_start;
  84. uint32_t cookie;
  85. uint8_t pool_id;
  86. #ifdef RX_DESC_DEBUG_CHECK
  87. uint32_t magic;
  88. #endif
  89. uint8_t in_use:1,
  90. unmapped:1;
  91. };
  92. /* RX Descriptor Multi Page memory alloc related */
  93. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  94. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  95. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  96. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  97. #define DP_RX_DESC_POOL_ID_SHIFT \
  98. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  99. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  100. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  101. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  102. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  103. DP_RX_DESC_PAGE_ID_SHIFT)
  104. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  105. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  106. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  107. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  108. DP_RX_DESC_POOL_ID_SHIFT)
  109. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  110. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  111. DP_RX_DESC_PAGE_ID_SHIFT)
  112. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  113. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  114. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  115. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  116. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  117. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  118. #define DP_RX_DESC_COOKIE_MAX \
  119. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  120. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  121. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  122. RX_DESC_COOKIE_POOL_ID_SHIFT)
  123. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  124. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  125. RX_DESC_COOKIE_INDEX_SHIFT)
  126. /* DOC: Offset to obtain LLC hdr
  127. *
  128. * In the case of Wifi parse error
  129. * to reach LLC header from beginning
  130. * of VLAN tag we need to skip 8 bytes.
  131. * Vlan_tag(4)+length(2)+length added
  132. * by HW(2) = 8 bytes.
  133. */
  134. #define DP_SKIP_VLAN 8
  135. /**
  136. * struct dp_rx_cached_buf - rx cached buffer
  137. * @list: linked list node
  138. * @buf: skb buffer
  139. */
  140. struct dp_rx_cached_buf {
  141. qdf_list_node_t node;
  142. qdf_nbuf_t buf;
  143. };
  144. /*
  145. *dp_rx_xor_block() - xor block of data
  146. *@b: destination data block
  147. *@a: source data block
  148. *@len: length of the data to process
  149. *
  150. *Returns: None
  151. */
  152. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  153. {
  154. qdf_size_t i;
  155. for (i = 0; i < len; i++)
  156. b[i] ^= a[i];
  157. }
  158. /*
  159. *dp_rx_rotl() - rotate the bits left
  160. *@val: unsigned integer input value
  161. *@bits: number of bits
  162. *
  163. *Returns: Integer with left rotated by number of 'bits'
  164. */
  165. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  166. {
  167. return (val << bits) | (val >> (32 - bits));
  168. }
  169. /*
  170. *dp_rx_rotr() - rotate the bits right
  171. *@val: unsigned integer input value
  172. *@bits: number of bits
  173. *
  174. *Returns: Integer with right rotated by number of 'bits'
  175. */
  176. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  177. {
  178. return (val >> bits) | (val << (32 - bits));
  179. }
  180. /*
  181. * dp_set_rx_queue() - set queue_mapping in skb
  182. * @nbuf: skb
  183. * @queue_id: rx queue_id
  184. *
  185. * Return: void
  186. */
  187. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  188. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  189. {
  190. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  191. return;
  192. }
  193. #else
  194. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  195. {
  196. }
  197. #endif
  198. /*
  199. *dp_rx_xswap() - swap the bits left
  200. *@val: unsigned integer input value
  201. *
  202. *Returns: Integer with bits swapped
  203. */
  204. static inline uint32_t dp_rx_xswap(uint32_t val)
  205. {
  206. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  207. }
  208. /*
  209. *dp_rx_get_le32_split() - get little endian 32 bits split
  210. *@b0: byte 0
  211. *@b1: byte 1
  212. *@b2: byte 2
  213. *@b3: byte 3
  214. *
  215. *Returns: Integer with split little endian 32 bits
  216. */
  217. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  218. uint8_t b3)
  219. {
  220. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  221. }
  222. /*
  223. *dp_rx_get_le32() - get little endian 32 bits
  224. *@b0: byte 0
  225. *@b1: byte 1
  226. *@b2: byte 2
  227. *@b3: byte 3
  228. *
  229. *Returns: Integer with little endian 32 bits
  230. */
  231. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  232. {
  233. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  234. }
  235. /*
  236. * dp_rx_put_le32() - put little endian 32 bits
  237. * @p: destination char array
  238. * @v: source 32-bit integer
  239. *
  240. * Returns: None
  241. */
  242. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  243. {
  244. p[0] = (v) & 0xff;
  245. p[1] = (v >> 8) & 0xff;
  246. p[2] = (v >> 16) & 0xff;
  247. p[3] = (v >> 24) & 0xff;
  248. }
  249. /* Extract michal mic block of data */
  250. #define dp_rx_michael_block(l, r) \
  251. do { \
  252. r ^= dp_rx_rotl(l, 17); \
  253. l += r; \
  254. r ^= dp_rx_xswap(l); \
  255. l += r; \
  256. r ^= dp_rx_rotl(l, 3); \
  257. l += r; \
  258. r ^= dp_rx_rotr(l, 2); \
  259. l += r; \
  260. } while (0)
  261. /**
  262. * struct dp_rx_desc_list_elem_t
  263. *
  264. * @next : Next pointer to form free list
  265. * @rx_desc : DP Rx descriptor
  266. */
  267. union dp_rx_desc_list_elem_t {
  268. union dp_rx_desc_list_elem_t *next;
  269. struct dp_rx_desc rx_desc;
  270. };
  271. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  272. /**
  273. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  274. * @page_id: Page ID
  275. * @offset: Offset of the descriptor element
  276. *
  277. * Return: RX descriptor element
  278. */
  279. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  280. struct rx_desc_pool *rx_pool);
  281. static inline
  282. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  283. struct rx_desc_pool *pool,
  284. uint32_t cookie)
  285. {
  286. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  287. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  288. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  289. struct rx_desc_pool *rx_desc_pool;
  290. union dp_rx_desc_list_elem_t *rx_desc_elem;
  291. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  292. return NULL;
  293. rx_desc_pool = &pool[pool_id];
  294. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  295. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  296. rx_desc_pool->elem_size * offset);
  297. return &rx_desc_elem->rx_desc;
  298. }
  299. /**
  300. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  301. * the Rx descriptor on Rx DMA source ring buffer
  302. * @soc: core txrx main context
  303. * @cookie: cookie used to lookup virtual address
  304. *
  305. * Return: Pointer to the Rx descriptor
  306. */
  307. static inline
  308. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  309. uint32_t cookie)
  310. {
  311. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  312. }
  313. /**
  314. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  315. * the Rx descriptor on monitor ring buffer
  316. * @soc: core txrx main context
  317. * @cookie: cookie used to lookup virtual address
  318. *
  319. * Return: Pointer to the Rx descriptor
  320. */
  321. static inline
  322. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  323. uint32_t cookie)
  324. {
  325. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  326. }
  327. /**
  328. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  329. * the Rx descriptor on monitor status ring buffer
  330. * @soc: core txrx main context
  331. * @cookie: cookie used to lookup virtual address
  332. *
  333. * Return: Pointer to the Rx descriptor
  334. */
  335. static inline
  336. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  337. uint32_t cookie)
  338. {
  339. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  340. }
  341. #else
  342. /**
  343. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  344. * the Rx descriptor on Rx DMA source ring buffer
  345. * @soc: core txrx main context
  346. * @cookie: cookie used to lookup virtual address
  347. *
  348. * Return: void *: Virtual Address of the Rx descriptor
  349. */
  350. static inline
  351. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  352. {
  353. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  354. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  355. struct rx_desc_pool *rx_desc_pool;
  356. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  357. return NULL;
  358. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  359. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  360. return NULL;
  361. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  362. }
  363. /**
  364. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  365. * the Rx descriptor on monitor ring buffer
  366. * @soc: core txrx main context
  367. * @cookie: cookie used to lookup virtual address
  368. *
  369. * Return: void *: Virtual Address of the Rx descriptor
  370. */
  371. static inline
  372. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  373. {
  374. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  375. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  376. /* TODO */
  377. /* Add sanity for pool_id & index */
  378. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  379. }
  380. /**
  381. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  382. * the Rx descriptor on monitor status ring buffer
  383. * @soc: core txrx main context
  384. * @cookie: cookie used to lookup virtual address
  385. *
  386. * Return: void *: Virtual Address of the Rx descriptor
  387. */
  388. static inline
  389. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  390. {
  391. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  392. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  393. /* TODO */
  394. /* Add sanity for pool_id & index */
  395. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  396. }
  397. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  398. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  399. union dp_rx_desc_list_elem_t **local_desc_list,
  400. union dp_rx_desc_list_elem_t **tail,
  401. uint16_t pool_id,
  402. struct rx_desc_pool *rx_desc_pool);
  403. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  404. struct rx_desc_pool *rx_desc_pool,
  405. uint16_t num_descs,
  406. union dp_rx_desc_list_elem_t **desc_list,
  407. union dp_rx_desc_list_elem_t **tail);
  408. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  409. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  410. uint32_t
  411. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint8_t reo_ring_num,
  412. uint32_t quota);
  413. uint32_t dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  414. uint32_t
  415. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  416. /**
  417. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  418. * multiple nbufs.
  419. * @nbuf: pointer to the first msdu of an amsdu.
  420. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  421. *
  422. * This function implements the creation of RX frag_list for cases
  423. * where an MSDU is spread across multiple nbufs.
  424. *
  425. * Return: returns the head nbuf which contains complete frag_list.
  426. */
  427. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  428. /*
  429. * dp_rx_desc_pool_alloc() - create a pool of software rx_descs
  430. * at the time of dp rx initialization
  431. *
  432. * @soc: core txrx main context
  433. * @pool_id: pool_id which is one of 3 mac_ids
  434. * @pool_size: number of Rx descriptor in the pool
  435. * @rx_desc_pool: rx descriptor pool pointer
  436. *
  437. * Return: QDF status
  438. */
  439. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc, uint32_t pool_id,
  440. uint32_t pool_size, struct rx_desc_pool *pool);
  441. /*
  442. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  443. * de-initialization of wifi module.
  444. *
  445. * @soc: core txrx main context
  446. * @pool_id: pool_id which is one of 3 mac_ids
  447. * @rx_desc_pool: rx descriptor pool pointer
  448. *
  449. * Return: None
  450. */
  451. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  452. struct rx_desc_pool *rx_desc_pool);
  453. /*
  454. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  455. * de-initialization of wifi module.
  456. *
  457. * @soc: core txrx main context
  458. * @pool_id: pool_id which is one of 3 mac_ids
  459. * @rx_desc_pool: rx descriptor pool pointer
  460. *
  461. * Return: None
  462. */
  463. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  464. struct rx_desc_pool *rx_desc_pool);
  465. /*
  466. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  467. * de-initialization of wifi module.
  468. *
  469. * @soc: core txrx main context
  470. * @rx_desc_pool: rx descriptor pool pointer
  471. *
  472. * Return: None
  473. */
  474. void dp_rx_desc_pool_free(struct dp_soc *soc,
  475. struct rx_desc_pool *rx_desc_pool);
  476. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  477. struct dp_peer *peer);
  478. /**
  479. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  480. *
  481. * @head: pointer to the head of local free list
  482. * @tail: pointer to the tail of local free list
  483. * @new: new descriptor that is added to the free list
  484. *
  485. * Return: void:
  486. */
  487. static inline
  488. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  489. union dp_rx_desc_list_elem_t **tail,
  490. struct dp_rx_desc *new)
  491. {
  492. qdf_assert(head && new);
  493. new->nbuf = NULL;
  494. new->in_use = 0;
  495. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  496. *head = (union dp_rx_desc_list_elem_t *)new;
  497. if (!*tail)
  498. *tail = *head;
  499. }
  500. /**
  501. * dp_rx_wds_add_or_update_ast() - Add or update the ast entry.
  502. *
  503. * @soc: core txrx main context
  504. * @ta_peer: WDS repeater peer
  505. * @mac_addr: mac address of the peer
  506. * @is_ad4_valid: 4-address valid flag
  507. * @is_sa_valid: source address valid flag
  508. * @is_chfrag_start: frag start flag
  509. * @sa_idx: source-address index for peer
  510. * @sa_sw_peer_id: software source-address peer-id
  511. *
  512. * Return: void:
  513. */
  514. #ifdef FEATURE_WDS
  515. static inline void
  516. dp_rx_wds_add_or_update_ast(struct dp_soc *soc, struct dp_peer *ta_peer,
  517. qdf_nbuf_t nbuf, uint8_t is_ad4_valid,
  518. uint8_t is_sa_valid, uint8_t is_chfrag_start,
  519. uint16_t sa_idx, uint16_t sa_sw_peer_id)
  520. {
  521. struct dp_peer *sa_peer;
  522. struct dp_ast_entry *ast;
  523. uint32_t flags = IEEE80211_NODE_F_WDS_HM;
  524. uint32_t ret = 0;
  525. struct dp_neighbour_peer *neighbour_peer = NULL;
  526. struct dp_pdev *pdev = ta_peer->vdev->pdev;
  527. uint8_t wds_src_mac[QDF_MAC_ADDR_SIZE];
  528. /* For AP mode : Do wds source port learning only if it is a
  529. * 4-address mpdu
  530. *
  531. * For STA mode : Frames from RootAP backend will be in 3-address mode,
  532. * till RootAP does the WDS source port learning; Hence in repeater/STA
  533. * mode, we enable learning even in 3-address mode , to avoid RootAP
  534. * backbone getting wrongly learnt as MEC on repeater
  535. */
  536. if (ta_peer->vdev->opmode != wlan_op_mode_sta) {
  537. if (!(is_chfrag_start && is_ad4_valid))
  538. return;
  539. } else {
  540. /* For HKv2 Source port learing is not needed in STA mode
  541. * as we have support in HW
  542. */
  543. if (soc->ast_override_support)
  544. return;
  545. }
  546. if (qdf_unlikely(!is_sa_valid)) {
  547. qdf_mem_copy(wds_src_mac,
  548. (qdf_nbuf_data(nbuf) + QDF_MAC_ADDR_SIZE),
  549. QDF_MAC_ADDR_SIZE);
  550. ret = dp_peer_add_ast(soc,
  551. ta_peer,
  552. wds_src_mac,
  553. CDP_TXRX_AST_TYPE_WDS,
  554. flags);
  555. return;
  556. }
  557. qdf_spin_lock_bh(&soc->ast_lock);
  558. ast = soc->ast_table[sa_idx];
  559. qdf_spin_unlock_bh(&soc->ast_lock);
  560. if (!ast) {
  561. /*
  562. * In HKv1, it is possible that HW retains the AST entry in
  563. * GSE cache on 1 radio , even after the AST entry is deleted
  564. * (on another radio).
  565. *
  566. * Due to this, host might still get sa_is_valid indications
  567. * for frames with SA not really present in AST table.
  568. *
  569. * So we go ahead and send an add_ast command to FW in such
  570. * cases where sa is reported still as valid, so that FW will
  571. * invalidate this GSE cache entry and new AST entry gets
  572. * cached.
  573. */
  574. if (!soc->ast_override_support) {
  575. qdf_mem_copy(wds_src_mac,
  576. (qdf_nbuf_data(nbuf) + QDF_MAC_ADDR_SIZE),
  577. QDF_MAC_ADDR_SIZE);
  578. ret = dp_peer_add_ast(soc,
  579. ta_peer,
  580. wds_src_mac,
  581. CDP_TXRX_AST_TYPE_WDS,
  582. flags);
  583. return;
  584. } else {
  585. /* In HKv2 smart monitor case, when NAC client is
  586. * added first and this client roams within BSS to
  587. * connect to RE, since we have an AST entry for
  588. * NAC we get sa_is_valid bit set. So we check if
  589. * smart monitor is enabled and send add_ast command
  590. * to FW.
  591. */
  592. if (pdev->neighbour_peers_added) {
  593. qdf_mem_copy(wds_src_mac,
  594. (qdf_nbuf_data(nbuf) +
  595. QDF_MAC_ADDR_SIZE),
  596. QDF_MAC_ADDR_SIZE);
  597. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  598. TAILQ_FOREACH(neighbour_peer,
  599. &pdev->neighbour_peers_list,
  600. neighbour_peer_list_elem) {
  601. if (!qdf_mem_cmp(&neighbour_peer->neighbour_peers_macaddr,
  602. wds_src_mac,
  603. QDF_MAC_ADDR_SIZE)) {
  604. ret = dp_peer_add_ast(soc,
  605. ta_peer,
  606. wds_src_mac,
  607. CDP_TXRX_AST_TYPE_WDS,
  608. flags);
  609. QDF_TRACE(QDF_MODULE_ID_DP,
  610. QDF_TRACE_LEVEL_INFO,
  611. "sa valid and nac roamed to wds");
  612. break;
  613. }
  614. }
  615. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  616. }
  617. return;
  618. }
  619. }
  620. if ((ast->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  621. (ast->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  622. return;
  623. /*
  624. * Ensure we are updating the right AST entry by
  625. * validating ast_idx.
  626. * There is a possibility we might arrive here without
  627. * AST MAP event , so this check is mandatory
  628. */
  629. if (ast->is_mapped && (ast->ast_idx == sa_idx))
  630. ast->is_active = TRUE;
  631. if (sa_sw_peer_id != ta_peer->peer_ids[0]) {
  632. sa_peer = ast->peer;
  633. if ((ast->type != CDP_TXRX_AST_TYPE_STATIC) &&
  634. (ast->type != CDP_TXRX_AST_TYPE_SELF) &&
  635. (ast->type != CDP_TXRX_AST_TYPE_STA_BSS)) {
  636. if (ast->pdev_id != ta_peer->vdev->pdev->pdev_id) {
  637. /* This case is when a STA roams from one
  638. * repeater to another repeater, but these
  639. * repeaters are connected to root AP on
  640. * different radios.
  641. * Ex: rptr1 connected to ROOT AP over 5G
  642. * and rptr2 connected to ROOT AP over 2G
  643. * radio
  644. */
  645. qdf_spin_lock_bh(&soc->ast_lock);
  646. dp_peer_del_ast(soc, ast);
  647. qdf_spin_unlock_bh(&soc->ast_lock);
  648. } else {
  649. /* this case is when a STA roams from one
  650. * reapter to another repeater, but inside
  651. * same radio.
  652. */
  653. qdf_spin_lock_bh(&soc->ast_lock);
  654. dp_peer_update_ast(soc, ta_peer, ast, flags);
  655. qdf_spin_unlock_bh(&soc->ast_lock);
  656. return;
  657. }
  658. }
  659. /*
  660. * Do not kickout STA if it belongs to a different radio.
  661. * For DBDC repeater, it is possible to arrive here
  662. * for multicast loopback frames originated from connected
  663. * clients and looped back (intrabss) by Root AP
  664. */
  665. if (ast->pdev_id != ta_peer->vdev->pdev->pdev_id) {
  666. return;
  667. }
  668. /*
  669. * Kickout, when direct associated peer(SA) roams
  670. * to another AP and reachable via TA peer
  671. */
  672. if ((sa_peer->vdev->opmode == wlan_op_mode_ap) &&
  673. !sa_peer->delete_in_progress) {
  674. sa_peer->delete_in_progress = true;
  675. if (soc->cdp_soc.ol_ops->peer_sta_kickout) {
  676. soc->cdp_soc.ol_ops->peer_sta_kickout(
  677. sa_peer->vdev->pdev->ctrl_pdev,
  678. wds_src_mac);
  679. }
  680. }
  681. }
  682. }
  683. /**
  684. * dp_rx_wds_srcport_learn() - Add or update the STA PEER which
  685. * is behind the WDS repeater.
  686. *
  687. * @soc: core txrx main context
  688. * @rx_tlv_hdr: base address of RX TLV header
  689. * @ta_peer: WDS repeater peer
  690. * @nbuf: rx pkt
  691. *
  692. * Return: void:
  693. */
  694. static inline void
  695. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  696. uint8_t *rx_tlv_hdr,
  697. struct dp_peer *ta_peer,
  698. qdf_nbuf_t nbuf)
  699. {
  700. uint16_t sa_sw_peer_id = hal_rx_msdu_end_sa_sw_peer_id_get(rx_tlv_hdr);
  701. uint8_t sa_is_valid = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  702. uint16_t sa_idx;
  703. uint8_t is_chfrag_start = 0;
  704. uint8_t is_ad4_valid = 0;
  705. if (qdf_unlikely(!ta_peer))
  706. return;
  707. is_chfrag_start = qdf_nbuf_is_rx_chfrag_start(nbuf);
  708. if (is_chfrag_start)
  709. is_ad4_valid = hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr);
  710. /*
  711. * Get the AST entry from HW SA index and mark it as active
  712. */
  713. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  714. dp_rx_wds_add_or_update_ast(soc, ta_peer, nbuf, is_ad4_valid,
  715. sa_is_valid, is_chfrag_start,
  716. sa_idx, sa_sw_peer_id);
  717. return;
  718. }
  719. #else
  720. static inline void
  721. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  722. uint8_t *rx_tlv_hdr,
  723. struct dp_peer *ta_peer,
  724. qdf_nbuf_t nbuf)
  725. {
  726. }
  727. #endif
  728. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  729. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  730. qdf_nbuf_t mpdu, bool mpdu_done);
  731. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  732. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  733. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  734. uint16_t peer_id, uint8_t tid);
  735. #define DP_RX_LIST_APPEND(head, tail, elem) \
  736. do { \
  737. if (!(head)) { \
  738. (head) = (elem); \
  739. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  740. } else { \
  741. qdf_nbuf_set_next((tail), (elem)); \
  742. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  743. } \
  744. (tail) = (elem); \
  745. qdf_nbuf_set_next((tail), NULL); \
  746. } while (0)
  747. #ifndef BUILD_X86
  748. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  749. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  750. {
  751. return QDF_STATUS_SUCCESS;
  752. }
  753. #else
  754. #define MAX_RETRY 100
  755. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  756. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  757. {
  758. uint32_t nbuf_retry = 0;
  759. int32_t ret;
  760. const uint32_t x86_phy_addr = 0x50000000;
  761. /*
  762. * in M2M emulation platforms (x86) the memory below 0x50000000
  763. * is reserved for target use, so any memory allocated in this
  764. * region should not be used by host
  765. */
  766. do {
  767. if (qdf_likely(*paddr > x86_phy_addr))
  768. return QDF_STATUS_SUCCESS;
  769. else {
  770. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  771. "phy addr %pK exceeded 0x50000000 trying again",
  772. paddr);
  773. nbuf_retry++;
  774. if ((*rx_netbuf)) {
  775. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  776. QDF_DMA_FROM_DEVICE);
  777. /* Not freeing buffer intentionally.
  778. * Observed that same buffer is getting
  779. * re-allocated resulting in longer load time
  780. * WMI init timeout.
  781. * This buffer is anyway not useful so skip it.
  782. **/
  783. }
  784. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  785. RX_BUFFER_SIZE,
  786. RX_BUFFER_RESERVATION,
  787. RX_BUFFER_ALIGNMENT,
  788. FALSE);
  789. if (qdf_unlikely(!(*rx_netbuf)))
  790. return QDF_STATUS_E_FAILURE;
  791. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  792. QDF_DMA_FROM_DEVICE);
  793. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  794. qdf_nbuf_free(*rx_netbuf);
  795. *rx_netbuf = NULL;
  796. continue;
  797. }
  798. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  799. }
  800. } while (nbuf_retry < MAX_RETRY);
  801. if ((*rx_netbuf)) {
  802. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  803. QDF_DMA_FROM_DEVICE);
  804. qdf_nbuf_free(*rx_netbuf);
  805. }
  806. return QDF_STATUS_E_FAILURE;
  807. }
  808. #endif
  809. /**
  810. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  811. * the MSDU Link Descriptor
  812. * @soc: core txrx main context
  813. * @buf_info: buf_info include cookie that used to lookup virtual address of
  814. * link descriptor Normally this is just an index into a per SOC array.
  815. *
  816. * This is the VA of the link descriptor, that HAL layer later uses to
  817. * retrieve the list of MSDU's for a given MPDU.
  818. *
  819. * Return: void *: Virtual Address of the Rx descriptor
  820. */
  821. static inline
  822. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  823. struct hal_buf_info *buf_info)
  824. {
  825. void *link_desc_va;
  826. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  827. /* TODO */
  828. /* Add sanity for cookie */
  829. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  830. (buf_info->paddr -
  831. soc->link_desc_banks[bank_id].base_paddr);
  832. return link_desc_va;
  833. }
  834. /**
  835. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  836. * the MSDU Link Descriptor
  837. * @pdev: core txrx pdev context
  838. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  839. * link descriptor. Normally this is just an index into a per pdev array.
  840. *
  841. * This is the VA of the link descriptor in monitor mode destination ring,
  842. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  843. *
  844. * Return: void *: Virtual Address of the Rx descriptor
  845. */
  846. static inline
  847. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  848. struct hal_buf_info *buf_info,
  849. int mac_id)
  850. {
  851. void *link_desc_va;
  852. int mac_for_pdev = dp_get_mac_id_for_mac(pdev->soc, mac_id);
  853. /* TODO */
  854. /* Add sanity for cookie */
  855. link_desc_va =
  856. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_vaddr +
  857. (buf_info->paddr -
  858. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_paddr);
  859. return link_desc_va;
  860. }
  861. /**
  862. * dp_rx_defrag_concat() - Concatenate the fragments
  863. *
  864. * @dst: destination pointer to the buffer
  865. * @src: source pointer from where the fragment payload is to be copied
  866. *
  867. * Return: QDF_STATUS
  868. */
  869. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  870. {
  871. /*
  872. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  873. * to provide space for src, the headroom portion is copied from
  874. * the original dst buffer to the larger new dst buffer.
  875. * (This is needed, because the headroom of the dst buffer
  876. * contains the rx desc.)
  877. */
  878. if (!qdf_nbuf_cat(dst, src)) {
  879. /*
  880. * qdf_nbuf_cat does not free the src memory.
  881. * Free src nbuf before returning
  882. * For failure case the caller takes of freeing the nbuf
  883. */
  884. qdf_nbuf_free(src);
  885. return QDF_STATUS_SUCCESS;
  886. }
  887. return QDF_STATUS_E_DEFRAG_ERROR;
  888. }
  889. /*
  890. * dp_rx_ast_set_active() - set the active flag of the astentry
  891. * corresponding to a hw index.
  892. * @soc: core txrx main context
  893. * @sa_idx: hw idx
  894. * @is_active: active flag
  895. *
  896. */
  897. #ifdef FEATURE_WDS
  898. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  899. {
  900. struct dp_ast_entry *ast;
  901. qdf_spin_lock_bh(&soc->ast_lock);
  902. ast = soc->ast_table[sa_idx];
  903. /*
  904. * Ensure we are updating the right AST entry by
  905. * validating ast_idx.
  906. * There is a possibility we might arrive here without
  907. * AST MAP event , so this check is mandatory
  908. */
  909. if (ast && ast->is_mapped && (ast->ast_idx == sa_idx)) {
  910. ast->is_active = is_active;
  911. qdf_spin_unlock_bh(&soc->ast_lock);
  912. return QDF_STATUS_SUCCESS;
  913. }
  914. qdf_spin_unlock_bh(&soc->ast_lock);
  915. return QDF_STATUS_E_FAILURE;
  916. }
  917. #else
  918. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  919. {
  920. return QDF_STATUS_SUCCESS;
  921. }
  922. #endif
  923. /*
  924. * dp_rx_desc_dump() - dump the sw rx descriptor
  925. *
  926. * @rx_desc: sw rx descriptor
  927. */
  928. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  929. {
  930. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_FATAL,
  931. "rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  932. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  933. rx_desc->in_use, rx_desc->unmapped);
  934. }
  935. /*
  936. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  937. * In qwrap mode, packets originated from
  938. * any vdev should not loopback and
  939. * should be dropped.
  940. * @vdev: vdev on which rx packet is received
  941. * @nbuf: rx pkt
  942. *
  943. */
  944. #if ATH_SUPPORT_WRAP
  945. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  946. qdf_nbuf_t nbuf)
  947. {
  948. struct dp_vdev *psta_vdev;
  949. struct dp_pdev *pdev = vdev->pdev;
  950. uint8_t *data = qdf_nbuf_data(nbuf);
  951. if (qdf_unlikely(vdev->proxysta_vdev)) {
  952. /* In qwrap isolation mode, allow loopback packets as all
  953. * packets go to RootAP and Loopback on the mpsta.
  954. */
  955. if (vdev->isolation_vdev)
  956. return false;
  957. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  958. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  959. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  960. &data[QDF_MAC_ADDR_SIZE],
  961. QDF_MAC_ADDR_SIZE))) {
  962. /* Drop packet if source address is equal to
  963. * any of the vdev addresses.
  964. */
  965. return true;
  966. }
  967. }
  968. }
  969. return false;
  970. }
  971. #else
  972. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  973. qdf_nbuf_t nbuf)
  974. {
  975. return false;
  976. }
  977. #endif
  978. #if defined(WLAN_SUPPORT_RX_TAG_STATISTICS) && \
  979. defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG)
  980. /**
  981. * dp_rx_update_rx_protocol_tag_stats() - Increments the protocol tag stats
  982. * for the given protocol type
  983. * @soc: core txrx main context
  984. * @pdev: TXRX pdev context for which stats should be incremented
  985. * @protocol_index: Protocol index for which the stats should be incremented
  986. * @ring_index: REO ring number from which this tag was received.
  987. *
  988. * Since HKv2 is a SMP, two or more cores may simultaneously receive packets
  989. * of same type, and hence attempt to increment counters for the same protocol
  990. * type at the same time. This creates the possibility of missing stats.
  991. *
  992. * For example, when two or more CPUs have each read the old tag value, V,
  993. * for protocol type, P and each increment the value to V+1. Instead, the
  994. * operations should have been sequenced to achieve a final value of V+2.
  995. *
  996. * In order to avoid this scenario, we can either use locks or store stats
  997. * on a per-CPU basis. Since tagging happens in the core data path, locks
  998. * are not preferred. Instead, we use a per-ring counter, since each CPU
  999. * operates on a REO ring.
  1000. *
  1001. * Return: void
  1002. */
  1003. static inline void dp_rx_update_rx_protocol_tag_stats(struct dp_pdev *pdev,
  1004. uint16_t protocol_index,
  1005. uint16_t ring_index)
  1006. {
  1007. if (ring_index >= MAX_REO_DEST_RINGS)
  1008. return;
  1009. pdev->reo_proto_tag_stats[ring_index][protocol_index].tag_ctr++;
  1010. }
  1011. #else
  1012. static inline void dp_rx_update_rx_protocol_tag_stats(struct dp_pdev *pdev,
  1013. uint16_t protocol_index,
  1014. uint16_t ring_index)
  1015. {
  1016. }
  1017. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  1018. #if defined(WLAN_SUPPORT_RX_TAG_STATISTICS) && \
  1019. defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG)
  1020. /**
  1021. * dp_rx_update_rx_err_protocol_tag_stats() - Increments the protocol tag stats
  1022. * for the given protocol type
  1023. * received from exception ring
  1024. * @soc: core txrx main context
  1025. * @pdev: TXRX pdev context for which stats should be incremented
  1026. * @protocol_index: Protocol index for which the stats should be incremented
  1027. *
  1028. * In HKv2, all exception packets are received on Ring-0 (along with normal
  1029. * Rx). Hence tags are maintained separately for exception ring as well.
  1030. *
  1031. * Return: void
  1032. */
  1033. static inline
  1034. void dp_rx_update_rx_err_protocol_tag_stats(struct dp_pdev *pdev,
  1035. uint16_t protocol_index)
  1036. {
  1037. pdev->rx_err_proto_tag_stats[protocol_index].tag_ctr++;
  1038. }
  1039. #else
  1040. static inline
  1041. void dp_rx_update_rx_err_protocol_tag_stats(struct dp_pdev *pdev,
  1042. uint16_t protocol_index)
  1043. {
  1044. }
  1045. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  1046. /**
  1047. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1048. * and set the corresponding tag in QDF packet
  1049. * @soc: core txrx main context
  1050. * @vdev: vdev on which the packet is received
  1051. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1052. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1053. * @ring_index: REO ring number, not used for error & monitor ring
  1054. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1055. * @is_update_stats: flag to indicate whether to update stats or not
  1056. * Return: void
  1057. */
  1058. #ifdef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1059. static inline void
  1060. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1061. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1062. uint16_t ring_index,
  1063. bool is_reo_exception, bool is_update_stats)
  1064. {
  1065. uint16_t cce_metadata = RX_PROTOCOL_TAG_START_OFFSET;
  1066. bool cce_match = false;
  1067. struct dp_pdev *pdev;
  1068. uint16_t protocol_tag = 0;
  1069. if (qdf_unlikely(!vdev))
  1070. return;
  1071. pdev = vdev->pdev;
  1072. if (qdf_likely(!pdev->is_rx_protocol_tagging_enabled))
  1073. return;
  1074. /*
  1075. * In case of raw frames, rx_attention and rx_msdu_end tlv
  1076. * may be stale or invalid. Do not tag such frames.
  1077. * Default decap_type is set to ethernet for monitor vdev,
  1078. * therefore, cannot check decap_type for monitor mode.
  1079. * We will call this only for eth frames from dp_rx_mon_dest.c.
  1080. */
  1081. if (qdf_likely(!(pdev->monitor_vdev && pdev->monitor_vdev == vdev) &&
  1082. (vdev->rx_decap_type != htt_cmn_pkt_type_ethernet)))
  1083. return;
  1084. /*
  1085. * Check whether HW has filled in the CCE metadata in
  1086. * this packet, if not filled, just return
  1087. */
  1088. if (qdf_likely(!hal_rx_msdu_cce_match_get(rx_tlv_hdr)))
  1089. return;
  1090. cce_match = true;
  1091. /* Get the cce_metadata from RX MSDU TLV */
  1092. cce_metadata = (hal_rx_msdu_cce_metadata_get(rx_tlv_hdr) &
  1093. RX_MSDU_END_16_CCE_METADATA_MASK);
  1094. /*
  1095. * Received CCE metadata should be within the
  1096. * valid limits
  1097. */
  1098. qdf_assert_always((cce_metadata >= RX_PROTOCOL_TAG_START_OFFSET) &&
  1099. (cce_metadata < (RX_PROTOCOL_TAG_START_OFFSET +
  1100. RX_PROTOCOL_TAG_MAX)));
  1101. /*
  1102. * The CCE metadata received is just the
  1103. * packet_type + RX_PROTOCOL_TAG_START_OFFSET
  1104. */
  1105. cce_metadata -= RX_PROTOCOL_TAG_START_OFFSET;
  1106. /*
  1107. * Update the QDF packet with the user-specified
  1108. * tag/metadata by looking up tag value for
  1109. * received protocol type.
  1110. */
  1111. protocol_tag = pdev->rx_proto_tag_map[cce_metadata].tag;
  1112. qdf_nbuf_set_rx_protocol_tag(nbuf, protocol_tag);
  1113. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1114. "Seq:%u decap:%u CCE Match:%d ProtoID:%u Tag:%u US:%d",
  1115. hal_rx_get_rx_sequence(rx_tlv_hdr),
  1116. vdev->rx_decap_type, cce_match, cce_metadata,
  1117. protocol_tag, is_update_stats);
  1118. if (qdf_likely(!is_update_stats))
  1119. return;
  1120. if (qdf_unlikely(is_reo_exception)) {
  1121. dp_rx_update_rx_err_protocol_tag_stats(pdev,
  1122. cce_metadata);
  1123. } else {
  1124. dp_rx_update_rx_protocol_tag_stats(pdev,
  1125. cce_metadata,
  1126. ring_index);
  1127. }
  1128. }
  1129. #else
  1130. static inline void
  1131. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1132. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1133. uint16_t ring_index,
  1134. bool is_reo_exception, bool is_update_stats)
  1135. {
  1136. /* Stub API */
  1137. }
  1138. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1139. /**
  1140. * dp_rx_mon_update_protocol_tag() - Performs necessary checks for monitor mode
  1141. * and then tags appropriate packets
  1142. * @soc: core txrx main context
  1143. * @vdev: pdev on which packet is received
  1144. * @msdu: QDF packet buffer on which the protocol tag should be set
  1145. * @rx_desc: base address where the RX TLVs start
  1146. * Return: void
  1147. */
  1148. #ifdef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1149. static inline
  1150. void dp_rx_mon_update_protocol_tag(struct dp_soc *soc, struct dp_pdev *dp_pdev,
  1151. qdf_nbuf_t msdu, void *rx_desc)
  1152. {
  1153. uint32_t msdu_ppdu_id = 0;
  1154. struct mon_rx_status *mon_recv_status;
  1155. if (qdf_likely(!dp_pdev->is_rx_protocol_tagging_enabled))
  1156. return;
  1157. if (qdf_likely(!dp_pdev->monitor_vdev))
  1158. return;
  1159. if (qdf_likely(1 != dp_pdev->ppdu_info.rx_status.rxpcu_filter_pass))
  1160. return;
  1161. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(rx_desc);
  1162. if (msdu_ppdu_id != dp_pdev->ppdu_info.com_info.ppdu_id) {
  1163. QDF_TRACE(QDF_MODULE_ID_DP,
  1164. QDF_TRACE_LEVEL_ERROR,
  1165. "msdu_ppdu_id=%x,com_info.ppdu_id=%x",
  1166. msdu_ppdu_id,
  1167. dp_pdev->ppdu_info.com_info.ppdu_id);
  1168. return;
  1169. }
  1170. /*
  1171. * Update the protocol tag in SKB for packets received on BSS.
  1172. * Do not update tag stats since it would double actual received count
  1173. */
  1174. mon_recv_status = &dp_pdev->ppdu_info.rx_status;
  1175. if (mon_recv_status->frame_control_info_valid &&
  1176. ((mon_recv_status->frame_control & IEEE80211_FC0_TYPE_MASK) ==
  1177. IEEE80211_FC0_TYPE_DATA)) {
  1178. dp_rx_update_protocol_tag(soc,
  1179. dp_pdev->monitor_vdev,
  1180. msdu, rx_desc,
  1181. MAX_REO_DEST_RINGS,
  1182. false, false);
  1183. }
  1184. }
  1185. #else
  1186. static inline
  1187. void dp_rx_mon_update_protocol_tag(struct dp_soc *soc, struct dp_pdev *dp_pdev,
  1188. qdf_nbuf_t msdu, void *rx_desc)
  1189. {
  1190. /* Stub API */
  1191. }
  1192. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1193. /*
  1194. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1195. * called during dp rx initialization
  1196. * and at the end of dp_rx_process.
  1197. *
  1198. * @soc: core txrx main context
  1199. * @mac_id: mac_id which is one of 3 mac_ids
  1200. * @dp_rxdma_srng: dp rxdma circular ring
  1201. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1202. * @num_req_buffers: number of buffer to be replenished
  1203. * @desc_list: list of descs if called from dp_rx_process
  1204. * or NULL during dp rx initialization or out of buffer
  1205. * interrupt.
  1206. * @tail: tail of descs list
  1207. * Return: return success or failure
  1208. */
  1209. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1210. struct dp_srng *dp_rxdma_srng,
  1211. struct rx_desc_pool *rx_desc_pool,
  1212. uint32_t num_req_buffers,
  1213. union dp_rx_desc_list_elem_t **desc_list,
  1214. union dp_rx_desc_list_elem_t **tail);
  1215. /**
  1216. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1217. * (WBM), following error handling
  1218. *
  1219. * @soc: core DP main context
  1220. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1221. * @buf_addr_info: void pointer to the buffer_addr_info
  1222. * @bm_action: put to idle_list or release to msdu_list
  1223. * Return: QDF_STATUS
  1224. */
  1225. QDF_STATUS
  1226. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action);
  1227. QDF_STATUS
  1228. dp_rx_link_desc_buf_return(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  1229. void *buf_addr_info, uint8_t bm_action);
  1230. /**
  1231. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1232. * (WBM) by address
  1233. *
  1234. * @soc: core DP main context
  1235. * @link_desc_addr: link descriptor addr
  1236. *
  1237. * Return: QDF_STATUS
  1238. */
  1239. QDF_STATUS
  1240. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  1241. uint8_t bm_action);
  1242. uint32_t
  1243. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id,
  1244. uint32_t quota);
  1245. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1246. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1247. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1248. uint8_t *rx_tlv_hdr);
  1249. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1250. struct dp_peer *peer);
  1251. qdf_nbuf_t
  1252. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  1253. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  1254. void *ring_desc, struct dp_rx_desc *rx_desc);
  1255. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1256. #ifdef RX_DESC_DEBUG_CHECK
  1257. /**
  1258. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1259. * @rx_desc: rx descriptor pointer
  1260. *
  1261. * Return: true, if magic is correct, else false.
  1262. */
  1263. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1264. {
  1265. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1266. return false;
  1267. rx_desc->magic = 0;
  1268. return true;
  1269. }
  1270. /**
  1271. * dp_rx_desc_prep() - prepare rx desc
  1272. * @rx_desc: rx descriptor pointer to be prepared
  1273. * @nbuf: nbuf to be associated with rx_desc
  1274. *
  1275. * Note: assumption is that we are associating a nbuf which is mapped
  1276. *
  1277. * Return: none
  1278. */
  1279. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1280. {
  1281. rx_desc->magic = DP_RX_DESC_MAGIC;
  1282. rx_desc->nbuf = nbuf;
  1283. rx_desc->unmapped = 0;
  1284. }
  1285. #else
  1286. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1287. {
  1288. return true;
  1289. }
  1290. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1291. {
  1292. rx_desc->nbuf = nbuf;
  1293. rx_desc->unmapped = 0;
  1294. }
  1295. #endif /* RX_DESC_DEBUG_CHECK */
  1296. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1297. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1298. uint8_t err_code);
  1299. #ifdef PEER_CACHE_RX_PKTS
  1300. /**
  1301. * dp_rx_flush_rx_cached() - flush cached rx frames
  1302. * @peer: peer
  1303. * @drop: set flag to drop frames
  1304. *
  1305. * Return: None
  1306. */
  1307. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop);
  1308. #else
  1309. static inline void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1310. {
  1311. }
  1312. #endif
  1313. #endif /* _DP_RX_H */