dp_rx.c 90 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #include "dp_hist.h"
  35. #include "dp_rx_buffer_pool.h"
  36. #ifdef ATH_RX_PRI_SAVE
  37. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  38. (qdf_nbuf_set_priority(_nbuf, _tid))
  39. #else
  40. #define DP_RX_TID_SAVE(_nbuf, _tid)
  41. #endif
  42. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  43. static inline
  44. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  45. {
  46. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  47. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  48. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  49. return false;
  50. }
  51. return true;
  52. }
  53. #else
  54. static inline
  55. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  56. {
  57. return true;
  58. }
  59. #endif
  60. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  61. {
  62. return vdev->ap_bridge_enabled;
  63. }
  64. #ifdef DUP_RX_DESC_WAR
  65. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  66. hal_ring_handle_t hal_ring,
  67. hal_ring_desc_t ring_desc,
  68. struct dp_rx_desc *rx_desc)
  69. {
  70. void *hal_soc = soc->hal_soc;
  71. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  72. dp_rx_desc_dump(rx_desc);
  73. }
  74. #else
  75. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  76. hal_ring_handle_t hal_ring_hdl,
  77. hal_ring_desc_t ring_desc,
  78. struct dp_rx_desc *rx_desc)
  79. {
  80. hal_soc_handle_t hal_soc = soc->hal_soc;
  81. dp_rx_desc_dump(rx_desc);
  82. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  83. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  84. qdf_assert_always(0);
  85. }
  86. #endif
  87. #ifdef RX_DESC_SANITY_WAR
  88. static inline
  89. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  90. hal_ring_handle_t hal_ring_hdl,
  91. hal_ring_desc_t ring_desc,
  92. struct dp_rx_desc *rx_desc)
  93. {
  94. uint8_t return_buffer_manager;
  95. if (qdf_unlikely(!rx_desc)) {
  96. /*
  97. * This is an unlikely case where the cookie obtained
  98. * from the ring_desc is invalid and hence we are not
  99. * able to find the corresponding rx_desc
  100. */
  101. goto fail;
  102. }
  103. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  104. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  105. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  106. goto fail;
  107. }
  108. return QDF_STATUS_SUCCESS;
  109. fail:
  110. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  111. dp_err("Ring Desc:");
  112. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  113. ring_desc);
  114. return QDF_STATUS_E_NULL_VALUE;
  115. }
  116. #else
  117. static inline
  118. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  119. hal_ring_handle_t hal_ring_hdl,
  120. hal_ring_desc_t ring_desc,
  121. struct dp_rx_desc *rx_desc)
  122. {
  123. return QDF_STATUS_SUCCESS;
  124. }
  125. #endif
  126. /**
  127. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  128. *
  129. * @dp_soc: struct dp_soc *
  130. * @nbuf_frag_info_t: nbuf frag info
  131. * @dp_pdev: struct dp_pdev *
  132. * @rx_desc_pool: Rx desc pool
  133. *
  134. * Return: QDF_STATUS
  135. */
  136. #ifdef DP_RX_MON_MEM_FRAG
  137. static inline QDF_STATUS
  138. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  139. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  140. struct dp_pdev *dp_pdev,
  141. struct rx_desc_pool *rx_desc_pool)
  142. {
  143. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  144. (nbuf_frag_info_t->virt_addr).vaddr =
  145. qdf_frag_alloc(rx_desc_pool->buf_size);
  146. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  147. dp_err("Frag alloc failed");
  148. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  149. return QDF_STATUS_E_NOMEM;
  150. }
  151. ret = qdf_mem_map_page(dp_soc->osdev,
  152. (nbuf_frag_info_t->virt_addr).vaddr,
  153. QDF_DMA_FROM_DEVICE,
  154. rx_desc_pool->buf_size,
  155. &nbuf_frag_info_t->paddr);
  156. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  157. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  158. dp_err("Frag map failed");
  159. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  160. return QDF_STATUS_E_FAULT;
  161. }
  162. return QDF_STATUS_SUCCESS;
  163. }
  164. #else
  165. static inline QDF_STATUS
  166. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  167. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  168. struct dp_pdev *dp_pdev,
  169. struct rx_desc_pool *rx_desc_pool)
  170. {
  171. return QDF_STATUS_SUCCESS;
  172. }
  173. #endif /* DP_RX_MON_MEM_FRAG */
  174. /**
  175. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  176. *
  177. * @dp_soc: struct dp_soc *
  178. * @mac_id: Mac id
  179. * @num_entries_avail: num_entries_avail
  180. * @nbuf_frag_info_t: nbuf frag info
  181. * @dp_pdev: struct dp_pdev *
  182. * @rx_desc_pool: Rx desc pool
  183. *
  184. * Return: QDF_STATUS
  185. */
  186. static inline QDF_STATUS
  187. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  188. uint32_t mac_id,
  189. uint32_t num_entries_avail,
  190. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  191. struct dp_pdev *dp_pdev,
  192. struct rx_desc_pool *rx_desc_pool)
  193. {
  194. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  195. (nbuf_frag_info_t->virt_addr).nbuf =
  196. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  197. mac_id,
  198. rx_desc_pool,
  199. num_entries_avail);
  200. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  201. dp_err("nbuf alloc failed");
  202. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  203. return QDF_STATUS_E_NOMEM;
  204. }
  205. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  206. (nbuf_frag_info_t->virt_addr).nbuf,
  207. QDF_DMA_FROM_DEVICE,
  208. rx_desc_pool->buf_size);
  209. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  210. dp_rx_buffer_pool_nbuf_free(dp_soc,
  211. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  212. dp_err("nbuf map failed");
  213. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  214. return QDF_STATUS_E_FAULT;
  215. }
  216. nbuf_frag_info_t->paddr =
  217. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  218. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  219. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  220. rx_desc_pool->buf_size,
  221. true);
  222. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  223. &nbuf_frag_info_t->paddr,
  224. rx_desc_pool);
  225. if (ret == QDF_STATUS_E_FAILURE) {
  226. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  227. (nbuf_frag_info_t->virt_addr).nbuf,
  228. QDF_DMA_FROM_DEVICE,
  229. rx_desc_pool->buf_size);
  230. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  231. return QDF_STATUS_E_ADDRNOTAVAIL;
  232. }
  233. return QDF_STATUS_SUCCESS;
  234. }
  235. /*
  236. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  237. * called during dp rx initialization
  238. * and at the end of dp_rx_process.
  239. *
  240. * @soc: core txrx main context
  241. * @mac_id: mac_id which is one of 3 mac_ids
  242. * @dp_rxdma_srng: dp rxdma circular ring
  243. * @rx_desc_pool: Pointer to free Rx descriptor pool
  244. * @num_req_buffers: number of buffer to be replenished
  245. * @desc_list: list of descs if called from dp_rx_process
  246. * or NULL during dp rx initialization or out of buffer
  247. * interrupt.
  248. * @tail: tail of descs list
  249. * @func_name: name of the caller function
  250. * Return: return success or failure
  251. */
  252. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  253. struct dp_srng *dp_rxdma_srng,
  254. struct rx_desc_pool *rx_desc_pool,
  255. uint32_t num_req_buffers,
  256. union dp_rx_desc_list_elem_t **desc_list,
  257. union dp_rx_desc_list_elem_t **tail,
  258. const char *func_name)
  259. {
  260. uint32_t num_alloc_desc;
  261. uint16_t num_desc_to_free = 0;
  262. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  263. uint32_t num_entries_avail;
  264. uint32_t count;
  265. int sync_hw_ptr = 1;
  266. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  267. void *rxdma_ring_entry;
  268. union dp_rx_desc_list_elem_t *next;
  269. QDF_STATUS ret;
  270. void *rxdma_srng;
  271. rxdma_srng = dp_rxdma_srng->hal_srng;
  272. if (!rxdma_srng) {
  273. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  274. "rxdma srng not initialized");
  275. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  276. return QDF_STATUS_E_FAILURE;
  277. }
  278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  279. "requested %d buffers for replenish", num_req_buffers);
  280. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  281. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  282. rxdma_srng,
  283. sync_hw_ptr);
  284. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  285. "no of available entries in rxdma ring: %d",
  286. num_entries_avail);
  287. if (!(*desc_list) && (num_entries_avail >
  288. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  289. num_req_buffers = num_entries_avail;
  290. } else if (num_entries_avail < num_req_buffers) {
  291. num_desc_to_free = num_req_buffers - num_entries_avail;
  292. num_req_buffers = num_entries_avail;
  293. }
  294. if (qdf_unlikely(!num_req_buffers)) {
  295. num_desc_to_free = num_req_buffers;
  296. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  297. goto free_descs;
  298. }
  299. /*
  300. * if desc_list is NULL, allocate the descs from freelist
  301. */
  302. if (!(*desc_list)) {
  303. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  304. rx_desc_pool,
  305. num_req_buffers,
  306. desc_list,
  307. tail);
  308. if (!num_alloc_desc) {
  309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  310. "no free rx_descs in freelist");
  311. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  312. num_req_buffers);
  313. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  314. return QDF_STATUS_E_NOMEM;
  315. }
  316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  317. "%d rx desc allocated", num_alloc_desc);
  318. num_req_buffers = num_alloc_desc;
  319. }
  320. count = 0;
  321. while (count < num_req_buffers) {
  322. /* Flag is set while pdev rx_desc_pool initialization */
  323. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  324. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  325. &nbuf_frag_info,
  326. dp_pdev,
  327. rx_desc_pool);
  328. else
  329. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  330. mac_id,
  331. num_entries_avail, &nbuf_frag_info,
  332. dp_pdev, rx_desc_pool);
  333. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  334. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  335. continue;
  336. break;
  337. }
  338. count++;
  339. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  340. rxdma_srng);
  341. qdf_assert_always(rxdma_ring_entry);
  342. next = (*desc_list)->next;
  343. /* Flag is set while pdev rx_desc_pool initialization */
  344. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  345. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  346. &nbuf_frag_info);
  347. else
  348. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  349. &nbuf_frag_info);
  350. /* rx_desc.in_use should be zero at this time*/
  351. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  352. (*desc_list)->rx_desc.in_use = 1;
  353. (*desc_list)->rx_desc.in_err_state = 0;
  354. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  355. func_name, RX_DESC_REPLENISHED);
  356. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  357. nbuf_frag_info.virt_addr.nbuf,
  358. (unsigned long long)(nbuf_frag_info.paddr),
  359. (*desc_list)->rx_desc.cookie);
  360. hal_rxdma_buff_addr_info_set(rxdma_ring_entry,
  361. nbuf_frag_info.paddr,
  362. (*desc_list)->rx_desc.cookie,
  363. rx_desc_pool->owner);
  364. *desc_list = next;
  365. }
  366. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  367. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  368. count, num_desc_to_free);
  369. /* No need to count the number of bytes received during replenish.
  370. * Therefore set replenish.pkts.bytes as 0.
  371. */
  372. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  373. free_descs:
  374. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  375. /*
  376. * add any available free desc back to the free list
  377. */
  378. if (*desc_list)
  379. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  380. mac_id, rx_desc_pool);
  381. return QDF_STATUS_SUCCESS;
  382. }
  383. /*
  384. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  385. * pkts to RAW mode simulation to
  386. * decapsulate the pkt.
  387. *
  388. * @vdev: vdev on which RAW mode is enabled
  389. * @nbuf_list: list of RAW pkts to process
  390. * @peer: peer object from which the pkt is rx
  391. *
  392. * Return: void
  393. */
  394. void
  395. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  396. struct dp_peer *peer)
  397. {
  398. qdf_nbuf_t deliver_list_head = NULL;
  399. qdf_nbuf_t deliver_list_tail = NULL;
  400. qdf_nbuf_t nbuf;
  401. nbuf = nbuf_list;
  402. while (nbuf) {
  403. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  404. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  405. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  406. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  407. /*
  408. * reset the chfrag_start and chfrag_end bits in nbuf cb
  409. * as this is a non-amsdu pkt and RAW mode simulation expects
  410. * these bit s to be 0 for non-amsdu pkt.
  411. */
  412. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  413. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  414. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  415. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  416. }
  417. nbuf = next;
  418. }
  419. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  420. &deliver_list_tail, peer->mac_addr.raw);
  421. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  422. }
  423. #ifndef FEATURE_WDS
  424. static void
  425. dp_rx_da_learn(struct dp_soc *soc,
  426. uint8_t *rx_tlv_hdr,
  427. struct dp_peer *ta_peer,
  428. qdf_nbuf_t nbuf)
  429. {
  430. }
  431. #endif
  432. /*
  433. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  434. *
  435. * @soc: core txrx main context
  436. * @ta_peer : source peer entry
  437. * @rx_tlv_hdr : start address of rx tlvs
  438. * @nbuf : nbuf that has to be intrabss forwarded
  439. *
  440. * Return: bool: true if it is forwarded else false
  441. */
  442. static bool
  443. dp_rx_intrabss_fwd(struct dp_soc *soc,
  444. struct dp_peer *ta_peer,
  445. uint8_t *rx_tlv_hdr,
  446. qdf_nbuf_t nbuf,
  447. struct hal_rx_msdu_metadata msdu_metadata)
  448. {
  449. uint16_t len;
  450. uint8_t is_frag;
  451. uint16_t da_peer_id = HTT_INVALID_PEER;
  452. struct dp_peer *da_peer = NULL;
  453. bool is_da_bss_peer = false;
  454. struct dp_ast_entry *ast_entry;
  455. qdf_nbuf_t nbuf_copy;
  456. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  457. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  458. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  459. tid_stats.tid_rx_stats[ring_id][tid];
  460. /* check if the destination peer is available in peer table
  461. * and also check if the source peer and destination peer
  462. * belong to the same vap and destination peer is not bss peer.
  463. */
  464. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  465. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  466. if (!ast_entry)
  467. return false;
  468. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  469. ast_entry->is_active = TRUE;
  470. return false;
  471. }
  472. da_peer_id = ast_entry->peer_id;
  473. if (da_peer_id == HTT_INVALID_PEER)
  474. return false;
  475. /* TA peer cannot be same as peer(DA) on which AST is present
  476. * this indicates a change in topology and that AST entries
  477. * are yet to be updated.
  478. */
  479. if (da_peer_id == ta_peer->peer_id)
  480. return false;
  481. if (ast_entry->vdev_id != ta_peer->vdev->vdev_id)
  482. return false;
  483. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  484. DP_MOD_ID_RX);
  485. if (!da_peer)
  486. return false;
  487. is_da_bss_peer = da_peer->bss_peer;
  488. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  489. if (!is_da_bss_peer) {
  490. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  491. is_frag = qdf_nbuf_is_frag(nbuf);
  492. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  493. /* If the source or destination peer in the isolation
  494. * list then dont forward instead push to bridge stack.
  495. */
  496. if (dp_get_peer_isolation(ta_peer) ||
  497. dp_get_peer_isolation(da_peer))
  498. return false;
  499. /* linearize the nbuf just before we send to
  500. * dp_tx_send()
  501. */
  502. if (qdf_unlikely(is_frag)) {
  503. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  504. return false;
  505. nbuf = qdf_nbuf_unshare(nbuf);
  506. if (!nbuf) {
  507. DP_STATS_INC_PKT(ta_peer,
  508. rx.intra_bss.fail,
  509. 1,
  510. len);
  511. /* return true even though the pkt is
  512. * not forwarded. Basically skb_unshare
  513. * failed and we want to continue with
  514. * next nbuf.
  515. */
  516. tid_stats->fail_cnt[INTRABSS_DROP]++;
  517. return true;
  518. }
  519. }
  520. if (!dp_tx_send((struct cdp_soc_t *)soc,
  521. ta_peer->vdev->vdev_id, nbuf)) {
  522. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  523. len);
  524. return true;
  525. } else {
  526. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  527. len);
  528. tid_stats->fail_cnt[INTRABSS_DROP]++;
  529. return false;
  530. }
  531. }
  532. }
  533. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  534. * source, then clone the pkt and send the cloned pkt for
  535. * intra BSS forwarding and original pkt up the network stack
  536. * Note: how do we handle multicast pkts. do we forward
  537. * all multicast pkts as is or let a higher layer module
  538. * like igmpsnoop decide whether to forward or not with
  539. * Mcast enhancement.
  540. */
  541. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  542. !ta_peer->bss_peer))) {
  543. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  544. goto end;
  545. /* If the source peer in the isolation list
  546. * then dont forward instead push to bridge stack
  547. */
  548. if (dp_get_peer_isolation(ta_peer))
  549. goto end;
  550. nbuf_copy = qdf_nbuf_copy(nbuf);
  551. if (!nbuf_copy)
  552. goto end;
  553. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  554. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  555. /* Set cb->ftype to intrabss FWD */
  556. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  557. if (dp_tx_send((struct cdp_soc_t *)soc,
  558. ta_peer->vdev->vdev_id, nbuf_copy)) {
  559. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  560. tid_stats->fail_cnt[INTRABSS_DROP]++;
  561. qdf_nbuf_free(nbuf_copy);
  562. } else {
  563. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  564. tid_stats->intrabss_cnt++;
  565. }
  566. }
  567. end:
  568. /* return false as we have to still send the original pkt
  569. * up the stack
  570. */
  571. return false;
  572. }
  573. #ifdef MESH_MODE_SUPPORT
  574. /**
  575. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  576. *
  577. * @vdev: DP Virtual device handle
  578. * @nbuf: Buffer pointer
  579. * @rx_tlv_hdr: start of rx tlv header
  580. * @peer: pointer to peer
  581. *
  582. * This function allocated memory for mesh receive stats and fill the
  583. * required stats. Stores the memory address in skb cb.
  584. *
  585. * Return: void
  586. */
  587. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  588. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  589. {
  590. struct mesh_recv_hdr_s *rx_info = NULL;
  591. uint32_t pkt_type;
  592. uint32_t nss;
  593. uint32_t rate_mcs;
  594. uint32_t bw;
  595. uint8_t primary_chan_num;
  596. uint32_t center_chan_freq;
  597. struct dp_soc *soc;
  598. /* fill recv mesh stats */
  599. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  600. /* upper layers are resposible to free this memory */
  601. if (!rx_info) {
  602. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  603. "Memory allocation failed for mesh rx stats");
  604. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  605. return;
  606. }
  607. rx_info->rs_flags = MESH_RXHDR_VER1;
  608. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  609. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  610. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  611. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  612. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  613. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  614. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  615. if (vdev->osif_get_key)
  616. vdev->osif_get_key(vdev->osif_vdev,
  617. &rx_info->rs_decryptkey[0],
  618. &peer->mac_addr.raw[0],
  619. rx_info->rs_keyix);
  620. }
  621. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  622. soc = vdev->pdev->soc;
  623. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  624. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  625. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  626. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  627. soc->ctrl_psoc,
  628. vdev->pdev->pdev_id,
  629. center_chan_freq);
  630. }
  631. rx_info->rs_channel = primary_chan_num;
  632. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  633. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  634. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  635. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  636. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  637. (bw << 24);
  638. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  639. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  640. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  641. rx_info->rs_flags,
  642. rx_info->rs_rssi,
  643. rx_info->rs_channel,
  644. rx_info->rs_ratephy1,
  645. rx_info->rs_keyix);
  646. }
  647. /**
  648. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  649. *
  650. * @vdev: DP Virtual device handle
  651. * @nbuf: Buffer pointer
  652. * @rx_tlv_hdr: start of rx tlv header
  653. *
  654. * This checks if the received packet is matching any filter out
  655. * catogery and and drop the packet if it matches.
  656. *
  657. * Return: status(0 indicates drop, 1 indicate to no drop)
  658. */
  659. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  660. uint8_t *rx_tlv_hdr)
  661. {
  662. union dp_align_mac_addr mac_addr;
  663. struct dp_soc *soc = vdev->pdev->soc;
  664. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  665. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  666. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  667. rx_tlv_hdr))
  668. return QDF_STATUS_SUCCESS;
  669. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  670. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  671. rx_tlv_hdr))
  672. return QDF_STATUS_SUCCESS;
  673. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  674. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  675. rx_tlv_hdr) &&
  676. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  677. rx_tlv_hdr))
  678. return QDF_STATUS_SUCCESS;
  679. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  680. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  681. rx_tlv_hdr,
  682. &mac_addr.raw[0]))
  683. return QDF_STATUS_E_FAILURE;
  684. if (!qdf_mem_cmp(&mac_addr.raw[0],
  685. &vdev->mac_addr.raw[0],
  686. QDF_MAC_ADDR_SIZE))
  687. return QDF_STATUS_SUCCESS;
  688. }
  689. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  690. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  691. rx_tlv_hdr,
  692. &mac_addr.raw[0]))
  693. return QDF_STATUS_E_FAILURE;
  694. if (!qdf_mem_cmp(&mac_addr.raw[0],
  695. &vdev->mac_addr.raw[0],
  696. QDF_MAC_ADDR_SIZE))
  697. return QDF_STATUS_SUCCESS;
  698. }
  699. }
  700. return QDF_STATUS_E_FAILURE;
  701. }
  702. #else
  703. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  704. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  705. {
  706. }
  707. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  708. uint8_t *rx_tlv_hdr)
  709. {
  710. return QDF_STATUS_E_FAILURE;
  711. }
  712. #endif
  713. #ifdef FEATURE_NAC_RSSI
  714. /**
  715. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  716. * clients
  717. * @pdev: DP pdev handle
  718. * @rx_pkt_hdr: Rx packet Header
  719. *
  720. * return: dp_vdev*
  721. */
  722. static
  723. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  724. uint8_t *rx_pkt_hdr)
  725. {
  726. struct ieee80211_frame *wh;
  727. struct dp_neighbour_peer *peer = NULL;
  728. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  729. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  730. return NULL;
  731. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  732. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  733. neighbour_peer_list_elem) {
  734. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  735. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  736. QDF_TRACE(
  737. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  738. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  739. peer->neighbour_peers_macaddr.raw[0],
  740. peer->neighbour_peers_macaddr.raw[1],
  741. peer->neighbour_peers_macaddr.raw[2],
  742. peer->neighbour_peers_macaddr.raw[3],
  743. peer->neighbour_peers_macaddr.raw[4],
  744. peer->neighbour_peers_macaddr.raw[5]);
  745. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  746. return pdev->monitor_vdev;
  747. }
  748. }
  749. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  750. return NULL;
  751. }
  752. /**
  753. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  754. * @soc: DP SOC handle
  755. * @mpdu: mpdu for which peer is invalid
  756. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  757. * pool_id has same mapping)
  758. *
  759. * return: integer type
  760. */
  761. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  762. uint8_t mac_id)
  763. {
  764. struct dp_invalid_peer_msg msg;
  765. struct dp_vdev *vdev = NULL;
  766. struct dp_pdev *pdev = NULL;
  767. struct ieee80211_frame *wh;
  768. qdf_nbuf_t curr_nbuf, next_nbuf;
  769. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  770. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  771. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  772. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  774. "Drop decapped frames");
  775. goto free;
  776. }
  777. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  778. if (!DP_FRAME_IS_DATA(wh)) {
  779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  780. "NAWDS valid only for data frames");
  781. goto free;
  782. }
  783. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  785. "Invalid nbuf length");
  786. goto free;
  787. }
  788. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  789. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  791. "PDEV %s", !pdev ? "not found" : "down");
  792. goto free;
  793. }
  794. if (pdev->filter_neighbour_peers) {
  795. /* Next Hop scenario not yet handle */
  796. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  797. if (vdev) {
  798. dp_rx_mon_deliver(soc, pdev->pdev_id,
  799. pdev->invalid_peer_head_msdu,
  800. pdev->invalid_peer_tail_msdu);
  801. pdev->invalid_peer_head_msdu = NULL;
  802. pdev->invalid_peer_tail_msdu = NULL;
  803. return 0;
  804. }
  805. }
  806. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  807. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  808. QDF_MAC_ADDR_SIZE) == 0) {
  809. goto out;
  810. }
  811. }
  812. if (!vdev) {
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  814. "VDEV not found");
  815. goto free;
  816. }
  817. out:
  818. msg.wh = wh;
  819. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  820. msg.nbuf = mpdu;
  821. msg.vdev_id = vdev->vdev_id;
  822. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  823. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  824. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  825. pdev->pdev_id, &msg);
  826. free:
  827. /* Drop and free packet */
  828. curr_nbuf = mpdu;
  829. while (curr_nbuf) {
  830. next_nbuf = qdf_nbuf_next(curr_nbuf);
  831. qdf_nbuf_free(curr_nbuf);
  832. curr_nbuf = next_nbuf;
  833. }
  834. return 0;
  835. }
  836. /**
  837. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  838. * @soc: DP SOC handle
  839. * @mpdu: mpdu for which peer is invalid
  840. * @mpdu_done: if an mpdu is completed
  841. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  842. * pool_id has same mapping)
  843. *
  844. * return: integer type
  845. */
  846. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  847. qdf_nbuf_t mpdu, bool mpdu_done,
  848. uint8_t mac_id)
  849. {
  850. /* Only trigger the process when mpdu is completed */
  851. if (mpdu_done)
  852. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  853. }
  854. #else
  855. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  856. uint8_t mac_id)
  857. {
  858. qdf_nbuf_t curr_nbuf, next_nbuf;
  859. struct dp_pdev *pdev;
  860. struct dp_vdev *vdev = NULL;
  861. struct ieee80211_frame *wh;
  862. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  863. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  864. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  865. if (!DP_FRAME_IS_DATA(wh)) {
  866. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  867. "only for data frames");
  868. goto free;
  869. }
  870. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  872. "Invalid nbuf length");
  873. goto free;
  874. }
  875. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  876. if (!pdev) {
  877. QDF_TRACE(QDF_MODULE_ID_DP,
  878. QDF_TRACE_LEVEL_ERROR,
  879. "PDEV not found");
  880. goto free;
  881. }
  882. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  883. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  884. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  885. QDF_MAC_ADDR_SIZE) == 0) {
  886. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  887. goto out;
  888. }
  889. }
  890. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  891. if (!vdev) {
  892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  893. "VDEV not found");
  894. goto free;
  895. }
  896. out:
  897. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  898. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  899. free:
  900. /* reset the head and tail pointers */
  901. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  902. if (pdev) {
  903. pdev->invalid_peer_head_msdu = NULL;
  904. pdev->invalid_peer_tail_msdu = NULL;
  905. }
  906. /* Drop and free packet */
  907. curr_nbuf = mpdu;
  908. while (curr_nbuf) {
  909. next_nbuf = qdf_nbuf_next(curr_nbuf);
  910. qdf_nbuf_free(curr_nbuf);
  911. curr_nbuf = next_nbuf;
  912. }
  913. /* Reset the head and tail pointers */
  914. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  915. if (pdev) {
  916. pdev->invalid_peer_head_msdu = NULL;
  917. pdev->invalid_peer_tail_msdu = NULL;
  918. }
  919. return 0;
  920. }
  921. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  922. qdf_nbuf_t mpdu, bool mpdu_done,
  923. uint8_t mac_id)
  924. {
  925. /* Process the nbuf */
  926. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  927. }
  928. #endif
  929. #ifdef RECEIVE_OFFLOAD
  930. /**
  931. * dp_rx_print_offload_info() - Print offload info from RX TLV
  932. * @soc: dp soc handle
  933. * @rx_tlv: RX TLV for which offload information is to be printed
  934. *
  935. * Return: None
  936. */
  937. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  938. {
  939. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  940. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  941. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  942. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  943. rx_tlv));
  944. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  945. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  946. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  947. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  948. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  949. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  950. dp_verbose_debug("---------------------------------------------------------");
  951. }
  952. /**
  953. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  954. * @soc: DP SOC handle
  955. * @rx_tlv: RX TLV received for the msdu
  956. * @msdu: msdu for which GRO info needs to be filled
  957. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  958. *
  959. * Return: None
  960. */
  961. static
  962. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  963. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  964. {
  965. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  966. return;
  967. /* Filling up RX offload info only for TCP packets */
  968. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  969. return;
  970. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  971. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  972. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  973. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  974. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  975. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  976. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  977. rx_tlv);
  978. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  979. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  980. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  981. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  982. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  983. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  984. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  985. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  986. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  987. HAL_RX_TLV_GET_IPV6(rx_tlv);
  988. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  989. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  990. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  991. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  992. dp_rx_print_offload_info(soc, rx_tlv);
  993. }
  994. #else
  995. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  996. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  997. {
  998. }
  999. #endif /* RECEIVE_OFFLOAD */
  1000. /**
  1001. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1002. *
  1003. * @nbuf: pointer to msdu.
  1004. * @mpdu_len: mpdu length
  1005. *
  1006. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1007. */
  1008. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  1009. {
  1010. bool last_nbuf;
  1011. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  1012. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1013. last_nbuf = false;
  1014. } else {
  1015. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  1016. last_nbuf = true;
  1017. }
  1018. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  1019. return last_nbuf;
  1020. }
  1021. /**
  1022. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1023. * multiple nbufs.
  1024. * @nbuf: pointer to the first msdu of an amsdu.
  1025. *
  1026. * This function implements the creation of RX frag_list for cases
  1027. * where an MSDU is spread across multiple nbufs.
  1028. *
  1029. * Return: returns the head nbuf which contains complete frag_list.
  1030. */
  1031. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf)
  1032. {
  1033. qdf_nbuf_t parent, frag_list, next = NULL;
  1034. uint16_t frag_list_len = 0;
  1035. uint16_t mpdu_len;
  1036. bool last_nbuf;
  1037. /*
  1038. * Use msdu len got from REO entry descriptor instead since
  1039. * there is case the RX PKT TLV is corrupted while msdu_len
  1040. * from REO descriptor is right for non-raw RX scatter msdu.
  1041. */
  1042. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1043. /*
  1044. * this is a case where the complete msdu fits in one single nbuf.
  1045. * in this case HW sets both start and end bit and we only need to
  1046. * reset these bits for RAW mode simulator to decap the pkt
  1047. */
  1048. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1049. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1050. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  1051. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1052. return nbuf;
  1053. }
  1054. /*
  1055. * This is a case where we have multiple msdus (A-MSDU) spread across
  1056. * multiple nbufs. here we create a fraglist out of these nbufs.
  1057. *
  1058. * the moment we encounter a nbuf with continuation bit set we
  1059. * know for sure we have an MSDU which is spread across multiple
  1060. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1061. */
  1062. parent = nbuf;
  1063. frag_list = nbuf->next;
  1064. nbuf = nbuf->next;
  1065. /*
  1066. * set the start bit in the first nbuf we encounter with continuation
  1067. * bit set. This has the proper mpdu length set as it is the first
  1068. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1069. * nbufs will form the frag_list of the parent nbuf.
  1070. */
  1071. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1072. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  1073. /*
  1074. * this is where we set the length of the fragments which are
  1075. * associated to the parent nbuf. We iterate through the frag_list
  1076. * till we hit the last_nbuf of the list.
  1077. */
  1078. do {
  1079. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1080. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1081. frag_list_len += qdf_nbuf_len(nbuf);
  1082. if (last_nbuf) {
  1083. next = nbuf->next;
  1084. nbuf->next = NULL;
  1085. break;
  1086. }
  1087. nbuf = nbuf->next;
  1088. } while (!last_nbuf);
  1089. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1090. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1091. parent->next = next;
  1092. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1093. return parent;
  1094. }
  1095. #ifdef QCA_PEER_EXT_STATS
  1096. /*
  1097. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1098. * @peer: DP soc context
  1099. * @nbuf: NBuffer
  1100. *
  1101. * Return: Void
  1102. */
  1103. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1104. qdf_nbuf_t nbuf)
  1105. {
  1106. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1107. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1108. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1109. }
  1110. #endif /* QCA_PEER_EXT_STATS */
  1111. /**
  1112. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1113. * to pass in correct fields
  1114. *
  1115. * @vdev: pdev handle
  1116. * @tx_desc: tx descriptor
  1117. * @tid: tid value
  1118. * Return: none
  1119. */
  1120. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1121. {
  1122. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1123. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1124. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1125. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1126. uint32_t interframe_delay =
  1127. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1128. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1129. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1130. /*
  1131. * Update interframe delay stats calculated at deliver_data_ol point.
  1132. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1133. * interframe delay will not be calculate correctly for 1st frame.
  1134. * On the other side, this will help in avoiding extra per packet check
  1135. * of vdev->prev_rx_deliver_tstamp.
  1136. */
  1137. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1138. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1139. vdev->prev_rx_deliver_tstamp = current_ts;
  1140. }
  1141. /**
  1142. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1143. * @pdev: dp pdev reference
  1144. * @buf_list: buffer list to be dropepd
  1145. *
  1146. * Return: int (number of bufs dropped)
  1147. */
  1148. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1149. qdf_nbuf_t buf_list)
  1150. {
  1151. struct cdp_tid_rx_stats *stats = NULL;
  1152. uint8_t tid = 0, ring_id = 0;
  1153. int num_dropped = 0;
  1154. qdf_nbuf_t buf, next_buf;
  1155. buf = buf_list;
  1156. while (buf) {
  1157. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1158. next_buf = qdf_nbuf_queue_next(buf);
  1159. tid = qdf_nbuf_get_tid_val(buf);
  1160. if (qdf_likely(pdev)) {
  1161. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1162. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1163. stats->delivered_to_stack--;
  1164. }
  1165. qdf_nbuf_free(buf);
  1166. buf = next_buf;
  1167. num_dropped++;
  1168. }
  1169. return num_dropped;
  1170. }
  1171. #ifdef PEER_CACHE_RX_PKTS
  1172. /**
  1173. * dp_rx_flush_rx_cached() - flush cached rx frames
  1174. * @peer: peer
  1175. * @drop: flag to drop frames or forward to net stack
  1176. *
  1177. * Return: None
  1178. */
  1179. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1180. {
  1181. struct dp_peer_cached_bufq *bufqi;
  1182. struct dp_rx_cached_buf *cache_buf = NULL;
  1183. ol_txrx_rx_fp data_rx = NULL;
  1184. int num_buff_elem;
  1185. QDF_STATUS status;
  1186. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1187. qdf_atomic_dec(&peer->flush_in_progress);
  1188. return;
  1189. }
  1190. qdf_spin_lock_bh(&peer->peer_info_lock);
  1191. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1192. data_rx = peer->vdev->osif_rx;
  1193. else
  1194. drop = true;
  1195. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1196. bufqi = &peer->bufq_info;
  1197. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1198. qdf_list_remove_front(&bufqi->cached_bufq,
  1199. (qdf_list_node_t **)&cache_buf);
  1200. while (cache_buf) {
  1201. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1202. cache_buf->buf);
  1203. bufqi->entries -= num_buff_elem;
  1204. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1205. if (drop) {
  1206. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1207. cache_buf->buf);
  1208. } else {
  1209. /* Flush the cached frames to OSIF DEV */
  1210. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1211. if (status != QDF_STATUS_SUCCESS)
  1212. bufqi->dropped = dp_rx_drop_nbuf_list(
  1213. peer->vdev->pdev,
  1214. cache_buf->buf);
  1215. }
  1216. qdf_mem_free(cache_buf);
  1217. cache_buf = NULL;
  1218. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1219. qdf_list_remove_front(&bufqi->cached_bufq,
  1220. (qdf_list_node_t **)&cache_buf);
  1221. }
  1222. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1223. qdf_atomic_dec(&peer->flush_in_progress);
  1224. }
  1225. /**
  1226. * dp_rx_enqueue_rx() - cache rx frames
  1227. * @peer: peer
  1228. * @rx_buf_list: cache buffer list
  1229. *
  1230. * Return: None
  1231. */
  1232. static QDF_STATUS
  1233. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1234. {
  1235. struct dp_rx_cached_buf *cache_buf;
  1236. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1237. int num_buff_elem;
  1238. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1239. bufqi->dropped);
  1240. if (!peer->valid) {
  1241. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1242. rx_buf_list);
  1243. return QDF_STATUS_E_INVAL;
  1244. }
  1245. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1246. if (bufqi->entries >= bufqi->thresh) {
  1247. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1248. rx_buf_list);
  1249. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1250. return QDF_STATUS_E_RESOURCES;
  1251. }
  1252. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1253. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1254. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1255. if (!cache_buf) {
  1256. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1257. "Failed to allocate buf to cache rx frames");
  1258. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1259. rx_buf_list);
  1260. return QDF_STATUS_E_NOMEM;
  1261. }
  1262. cache_buf->buf = rx_buf_list;
  1263. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1264. qdf_list_insert_back(&bufqi->cached_bufq,
  1265. &cache_buf->node);
  1266. bufqi->entries += num_buff_elem;
  1267. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1268. return QDF_STATUS_SUCCESS;
  1269. }
  1270. static inline
  1271. bool dp_rx_is_peer_cache_bufq_supported(void)
  1272. {
  1273. return true;
  1274. }
  1275. #else
  1276. static inline
  1277. bool dp_rx_is_peer_cache_bufq_supported(void)
  1278. {
  1279. return false;
  1280. }
  1281. static inline QDF_STATUS
  1282. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1283. {
  1284. return QDF_STATUS_SUCCESS;
  1285. }
  1286. #endif
  1287. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1288. /**
  1289. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1290. * using the appropriate call back functions.
  1291. * @soc: soc
  1292. * @vdev: vdev
  1293. * @peer: peer
  1294. * @nbuf_head: skb list head
  1295. * @nbuf_tail: skb list tail
  1296. *
  1297. * Return: None
  1298. */
  1299. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1300. struct dp_vdev *vdev,
  1301. struct dp_peer *peer,
  1302. qdf_nbuf_t nbuf_head)
  1303. {
  1304. /* Function pointer initialized only when FISA is enabled */
  1305. if (vdev->osif_fisa_rx)
  1306. /* on failure send it via regular path */
  1307. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1308. else
  1309. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1310. }
  1311. #else
  1312. /**
  1313. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1314. * using the appropriate call back functions.
  1315. * @soc: soc
  1316. * @vdev: vdev
  1317. * @peer: peer
  1318. * @nbuf_head: skb list head
  1319. * @nbuf_tail: skb list tail
  1320. *
  1321. * Check the return status of the call back function and drop
  1322. * the packets if the return status indicates a failure.
  1323. *
  1324. * Return: None
  1325. */
  1326. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1327. struct dp_vdev *vdev,
  1328. struct dp_peer *peer,
  1329. qdf_nbuf_t nbuf_head)
  1330. {
  1331. int num_nbuf = 0;
  1332. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1333. /* Function pointer initialized only when FISA is enabled */
  1334. if (vdev->osif_fisa_rx)
  1335. /* on failure send it via regular path */
  1336. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1337. else if (vdev->osif_rx)
  1338. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1339. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1340. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1341. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1342. if (peer)
  1343. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1344. }
  1345. }
  1346. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1347. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1348. struct dp_vdev *vdev,
  1349. struct dp_peer *peer,
  1350. qdf_nbuf_t nbuf_head,
  1351. qdf_nbuf_t nbuf_tail)
  1352. {
  1353. int num_nbuf = 0;
  1354. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1355. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1356. /*
  1357. * This is a special case where vdev is invalid,
  1358. * so we cannot know the pdev to which this packet
  1359. * belonged. Hence we update the soc rx error stats.
  1360. */
  1361. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1362. return;
  1363. }
  1364. /*
  1365. * highly unlikely to have a vdev without a registered rx
  1366. * callback function. if so let us free the nbuf_list.
  1367. */
  1368. if (qdf_unlikely(!vdev->osif_rx)) {
  1369. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1370. dp_rx_enqueue_rx(peer, nbuf_head);
  1371. } else {
  1372. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1373. nbuf_head);
  1374. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1375. }
  1376. return;
  1377. }
  1378. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1379. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1380. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1381. &nbuf_tail, peer->mac_addr.raw);
  1382. }
  1383. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1384. }
  1385. /**
  1386. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1387. * @nbuf: pointer to the first msdu of an amsdu.
  1388. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1389. *
  1390. * The ipsumed field of the skb is set based on whether HW validated the
  1391. * IP/TCP/UDP checksum.
  1392. *
  1393. * Return: void
  1394. */
  1395. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1396. qdf_nbuf_t nbuf,
  1397. uint8_t *rx_tlv_hdr)
  1398. {
  1399. qdf_nbuf_rx_cksum_t cksum = {0};
  1400. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1401. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1402. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1403. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1404. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1405. } else {
  1406. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1407. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1408. }
  1409. }
  1410. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1411. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1412. { \
  1413. qdf_nbuf_t nbuf_local; \
  1414. struct dp_peer *peer_local; \
  1415. struct dp_vdev *vdev_local = vdev_hdl; \
  1416. do { \
  1417. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1418. break; \
  1419. nbuf_local = nbuf; \
  1420. peer_local = peer; \
  1421. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1422. break; \
  1423. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1424. break; \
  1425. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1426. (nbuf_local), \
  1427. (peer_local), 0, 1); \
  1428. } while (0); \
  1429. }
  1430. #else
  1431. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1432. #endif
  1433. /**
  1434. * dp_rx_msdu_stats_update() - update per msdu stats.
  1435. * @soc: core txrx main context
  1436. * @nbuf: pointer to the first msdu of an amsdu.
  1437. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1438. * @peer: pointer to the peer object.
  1439. * @ring_id: reo dest ring number on which pkt is reaped.
  1440. * @tid_stats: per tid rx stats.
  1441. *
  1442. * update all the per msdu stats for that nbuf.
  1443. * Return: void
  1444. */
  1445. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1446. qdf_nbuf_t nbuf,
  1447. uint8_t *rx_tlv_hdr,
  1448. struct dp_peer *peer,
  1449. uint8_t ring_id,
  1450. struct cdp_tid_rx_stats *tid_stats)
  1451. {
  1452. bool is_ampdu, is_not_amsdu;
  1453. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1454. struct dp_vdev *vdev = peer->vdev;
  1455. qdf_ether_header_t *eh;
  1456. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1457. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1458. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1459. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1460. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1461. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1462. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1463. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1464. tid_stats->msdu_cnt++;
  1465. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1466. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1467. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1468. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1469. tid_stats->mcast_msdu_cnt++;
  1470. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1471. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1472. tid_stats->bcast_msdu_cnt++;
  1473. }
  1474. }
  1475. /*
  1476. * currently we can return from here as we have similar stats
  1477. * updated at per ppdu level instead of msdu level
  1478. */
  1479. if (!soc->process_rx_status)
  1480. return;
  1481. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1482. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1483. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1484. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1485. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1486. tid = qdf_nbuf_get_tid_val(nbuf);
  1487. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1488. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1489. rx_tlv_hdr);
  1490. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1491. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1492. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1493. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1494. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1495. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1496. DP_STATS_INC(peer, rx.bw[bw], 1);
  1497. /*
  1498. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1499. * then increase index [nss - 1] in array counter.
  1500. */
  1501. if (nss > 0 && (pkt_type == DOT11_N ||
  1502. pkt_type == DOT11_AC ||
  1503. pkt_type == DOT11_AX))
  1504. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1505. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1506. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1507. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1508. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1509. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1510. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1511. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1512. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1513. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1514. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1515. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1516. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1517. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1518. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1519. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1520. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1521. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1522. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1523. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1524. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1525. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1526. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1527. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1528. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1529. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1530. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1531. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1532. if ((soc->process_rx_status) &&
  1533. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1534. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1535. if (!vdev->pdev)
  1536. return;
  1537. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1538. &peer->stats, peer->peer_id,
  1539. UPDATE_PEER_STATS,
  1540. vdev->pdev->pdev_id);
  1541. #endif
  1542. }
  1543. }
  1544. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1545. uint8_t *rx_tlv_hdr,
  1546. qdf_nbuf_t nbuf,
  1547. struct hal_rx_msdu_metadata msdu_info)
  1548. {
  1549. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1550. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1551. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1552. qdf_nbuf_is_da_valid(nbuf) &&
  1553. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1554. return false;
  1555. return true;
  1556. }
  1557. #ifndef WDS_VENDOR_EXTENSION
  1558. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1559. struct dp_vdev *vdev,
  1560. struct dp_peer *peer)
  1561. {
  1562. return 1;
  1563. }
  1564. #endif
  1565. #ifdef RX_DESC_DEBUG_CHECK
  1566. /**
  1567. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1568. * corruption
  1569. *
  1570. * @ring_desc: REO ring descriptor
  1571. * @rx_desc: Rx descriptor
  1572. *
  1573. * Return: NONE
  1574. */
  1575. static inline
  1576. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1577. struct dp_rx_desc *rx_desc)
  1578. {
  1579. struct hal_buf_info hbi;
  1580. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1581. /* Sanity check for possible buffer paddr corruption */
  1582. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1583. return QDF_STATUS_SUCCESS;
  1584. return QDF_STATUS_E_FAILURE;
  1585. }
  1586. #else
  1587. static inline
  1588. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1589. struct dp_rx_desc *rx_desc)
  1590. {
  1591. return QDF_STATUS_SUCCESS;
  1592. }
  1593. #endif
  1594. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1595. static inline
  1596. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1597. {
  1598. bool limit_hit = false;
  1599. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1600. limit_hit =
  1601. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1602. if (limit_hit)
  1603. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1604. return limit_hit;
  1605. }
  1606. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1607. {
  1608. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1609. }
  1610. #else
  1611. static inline
  1612. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1613. {
  1614. return false;
  1615. }
  1616. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1617. {
  1618. return false;
  1619. }
  1620. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1621. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1622. /**
  1623. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1624. * no corresbonding peer found
  1625. * @soc: core txrx main context
  1626. * @nbuf: pkt skb pointer
  1627. *
  1628. * This function will try to deliver some RX special frames to stack
  1629. * even there is no peer matched found. for instance, LFR case, some
  1630. * eapol data will be sent to host before peer_map done.
  1631. *
  1632. * Return: None
  1633. */
  1634. static
  1635. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1636. {
  1637. uint16_t peer_id;
  1638. uint8_t vdev_id;
  1639. struct dp_vdev *vdev = NULL;
  1640. uint32_t l2_hdr_offset = 0;
  1641. uint16_t msdu_len = 0;
  1642. uint32_t pkt_len = 0;
  1643. uint8_t *rx_tlv_hdr;
  1644. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1645. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1646. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1647. if (peer_id > soc->max_peers)
  1648. goto deliver_fail;
  1649. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1650. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  1651. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1652. goto deliver_fail;
  1653. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1654. goto deliver_fail;
  1655. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1656. l2_hdr_offset =
  1657. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1658. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1659. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1660. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1661. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1662. qdf_nbuf_pull_head(nbuf,
  1663. RX_PKT_TLVS_LEN +
  1664. l2_hdr_offset);
  1665. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1666. qdf_nbuf_set_exc_frame(nbuf, 1);
  1667. if (QDF_STATUS_SUCCESS !=
  1668. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1669. goto deliver_fail;
  1670. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1671. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1672. return;
  1673. }
  1674. deliver_fail:
  1675. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1676. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1677. qdf_nbuf_free(nbuf);
  1678. if (vdev)
  1679. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1680. }
  1681. #else
  1682. static inline
  1683. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1684. {
  1685. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1686. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1687. qdf_nbuf_free(nbuf);
  1688. }
  1689. #endif
  1690. /**
  1691. * dp_rx_srng_get_num_pending() - get number of pending entries
  1692. * @hal_soc: hal soc opaque pointer
  1693. * @hal_ring: opaque pointer to the HAL Rx Ring
  1694. * @num_entries: number of entries in the hal_ring.
  1695. * @near_full: pointer to a boolean. This is set if ring is near full.
  1696. *
  1697. * The function returns the number of entries in a destination ring which are
  1698. * yet to be reaped. The function also checks if the ring is near full.
  1699. * If more than half of the ring needs to be reaped, the ring is considered
  1700. * approaching full.
  1701. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1702. * entries. It should not be called within a SRNG lock. HW pointer value is
  1703. * synced into cached_hp.
  1704. *
  1705. * Return: Number of pending entries if any
  1706. */
  1707. static
  1708. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1709. hal_ring_handle_t hal_ring_hdl,
  1710. uint32_t num_entries,
  1711. bool *near_full)
  1712. {
  1713. uint32_t num_pending = 0;
  1714. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1715. hal_ring_hdl,
  1716. true);
  1717. if (num_entries && (num_pending >= num_entries >> 1))
  1718. *near_full = true;
  1719. else
  1720. *near_full = false;
  1721. return num_pending;
  1722. }
  1723. #ifdef WLAN_SUPPORT_RX_FISA
  1724. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1725. {
  1726. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1727. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1728. }
  1729. /**
  1730. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1731. * @nbuf: pkt skb pointer
  1732. * @l3_padding: l3 padding
  1733. *
  1734. * Return: None
  1735. */
  1736. static inline
  1737. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1738. {
  1739. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1740. }
  1741. #else
  1742. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1743. {
  1744. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1745. }
  1746. static inline
  1747. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1748. {
  1749. }
  1750. #endif
  1751. #ifdef DP_RX_DROP_RAW_FRM
  1752. /**
  1753. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1754. * @nbuf: pkt skb pointer
  1755. *
  1756. * Return: true - raw frame, dropped
  1757. * false - not raw frame, do nothing
  1758. */
  1759. static inline
  1760. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1761. {
  1762. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1763. qdf_nbuf_free(nbuf);
  1764. return true;
  1765. }
  1766. return false;
  1767. }
  1768. #else
  1769. static inline
  1770. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1771. {
  1772. return false;
  1773. }
  1774. #endif
  1775. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1776. /**
  1777. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  1778. * @soc: Datapath soc structure
  1779. * @ring_num: REO ring number
  1780. * @ring_desc: REO ring descriptor
  1781. *
  1782. * Returns: None
  1783. */
  1784. static inline void
  1785. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1786. hal_ring_desc_t ring_desc)
  1787. {
  1788. struct dp_buf_info_record *record;
  1789. uint8_t rbm;
  1790. struct hal_buf_info hbi;
  1791. uint32_t idx;
  1792. if (qdf_unlikely(!&soc->rx_ring_history[ring_num]))
  1793. return;
  1794. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1795. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  1796. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  1797. DP_RX_HIST_MAX);
  1798. /* No NULL check needed for record since its an array */
  1799. record = &soc->rx_ring_history[ring_num]->entry[idx];
  1800. record->timestamp = qdf_get_log_timestamp();
  1801. record->hbi.paddr = hbi.paddr;
  1802. record->hbi.sw_cookie = hbi.sw_cookie;
  1803. record->hbi.rbm = rbm;
  1804. }
  1805. #else
  1806. static inline void
  1807. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1808. hal_ring_desc_t ring_desc)
  1809. {
  1810. }
  1811. #endif
  1812. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1813. /**
  1814. * dp_rx_update_stats() - Update soc level rx packet count
  1815. * @soc: DP soc handle
  1816. * @nbuf: nbuf received
  1817. *
  1818. * Returns: none
  1819. */
  1820. static inline void dp_rx_update_stats(struct dp_soc *soc,
  1821. qdf_nbuf_t nbuf)
  1822. {
  1823. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  1824. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1825. }
  1826. #else
  1827. static inline void dp_rx_update_stats(struct dp_soc *soc,
  1828. qdf_nbuf_t nbuf)
  1829. {
  1830. }
  1831. #endif
  1832. /**
  1833. * dp_rx_process() - Brain of the Rx processing functionality
  1834. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1835. * @int_ctx: per interrupt context
  1836. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1837. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1838. * @quota: No. of units (packets) that can be serviced in one shot.
  1839. *
  1840. * This function implements the core of Rx functionality. This is
  1841. * expected to handle only non-error frames.
  1842. *
  1843. * Return: uint32_t: No. of elements processed
  1844. */
  1845. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1846. uint8_t reo_ring_num, uint32_t quota)
  1847. {
  1848. hal_ring_desc_t ring_desc;
  1849. hal_soc_handle_t hal_soc;
  1850. struct dp_rx_desc *rx_desc = NULL;
  1851. qdf_nbuf_t nbuf, next;
  1852. bool near_full;
  1853. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1854. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1855. uint32_t num_pending;
  1856. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1857. uint16_t msdu_len = 0;
  1858. uint16_t peer_id;
  1859. uint8_t vdev_id;
  1860. struct dp_peer *peer;
  1861. struct dp_vdev *vdev;
  1862. uint32_t pkt_len = 0;
  1863. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1864. struct hal_rx_msdu_desc_info msdu_desc_info;
  1865. enum hal_reo_error_status error;
  1866. uint32_t peer_mdata;
  1867. uint8_t *rx_tlv_hdr;
  1868. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1869. uint8_t mac_id = 0;
  1870. struct dp_pdev *rx_pdev;
  1871. struct dp_srng *dp_rxdma_srng;
  1872. struct rx_desc_pool *rx_desc_pool;
  1873. struct dp_soc *soc = int_ctx->soc;
  1874. uint8_t ring_id = 0;
  1875. uint8_t core_id = 0;
  1876. struct cdp_tid_rx_stats *tid_stats;
  1877. qdf_nbuf_t nbuf_head;
  1878. qdf_nbuf_t nbuf_tail;
  1879. qdf_nbuf_t deliver_list_head;
  1880. qdf_nbuf_t deliver_list_tail;
  1881. uint32_t num_rx_bufs_reaped = 0;
  1882. uint32_t intr_id;
  1883. struct hif_opaque_softc *scn;
  1884. int32_t tid = 0;
  1885. bool is_prev_msdu_last = true;
  1886. uint32_t num_entries_avail = 0;
  1887. uint32_t rx_ol_pkt_cnt = 0;
  1888. uint32_t num_entries = 0;
  1889. struct hal_rx_msdu_metadata msdu_metadata;
  1890. QDF_STATUS status;
  1891. qdf_nbuf_t ebuf_head;
  1892. qdf_nbuf_t ebuf_tail;
  1893. DP_HIST_INIT();
  1894. qdf_assert_always(soc && hal_ring_hdl);
  1895. hal_soc = soc->hal_soc;
  1896. qdf_assert_always(hal_soc);
  1897. scn = soc->hif_handle;
  1898. hif_pm_runtime_mark_dp_rx_busy(scn);
  1899. intr_id = int_ctx->dp_intr_id;
  1900. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1901. more_data:
  1902. /* reset local variables here to be re-used in the function */
  1903. nbuf_head = NULL;
  1904. nbuf_tail = NULL;
  1905. deliver_list_head = NULL;
  1906. deliver_list_tail = NULL;
  1907. peer = NULL;
  1908. vdev = NULL;
  1909. num_rx_bufs_reaped = 0;
  1910. ebuf_head = NULL;
  1911. ebuf_tail = NULL;
  1912. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1913. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1914. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1915. qdf_mem_zero(head, sizeof(head));
  1916. qdf_mem_zero(tail, sizeof(tail));
  1917. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1918. /*
  1919. * Need API to convert from hal_ring pointer to
  1920. * Ring Type / Ring Id combo
  1921. */
  1922. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1923. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1924. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1925. goto done;
  1926. }
  1927. /*
  1928. * start reaping the buffers from reo ring and queue
  1929. * them in per vdev queue.
  1930. * Process the received pkts in a different per vdev loop.
  1931. */
  1932. while (qdf_likely(quota &&
  1933. (ring_desc = hal_srng_dst_peek(hal_soc,
  1934. hal_ring_hdl)))) {
  1935. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1936. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1937. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1939. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1940. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1941. /* Don't know how to deal with this -- assert */
  1942. qdf_assert(0);
  1943. }
  1944. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  1945. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1946. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  1947. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1948. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  1949. break;
  1950. }
  1951. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1952. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  1953. ring_desc, rx_desc);
  1954. if (QDF_IS_STATUS_ERROR(status)) {
  1955. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  1956. qdf_assert_always(rx_desc->unmapped);
  1957. dp_ipa_handle_rx_buf_smmu_mapping(
  1958. soc,
  1959. rx_desc->nbuf,
  1960. RX_DATA_BUFFER_SIZE,
  1961. false);
  1962. qdf_nbuf_unmap_nbytes_single(
  1963. soc->osdev,
  1964. rx_desc->nbuf,
  1965. QDF_DMA_FROM_DEVICE,
  1966. RX_DATA_BUFFER_SIZE);
  1967. rx_desc->unmapped = 1;
  1968. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1969. rx_desc->pool_id);
  1970. dp_rx_add_to_free_desc_list(
  1971. &head[rx_desc->pool_id],
  1972. &tail[rx_desc->pool_id],
  1973. rx_desc);
  1974. }
  1975. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1976. continue;
  1977. }
  1978. /*
  1979. * this is a unlikely scenario where the host is reaping
  1980. * a descriptor which it already reaped just a while ago
  1981. * but is yet to replenish it back to HW.
  1982. * In this case host will dump the last 128 descriptors
  1983. * including the software descriptor rx_desc and assert.
  1984. */
  1985. if (qdf_unlikely(!rx_desc->in_use)) {
  1986. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1987. dp_info_rl("Reaping rx_desc not in use!");
  1988. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1989. ring_desc, rx_desc);
  1990. /* ignore duplicate RX desc and continue to process */
  1991. /* Pop out the descriptor */
  1992. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1993. continue;
  1994. }
  1995. status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1996. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1997. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1998. rx_desc->in_err_state = 1;
  1999. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2000. continue;
  2001. }
  2002. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  2003. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  2004. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  2005. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2006. ring_desc, rx_desc);
  2007. }
  2008. /* Get MPDU DESC info */
  2009. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  2010. /* Get MSDU DESC info */
  2011. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  2012. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  2013. HAL_MSDU_F_MSDU_CONTINUATION)) {
  2014. /* previous msdu has end bit set, so current one is
  2015. * the new MPDU
  2016. */
  2017. if (is_prev_msdu_last) {
  2018. /* Get number of entries available in HW ring */
  2019. num_entries_avail =
  2020. hal_srng_dst_num_valid(hal_soc,
  2021. hal_ring_hdl, 1);
  2022. /* For new MPDU check if we can read complete
  2023. * MPDU by comparing the number of buffers
  2024. * available and number of buffers needed to
  2025. * reap this MPDU
  2026. */
  2027. if (((msdu_desc_info.msdu_len /
  2028. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  2029. 1)) > num_entries_avail) {
  2030. DP_STATS_INC(
  2031. soc,
  2032. rx.msdu_scatter_wait_break,
  2033. 1);
  2034. break;
  2035. }
  2036. is_prev_msdu_last = false;
  2037. }
  2038. }
  2039. core_id = smp_processor_id();
  2040. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  2041. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  2042. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  2043. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  2044. HAL_MPDU_F_RAW_AMPDU))
  2045. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  2046. if (!is_prev_msdu_last &&
  2047. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2048. is_prev_msdu_last = true;
  2049. /* Pop out the descriptor*/
  2050. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2051. rx_bufs_reaped[rx_desc->pool_id]++;
  2052. peer_mdata = mpdu_desc_info.peer_meta_data;
  2053. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  2054. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  2055. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  2056. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  2057. /*
  2058. * save msdu flags first, last and continuation msdu in
  2059. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  2060. * length to nbuf->cb. This ensures the info required for
  2061. * per pkt processing is always in the same cache line.
  2062. * This helps in improving throughput for smaller pkt
  2063. * sizes.
  2064. */
  2065. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  2066. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  2067. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  2068. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  2069. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2070. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  2071. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  2072. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  2073. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  2074. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  2075. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  2076. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  2077. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  2078. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  2079. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  2080. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  2081. /*
  2082. * move unmap after scattered msdu waiting break logic
  2083. * in case double skb unmap happened.
  2084. */
  2085. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2086. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2087. rx_desc_pool->buf_size,
  2088. false);
  2089. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2090. QDF_DMA_FROM_DEVICE,
  2091. rx_desc_pool->buf_size);
  2092. rx_desc->unmapped = 1;
  2093. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  2094. ebuf_tail, rx_desc);
  2095. /*
  2096. * if continuation bit is set then we have MSDU spread
  2097. * across multiple buffers, let us not decrement quota
  2098. * till we reap all buffers of that MSDU.
  2099. */
  2100. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  2101. quota -= 1;
  2102. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2103. &tail[rx_desc->pool_id],
  2104. rx_desc);
  2105. num_rx_bufs_reaped++;
  2106. /*
  2107. * only if complete msdu is received for scatter case,
  2108. * then allow break.
  2109. */
  2110. if (is_prev_msdu_last &&
  2111. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  2112. break;
  2113. }
  2114. done:
  2115. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2116. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2117. /*
  2118. * continue with next mac_id if no pkts were reaped
  2119. * from that pool
  2120. */
  2121. if (!rx_bufs_reaped[mac_id])
  2122. continue;
  2123. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2124. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2125. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2126. rx_desc_pool, rx_bufs_reaped[mac_id],
  2127. &head[mac_id], &tail[mac_id]);
  2128. }
  2129. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  2130. /* Peer can be NULL is case of LFR */
  2131. if (qdf_likely(peer))
  2132. vdev = NULL;
  2133. /*
  2134. * BIG loop where each nbuf is dequeued from global queue,
  2135. * processed and queued back on a per vdev basis. These nbufs
  2136. * are sent to stack as and when we run out of nbufs
  2137. * or a new nbuf dequeued from global queue has a different
  2138. * vdev when compared to previous nbuf.
  2139. */
  2140. nbuf = nbuf_head;
  2141. while (nbuf) {
  2142. next = nbuf->next;
  2143. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  2144. nbuf = next;
  2145. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  2146. continue;
  2147. }
  2148. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2149. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2150. if (deliver_list_head && vdev && (vdev->vdev_id != vdev_id)) {
  2151. dp_rx_deliver_to_stack(soc, vdev, peer,
  2152. deliver_list_head,
  2153. deliver_list_tail);
  2154. deliver_list_head = NULL;
  2155. deliver_list_tail = NULL;
  2156. }
  2157. /* Get TID from struct cb->tid_val, save to tid */
  2158. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  2159. tid = qdf_nbuf_get_tid_val(nbuf);
  2160. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2161. if (qdf_unlikely(!peer)) {
  2162. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2163. DP_MOD_ID_RX);
  2164. } else if (peer && peer->peer_id != peer_id) {
  2165. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2166. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2167. DP_MOD_ID_RX);
  2168. }
  2169. if (peer) {
  2170. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  2171. qdf_dp_trace_set_track(nbuf, QDF_RX);
  2172. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  2173. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  2174. QDF_NBUF_RX_PKT_DATA_TRACK;
  2175. }
  2176. rx_bufs_used++;
  2177. if (qdf_likely(peer)) {
  2178. vdev = peer->vdev;
  2179. } else {
  2180. nbuf->next = NULL;
  2181. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2182. nbuf = next;
  2183. continue;
  2184. }
  2185. if (qdf_unlikely(!vdev)) {
  2186. qdf_nbuf_free(nbuf);
  2187. nbuf = next;
  2188. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2189. continue;
  2190. }
  2191. /* when hlos tid override is enabled, save tid in
  2192. * skb->priority
  2193. */
  2194. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  2195. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  2196. qdf_nbuf_set_priority(nbuf, tid);
  2197. rx_pdev = vdev->pdev;
  2198. DP_RX_TID_SAVE(nbuf, tid);
  2199. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  2200. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  2201. soc->wlan_cfg_ctx)))
  2202. qdf_nbuf_set_timestamp(nbuf);
  2203. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  2204. tid_stats =
  2205. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  2206. /*
  2207. * Check if DMA completed -- msdu_done is the last bit
  2208. * to be written
  2209. */
  2210. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  2211. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  2212. dp_err("MSDU DONE failure");
  2213. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  2214. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  2215. QDF_TRACE_LEVEL_INFO);
  2216. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  2217. qdf_nbuf_free(nbuf);
  2218. qdf_assert(0);
  2219. nbuf = next;
  2220. continue;
  2221. }
  2222. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  2223. /*
  2224. * First IF condition:
  2225. * 802.11 Fragmented pkts are reinjected to REO
  2226. * HW block as SG pkts and for these pkts we only
  2227. * need to pull the RX TLVS header length.
  2228. * Second IF condition:
  2229. * The below condition happens when an MSDU is spread
  2230. * across multiple buffers. This can happen in two cases
  2231. * 1. The nbuf size is smaller then the received msdu.
  2232. * ex: we have set the nbuf size to 2048 during
  2233. * nbuf_alloc. but we received an msdu which is
  2234. * 2304 bytes in size then this msdu is spread
  2235. * across 2 nbufs.
  2236. *
  2237. * 2. AMSDUs when RAW mode is enabled.
  2238. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  2239. * across 1st nbuf and 2nd nbuf and last MSDU is
  2240. * spread across 2nd nbuf and 3rd nbuf.
  2241. *
  2242. * for these scenarios let us create a skb frag_list and
  2243. * append these buffers till the last MSDU of the AMSDU
  2244. * Third condition:
  2245. * This is the most likely case, we receive 802.3 pkts
  2246. * decapsulated by HW, here we need to set the pkt length.
  2247. */
  2248. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  2249. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2250. bool is_mcbc, is_sa_vld, is_da_vld;
  2251. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  2252. rx_tlv_hdr);
  2253. is_sa_vld =
  2254. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  2255. rx_tlv_hdr);
  2256. is_da_vld =
  2257. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  2258. rx_tlv_hdr);
  2259. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  2260. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  2261. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  2262. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  2263. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2264. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2265. nbuf = dp_rx_sg_create(nbuf);
  2266. next = nbuf->next;
  2267. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2268. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  2269. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  2270. } else {
  2271. qdf_nbuf_free(nbuf);
  2272. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  2273. dp_info_rl("scatter msdu len %d, dropped",
  2274. msdu_len);
  2275. nbuf = next;
  2276. continue;
  2277. }
  2278. } else {
  2279. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2280. pkt_len = msdu_len +
  2281. msdu_metadata.l3_hdr_pad +
  2282. RX_PKT_TLVS_LEN;
  2283. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2284. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  2285. }
  2286. /*
  2287. * process frame for mulitpass phrase processing
  2288. */
  2289. if (qdf_unlikely(vdev->multipass_en)) {
  2290. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  2291. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  2292. qdf_nbuf_free(nbuf);
  2293. nbuf = next;
  2294. continue;
  2295. }
  2296. }
  2297. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  2298. QDF_TRACE(QDF_MODULE_ID_DP,
  2299. QDF_TRACE_LEVEL_ERROR,
  2300. FL("Policy Check Drop pkt"));
  2301. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  2302. /* Drop & free packet */
  2303. qdf_nbuf_free(nbuf);
  2304. /* Statistics */
  2305. nbuf = next;
  2306. continue;
  2307. }
  2308. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  2309. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  2310. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2311. rx_tlv_hdr) ==
  2312. false))) {
  2313. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2314. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2315. qdf_nbuf_free(nbuf);
  2316. nbuf = next;
  2317. continue;
  2318. }
  2319. if (soc->process_rx_status)
  2320. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2321. /* Update the protocol tag in SKB based on CCE metadata */
  2322. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2323. reo_ring_num, false, true);
  2324. /* Update the flow tag in SKB based on FSE metadata */
  2325. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2326. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2327. ring_id, tid_stats);
  2328. if (qdf_unlikely(vdev->mesh_vdev)) {
  2329. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2330. == QDF_STATUS_SUCCESS) {
  2331. QDF_TRACE(QDF_MODULE_ID_DP,
  2332. QDF_TRACE_LEVEL_INFO_MED,
  2333. FL("mesh pkt filtered"));
  2334. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2335. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2336. 1);
  2337. qdf_nbuf_free(nbuf);
  2338. nbuf = next;
  2339. continue;
  2340. }
  2341. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2342. }
  2343. if (qdf_likely(vdev->rx_decap_type ==
  2344. htt_cmn_pkt_type_ethernet) &&
  2345. qdf_likely(!vdev->mesh_vdev)) {
  2346. /* WDS Destination Address Learning */
  2347. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2348. /* Due to HW issue, sometimes we see that the sa_idx
  2349. * and da_idx are invalid with sa_valid and da_valid
  2350. * bits set
  2351. *
  2352. * in this case we also see that value of
  2353. * sa_sw_peer_id is set as 0
  2354. *
  2355. * Drop the packet if sa_idx and da_idx OOB or
  2356. * sa_sw_peerid is 0
  2357. */
  2358. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2359. msdu_metadata)) {
  2360. qdf_nbuf_free(nbuf);
  2361. nbuf = next;
  2362. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2363. continue;
  2364. }
  2365. /* WDS Source Port Learning */
  2366. if (qdf_likely(vdev->wds_enabled))
  2367. dp_rx_wds_srcport_learn(soc,
  2368. rx_tlv_hdr,
  2369. peer,
  2370. nbuf,
  2371. msdu_metadata);
  2372. /* Intrabss-fwd */
  2373. if (dp_rx_check_ap_bridge(vdev))
  2374. if (dp_rx_intrabss_fwd(soc,
  2375. peer,
  2376. rx_tlv_hdr,
  2377. nbuf,
  2378. msdu_metadata)) {
  2379. nbuf = next;
  2380. tid_stats->intrabss_cnt++;
  2381. continue; /* Get next desc */
  2382. }
  2383. }
  2384. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2385. dp_rx_update_stats(soc, nbuf);
  2386. DP_RX_LIST_APPEND(deliver_list_head,
  2387. deliver_list_tail,
  2388. nbuf);
  2389. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2390. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2391. if (qdf_unlikely(peer->in_twt))
  2392. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  2393. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2394. tid_stats->delivered_to_stack++;
  2395. nbuf = next;
  2396. }
  2397. if (qdf_likely(deliver_list_head)) {
  2398. if (qdf_likely(peer))
  2399. dp_rx_deliver_to_stack(soc, vdev, peer,
  2400. deliver_list_head,
  2401. deliver_list_tail);
  2402. else {
  2403. nbuf = deliver_list_head;
  2404. while (nbuf) {
  2405. next = nbuf->next;
  2406. nbuf->next = NULL;
  2407. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2408. nbuf = next;
  2409. }
  2410. }
  2411. }
  2412. if (qdf_likely(peer))
  2413. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2414. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2415. if (quota) {
  2416. num_pending =
  2417. dp_rx_srng_get_num_pending(hal_soc,
  2418. hal_ring_hdl,
  2419. num_entries,
  2420. &near_full);
  2421. if (num_pending) {
  2422. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2423. if (!hif_exec_should_yield(scn, intr_id))
  2424. goto more_data;
  2425. if (qdf_unlikely(near_full)) {
  2426. DP_STATS_INC(soc, rx.near_full, 1);
  2427. goto more_data;
  2428. }
  2429. }
  2430. }
  2431. if (vdev && vdev->osif_fisa_flush)
  2432. vdev->osif_fisa_flush(soc, reo_ring_num);
  2433. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2434. vdev->osif_gro_flush(vdev->osif_vdev,
  2435. reo_ring_num);
  2436. }
  2437. }
  2438. /* Update histogram statistics by looping through pdev's */
  2439. DP_RX_HIST_STATS_PER_PDEV();
  2440. return rx_bufs_used; /* Assume no scale factor for now */
  2441. }
  2442. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2443. {
  2444. QDF_STATUS ret;
  2445. if (vdev->osif_rx_flush) {
  2446. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2447. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2448. dp_err("Failed to flush rx pkts for vdev %d\n",
  2449. vdev->vdev_id);
  2450. return ret;
  2451. }
  2452. }
  2453. return QDF_STATUS_SUCCESS;
  2454. }
  2455. static QDF_STATUS
  2456. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2457. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2458. struct dp_pdev *dp_pdev,
  2459. struct rx_desc_pool *rx_desc_pool)
  2460. {
  2461. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2462. (nbuf_frag_info_t->virt_addr).nbuf =
  2463. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2464. RX_BUFFER_RESERVATION,
  2465. rx_desc_pool->buf_alignment, FALSE);
  2466. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2467. dp_err("nbuf alloc failed");
  2468. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2469. return ret;
  2470. }
  2471. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2472. (nbuf_frag_info_t->virt_addr).nbuf,
  2473. QDF_DMA_FROM_DEVICE,
  2474. rx_desc_pool->buf_size);
  2475. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2476. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2477. dp_err("nbuf map failed");
  2478. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2479. return ret;
  2480. }
  2481. nbuf_frag_info_t->paddr =
  2482. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2483. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2484. &nbuf_frag_info_t->paddr,
  2485. rx_desc_pool);
  2486. if (ret == QDF_STATUS_E_FAILURE) {
  2487. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  2488. (nbuf_frag_info_t->virt_addr).nbuf,
  2489. QDF_DMA_FROM_DEVICE,
  2490. rx_desc_pool->buf_size);
  2491. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2492. dp_err("nbuf check x86 failed");
  2493. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2494. return ret;
  2495. }
  2496. return QDF_STATUS_SUCCESS;
  2497. }
  2498. QDF_STATUS
  2499. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2500. struct dp_srng *dp_rxdma_srng,
  2501. struct rx_desc_pool *rx_desc_pool,
  2502. uint32_t num_req_buffers)
  2503. {
  2504. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2505. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2506. union dp_rx_desc_list_elem_t *next;
  2507. void *rxdma_ring_entry;
  2508. qdf_dma_addr_t paddr;
  2509. struct dp_rx_nbuf_frag_info *nf_info;
  2510. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2511. uint32_t buffer_index, nbuf_ptrs_per_page;
  2512. qdf_nbuf_t nbuf;
  2513. QDF_STATUS ret;
  2514. int page_idx, total_pages;
  2515. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2516. union dp_rx_desc_list_elem_t *tail = NULL;
  2517. int sync_hw_ptr = 1;
  2518. uint32_t num_entries_avail;
  2519. if (qdf_unlikely(!rxdma_srng)) {
  2520. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2521. return QDF_STATUS_E_FAILURE;
  2522. }
  2523. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2524. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2525. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2526. rxdma_srng,
  2527. sync_hw_ptr);
  2528. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2529. if (!num_entries_avail) {
  2530. dp_err("Num of available entries is zero, nothing to do");
  2531. return QDF_STATUS_E_NOMEM;
  2532. }
  2533. if (num_entries_avail < num_req_buffers)
  2534. num_req_buffers = num_entries_avail;
  2535. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2536. num_req_buffers, &desc_list, &tail);
  2537. if (!nr_descs) {
  2538. dp_err("no free rx_descs in freelist");
  2539. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2540. return QDF_STATUS_E_NOMEM;
  2541. }
  2542. dp_debug("got %u RX descs for driver attach", nr_descs);
  2543. /*
  2544. * Try to allocate pointers to the nbuf one page at a time.
  2545. * Take pointers that can fit in one page of memory and
  2546. * iterate through the total descriptors that need to be
  2547. * allocated in order of pages. Reuse the pointers that
  2548. * have been allocated to fit in one page across each
  2549. * iteration to index into the nbuf.
  2550. */
  2551. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  2552. /*
  2553. * Add an extra page to store the remainder if any
  2554. */
  2555. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  2556. total_pages++;
  2557. nf_info = qdf_mem_malloc(PAGE_SIZE);
  2558. if (!nf_info) {
  2559. dp_err("failed to allocate nbuf array");
  2560. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2561. QDF_BUG(0);
  2562. return QDF_STATUS_E_NOMEM;
  2563. }
  2564. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  2565. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2566. qdf_mem_zero(nf_info, PAGE_SIZE);
  2567. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2568. /*
  2569. * The last page of buffer pointers may not be required
  2570. * completely based on the number of descriptors. Below
  2571. * check will ensure we are allocating only the
  2572. * required number of descriptors.
  2573. */
  2574. if (nr_nbuf_total >= nr_descs)
  2575. break;
  2576. /* Flag is set while pdev rx_desc_pool initialization */
  2577. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2578. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2579. &nf_info[nr_nbuf], dp_pdev,
  2580. rx_desc_pool);
  2581. else
  2582. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2583. &nf_info[nr_nbuf], dp_pdev,
  2584. rx_desc_pool);
  2585. if (QDF_IS_STATUS_ERROR(ret))
  2586. break;
  2587. nr_nbuf_total++;
  2588. }
  2589. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2590. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2591. rxdma_ring_entry =
  2592. hal_srng_src_get_next(dp_soc->hal_soc,
  2593. rxdma_srng);
  2594. qdf_assert_always(rxdma_ring_entry);
  2595. next = desc_list->next;
  2596. paddr = nf_info[buffer_index].paddr;
  2597. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2598. /* Flag is set while pdev rx_desc_pool initialization */
  2599. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2600. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2601. &nf_info[buffer_index]);
  2602. else
  2603. dp_rx_desc_prep(&desc_list->rx_desc,
  2604. &nf_info[buffer_index]);
  2605. desc_list->rx_desc.in_use = 1;
  2606. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2607. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2608. __func__,
  2609. RX_DESC_REPLENISHED);
  2610. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2611. desc_list->rx_desc.cookie,
  2612. rx_desc_pool->owner);
  2613. dp_ipa_handle_rx_buf_smmu_mapping(
  2614. dp_soc, nbuf,
  2615. rx_desc_pool->buf_size,
  2616. true);
  2617. desc_list = next;
  2618. }
  2619. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2620. }
  2621. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2622. qdf_mem_free(nf_info);
  2623. if (!nr_nbuf_total) {
  2624. dp_err("No nbuf's allocated");
  2625. QDF_BUG(0);
  2626. return QDF_STATUS_E_RESOURCES;
  2627. }
  2628. /* No need to count the number of bytes received during replenish.
  2629. * Therefore set replenish.pkts.bytes as 0.
  2630. */
  2631. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2632. return QDF_STATUS_SUCCESS;
  2633. }
  2634. /**
  2635. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2636. * monitor destination ring via frag.
  2637. *
  2638. * Enable this flag only for monitor destination buffer processing
  2639. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2640. * If flag is set then frag based function will be called for alloc,
  2641. * map, prep desc and free ops for desc buffer else normal nbuf based
  2642. * function will be called.
  2643. *
  2644. * @rx_desc_pool: Rx desc pool
  2645. * @is_mon_dest_desc: Is it for monitor dest buffer
  2646. *
  2647. * Return: None
  2648. */
  2649. #ifdef DP_RX_MON_MEM_FRAG
  2650. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2651. bool is_mon_dest_desc)
  2652. {
  2653. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2654. }
  2655. #else
  2656. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2657. bool is_mon_dest_desc)
  2658. {
  2659. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2660. }
  2661. #endif
  2662. /*
  2663. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2664. * pool
  2665. *
  2666. * @pdev: core txrx pdev context
  2667. *
  2668. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2669. * QDF_STATUS_E_NOMEM
  2670. */
  2671. QDF_STATUS
  2672. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2673. {
  2674. struct dp_soc *soc = pdev->soc;
  2675. uint32_t rxdma_entries;
  2676. uint32_t rx_sw_desc_num;
  2677. struct dp_srng *dp_rxdma_srng;
  2678. struct rx_desc_pool *rx_desc_pool;
  2679. uint32_t status = QDF_STATUS_SUCCESS;
  2680. int mac_for_pdev;
  2681. mac_for_pdev = pdev->lmac_id;
  2682. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2684. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2685. return status;
  2686. }
  2687. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2688. rxdma_entries = dp_rxdma_srng->num_entries;
  2689. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2690. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2691. status = dp_rx_desc_pool_alloc(soc,
  2692. rx_sw_desc_num,
  2693. rx_desc_pool);
  2694. if (status != QDF_STATUS_SUCCESS)
  2695. return status;
  2696. return status;
  2697. }
  2698. /*
  2699. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2700. *
  2701. * @pdev: core txrx pdev context
  2702. */
  2703. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2704. {
  2705. int mac_for_pdev = pdev->lmac_id;
  2706. struct dp_soc *soc = pdev->soc;
  2707. struct rx_desc_pool *rx_desc_pool;
  2708. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2709. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2710. }
  2711. /*
  2712. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2713. *
  2714. * @pdev: core txrx pdev context
  2715. *
  2716. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2717. * QDF_STATUS_E_NOMEM
  2718. */
  2719. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2720. {
  2721. int mac_for_pdev = pdev->lmac_id;
  2722. struct dp_soc *soc = pdev->soc;
  2723. uint32_t rxdma_entries;
  2724. uint32_t rx_sw_desc_num;
  2725. struct dp_srng *dp_rxdma_srng;
  2726. struct rx_desc_pool *rx_desc_pool;
  2727. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2728. /**
  2729. * If NSS is enabled, rx_desc_pool is already filled.
  2730. * Hence, just disable desc_pool frag flag.
  2731. */
  2732. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2733. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2734. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2735. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2736. return QDF_STATUS_SUCCESS;
  2737. }
  2738. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2739. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2740. return QDF_STATUS_E_NOMEM;
  2741. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2742. rxdma_entries = dp_rxdma_srng->num_entries;
  2743. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2744. rx_sw_desc_num =
  2745. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2746. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2747. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2748. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2749. /* Disable monitor dest processing via frag */
  2750. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2751. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2752. rx_sw_desc_num, rx_desc_pool);
  2753. return QDF_STATUS_SUCCESS;
  2754. }
  2755. /*
  2756. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2757. * @pdev: core txrx pdev context
  2758. *
  2759. * This function resets the freelist of rx descriptors and destroys locks
  2760. * associated with this list of descriptors.
  2761. */
  2762. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2763. {
  2764. int mac_for_pdev = pdev->lmac_id;
  2765. struct dp_soc *soc = pdev->soc;
  2766. struct rx_desc_pool *rx_desc_pool;
  2767. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2768. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  2769. }
  2770. /*
  2771. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2772. *
  2773. * @pdev: core txrx pdev context
  2774. *
  2775. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2776. * QDF_STATUS_E_NOMEM
  2777. */
  2778. QDF_STATUS
  2779. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2780. {
  2781. int mac_for_pdev = pdev->lmac_id;
  2782. struct dp_soc *soc = pdev->soc;
  2783. struct dp_srng *dp_rxdma_srng;
  2784. struct rx_desc_pool *rx_desc_pool;
  2785. uint32_t rxdma_entries;
  2786. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2787. rxdma_entries = dp_rxdma_srng->num_entries;
  2788. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2789. /* Initialize RX buffer pool which will be
  2790. * used during low memory conditions
  2791. */
  2792. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2793. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2794. rx_desc_pool, rxdma_entries - 1);
  2795. }
  2796. /*
  2797. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2798. *
  2799. * @pdev: core txrx pdev context
  2800. */
  2801. void
  2802. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2803. {
  2804. int mac_for_pdev = pdev->lmac_id;
  2805. struct dp_soc *soc = pdev->soc;
  2806. struct rx_desc_pool *rx_desc_pool;
  2807. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2808. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2809. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2810. }
  2811. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2812. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2813. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2814. uint8_t *rx_tlv_hdr)
  2815. {
  2816. uint32_t l2_hdr_offset = 0;
  2817. uint16_t msdu_len = 0;
  2818. uint32_t skip_len;
  2819. l2_hdr_offset =
  2820. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2821. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2822. skip_len = l2_hdr_offset;
  2823. } else {
  2824. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2825. skip_len = l2_hdr_offset + RX_PKT_TLVS_LEN;
  2826. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2827. }
  2828. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2829. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2830. qdf_nbuf_pull_head(nbuf, skip_len);
  2831. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2832. qdf_nbuf_set_exc_frame(nbuf, 1);
  2833. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2834. nbuf, NULL);
  2835. return true;
  2836. }
  2837. return false;
  2838. }
  2839. #endif