cfg_dp.h 39 KB

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  1. /*
  2. * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * DOC: This file contains definitions of Data Path configuration.
  20. */
  21. #ifndef _CFG_DP_H_
  22. #define _CFG_DP_H_
  23. #include "cfg_define.h"
  24. #include "wlan_init_cfg.h"
  25. #define WLAN_CFG_MAX_CLIENTS 64
  26. #define WLAN_CFG_MAX_CLIENTS_MIN 8
  27. #define WLAN_CFG_MAX_CLIENTS_MAX 64
  28. /* Change this to a lower value to enforce scattered idle list mode */
  29. #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
  30. #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
  31. #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
  32. #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
  33. defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
  34. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
  35. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
  36. #else
  37. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
  38. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
  39. #endif
  40. #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
  41. #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
  42. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  43. #define WLAN_CFG_PER_PDEV_RX_RING 0
  44. #define WLAN_CFG_PER_PDEV_LMAC_RING 0
  45. #define WLAN_LRO_ENABLE 0
  46. #ifdef QCA_WIFI_QCA6750
  47. #define WLAN_CFG_MAC_PER_TARGET 1
  48. #else
  49. #define WLAN_CFG_MAC_PER_TARGET 2
  50. #endif
  51. #ifdef IPA_OFFLOAD
  52. /* Size of TCL TX Ring */
  53. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  54. #define WLAN_CFG_TX_RING_SIZE 2048
  55. #else
  56. #define WLAN_CFG_TX_RING_SIZE 1024
  57. #endif
  58. #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 1024
  59. #define WLAN_CFG_IPA_TX_RING_SIZE 1024
  60. #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 8096
  61. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 1024
  62. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024
  63. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 8096
  64. #define WLAN_CFG_PER_PDEV_TX_RING 0
  65. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
  66. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
  67. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
  68. #else
  69. #define WLAN_CFG_TX_RING_SIZE 512
  70. #define WLAN_CFG_PER_PDEV_TX_RING 1
  71. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
  72. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
  73. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
  74. #endif
  75. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  76. #define WLAN_CFG_TX_COMP_RING_SIZE 4096
  77. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  78. #define WLAN_CFG_NUM_TX_DESC 4096
  79. #define WLAN_CFG_NUM_TX_EXT_DESC 4096
  80. #else
  81. #define WLAN_CFG_TX_COMP_RING_SIZE 1024
  82. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  83. #define WLAN_CFG_NUM_TX_DESC 1024
  84. #define WLAN_CFG_NUM_TX_EXT_DESC 1024
  85. #endif
  86. /* Interrupt Mitigation - Batch threshold in terms of number of frames */
  87. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
  88. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
  89. /* Interrupt Mitigation - Timer threshold in us */
  90. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
  91. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
  92. #ifdef WLAN_DP_PER_RING_TYPE_CONFIG
  93. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \
  94. WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING
  95. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \
  96. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING
  97. #else
  98. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
  99. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
  100. #endif
  101. #endif
  102. #ifdef NBUF_MEMORY_DEBUG
  103. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF
  104. #else
  105. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF
  106. #endif
  107. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \
  108. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  109. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0
  110. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000
  111. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \
  112. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  113. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100
  114. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000
  115. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
  116. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512
  117. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0
  118. #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
  119. #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
  120. #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
  121. #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
  122. #define WLAN_CFG_TX_RING_SIZE_MIN 512
  123. #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000
  124. #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
  125. #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
  126. #define WLAN_CFG_NUM_TX_DESC_MIN 16
  127. #define WLAN_CFG_NUM_TX_DESC_MAX 32768
  128. #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16
  129. #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
  130. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
  131. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
  132. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0
  133. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
  134. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
  135. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
  136. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
  137. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
  138. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
  139. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
  140. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
  141. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000
  142. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
  143. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
  144. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
  145. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
  146. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
  147. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512
  148. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
  149. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
  150. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
  151. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
  152. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
  153. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  154. /* Per vdev pools */
  155. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  156. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  157. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  158. #ifdef TX_PER_PDEV_DESC_POOL
  159. #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
  160. #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
  161. #else /* TX_PER_PDEV_DESC_POOL */
  162. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  163. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  164. #endif /* TX_PER_PDEV_DESC_POOL */
  165. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  166. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
  167. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
  168. #define WLAN_CFG_HTT_PKT_TYPE 2
  169. #define WLAN_CFG_HTT_PKT_TYPE_MIN 2
  170. #define WLAN_CFG_HTT_PKT_TYPE_MAX 2
  171. #define WLAN_CFG_MAX_PEER_ID 64
  172. #define WLAN_CFG_MAX_PEER_ID_MIN 64
  173. #define WLAN_CFG_MAX_PEER_ID_MAX 64
  174. #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
  175. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
  176. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
  177. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  178. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
  179. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS
  180. #if defined(CONFIG_BERYLLIUM)
  181. #define WLAN_CFG_NUM_REO_DEST_RING 8
  182. #else
  183. #define WLAN_CFG_NUM_REO_DEST_RING 4
  184. #endif
  185. #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
  186. #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS
  187. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2
  188. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1
  189. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3
  190. #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2
  191. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1
  192. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3
  193. #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024
  194. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
  195. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024
  196. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 32
  197. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32
  198. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 32
  199. #define WLAN_CFG_TCL_STATUS_RING_SIZE 32
  200. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
  201. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
  202. #if defined(QCA_WIFI_QCA6290)
  203. #define WLAN_CFG_REO_DST_RING_SIZE 1024
  204. #else
  205. #define WLAN_CFG_REO_DST_RING_SIZE 2048
  206. #endif
  207. #define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024
  208. #define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048
  209. #define WLAN_CFG_REO_REINJECT_RING_SIZE 128
  210. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
  211. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128
  212. #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
  213. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
  214. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  215. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_WCN7850)
  216. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
  217. #else
  218. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192
  219. #endif
  220. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256
  221. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
  222. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512
  223. #define WLAN_CFG_REO_CMD_RING_SIZE 128
  224. #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
  225. #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
  226. #define WLAN_CFG_REO_STATUS_RING_SIZE 256
  227. #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
  228. #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
  229. #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
  230. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
  231. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024
  232. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
  233. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
  234. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
  235. #define WLAN_CFG_TX_DESC_LIMIT_0 0
  236. #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
  237. #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
  238. #define WLAN_CFG_TX_DESC_LIMIT_1 0
  239. #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
  240. #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
  241. #define WLAN_CFG_TX_DESC_LIMIT_2 0
  242. #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
  243. #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
  244. #define WLAN_CFG_TX_DEVICE_LIMIT 65536
  245. #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384
  246. #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536
  247. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024
  248. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128
  249. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024
  250. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
  251. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
  252. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
  253. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
  254. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
  255. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
  256. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
  257. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
  258. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
  259. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
  260. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
  261. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
  262. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
  263. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
  264. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
  265. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32
  266. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0
  267. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256
  268. /**
  269. * Allocate as many RX descriptors as buffers in the SW2RXDMA
  270. * ring. This value may need to be tuned later.
  271. */
  272. #if defined(QCA_HOST2FW_RXBUF_RING)
  273. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  274. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  275. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
  276. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  277. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  278. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 4096
  279. /**
  280. * For low memory AP cases using 1 will reduce the rx descriptors memory req
  281. */
  282. #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
  283. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  284. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  285. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  286. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  287. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  288. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  289. /**
  290. * AP use cases need to allocate more RX Descriptors than the number of
  291. * entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
  292. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  293. * multiplication factor of 3, to allocate three times as many RX descriptors
  294. * as RX buffers.
  295. */
  296. #else
  297. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
  298. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  299. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  300. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288
  301. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096
  302. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  303. #endif //QCA_HOST2FW_RXBUF_RING
  304. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384
  305. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1
  306. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384
  307. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128
  308. #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10
  309. #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1
  310. #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10
  311. #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF
  312. #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1
  313. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF
  314. #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1
  315. #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2
  316. #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3
  317. #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1
  318. #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4
  319. /* DP INI Declerations */
  320. #define CFG_DP_HTT_PACKET_TYPE \
  321. CFG_INI_UINT("dp_htt_packet_type", \
  322. WLAN_CFG_HTT_PKT_TYPE_MIN, \
  323. WLAN_CFG_HTT_PKT_TYPE_MAX, \
  324. WLAN_CFG_HTT_PKT_TYPE, \
  325. CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
  326. #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
  327. CFG_INI_UINT("dp_int_batch_threshold_other", \
  328. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
  329. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
  330. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
  331. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
  332. #define CFG_DP_INT_BATCH_THRESHOLD_RX \
  333. CFG_INI_UINT("dp_int_batch_threshold_rx", \
  334. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
  335. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
  336. WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
  337. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
  338. #define CFG_DP_INT_BATCH_THRESHOLD_TX \
  339. CFG_INI_UINT("dp_int_batch_threshold_tx", \
  340. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
  341. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
  342. WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
  343. CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
  344. #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
  345. CFG_INI_UINT("dp_int_timer_threshold_other", \
  346. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
  347. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
  348. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
  349. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
  350. #define CFG_DP_INT_TIMER_THRESHOLD_RX \
  351. CFG_INI_UINT("dp_int_timer_threshold_rx", \
  352. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
  353. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
  354. WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
  355. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
  356. #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
  357. CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
  358. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
  359. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
  360. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
  361. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
  362. #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
  363. CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
  364. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
  365. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
  366. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
  367. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
  368. #define CFG_DP_INT_TIMER_THRESHOLD_TX \
  369. CFG_INI_UINT("dp_int_timer_threshold_tx", \
  370. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
  371. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
  372. WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
  373. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
  374. #define CFG_DP_MAX_ALLOC_SIZE \
  375. CFG_INI_UINT("dp_max_alloc_size", \
  376. WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
  377. WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
  378. WLAN_CFG_MAX_ALLOC_SIZE, \
  379. CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
  380. #define CFG_DP_MAX_CLIENTS \
  381. CFG_INI_UINT("dp_max_clients", \
  382. WLAN_CFG_MAX_CLIENTS_MIN, \
  383. WLAN_CFG_MAX_CLIENTS_MAX, \
  384. WLAN_CFG_MAX_CLIENTS, \
  385. CFG_VALUE_OR_DEFAULT, "DP Max Clients")
  386. #define CFG_DP_MAX_PEER_ID \
  387. CFG_INI_UINT("dp_max_peer_id", \
  388. WLAN_CFG_MAX_PEER_ID_MIN, \
  389. WLAN_CFG_MAX_PEER_ID_MAX, \
  390. WLAN_CFG_MAX_PEER_ID, \
  391. CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
  392. #define CFG_DP_REO_DEST_RINGS \
  393. CFG_INI_UINT("dp_reo_dest_rings", \
  394. WLAN_CFG_NUM_REO_DEST_RING_MIN, \
  395. WLAN_CFG_NUM_REO_DEST_RING_MAX, \
  396. WLAN_CFG_NUM_REO_DEST_RING, \
  397. CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
  398. #define CFG_DP_TCL_DATA_RINGS \
  399. CFG_INI_UINT("dp_tcl_data_rings", \
  400. WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
  401. WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
  402. WLAN_CFG_NUM_TCL_DATA_RINGS, \
  403. CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
  404. #define CFG_DP_NSS_REO_DEST_RINGS \
  405. CFG_INI_UINT("dp_nss_reo_dest_rings", \
  406. WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \
  407. WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \
  408. WLAN_CFG_NSS_NUM_REO_DEST_RING, \
  409. CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings")
  410. #define CFG_DP_NSS_TCL_DATA_RINGS \
  411. CFG_INI_UINT("dp_nss_tcl_data_rings", \
  412. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \
  413. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \
  414. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \
  415. CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings")
  416. #define CFG_DP_TX_DESC \
  417. CFG_INI_UINT("dp_tx_desc", \
  418. WLAN_CFG_NUM_TX_DESC_MIN, \
  419. WLAN_CFG_NUM_TX_DESC_MAX, \
  420. WLAN_CFG_NUM_TX_DESC, \
  421. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
  422. #define CFG_DP_TX_EXT_DESC \
  423. CFG_INI_UINT("dp_tx_ext_desc", \
  424. WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
  425. WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
  426. WLAN_CFG_NUM_TX_EXT_DESC, \
  427. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
  428. #define CFG_DP_TX_EXT_DESC_POOLS \
  429. CFG_INI_UINT("dp_tx_ext_desc_pool", \
  430. WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
  431. WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
  432. WLAN_CFG_NUM_TXEXT_DESC_POOL, \
  433. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
  434. #define CFG_DP_PDEV_RX_RING \
  435. CFG_INI_UINT("dp_pdev_rx_ring", \
  436. WLAN_CFG_PER_PDEV_RX_RING_MIN, \
  437. WLAN_CFG_PER_PDEV_RX_RING_MAX, \
  438. WLAN_CFG_PER_PDEV_RX_RING, \
  439. CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
  440. #define CFG_DP_PDEV_TX_RING \
  441. CFG_INI_UINT("dp_pdev_tx_ring", \
  442. WLAN_CFG_PER_PDEV_TX_RING_MIN, \
  443. WLAN_CFG_PER_PDEV_TX_RING_MAX, \
  444. WLAN_CFG_PER_PDEV_TX_RING, \
  445. CFG_VALUE_OR_DEFAULT, \
  446. "DP PDEV Tx Ring")
  447. #define CFG_DP_RX_DEFRAG_TIMEOUT \
  448. CFG_INI_UINT("dp_rx_defrag_timeout", \
  449. WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
  450. WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
  451. WLAN_CFG_RX_DEFRAG_TIMEOUT, \
  452. CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
  453. #define CFG_DP_TX_COMPL_RING_SIZE \
  454. CFG_INI_UINT("dp_tx_compl_ring_size", \
  455. WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
  456. WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
  457. WLAN_CFG_TX_COMP_RING_SIZE, \
  458. CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
  459. #define CFG_DP_TX_RING_SIZE \
  460. CFG_INI_UINT("dp_tx_ring_size", \
  461. WLAN_CFG_TX_RING_SIZE_MIN,\
  462. WLAN_CFG_TX_RING_SIZE_MAX,\
  463. WLAN_CFG_TX_RING_SIZE,\
  464. CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
  465. #define CFG_DP_NSS_COMP_RING_SIZE \
  466. CFG_INI_UINT("dp_nss_comp_ring_size", \
  467. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
  468. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
  469. WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
  470. CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
  471. #define CFG_DP_PDEV_LMAC_RING \
  472. CFG_INI_UINT("dp_pdev_lmac_ring", \
  473. WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
  474. WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
  475. WLAN_CFG_PER_PDEV_LMAC_RING, \
  476. CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
  477. /*
  478. * <ini>
  479. * dp_rx_pending_hl_threshold - High threshold of frame number to start
  480. * frame dropping scheme
  481. * @Min: 0
  482. * @Max: 524288
  483. * @Default: 393216
  484. *
  485. * This ini entry is used to set a high limit threshold to start frame
  486. * dropping scheme
  487. *
  488. * Usage: External
  489. *
  490. * </ini>
  491. */
  492. #define CFG_DP_RX_PENDING_HL_THRESHOLD \
  493. CFG_INI_UINT("dp_rx_pending_hl_threshold", \
  494. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \
  495. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \
  496. WLAN_CFG_RX_PENDING_HL_THRESHOLD, \
  497. CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold")
  498. /*
  499. * <ini>
  500. * dp_rx_pending_lo_threshold - Low threshold of frame number to stop
  501. * frame dropping scheme
  502. * @Min: 100
  503. * @Max: 524288
  504. * @Default: 393216
  505. *
  506. * This ini entry is used to set a low limit threshold to stop frame
  507. * dropping scheme
  508. *
  509. * Usage: External
  510. *
  511. * </ini>
  512. */
  513. #define CFG_DP_RX_PENDING_LO_THRESHOLD \
  514. CFG_INI_UINT("dp_rx_pending_lo_threshold", \
  515. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \
  516. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \
  517. WLAN_CFG_RX_PENDING_LO_THRESHOLD, \
  518. CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold")
  519. #define CFG_DP_BASE_HW_MAC_ID \
  520. CFG_INI_UINT("dp_base_hw_macid", \
  521. 0, 1, 1, \
  522. CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
  523. #define CFG_DP_RX_HASH \
  524. CFG_INI_BOOL("dp_rx_hash", true, \
  525. "DP Rx Hash")
  526. #define CFG_DP_TSO \
  527. CFG_INI_BOOL("TSOEnable", false, \
  528. "DP TSO Enabled")
  529. #define CFG_DP_LRO \
  530. CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
  531. "DP LRO Enable")
  532. /*
  533. * <ini>
  534. * CFG_DP_SG - Enable the SG feature standalonely
  535. * @Min: 0
  536. * @Max: 1
  537. * @Default: 1
  538. *
  539. * This ini entry is used to enable/disable SG feature standalonely.
  540. * Also does Rome support SG on TX, lithium does not.
  541. * For example the lithium does not support SG on UDP frames.
  542. * Which is able to handle SG only for TSO frames(in case TSO is enabled).
  543. *
  544. * Usage: External
  545. *
  546. * </ini>
  547. */
  548. #define CFG_DP_SG \
  549. CFG_INI_BOOL("dp_sg_support", false, \
  550. "DP SG Enable")
  551. #define CFG_DP_GRO \
  552. CFG_INI_BOOL("GROEnable", false, \
  553. "DP GRO Enable")
  554. #define CFG_DP_OL_TX_CSUM \
  555. CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
  556. "DP tx csum Enable")
  557. #define CFG_DP_OL_RX_CSUM \
  558. CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
  559. "DP rx csum Enable")
  560. #define CFG_DP_RAWMODE \
  561. CFG_INI_BOOL("dp_rawmode_support", false, \
  562. "DP rawmode Enable")
  563. #define CFG_DP_PEER_FLOW_CTRL \
  564. CFG_INI_BOOL("dp_peer_flow_control_support", false, \
  565. "DP peer flow ctrl Enable")
  566. #define CFG_DP_NAPI \
  567. CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \
  568. "DP Napi Enabled")
  569. /*
  570. * <ini>
  571. * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode
  572. * @Min: 0
  573. * @Max: 1
  574. * @Default: 1
  575. *
  576. * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes.
  577. * This includes P2P device mode, P2P client mode and P2P GO mode.
  578. * The feature is enabled by default. To disable TX checksum for P2P, add the
  579. * following entry in ini file:
  580. * gEnableP2pIpTcpUdpChecksumOffload=0
  581. *
  582. * Usage: External
  583. *
  584. * </ini>
  585. */
  586. #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \
  587. CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \
  588. "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)")
  589. /*
  590. * <ini>
  591. * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode
  592. * @Min: 0
  593. * @Max: 1
  594. * @Default: 1
  595. *
  596. * Usage: External
  597. *
  598. * </ini>
  599. */
  600. #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \
  601. CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \
  602. "DP TCP UDP Checksum Offload for NAN mode")
  603. /*
  604. * <ini>
  605. * gEnableIpTcpUdpChecksumOffload - Enable checksum offload
  606. * @Min: 0
  607. * @Max: 1
  608. * @Default: 1
  609. *
  610. * Usage: External
  611. *
  612. * </ini>
  613. */
  614. #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
  615. CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
  616. "DP TCP UDP Checksum Offload")
  617. #define CFG_DP_DEFRAG_TIMEOUT_CHECK \
  618. CFG_INI_BOOL("dp_defrag_timeout_check", true, \
  619. "DP Defrag Timeout Check")
  620. #define CFG_DP_WBM_RELEASE_RING \
  621. CFG_INI_UINT("dp_wbm_release_ring", \
  622. WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
  623. WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
  624. WLAN_CFG_WBM_RELEASE_RING_SIZE, \
  625. CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
  626. #define CFG_DP_TCL_CMD_CREDIT_RING \
  627. CFG_INI_UINT("dp_tcl_cmd_credit_ring", \
  628. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \
  629. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \
  630. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \
  631. CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring")
  632. #define CFG_DP_TCL_STATUS_RING \
  633. CFG_INI_UINT("dp_tcl_status_ring",\
  634. WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
  635. WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
  636. WLAN_CFG_TCL_STATUS_RING_SIZE, \
  637. CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
  638. #define CFG_DP_REO_REINJECT_RING \
  639. CFG_INI_UINT("dp_reo_reinject_ring", \
  640. WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
  641. WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
  642. WLAN_CFG_REO_REINJECT_RING_SIZE, \
  643. CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
  644. #define CFG_DP_RX_RELEASE_RING \
  645. CFG_INI_UINT("dp_rx_release_ring", \
  646. WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
  647. WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
  648. WLAN_CFG_RX_RELEASE_RING_SIZE, \
  649. CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
  650. #define CFG_DP_REO_EXCEPTION_RING \
  651. CFG_INI_UINT("dp_reo_exception_ring", \
  652. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
  653. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
  654. WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
  655. CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
  656. #define CFG_DP_REO_CMD_RING \
  657. CFG_INI_UINT("dp_reo_cmd_ring", \
  658. WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
  659. WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
  660. WLAN_CFG_REO_CMD_RING_SIZE, \
  661. CFG_VALUE_OR_DEFAULT, "DP REO command ring")
  662. #define CFG_DP_REO_STATUS_RING \
  663. CFG_INI_UINT("dp_reo_status_ring", \
  664. WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
  665. WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
  666. WLAN_CFG_REO_STATUS_RING_SIZE, \
  667. CFG_VALUE_OR_DEFAULT, "DP REO status ring")
  668. #define CFG_DP_RXDMA_BUF_RING \
  669. CFG_INI_UINT("dp_rxdma_buf_ring", \
  670. WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
  671. WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
  672. WLAN_CFG_RXDMA_BUF_RING_SIZE, \
  673. CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
  674. #define CFG_DP_RXDMA_REFILL_RING \
  675. CFG_INI_UINT("dp_rxdma_refill_ring", \
  676. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
  677. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
  678. WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
  679. CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
  680. #define CFG_DP_TX_DESC_LIMIT_0 \
  681. CFG_INI_UINT("dp_tx_desc_limit_0", \
  682. WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
  683. WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
  684. WLAN_CFG_TX_DESC_LIMIT_0, \
  685. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
  686. #define CFG_DP_TX_DESC_LIMIT_1 \
  687. CFG_INI_UINT("dp_tx_desc_limit_1", \
  688. WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
  689. WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
  690. WLAN_CFG_TX_DESC_LIMIT_1, \
  691. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
  692. #define CFG_DP_TX_DESC_LIMIT_2 \
  693. CFG_INI_UINT("dp_tx_desc_limit_2", \
  694. WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
  695. WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
  696. WLAN_CFG_TX_DESC_LIMIT_2, \
  697. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
  698. #define CFG_DP_TX_DEVICE_LIMIT \
  699. CFG_INI_UINT("dp_tx_device_limit", \
  700. WLAN_CFG_TX_DEVICE_LIMIT_MIN, \
  701. WLAN_CFG_TX_DEVICE_LIMIT_MAX, \
  702. WLAN_CFG_TX_DEVICE_LIMIT, \
  703. CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
  704. #define CFG_DP_TX_SW_INTERNODE_QUEUE \
  705. CFG_INI_UINT("dp_tx_sw_internode_queue", \
  706. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \
  707. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \
  708. WLAN_CFG_TX_SW_INTERNODE_QUEUE, \
  709. CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue")
  710. #define CFG_DP_RXDMA_MONITOR_BUF_RING \
  711. CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
  712. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
  713. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
  714. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
  715. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
  716. #define CFG_DP_RXDMA_MONITOR_DST_RING \
  717. CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
  718. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
  719. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
  720. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
  721. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  722. #define CFG_DP_RXDMA_MONITOR_STATUS_RING \
  723. CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
  724. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
  725. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
  726. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
  727. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
  728. #define CFG_DP_RXDMA_MONITOR_DESC_RING \
  729. CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
  730. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
  731. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
  732. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
  733. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  734. #define CFG_DP_RXDMA_ERR_DST_RING \
  735. CFG_INI_UINT("dp_rxdma_err_dst_ring", \
  736. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
  737. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
  738. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
  739. CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
  740. #define CFG_DP_PER_PKT_LOGGING \
  741. CFG_INI_UINT("enable_verbose_debug", \
  742. 0, 0xffff, 0, \
  743. CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
  744. #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
  745. CFG_INI_UINT("TxFlowStartQueueOffset", \
  746. 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
  747. CFG_VALUE_OR_DEFAULT, "Start queue offset")
  748. #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
  749. CFG_INI_UINT("TxFlowStopQueueThreshold", \
  750. 0, 50, 15, \
  751. CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
  752. #define CFG_DP_IPA_UC_TX_BUF_SIZE \
  753. CFG_INI_UINT("IpaUcTxBufSize", \
  754. 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
  755. CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
  756. #define CFG_DP_IPA_UC_TX_PARTITION_BASE \
  757. CFG_INI_UINT("IpaUcTxPartitionBase", \
  758. 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
  759. CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
  760. #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
  761. CFG_INI_UINT("IpaUcRxIndRingCount", \
  762. 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
  763. CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
  764. #define CFG_DP_AP_STA_SECURITY_SEPERATION \
  765. CFG_INI_BOOL("gDisableIntraBssFwd", \
  766. false, "Disable intrs BSS Rx packets")
  767. #define CFG_DP_ENABLE_DATA_STALL_DETECTION \
  768. CFG_INI_BOOL("gEnableDataStallDetection", \
  769. true, "Enable/Disable Data stall detection")
  770. #define CFG_DP_RX_SW_DESC_WEIGHT \
  771. CFG_INI_UINT("dp_rx_sw_desc_weight", \
  772. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
  773. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
  774. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
  775. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
  776. #define CFG_DP_RX_SW_DESC_NUM \
  777. CFG_INI_UINT("dp_rx_sw_desc_num", \
  778. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \
  779. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \
  780. WLAN_CFG_RX_SW_DESC_NUM_SIZE, \
  781. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num")
  782. #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \
  783. CFG_INI_UINT("dp_rx_flow_search_table_size", \
  784. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \
  785. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \
  786. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \
  787. CFG_VALUE_OR_DEFAULT, \
  788. "DP Rx Flow Search Table Size in number of entries")
  789. #define CFG_DP_RX_FLOW_TAG_ENABLE \
  790. CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \
  791. "Enable/Disable DP Rx Flow Tag")
  792. #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \
  793. CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \
  794. "DP Rx Flow Search Table Is Per PDev")
  795. #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \
  796. CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \
  797. "Enable/Disable Rx Protocol & Flow tags in Monitor mode")
  798. #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \
  799. CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \
  800. "Enable/Disable tx Per Pkt vdev id check")
  801. /*
  802. * <ini>
  803. * dp_rx_fisa_enable - Control Rx datapath FISA
  804. * @Min: 0
  805. * @Max: 1
  806. * @Default: 1
  807. *
  808. * This ini is used to enable DP Rx FISA feature
  809. *
  810. * Related: dp_rx_flow_search_table_size
  811. *
  812. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  813. *
  814. * Usage: Internal
  815. *
  816. * </ini>
  817. */
  818. #define CFG_DP_RX_FISA_ENABLE \
  819. CFG_INI_BOOL("dp_rx_fisa_enable", true, \
  820. "Enable/Disable DP Rx FISA")
  821. #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \
  822. CFG_INI_UINT("mon_drop_thresh", \
  823. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \
  824. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \
  825. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \
  826. CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop theshold")
  827. #define CFG_DP_PKTLOG_BUFFER_SIZE \
  828. CFG_INI_UINT("PktlogBufSize", \
  829. WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \
  830. WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \
  831. WLAN_CFG_PKTLOG_BUFFER_SIZE, \
  832. CFG_VALUE_OR_DEFAULT, "Packet Log buffer size")
  833. #define CFG_DP_FULL_MON_MODE \
  834. CFG_INI_BOOL("full_mon_mode", \
  835. false, "Full Monitor mode support")
  836. #define CFG_DP_REO_RINGS_MAP \
  837. CFG_INI_UINT("dp_reo_rings_map", \
  838. WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \
  839. WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \
  840. WLAN_CFG_NUM_REO_RINGS_MAP, \
  841. CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping")
  842. #define CFG_DP_RX_RADIO_0_DEFAULT_REO \
  843. CFG_INI_UINT("dp_rx_radio0_default_reo", \
  844. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  845. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  846. WLAN_CFG_RADIO_0_DEFAULT_REO, \
  847. CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping")
  848. #define CFG_DP_RX_RADIO_1_DEFAULT_REO \
  849. CFG_INI_UINT("dp_rx_radio1_default_reo", \
  850. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  851. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  852. WLAN_CFG_RADIO_1_DEFAULT_REO, \
  853. CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping")
  854. #define CFG_DP_RX_RADIO_2_DEFAULT_REO \
  855. CFG_INI_UINT("dp_rx_radio2_default_reo", \
  856. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  857. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  858. WLAN_CFG_RADIO_2_DEFAULT_REO, \
  859. CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping")
  860. #define CFG_DP_PEER_EXT_STATS \
  861. CFG_INI_BOOL("peer_ext_stats", \
  862. false, "Peer extended stats")
  863. /*
  864. * <ini>
  865. * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes
  866. * @Min: 0
  867. * @Max: 1
  868. * @Default: Default value indicating if checksum should be disabled for
  869. * legacy WLAN modes
  870. *
  871. * This ini is used to disable HW checksum offload capability for legacy
  872. * connections
  873. *
  874. * Related: gEnableIpTcpUdpChecksumOffload should be enabled
  875. *
  876. * Usage: Internal
  877. *
  878. * </ini>
  879. */
  880. #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE
  881. #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1
  882. #endif
  883. #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \
  884. CFG_INI_BOOL("legacy_mode_csum_disable", \
  885. DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \
  886. "Enable/Disable legacy mode checksum")
  887. #define CFG_DP_RX_BUFF_POOL_ENABLE \
  888. CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \
  889. "Enable/Disable DP RX emergency buffer pool support")
  890. #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \
  891. CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \
  892. "Enable/Disable DP RX refill buffer pool support")
  893. #define CFG_DP_POLL_MODE_ENABLE \
  894. CFG_INI_BOOL("dp_poll_mode_enable", false, \
  895. "Enable/Disable Polling mode for data path")
  896. #define CFG_DP_RX_FST_IN_CMEM \
  897. CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \
  898. "Enable/Disable flow search table in CMEM")
  899. /*
  900. * <ini>
  901. * gEnableSWLM - Control DP Software latency manager
  902. * @Min: 0
  903. * @Max: 1
  904. * @Default: 0
  905. *
  906. * This ini is used to enable DP Software latency Manager
  907. *
  908. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  909. *
  910. * Usage: Internal
  911. *
  912. * </ini>
  913. */
  914. #define CFG_DP_SWLM_ENABLE \
  915. CFG_INI_BOOL("gEnableSWLM", false, \
  916. "Enable/Disable DP SWLM")
  917. /*
  918. * <ini>
  919. * wow_check_rx_pending_enable - control to check RX frames pending in Wow
  920. * @Min: 0
  921. * @Max: 1
  922. * @Default: 0
  923. *
  924. * This ini is used to control DP Software to perform RX pending check
  925. * before entering WoW mode
  926. *
  927. * Usage: Internal
  928. *
  929. * </ini>
  930. */
  931. #define CFG_DP_WOW_CHECK_RX_PENDING \
  932. CFG_INI_BOOL("wow_check_rx_pending_enable", \
  933. false, \
  934. "enable rx frame pending check in WoW mode")
  935. #define CFG_DP_DELAY_MON_REPLENISH \
  936. CFG_INI_BOOL("delay_mon_replenish", \
  937. true, "Delay Monitor Replenish")
  938. /*
  939. * <ini>
  940. * gForceRX64BA - enable force 64 blockack mode for RX
  941. * @Min: 0
  942. * @Max: 1
  943. * @Default: 0
  944. *
  945. * This ini is used to control DP Software to use 64 blockack
  946. * for RX direction forcibly
  947. *
  948. * Usage: Internal
  949. *
  950. * </ini>
  951. */
  952. #define CFG_FORCE_RX_64_BA \
  953. CFG_INI_BOOL("gForceRX64BA", \
  954. false, "Enable/Disable force 64 blockack in RX side")
  955. /*
  956. * <ini>
  957. * ghw_cc_enable - enable HW cookie conversion by register
  958. * @Min: 0
  959. * @Max: 1
  960. * @Default: 1
  961. *
  962. * This ini is used to control HW based 20 bits cookie to 64 bits
  963. * Desc virtual address conversion
  964. *
  965. * Usage: Internal
  966. *
  967. * </ini>
  968. */
  969. #define CFG_DP_HW_CC_ENABLE \
  970. CFG_INI_BOOL("ghw_cc_enable", \
  971. true, "Enable/Disable HW cookie conversion")
  972. #ifdef IPA_OFFLOAD
  973. /*
  974. * <ini>
  975. * dp_ipa_tx_ring_size - Set tcl ring size for IPA
  976. * @Min: 1024
  977. * @Max: 8096
  978. * @Default: 1024
  979. *
  980. * This ini sets the tcl ring size for IPA
  981. *
  982. * Related: N/A
  983. *
  984. * Supported Feature: IPA
  985. *
  986. * Usage: Internal
  987. *
  988. * </ini>
  989. */
  990. #define CFG_DP_IPA_TX_RING_SIZE \
  991. CFG_INI_UINT("dp_ipa_tx_ring_size", \
  992. WLAN_CFG_IPA_TX_RING_SIZE_MIN, \
  993. WLAN_CFG_IPA_TX_RING_SIZE_MAX, \
  994. WLAN_CFG_IPA_TX_RING_SIZE, \
  995. CFG_VALUE_OR_DEFAULT, "IPA TCL ring size")
  996. /*
  997. * <ini>
  998. * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA
  999. * @Min: 1024
  1000. * @Max: 8096
  1001. * @Default: 1024
  1002. *
  1003. * This ini sets the tx comp ring size for IPA
  1004. *
  1005. * Related: N/A
  1006. *
  1007. * Supported Feature: IPA
  1008. *
  1009. * Usage: Internal
  1010. *
  1011. * </ini>
  1012. */
  1013. #define CFG_DP_IPA_TX_COMP_RING_SIZE \
  1014. CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \
  1015. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \
  1016. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \
  1017. WLAN_CFG_IPA_TX_COMP_RING_SIZE, \
  1018. CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size")
  1019. #define CFG_DP_IPA_TX_RING_CFG \
  1020. CFG(CFG_DP_IPA_TX_RING_SIZE) \
  1021. CFG(CFG_DP_IPA_TX_COMP_RING_SIZE)
  1022. #else
  1023. #define CFG_DP_IPA_TX_RING_CFG
  1024. #endif
  1025. #define CFG_DP \
  1026. CFG(CFG_DP_HTT_PACKET_TYPE) \
  1027. CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
  1028. CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
  1029. CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
  1030. CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
  1031. CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
  1032. CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
  1033. CFG(CFG_DP_MAX_ALLOC_SIZE) \
  1034. CFG(CFG_DP_MAX_CLIENTS) \
  1035. CFG(CFG_DP_MAX_PEER_ID) \
  1036. CFG(CFG_DP_REO_DEST_RINGS) \
  1037. CFG(CFG_DP_TCL_DATA_RINGS) \
  1038. CFG(CFG_DP_NSS_REO_DEST_RINGS) \
  1039. CFG(CFG_DP_NSS_TCL_DATA_RINGS) \
  1040. CFG(CFG_DP_TX_DESC) \
  1041. CFG(CFG_DP_TX_EXT_DESC) \
  1042. CFG(CFG_DP_TX_EXT_DESC_POOLS) \
  1043. CFG(CFG_DP_PDEV_RX_RING) \
  1044. CFG(CFG_DP_PDEV_TX_RING) \
  1045. CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
  1046. CFG(CFG_DP_TX_COMPL_RING_SIZE) \
  1047. CFG(CFG_DP_TX_RING_SIZE) \
  1048. CFG(CFG_DP_NSS_COMP_RING_SIZE) \
  1049. CFG(CFG_DP_PDEV_LMAC_RING) \
  1050. CFG(CFG_DP_BASE_HW_MAC_ID) \
  1051. CFG(CFG_DP_RX_HASH) \
  1052. CFG(CFG_DP_TSO) \
  1053. CFG(CFG_DP_LRO) \
  1054. CFG(CFG_DP_SG) \
  1055. CFG(CFG_DP_GRO) \
  1056. CFG(CFG_DP_OL_TX_CSUM) \
  1057. CFG(CFG_DP_OL_RX_CSUM) \
  1058. CFG(CFG_DP_RAWMODE) \
  1059. CFG(CFG_DP_PEER_FLOW_CTRL) \
  1060. CFG(CFG_DP_NAPI) \
  1061. CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
  1062. CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \
  1063. CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \
  1064. CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
  1065. CFG(CFG_DP_WBM_RELEASE_RING) \
  1066. CFG(CFG_DP_TCL_CMD_CREDIT_RING) \
  1067. CFG(CFG_DP_TCL_STATUS_RING) \
  1068. CFG(CFG_DP_REO_REINJECT_RING) \
  1069. CFG(CFG_DP_RX_RELEASE_RING) \
  1070. CFG(CFG_DP_REO_EXCEPTION_RING) \
  1071. CFG(CFG_DP_REO_CMD_RING) \
  1072. CFG(CFG_DP_REO_STATUS_RING) \
  1073. CFG(CFG_DP_RXDMA_BUF_RING) \
  1074. CFG(CFG_DP_RXDMA_REFILL_RING) \
  1075. CFG(CFG_DP_TX_DESC_LIMIT_0) \
  1076. CFG(CFG_DP_TX_DESC_LIMIT_1) \
  1077. CFG(CFG_DP_TX_DESC_LIMIT_2) \
  1078. CFG(CFG_DP_TX_DEVICE_LIMIT) \
  1079. CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \
  1080. CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
  1081. CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
  1082. CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
  1083. CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
  1084. CFG(CFG_DP_RXDMA_ERR_DST_RING) \
  1085. CFG(CFG_DP_PER_PKT_LOGGING) \
  1086. CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
  1087. CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
  1088. CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
  1089. CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
  1090. CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
  1091. CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
  1092. CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
  1093. CFG(CFG_DP_RX_SW_DESC_WEIGHT) \
  1094. CFG(CFG_DP_RX_SW_DESC_NUM) \
  1095. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \
  1096. CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \
  1097. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \
  1098. CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \
  1099. CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \
  1100. CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \
  1101. CFG(CFG_DP_RX_FISA_ENABLE) \
  1102. CFG(CFG_DP_FULL_MON_MODE) \
  1103. CFG(CFG_DP_REO_RINGS_MAP) \
  1104. CFG(CFG_DP_PEER_EXT_STATS) \
  1105. CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \
  1106. CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \
  1107. CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \
  1108. CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \
  1109. CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \
  1110. CFG(CFG_DP_POLL_MODE_ENABLE) \
  1111. CFG(CFG_DP_SWLM_ENABLE) \
  1112. CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \
  1113. CFG(CFG_DP_RX_FST_IN_CMEM) \
  1114. CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \
  1115. CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \
  1116. CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \
  1117. CFG(CFG_DP_WOW_CHECK_RX_PENDING) \
  1118. CFG(CFG_DP_HW_CC_ENABLE) \
  1119. CFG(CFG_FORCE_RX_64_BA) \
  1120. CFG(CFG_DP_DELAY_MON_REPLENISH) \
  1121. CFG_DP_IPA_TX_RING_CFG
  1122. #endif /* _CFG_DP_H_ */