dp_rx_mon_status.c 73 KB

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  1. /*
  2. * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. #define dp_rx_mon_status_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  35. #define dp_rx_mon_status_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  36. #define dp_rx_mon_status_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  37. #define dp_rx_mon_status_info(params...) \
  38. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_MON_STATUS, ## params)
  39. #define dp_rx_mon_status_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  40. static inline
  41. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  42. uint32_t mac_id,
  43. struct dp_srng *dp_rxdma_srng,
  44. struct rx_desc_pool *rx_desc_pool,
  45. uint32_t num_req_buffers,
  46. union dp_rx_desc_list_elem_t **desc_list,
  47. union dp_rx_desc_list_elem_t **tail,
  48. uint8_t owner);
  49. static inline void
  50. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  51. struct hal_rx_ppdu_info *ppdu_info,
  52. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  53. /**
  54. * dp_rx_mon_handle_status_buf_done () - Handle status buf DMA not done
  55. *
  56. * @pdev: DP pdev handle
  57. * @mon_status_srng: Monitor status SRNG
  58. *
  59. * As per MAC team's suggestion, If HP + 2 entry's DMA done is set,
  60. * skip HP + 1 entry and start processing in next interrupt.
  61. * If HP + 2 entry's DMA done is not set, poll onto HP + 1 entry
  62. * for it's DMA done TLV to be set.
  63. *
  64. * Return: enum dp_mon_reap_status
  65. */
  66. enum dp_mon_reap_status
  67. dp_rx_mon_handle_status_buf_done(struct dp_pdev *pdev,
  68. void *mon_status_srng)
  69. {
  70. struct dp_soc *soc = pdev->soc;
  71. hal_soc_handle_t hal_soc;
  72. void *ring_entry;
  73. struct hal_buf_info hbi;
  74. qdf_nbuf_t status_nbuf;
  75. struct dp_rx_desc *rx_desc;
  76. void *rx_tlv;
  77. QDF_STATUS buf_status;
  78. hal_soc = soc->hal_soc;
  79. ring_entry = hal_srng_src_peek_n_get_next_next(hal_soc,
  80. mon_status_srng);
  81. if (!ring_entry) {
  82. dp_rx_mon_status_debug("%pK: Monitor status ring entry is NULL for SRNG: %pK",
  83. soc, mon_status_srng);
  84. return DP_MON_STATUS_NO_DMA;
  85. }
  86. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_entry,
  87. &hbi);
  88. rx_desc = dp_rx_cookie_2_va_mon_status(soc, hbi.sw_cookie);
  89. qdf_assert_always(rx_desc);
  90. status_nbuf = rx_desc->nbuf;
  91. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  92. QDF_DMA_FROM_DEVICE);
  93. rx_tlv = qdf_nbuf_data(status_nbuf);
  94. buf_status = hal_get_rx_status_done(rx_tlv);
  95. /* If status buffer DMA is not done,
  96. * 1. As per MAC team's suggestion, If HP + 2 entry's DMA done is set,
  97. * replenish HP + 1 entry and start processing in next interrupt.
  98. * 2. If HP + 2 entry's DMA done is not set
  99. * hold on to mon destination ring.
  100. */
  101. if (buf_status != QDF_STATUS_SUCCESS) {
  102. dp_err_rl("Monitor status ring: DMA is not done "
  103. "for nbuf: %pK", status_nbuf);
  104. pdev->rx_mon_stats.tlv_tag_status_err++;
  105. return DP_MON_STATUS_NO_DMA;
  106. }
  107. pdev->rx_mon_stats.status_buf_done_war++;
  108. return DP_MON_STATUS_REPLENISH;
  109. }
  110. #ifndef QCA_SUPPORT_FULL_MON
  111. /**
  112. * dp_rx_mon_process () - Core brain processing for monitor mode
  113. *
  114. * This API processes monitor destination ring followed by monitor status ring
  115. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  116. *
  117. * @soc: datapath soc context
  118. * @int_ctx: interrupt context
  119. * @mac_id: mac_id on which interrupt is received
  120. * @quota: Number of status ring entry that can be serviced in one shot.
  121. *
  122. * @Return: Number of reaped status ring entries
  123. */
  124. static inline uint32_t
  125. dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  126. uint32_t mac_id, uint32_t quota)
  127. {
  128. return quota;
  129. }
  130. #endif
  131. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  132. #include "dp_rx_mon_feature.h"
  133. #else
  134. static QDF_STATUS
  135. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  136. struct hal_rx_ppdu_info *ppdu_info)
  137. {
  138. return QDF_STATUS_SUCCESS;
  139. }
  140. static void
  141. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  142. qdf_nbuf_t status_nbuf,
  143. struct hal_rx_ppdu_info *ppdu_info,
  144. bool *nbuf_used)
  145. {
  146. }
  147. #endif
  148. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  149. #include "dp_rx_mon_feature.h"
  150. #else
  151. static QDF_STATUS
  152. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  153. struct dp_pdev *pdev,
  154. struct hal_rx_ppdu_info *ppdu_info)
  155. {
  156. return QDF_STATUS_SUCCESS;
  157. }
  158. #endif
  159. #ifdef FEATURE_PERPKT_INFO
  160. static inline void
  161. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  162. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  163. {
  164. uint8_t chain, bw;
  165. int8_t rssi;
  166. for (chain = 0; chain < SS_COUNT; chain++) {
  167. for (bw = 0; bw < MAX_BW; bw++) {
  168. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  169. if (rssi != DP_RSSI_INVAL)
  170. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  171. else
  172. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  173. }
  174. }
  175. }
  176. /*
  177. * dp_rx_populate_su_evm_details() - Populate su evm info
  178. * @ppdu_info: ppdu info structure from ppdu ring
  179. * @cdp_rx_ppdu: rx ppdu indication structure
  180. */
  181. static inline void
  182. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  183. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  184. {
  185. uint8_t pilot_evm;
  186. uint8_t nss_count;
  187. uint8_t pilot_count;
  188. nss_count = ppdu_info->evm_info.nss_count;
  189. pilot_count = ppdu_info->evm_info.pilot_count;
  190. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  191. qdf_err("pilot evm count is more than expected");
  192. return;
  193. }
  194. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  195. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  196. /* Populate evm for pilot_evm = nss_count*pilot_count */
  197. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  198. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  199. ppdu_info->evm_info.pilot_evm[pilot_evm];
  200. }
  201. }
  202. /**
  203. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  204. * @pdev: pdev ctx
  205. * @rx_user_status: mon rx user status
  206. *
  207. * Return: bool
  208. */
  209. static inline bool
  210. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  211. struct mon_rx_user_status *rx_user_status)
  212. {
  213. uint32_t ru_size;
  214. bool is_data;
  215. ru_size = rx_user_status->ofdma_ru_size;
  216. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  217. DP_STATS_INC(pdev,
  218. ul_ofdma.data_rx_ru_size[ru_size], 1);
  219. is_data = true;
  220. } else {
  221. DP_STATS_INC(pdev,
  222. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  223. is_data = false;
  224. }
  225. return is_data;
  226. }
  227. /**
  228. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  229. * @pdev: pdev ctx
  230. * @ppdu_info: ppdu info structure from ppdu ring
  231. * @cdp_rx_ppdu: Rx PPDU indication structure
  232. *
  233. * Return: none
  234. */
  235. static inline void
  236. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  237. struct hal_rx_ppdu_info *ppdu_info,
  238. struct cdp_rx_indication_ppdu
  239. *cdp_rx_ppdu)
  240. {
  241. struct dp_peer *peer;
  242. struct dp_soc *soc = pdev->soc;
  243. struct dp_ast_entry *ast_entry;
  244. uint32_t ast_index;
  245. int i;
  246. struct mon_rx_user_status *rx_user_status;
  247. struct mon_rx_user_info *rx_user_info;
  248. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  249. int ru_size;
  250. bool is_data = false;
  251. uint32_t num_users;
  252. num_users = ppdu_info->com_info.num_users;
  253. for (i = 0; i < num_users; i++) {
  254. if (i > OFDMA_NUM_USERS)
  255. return;
  256. rx_user_status = &ppdu_info->rx_user_status[i];
  257. rx_user_info = &ppdu_info->rx_user_info[i];
  258. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  259. ast_index = rx_user_status->ast_index;
  260. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  261. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  262. continue;
  263. }
  264. ast_entry = soc->ast_table[ast_index];
  265. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  266. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  267. continue;
  268. }
  269. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  270. DP_MOD_ID_RX_PPDU_STATS);
  271. if (!peer) {
  272. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  273. continue;
  274. }
  275. rx_stats_peruser->is_bss_peer = peer->bss_peer;
  276. rx_stats_peruser->first_data_seq_ctrl =
  277. rx_user_status->first_data_seq_ctrl;
  278. rx_stats_peruser->frame_control_info_valid =
  279. rx_user_status->frame_control_info_valid;
  280. rx_stats_peruser->frame_control =
  281. rx_user_status->frame_control;
  282. rx_stats_peruser->qos_control_info_valid =
  283. rx_user_info->qos_control_info_valid;
  284. rx_stats_peruser->qos_control =
  285. rx_user_info->qos_control;
  286. rx_stats_peruser->tcp_msdu_count =
  287. rx_user_status->tcp_msdu_count;
  288. rx_stats_peruser->udp_msdu_count =
  289. rx_user_status->udp_msdu_count;
  290. rx_stats_peruser->other_msdu_count =
  291. rx_user_status->other_msdu_count;
  292. rx_stats_peruser->num_msdu =
  293. rx_stats_peruser->tcp_msdu_count +
  294. rx_stats_peruser->udp_msdu_count +
  295. rx_stats_peruser->other_msdu_count;
  296. rx_stats_peruser->preamble_type =
  297. rx_user_status->preamble_type;
  298. rx_stats_peruser->mpdu_cnt_fcs_ok =
  299. rx_user_status->mpdu_cnt_fcs_ok;
  300. rx_stats_peruser->mpdu_cnt_fcs_err =
  301. rx_user_status->mpdu_cnt_fcs_err;
  302. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  303. &rx_user_status->mpdu_fcs_ok_bitmap,
  304. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  305. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  306. rx_stats_peruser->mpdu_ok_byte_count =
  307. rx_user_status->mpdu_ok_byte_count;
  308. rx_stats_peruser->mpdu_err_byte_count =
  309. rx_user_status->mpdu_err_byte_count;
  310. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  311. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  312. rx_stats_peruser->retries =
  313. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  314. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  315. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  316. rx_stats_peruser->is_ampdu = 1;
  317. else
  318. rx_stats_peruser->is_ampdu = 0;
  319. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  320. qdf_mem_copy(rx_stats_peruser->mac_addr,
  321. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  322. rx_stats_peruser->peer_id = peer->peer_id;
  323. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  324. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  325. rx_stats_peruser->mu_ul_info_valid = 0;
  326. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  327. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  328. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  329. if (rx_user_status->mu_ul_info_valid) {
  330. rx_stats_peruser->nss = rx_user_status->nss;
  331. rx_stats_peruser->mcs = rx_user_status->mcs;
  332. rx_stats_peruser->mu_ul_info_valid =
  333. rx_user_status->mu_ul_info_valid;
  334. rx_stats_peruser->ofdma_ru_start_index =
  335. rx_user_status->ofdma_ru_start_index;
  336. rx_stats_peruser->ofdma_ru_width =
  337. rx_user_status->ofdma_ru_width;
  338. rx_stats_peruser->user_index = i;
  339. ru_size = rx_user_status->ofdma_ru_size;
  340. /*
  341. * max RU size will be equal to
  342. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  343. */
  344. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  345. dp_err("invalid ru_size %d\n",
  346. ru_size);
  347. return;
  348. }
  349. is_data = dp_rx_inc_rusize_cnt(pdev,
  350. rx_user_status);
  351. }
  352. if (is_data) {
  353. /* counter to get number of MU OFDMA */
  354. pdev->stats.ul_ofdma.data_rx_ppdu++;
  355. pdev->stats.ul_ofdma.data_users[num_users]++;
  356. }
  357. }
  358. }
  359. }
  360. /**
  361. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  362. * @pdev: pdev ctx
  363. * @ppdu_info: ppdu info structure from ppdu ring
  364. * @cdp_rx_ppdu: Rx PPDU indication structure
  365. *
  366. * Return: none
  367. */
  368. static inline void
  369. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  370. struct hal_rx_ppdu_info *ppdu_info,
  371. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  372. {
  373. struct dp_peer *peer;
  374. struct dp_soc *soc = pdev->soc;
  375. struct dp_ast_entry *ast_entry;
  376. uint32_t ast_index;
  377. uint32_t i;
  378. cdp_rx_ppdu->first_data_seq_ctrl =
  379. ppdu_info->rx_status.first_data_seq_ctrl;
  380. cdp_rx_ppdu->frame_ctrl =
  381. ppdu_info->rx_status.frame_control;
  382. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  383. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  384. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  385. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  386. /* num mpdu is consolidated and added together in num user loop */
  387. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  388. /* num msdu is consolidated and added together in num user loop */
  389. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  390. cdp_rx_ppdu->udp_msdu_count +
  391. cdp_rx_ppdu->other_msdu_count);
  392. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  393. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  394. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  395. cdp_rx_ppdu->is_ampdu = 1;
  396. else
  397. cdp_rx_ppdu->is_ampdu = 0;
  398. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  399. ast_index = ppdu_info->rx_status.ast_index;
  400. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  401. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  402. cdp_rx_ppdu->num_users = 0;
  403. goto end;
  404. }
  405. ast_entry = soc->ast_table[ast_index];
  406. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  407. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  408. cdp_rx_ppdu->num_users = 0;
  409. goto end;
  410. }
  411. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  412. DP_MOD_ID_RX_PPDU_STATS);
  413. if (!peer) {
  414. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  415. cdp_rx_ppdu->num_users = 0;
  416. goto end;
  417. }
  418. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  419. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  420. cdp_rx_ppdu->peer_id = peer->peer_id;
  421. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  422. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  423. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  424. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  425. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  426. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  427. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  428. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  429. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  430. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  431. else
  432. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  433. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  434. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  435. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  436. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  437. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  438. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  439. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  440. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  441. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  442. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  443. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  444. if (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC) {
  445. cdp_rx_ppdu->u.stbc = ppdu_info->rx_status.is_stbc;
  446. } else if (ppdu_info->rx_status.preamble_type ==
  447. HAL_RX_PKT_TYPE_11AX) {
  448. cdp_rx_ppdu->u.stbc = (ppdu_info->rx_status.he_data3 >>
  449. QDF_MON_STATUS_STBC_SHIFT) & 0x1;
  450. cdp_rx_ppdu->u.dcm = (ppdu_info->rx_status.he_data3 >>
  451. QDF_MON_STATUS_DCM_SHIFT) & 0x1;
  452. }
  453. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  454. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  455. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  456. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  457. for (i = 0; i < MAX_CHAIN; i++)
  458. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  459. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  460. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  461. cdp_rx_ppdu->num_mpdu = 0;
  462. cdp_rx_ppdu->num_msdu = 0;
  463. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  464. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  465. return;
  466. end:
  467. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  468. }
  469. #else
  470. static inline void
  471. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  472. struct hal_rx_ppdu_info *ppdu_info,
  473. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  474. {
  475. }
  476. #endif
  477. /**
  478. * dp_rx_stats_update() - Update per-peer statistics
  479. * @soc: Datapath SOC handle
  480. * @peer: Datapath peer handle
  481. * @ppdu: PPDU Descriptor
  482. *
  483. * Return: None
  484. */
  485. #ifdef FEATURE_PERPKT_INFO
  486. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  487. struct cdp_rx_indication_ppdu *ppdu,
  488. uint32_t user)
  489. {
  490. uint32_t ratekbps = 0;
  491. uint32_t ppdu_rx_rate = 0;
  492. uint32_t nss = 0;
  493. uint8_t mcs = 0;
  494. uint32_t rix;
  495. uint16_t ratecode;
  496. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  497. if (!peer || !ppdu)
  498. return;
  499. ppdu_user = &ppdu->user[user];
  500. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  501. if (ppdu_user->nss == 0)
  502. nss = 0;
  503. else
  504. nss = ppdu_user->nss - 1;
  505. mcs = ppdu_user->mcs;
  506. } else {
  507. if (ppdu->u.nss == 0)
  508. nss = 0;
  509. else
  510. nss = ppdu->u.nss - 1;
  511. mcs = ppdu->u.mcs;
  512. }
  513. ratekbps = dp_getrateindex(ppdu->u.gi,
  514. mcs,
  515. nss,
  516. ppdu->u.preamble,
  517. ppdu->u.bw,
  518. &rix,
  519. &ratecode);
  520. if (!ratekbps) {
  521. ppdu->rix = 0;
  522. ppdu->rx_ratekbps = 0;
  523. ppdu->rx_ratecode = 0;
  524. ppdu_user->rx_ratekbps = 0;
  525. return;
  526. }
  527. ppdu->rix = rix;
  528. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  529. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  530. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  531. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  532. ppdu->rx_ratekbps = ratekbps;
  533. ppdu->rx_ratecode = ratecode;
  534. ppdu_user->rx_ratekbps = ratekbps;
  535. if (peer->vdev)
  536. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  537. }
  538. static void dp_rx_stats_update(struct dp_pdev *pdev,
  539. struct cdp_rx_indication_ppdu *ppdu)
  540. {
  541. struct dp_soc *soc = NULL;
  542. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  543. uint16_t num_msdu;
  544. uint8_t pkt_bw_offset;
  545. struct dp_peer *peer;
  546. struct cdp_rx_stats_ppdu_user *ppdu_user;
  547. uint32_t i;
  548. enum cdp_mu_packet_type mu_pkt_type;
  549. if (pdev)
  550. soc = pdev->soc;
  551. else
  552. return;
  553. if (!soc || soc->process_rx_status)
  554. return;
  555. preamble = ppdu->u.preamble;
  556. ppdu_type = ppdu->u.ppdu_type;
  557. for (i = 0; i < ppdu->num_users && i < CDP_MU_MAX_USERS; i++) {
  558. peer = NULL;
  559. ppdu_user = &ppdu->user[i];
  560. peer = dp_peer_get_ref_by_id(soc, ppdu_user->peer_id,
  561. DP_MOD_ID_RX_PPDU_STATS);
  562. if (!peer)
  563. peer = pdev->invalid_peer;
  564. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  565. ppdu->u.nss = 1;
  566. if (ppdu_type == HAL_RX_TYPE_SU) {
  567. mcs = ppdu->u.mcs;
  568. nss = ppdu->u.nss;
  569. } else {
  570. mcs = ppdu_user->mcs;
  571. nss = ppdu_user->nss;
  572. }
  573. num_msdu = ppdu_user->num_msdu;
  574. switch (ppdu->u.bw) {
  575. case CMN_BW_20MHZ:
  576. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  577. break;
  578. case CMN_BW_40MHZ:
  579. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  580. break;
  581. case CMN_BW_80MHZ:
  582. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  583. break;
  584. case CMN_BW_160MHZ:
  585. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  586. break;
  587. default:
  588. pkt_bw_offset = 0;
  589. dp_rx_mon_status_debug("%pK: Invalid BW index = %d",
  590. soc, ppdu->u.bw);
  591. }
  592. DP_STATS_UPD(peer, rx.snr, (ppdu->rssi + pkt_bw_offset));
  593. if (peer->stats.rx.avg_snr == CDP_INVALID_SNR)
  594. peer->stats.rx.avg_snr =
  595. CDP_SNR_IN(peer->stats.rx.snr);
  596. else
  597. CDP_SNR_UPDATE_AVG(peer->stats.rx.avg_snr,
  598. peer->stats.rx.snr);
  599. if (ppdu_type == HAL_RX_TYPE_SU) {
  600. if (nss) {
  601. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  602. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  603. }
  604. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  605. ppdu_user->mpdu_cnt_fcs_ok);
  606. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  607. ppdu_user->mpdu_cnt_fcs_err);
  608. }
  609. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  610. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  611. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  612. mu_pkt_type = RX_TYPE_MU_MIMO;
  613. else
  614. mu_pkt_type = RX_TYPE_MU_OFDMA;
  615. if (nss) {
  616. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  617. DP_STATS_INC(peer,
  618. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  619. 1);
  620. }
  621. DP_STATS_INC(peer,
  622. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  623. ppdu_user->mpdu_cnt_fcs_ok);
  624. DP_STATS_INC(peer,
  625. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  626. ppdu_user->mpdu_cnt_fcs_err);
  627. }
  628. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  629. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  630. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  631. num_msdu);
  632. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  633. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  634. ppdu_user->is_ampdu);
  635. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  636. !(ppdu_user->is_ampdu));
  637. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  638. DP_STATS_INCC(peer,
  639. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  640. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  641. DP_STATS_INCC(peer,
  642. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  643. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  644. DP_STATS_INCC(peer,
  645. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  646. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  647. DP_STATS_INCC(peer,
  648. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  649. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  650. DP_STATS_INCC(peer,
  651. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  652. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  653. DP_STATS_INCC(peer,
  654. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  655. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  656. DP_STATS_INCC(peer,
  657. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  658. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  659. DP_STATS_INCC(peer,
  660. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  661. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  662. DP_STATS_INCC(peer,
  663. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  664. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  665. DP_STATS_INCC(peer,
  666. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  667. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  668. DP_STATS_INCC(peer,
  669. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  670. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  671. (ppdu_type == HAL_RX_TYPE_SU)));
  672. DP_STATS_INCC(peer,
  673. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  674. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  675. (ppdu_type == HAL_RX_TYPE_SU)));
  676. DP_STATS_INCC(peer,
  677. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  678. 1, ((mcs >= (MAX_MCS - 1)) &&
  679. (preamble == DOT11_AX) &&
  680. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  681. DP_STATS_INCC(peer,
  682. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  683. 1, ((mcs < (MAX_MCS - 1)) &&
  684. (preamble == DOT11_AX) &&
  685. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  686. DP_STATS_INCC(peer,
  687. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  688. 1, ((mcs >= (MAX_MCS - 1)) &&
  689. (preamble == DOT11_AX) &&
  690. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  691. DP_STATS_INCC(peer,
  692. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  693. 1, ((mcs < (MAX_MCS - 1)) &&
  694. (preamble == DOT11_AX) &&
  695. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  696. /*
  697. * If invalid TID, it could be a non-qos frame, hence do not
  698. * update any AC counters
  699. */
  700. ac = TID_TO_WME_AC(ppdu_user->tid);
  701. if (ppdu->tid != HAL_TID_INVALID)
  702. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  703. dp_peer_stats_notify(pdev, peer);
  704. DP_STATS_UPD(peer, rx.last_snr, ppdu->rssi);
  705. dp_peer_qos_stats_notify(pdev, ppdu_user);
  706. if (peer == pdev->invalid_peer)
  707. continue;
  708. if (dp_is_subtype_data(ppdu->frame_ctrl))
  709. dp_rx_rate_stats_update(peer, ppdu, i);
  710. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  711. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  712. &peer->stats, ppdu->peer_id,
  713. UPDATE_PEER_STATS, pdev->pdev_id);
  714. #endif
  715. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  716. }
  717. }
  718. #endif
  719. /**
  720. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  721. * @soc: core txrx main context
  722. * @pdev: pdev structure
  723. * @ppdu_info: structure for rx ppdu ring
  724. * @nbuf: QDF nbuf
  725. * @fcs_ok_mpdu_cnt: fcs passsed mpdu index
  726. * @deliver_frame: flag to deliver wdi event
  727. *
  728. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  729. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  730. */
  731. #ifdef FEATURE_PERPKT_INFO
  732. static inline QDF_STATUS
  733. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  734. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  735. uint8_t fcs_ok_mpdu_cnt, bool deliver_frame)
  736. {
  737. uint16_t size = 0;
  738. struct ieee80211_frame *wh;
  739. uint32_t *nbuf_data;
  740. if (!ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload)
  741. return QDF_STATUS_SUCCESS;
  742. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  743. if (pdev->mcopy_mode == M_COPY) {
  744. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  745. return QDF_STATUS_SUCCESS;
  746. }
  747. wh = (struct ieee80211_frame *)(ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload + 4);
  748. size = (ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload -
  749. qdf_nbuf_data(nbuf));
  750. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  751. return QDF_STATUS_SUCCESS;
  752. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  753. IEEE80211_FC0_TYPE_MGT) ||
  754. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  755. IEEE80211_FC0_TYPE_CTL)) {
  756. return QDF_STATUS_SUCCESS;
  757. }
  758. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  759. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  760. /* only retain RX MSDU payload in the skb */
  761. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) - ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].payload_len);
  762. if (deliver_frame) {
  763. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  764. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  765. nbuf, HTT_INVALID_PEER,
  766. WDI_NO_VAL, pdev->pdev_id);
  767. }
  768. return QDF_STATUS_E_ALREADY;
  769. }
  770. #else
  771. static inline QDF_STATUS
  772. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  773. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  774. uint8_t fcs_ok_cnt, bool deliver_frame)
  775. {
  776. return QDF_STATUS_SUCCESS;
  777. }
  778. #endif
  779. /**
  780. * dp_rx_mcopy_handle_last_mpdu() - cache and delive last MPDU header in a
  781. * status buffer if MPDU end tlv is received in different buffer
  782. * @soc: core txrx main context
  783. * @pdev: pdev structure
  784. * @ppdu_info: structure for rx ppdu ring
  785. * @status_nbuf: QDF nbuf
  786. *
  787. * Return: void
  788. */
  789. #ifdef FEATURE_PERPKT_INFO
  790. static inline void
  791. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  792. struct hal_rx_ppdu_info *ppdu_info,
  793. qdf_nbuf_t status_nbuf)
  794. {
  795. QDF_STATUS mcopy_status;
  796. qdf_nbuf_t nbuf_clone = NULL;
  797. /* If the MPDU end tlv and RX header are received in different buffers,
  798. * process the RX header based on fcs status.
  799. */
  800. if (pdev->mcopy_status_nbuf) {
  801. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  802. if (pdev->mcopy_mode == M_COPY) {
  803. if (pdev->m_copy_id.rx_ppdu_id ==
  804. ppdu_info->com_info.ppdu_id)
  805. goto end1;
  806. }
  807. if (ppdu_info->is_fcs_passed) {
  808. nbuf_clone = qdf_nbuf_clone(pdev->mcopy_status_nbuf);
  809. if (!nbuf_clone) {
  810. QDF_TRACE(QDF_MODULE_ID_TXRX,
  811. QDF_TRACE_LEVEL_ERROR,
  812. "Failed to clone nbuf");
  813. goto end1;
  814. }
  815. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  816. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  817. nbuf_clone,
  818. HTT_INVALID_PEER,
  819. WDI_NO_VAL, pdev->pdev_id);
  820. ppdu_info->is_fcs_passed = false;
  821. }
  822. end1:
  823. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  824. pdev->mcopy_status_nbuf = NULL;
  825. }
  826. /* If the MPDU end tlv and RX header are received in different buffers,
  827. * preserve the RX header as the fcs status will be received in MPDU
  828. * end tlv in next buffer. So, cache the buffer to be processd in next
  829. * iteration
  830. */
  831. if ((ppdu_info->fcs_ok_cnt + ppdu_info->fcs_err_cnt) !=
  832. ppdu_info->com_info.mpdu_cnt) {
  833. pdev->mcopy_status_nbuf = qdf_nbuf_clone(status_nbuf);
  834. if (pdev->mcopy_status_nbuf) {
  835. mcopy_status = dp_rx_handle_mcopy_mode(
  836. soc, pdev,
  837. ppdu_info,
  838. pdev->mcopy_status_nbuf,
  839. ppdu_info->fcs_ok_cnt,
  840. false);
  841. if (mcopy_status == QDF_STATUS_SUCCESS) {
  842. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  843. pdev->mcopy_status_nbuf = NULL;
  844. }
  845. }
  846. }
  847. }
  848. #else
  849. static inline void
  850. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  851. struct hal_rx_ppdu_info *ppdu_info,
  852. qdf_nbuf_t status_nbuf)
  853. {
  854. }
  855. #endif
  856. /**
  857. * dp_rx_mcopy_process_ppdu_info() - update mcopy ppdu info
  858. * @ppdu_info: structure for rx ppdu ring
  859. * @tlv_status: processed TLV status
  860. *
  861. * Return: void
  862. */
  863. #ifdef FEATURE_PERPKT_INFO
  864. static inline void
  865. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  866. struct hal_rx_ppdu_info *ppdu_info,
  867. uint32_t tlv_status)
  868. {
  869. if (!pdev->mcopy_mode)
  870. return;
  871. /* The fcs status is received in MPDU end tlv. If the RX header
  872. * and its MPDU end tlv are received in different status buffer then
  873. * to process that header ppdu_info->is_fcs_passed is used.
  874. * If end tlv is received in next status buffer then com_info.mpdu_cnt
  875. * will be 0 at the time of receiving MPDU end tlv and we update the
  876. * is_fcs_passed flag based on ppdu_info->fcs_err.
  877. */
  878. if (tlv_status != HAL_TLV_STATUS_MPDU_END)
  879. return;
  880. if (!ppdu_info->fcs_err) {
  881. if (ppdu_info->fcs_ok_cnt >
  882. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  883. dp_err("No. of MPDUs(%d) per status buff exceeded",
  884. ppdu_info->fcs_ok_cnt);
  885. return;
  886. }
  887. if (ppdu_info->com_info.mpdu_cnt)
  888. ppdu_info->fcs_ok_cnt++;
  889. else
  890. ppdu_info->is_fcs_passed = true;
  891. } else {
  892. if (ppdu_info->com_info.mpdu_cnt)
  893. ppdu_info->fcs_err_cnt++;
  894. else
  895. ppdu_info->is_fcs_passed = false;
  896. }
  897. }
  898. #else
  899. static inline void
  900. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  901. struct hal_rx_ppdu_info *ppdu_info,
  902. uint32_t tlv_status)
  903. {
  904. }
  905. #endif
  906. #ifdef FEATURE_PERPKT_INFO
  907. static inline void
  908. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  909. struct hal_rx_ppdu_info *ppdu_info,
  910. uint32_t tlv_status,
  911. qdf_nbuf_t status_nbuf)
  912. {
  913. QDF_STATUS mcopy_status;
  914. qdf_nbuf_t nbuf_clone = NULL;
  915. uint8_t fcs_ok_mpdu_cnt = 0;
  916. dp_rx_mcopy_handle_last_mpdu(soc, pdev, ppdu_info, status_nbuf);
  917. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt))
  918. goto end;
  919. if (qdf_unlikely(!ppdu_info->fcs_ok_cnt))
  920. goto end;
  921. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  922. if (pdev->mcopy_mode == M_COPY)
  923. ppdu_info->fcs_ok_cnt = 1;
  924. while (fcs_ok_mpdu_cnt < ppdu_info->fcs_ok_cnt) {
  925. nbuf_clone = qdf_nbuf_clone(status_nbuf);
  926. if (!nbuf_clone) {
  927. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  928. "Failed to clone nbuf");
  929. goto end;
  930. }
  931. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  932. ppdu_info,
  933. nbuf_clone,
  934. fcs_ok_mpdu_cnt,
  935. true);
  936. if (mcopy_status == QDF_STATUS_SUCCESS)
  937. qdf_nbuf_free(nbuf_clone);
  938. fcs_ok_mpdu_cnt++;
  939. }
  940. end:
  941. qdf_nbuf_free(status_nbuf);
  942. ppdu_info->fcs_ok_cnt = 0;
  943. ppdu_info->fcs_err_cnt = 0;
  944. ppdu_info->com_info.mpdu_cnt = 0;
  945. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  946. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER
  947. * sizeof(struct hal_rx_msdu_payload_info));
  948. }
  949. #else
  950. static inline void
  951. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  952. struct hal_rx_ppdu_info *ppdu_info,
  953. uint32_t tlv_status,
  954. qdf_nbuf_t status_nbuf)
  955. {
  956. }
  957. #endif
  958. /**
  959. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  960. * @soc: Datapath SOC handle
  961. * @pdev: Datapath PDEV handle
  962. * @ppdu_info: Structure for rx ppdu info
  963. * @nbuf: Qdf nbuf abstraction for linux skb
  964. *
  965. * Return: 0 on success, 1 on failure
  966. */
  967. static inline int
  968. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  969. struct hal_rx_ppdu_info *ppdu_info,
  970. qdf_nbuf_t nbuf)
  971. {
  972. uint8_t size = 0;
  973. if (!pdev->monitor_vdev) {
  974. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  975. "[%s]:[%d] Monitor vdev is NULL !!",
  976. __func__, __LINE__);
  977. return 1;
  978. }
  979. if (!ppdu_info->msdu_info.first_msdu_payload) {
  980. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  981. "[%s]:[%d] First msdu payload not present",
  982. __func__, __LINE__);
  983. return 1;
  984. }
  985. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  986. size = (ppdu_info->msdu_info.first_msdu_payload -
  987. qdf_nbuf_data(nbuf)) + 4;
  988. ppdu_info->msdu_info.first_msdu_payload = NULL;
  989. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  990. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  991. "[%s]:[%d] No header present",
  992. __func__, __LINE__);
  993. return 1;
  994. }
  995. /* Only retain RX MSDU payload in the skb */
  996. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  997. ppdu_info->msdu_info.payload_len);
  998. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  999. qdf_nbuf_headroom(nbuf))) {
  1000. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  1001. return 1;
  1002. }
  1003. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  1004. nbuf, NULL);
  1005. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  1006. return 0;
  1007. }
  1008. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  1009. /*
  1010. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  1011. * the PPDU received, this will be used for correlation of CFR data captured
  1012. * for an UL-MU-PPDU
  1013. * @pdev: pdev ctx
  1014. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  1015. * @cdp_rx_ppdu: Rx PPDU indication structure
  1016. *
  1017. * Return: none
  1018. */
  1019. static inline void
  1020. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1021. struct hal_rx_ppdu_info *ppdu_info,
  1022. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1023. {
  1024. struct dp_peer *peer;
  1025. struct dp_soc *soc = pdev->soc;
  1026. struct dp_ast_entry *ast_entry;
  1027. struct mon_rx_user_status *rx_user_status;
  1028. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  1029. uint32_t num_users;
  1030. int user_id;
  1031. uint32_t ast_index;
  1032. qdf_spin_lock_bh(&soc->ast_lock);
  1033. num_users = ppdu_info->com_info.num_users;
  1034. for (user_id = 0; user_id < num_users; user_id++) {
  1035. if (user_id > OFDMA_NUM_USERS) {
  1036. qdf_spin_unlock_bh(&soc->ast_lock);
  1037. return;
  1038. }
  1039. rx_user_status = &ppdu_info->rx_user_status[user_id];
  1040. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  1041. ast_index = rx_user_status->ast_index;
  1042. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1043. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  1044. continue;
  1045. }
  1046. ast_entry = soc->ast_table[ast_index];
  1047. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  1048. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  1049. continue;
  1050. }
  1051. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  1052. DP_MOD_ID_RX_PPDU_STATS);
  1053. if (!peer) {
  1054. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  1055. continue;
  1056. }
  1057. qdf_mem_copy(rx_stats_peruser->mac_addr,
  1058. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  1059. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  1060. }
  1061. qdf_spin_unlock_bh(&soc->ast_lock);
  1062. }
  1063. /*
  1064. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  1065. * info
  1066. * @pdev: pdev ctx
  1067. * @ppdu_info: ppdu info structure from ppdu ring
  1068. * @cdp_rx_ppdu : Rx PPDU indication structure
  1069. *
  1070. * Return: none
  1071. */
  1072. static inline void
  1073. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1074. struct hal_rx_ppdu_info *ppdu_info,
  1075. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1076. {
  1077. int chain;
  1078. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  1079. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  1080. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  1081. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  1082. for (chain = 0; chain < MAX_CHAIN; chain++)
  1083. cdp_rx_ppdu->per_chain_rssi[chain] =
  1084. ppdu_info->rx_status.rssi[chain];
  1085. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  1086. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  1087. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  1088. if (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC) {
  1089. cdp_rx_ppdu->u.stbc = ppdu_info->rx_status.is_stbc;
  1090. } else if (ppdu_info->rx_status.preamble_type ==
  1091. HAL_RX_PKT_TYPE_11AX) {
  1092. cdp_rx_ppdu->u.stbc = (ppdu_info->rx_status.he_data3 >>
  1093. QDF_MON_STATUS_STBC_SHIFT) & 0x1;
  1094. cdp_rx_ppdu->u.dcm = (ppdu_info->rx_status.he_data3 >>
  1095. QDF_MON_STATUS_DCM_SHIFT) & 0x1;
  1096. }
  1097. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1098. }
  1099. /**
  1100. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  1101. * @pdev: pdev ctx
  1102. *
  1103. * Return: True or False
  1104. */
  1105. static inline bool
  1106. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1107. {
  1108. return pdev->cfr_rcc_mode;
  1109. }
  1110. /*
  1111. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  1112. * @pdev: pdev ctx
  1113. * @ppdu_info: ppdu info structure from ppdu ring
  1114. * @cdp_rx_ppdu: Rx PPDU indication structure
  1115. *
  1116. * Return: none
  1117. */
  1118. static inline void
  1119. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1120. struct hal_rx_ppdu_info *ppdu_info,
  1121. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1122. {
  1123. struct cdp_rx_ppdu_cfr_info *cfr_info;
  1124. if (!dp_cfr_rcc_mode_status(pdev))
  1125. return;
  1126. cfr_info = &cdp_rx_ppdu->cfr_info;
  1127. cfr_info->bb_captured_channel
  1128. = ppdu_info->cfr_info.bb_captured_channel;
  1129. cfr_info->bb_captured_timeout
  1130. = ppdu_info->cfr_info.bb_captured_timeout;
  1131. cfr_info->bb_captured_reason
  1132. = ppdu_info->cfr_info.bb_captured_reason;
  1133. cfr_info->rx_location_info_valid
  1134. = ppdu_info->cfr_info.rx_location_info_valid;
  1135. cfr_info->chan_capture_status
  1136. = ppdu_info->cfr_info.chan_capture_status;
  1137. cfr_info->rtt_che_buffer_pointer_high8
  1138. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  1139. cfr_info->rtt_che_buffer_pointer_low32
  1140. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  1141. cfr_info->rtt_cfo_measurement
  1142. = (int16_t)ppdu_info->cfr_info.rtt_cfo_measurement;
  1143. cfr_info->agc_gain_info0
  1144. = ppdu_info->cfr_info.agc_gain_info0;
  1145. cfr_info->agc_gain_info1
  1146. = ppdu_info->cfr_info.agc_gain_info1;
  1147. cfr_info->agc_gain_info2
  1148. = ppdu_info->cfr_info.agc_gain_info2;
  1149. cfr_info->agc_gain_info3
  1150. = ppdu_info->cfr_info.agc_gain_info3;
  1151. cfr_info->rx_start_ts
  1152. = ppdu_info->cfr_info.rx_start_ts;
  1153. cfr_info->mcs_rate
  1154. = ppdu_info->cfr_info.mcs_rate;
  1155. cfr_info->gi_type
  1156. = ppdu_info->cfr_info.gi_type;
  1157. }
  1158. /**
  1159. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  1160. * @pdev: pdev structure
  1161. * @ppdu_info: structure for rx ppdu ring
  1162. *
  1163. * Return: none
  1164. */
  1165. static inline void
  1166. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1167. struct hal_rx_ppdu_info *ppdu_info)
  1168. {
  1169. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1170. DP_STATS_INC(pdev,
  1171. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  1172. if (cfr->rx_location_info_valid) {
  1173. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  1174. if (cfr->bb_captured_channel) {
  1175. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  1176. DP_STATS_INC(pdev,
  1177. rcc.reason_cnt[cfr->bb_captured_reason],
  1178. 1);
  1179. } else if (cfr->bb_captured_timeout) {
  1180. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  1181. DP_STATS_INC(pdev,
  1182. rcc.reason_cnt[cfr->bb_captured_reason],
  1183. 1);
  1184. }
  1185. }
  1186. }
  1187. /*
  1188. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  1189. * @soc: core txrx main context
  1190. * @pdev: pdev ctx
  1191. * @ppdu_info: ppdu info structure from ppdu ring
  1192. *
  1193. * Return: none
  1194. */
  1195. static inline void
  1196. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1197. struct hal_rx_ppdu_info *ppdu_info)
  1198. {
  1199. qdf_nbuf_t ppdu_nbuf;
  1200. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1201. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1202. if (!ppdu_info->cfr_info.bb_captured_channel)
  1203. return;
  1204. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1205. sizeof(struct cdp_rx_indication_ppdu),
  1206. 0,
  1207. 0,
  1208. FALSE);
  1209. if (ppdu_nbuf) {
  1210. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1211. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1212. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1213. qdf_nbuf_put_tail(ppdu_nbuf,
  1214. sizeof(struct cdp_rx_indication_ppdu));
  1215. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1216. ppdu_nbuf, HTT_INVALID_PEER,
  1217. WDI_NO_VAL, pdev->pdev_id);
  1218. }
  1219. }
  1220. /**
  1221. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1222. * non-associated stations
  1223. * @pdev: pdev ctx
  1224. * @ppdu_info: ppdu info structure from ppdu ring
  1225. * @cdp_rx_ppdu: Rx PPDU indication structure
  1226. *
  1227. * Return: none
  1228. */
  1229. static inline void
  1230. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1231. struct hal_rx_ppdu_info *ppdu_info,
  1232. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1233. {
  1234. if (!dp_cfr_rcc_mode_status(pdev))
  1235. return;
  1236. if (ppdu_info->cfr_info.bb_captured_channel)
  1237. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1238. }
  1239. /**
  1240. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1241. * @ppdu_info: structure for rx ppdu ring
  1242. *
  1243. * Return: Success/ Failure
  1244. */
  1245. static inline QDF_STATUS
  1246. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1247. struct hal_rx_ppdu_info *ppdu_info)
  1248. {
  1249. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1250. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1251. if (dp_cfr_rcc_mode_status(pdev)) {
  1252. if (cfr->bb_captured_channel)
  1253. status = QDF_STATUS_SUCCESS;
  1254. }
  1255. return status;
  1256. }
  1257. #else
  1258. static inline void
  1259. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1260. struct hal_rx_ppdu_info *ppdu_info,
  1261. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1262. {
  1263. }
  1264. static inline void
  1265. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1266. struct hal_rx_ppdu_info *ppdu_info,
  1267. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1268. {
  1269. }
  1270. static inline void
  1271. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1272. struct hal_rx_ppdu_info *ppdu_info,
  1273. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1274. {
  1275. }
  1276. static inline void
  1277. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1278. struct hal_rx_ppdu_info *ppdu_info)
  1279. {
  1280. }
  1281. static inline void
  1282. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1283. struct hal_rx_ppdu_info *ppdu_info,
  1284. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1285. {
  1286. }
  1287. static inline void
  1288. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1289. struct hal_rx_ppdu_info *ppdu_info)
  1290. {
  1291. }
  1292. static inline QDF_STATUS
  1293. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1294. struct hal_rx_ppdu_info *ppdu_info)
  1295. {
  1296. return QDF_STATUS_E_NOSUPPORT;
  1297. }
  1298. static inline bool
  1299. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1300. {
  1301. return false;
  1302. }
  1303. #endif
  1304. /**
  1305. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1306. * @soc: core txrx main context
  1307. * @pdev: pdev strcuture
  1308. * @ppdu_info: structure for rx ppdu ring
  1309. *
  1310. * Return: none
  1311. */
  1312. #ifdef FEATURE_PERPKT_INFO
  1313. static inline void
  1314. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1315. struct hal_rx_ppdu_info *ppdu_info)
  1316. {
  1317. qdf_nbuf_t ppdu_nbuf;
  1318. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1319. /*
  1320. * Do not allocate if fcs error,
  1321. * ast idx invalid / fctl invalid
  1322. *
  1323. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1324. */
  1325. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1326. return;
  1327. if (ppdu_info->nac_info.fc_valid &&
  1328. ppdu_info->nac_info.to_ds_flag &&
  1329. ppdu_info->nac_info.mac_addr2_valid) {
  1330. struct dp_neighbour_peer *peer = NULL;
  1331. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1332. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1333. if (pdev->neighbour_peers_added) {
  1334. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1335. neighbour_peer_list_elem) {
  1336. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1337. &ppdu_info->nac_info.mac_addr2,
  1338. QDF_MAC_ADDR_SIZE)) {
  1339. peer->rssi = rssi;
  1340. break;
  1341. }
  1342. }
  1343. }
  1344. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1345. } else {
  1346. dp_info("Neighbour peers RSSI update failed! fc_valid = %d, to_ds_flag = %d and mac_addr2_valid = %d",
  1347. ppdu_info->nac_info.fc_valid,
  1348. ppdu_info->nac_info.to_ds_flag,
  1349. ppdu_info->nac_info.mac_addr2_valid);
  1350. }
  1351. /* need not generate wdi event when mcopy, cfr rcc mode and
  1352. * enhanced stats are not enabled
  1353. */
  1354. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1355. !dp_cfr_rcc_mode_status(pdev))
  1356. return;
  1357. if (dp_cfr_rcc_mode_status(pdev))
  1358. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1359. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1360. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1361. if (!(pdev->mcopy_mode ||
  1362. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1363. QDF_STATUS_SUCCESS)))
  1364. return;
  1365. }
  1366. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1367. sizeof(struct cdp_rx_indication_ppdu),
  1368. 0, 0, FALSE);
  1369. if (ppdu_nbuf) {
  1370. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)qdf_nbuf_data(ppdu_nbuf);
  1371. qdf_mem_zero(cdp_rx_ppdu, sizeof(struct cdp_rx_indication_ppdu));
  1372. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1373. dp_rx_populate_cdp_indication_ppdu(pdev,
  1374. ppdu_info, cdp_rx_ppdu);
  1375. if (!qdf_nbuf_put_tail(ppdu_nbuf,
  1376. sizeof(struct cdp_rx_indication_ppdu)))
  1377. return;
  1378. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1379. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1380. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1381. soc, ppdu_nbuf,
  1382. cdp_rx_ppdu->peer_id,
  1383. WDI_NO_VAL, pdev->pdev_id);
  1384. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1385. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1386. ppdu_nbuf, HTT_INVALID_PEER,
  1387. WDI_NO_VAL, pdev->pdev_id);
  1388. } else {
  1389. qdf_nbuf_free(ppdu_nbuf);
  1390. }
  1391. }
  1392. }
  1393. #else
  1394. static inline void
  1395. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1396. struct hal_rx_ppdu_info *ppdu_info)
  1397. {
  1398. }
  1399. #endif
  1400. /**
  1401. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1402. * filtering enabled
  1403. * @soc: core txrx main context
  1404. * @ppdu_info: Structure for rx ppdu info
  1405. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1406. * @pdev_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1407. *
  1408. * Return: none
  1409. */
  1410. static inline void
  1411. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1412. struct hal_rx_ppdu_info *ppdu_info,
  1413. qdf_nbuf_t status_nbuf, uint32_t pdev_id)
  1414. {
  1415. struct dp_peer *peer;
  1416. struct dp_ast_entry *ast_entry;
  1417. uint32_t ast_index;
  1418. ast_index = ppdu_info->rx_status.ast_index;
  1419. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1420. ast_entry = soc->ast_table[ast_index];
  1421. if (ast_entry) {
  1422. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  1423. DP_MOD_ID_RX_PPDU_STATS);
  1424. if (peer) {
  1425. if ((peer->peer_id != HTT_INVALID_PEER) &&
  1426. (peer->peer_based_pktlog_filter)) {
  1427. dp_wdi_event_handler(
  1428. WDI_EVENT_RX_DESC, soc,
  1429. status_nbuf,
  1430. peer->peer_id,
  1431. WDI_NO_VAL, pdev_id);
  1432. }
  1433. dp_peer_unref_delete(peer,
  1434. DP_MOD_ID_RX_PPDU_STATS);
  1435. }
  1436. }
  1437. }
  1438. }
  1439. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1440. static inline void
  1441. dp_rx_ul_ofdma_ru_size_to_width(
  1442. uint32_t ru_size,
  1443. uint32_t *ru_width)
  1444. {
  1445. uint32_t width;
  1446. width = 0;
  1447. switch (ru_size) {
  1448. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1449. width = 1;
  1450. break;
  1451. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1452. width = 2;
  1453. break;
  1454. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1455. width = 4;
  1456. break;
  1457. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1458. width = 9;
  1459. break;
  1460. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1461. width = 18;
  1462. break;
  1463. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1464. width = 37;
  1465. break;
  1466. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1467. width = 74;
  1468. break;
  1469. default:
  1470. dp_rx_mon_status_err("RU size to width convert err");
  1471. break;
  1472. }
  1473. *ru_width = width;
  1474. }
  1475. static inline void
  1476. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1477. {
  1478. struct mon_rx_user_status *mon_rx_user_status;
  1479. uint32_t num_users;
  1480. uint32_t i;
  1481. uint32_t mu_ul_user_v0_word0;
  1482. uint32_t mu_ul_user_v0_word1;
  1483. uint32_t ru_width;
  1484. uint32_t ru_size;
  1485. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1486. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1487. return;
  1488. num_users = ppdu_info->com_info.num_users;
  1489. if (num_users > HAL_MAX_UL_MU_USERS)
  1490. num_users = HAL_MAX_UL_MU_USERS;
  1491. for (i = 0; i < num_users; i++) {
  1492. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1493. mu_ul_user_v0_word0 =
  1494. mon_rx_user_status->mu_ul_user_v0_word0;
  1495. mu_ul_user_v0_word1 =
  1496. mon_rx_user_status->mu_ul_user_v0_word1;
  1497. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1498. mu_ul_user_v0_word0) &&
  1499. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1500. mu_ul_user_v0_word0)) {
  1501. mon_rx_user_status->mcs =
  1502. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1503. mu_ul_user_v0_word1);
  1504. mon_rx_user_status->nss =
  1505. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1506. mu_ul_user_v0_word1) + 1;
  1507. mon_rx_user_status->mu_ul_info_valid = 1;
  1508. mon_rx_user_status->ofdma_ru_start_index =
  1509. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1510. mu_ul_user_v0_word1);
  1511. ru_size =
  1512. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1513. mu_ul_user_v0_word1);
  1514. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1515. mon_rx_user_status->ofdma_ru_width = ru_width;
  1516. mon_rx_user_status->ofdma_ru_size = ru_size;
  1517. }
  1518. }
  1519. }
  1520. #else
  1521. static inline void
  1522. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1523. {
  1524. }
  1525. #endif
  1526. /**
  1527. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1528. * buffer on Rx status Queue posted by status SRNG processing.
  1529. * @soc: core txrx main context
  1530. * @int_ctx: interrupt context
  1531. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1532. * @quota: amount of work which can be done
  1533. *
  1534. * Return: none
  1535. */
  1536. static inline void
  1537. dp_rx_mon_status_process_tlv(struct dp_soc *soc, struct dp_intr *int_ctx,
  1538. uint32_t mac_id, uint32_t quota)
  1539. {
  1540. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1541. struct hal_rx_ppdu_info *ppdu_info;
  1542. qdf_nbuf_t status_nbuf;
  1543. uint8_t *rx_tlv;
  1544. uint8_t *rx_tlv_start;
  1545. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1546. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1547. struct cdp_pdev_mon_stats *rx_mon_stats;
  1548. int smart_mesh_status;
  1549. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1550. bool nbuf_used;
  1551. uint32_t rx_enh_capture_mode;
  1552. if (!pdev) {
  1553. dp_rx_mon_status_debug("%pK: pdev is null for mac_id = %d", soc,
  1554. mac_id);
  1555. return;
  1556. }
  1557. ppdu_info = &pdev->ppdu_info;
  1558. rx_mon_stats = &pdev->rx_mon_stats;
  1559. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1560. return;
  1561. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1562. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1563. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1564. rx_tlv = qdf_nbuf_data(status_nbuf);
  1565. rx_tlv_start = rx_tlv;
  1566. nbuf_used = false;
  1567. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1568. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1569. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1570. do {
  1571. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1572. ppdu_info, pdev->soc->hal_soc,
  1573. status_nbuf);
  1574. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1575. rx_mon_stats);
  1576. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1577. status_nbuf, ppdu_info,
  1578. &nbuf_used);
  1579. dp_rx_mcopy_process_ppdu_info(pdev,
  1580. ppdu_info,
  1581. tlv_status);
  1582. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1583. if ((rx_tlv - rx_tlv_start) >=
  1584. RX_MON_STATUS_BUF_SIZE)
  1585. break;
  1586. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1587. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1588. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1589. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1590. }
  1591. if (pdev->dp_peer_based_pktlog) {
  1592. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1593. status_nbuf,
  1594. pdev->pdev_id);
  1595. } else {
  1596. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1597. pktlog_mode = WDI_EVENT_RX_DESC;
  1598. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1599. pktlog_mode = WDI_EVENT_LITE_RX;
  1600. if (pktlog_mode != WDI_NO_VAL)
  1601. dp_wdi_event_handler(pktlog_mode, soc,
  1602. status_nbuf,
  1603. HTT_INVALID_PEER,
  1604. WDI_NO_VAL, pdev->pdev_id);
  1605. }
  1606. /* smart monitor vap and m_copy cannot co-exist */
  1607. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1608. && pdev->monitor_vdev) {
  1609. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1610. pdev, ppdu_info, status_nbuf);
  1611. if (smart_mesh_status)
  1612. qdf_nbuf_free(status_nbuf);
  1613. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1614. dp_rx_process_mcopy_mode(soc, pdev,
  1615. ppdu_info, tlv_status,
  1616. status_nbuf);
  1617. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1618. if (!nbuf_used)
  1619. qdf_nbuf_free(status_nbuf);
  1620. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1621. enh_log_status =
  1622. dp_rx_handle_enh_capture(soc,
  1623. pdev, ppdu_info);
  1624. } else {
  1625. qdf_nbuf_free(status_nbuf);
  1626. }
  1627. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1628. dp_rx_mon_deliver_non_std(soc, mac_id);
  1629. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1630. rx_mon_stats->status_ppdu_done++;
  1631. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1632. if (pdev->tx_capture_enabled
  1633. != CDP_TX_ENH_CAPTURE_DISABLED)
  1634. dp_send_ack_frame_to_stack(soc, pdev,
  1635. ppdu_info);
  1636. if (pdev->enhanced_stats_en ||
  1637. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1638. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1639. else if (dp_cfr_rcc_mode_status(pdev))
  1640. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1641. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1642. /*
  1643. * if chan_num is not fetched correctly from ppdu RX TLV,
  1644. * get it from pdev saved.
  1645. */
  1646. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1647. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1648. /*
  1649. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1650. * get it from pdev saved.
  1651. */
  1652. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1653. pdev->ppdu_info.rx_status.chan_freq =
  1654. pdev->mon_chan_freq;
  1655. }
  1656. if (!soc->full_mon_mode)
  1657. dp_rx_mon_dest_process(soc, int_ctx, mac_id,
  1658. quota);
  1659. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1660. }
  1661. }
  1662. return;
  1663. }
  1664. /*
  1665. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1666. * @soc: core txrx main context
  1667. * @pdev: core txrx pdev context
  1668. *
  1669. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1670. * until retry times reaches max threshold or succeeded.
  1671. *
  1672. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1673. */
  1674. static inline qdf_nbuf_t
  1675. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1676. {
  1677. uint8_t *buf;
  1678. int32_t nbuf_retry_count;
  1679. QDF_STATUS ret;
  1680. qdf_nbuf_t nbuf = NULL;
  1681. for (nbuf_retry_count = 0; nbuf_retry_count <
  1682. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1683. nbuf_retry_count++) {
  1684. /* Allocate a new skb using alloc_skb */
  1685. nbuf = qdf_nbuf_alloc_no_recycler(RX_MON_STATUS_BUF_SIZE,
  1686. RX_MON_STATUS_BUF_RESERVATION,
  1687. RX_DATA_BUFFER_ALIGNMENT);
  1688. if (!nbuf) {
  1689. DP_STATS_INC(pdev, replenish.nbuf_alloc_fail, 1);
  1690. continue;
  1691. }
  1692. buf = qdf_nbuf_data(nbuf);
  1693. memset(buf, 0, RX_MON_STATUS_BUF_SIZE);
  1694. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  1695. QDF_DMA_FROM_DEVICE,
  1696. RX_MON_STATUS_BUF_SIZE);
  1697. /* nbuf map failed */
  1698. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1699. qdf_nbuf_free(nbuf);
  1700. DP_STATS_INC(pdev, replenish.map_err, 1);
  1701. continue;
  1702. }
  1703. /* qdf_nbuf alloc and map succeeded */
  1704. break;
  1705. }
  1706. /* qdf_nbuf still alloc or map failed */
  1707. if (qdf_unlikely(nbuf_retry_count >=
  1708. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1709. return NULL;
  1710. return nbuf;
  1711. }
  1712. /*
  1713. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1714. * post the status ring buffer to Rx status Queue for later
  1715. * processing when status ring is filled with status TLV.
  1716. * Allocate a new buffer to status ring if the filled buffer
  1717. * is posted.
  1718. * @soc: core txrx main context
  1719. * @int_ctx: interrupt context
  1720. * @mac_id: mac_id which is one of 3 mac_ids
  1721. * @quota: No. of ring entry that can be serviced in one shot.
  1722. * Return: uint32_t: No. of ring entry that is processed.
  1723. */
  1724. static inline uint32_t
  1725. dp_rx_mon_status_srng_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1726. uint32_t mac_id, uint32_t quota)
  1727. {
  1728. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1729. hal_soc_handle_t hal_soc;
  1730. void *mon_status_srng;
  1731. void *rxdma_mon_status_ring_entry;
  1732. QDF_STATUS status;
  1733. enum dp_mon_reap_status reap_status;
  1734. uint32_t work_done = 0;
  1735. if (!pdev) {
  1736. dp_rx_mon_status_debug("%pK: pdev is null for mac_id = %d",
  1737. soc, mac_id);
  1738. return work_done;
  1739. }
  1740. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1741. qdf_assert(mon_status_srng);
  1742. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1743. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1744. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1745. __func__, __LINE__, mon_status_srng);
  1746. return work_done;
  1747. }
  1748. hal_soc = soc->hal_soc;
  1749. qdf_assert(hal_soc);
  1750. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, mon_status_srng)))
  1751. goto done;
  1752. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1753. * BUFFER_ADDR_INFO STRUCT
  1754. */
  1755. while (qdf_likely((rxdma_mon_status_ring_entry =
  1756. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1757. && quota--)) {
  1758. struct hal_buf_info hbi;
  1759. qdf_nbuf_t status_nbuf;
  1760. struct dp_rx_desc *rx_desc;
  1761. uint8_t *status_buf;
  1762. qdf_dma_addr_t paddr;
  1763. uint64_t buf_addr;
  1764. struct rx_desc_pool *rx_desc_pool;
  1765. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1766. buf_addr =
  1767. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1768. rxdma_mon_status_ring_entry) |
  1769. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1770. rxdma_mon_status_ring_entry)) << 32));
  1771. if (qdf_likely(buf_addr)) {
  1772. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  1773. (uint32_t *)rxdma_mon_status_ring_entry,
  1774. &hbi);
  1775. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1776. hbi.sw_cookie);
  1777. qdf_assert_always(rx_desc);
  1778. status_nbuf = rx_desc->nbuf;
  1779. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1780. QDF_DMA_FROM_DEVICE);
  1781. status_buf = qdf_nbuf_data(status_nbuf);
  1782. status = hal_get_rx_status_done(status_buf);
  1783. if (status != QDF_STATUS_SUCCESS) {
  1784. uint32_t hp, tp;
  1785. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1786. &tp, &hp);
  1787. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1788. hp, tp);
  1789. /* RxDMA status done bit might not be set even
  1790. * though tp is moved by HW.
  1791. */
  1792. /* If done status is missing:
  1793. * 1. As per MAC team's suggestion,
  1794. * when HP + 1 entry is peeked and if DMA
  1795. * is not done and if HP + 2 entry's DMA done
  1796. * is set. skip HP + 1 entry and
  1797. * start processing in next interrupt.
  1798. * 2. If HP + 2 entry's DMA done is not set,
  1799. * poll onto HP + 1 entry DMA done to be set.
  1800. * Check status for same buffer for next time
  1801. * dp_rx_mon_status_srng_process
  1802. */
  1803. reap_status = dp_rx_mon_handle_status_buf_done(pdev,
  1804. mon_status_srng);
  1805. if (reap_status == DP_MON_STATUS_NO_DMA)
  1806. continue;
  1807. else if (reap_status == DP_MON_STATUS_REPLENISH) {
  1808. if (!rx_desc->unmapped) {
  1809. qdf_nbuf_unmap_nbytes_single(
  1810. soc->osdev, status_nbuf,
  1811. QDF_DMA_FROM_DEVICE,
  1812. rx_desc_pool->buf_size);
  1813. rx_desc->unmapped = 1;
  1814. }
  1815. qdf_nbuf_free(status_nbuf);
  1816. goto buf_replenish;
  1817. }
  1818. }
  1819. qdf_nbuf_set_pktlen(status_nbuf,
  1820. RX_MON_STATUS_BUF_SIZE);
  1821. if (!rx_desc->unmapped) {
  1822. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1823. QDF_DMA_FROM_DEVICE,
  1824. rx_desc_pool->buf_size);
  1825. rx_desc->unmapped = 1;
  1826. }
  1827. /* Put the status_nbuf to queue */
  1828. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1829. } else {
  1830. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1831. union dp_rx_desc_list_elem_t *tail = NULL;
  1832. uint32_t num_alloc_desc;
  1833. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1834. rx_desc_pool,
  1835. 1,
  1836. &desc_list,
  1837. &tail);
  1838. /*
  1839. * No free descriptors available
  1840. */
  1841. if (qdf_unlikely(num_alloc_desc == 0)) {
  1842. work_done++;
  1843. break;
  1844. }
  1845. rx_desc = &desc_list->rx_desc;
  1846. }
  1847. buf_replenish:
  1848. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1849. /*
  1850. * qdf_nbuf alloc or map failed,
  1851. * free the dp rx desc to free list,
  1852. * fill in NULL dma address at current HP entry,
  1853. * keep HP in mon_status_ring unchanged,
  1854. * wait next time dp_rx_mon_status_srng_process
  1855. * to fill in buffer at current HP.
  1856. */
  1857. if (qdf_unlikely(!status_nbuf)) {
  1858. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1859. union dp_rx_desc_list_elem_t *tail = NULL;
  1860. struct rx_desc_pool *rx_desc_pool;
  1861. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1862. dp_info_rl("fail to allocate or map qdf_nbuf");
  1863. dp_rx_add_to_free_desc_list(&desc_list,
  1864. &tail, rx_desc);
  1865. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1866. &tail, mac_id, rx_desc_pool);
  1867. hal_rxdma_buff_addr_info_set(
  1868. hal_soc, rxdma_mon_status_ring_entry,
  1869. 0, 0,
  1870. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id));
  1871. work_done++;
  1872. break;
  1873. }
  1874. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1875. rx_desc->nbuf = status_nbuf;
  1876. rx_desc->in_use = 1;
  1877. rx_desc->unmapped = 0;
  1878. hal_rxdma_buff_addr_info_set(hal_soc,
  1879. rxdma_mon_status_ring_entry,
  1880. paddr, rx_desc->cookie,
  1881. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id));
  1882. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1883. work_done++;
  1884. }
  1885. done:
  1886. dp_srng_access_end(int_ctx, soc, mon_status_srng);
  1887. return work_done;
  1888. }
  1889. uint32_t
  1890. dp_rx_mon_status_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1891. uint32_t mac_id, uint32_t quota)
  1892. {
  1893. uint32_t work_done;
  1894. work_done = dp_rx_mon_status_srng_process(soc, int_ctx, mac_id, quota);
  1895. quota -= work_done;
  1896. dp_rx_mon_status_process_tlv(soc, int_ctx, mac_id, quota);
  1897. return work_done;
  1898. }
  1899. #ifndef DISABLE_MON_CONFIG
  1900. uint32_t
  1901. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1902. uint32_t mac_id, uint32_t quota)
  1903. {
  1904. if (qdf_unlikely(soc->full_mon_mode))
  1905. return dp_rx_mon_process(soc, int_ctx, mac_id, quota);
  1906. return dp_rx_mon_status_process(soc, int_ctx, mac_id, quota);
  1907. }
  1908. #else
  1909. uint32_t
  1910. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1911. uint32_t mac_id, uint32_t quota)
  1912. {
  1913. return 0;
  1914. }
  1915. #endif
  1916. QDF_STATUS
  1917. dp_rx_pdev_mon_status_buffers_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1918. {
  1919. uint8_t pdev_id = pdev->pdev_id;
  1920. struct dp_soc *soc = pdev->soc;
  1921. struct dp_srng *mon_status_ring;
  1922. uint32_t num_entries;
  1923. struct rx_desc_pool *rx_desc_pool;
  1924. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1925. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1926. union dp_rx_desc_list_elem_t *tail = NULL;
  1927. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1928. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1929. num_entries = mon_status_ring->num_entries;
  1930. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1931. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1932. pdev_id, num_entries);
  1933. return dp_rx_mon_status_buffers_replenish(soc, mac_id, mon_status_ring,
  1934. rx_desc_pool, num_entries,
  1935. &desc_list, &tail,
  1936. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id));
  1937. }
  1938. QDF_STATUS
  1939. dp_rx_pdev_mon_status_desc_pool_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1940. {
  1941. uint8_t pdev_id = pdev->pdev_id;
  1942. struct dp_soc *soc = pdev->soc;
  1943. struct dp_srng *mon_status_ring;
  1944. uint32_t num_entries;
  1945. struct rx_desc_pool *rx_desc_pool;
  1946. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1947. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1948. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1949. num_entries = mon_status_ring->num_entries;
  1950. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1951. dp_debug("Mon RX Desc Pool[%d] entries=%u", pdev_id, num_entries);
  1952. rx_desc_pool->desc_type = DP_RX_DESC_STATUS_TYPE;
  1953. return dp_rx_desc_pool_alloc(soc, num_entries + 1, rx_desc_pool);
  1954. }
  1955. void
  1956. dp_rx_pdev_mon_status_desc_pool_init(struct dp_pdev *pdev, uint32_t mac_id)
  1957. {
  1958. uint32_t i;
  1959. uint8_t pdev_id = pdev->pdev_id;
  1960. struct dp_soc *soc = pdev->soc;
  1961. struct dp_srng *mon_status_ring;
  1962. uint32_t num_entries;
  1963. struct rx_desc_pool *rx_desc_pool;
  1964. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1965. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1966. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1967. num_entries = mon_status_ring->num_entries;
  1968. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1969. dp_debug("Mon RX Desc status Pool[%d] init entries=%u",
  1970. pdev_id, num_entries);
  1971. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id);
  1972. rx_desc_pool->buf_size = RX_MON_STATUS_BUF_SIZE;
  1973. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1974. /* Disable frag processing flag */
  1975. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  1976. dp_rx_desc_pool_init(soc, mac_id, num_entries + 1, rx_desc_pool);
  1977. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1978. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1979. qdf_mem_zero(&pdev->ppdu_info, sizeof(pdev->ppdu_info));
  1980. /*
  1981. * Set last_ppdu_id to HAL_INVALID_PPDU_ID in order to avoid ppdu_id
  1982. * match with '0' ppdu_id from monitor status ring
  1983. */
  1984. pdev->ppdu_info.com_info.last_ppdu_id = HAL_INVALID_PPDU_ID;
  1985. qdf_mem_zero(&pdev->rx_mon_stats, sizeof(pdev->rx_mon_stats));
  1986. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1987. &pdev->rx_mon_stats);
  1988. for (i = 0; i < MAX_MU_USERS; i++) {
  1989. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1990. pdev->is_mpdu_hdr[i] = true;
  1991. }
  1992. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1993. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1994. }
  1995. void
  1996. dp_rx_pdev_mon_status_desc_pool_deinit(struct dp_pdev *pdev, uint32_t mac_id) {
  1997. uint8_t pdev_id = pdev->pdev_id;
  1998. struct dp_soc *soc = pdev->soc;
  1999. struct rx_desc_pool *rx_desc_pool;
  2000. rx_desc_pool = &soc->rx_desc_status[mac_id];
  2001. dp_debug("Mon RX Desc status Pool[%d] deinit", pdev_id);
  2002. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_id);
  2003. }
  2004. void
  2005. dp_rx_pdev_mon_status_desc_pool_free(struct dp_pdev *pdev, uint32_t mac_id) {
  2006. uint8_t pdev_id = pdev->pdev_id;
  2007. struct dp_soc *soc = pdev->soc;
  2008. struct rx_desc_pool *rx_desc_pool;
  2009. rx_desc_pool = &soc->rx_desc_status[mac_id];
  2010. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  2011. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2012. }
  2013. void
  2014. dp_rx_pdev_mon_status_buffers_free(struct dp_pdev *pdev, uint32_t mac_id)
  2015. {
  2016. uint8_t pdev_id = pdev->pdev_id;
  2017. struct dp_soc *soc = pdev->soc;
  2018. struct rx_desc_pool *rx_desc_pool;
  2019. rx_desc_pool = &soc->rx_desc_status[mac_id];
  2020. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  2021. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2022. }
  2023. /*
  2024. * dp_rx_buffers_replenish() - replenish monitor status ring with
  2025. * rx nbufs called during dp rx
  2026. * monitor status ring initialization
  2027. *
  2028. * @soc: core txrx main context
  2029. * @mac_id: mac_id which is one of 3 mac_ids
  2030. * @dp_rxdma_srng: dp monitor status circular ring
  2031. * @rx_desc_pool; Pointer to Rx descriptor pool
  2032. * @num_req_buffers: number of buffer to be replenished
  2033. * @desc_list: list of descs if called from dp rx monitor status
  2034. * process or NULL during dp rx initialization or
  2035. * out of buffer interrupt
  2036. * @tail: tail of descs list
  2037. * @owner: who owns the nbuf (host, NSS etc...)
  2038. * Return: return success or failure
  2039. */
  2040. static inline
  2041. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  2042. uint32_t mac_id,
  2043. struct dp_srng *dp_rxdma_srng,
  2044. struct rx_desc_pool *rx_desc_pool,
  2045. uint32_t num_req_buffers,
  2046. union dp_rx_desc_list_elem_t **desc_list,
  2047. union dp_rx_desc_list_elem_t **tail,
  2048. uint8_t owner)
  2049. {
  2050. uint32_t num_alloc_desc;
  2051. uint16_t num_desc_to_free = 0;
  2052. uint32_t num_entries_avail;
  2053. uint32_t count = 0;
  2054. int sync_hw_ptr = 1;
  2055. qdf_dma_addr_t paddr;
  2056. qdf_nbuf_t rx_netbuf;
  2057. void *rxdma_ring_entry;
  2058. union dp_rx_desc_list_elem_t *next;
  2059. void *rxdma_srng;
  2060. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2061. if (!dp_pdev) {
  2062. dp_rx_mon_status_debug("%pK: pdev is null for mac_id = %d",
  2063. dp_soc, mac_id);
  2064. return QDF_STATUS_E_FAILURE;
  2065. }
  2066. rxdma_srng = dp_rxdma_srng->hal_srng;
  2067. qdf_assert(rxdma_srng);
  2068. dp_rx_mon_status_debug("%pK: requested %d buffers for replenish",
  2069. dp_soc, num_req_buffers);
  2070. /*
  2071. * if desc_list is NULL, allocate the descs from freelist
  2072. */
  2073. if (!(*desc_list)) {
  2074. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  2075. rx_desc_pool,
  2076. num_req_buffers,
  2077. desc_list,
  2078. tail);
  2079. if (!num_alloc_desc) {
  2080. dp_rx_mon_status_err("%pK: no free rx_descs in freelist",
  2081. dp_soc);
  2082. return QDF_STATUS_E_NOMEM;
  2083. }
  2084. dp_rx_mon_status_debug("%pK: %d rx desc allocated", dp_soc,
  2085. num_alloc_desc);
  2086. num_req_buffers = num_alloc_desc;
  2087. }
  2088. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2089. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2090. rxdma_srng, sync_hw_ptr);
  2091. dp_rx_mon_status_debug("%pK: no of available entries in rxdma ring: %d",
  2092. dp_soc, num_entries_avail);
  2093. if (num_entries_avail < num_req_buffers) {
  2094. num_desc_to_free = num_req_buffers - num_entries_avail;
  2095. num_req_buffers = num_entries_avail;
  2096. }
  2097. while (count <= num_req_buffers) {
  2098. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  2099. /*
  2100. * qdf_nbuf alloc or map failed,
  2101. * keep HP in mon_status_ring unchanged,
  2102. * wait dp_rx_mon_status_srng_process
  2103. * to fill in buffer at current HP.
  2104. */
  2105. if (qdf_unlikely(!rx_netbuf)) {
  2106. dp_rx_mon_status_err("%pK: qdf_nbuf allocate or map fail, count %d",
  2107. dp_soc, count);
  2108. break;
  2109. }
  2110. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  2111. next = (*desc_list)->next;
  2112. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  2113. dp_soc->hal_soc,
  2114. rxdma_srng);
  2115. if (qdf_unlikely(!rxdma_ring_entry)) {
  2116. dp_rx_mon_status_err("%pK: rxdma_ring_entry is NULL, count - %d",
  2117. dp_soc, count);
  2118. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  2119. QDF_DMA_FROM_DEVICE,
  2120. rx_desc_pool->buf_size);
  2121. qdf_nbuf_free(rx_netbuf);
  2122. break;
  2123. }
  2124. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  2125. (*desc_list)->rx_desc.in_use = 1;
  2126. (*desc_list)->rx_desc.unmapped = 0;
  2127. count++;
  2128. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc,
  2129. rxdma_ring_entry, paddr,
  2130. (*desc_list)->rx_desc.cookie,
  2131. owner);
  2132. dp_rx_mon_status_debug("%pK: rx_desc=%pK, cookie=%d, nbuf=%pK, paddr=%pK",
  2133. dp_soc, &(*desc_list)->rx_desc,
  2134. (*desc_list)->rx_desc.cookie, rx_netbuf,
  2135. (void *)paddr);
  2136. *desc_list = next;
  2137. }
  2138. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2139. dp_rx_mon_status_debug("%pK: successfully replenished %d buffers",
  2140. dp_soc, num_req_buffers);
  2141. dp_rx_mon_status_debug("%pK: %d rx desc added back to free list",
  2142. dp_soc, num_desc_to_free);
  2143. /*
  2144. * add any available free desc back to the free list
  2145. */
  2146. if (*desc_list) {
  2147. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  2148. mac_id, rx_desc_pool);
  2149. }
  2150. return QDF_STATUS_SUCCESS;
  2151. }
  2152. #if !defined(DISABLE_MON_CONFIG) && defined(MON_ENABLE_DROP_FOR_MAC)
  2153. /**
  2154. * dp_mon_status_srng_drop_for_mac() - Drop the mon status ring packets for
  2155. * a given mac
  2156. * @pdev: DP pdev
  2157. * @mac_id: mac id
  2158. * @quota: maximum number of ring entries that can be processed
  2159. *
  2160. * Return: Number of ring entries reaped
  2161. */
  2162. static uint32_t
  2163. dp_mon_status_srng_drop_for_mac(struct dp_pdev *pdev, uint32_t mac_id,
  2164. uint32_t quota)
  2165. {
  2166. struct dp_soc *soc = pdev->soc;
  2167. void *mon_status_srng;
  2168. hal_soc_handle_t hal_soc;
  2169. void *ring_desc;
  2170. uint32_t reap_cnt = 0;
  2171. if (qdf_unlikely(!soc || !soc->hal_soc))
  2172. return reap_cnt;
  2173. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  2174. if (qdf_unlikely(!mon_status_srng ||
  2175. !hal_srng_initialized(mon_status_srng)))
  2176. return reap_cnt;
  2177. hal_soc = soc->hal_soc;
  2178. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  2179. return reap_cnt;
  2180. while ((ring_desc =
  2181. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng)) &&
  2182. reap_cnt < MON_DROP_REAP_LIMIT && quota--) {
  2183. uint64_t buf_addr;
  2184. struct hal_buf_info hbi;
  2185. struct dp_rx_desc *rx_desc;
  2186. qdf_nbuf_t status_nbuf;
  2187. uint8_t *status_buf;
  2188. enum dp_mon_reap_status reap_status;
  2189. qdf_dma_addr_t iova;
  2190. struct rx_desc_pool *rx_desc_pool;
  2191. rx_desc_pool = &soc->rx_desc_status[mac_id];
  2192. buf_addr = (HAL_RX_BUFFER_ADDR_31_0_GET(ring_desc) |
  2193. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(ring_desc)) << 32));
  2194. if (qdf_likely(buf_addr)) {
  2195. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  2196. (uint32_t *)ring_desc,
  2197. &hbi);
  2198. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  2199. hbi.sw_cookie);
  2200. qdf_assert_always(rx_desc);
  2201. status_nbuf = rx_desc->nbuf;
  2202. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  2203. QDF_DMA_FROM_DEVICE);
  2204. status_buf = qdf_nbuf_data(status_nbuf);
  2205. if (hal_get_rx_status_done(status_buf) !=
  2206. QDF_STATUS_SUCCESS) {
  2207. /* If done status is missing:
  2208. * 1. As per MAC team's suggestion,
  2209. * when HP + 1 entry is peeked and if DMA
  2210. * is not done and if HP + 2 entry's DMA done
  2211. * is set. skip HP + 1 entry and
  2212. * start processing in next interrupt.
  2213. * 2. If HP + 2 entry's DMA done is not set,
  2214. * poll onto HP + 1 entry DMA done to be set.
  2215. * Check status for same buffer for next time
  2216. * dp_rx_mon_status_srng_process
  2217. */
  2218. reap_status =
  2219. dp_rx_mon_handle_status_buf_done(pdev,
  2220. mon_status_srng);
  2221. if (reap_status == DP_MON_STATUS_NO_DMA)
  2222. break;
  2223. }
  2224. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  2225. QDF_DMA_FROM_DEVICE,
  2226. rx_desc_pool->buf_size);
  2227. qdf_nbuf_free(status_nbuf);
  2228. } else {
  2229. union dp_rx_desc_list_elem_t *rx_desc_elem;
  2230. qdf_spin_lock_bh(&rx_desc_pool->lock);
  2231. if (!rx_desc_pool->freelist) {
  2232. qdf_spin_unlock_bh(&rx_desc_pool->lock);
  2233. break;
  2234. }
  2235. rx_desc_elem = rx_desc_pool->freelist;
  2236. rx_desc_pool->freelist = rx_desc_pool->freelist->next;
  2237. qdf_spin_unlock_bh(&rx_desc_pool->lock);
  2238. rx_desc = &rx_desc_elem->rx_desc;
  2239. }
  2240. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  2241. if (qdf_unlikely(!status_nbuf)) {
  2242. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2243. union dp_rx_desc_list_elem_t *tail = NULL;
  2244. dp_info_rl("fail to allocate or map nbuf");
  2245. dp_rx_add_to_free_desc_list(&desc_list, &tail,
  2246. rx_desc);
  2247. dp_rx_add_desc_list_to_free_list(soc,
  2248. &desc_list,
  2249. &tail, mac_id,
  2250. rx_desc_pool);
  2251. hal_rxdma_buff_addr_info_set(hal_soc, ring_desc, 0, 0,
  2252. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id));
  2253. break;
  2254. }
  2255. iova = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  2256. rx_desc->nbuf = status_nbuf;
  2257. rx_desc->in_use = 1;
  2258. hal_rxdma_buff_addr_info_set(hal_soc, ring_desc, iova,
  2259. rx_desc->cookie,
  2260. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id));
  2261. reap_cnt++;
  2262. hal_srng_src_get_next(hal_soc, mon_status_srng);
  2263. }
  2264. hal_srng_access_end(hal_soc, mon_status_srng);
  2265. return reap_cnt;
  2266. }
  2267. uint32_t dp_mon_drop_packets_for_mac(struct dp_pdev *pdev, uint32_t mac_id,
  2268. uint32_t quota)
  2269. {
  2270. uint32_t work_done;
  2271. work_done = dp_mon_status_srng_drop_for_mac(pdev, mac_id, quota);
  2272. dp_mon_dest_srng_drop_for_mac(pdev, mac_id);
  2273. return work_done;
  2274. }
  2275. #else
  2276. uint32_t dp_mon_drop_packets_for_mac(struct dp_pdev *pdev, uint32_t mac_id,
  2277. uint32_t quota)
  2278. {
  2279. return 0;
  2280. }
  2281. #endif