hal_be_api.h 4.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_API_H_
  20. #define _HAL_BE_API_H_
  21. #include "hal_hw_headers.h"
  22. #include "hal_rx.h"
  23. #define HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr) \
  24. ((struct rx_msdu_ext_desc_info *) \
  25. _OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
  26. RX_MSDU_DETAILS_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
  27. /**
  28. * hal_reo_setup_generic_be - Initialize HW REO block
  29. *
  30. * @hal_soc: Opaque HAL SOC handle
  31. * @reo_params: parameters needed by HAL for REO config
  32. * @qref_reset: reset qref
  33. */
  34. void hal_reo_setup_generic_be(struct hal_soc *soc,
  35. void *reoparams, int qref_reset);
  36. /**
  37. * hal_rx_msdu_ext_desc_info_get_ptr_be() - Get the msdu extension
  38. * descriptor pointer.
  39. * @msdu_details_ptr: msdu details
  40. *
  41. * Return: msdu exntension descriptor pointer.
  42. */
  43. void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr);
  44. /**
  45. * hal_set_link_desc_addr_be - Setup link descriptor in a buffer_addr_info
  46. * HW structure
  47. *
  48. * @desc: Descriptor entry (from WBM_IDLE_LINK ring)
  49. * @cookie: SW cookie for the buffer/descriptor
  50. * @link_desc_paddr: Physical address of link descriptor entry
  51. * @bm_id: idle link BM id
  52. *
  53. */
  54. void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
  55. qdf_dma_addr_t link_desc_paddr,
  56. uint8_t bm_id);
  57. /**
  58. * hal_hw_txrx_default_ops_attach_be(): Add default ops for BE chips
  59. * @ hal_soc_hdl: hal_soc handle
  60. *
  61. * Return: None
  62. */
  63. void hal_hw_txrx_default_ops_attach_be(struct hal_soc *soc);
  64. uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc);
  65. uint8_t hal_rx_ret_buf_manager_get_be(hal_ring_desc_t ring_desc);
  66. void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1);
  67. /**
  68. * hal_reo_qdesc_setup - Setup HW REO queue descriptor
  69. *
  70. * @hal_soc: Opaque HAL SOC handle
  71. * @ba_window_size: BlockAck window size
  72. * @start_seq: Starting sequence number
  73. * @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
  74. * @hw_qdesc_paddr: Physical address of REO queue descriptor memory
  75. * @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
  76. * @vdev_stats_id: vdev_stats_id to be programmed in REO Queue Descriptor
  77. */
  78. void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl,
  79. int tid, uint32_t ba_window_size,
  80. uint32_t start_seq, void *hw_qdesc_vaddr,
  81. qdf_dma_addr_t hw_qdesc_paddr,
  82. int pn_type, uint8_t vdev_stats_id);
  83. /**
  84. * hal_cookie_conversion_reg_cfg_be() - set cookie conversion relevant register
  85. * for REO/WBM
  86. * @soc: HAL soc handle
  87. * @cc_cfg: structure pointer for HW cookie conversion configuration
  88. *
  89. * Return: None
  90. */
  91. void hal_cookie_conversion_reg_cfg_be(hal_soc_handle_t hal_soc_hdl,
  92. struct hal_hw_cc_config *cc_cfg);
  93. /**
  94. * hal_reo_ix_remap_value_get() - Calculate reo remap register value from
  95. * ring_id_mask which is used for hash based
  96. * reo distribution
  97. *
  98. * @hal_soc: Handle to HAL SoC structure
  99. * @ring_id_mask: mask value indicating the rx rings 0th bit set indicate
  100. * REO2SW1 is included in hash distribution
  101. *
  102. * Return: REO remap value
  103. */
  104. uint32_t
  105. hal_reo_ix_remap_value_get_be(hal_soc_handle_t hal_soc_hdl,
  106. uint8_t rx_ring_mask);
  107. /**
  108. * hal_reo_ring_remap_value_get_be() - return REO remap value
  109. *
  110. * @ring_id: REO2SW ring id
  111. *
  112. * Return: REO remap value
  113. */
  114. uint8_t
  115. hal_reo_ring_remap_value_get_be(uint8_t rx_ring_id);
  116. /**
  117. * hal_setup_reo_swap() - Set the swap flag for big endian machines
  118. * @soc: HAL soc handle
  119. *
  120. * Return: None
  121. */
  122. void hal_setup_reo_swap(struct hal_soc *soc);
  123. /**
  124. * hal_get_idle_link_bm_id_be() - Get idle link BM id from chid_id
  125. * @chip_id: mlo chip_id
  126. *
  127. * Returns: RBM ID
  128. */
  129. uint8_t hal_get_idle_link_bm_id_be(uint8_t chip_id);
  130. #endif /* _HAL_BE_API_H_ */