wsa881x.c 46 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/init.h>
  7. #include <linux/slab.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/device.h>
  10. #include <linux/printk.h>
  11. #include <linux/bitops.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/delay.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gpio.h>
  17. #include <linux/of_gpio.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/regmap.h>
  20. #include <linux/debugfs.h>
  21. #include <soc/soundwire.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/tlv.h>
  27. #include <asoc/msm-cdc-pinctrl.h>
  28. #include "wsa881x.h"
  29. #include "wsa881x-temp-sensor.h"
  30. #define DRV_NAME "wsa-codec"
  31. #define WSA881X_NUM_RETRY 5
  32. enum {
  33. G_18DB = 0,
  34. G_16P5DB,
  35. G_15DB,
  36. G_13P5DB,
  37. G_12DB,
  38. G_10P5DB,
  39. G_9DB,
  40. G_7P5DB,
  41. G_6DB,
  42. G_4P5DB,
  43. G_3DB,
  44. G_1P5DB,
  45. G_0DB,
  46. };
  47. enum {
  48. DISABLE = 0,
  49. ENABLE,
  50. };
  51. enum {
  52. SWR_DAC_PORT,
  53. SWR_COMP_PORT,
  54. SWR_BOOST_PORT,
  55. SWR_VISENSE_PORT,
  56. };
  57. struct swr_port {
  58. u8 port_id;
  59. u8 ch_mask;
  60. u32 ch_rate;
  61. u8 num_ch;
  62. u8 port_type;
  63. };
  64. enum {
  65. WSA881X_DEV_DOWN,
  66. WSA881X_DEV_UP,
  67. WSA881X_DEV_READY,
  68. };
  69. /*
  70. * Private data Structure for wsa881x. All parameters related to
  71. * WSA881X codec needs to be defined here.
  72. */
  73. struct wsa881x_priv {
  74. struct regmap *regmap;
  75. struct device *dev;
  76. struct swr_device *swr_slave;
  77. struct snd_soc_component *component;
  78. bool comp_enable;
  79. bool boost_enable;
  80. bool visense_enable;
  81. u8 pa_gain;
  82. struct swr_port port[WSA881X_MAX_SWR_PORTS];
  83. int pd_gpio;
  84. struct wsa881x_tz_priv tz_pdata;
  85. int bg_cnt;
  86. int clk_cnt;
  87. int version;
  88. struct mutex bg_lock;
  89. struct mutex res_lock;
  90. struct mutex temp_lock;
  91. struct snd_info_entry *entry;
  92. struct snd_info_entry *version_entry;
  93. int state;
  94. struct delayed_work ocp_ctl_work;
  95. struct device_node *wsa_rst_np;
  96. int pa_mute;
  97. struct device_node *bolero_np;
  98. struct platform_device* bolero_dev;
  99. struct notifier_block bolero_nblock;
  100. void *handle;
  101. int (*register_notifier)(void *handle,
  102. struct notifier_block *nblock,
  103. bool enable);
  104. };
  105. /* from bolero to WSA events */
  106. enum {
  107. BOLERO_WSA_EVT_TX_CH_HOLD_CLEAR = 1,
  108. BOLERO_WSA_EVT_PA_OFF_PRE_SSR,
  109. BOLERO_WSA_EVT_SSR_DOWN,
  110. BOLERO_WSA_EVT_SSR_UP,
  111. BOLERO_WSA_EVT_PA_ON_POST_FSCLK,
  112. };
  113. struct wsa_ctrl_platform_data {
  114. void *handle;
  115. int (*update_wsa_event)(void *handle, u16 event, u32 data);
  116. int (*register_notifier)(void *handle,
  117. struct notifier_block *nblock,
  118. bool enable);
  119. };
  120. #define SWR_SLV_MAX_REG_ADDR 0x390
  121. #define SWR_SLV_START_REG_ADDR 0x40
  122. #define SWR_SLV_MAX_BUF_LEN 25
  123. #define BYTES_PER_LINE 12
  124. #define SWR_SLV_RD_BUF_LEN 8
  125. #define SWR_SLV_WR_BUF_LEN 32
  126. #define SWR_SLV_MAX_DEVICES 2
  127. #define WSA881X_VERSION_ENTRY_SIZE 27
  128. #define WSA881X_OCP_CTL_TIMER_SEC 2
  129. #define WSA881X_OCP_CTL_TEMP_CELSIUS 25
  130. #define WSA881X_OCP_CTL_POLL_TIMER_SEC 60
  131. static int wsa881x_ocp_poll_timer_sec = WSA881X_OCP_CTL_POLL_TIMER_SEC;
  132. module_param(wsa881x_ocp_poll_timer_sec, int, 0664);
  133. MODULE_PARM_DESC(wsa881x_ocp_poll_timer_sec, "timer for ocp ctl polling");
  134. static struct wsa881x_priv *dbgwsa881x;
  135. static struct dentry *debugfs_wsa881x_dent;
  136. static struct dentry *debugfs_peek;
  137. static struct dentry *debugfs_poke;
  138. static struct dentry *debugfs_reg_dump;
  139. static unsigned int read_data;
  140. static unsigned int devnum;
  141. static int32_t wsa881x_resource_acquire(struct snd_soc_component *component,
  142. bool enable);
  143. static const char * const wsa_pa_gain_text[] = {
  144. "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB", "G_12_DB", "G_10P5_DB",
  145. "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB",
  146. "G_0_DB"
  147. };
  148. static const struct soc_enum wsa_pa_gain_enum =
  149. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_pa_gain_text), wsa_pa_gain_text);
  150. static int wsa_pa_gain_get(struct snd_kcontrol *kcontrol,
  151. struct snd_ctl_elem_value *ucontrol)
  152. {
  153. struct snd_soc_component *component =
  154. snd_soc_kcontrol_component(kcontrol);
  155. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  156. ucontrol->value.integer.value[0] = wsa881x->pa_gain;
  157. dev_dbg(component->dev, "%s: PA gain = 0x%x\n", __func__,
  158. wsa881x->pa_gain);
  159. return 0;
  160. }
  161. static int wsa_pa_gain_put(struct snd_kcontrol *kcontrol,
  162. struct snd_ctl_elem_value *ucontrol)
  163. {
  164. struct snd_soc_component *component =
  165. snd_soc_kcontrol_component(kcontrol);
  166. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  167. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  168. __func__, ucontrol->value.integer.value[0]);
  169. wsa881x->pa_gain = ucontrol->value.integer.value[0];
  170. return 0;
  171. }
  172. static int wsa881x_get_mute(struct snd_kcontrol *kcontrol,
  173. struct snd_ctl_elem_value *ucontrol)
  174. {
  175. struct snd_soc_component *component =
  176. snd_soc_kcontrol_component(kcontrol);
  177. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  178. ucontrol->value.integer.value[0] = wsa881x->pa_mute;
  179. return 0;
  180. }
  181. static int wsa881x_set_mute(struct snd_kcontrol *kcontrol,
  182. struct snd_ctl_elem_value *ucontrol)
  183. {
  184. struct snd_soc_component *component =
  185. snd_soc_kcontrol_component(kcontrol);
  186. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  187. int value = ucontrol->value.integer.value[0];
  188. dev_dbg(component->dev, "%s: mute current %d, new %d\n",
  189. __func__, wsa881x->pa_mute, value);
  190. if (value)
  191. snd_soc_component_update_bits(component, WSA881X_SPKR_DRV_EN,
  192. 0x80, 0x00);
  193. wsa881x->pa_mute = value;
  194. return 0;
  195. }
  196. static int wsa881x_get_t0_init(struct snd_kcontrol *kcontrol,
  197. struct snd_ctl_elem_value *ucontrol)
  198. {
  199. struct snd_soc_component *component =
  200. snd_soc_kcontrol_component(kcontrol);
  201. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  202. struct wsa881x_tz_priv *pdata = &wsa881x->tz_pdata;
  203. ucontrol->value.integer.value[0] = pdata->t0_init;
  204. dev_dbg(component->dev, "%s: t0 init %d\n", __func__, pdata->t0_init);
  205. return 0;
  206. }
  207. static int wsa881x_set_t0_init(struct snd_kcontrol *kcontrol,
  208. struct snd_ctl_elem_value *ucontrol)
  209. {
  210. struct snd_soc_component *component =
  211. snd_soc_kcontrol_component(kcontrol);
  212. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  213. struct wsa881x_tz_priv *pdata = &wsa881x->tz_pdata;
  214. pdata->t0_init = ucontrol->value.integer.value[0];
  215. dev_dbg(component->dev, "%s: t0 init %d\n", __func__, pdata->t0_init);
  216. return 0;
  217. }
  218. static const struct snd_kcontrol_new wsa_snd_controls[] = {
  219. SOC_ENUM_EXT("WSA PA Gain", wsa_pa_gain_enum,
  220. wsa_pa_gain_get, wsa_pa_gain_put),
  221. SOC_SINGLE_EXT("WSA PA Mute", SND_SOC_NOPM, 0, 1, 0,
  222. wsa881x_get_mute, wsa881x_set_mute),
  223. SOC_SINGLE_EXT("WSA T0 Init", SND_SOC_NOPM, 0, 1, 0,
  224. wsa881x_get_t0_init, wsa881x_set_t0_init),
  225. };
  226. static int codec_debug_open(struct inode *inode, struct file *file)
  227. {
  228. file->private_data = inode->i_private;
  229. return 0;
  230. }
  231. static int get_parameters(char *buf, u32 *param1, int num_of_par)
  232. {
  233. char *token;
  234. int base, cnt;
  235. token = strsep(&buf, " ");
  236. for (cnt = 0; cnt < num_of_par; cnt++) {
  237. if (token) {
  238. if ((token[1] == 'x') || (token[1] == 'X'))
  239. base = 16;
  240. else
  241. base = 10;
  242. if (kstrtou32(token, base, &param1[cnt]) != 0)
  243. return -EINVAL;
  244. token = strsep(&buf, " ");
  245. } else
  246. return -EINVAL;
  247. }
  248. return 0;
  249. }
  250. static ssize_t wsa881x_codec_version_read(struct snd_info_entry *entry,
  251. void *file_private_data, struct file *file,
  252. char __user *buf, size_t count, loff_t pos)
  253. {
  254. struct wsa881x_priv *wsa881x;
  255. char buffer[WSA881X_VERSION_ENTRY_SIZE];
  256. int len;
  257. wsa881x = (struct wsa881x_priv *) entry->private_data;
  258. if (!wsa881x) {
  259. pr_err("%s: wsa881x priv is null\n", __func__);
  260. return -EINVAL;
  261. }
  262. len = snprintf(buffer, sizeof(buffer), "WSA881X-SOUNDWIRE_2_0\n");
  263. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  264. }
  265. static struct snd_info_entry_ops wsa881x_codec_info_ops = {
  266. .read = wsa881x_codec_version_read,
  267. };
  268. /*
  269. * wsa881x_codec_info_create_codec_entry - creates wsa881x module
  270. * @codec_root: The parent directory
  271. * @component: Codec instance
  272. *
  273. * Creates wsa881x module and version entry under the given
  274. * parent directory.
  275. *
  276. * Return: 0 on success or negative error code on failure.
  277. */
  278. int wsa881x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
  279. struct snd_soc_component *component)
  280. {
  281. struct snd_info_entry *version_entry;
  282. struct wsa881x_priv *wsa881x;
  283. struct snd_soc_card *card;
  284. char name[80];
  285. if (!codec_root || !component)
  286. return -EINVAL;
  287. wsa881x = snd_soc_component_get_drvdata(component);
  288. card = component->card;
  289. snprintf(name, sizeof(name), "%s.%x", "wsa881x",
  290. (u32)wsa881x->swr_slave->addr);
  291. wsa881x->entry = snd_info_create_module_entry(codec_root->module,
  292. (const char *)name,
  293. codec_root);
  294. if (!wsa881x->entry) {
  295. dev_dbg(component->dev, "%s: failed to create wsa881x entry\n",
  296. __func__);
  297. return -ENOMEM;
  298. }
  299. wsa881x->entry->mode = S_IFDIR | 0555;
  300. if (snd_info_register(wsa881x->entry) < 0) {
  301. snd_info_free_entry(wsa881x->entry);
  302. return -ENOMEM;
  303. }
  304. version_entry = snd_info_create_card_entry(card->snd_card,
  305. "version",
  306. wsa881x->entry);
  307. if (!version_entry) {
  308. dev_dbg(component->dev, "%s: failed to create wsa881x version entry\n",
  309. __func__);
  310. snd_info_free_entry(wsa881x->entry);
  311. return -ENOMEM;
  312. }
  313. version_entry->private_data = wsa881x;
  314. version_entry->size = WSA881X_VERSION_ENTRY_SIZE;
  315. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  316. version_entry->c.ops = &wsa881x_codec_info_ops;
  317. if (snd_info_register(version_entry) < 0) {
  318. snd_info_free_entry(version_entry);
  319. snd_info_free_entry(wsa881x->entry);
  320. return -ENOMEM;
  321. }
  322. wsa881x->version_entry = version_entry;
  323. return 0;
  324. }
  325. EXPORT_SYMBOL(wsa881x_codec_info_create_codec_entry);
  326. static bool is_swr_slv_reg_readable(int reg)
  327. {
  328. bool ret = true;
  329. if (((reg > 0x46) && (reg < 0x4A)) ||
  330. ((reg > 0x4A) && (reg < 0x50)) ||
  331. ((reg > 0x55) && (reg < 0xE0)) ||
  332. ((reg > 0xE0) && (reg < 0xF0)) ||
  333. ((reg > 0xF0) && (reg < 0x100)) ||
  334. ((reg > 0x105) && (reg < 0x120)) ||
  335. ((reg > 0x128) && (reg < 0x130)) ||
  336. ((reg > 0x138) && (reg < 0x200)) ||
  337. ((reg > 0x205) && (reg < 0x220)) ||
  338. ((reg > 0x228) && (reg < 0x230)) ||
  339. ((reg > 0x238) && (reg < 0x300)) ||
  340. ((reg > 0x305) && (reg < 0x320)) ||
  341. ((reg > 0x328) && (reg < 0x330)) ||
  342. ((reg > 0x338) && (reg < 0x400)) ||
  343. ((reg > 0x405) && (reg < 0x420)))
  344. ret = false;
  345. return ret;
  346. }
  347. static ssize_t wsa881x_swrslave_reg_show(char __user *ubuf, size_t count,
  348. loff_t *ppos)
  349. {
  350. int i, reg_val, len;
  351. ssize_t total = 0;
  352. char tmp_buf[SWR_SLV_MAX_BUF_LEN];
  353. if (!ubuf || !ppos || (devnum == 0))
  354. return 0;
  355. for (i = (((int) *ppos / BYTES_PER_LINE) + SWR_SLV_START_REG_ADDR);
  356. i <= SWR_SLV_MAX_REG_ADDR; i++) {
  357. if (!is_swr_slv_reg_readable(i))
  358. continue;
  359. swr_read(dbgwsa881x->swr_slave, devnum,
  360. i, &reg_val, 1);
  361. len = snprintf(tmp_buf, 25, "0x%.3x: 0x%.2x\n", i,
  362. (reg_val & 0xFF));
  363. if (len < 0) {
  364. pr_err("%s: fail to fill the buffer\n", __func__);
  365. total = -EFAULT;
  366. goto copy_err;
  367. }
  368. if ((total + len) >= count - 1)
  369. break;
  370. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  371. pr_err("%s: fail to copy reg dump\n", __func__);
  372. total = -EFAULT;
  373. goto copy_err;
  374. }
  375. *ppos += len;
  376. total += len;
  377. }
  378. copy_err:
  379. return total;
  380. }
  381. static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
  382. size_t count, loff_t *ppos)
  383. {
  384. char lbuf[SWR_SLV_RD_BUF_LEN];
  385. char *access_str;
  386. ssize_t ret_cnt;
  387. if (!count || !file || !ppos || !ubuf)
  388. return -EINVAL;
  389. access_str = file->private_data;
  390. if (*ppos < 0)
  391. return -EINVAL;
  392. if (!strcmp(access_str, "swrslave_peek")) {
  393. snprintf(lbuf, sizeof(lbuf), "0x%x\n", (read_data & 0xFF));
  394. ret_cnt = simple_read_from_buffer(ubuf, count, ppos, lbuf,
  395. strnlen(lbuf, 7));
  396. } else if (!strcmp(access_str, "swrslave_reg_dump")) {
  397. ret_cnt = wsa881x_swrslave_reg_show(ubuf, count, ppos);
  398. } else {
  399. pr_err("%s: %s not permitted to read\n", __func__, access_str);
  400. ret_cnt = -EPERM;
  401. }
  402. return ret_cnt;
  403. }
  404. static ssize_t codec_debug_write(struct file *filp,
  405. const char __user *ubuf, size_t cnt, loff_t *ppos)
  406. {
  407. char lbuf[SWR_SLV_WR_BUF_LEN];
  408. int rc;
  409. u32 param[5];
  410. char *access_str;
  411. if (!filp || !ppos || !ubuf)
  412. return -EINVAL;
  413. access_str = filp->private_data;
  414. if (cnt > sizeof(lbuf) - 1)
  415. return -EINVAL;
  416. rc = copy_from_user(lbuf, ubuf, cnt);
  417. if (rc)
  418. return -EFAULT;
  419. lbuf[cnt] = '\0';
  420. if (!strcmp(access_str, "swrslave_poke")) {
  421. /* write */
  422. rc = get_parameters(lbuf, param, 3);
  423. if ((param[0] <= SWR_SLV_MAX_REG_ADDR) && (param[1] <= 0xFF) &&
  424. (rc == 0))
  425. swr_write(dbgwsa881x->swr_slave, param[2],
  426. param[0], &param[1]);
  427. else
  428. rc = -EINVAL;
  429. } else if (!strcmp(access_str, "swrslave_peek")) {
  430. /* read */
  431. rc = get_parameters(lbuf, param, 2);
  432. if ((param[0] <= SWR_SLV_MAX_REG_ADDR) && (rc == 0))
  433. swr_read(dbgwsa881x->swr_slave, param[1],
  434. param[0], &read_data, 1);
  435. else
  436. rc = -EINVAL;
  437. } else if (!strcmp(access_str, "swrslave_reg_dump")) {
  438. /* reg dump */
  439. rc = get_parameters(lbuf, param, 1);
  440. if ((rc == 0) && (param[0] > 0) &&
  441. (param[0] <= SWR_SLV_MAX_DEVICES))
  442. devnum = param[0];
  443. else
  444. rc = -EINVAL;
  445. }
  446. if (rc == 0)
  447. rc = cnt;
  448. else
  449. pr_err("%s: rc = %d\n", __func__, rc);
  450. return rc;
  451. }
  452. static const struct file_operations codec_debug_ops = {
  453. .open = codec_debug_open,
  454. .write = codec_debug_write,
  455. .read = codec_debug_read,
  456. };
  457. static void wsa881x_regcache_sync(struct wsa881x_priv *wsa881x)
  458. {
  459. mutex_lock(&wsa881x->res_lock);
  460. if (wsa881x->state != WSA881X_DEV_READY) {
  461. regcache_mark_dirty(wsa881x->regmap);
  462. regcache_sync(wsa881x->regmap);
  463. wsa881x->state = WSA881X_DEV_READY;
  464. }
  465. mutex_unlock(&wsa881x->res_lock);
  466. }
  467. static const struct reg_sequence wsa881x_pre_pmu_pa[] = {
  468. {WSA881X_SPKR_DRV_GAIN, 0x41, 0},
  469. {WSA881X_SPKR_MISC_CTL1, 0x01, 0},
  470. {WSA881X_ADC_EN_DET_TEST_I, 0x01, 0},
  471. {WSA881X_ADC_EN_MODU_V, 0x02, 0},
  472. {WSA881X_ADC_EN_DET_TEST_V, 0x10, 0},
  473. {WSA881X_SPKR_PWRSTG_DBG, 0xA0, 0},
  474. };
  475. static const struct reg_sequence wsa881x_pre_pmu_pa_2_0[] = {
  476. {WSA881X_SPKR_DRV_GAIN, 0x41, 0},
  477. {WSA881X_SPKR_MISC_CTL1, 0x87, 0},
  478. };
  479. static const struct reg_sequence wsa881x_post_pmu_pa[] = {
  480. {WSA881X_SPKR_PWRSTG_DBG, 0x00, 0},
  481. {WSA881X_ADC_EN_DET_TEST_V, 0x00, 0},
  482. {WSA881X_ADC_EN_MODU_V, 0x00, 0},
  483. {WSA881X_ADC_EN_DET_TEST_I, 0x00, 0},
  484. };
  485. static const struct reg_sequence wsa881x_vi_txfe_en[] = {
  486. {WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x85, 0},
  487. {WSA881X_SPKR_PROT_ATEST2, 0x0A, 0},
  488. {WSA881X_SPKR_PROT_FE_GAIN, 0xCF, 0},
  489. };
  490. static const struct reg_sequence wsa881x_vi_txfe_en_2_0[] = {
  491. {WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x85, 0},
  492. {WSA881X_SPKR_PROT_ATEST2, 0x0A, 0},
  493. {WSA881X_SPKR_PROT_FE_GAIN, 0x47, 0},
  494. };
  495. static int wsa881x_boost_ctrl(struct snd_soc_component *component, bool enable)
  496. {
  497. dev_dbg(component->dev, "%s: enable:%d\n", __func__, enable);
  498. if (enable)
  499. snd_soc_component_update_bits(component, WSA881X_BOOST_EN_CTL,
  500. 0x80, 0x80);
  501. else
  502. snd_soc_component_update_bits(component, WSA881X_BOOST_EN_CTL,
  503. 0x80, 0x00);
  504. /*
  505. * 1.5ms sleep is needed after boost enable/disable as per
  506. * HW requirement
  507. */
  508. usleep_range(1500, 1510);
  509. return 0;
  510. }
  511. static int wsa881x_visense_txfe_ctrl(struct snd_soc_component *component,
  512. bool enable, u8 isense1_gain,
  513. u8 isense2_gain, u8 vsense_gain)
  514. {
  515. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  516. dev_dbg(component->dev,
  517. "%s: enable:%d, isense1 gain: %d, isense2 gain: %d, vsense_gain %d\n",
  518. __func__, enable, isense1_gain, isense2_gain, vsense_gain);
  519. if (enable) {
  520. regmap_multi_reg_write(wsa881x->regmap,
  521. wsa881x_vi_txfe_en_2_0,
  522. ARRAY_SIZE(wsa881x_vi_txfe_en_2_0));
  523. } else {
  524. snd_soc_component_update_bits(component,
  525. WSA881X_SPKR_PROT_FE_VSENSE_VCM,
  526. 0x08, 0x08);
  527. /*
  528. * 200us sleep is needed after visense txfe disable as per
  529. * HW requirement.
  530. */
  531. usleep_range(200, 210);
  532. snd_soc_component_update_bits(component,
  533. WSA881X_SPKR_PROT_FE_GAIN,
  534. 0x01, 0x00);
  535. }
  536. return 0;
  537. }
  538. static int wsa881x_visense_adc_ctrl(struct snd_soc_component *component,
  539. bool enable)
  540. {
  541. dev_dbg(component->dev, "%s: enable:%d\n", __func__, enable);
  542. snd_soc_component_update_bits(component, WSA881X_ADC_EN_MODU_V,
  543. (0x01 << 7), (enable << 7));
  544. snd_soc_component_update_bits(component, WSA881X_ADC_EN_MODU_I,
  545. (0x01 << 7), (enable << 7));
  546. return 0;
  547. }
  548. static void wsa881x_bandgap_ctrl(struct snd_soc_component *component,
  549. bool enable)
  550. {
  551. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  552. dev_dbg(component->dev, "%s: enable:%d, bg_count:%d\n", __func__,
  553. enable, wsa881x->bg_cnt);
  554. mutex_lock(&wsa881x->bg_lock);
  555. if (enable) {
  556. ++wsa881x->bg_cnt;
  557. if (wsa881x->bg_cnt == 1) {
  558. snd_soc_component_update_bits(component,
  559. WSA881X_TEMP_OP,
  560. 0x08, 0x08);
  561. /* 400usec sleep is needed as per HW requirement */
  562. usleep_range(400, 410);
  563. snd_soc_component_update_bits(component,
  564. WSA881X_TEMP_OP,
  565. 0x04, 0x04);
  566. }
  567. } else {
  568. --wsa881x->bg_cnt;
  569. if (wsa881x->bg_cnt <= 0) {
  570. WARN_ON(wsa881x->bg_cnt < 0);
  571. wsa881x->bg_cnt = 0;
  572. snd_soc_component_update_bits(component,
  573. WSA881X_TEMP_OP, 0x04, 0x00);
  574. snd_soc_component_update_bits(component,
  575. WSA881X_TEMP_OP, 0x08, 0x00);
  576. }
  577. }
  578. mutex_unlock(&wsa881x->bg_lock);
  579. }
  580. static void wsa881x_clk_ctrl(struct snd_soc_component *component, bool enable)
  581. {
  582. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  583. dev_dbg(component->dev, "%s: enable:%d, clk_count:%d\n", __func__,
  584. enable, wsa881x->clk_cnt);
  585. mutex_lock(&wsa881x->res_lock);
  586. if (enable) {
  587. ++wsa881x->clk_cnt;
  588. if (wsa881x->clk_cnt == 1) {
  589. snd_soc_component_write(component,
  590. WSA881X_CDC_DIG_CLK_CTL, 0x01);
  591. snd_soc_component_write(component,
  592. WSA881X_CDC_ANA_CLK_CTL, 0x01);
  593. }
  594. } else {
  595. --wsa881x->clk_cnt;
  596. if (wsa881x->clk_cnt <= 0) {
  597. WARN_ON(wsa881x->clk_cnt < 0);
  598. wsa881x->clk_cnt = 0;
  599. snd_soc_component_write(component,
  600. WSA881X_CDC_DIG_CLK_CTL, 0x00);
  601. snd_soc_component_write(component,
  602. WSA881X_CDC_ANA_CLK_CTL, 0x00);
  603. }
  604. }
  605. mutex_unlock(&wsa881x->res_lock);
  606. }
  607. static int wsa881x_get_compander(struct snd_kcontrol *kcontrol,
  608. struct snd_ctl_elem_value *ucontrol)
  609. {
  610. struct snd_soc_component *component =
  611. snd_soc_kcontrol_component(kcontrol);
  612. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  613. ucontrol->value.integer.value[0] = wsa881x->comp_enable;
  614. return 0;
  615. }
  616. static int wsa881x_set_compander(struct snd_kcontrol *kcontrol,
  617. struct snd_ctl_elem_value *ucontrol)
  618. {
  619. struct snd_soc_component *component =
  620. snd_soc_kcontrol_component(kcontrol);
  621. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  622. int value = ucontrol->value.integer.value[0];
  623. dev_dbg(component->dev, "%s: Compander enable current %d, new %d\n",
  624. __func__, wsa881x->comp_enable, value);
  625. wsa881x->comp_enable = value;
  626. return 0;
  627. }
  628. static int wsa881x_get_boost(struct snd_kcontrol *kcontrol,
  629. struct snd_ctl_elem_value *ucontrol)
  630. {
  631. struct snd_soc_component *component =
  632. snd_soc_kcontrol_component(kcontrol);
  633. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  634. ucontrol->value.integer.value[0] = wsa881x->boost_enable;
  635. return 0;
  636. }
  637. static int wsa881x_set_boost(struct snd_kcontrol *kcontrol,
  638. struct snd_ctl_elem_value *ucontrol)
  639. {
  640. struct snd_soc_component *component =
  641. snd_soc_kcontrol_component(kcontrol);
  642. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  643. int value = ucontrol->value.integer.value[0];
  644. dev_dbg(component->dev, "%s: Boost enable current %d, new %d\n",
  645. __func__, wsa881x->boost_enable, value);
  646. wsa881x->boost_enable = value;
  647. return 0;
  648. }
  649. static int wsa881x_get_visense(struct snd_kcontrol *kcontrol,
  650. struct snd_ctl_elem_value *ucontrol)
  651. {
  652. struct snd_soc_component *component =
  653. snd_soc_kcontrol_component(kcontrol);
  654. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  655. ucontrol->value.integer.value[0] = wsa881x->visense_enable;
  656. return 0;
  657. }
  658. static int wsa881x_set_visense(struct snd_kcontrol *kcontrol,
  659. struct snd_ctl_elem_value *ucontrol)
  660. {
  661. struct snd_soc_component *component =
  662. snd_soc_kcontrol_component(kcontrol);
  663. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  664. int value = ucontrol->value.integer.value[0];
  665. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  666. __func__, wsa881x->visense_enable, value);
  667. wsa881x->visense_enable = value;
  668. return 0;
  669. }
  670. static int wsa881x_set_boost_level(struct snd_kcontrol *kcontrol,
  671. struct snd_ctl_elem_value *ucontrol)
  672. {
  673. struct snd_soc_component *component =
  674. snd_soc_kcontrol_component(kcontrol);
  675. u8 wsa_boost_level = 0;
  676. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  677. __func__, ucontrol->value.integer.value[0]);
  678. wsa_boost_level = ucontrol->value.integer.value[0];
  679. snd_soc_component_update_bits(component, WSA881X_BOOST_PRESET_OUT1,
  680. 0xff, wsa_boost_level);
  681. return 0;
  682. }
  683. static int wsa881x_get_boost_level(struct snd_kcontrol *kcontrol,
  684. struct snd_ctl_elem_value *ucontrol)
  685. {
  686. struct snd_soc_component *component =
  687. snd_soc_kcontrol_component(kcontrol);
  688. u8 wsa_boost_level = 0;
  689. wsa_boost_level = snd_soc_component_read32(component,
  690. WSA881X_BOOST_PRESET_OUT1);
  691. ucontrol->value.integer.value[0] = wsa_boost_level;
  692. dev_dbg(component->dev, "%s: boost level = 0x%x\n", __func__,
  693. wsa_boost_level);
  694. return 0;
  695. }
  696. static const struct snd_kcontrol_new wsa881x_snd_controls[] = {
  697. SOC_SINGLE_EXT("COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  698. wsa881x_get_compander, wsa881x_set_compander),
  699. SOC_SINGLE_EXT("BOOST Switch", SND_SOC_NOPM, 0, 1, 0,
  700. wsa881x_get_boost, wsa881x_set_boost),
  701. SOC_SINGLE_EXT("VISENSE Switch", SND_SOC_NOPM, 0, 1, 0,
  702. wsa881x_get_visense, wsa881x_set_visense),
  703. SOC_SINGLE_EXT("Boost Level", SND_SOC_NOPM, 0, 0xff, 0,
  704. wsa881x_get_boost_level, wsa881x_set_boost_level),
  705. };
  706. static const struct snd_kcontrol_new swr_dac_port[] = {
  707. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  708. };
  709. static int wsa881x_set_port(struct snd_soc_component *component, int port_idx,
  710. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  711. u8 *port_type)
  712. {
  713. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  714. *port_id = wsa881x->port[port_idx].port_id;
  715. *num_ch = wsa881x->port[port_idx].num_ch;
  716. *ch_mask = wsa881x->port[port_idx].ch_mask;
  717. *ch_rate = wsa881x->port[port_idx].ch_rate;
  718. *port_type = wsa881x->port[port_idx].port_type;
  719. return 0;
  720. }
  721. static int wsa881x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
  722. struct snd_kcontrol *kcontrol, int event)
  723. {
  724. struct snd_soc_component *component =
  725. snd_soc_dapm_to_component(w->dapm);
  726. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  727. u8 port_id[WSA881X_MAX_SWR_PORTS];
  728. u8 num_ch[WSA881X_MAX_SWR_PORTS];
  729. u8 ch_mask[WSA881X_MAX_SWR_PORTS];
  730. u32 ch_rate[WSA881X_MAX_SWR_PORTS];
  731. u8 port_type[WSA881X_MAX_SWR_PORTS];
  732. u8 num_port = 0;
  733. dev_dbg(component->dev, "%s: event %d name %s\n", __func__,
  734. event, w->name);
  735. if (wsa881x == NULL)
  736. return -EINVAL;
  737. switch (event) {
  738. case SND_SOC_DAPM_PRE_PMU:
  739. wsa881x_set_port(component, SWR_DAC_PORT,
  740. &port_id[num_port], &num_ch[num_port],
  741. &ch_mask[num_port], &ch_rate[num_port],
  742. &port_type[num_port]);
  743. ++num_port;
  744. if (wsa881x->comp_enable) {
  745. wsa881x_set_port(component, SWR_COMP_PORT,
  746. &port_id[num_port], &num_ch[num_port],
  747. &ch_mask[num_port], &ch_rate[num_port],
  748. &port_type[num_port]);
  749. ++num_port;
  750. }
  751. if (wsa881x->boost_enable) {
  752. wsa881x_set_port(component, SWR_BOOST_PORT,
  753. &port_id[num_port], &num_ch[num_port],
  754. &ch_mask[num_port], &ch_rate[num_port],
  755. &port_type[num_port]);
  756. ++num_port;
  757. }
  758. if (wsa881x->visense_enable) {
  759. wsa881x_set_port(component, SWR_VISENSE_PORT,
  760. &port_id[num_port], &num_ch[num_port],
  761. &ch_mask[num_port], &ch_rate[num_port],
  762. &port_type[num_port]);
  763. ++num_port;
  764. }
  765. swr_connect_port(wsa881x->swr_slave, &port_id[0], num_port,
  766. &ch_mask[0], &ch_rate[0], &num_ch[0],
  767. &port_type[0]);
  768. break;
  769. case SND_SOC_DAPM_POST_PMU:
  770. break;
  771. case SND_SOC_DAPM_PRE_PMD:
  772. break;
  773. case SND_SOC_DAPM_POST_PMD:
  774. wsa881x_set_port(component, SWR_DAC_PORT,
  775. &port_id[num_port], &num_ch[num_port],
  776. &ch_mask[num_port], &ch_rate[num_port],
  777. &port_type[num_port]);
  778. ++num_port;
  779. if (wsa881x->comp_enable) {
  780. wsa881x_set_port(component, SWR_COMP_PORT,
  781. &port_id[num_port], &num_ch[num_port],
  782. &ch_mask[num_port], &ch_rate[num_port],
  783. &port_type[num_port]);
  784. ++num_port;
  785. }
  786. if (wsa881x->boost_enable) {
  787. wsa881x_set_port(component, SWR_BOOST_PORT,
  788. &port_id[num_port], &num_ch[num_port],
  789. &ch_mask[num_port], &ch_rate[num_port],
  790. &port_type[num_port]);
  791. ++num_port;
  792. }
  793. if (wsa881x->visense_enable) {
  794. wsa881x_set_port(component, SWR_VISENSE_PORT,
  795. &port_id[num_port], &num_ch[num_port],
  796. &ch_mask[num_port], &ch_rate[num_port],
  797. &port_type[num_port]);
  798. ++num_port;
  799. }
  800. swr_disconnect_port(wsa881x->swr_slave, &port_id[0], num_port,
  801. &ch_mask[0], &port_type[0]);
  802. break;
  803. default:
  804. break;
  805. }
  806. return 0;
  807. }
  808. static int wsa881x_rdac_event(struct snd_soc_dapm_widget *w,
  809. struct snd_kcontrol *kcontrol, int event)
  810. {
  811. struct snd_soc_component *component =
  812. snd_soc_dapm_to_component(w->dapm);
  813. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  814. dev_dbg(component->dev, "%s: %s %d boost %d visense %d\n", __func__,
  815. w->name, event, wsa881x->boost_enable,
  816. wsa881x->visense_enable);
  817. switch (event) {
  818. case SND_SOC_DAPM_PRE_PMU:
  819. mutex_lock(&wsa881x->temp_lock);
  820. wsa881x_resource_acquire(component, ENABLE);
  821. mutex_unlock(&wsa881x->temp_lock);
  822. wsa881x_boost_ctrl(component, ENABLE);
  823. break;
  824. case SND_SOC_DAPM_POST_PMD:
  825. swr_slvdev_datapath_control(wsa881x->swr_slave,
  826. wsa881x->swr_slave->dev_num,
  827. false);
  828. wsa881x_boost_ctrl(component, DISABLE);
  829. mutex_lock(&wsa881x->temp_lock);
  830. wsa881x_resource_acquire(component, DISABLE);
  831. mutex_unlock(&wsa881x->temp_lock);
  832. break;
  833. }
  834. return 0;
  835. }
  836. static int wsa881x_ramp_pa_gain(struct snd_soc_component *component,
  837. int min_gain, int max_gain, int udelay)
  838. {
  839. int val;
  840. for (val = min_gain; max_gain <= val; val--) {
  841. snd_soc_component_update_bits(component, WSA881X_SPKR_DRV_GAIN,
  842. 0xF0, val << 4);
  843. /*
  844. * 1ms delay is needed for every step change in gain as per
  845. * HW requirement.
  846. */
  847. usleep_range(udelay, udelay+10);
  848. }
  849. return 0;
  850. }
  851. static void wsa881x_ocp_ctl_work(struct work_struct *work)
  852. {
  853. struct wsa881x_priv *wsa881x;
  854. struct delayed_work *dwork;
  855. struct snd_soc_component *component;
  856. int temp_val;
  857. dwork = to_delayed_work(work);
  858. wsa881x = container_of(dwork, struct wsa881x_priv, ocp_ctl_work);
  859. if (wsa881x->state == WSA881X_DEV_DOWN)
  860. return;
  861. component = wsa881x->component;
  862. wsa881x_get_temp(wsa881x->tz_pdata.tz_dev, &temp_val);
  863. dev_dbg(component->dev, " temp = %d\n", temp_val);
  864. if (temp_val <= WSA881X_OCP_CTL_TEMP_CELSIUS)
  865. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  866. 0xC0, 0x00);
  867. else
  868. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  869. 0xC0, 0xC0);
  870. schedule_delayed_work(&wsa881x->ocp_ctl_work,
  871. msecs_to_jiffies(wsa881x_ocp_poll_timer_sec * 1000));
  872. }
  873. static int wsa881x_spkr_pa_event(struct snd_soc_dapm_widget *w,
  874. struct snd_kcontrol *kcontrol, int event)
  875. {
  876. struct snd_soc_component *component =
  877. snd_soc_dapm_to_component(w->dapm);
  878. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  879. int min_gain, max_gain;
  880. dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
  881. switch (event) {
  882. case SND_SOC_DAPM_PRE_PMU:
  883. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  884. 0xC0, 0x80);
  885. regmap_multi_reg_write(wsa881x->regmap,
  886. wsa881x_pre_pmu_pa_2_0,
  887. ARRAY_SIZE(wsa881x_pre_pmu_pa_2_0));
  888. swr_slvdev_datapath_control(wsa881x->swr_slave,
  889. wsa881x->swr_slave->dev_num,
  890. true);
  891. /* Set register mode if compander is not enabled */
  892. if (!wsa881x->comp_enable)
  893. snd_soc_component_update_bits(component,
  894. WSA881X_SPKR_DRV_GAIN,
  895. 0x08, 0x08);
  896. else
  897. snd_soc_component_update_bits(component,
  898. WSA881X_SPKR_DRV_GAIN,
  899. 0x08, 0x00);
  900. break;
  901. case SND_SOC_DAPM_POST_PMU:
  902. if (!wsa881x->bolero_dev)
  903. snd_soc_component_update_bits(component,
  904. WSA881X_SPKR_DRV_EN,
  905. 0x80, 0x80);
  906. if (!wsa881x->comp_enable) {
  907. max_gain = wsa881x->pa_gain;
  908. /*
  909. * Gain has to set incrementally in 4 steps
  910. * as per HW sequence
  911. */
  912. if (max_gain > G_4P5DB)
  913. min_gain = G_0DB;
  914. else
  915. min_gain = max_gain + 3;
  916. /*
  917. * 1ms delay is needed before change in gain
  918. * as per HW requirement.
  919. */
  920. usleep_range(1000, 1010);
  921. wsa881x_ramp_pa_gain(component, min_gain, max_gain,
  922. 1000);
  923. }
  924. if (wsa881x->visense_enable) {
  925. wsa881x_visense_txfe_ctrl(component, ENABLE,
  926. 0x00, 0x03, 0x01);
  927. snd_soc_component_update_bits(component,
  928. WSA881X_ADC_EN_SEL_IBAIS,
  929. 0x07, 0x01);
  930. wsa881x_visense_adc_ctrl(component, ENABLE);
  931. }
  932. schedule_delayed_work(&wsa881x->ocp_ctl_work,
  933. msecs_to_jiffies(WSA881X_OCP_CTL_TIMER_SEC * 1000));
  934. /* Force remove group */
  935. swr_remove_from_group(wsa881x->swr_slave,
  936. wsa881x->swr_slave->dev_num);
  937. break;
  938. case SND_SOC_DAPM_POST_PMD:
  939. snd_soc_component_update_bits(component,
  940. WSA881X_SPKR_DRV_EN,
  941. 0x80, 0x00);
  942. if (wsa881x->visense_enable) {
  943. wsa881x_visense_adc_ctrl(component, DISABLE);
  944. snd_soc_component_update_bits(component,
  945. WSA881X_ADC_EN_SEL_IBAIS,
  946. 0x07, 0x00);
  947. wsa881x_visense_txfe_ctrl(component, DISABLE,
  948. 0x00, 0x01, 0x01);
  949. }
  950. cancel_delayed_work_sync(&wsa881x->ocp_ctl_work);
  951. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  952. 0xC0, 0xC0);
  953. break;
  954. }
  955. return 0;
  956. }
  957. static const struct snd_soc_dapm_widget wsa881x_dapm_widgets[] = {
  958. SND_SOC_DAPM_INPUT("IN"),
  959. SND_SOC_DAPM_MIXER_E("SWR DAC_Port", SND_SOC_NOPM, 0, 0, swr_dac_port,
  960. ARRAY_SIZE(swr_dac_port), wsa881x_enable_swr_dac_port,
  961. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  962. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  963. SND_SOC_DAPM_DAC_E("RDAC", NULL, WSA881X_SPKR_DAC_CTL, 7, 0,
  964. wsa881x_rdac_event,
  965. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  966. SND_SOC_DAPM_PGA_E("SPKR PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
  967. wsa881x_spkr_pa_event, SND_SOC_DAPM_PRE_PMU |
  968. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  969. SND_SOC_DAPM_OUTPUT("SPKR"),
  970. };
  971. static const struct snd_soc_dapm_route wsa881x_audio_map[] = {
  972. {"SWR DAC_Port", "Switch", "IN"},
  973. {"RDAC", NULL, "SWR DAC_Port"},
  974. {"SPKR PGA", NULL, "RDAC"},
  975. {"SPKR", NULL, "SPKR PGA"},
  976. };
  977. int wsa881x_set_channel_map(struct snd_soc_component *component, u8 *port,
  978. u8 num_port, unsigned int *ch_mask,
  979. unsigned int *ch_rate, u8 *port_type)
  980. {
  981. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  982. int i;
  983. if (!port || !ch_mask || !ch_rate ||
  984. (num_port > WSA881X_MAX_SWR_PORTS)) {
  985. dev_err(component->dev,
  986. "%s: Invalid port=%pK, ch_mask=%pK, ch_rate=%pK\n",
  987. __func__, port, ch_mask, ch_rate);
  988. return -EINVAL;
  989. }
  990. for (i = 0; i < num_port; i++) {
  991. wsa881x->port[i].port_id = port[i];
  992. wsa881x->port[i].ch_mask = ch_mask[i];
  993. wsa881x->port[i].ch_rate = ch_rate[i];
  994. wsa881x->port[i].num_ch = __sw_hweight8(ch_mask[i]);
  995. if (port_type)
  996. wsa881x->port[i].port_type = port_type[i];
  997. }
  998. return 0;
  999. }
  1000. EXPORT_SYMBOL(wsa881x_set_channel_map);
  1001. static void wsa881x_init(struct snd_soc_component *component)
  1002. {
  1003. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  1004. wsa881x->version =
  1005. snd_soc_component_read32(component, WSA881X_CHIP_ID1);
  1006. wsa881x_regmap_defaults(wsa881x->regmap, wsa881x->version);
  1007. /* Enable software reset output from soundwire slave */
  1008. snd_soc_component_update_bits(component, WSA881X_SWR_RESET_EN,
  1009. 0x07, 0x07);
  1010. /* Bring out of analog reset */
  1011. snd_soc_component_update_bits(component, WSA881X_CDC_RST_CTL,
  1012. 0x02, 0x02);
  1013. /* Bring out of digital reset */
  1014. snd_soc_component_update_bits(component, WSA881X_CDC_RST_CTL,
  1015. 0x01, 0x01);
  1016. snd_soc_component_update_bits(component, WSA881X_CLOCK_CONFIG,
  1017. 0x10, 0x10);
  1018. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  1019. 0x02, 0x02);
  1020. snd_soc_component_update_bits(component, WSA881X_SPKR_MISC_CTL1,
  1021. 0xC0, 0x80);
  1022. snd_soc_component_update_bits(component, WSA881X_SPKR_MISC_CTL1,
  1023. 0x06, 0x06);
  1024. snd_soc_component_update_bits(component, WSA881X_SPKR_BIAS_INT,
  1025. 0xFF, 0x00);
  1026. snd_soc_component_update_bits(component, WSA881X_SPKR_PA_INT,
  1027. 0xF0, 0x40);
  1028. snd_soc_component_update_bits(component, WSA881X_SPKR_PA_INT,
  1029. 0x0E, 0x0E);
  1030. snd_soc_component_update_bits(component, WSA881X_BOOST_LOOP_STABILITY,
  1031. 0x03, 0x03);
  1032. snd_soc_component_update_bits(component, WSA881X_BOOST_MISC2_CTL,
  1033. 0xFF, 0x14);
  1034. snd_soc_component_update_bits(component, WSA881X_BOOST_START_CTL,
  1035. 0x80, 0x80);
  1036. snd_soc_component_update_bits(component, WSA881X_BOOST_START_CTL,
  1037. 0x03, 0x00);
  1038. snd_soc_component_update_bits(component,
  1039. WSA881X_BOOST_SLOPE_COMP_ISENSE_FB,
  1040. 0x0C, 0x04);
  1041. snd_soc_component_update_bits(component,
  1042. WSA881X_BOOST_SLOPE_COMP_ISENSE_FB,
  1043. 0x03, 0x00);
  1044. if (snd_soc_component_read32(component, WSA881X_OTP_REG_0))
  1045. snd_soc_component_update_bits(component,
  1046. WSA881X_BOOST_PRESET_OUT1,
  1047. 0xF0, 0x70);
  1048. snd_soc_component_update_bits(component, WSA881X_BOOST_PRESET_OUT2,
  1049. 0xF0, 0x30);
  1050. snd_soc_component_update_bits(component, WSA881X_SPKR_DRV_EN,
  1051. 0x08, 0x08);
  1052. snd_soc_component_update_bits(component, WSA881X_BOOST_CURRENT_LIMIT,
  1053. 0x0F, 0x08);
  1054. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  1055. 0x30, 0x30);
  1056. snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL,
  1057. 0x0C, 0x00);
  1058. snd_soc_component_update_bits(component, WSA881X_OTP_REG_28,
  1059. 0x3F, 0x3A);
  1060. snd_soc_component_update_bits(component, WSA881X_BONGO_RESRV_REG1,
  1061. 0xFF, 0xB2);
  1062. snd_soc_component_update_bits(component, WSA881X_BONGO_RESRV_REG2,
  1063. 0xFF, 0x05);
  1064. }
  1065. static int32_t wsa881x_resource_acquire(struct snd_soc_component *component,
  1066. bool enable)
  1067. {
  1068. wsa881x_clk_ctrl(component, enable);
  1069. wsa881x_bandgap_ctrl(component, enable);
  1070. return 0;
  1071. }
  1072. static int32_t wsa881x_temp_reg_read(struct snd_soc_component *component,
  1073. struct wsa_temp_register *wsa_temp_reg)
  1074. {
  1075. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  1076. struct swr_device *dev;
  1077. u8 retry = WSA881X_NUM_RETRY;
  1078. u8 devnum = 0;
  1079. if (!wsa881x) {
  1080. dev_err(component->dev, "%s: wsa881x is NULL\n", __func__);
  1081. return -EINVAL;
  1082. }
  1083. dev = wsa881x->swr_slave;
  1084. if (dev && (wsa881x->state == WSA881X_DEV_DOWN)) {
  1085. while (swr_get_logical_dev_num(dev, dev->addr, &devnum) &&
  1086. retry--) {
  1087. /* Retry after 1 msec delay */
  1088. usleep_range(1000, 1100);
  1089. }
  1090. if (retry == 0) {
  1091. dev_err(component->dev,
  1092. "%s get devnum %d for dev addr %lx failed\n",
  1093. __func__, devnum, dev->addr);
  1094. return -EINVAL;
  1095. }
  1096. }
  1097. wsa881x_regcache_sync(wsa881x);
  1098. mutex_lock(&wsa881x->temp_lock);
  1099. wsa881x_resource_acquire(component, ENABLE);
  1100. snd_soc_component_update_bits(component, WSA881X_TADC_VALUE_CTL,
  1101. 0x01, 0x00);
  1102. wsa_temp_reg->dmeas_msb = snd_soc_component_read32(
  1103. component, WSA881X_TEMP_MSB);
  1104. wsa_temp_reg->dmeas_lsb = snd_soc_component_read32(
  1105. component, WSA881X_TEMP_LSB);
  1106. snd_soc_component_update_bits(component, WSA881X_TADC_VALUE_CTL,
  1107. 0x01, 0x01);
  1108. wsa_temp_reg->d1_msb = snd_soc_component_read32(
  1109. component, WSA881X_OTP_REG_1);
  1110. wsa_temp_reg->d1_lsb = snd_soc_component_read32(
  1111. component, WSA881X_OTP_REG_2);
  1112. wsa_temp_reg->d2_msb = snd_soc_component_read32(
  1113. component, WSA881X_OTP_REG_3);
  1114. wsa_temp_reg->d2_lsb = snd_soc_component_read32(
  1115. component, WSA881X_OTP_REG_4);
  1116. wsa881x_resource_acquire(component, DISABLE);
  1117. mutex_unlock(&wsa881x->temp_lock);
  1118. return 0;
  1119. }
  1120. static int wsa881x_probe(struct snd_soc_component *component)
  1121. {
  1122. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  1123. struct swr_device *dev;
  1124. if (!wsa881x)
  1125. return -EINVAL;
  1126. snd_soc_component_init_regmap(component, wsa881x->regmap);
  1127. dev = wsa881x->swr_slave;
  1128. wsa881x->component = component;
  1129. mutex_init(&wsa881x->bg_lock);
  1130. wsa881x_init(component);
  1131. snprintf(wsa881x->tz_pdata.name, sizeof(wsa881x->tz_pdata.name),
  1132. "%s.%x", "wsatz", (u8)dev->addr);
  1133. wsa881x->bg_cnt = 0;
  1134. wsa881x->clk_cnt = 0;
  1135. wsa881x->tz_pdata.component = component;
  1136. wsa881x->tz_pdata.wsa_temp_reg_read = wsa881x_temp_reg_read;
  1137. wsa881x_init_thermal(&wsa881x->tz_pdata);
  1138. snd_soc_add_component_controls(component, wsa_snd_controls,
  1139. ARRAY_SIZE(wsa_snd_controls));
  1140. INIT_DELAYED_WORK(&wsa881x->ocp_ctl_work, wsa881x_ocp_ctl_work);
  1141. return 0;
  1142. }
  1143. static void wsa881x_remove(struct snd_soc_component *component)
  1144. {
  1145. struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component);
  1146. if (wsa881x->tz_pdata.tz_dev)
  1147. wsa881x_deinit_thermal(wsa881x->tz_pdata.tz_dev);
  1148. mutex_destroy(&wsa881x->bg_lock);
  1149. return;
  1150. }
  1151. static const struct snd_soc_component_driver soc_codec_dev_wsa881x = {
  1152. .name = DRV_NAME,
  1153. .probe = wsa881x_probe,
  1154. .remove = wsa881x_remove,
  1155. .controls = wsa881x_snd_controls,
  1156. .num_controls = ARRAY_SIZE(wsa881x_snd_controls),
  1157. .dapm_widgets = wsa881x_dapm_widgets,
  1158. .num_dapm_widgets = ARRAY_SIZE(wsa881x_dapm_widgets),
  1159. .dapm_routes = wsa881x_audio_map,
  1160. .num_dapm_routes = ARRAY_SIZE(wsa881x_audio_map),
  1161. };
  1162. static int wsa881x_gpio_ctrl(struct wsa881x_priv *wsa881x, bool enable)
  1163. {
  1164. int ret = 0;
  1165. if (wsa881x->pd_gpio < 0) {
  1166. dev_err(wsa881x->dev, "%s: gpio is not valid %d\n",
  1167. __func__, wsa881x->pd_gpio);
  1168. return -EINVAL;
  1169. }
  1170. if (wsa881x->wsa_rst_np) {
  1171. if (enable)
  1172. ret = msm_cdc_pinctrl_select_active_state(
  1173. wsa881x->wsa_rst_np);
  1174. else
  1175. ret = msm_cdc_pinctrl_select_sleep_state(
  1176. wsa881x->wsa_rst_np);
  1177. if (ret != 0)
  1178. dev_err(wsa881x->dev,
  1179. "%s: Failed to turn state %d; ret=%d\n",
  1180. __func__, enable, ret);
  1181. } else {
  1182. if (gpio_is_valid(wsa881x->pd_gpio))
  1183. gpio_direction_output(wsa881x->pd_gpio, enable);
  1184. }
  1185. return ret;
  1186. }
  1187. static int wsa881x_gpio_init(struct swr_device *pdev)
  1188. {
  1189. int ret = 0;
  1190. struct wsa881x_priv *wsa881x;
  1191. wsa881x = swr_get_dev_data(pdev);
  1192. if (!wsa881x) {
  1193. dev_err(&pdev->dev, "%s: wsa881x is NULL\n", __func__);
  1194. return -EINVAL;
  1195. }
  1196. dev_dbg(&pdev->dev, "%s: gpio %d request with name %s\n",
  1197. __func__, wsa881x->pd_gpio, dev_name(&pdev->dev));
  1198. ret = gpio_request(wsa881x->pd_gpio, dev_name(&pdev->dev));
  1199. if (ret) {
  1200. if (ret == -EBUSY) {
  1201. /* GPIO was already requested */
  1202. dev_dbg(&pdev->dev,
  1203. "%s: gpio %d is already set to high\n",
  1204. __func__, wsa881x->pd_gpio);
  1205. ret = 0;
  1206. } else {
  1207. dev_err(&pdev->dev, "%s: Failed to request gpio %d, err: %d\n",
  1208. __func__, wsa881x->pd_gpio, ret);
  1209. }
  1210. }
  1211. return ret;
  1212. }
  1213. static int wsa881x_event_notify(struct notifier_block *nb,
  1214. unsigned long val, void *ptr)
  1215. {
  1216. u16 event = (val & 0xffff);
  1217. struct wsa881x_priv *wsa881x = container_of(nb, struct wsa881x_priv,
  1218. bolero_nblock);
  1219. if (!wsa881x)
  1220. return -EINVAL;
  1221. switch (event) {
  1222. case BOLERO_WSA_EVT_PA_OFF_PRE_SSR:
  1223. snd_soc_component_update_bits(wsa881x->component,
  1224. WSA881X_SPKR_DRV_GAIN,
  1225. 0xF0, 0xC0);
  1226. snd_soc_component_update_bits(wsa881x->component,
  1227. WSA881X_SPKR_DRV_EN,
  1228. 0x80, 0x00);
  1229. break;
  1230. case BOLERO_WSA_EVT_PA_ON_POST_FSCLK:
  1231. if ((snd_soc_component_read32(wsa881x->component,
  1232. WSA881X_SPKR_DAC_CTL) & 0x80) == 0x80)
  1233. snd_soc_component_update_bits(wsa881x->component,
  1234. WSA881X_SPKR_DRV_EN,
  1235. 0x80, 0x80);
  1236. break;
  1237. default:
  1238. break;
  1239. }
  1240. return 0;
  1241. }
  1242. static int wsa881x_swr_probe(struct swr_device *pdev)
  1243. {
  1244. int ret = 0;
  1245. struct wsa881x_priv *wsa881x;
  1246. u8 devnum = 0;
  1247. bool pin_state_current = false;
  1248. struct wsa_ctrl_platform_data *plat_data = NULL;
  1249. wsa881x = devm_kzalloc(&pdev->dev, sizeof(struct wsa881x_priv),
  1250. GFP_KERNEL);
  1251. if (!wsa881x)
  1252. return -ENOMEM;
  1253. wsa881x->wsa_rst_np = of_parse_phandle(pdev->dev.of_node,
  1254. "qcom,spkr-sd-n-node", 0);
  1255. if (!wsa881x->wsa_rst_np) {
  1256. dev_dbg(&pdev->dev, "%s: Not using pinctrl, fallback to gpio\n",
  1257. __func__);
  1258. wsa881x->pd_gpio = of_get_named_gpio(pdev->dev.of_node,
  1259. "qcom,spkr-sd-n-gpio", 0);
  1260. if (wsa881x->pd_gpio < 0) {
  1261. dev_err(&pdev->dev, "%s: %s property is not found %d\n",
  1262. __func__, "qcom,spkr-sd-n-gpio",
  1263. wsa881x->pd_gpio);
  1264. goto err;
  1265. }
  1266. dev_dbg(&pdev->dev, "%s: reset gpio %d\n", __func__,
  1267. wsa881x->pd_gpio);
  1268. }
  1269. swr_set_dev_data(pdev, wsa881x);
  1270. wsa881x->swr_slave = pdev;
  1271. if (!wsa881x->wsa_rst_np) {
  1272. ret = wsa881x_gpio_init(pdev);
  1273. if (ret)
  1274. goto err;
  1275. }
  1276. if (wsa881x->wsa_rst_np)
  1277. pin_state_current = msm_cdc_pinctrl_get_state(
  1278. wsa881x->wsa_rst_np);
  1279. wsa881x_gpio_ctrl(wsa881x, true);
  1280. wsa881x->state = WSA881X_DEV_UP;
  1281. if (!debugfs_wsa881x_dent) {
  1282. dbgwsa881x = wsa881x;
  1283. debugfs_wsa881x_dent = debugfs_create_dir(
  1284. "wsa881x_swr_slave", 0);
  1285. if (!IS_ERR(debugfs_wsa881x_dent)) {
  1286. debugfs_peek = debugfs_create_file("swrslave_peek",
  1287. S_IFREG | 0444, debugfs_wsa881x_dent,
  1288. (void *) "swrslave_peek",
  1289. &codec_debug_ops);
  1290. debugfs_poke = debugfs_create_file("swrslave_poke",
  1291. S_IFREG | 0444, debugfs_wsa881x_dent,
  1292. (void *) "swrslave_poke",
  1293. &codec_debug_ops);
  1294. debugfs_reg_dump = debugfs_create_file(
  1295. "swrslave_reg_dump",
  1296. S_IFREG | 0444,
  1297. debugfs_wsa881x_dent,
  1298. (void *) "swrslave_reg_dump",
  1299. &codec_debug_ops);
  1300. }
  1301. }
  1302. /*
  1303. * Add 5msec delay to provide sufficient time for
  1304. * soundwire auto enumeration of slave devices as
  1305. * as per HW requirement.
  1306. */
  1307. usleep_range(5000, 5010);
  1308. ret = swr_get_logical_dev_num(pdev, pdev->addr, &devnum);
  1309. if (ret) {
  1310. dev_dbg(&pdev->dev,
  1311. "%s get devnum %d for dev addr %lx failed\n",
  1312. __func__, devnum, pdev->addr);
  1313. goto dev_err;
  1314. }
  1315. pdev->dev_num = devnum;
  1316. wsa881x->regmap = devm_regmap_init_swr(pdev,
  1317. &wsa881x_regmap_config);
  1318. if (IS_ERR(wsa881x->regmap)) {
  1319. ret = PTR_ERR(wsa881x->regmap);
  1320. dev_err(&pdev->dev, "%s: regmap_init failed %d\n",
  1321. __func__, ret);
  1322. goto dev_err;
  1323. }
  1324. ret = snd_soc_register_component(&pdev->dev, &soc_codec_dev_wsa881x,
  1325. NULL, 0);
  1326. if (ret) {
  1327. dev_err(&pdev->dev, "%s: Codec registration failed\n",
  1328. __func__);
  1329. goto dev_err;
  1330. }
  1331. wsa881x->bolero_np = of_parse_phandle(pdev->dev.of_node,
  1332. "qcom,bolero-handle", 0);
  1333. if (wsa881x->bolero_np) {
  1334. wsa881x->bolero_dev =
  1335. of_find_device_by_node(wsa881x->bolero_np);
  1336. if (wsa881x->bolero_dev) {
  1337. plat_data = dev_get_platdata(&wsa881x->bolero_dev->dev);
  1338. if (plat_data) {
  1339. wsa881x->bolero_nblock.notifier_call =
  1340. wsa881x_event_notify;
  1341. if (plat_data->register_notifier)
  1342. plat_data->register_notifier(
  1343. plat_data->handle,
  1344. &wsa881x->bolero_nblock,
  1345. true);
  1346. wsa881x->register_notifier =
  1347. plat_data->register_notifier;
  1348. wsa881x->handle = plat_data->handle;
  1349. } else {
  1350. dev_err(&pdev->dev, "%s: plat data not found\n",
  1351. __func__);
  1352. }
  1353. } else {
  1354. dev_err(&pdev->dev, "%s: bolero dev not found\n",
  1355. __func__);
  1356. }
  1357. } else {
  1358. dev_info(&pdev->dev, "%s: bolero node not found\n", __func__);
  1359. }
  1360. mutex_init(&wsa881x->res_lock);
  1361. mutex_init(&wsa881x->temp_lock);
  1362. return 0;
  1363. dev_err:
  1364. if (pin_state_current == false)
  1365. wsa881x_gpio_ctrl(wsa881x, false);
  1366. swr_remove_device(pdev);
  1367. err:
  1368. return ret;
  1369. }
  1370. static int wsa881x_swr_remove(struct swr_device *pdev)
  1371. {
  1372. struct wsa881x_priv *wsa881x;
  1373. wsa881x = swr_get_dev_data(pdev);
  1374. if (!wsa881x) {
  1375. dev_err(&pdev->dev, "%s: wsa881x is NULL\n", __func__);
  1376. return -EINVAL;
  1377. }
  1378. if (wsa881x->register_notifier)
  1379. wsa881x->register_notifier(wsa881x->handle,
  1380. &wsa881x->bolero_nblock, false);
  1381. debugfs_remove_recursive(debugfs_wsa881x_dent);
  1382. debugfs_wsa881x_dent = NULL;
  1383. mutex_destroy(&wsa881x->res_lock);
  1384. mutex_destroy(&wsa881x->temp_lock);
  1385. snd_soc_unregister_component(&pdev->dev);
  1386. if (wsa881x->pd_gpio)
  1387. gpio_free(wsa881x->pd_gpio);
  1388. swr_set_dev_data(pdev, NULL);
  1389. return 0;
  1390. }
  1391. static int wsa881x_swr_up(struct swr_device *pdev)
  1392. {
  1393. int ret;
  1394. struct wsa881x_priv *wsa881x;
  1395. wsa881x = swr_get_dev_data(pdev);
  1396. if (!wsa881x) {
  1397. dev_err(&pdev->dev, "%s: wsa881x is NULL\n", __func__);
  1398. return -EINVAL;
  1399. }
  1400. ret = wsa881x_gpio_ctrl(wsa881x, true);
  1401. if (ret)
  1402. dev_err(&pdev->dev, "%s: Failed to enable gpio\n", __func__);
  1403. else
  1404. wsa881x->state = WSA881X_DEV_UP;
  1405. return ret;
  1406. }
  1407. static int wsa881x_swr_down(struct swr_device *pdev)
  1408. {
  1409. struct wsa881x_priv *wsa881x;
  1410. int ret;
  1411. wsa881x = swr_get_dev_data(pdev);
  1412. if (!wsa881x) {
  1413. dev_err(&pdev->dev, "%s: wsa881x is NULL\n", __func__);
  1414. return -EINVAL;
  1415. }
  1416. ret = wsa881x_gpio_ctrl(wsa881x, false);
  1417. if (ret)
  1418. dev_err(&pdev->dev, "%s: Failed to disable gpio\n", __func__);
  1419. else
  1420. wsa881x->state = WSA881X_DEV_DOWN;
  1421. return ret;
  1422. }
  1423. static int wsa881x_swr_reset(struct swr_device *pdev)
  1424. {
  1425. struct wsa881x_priv *wsa881x;
  1426. u8 retry = WSA881X_NUM_RETRY;
  1427. u8 devnum = 0;
  1428. wsa881x = swr_get_dev_data(pdev);
  1429. if (!wsa881x) {
  1430. dev_err(&pdev->dev, "%s: wsa881x is NULL\n", __func__);
  1431. return -EINVAL;
  1432. }
  1433. if (wsa881x->state == WSA881X_DEV_READY) {
  1434. dev_dbg(&pdev->dev, "%s: device already active\n", __func__);
  1435. return 0;
  1436. }
  1437. wsa881x->bg_cnt = 0;
  1438. wsa881x->clk_cnt = 0;
  1439. while (swr_get_logical_dev_num(pdev, pdev->addr, &devnum) && retry--) {
  1440. /* Retry after 1 msec delay */
  1441. usleep_range(1000, 1100);
  1442. }
  1443. pdev->dev_num = devnum;
  1444. wsa881x_regcache_sync(wsa881x);
  1445. return 0;
  1446. }
  1447. #ifdef CONFIG_PM_SLEEP
  1448. static int wsa881x_swr_suspend(struct device *dev)
  1449. {
  1450. dev_dbg(dev, "%s: system suspend\n", __func__);
  1451. return 0;
  1452. }
  1453. static int wsa881x_swr_resume(struct device *dev)
  1454. {
  1455. struct wsa881x_priv *wsa881x = swr_get_dev_data(to_swr_device(dev));
  1456. if (!wsa881x) {
  1457. dev_err(dev, "%s: wsa881x private data is NULL\n", __func__);
  1458. return -EINVAL;
  1459. }
  1460. dev_dbg(dev, "%s: system resume\n", __func__);
  1461. return 0;
  1462. }
  1463. #endif /* CONFIG_PM_SLEEP */
  1464. static const struct dev_pm_ops wsa881x_swr_pm_ops = {
  1465. SET_SYSTEM_SLEEP_PM_OPS(wsa881x_swr_suspend, wsa881x_swr_resume)
  1466. };
  1467. static const struct swr_device_id wsa881x_swr_id[] = {
  1468. {"wsa881x", 0},
  1469. {}
  1470. };
  1471. static const struct of_device_id wsa881x_swr_dt_match[] = {
  1472. {
  1473. .compatible = "qcom,wsa881x",
  1474. },
  1475. {}
  1476. };
  1477. static struct swr_driver wsa881x_codec_driver = {
  1478. .driver = {
  1479. .name = "wsa881x",
  1480. .owner = THIS_MODULE,
  1481. .pm = &wsa881x_swr_pm_ops,
  1482. .of_match_table = wsa881x_swr_dt_match,
  1483. },
  1484. .probe = wsa881x_swr_probe,
  1485. .remove = wsa881x_swr_remove,
  1486. .id_table = wsa881x_swr_id,
  1487. .device_up = wsa881x_swr_up,
  1488. .device_down = wsa881x_swr_down,
  1489. .reset_device = wsa881x_swr_reset,
  1490. };
  1491. static int __init wsa881x_codec_init(void)
  1492. {
  1493. return swr_driver_register(&wsa881x_codec_driver);
  1494. }
  1495. static void __exit wsa881x_codec_exit(void)
  1496. {
  1497. swr_driver_unregister(&wsa881x_codec_driver);
  1498. }
  1499. module_init(wsa881x_codec_init);
  1500. module_exit(wsa881x_codec_exit);
  1501. MODULE_DESCRIPTION("WSA881x Codec driver");
  1502. MODULE_LICENSE("GPL v2");