376724d4f9
STATUS_BUFFER_DONE tlv written in first word for a status buffer indicates that DMA is done for that status ring entry. In existing implementation, for a status ring entry if STATUS_BUFFER_DONE tlv is not written by HW, we poll on to status ring entry until DMA is done by HW. During lmac reset it may happnen that HW will not write STATUS_BUFFER_DONE tlv in status buffer, in that case we end up polling infinitely leading to backpressure on monitor status ring. As per MAC team's suggestion, when HP + 1 entry is peeked and if DMA is not done and if HP + 2 entry's DMA done is set, replenish HP + 1 entry and start processing in next interrupt. If HP + 2 entry's DMA done is not set, poll onto HP + 1 entry DMA done to be set. CRs-Fixed: 2740988 Change-Id: Ieef667f0bb4a47e74fc320c93243c637409f47f0
262 خطوط
7.6 KiB
C
262 خطوط
7.6 KiB
C
/*
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* Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/**
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* @file cdp_txrx_mon_struct.h
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* @brief Define the monitor mode API structure
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* shared by data path and the OS interface module
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*/
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#ifndef _CDP_TXRX_MON_STRUCT_H_
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#define _CDP_TXRX_MON_STRUCT_H_
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/* XXX not really a mode; there are really multiple PHY's */
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enum cdp_mon_phymode {
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/* autoselect */
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CDP_IEEE80211_MODE_AUTO = 0,
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/* 5GHz, OFDM */
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CDP_IEEE80211_MODE_11A = 1,
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/* 2GHz, CCK */
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CDP_IEEE80211_MODE_11B = 2,
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/* 2GHz, OFDM */
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CDP_IEEE80211_MODE_11G = 3,
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/* 2GHz, GFSK */
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CDP_IEEE80211_MODE_FH = 4,
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/* 5GHz, OFDM, 2x clock dynamic turbo */
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CDP_IEEE80211_MODE_TURBO_A = 5,
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/* 2GHz, OFDM, 2x clock dynamic turbo */
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CDP_IEEE80211_MODE_TURBO_G = 6,
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/* 5Ghz, HT20 */
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CDP_IEEE80211_MODE_11NA_HT20 = 7,
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/* 2Ghz, HT20 */
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CDP_IEEE80211_MODE_11NG_HT20 = 8,
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/* 5Ghz, HT40 (ext ch +1) */
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CDP_IEEE80211_MODE_11NA_HT40PLUS = 9,
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/* 5Ghz, HT40 (ext ch -1) */
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CDP_IEEE80211_MODE_11NA_HT40MINUS = 10,
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/* 2Ghz, HT40 (ext ch +1) */
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CDP_IEEE80211_MODE_11NG_HT40PLUS = 11,
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/* 2Ghz, HT40 (ext ch -1) */
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CDP_IEEE80211_MODE_11NG_HT40MINUS = 12,
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/* 2Ghz, Auto HT40 */
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CDP_IEEE80211_MODE_11NG_HT40 = 13,
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/* 5Ghz, Auto HT40 */
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CDP_IEEE80211_MODE_11NA_HT40 = 14,
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/* 5Ghz, VHT20 */
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CDP_IEEE80211_MODE_11AC_VHT20 = 15,
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/* 5Ghz, VHT40 (Ext ch +1) */
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CDP_IEEE80211_MODE_11AC_VHT40PLUS = 16,
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/* 5Ghz VHT40 (Ext ch -1) */
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CDP_IEEE80211_MODE_11AC_VHT40MINUS = 17,
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/* 5Ghz, VHT40 */
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CDP_IEEE80211_MODE_11AC_VHT40 = 18,
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/* 5Ghz, VHT80 */
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CDP_IEEE80211_MODE_11AC_VHT80 = 19,
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/* 5Ghz, VHT160 */
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CDP_IEEE80211_MODE_11AC_VHT160 = 20,
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/* 5Ghz, VHT80_80 */
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CDP_IEEE80211_MODE_11AC_VHT80_80 = 21,
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};
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enum {
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CDP_PKT_TYPE_OFDM = 0,
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CDP_PKT_TYPE_CCK,
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CDP_PKT_TYPE_HT,
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CDP_PKT_TYPE_VHT,
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CDP_PKT_TYPE_HE,
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};
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enum {
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CDP_SGI_0_8_US = 0,
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CDP_SGI_0_4_US,
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CDP_SGI_1_6_US,
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CDP_SGI_3_2_US,
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};
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enum {
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CDP_RX_TYPE_SU = 0,
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CDP_RX_TYPE_MU_MIMO,
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CDP_RX_TYPE_MU_OFDMA,
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CDP_RX_TYPE_MU_OFDMA_MIMO,
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};
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enum {
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CDP_FULL_RX_BW_20 = 0,
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CDP_FULL_RX_BW_40,
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CDP_FULL_RX_BW_80,
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CDP_FULL_RX_BW_160,
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};
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struct cdp_mon_status {
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/* bss color value 1-63 used for update on ppdu_desc bsscolor */
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uint8_t bsscolor;
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int rs_numchains;
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int rs_flags;
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#define IEEE80211_RX_FCS_ERROR 0x01
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#define IEEE80211_RX_MIC_ERROR 0x02
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#define IEEE80211_RX_DECRYPT_ERROR 0x04
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/* holes in flags here between, ATH_RX_XXXX to IEEE80211_RX_XXX */
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#define IEEE80211_RX_KEYMISS 0x200
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int rs_rssi; /* RSSI (noise floor ajusted) */
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int rs_abs_rssi; /* absolute RSSI */
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int rs_datarate; /* data rate received */
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int rs_rateieee;
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int rs_ratephy1;
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int rs_ratephy2;
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int rs_ratephy3;
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/* Keep the same as ATH_MAX_ANTENNA */
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#define IEEE80211_MAX_ANTENNA 3
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/* RSSI (noise floor ajusted) */
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u_int8_t rs_rssictl[IEEE80211_MAX_ANTENNA];
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/* RSSI (noise floor ajusted) */
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u_int8_t rs_rssiextn[IEEE80211_MAX_ANTENNA];
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/* rs_rssi is valid or not */
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u_int8_t rs_isvalidrssi;
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enum cdp_mon_phymode rs_phymode;
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int rs_freq;
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union {
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u_int8_t data[8];
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u_int64_t tsf;
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} rs_tstamp;
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/*
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* Detail channel structure of recv frame.
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* It could be NULL if not available
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*/
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#ifdef ATH_SUPPORT_AOW
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u_int16_t rs_rxseq; /* WLAN Sequence number */
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#endif
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#ifdef ATH_VOW_EXT_STATS
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/* Lower 16 bits holds the udp checksum offset in the data pkt */
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u_int32_t vow_extstats_offset;
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/* Higher 16 bits contains offset in the data pkt at which vow
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* ext stats are embedded
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*/
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#endif
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u_int8_t rs_isaggr;
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u_int8_t rs_isapsd;
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int16_t rs_noisefloor;
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u_int16_t rs_channel;
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#ifdef ATH_SUPPORT_TxBF
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u_int32_t rs_rpttstamp; /* txbf report time stamp*/
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#endif
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/* The following counts are meant to assist in stats calculation.
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* These variables are incremented only in specific situations, and
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* should not be relied upon for any purpose other than the original
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* stats related purpose they have been introduced for.
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*/
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u_int16_t rs_cryptodecapcount; /* Crypto bytes decapped/demic'ed. */
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u_int8_t rs_padspace; /* No. of padding bytes present after
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header in wbuf. */
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u_int8_t rs_qosdecapcount; /* QoS/HTC bytes decapped. */
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/* End of stats calculation related counts. */
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/*
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* uint8_t rs_lsig[IEEE80211_LSIG_LEN];
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* uint8_t rs_htsig[IEEE80211_HTSIG_LEN];
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* uint8_t rs_servicebytes[IEEE80211_SB_LEN];
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* uint8_t rs_fcs_error;
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*/
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/* cdp convergence monitor mode status */
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union {
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u_int8_t cdp_data[8];
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u_int64_t cdp_tsf;
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} cdp_rs_tstamp;
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uint8_t cdp_rs_pream_type;
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uint32_t cdp_rs_user_rssi;
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uint8_t cdp_rs_stbc;
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uint8_t cdp_rs_sgi;
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uint32_t cdf_rs_rate_mcs;
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uint32_t cdp_rs_reception_type;
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uint32_t cdp_rs_bw;
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uint32_t cdp_rs_nss;
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uint8_t cdp_rs_fcs_err;
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bool cdp_rs_rxdma_err;
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};
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enum {
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CDP_MON_PPDU_START = 0,
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CDP_MON_PPDU_END,
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};
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#define MAX_PPDU_ID_HIST 128
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/**
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* struct cdp_pdev_mon_stats
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* @status_ppdu_state: state on PPDU start and end
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* @status_ppdu_start: status ring PPDU start TLV count
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* @status_ppdu_end: status ring PPDU end TLV count
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* @status_ppdu_compl: status ring matching start and end count on PPDU
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* @status_ppdu_start_mis: status ring missing start TLV count on PPDU
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* @status_ppdu_end_mis: status ring missing end TLV count on PPDU
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* @status_ppdu_done: status ring PPDU done TLV count
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* @dest_ppdu_done: destination ring PPDU count
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* @dest_mpdu_done: destination ring MPDU count
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* @dup_mon_linkdesc_cnt: duplicate link descriptor indications from HW
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* @dup_mon_buf_cnt: duplicate buffer indications from HW
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* @tlv_tag_status_err: status not correct in the tlv tag
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* @status_buf_done_war: Number of status ring buffers for which DMA not done
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* WAR is applied.
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* @mon_rx_bufs_replenished_dest: Rx buffers replenish count
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* @mon_rx_bufs_reaped_dest: Rx buffer reap count
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* @ppdu_id_mismatch: counter to track ppdu id mismatch in
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* mointor status and monitor destination ring
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* @ppdu_id_match: counter to track ppdu id match in
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* mointor status and monitor destination ring
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* @status_ppdu_drop: Number of ppdu dropped from monitor status ring
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* @dest_ppdu_drop: Number of ppdu dropped from monitor destination ring
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*/
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struct cdp_pdev_mon_stats {
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#ifndef REMOVE_MON_DBG_STATS
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uint32_t status_ppdu_state;
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uint32_t status_ppdu_start;
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uint32_t status_ppdu_end;
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uint32_t status_ppdu_compl;
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uint32_t status_ppdu_start_mis;
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uint32_t status_ppdu_end_mis;
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#endif
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uint32_t status_ppdu_done;
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uint32_t dest_ppdu_done;
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uint32_t dest_mpdu_done;
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uint32_t dest_mpdu_drop;
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uint32_t dup_mon_linkdesc_cnt;
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uint32_t dup_mon_buf_cnt;
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uint32_t stat_ring_ppdu_id_hist[MAX_PPDU_ID_HIST];
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uint32_t dest_ring_ppdu_id_hist[MAX_PPDU_ID_HIST];
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uint32_t ppdu_id_hist_idx;
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uint32_t mon_rx_dest_stuck;
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uint32_t tlv_tag_status_err;
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uint32_t status_buf_done_war;
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uint32_t mon_rx_bufs_replenished_dest;
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uint32_t mon_rx_bufs_reaped_dest;
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uint32_t ppdu_id_mismatch;
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uint32_t ppdu_id_match;
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uint32_t status_ppdu_drop;
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uint32_t dest_ppdu_drop;
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};
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#endif
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