samsung-sm8650/android_kernel_samsung_sm8650-modules
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android_kernel_samsung_sm86…/asoc/codecs/wsa884x/wsa884x-regmap.c
Prasad Kumpatla 23853e3c76 asoc: wsa884x: update INTR_CLEAR0/1 register to volatile 
In PDR cases INTR_CLEAR registers values are not updating
properly while doing reg_cache in recover from PDR. So add
these registers as volatile to get the exact HW values.

When these registe values are properly updated the FSM_PA
status is reseting properly and working.

Change-Id: I8fa7b01b3256ec8f01edc3fe48a519accfff9638
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-04-28 10:46:38 +05:30

553 líneas
25 KiB
C
Original Blame Histórico

// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/regmap.h>
#include <linux/device.h>
#include "wsa884x-registers.h"
#include "wsa884x.h"
extern const u8 wsa884x_reg_access[WSA884X_NUM_REGISTERS];
static struct reg_default wsa884x_defaults[] = {
{WSA884X_BG_CTRL, 0xa5},
{WSA884X_ADC_CTRL, 0x00},
{WSA884X_BOP1_PROG, 0x22},
{WSA884X_BOP2_PROG, 0x44},
{WSA884X_UVLO_PROG, 0x99},
{WSA884X_UVLO_PROG1, 0x70},
{WSA884X_SPARE_CTRL_0, 0x00},
{WSA884X_SPARE_CTRL_1, 0x00},
{WSA884X_SPARE_CTRL_2, 0x00},
{WSA884X_SPARE_CTRL_3, 0x00},
{WSA884X_REF_CTRL, 0xd2},
{WSA884X_BG_TEST_CTL, 0x06},
{WSA884X_BG_BIAS, 0xd7},
{WSA884X_ADC_PROG, 0x08},
{WSA884X_ADC_IREF_CTL, 0x57},
{WSA884X_ADC_ISENS_CTL, 0x47},
{WSA884X_ADC_CLK_CTL, 0x87},
{WSA884X_ADC_TEST_CTL, 0x00},
{WSA884X_ADC_BIAS, 0x51},
{WSA884X_VBAT_SNS, 0xa0},
{WSA884X_DOUT_MSB, 0x00},
{WSA884X_DOUT_LSB, 0x00},
{WSA884X_BOP_ATEST_SEL, 0x00},
{WSA884X_MISC0, 0x04},
{WSA884X_MISC1, 0x75},
{WSA884X_MISC2, 0x00},
{WSA884X_MISC3, 0x10},
{WSA884X_SPARE_TSBG_0, 0x00},
{WSA884X_SPARE_TUNE_0, 0x00},
{WSA884X_SPARE_TUNE_1, 0x00},
{WSA884X_VSENSE1, 0xe7},
{WSA884X_ISENSE2, 0x27},
{WSA884X_SPARE_CTL_1, 0x00},
{WSA884X_SPARE_CTL_2, 0x00},
{WSA884X_SPARE_CTL_3, 0x00},
{WSA884X_SPARE_CTL_4, 0x00},
{WSA884X_EN, 0x10},
{WSA884X_OVERRIDE1, 0x00},
{WSA884X_OVERRIDE2, 0x08},
{WSA884X_ISENSE1, 0xd4},
{WSA884X_ISENSE_CAL, 0x00},
{WSA884X_MISC, 0x00},
{WSA884X_ADC_0, 0x00},
{WSA884X_ADC_1, 0x00},
{WSA884X_ADC_2, 0x40},
{WSA884X_ADC_3, 0x80},
{WSA884X_ADC_4, 0x25},
{WSA884X_ADC_5, 0x24},
{WSA884X_ADC_6, 0x0a},
{WSA884X_ADC_7, 0x81},
{WSA884X_STATUS, 0x00},
{WSA884X_IVSENSE_SPARE_TUNE_1, 0x00},
{WSA884X_SPARE_TUNE_2, 0x00},
{WSA884X_SPARE_TUNE_3, 0x00},
{WSA884X_SPARE_TUNE_4, 0x00},
{WSA884X_TOP_CTRL1, 0xd3},
{WSA884X_CLIP_DET_CTRL1, 0x7e},
{WSA884X_CLIP_DET_CTRL2, 0x4c},
{WSA884X_DAC_CTRL1, 0xa4},
{WSA884X_DAC_VCM_CTRL_REG1, 0x02},
{WSA884X_DAC_VCM_CTRL_REG2, 0x00},
{WSA884X_DAC_VCM_CTRL_REG3, 0x00},
{WSA884X_DAC_VCM_CTRL_REG4, 0x00},
{WSA884X_DAC_VCM_CTRL_REG5, 0x00},
{WSA884X_DAC_VCM_CTRL_REG6, 0x00},
{WSA884X_PWM_CLK_CTL, 0x20},
{WSA884X_DRV_LF_LDO_SEL, 0xaa},
{WSA884X_OCP_CTL, 0xc6},
{WSA884X_PDRV_HS_CTL, 0x52},
{WSA884X_PDRV_LS_CTL, 0x4a},
{WSA884X_SPK_TOP_SPARE_CTL_1, 0x00},
{WSA884X_SPK_TOP_SPARE_CTL_2, 0x00},
{WSA884X_SPK_TOP_SPARE_CTL_3, 0x00},
{WSA884X_SPK_TOP_SPARE_CTL_4, 0x00},
{WSA884X_SPARE_CTL_5, 0x00},
{WSA884X_DAC_EN_DEBUG_REG, 0x00},
{WSA884X_DAC_OPAMP_BIAS1_REG, 0x48},
{WSA884X_DAC_OPAMP_BIAS2_REG, 0x48},
{WSA884X_DAC_TUNE1, 0x02},
{WSA884X_DAC_VOLTAGE_CTRL_REG, 0x05},
{WSA884X_ATEST1_REG, 0x00},
{WSA884X_ATEST2_REG, 0x00},
{WSA884X_TOP_BIAS_REG1, 0x6a},
{WSA884X_TOP_BIAS_REG2, 0x65},
{WSA884X_TOP_BIAS_REG3, 0x55},
{WSA884X_TOP_BIAS_REG4, 0xa9},
{WSA884X_PWRSTG_DBG2, 0x21},
{WSA884X_DRV_LF_BLK_EN, 0x0f},
{WSA884X_DRV_LF_EN, 0x0a},
{WSA884X_DRV_LF_MASK_DCC_CTL, 0x08},
{WSA884X_DRV_LF_MISC_CTL1, 0x30},
{WSA884X_DRV_LF_REG_GAIN, 0x00},
{WSA884X_DRV_OS_CAL_CTL, 0x00},
{WSA884X_DRV_OS_CAL_CTL1, 0x90},
{WSA884X_PWRSTG_DBG, 0x08},
{WSA884X_BBM_CTL, 0x92},
{WSA884X_TOP_MISC1, 0x00},
{WSA884X_DAC_VCM_CTRL_REG7, 0x00},
{WSA884X_TOP_BIAS_REG5, 0x15},
{WSA884X_DRV_LF_MISC_CTL2, 0x00},
{WSA884X_SPK_TOP_SPARE_TUNE_2, 0x00},
{WSA884X_SPK_TOP_SPARE_TUNE_3, 0x00},
{WSA884X_SPK_TOP_SPARE_TUNE_4, 0x00},
{WSA884X_SPARE_TUNE_5, 0x00},
{WSA884X_SPARE_TUNE_6, 0x00},
{WSA884X_SPARE_TUNE_7, 0x00},
{WSA884X_SPARE_TUNE_8, 0x00},
{WSA884X_SPARE_TUNE_9, 0x00},
{WSA884X_SPARE_TUNE_10, 0x00},
{WSA884X_PA_STATUS0, 0x00},
{WSA884X_PA_STATUS1, 0x00},
{WSA884X_PA_STATUS2, 0x00},
{WSA884X_PA_STATUS3, 0x00},
{WSA884X_PA_STATUS4, 0x00},
{WSA884X_PA_STATUS5, 0x00},
{WSA884X_SPARE_RO_1, 0x00},
{WSA884X_SPARE_RO_2, 0x00},
{WSA884X_SPARE_RO_3, 0x00},
{WSA884X_STB_CTRL1, 0x42},
{WSA884X_CURRENT_LIMIT, 0x54},
{WSA884X_BYP_CTRL1, 0x01},
{WSA884X_SPARE_CTL_0, 0x00},
{WSA884X_BOOST_SPARE_CTL_1, 0x00},
{WSA884X_SPARE_RO_0, 0x00},
{WSA884X_BOOST_SPARE_RO_1, 0x00},
{WSA884X_IBIAS1, 0x00},
{WSA884X_IBIAS2, 0x00},
{WSA884X_IBIAS3, 0x00},
{WSA884X_EN_CTRL, 0x42},
{WSA884X_STB_CTRL2, 0x03},
{WSA884X_STB_CTRL3, 0x3c},
{WSA884X_STB_CTRL4, 0x30},
{WSA884X_BYP_CTRL2, 0x97},
{WSA884X_BYP_CTRL3, 0x11},
{WSA884X_ZX_CTRL1, 0xf0},
{WSA884X_ZX_CTRL2, 0x04},
{WSA884X_BLEEDER_CTRL, 0x04},
{WSA884X_BOOST_MISC, 0x62},
{WSA884X_PWRSTAGE_CTRL1, 0x00},
{WSA884X_PWRSTAGE_CTRL2, 0x31},
{WSA884X_PWRSTAGE_CTRL3, 0x81},
{WSA884X_PWRSTAGE_CTRL4, 0x5f},
{WSA884X_MAXD_REG1, 0x00},
{WSA884X_MAXD_REG2, 0x5b},
{WSA884X_ILIM_CTRL1, 0xe2},
{WSA884X_ILIM_CTRL2, 0x90},
{WSA884X_TEST_CTRL1, 0x00},
{WSA884X_TEST_CTRL2, 0x00},
{WSA884X_SPARE1, 0x00},
{WSA884X_BOOT_CAP_CHECK, 0x01},
{WSA884X_PON_CTL_0, 0x12},
{WSA884X_PWRSAV_CTL, 0xaa},
{WSA884X_PON_LDOL_SPARE_CTL_0, 0x00},
{WSA884X_PON_LDOL_SPARE_CTL_1, 0x00},
{WSA884X_PON_LDOL_SPARE_CTL_2, 0x00},
{WSA884X_PON_LDOL_SPARE_CTL_3, 0x00},
{WSA884X_PON_CLT_1, 0xe1},
{WSA884X_PON_CTL_2, 0x00},
{WSA884X_PON_CTL_3, 0x70},
{WSA884X_CKWD_CTL_0, 0x14},
{WSA884X_CKWD_CTL_1, 0x3b},
{WSA884X_CKWD_CTL_2, 0x00},
{WSA884X_CKSK_CTL_0, 0x00},
{WSA884X_PADSW_CTL_0, 0x00},
{WSA884X_TEST_0, 0x00},
{WSA884X_TEST_1, 0x00},
{WSA884X_STATUS_0, 0x00},
{WSA884X_STATUS_1, 0x00},
{WSA884X_PON_LDOL_SPARE_TUNE_0, 0x00},
{WSA884X_PON_LDOL_SPARE_TUNE_1, 0x00},
{WSA884X_PON_LDOL_SPARE_TUNE_2, 0x00},
{WSA884X_PON_LDOL_SPARE_TUNE_3, 0x00},
{WSA884X_PON_LDOL_SPARE_TUNE_4, 0x00},
{WSA884X_DIG_CTRL0_PAGE, 0x00},
{WSA884X_CHIP_ID0, 0x00},
{WSA884X_CHIP_ID1, 0x00},
{WSA884X_CHIP_ID2, 0x04},
{WSA884X_CHIP_ID3, 0x02},
{WSA884X_BUS_ID, 0x00},
{WSA884X_CDC_RST_CTL, 0x01},
{WSA884X_SWR_RESET_EN, 0x00},
{WSA884X_TOP_CLK_CFG, 0x00},
{WSA884X_SWR_CLK_RATE, 0x00},
{WSA884X_CDC_PATH_MODE, 0x00},
{WSA884X_CDC_CLK_CTL, 0x1f},
{WSA884X_PA_FSM_EN, 0x00},
{WSA884X_PA_FSM_CTL0, 0x00},
{WSA884X_PA_FSM_CTL1, 0xfe},
{WSA884X_PA_FSM_TIMER0, 0x80},
{WSA884X_PA_FSM_TIMER1, 0x80},
{WSA884X_PA_FSM_STA0, 0x00},
{WSA884X_PA_FSM_STA1, 0x00},
{WSA884X_PA_FSM_ERR_CTL, 0x00},
{WSA884X_PA_FSM_ERR_COND0, 0x00},
{WSA884X_PA_FSM_ERR_COND1, 0x00},
{WSA884X_PA_FSM_MSK0, 0x00},
{WSA884X_PA_FSM_MSK1, 0x00},
{WSA884X_PA_FSM_BYP_CTL, 0x00},
{WSA884X_PA_FSM_BYP0, 0x00},
{WSA884X_PA_FSM_BYP1, 0x00},
{WSA884X_TADC_VALUE_CTL, 0x03},
{WSA884X_TEMP_DETECT_CTL, 0x01},
{WSA884X_TEMP_DIN_MSB, 0x00},
{WSA884X_TEMP_DIN_LSB, 0x00},
{WSA884X_TEMP_DOUT_MSB, 0x00},
{WSA884X_TEMP_DOUT_LSB, 0x00},
{WSA884X_TEMP_CONFIG0, 0x00},
{WSA884X_TEMP_CONFIG1, 0x00},
{WSA884X_VBAT_THRM_FLT_CTL, 0x7f},
{WSA884X_VBAT_CAL_CTL, 0x01},
{WSA884X_VBAT_DIN_MSB, 0x00},
{WSA884X_VBAT_DIN_LSB, 0x00},
{WSA884X_VBAT_DOUT_MSB, 0x00},
{WSA884X_VBAT_DOUT_LSB, 0x00},
{WSA884X_VBAT_CAL_MSB, 0x00},
{WSA884X_VBAT_CAL_LSB, 0x00},
{WSA884X_UVLO_DEGLITCH_CTL, 0x05},
{WSA884X_BOP_DEGLITCH_CTL, 0x05},
{WSA884X_VBAT_ZONE_DETC_CTL, 0x31},
{WSA884X_CPS_CTL, 0x00},
{WSA884X_CDC_RX_CTL, 0xfe},
{WSA884X_CDC_SPK_DSM_A1_0, 0x00},
{WSA884X_CDC_SPK_DSM_A1_1, 0x01},
{WSA884X_CDC_SPK_DSM_A2_0, 0x96},
{WSA884X_CDC_SPK_DSM_A2_1, 0x09},
{WSA884X_CDC_SPK_DSM_A3_0, 0xab},
{WSA884X_CDC_SPK_DSM_A3_1, 0x05},
{WSA884X_CDC_SPK_DSM_A4_0, 0x1c},
{WSA884X_CDC_SPK_DSM_A4_1, 0x02},
{WSA884X_CDC_SPK_DSM_A5_0, 0x17},
{WSA884X_CDC_SPK_DSM_A5_1, 0x02},
{WSA884X_CDC_SPK_DSM_A6_0, 0xaa},
{WSA884X_CDC_SPK_DSM_A7_0, 0xe3},
{WSA884X_CDC_SPK_DSM_C_0, 0x69},
{WSA884X_CDC_SPK_DSM_C_1, 0x54},
{WSA884X_CDC_SPK_DSM_C_2, 0x02},
{WSA884X_CDC_SPK_DSM_C_3, 0x15},
{WSA884X_CDC_SPK_DSM_R1, 0xa4},
{WSA884X_CDC_SPK_DSM_R2, 0xb5},
{WSA884X_CDC_SPK_DSM_R3, 0x86},
{WSA884X_CDC_SPK_DSM_R4, 0x85},
{WSA884X_CDC_SPK_DSM_R5, 0xaa},
{WSA884X_CDC_SPK_DSM_R6, 0xe2},
{WSA884X_CDC_SPK_DSM_R7, 0x62},
{WSA884X_CDC_SPK_GAIN_PDM_0, 0x00},
{WSA884X_CDC_SPK_GAIN_PDM_1, 0xfc},
{WSA884X_CDC_SPK_GAIN_PDM_2, 0x05},
{WSA884X_PDM_WD_CTL, 0x00},
{WSA884X_DEM_BYPASS_DATA0, 0x00},
{WSA884X_DEM_BYPASS_DATA1, 0x00},
{WSA884X_DEM_BYPASS_DATA2, 0x00},
{WSA884X_DEM_BYPASS_DATA3, 0x00},
{WSA884X_DRE_CTL_0, 0x70},
{WSA884X_DRE_CTL_1, 0x04},
{WSA884X_DRE_IDLE_DET_CTL, 0x2f},
{WSA884X_GAIN_RAMPING_CTL, 0x50},
{WSA884X_GAIN_RAMPING_MIN, 0x12},
{WSA884X_TAGC_CTL, 0x15},
{WSA884X_TAGC_TIME, 0xbc},
{WSA884X_TAGC_FORCE_VAL, 0x00},
{WSA884X_VAGC_CTL, 0x01},
{WSA884X_VAGC_TIME, 0x0f},
{WSA884X_VAGC_ATTN_LVL_1, 0x03},
{WSA884X_VAGC_ATTN_LVL_2, 0x06},
{WSA884X_VAGC_ATTN_LVL_3, 0x09},
{WSA884X_CLSH_CTL_0, 0x37},
{WSA884X_CLSH_CTL_1, 0x81},
{WSA884X_CLSH_V_HD_PA, 0x0c},
{WSA884X_CLSH_V_PA_MIN, 0x00},
{WSA884X_CLSH_OVRD_VAL, 0x00},
{WSA884X_CLSH_HARD_MAX, 0xff},
{WSA884X_CLSH_SOFT_MAX, 0xf5},
{WSA884X_CLSH_SIG_DP, 0x00},
{WSA884X_PBR_DELAY_CTL, 0x07},
{WSA884X_CLSH_SRL_MAX_PBR, 0x02},
{WSA884X_CLSH_VTH1, 0x00},
{WSA884X_CLSH_VTH2, 0x00},
{WSA884X_CLSH_VTH3, 0x00},
{WSA884X_CLSH_VTH4, 0x00},
{WSA884X_CLSH_VTH5, 0x00},
{WSA884X_CLSH_VTH6, 0x00},
{WSA884X_CLSH_VTH7, 0x00},
{WSA884X_CLSH_VTH8, 0x00},
{WSA884X_CLSH_VTH9, 0x00},
{WSA884X_CLSH_VTH10, 0x00},
{WSA884X_CLSH_VTH11, 0x00},
{WSA884X_CLSH_VTH12, 0x00},
{WSA884X_CLSH_VTH13, 0x00},
{WSA884X_CLSH_VTH14, 0x00},
{WSA884X_CLSH_VTH15, 0x00},
{WSA884X_DIG_CTRL1_PAGE, 0x00},
{WSA884X_VPHX_SYS_EN_STATUS, 0x00},
{WSA884X_ANA_WO_CTL_0, 0xe9},
{WSA884X_ANA_WO_CTL_1, 0x00},
{WSA884X_PIN_CTL, 0x04},
{WSA884X_PIN_CTL_OE, 0x00},
{WSA884X_PIN_WDATA_IOPAD, 0x00},
{WSA884X_PIN_STATUS, 0x00},
{WSA884X_I2C_SLAVE_CTL, 0x00},
{WSA884X_SPMI_PAD_CTL0, 0x2f},
{WSA884X_SPMI_PAD_CTL1, 0x2f},
{WSA884X_SPMI_PAD_CTL2, 0x2f},
{WSA884X_MEM_CTL, 0x00},
{WSA884X_SWR_HM_TEST0, 0x08},
{WSA884X_SWR_HM_TEST1, 0x00},
{WSA884X_OTP_CTRL0, 0x00},
{WSA884X_OTP_CTRL1, 0x00},
{WSA884X_OTP_CTRL2, 0x00},
{WSA884X_OTP_STAT, 0x00},
{WSA884X_OTP_PRG_TCSP0, 0x77},
{WSA884X_OTP_PRG_TCSP1, 0x00},
{WSA884X_OTP_PRG_TPPS, 0x47},
{WSA884X_OTP_PRG_TVPS, 0x3b},
{WSA884X_OTP_PRG_TVPH, 0x47},
{WSA884X_OTP_PRG_TPPR0, 0x47},
{WSA884X_OTP_PRG_TPPR1, 0x00},
{WSA884X_OTP_PRG_TPPH, 0x47},
{WSA884X_OTP_PRG_END, 0x47},
{WSA884X_WAVG_PLAY, 0x00},
{WSA884X_WAVG_CTL, 0x06},
{WSA884X_WAVG_LRA_PER_0, 0xd1},
{WSA884X_WAVG_LRA_PER_1, 0x00},
{WSA884X_WAVG_DELTA_THETA_0, 0xe6},
{WSA884X_WAVG_DELTA_THETA_1, 0x04},
{WSA884X_WAVG_DIRECT_AMP_0, 0x50},
{WSA884X_WAVG_DIRECT_AMP_1, 0x00},
{WSA884X_WAVG_PTRN_AMP0_0, 0x50},
{WSA884X_WAVG_PTRN_AMP0_1, 0x00},
{WSA884X_WAVG_PTRN_AMP1_0, 0x50},
{WSA884X_WAVG_PTRN_AMP1_1, 0x00},
{WSA884X_WAVG_PTRN_AMP2_0, 0x50},
{WSA884X_WAVG_PTRN_AMP2_1, 0x00},
{WSA884X_WAVG_PTRN_AMP3_0, 0x50},
{WSA884X_WAVG_PTRN_AMP3_1, 0x00},
{WSA884X_WAVG_PTRN_AMP4_0, 0x50},
{WSA884X_WAVG_PTRN_AMP4_1, 0x00},
{WSA884X_WAVG_PTRN_AMP5_0, 0x50},
{WSA884X_WAVG_PTRN_AMP5_1, 0x00},
{WSA884X_WAVG_PTRN_AMP6_0, 0x50},
{WSA884X_WAVG_PTRN_AMP6_1, 0x00},
{WSA884X_WAVG_PTRN_AMP7_0, 0x50},
{WSA884X_WAVG_PTRN_AMP7_1, 0x00},
{WSA884X_WAVG_PER_0_1, 0x88},
{WSA884X_WAVG_PER_2_3, 0x88},
{WSA884X_WAVG_PER_4_5, 0x88},
{WSA884X_WAVG_PER_6_7, 0x88},
{WSA884X_WAVG_STA, 0x00},
{WSA884X_INTR_MODE, 0x00},
{WSA884X_INTR_MASK0, 0x90},
{WSA884X_INTR_MASK1, 0x00},
{WSA884X_INTR_STATUS0, 0x00},
{WSA884X_INTR_STATUS1, 0x00},
{WSA884X_INTR_CLEAR0, 0x00},
{WSA884X_INTR_CLEAR1, 0x00},
{WSA884X_INTR_LEVEL0, 0x04},
{WSA884X_INTR_LEVEL1, 0x00},
{WSA884X_INTR_SET0, 0x00},
{WSA884X_INTR_SET1, 0x00},
{WSA884X_INTR_TEST0, 0x00},
{WSA884X_INTR_TEST1, 0x00},
{WSA884X_PDM_TEST_MODE, 0x00},
{WSA884X_ATE_TEST_MODE, 0x00},
{WSA884X_PA_FSM_DBG, 0x00},
{WSA884X_DIG_DEBUG_MODE, 0x00},
{WSA884X_DIG_DEBUG_SEL, 0x00},
{WSA884X_DIG_DEBUG_EN, 0x00},
{WSA884X_TADC_DETECT_DBG_CTL, 0x00},
{WSA884X_TADC_DEBUG_MSB, 0x00},
{WSA884X_TADC_DEBUG_LSB, 0x00},
{WSA884X_SAMPLE_EDGE_SEL, 0x7f},
{WSA884X_SWR_EDGE_SEL, 0x00},
{WSA884X_TEST_MODE_CTL, 0x05},
{WSA884X_IOPAD_CTL, 0x00},
{WSA884X_ANA_CSR_DBG_ADD, 0x00},
{WSA884X_ANA_CSR_DBG_CTL, 0x12},
{WSA884X_CLK_DBG_CTL, 0x00},
{WSA884X_SPARE_R, 0x00},
{WSA884X_SPARE_0, 0x00},
{WSA884X_SPARE_1, 0x00},
{WSA884X_SPARE_2, 0x00},
{WSA884X_SCODE, 0x00},
{WSA884X_DIG_TRIM_PAGE, 0x00},
{WSA884X_OTP_REG_0, 0x05},
{WSA884X_OTP_REG_1, 0x49},
{WSA884X_OTP_REG_2, 0x80},
{WSA884X_OTP_REG_3, 0xc9},
{WSA884X_OTP_REG_4, 0x40},
{WSA884X_OTP_REG_5, 0xff},
{WSA884X_OTP_REG_6, 0xff},
{WSA884X_OTP_REG_7, 0xff},
{WSA884X_OTP_REG_8, 0xff},
{WSA884X_OTP_REG_9, 0xff},
{WSA884X_OTP_REG_10, 0xff},
{WSA884X_OTP_REG_11, 0xff},
{WSA884X_OTP_REG_12, 0xff},
{WSA884X_OTP_REG_13, 0xff},
{WSA884X_OTP_REG_14, 0xff},
{WSA884X_OTP_REG_15, 0xff},
{WSA884X_OTP_REG_16, 0xff},
{WSA884X_OTP_REG_17, 0xff},
{WSA884X_OTP_REG_18, 0xff},
{WSA884X_OTP_REG_19, 0xff},
{WSA884X_OTP_REG_20, 0xff},
{WSA884X_OTP_REG_21, 0xff},
{WSA884X_OTP_REG_22, 0xff},
{WSA884X_OTP_REG_23, 0xff},
{WSA884X_OTP_REG_24, 0x00},
{WSA884X_OTP_REG_25, 0x22},
{WSA884X_OTP_REG_26, 0x03},
{WSA884X_OTP_REG_27, 0x00},
{WSA884X_OTP_REG_28, 0x00},
{WSA884X_OTP_REG_29, 0x00},
{WSA884X_OTP_REG_30, 0x00},
{WSA884X_OTP_REG_31, 0x8f},
{WSA884X_OTP_REG_32, 0x00},
{WSA884X_OTP_REG_33, 0xff},
{WSA884X_OTP_REG_34, 0x0f},
{WSA884X_OTP_REG_35, 0x12},
{WSA884X_OTP_REG_36, 0x08},
{WSA884X_OTP_REG_37, 0x1f},
{WSA884X_OTP_REG_38, 0x0b},
{WSA884X_OTP_REG_39, 0x00},
{WSA884X_OTP_REG_40, 0x00},
{WSA884X_OTP_REG_41, 0x00},
{WSA884X_OTP_REG_63, 0x40},
{WSA884X_EMEM_0, 0x00},
{WSA884X_EMEM_1, 0x00},
{WSA884X_EMEM_2, 0x00},
{WSA884X_EMEM_3, 0x00},
{WSA884X_EMEM_4, 0x00},
{WSA884X_EMEM_5, 0x00},
{WSA884X_EMEM_6, 0x00},
{WSA884X_EMEM_7, 0x00},
{WSA884X_EMEM_8, 0x00},
{WSA884X_EMEM_9, 0x00},
{WSA884X_EMEM_10, 0x00},
{WSA884X_EMEM_11, 0x00},
{WSA884X_EMEM_12, 0x00},
{WSA884X_EMEM_13, 0x00},
{WSA884X_EMEM_14, 0x00},
{WSA884X_EMEM_15, 0x00},
{WSA884X_EMEM_16, 0x00},
{WSA884X_EMEM_17, 0x00},
{WSA884X_EMEM_18, 0x00},
{WSA884X_EMEM_19, 0x00},
{WSA884X_EMEM_20, 0x00},
{WSA884X_EMEM_21, 0x00},
{WSA884X_EMEM_22, 0x00},
{WSA884X_EMEM_23, 0x00},
{WSA884X_EMEM_24, 0x00},
{WSA884X_EMEM_25, 0x00},
{WSA884X_EMEM_26, 0x00},
{WSA884X_EMEM_27, 0x00},
{WSA884X_EMEM_28, 0x00},
{WSA884X_EMEM_29, 0x00},
{WSA884X_EMEM_30, 0x00},
{WSA884X_EMEM_31, 0x00},
{WSA884X_EMEM_32, 0x00},
{WSA884X_EMEM_33, 0x00},
{WSA884X_EMEM_34, 0x00},
{WSA884X_EMEM_35, 0x00},
{WSA884X_EMEM_36, 0x00},
{WSA884X_EMEM_37, 0x00},
{WSA884X_EMEM_38, 0x00},
{WSA884X_EMEM_39, 0x00},
{WSA884X_EMEM_40, 0x00},
{WSA884X_EMEM_41, 0x00},
{WSA884X_EMEM_42, 0x00},
{WSA884X_EMEM_43, 0x00},
{WSA884X_EMEM_44, 0x00},
{WSA884X_EMEM_45, 0x00},
{WSA884X_EMEM_46, 0x00},
{WSA884X_EMEM_47, 0x00},
{WSA884X_EMEM_48, 0x00},
{WSA884X_EMEM_49, 0x00},
{WSA884X_EMEM_50, 0x00},
{WSA884X_EMEM_51, 0x00},
{WSA884X_EMEM_52, 0x00},
{WSA884X_EMEM_53, 0x00},
{WSA884X_EMEM_54, 0x00},
{WSA884X_EMEM_55, 0x00},
{WSA884X_EMEM_56, 0x00},
{WSA884X_EMEM_57, 0x00},
{WSA884X_EMEM_58, 0x00},
{WSA884X_EMEM_59, 0x00},
{WSA884X_EMEM_60, 0x00},
{WSA884X_EMEM_61, 0x00},
{WSA884X_EMEM_62, 0x00},
{WSA884X_EMEM_63, 0x00},
};
static bool wsa884x_readable_register(struct device *dev, unsigned int reg)
{
if (reg <= WSA884X_BASE)
return 0;
return wsa884x_reg_access[WSA884X_REG(reg)] & RD_REG;
}
static bool wsa884x_writeable_register(struct device *dev, unsigned int reg)
{
if (reg <= WSA884X_BASE)
return 0;
return wsa884x_reg_access[WSA884X_REG(reg)] & WR_REG;
}
static bool wsa884x_volatile_register(struct device *dev, unsigned int reg)
{
if (reg <= WSA884X_BASE)
return 0;
if (reg == WSA884X_ANA_WO_CTL_0 || reg == WSA884X_ANA_WO_CTL_1)
return 1;
if (reg == WSA884X_INTR_CLEAR0 || reg == WSA884X_INTR_CLEAR1)
return 1;
return ((wsa884x_reg_access[WSA884X_REG(reg)] & RD_REG) &&
!(wsa884x_reg_access[WSA884X_REG(reg)] & WR_REG));
}
struct regmap_config wsa884x_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
.reg_defaults = wsa884x_defaults,
.num_reg_defaults = ARRAY_SIZE(wsa884x_defaults),
.max_register = WSA884X_MAX_REGISTER,
.volatile_reg = wsa884x_volatile_register,
.readable_reg = wsa884x_readable_register,
.writeable_reg = wsa884x_writeable_register,
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
.val_format_endian = REGMAP_ENDIAN_NATIVE,
.can_multi_write = true,
.use_single_read = true,
};
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