sde_plane.c 138 KB

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  1. /*
  2. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. * Copyright (C) 2014-2021 The Linux Foundation. All rights reserved.
  4. * Copyright (C) 2013 Red Hat
  5. * Author: Rob Clark <[email protected]>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
  20. #include <linux/debugfs.h>
  21. #include <linux/dma-buf.h>
  22. #include <drm/sde_drm.h>
  23. #include <drm/msm_drm_pp.h>
  24. #include <linux/version.h>
  25. #include "msm_prop.h"
  26. #include "msm_drv.h"
  27. #include "sde_kms.h"
  28. #include "sde_fence.h"
  29. #include "sde_formats.h"
  30. #include "sde_hw_sspp.h"
  31. #include "sde_hw_catalog_format.h"
  32. #include "sde_trace.h"
  33. #include "sde_crtc.h"
  34. #include "sde_vbif.h"
  35. #include "sde_plane.h"
  36. #include "sde_color_processing.h"
  37. #define SDE_DEBUG_PLANE(pl, fmt, ...) SDE_DEBUG("plane%d " fmt,\
  38. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  39. #define SDE_ERROR_PLANE(pl, fmt, ...) SDE_ERROR("plane%d " fmt,\
  40. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  41. #define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
  42. #define PHASE_STEP_SHIFT 21
  43. #define PHASE_STEP_UNIT_SCALE ((int) (1 << PHASE_STEP_SHIFT))
  44. #define PHASE_RESIDUAL 15
  45. #define SHARP_STRENGTH_DEFAULT 32
  46. #define SHARP_EDGE_THR_DEFAULT 112
  47. #define SHARP_SMOOTH_THR_DEFAULT 8
  48. #define SHARP_NOISE_THR_DEFAULT 2
  49. #define SDE_NAME_SIZE 12
  50. #define SDE_PLANE_COLOR_FILL_FLAG BIT(31)
  51. #define TIME_MULTIPLEX_RECT(r0, r1, buffer_lines) \
  52. ((r0).y >= ((r1).y + (r1).h + buffer_lines))
  53. #define SDE_QSEED_DEFAULT_DYN_EXP 0x0
  54. /**
  55. * enum sde_plane_qos - Different qos configurations for each pipe
  56. *
  57. * @SDE_PLANE_QOS_VBLANK_CTRL: Setup VBLANK qos for the pipe.
  58. * @SDE_PLANE_QOS_VBLANK_AMORTIZE: Enables Amortization within pipe.
  59. * this configuration is mutually exclusive from VBLANK_CTRL.
  60. * @SDE_PLANE_QOS_PANIC_CTRL: Setup panic for the pipe.
  61. */
  62. enum sde_plane_qos {
  63. SDE_PLANE_QOS_VBLANK_CTRL = BIT(0),
  64. SDE_PLANE_QOS_VBLANK_AMORTIZE = BIT(1),
  65. SDE_PLANE_QOS_PANIC_CTRL = BIT(2),
  66. };
  67. /*
  68. * struct sde_plane - local sde plane structure
  69. * @aspace: address space pointer
  70. * @csc_cfg: Decoded user configuration for csc
  71. * @csc_usr_ptr: Points to csc_cfg if valid user config available
  72. * @csc_ptr: Points to sde_csc_cfg structure to use for current
  73. * @mplane_list: List of multirect planes of the same pipe
  74. * @catalog: Points to sde catalog structure
  75. * @revalidate: force revalidation of all the plane properties
  76. * @xin_halt_forced_clk: whether or not clocks were forced on for xin halt
  77. * @blob_rot_caps: Pointer to rotator capability blob
  78. */
  79. struct sde_plane {
  80. struct drm_plane base;
  81. struct mutex lock;
  82. enum sde_sspp pipe;
  83. uint64_t features; /* capabilities from catalog */
  84. uint32_t perf_features; /* perf capabilities from catalog */
  85. uint32_t nformats;
  86. uint32_t formats[64];
  87. struct sde_hw_pipe *pipe_hw;
  88. struct sde_hw_pipe_cfg pipe_cfg;
  89. struct sde_hw_sharp_cfg sharp_cfg;
  90. struct sde_hw_pipe_qos_cfg pipe_qos_cfg;
  91. uint32_t color_fill;
  92. bool is_error;
  93. bool is_rt_pipe;
  94. bool is_virtual;
  95. struct list_head mplane_list;
  96. struct sde_mdss_cfg *catalog;
  97. bool revalidate;
  98. bool xin_halt_forced_clk;
  99. struct sde_csc_cfg csc_cfg;
  100. struct sde_csc_cfg *csc_usr_ptr;
  101. struct sde_csc_cfg *csc_ptr;
  102. struct sde_hw_scaler3_cfg scaler3_cfg;
  103. struct sde_hw_pixel_ext pixel_ext;
  104. const struct sde_sspp_sub_blks *pipe_sblk;
  105. char pipe_name[SDE_NAME_SIZE];
  106. struct msm_property_info property_info;
  107. struct msm_property_data property_data[PLANE_PROP_COUNT];
  108. struct drm_property_blob *blob_info;
  109. struct drm_property_blob *blob_rot_caps;
  110. /* debugfs related stuff */
  111. struct dentry *debugfs_root;
  112. bool debugfs_default_scale;
  113. };
  114. #define to_sde_plane(x) container_of(x, struct sde_plane, base)
  115. static int plane_prop_array[PLANE_PROP_COUNT] = {SDE_PLANE_DIRTY_ALL};
  116. static struct sde_kms *_sde_plane_get_kms(struct drm_plane *plane)
  117. {
  118. struct msm_drm_private *priv;
  119. if (!plane || !plane->dev)
  120. return NULL;
  121. priv = plane->dev->dev_private;
  122. if (!priv)
  123. return NULL;
  124. return to_sde_kms(priv->kms);
  125. }
  126. static struct sde_hw_ctl *_sde_plane_get_hw_ctl(const struct drm_plane *plane)
  127. {
  128. struct drm_plane_state *pstate = NULL;
  129. struct drm_crtc *drm_crtc = NULL;
  130. struct sde_crtc *sde_crtc = NULL;
  131. struct sde_crtc_mixer *mixer = NULL;
  132. struct sde_hw_ctl *ctl = NULL;
  133. if (!plane) {
  134. DRM_ERROR("Invalid plane %pK\n", plane);
  135. return NULL;
  136. }
  137. pstate = plane->state;
  138. if (!pstate) {
  139. DRM_ERROR("Invalid plane state %pK\n", pstate);
  140. return NULL;
  141. }
  142. drm_crtc = pstate->crtc;
  143. if (!drm_crtc) {
  144. DRM_ERROR("Invalid drm_crtc %pK\n", drm_crtc);
  145. return NULL;
  146. }
  147. sde_crtc = to_sde_crtc(drm_crtc);
  148. if (!sde_crtc) {
  149. DRM_ERROR("invalid sde_crtc %pK\n", sde_crtc);
  150. return NULL;
  151. }
  152. /* it will always return the first mixer and single CTL */
  153. mixer = sde_crtc->mixers;
  154. if (!mixer) {
  155. DRM_ERROR("invalid mixer %pK\n", mixer);
  156. return NULL;
  157. }
  158. ctl = mixer->hw_ctl;
  159. if (!mixer) {
  160. DRM_ERROR("invalid ctl %pK\n", ctl);
  161. return NULL;
  162. }
  163. return ctl;
  164. }
  165. static bool sde_plane_enabled(const struct drm_plane_state *state)
  166. {
  167. return state && state->fb && state->crtc;
  168. }
  169. bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane)
  170. {
  171. struct sde_plane *psde;
  172. if (!plane)
  173. return false;
  174. psde = to_sde_plane(plane);
  175. return !(psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI));
  176. }
  177. void sde_plane_setup_src_split_order(struct drm_plane *plane,
  178. enum sde_sspp_multirect_index rect_mode, bool enable)
  179. {
  180. struct sde_plane *psde;
  181. if (!plane)
  182. return;
  183. psde = to_sde_plane(plane);
  184. if (psde->pipe_hw->ops.set_src_split_order)
  185. psde->pipe_hw->ops.set_src_split_order(psde->pipe_hw,
  186. rect_mode, enable);
  187. }
  188. void sde_plane_set_sid(struct drm_plane *plane, u32 vm)
  189. {
  190. struct sde_plane *psde;
  191. struct sde_kms *sde_kms;
  192. struct msm_drm_private *priv;
  193. if (!plane || !plane->dev) {
  194. SDE_ERROR("invalid plane\n");
  195. return;
  196. }
  197. priv = plane->dev->dev_private;
  198. if (!priv || !priv->kms) {
  199. SDE_ERROR("invalid KMS reference\n");
  200. return;
  201. }
  202. sde_kms = to_sde_kms(priv->kms);
  203. psde = to_sde_plane(plane);
  204. sde_hw_set_sspp_sid(sde_kms->hw_sid, psde->pipe, vm);
  205. }
  206. static void _sde_plane_set_qos_lut(struct drm_plane *plane,
  207. struct drm_crtc *crtc,
  208. struct drm_framebuffer *fb)
  209. {
  210. struct sde_plane *psde;
  211. const struct sde_format *fmt = NULL;
  212. u32 frame_rate, qos_count, fps_index = 0, lut_index, creq_lut_index, ds_lut_index;
  213. struct sde_perf_cfg *perf;
  214. struct sde_plane_state *pstate;
  215. bool inline_rot = false, landscape = false;
  216. struct drm_display_mode *mode;
  217. if (!plane || !fb) {
  218. SDE_ERROR("invalid arguments\n");
  219. return;
  220. }
  221. psde = to_sde_plane(plane);
  222. pstate = to_sde_plane_state(plane->state);
  223. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  224. SDE_ERROR("invalid arguments\n");
  225. return;
  226. } else if (!psde->pipe_hw->ops.setup_qos_lut) {
  227. return;
  228. }
  229. mode = &crtc->state->adjusted_mode;
  230. landscape = mode->hdisplay > mode->vdisplay ? true : false;
  231. frame_rate = drm_mode_vrefresh(&crtc->mode);
  232. perf = &psde->catalog->perf;
  233. qos_count = perf->qos_refresh_count;
  234. while ((fps_index < qos_count) && perf->qos_refresh_rate) {
  235. if ((frame_rate <= perf->qos_refresh_rate[fps_index]) ||
  236. (fps_index == qos_count - 1))
  237. break;
  238. fps_index++;
  239. }
  240. if (psde->is_rt_pipe) {
  241. fmt = sde_get_sde_format_ext(fb->format->format, fb->modifier);
  242. inline_rot = (pstate->rotation & DRM_MODE_ROTATE_90);
  243. if (inline_rot && SDE_IS_IN_ROT_RESTRICTED_FMT(psde->catalog, fmt))
  244. lut_index = SDE_QOS_LUT_USAGE_INLINE_RESTRICTED_FMTS;
  245. else if (inline_rot)
  246. lut_index = SDE_QOS_LUT_USAGE_INLINE;
  247. else if (fmt && SDE_FORMAT_IS_LINEAR(fmt))
  248. lut_index = SDE_QOS_LUT_USAGE_LINEAR;
  249. else
  250. lut_index = SDE_QOS_LUT_USAGE_MACROTILE;
  251. } else {
  252. lut_index = SDE_QOS_LUT_USAGE_NRT;
  253. }
  254. creq_lut_index = lut_index * SDE_CREQ_LUT_TYPE_MAX;
  255. if (psde->scaler3_cfg.enable)
  256. creq_lut_index += SDE_CREQ_LUT_TYPE_QSEED;
  257. creq_lut_index += (fps_index * SDE_QOS_LUT_USAGE_MAX * SDE_CREQ_LUT_TYPE_MAX);
  258. psde->pipe_qos_cfg.creq_lut = perf->creq_lut[creq_lut_index];
  259. ds_lut_index = lut_index * SDE_DANGER_SAFE_LUT_TYPE_MAX;
  260. if (landscape)
  261. ds_lut_index += SDE_DANGER_SAFE_LUT_TYPE_LANDSCAPE;
  262. ds_lut_index += (fps_index * SDE_QOS_LUT_USAGE_MAX * SDE_DANGER_SAFE_LUT_TYPE_MAX);
  263. psde->pipe_qos_cfg.danger_lut = perf->danger_lut[ds_lut_index];
  264. psde->pipe_qos_cfg.safe_lut = perf->safe_lut[ds_lut_index];
  265. trace_sde_perf_set_qos_luts(psde->pipe - SSPP_VIG0, (fmt) ? fmt->base.pixel_format : 0,
  266. (fmt) ? fmt->fetch_mode : 0, psde->pipe_qos_cfg.danger_lut,
  267. psde->pipe_qos_cfg.safe_lut, psde->pipe_qos_cfg.creq_lut);
  268. SDE_DEBUG("plane%u: pnum:%d fmt:%4.4s fps:%d mode:%d luts[0x%x,0x%x 0x%llx]\n",
  269. plane->base.id, psde->pipe - SSPP_VIG0,
  270. fmt ? (char *)&fmt->base.pixel_format : NULL, frame_rate,
  271. fmt ? fmt->fetch_mode : -1, psde->pipe_qos_cfg.danger_lut,
  272. psde->pipe_qos_cfg.safe_lut, psde->pipe_qos_cfg.creq_lut);
  273. psde->pipe_hw->ops.setup_qos_lut(psde->pipe_hw, &psde->pipe_qos_cfg);
  274. }
  275. /**
  276. * _sde_plane_set_qos_ctrl - set QoS control of the given plane
  277. * @plane: Pointer to drm plane
  278. * @enable: true to enable QoS control
  279. * @flags: QoS control mode (enum sde_plane_qos)
  280. */
  281. static void _sde_plane_set_qos_ctrl(struct drm_plane *plane,
  282. bool enable, u32 flags)
  283. {
  284. struct sde_plane *psde;
  285. if (!plane) {
  286. SDE_ERROR("invalid arguments\n");
  287. return;
  288. }
  289. psde = to_sde_plane(plane);
  290. if (!psde->pipe_hw || !psde->pipe_sblk) {
  291. SDE_ERROR("invalid arguments\n");
  292. return;
  293. } else if (!psde->pipe_hw->ops.setup_qos_ctrl) {
  294. return;
  295. }
  296. if (flags & SDE_PLANE_QOS_VBLANK_CTRL) {
  297. psde->pipe_qos_cfg.creq_vblank = psde->pipe_sblk->creq_vblank;
  298. psde->pipe_qos_cfg.danger_vblank =
  299. psde->pipe_sblk->danger_vblank;
  300. psde->pipe_qos_cfg.vblank_en = enable;
  301. }
  302. if (flags & SDE_PLANE_QOS_VBLANK_AMORTIZE) {
  303. /* this feature overrules previous VBLANK_CTRL */
  304. psde->pipe_qos_cfg.vblank_en = false;
  305. psde->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
  306. psde->pipe_qos_cfg.danger_vblank = 0;
  307. }
  308. if (flags & SDE_PLANE_QOS_PANIC_CTRL)
  309. psde->pipe_qos_cfg.danger_safe_en = enable;
  310. if (!psde->is_rt_pipe) {
  311. psde->pipe_qos_cfg.vblank_en = false;
  312. psde->pipe_qos_cfg.danger_safe_en = false;
  313. }
  314. SDE_DEBUG("plane%u: pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
  315. plane->base.id,
  316. psde->pipe - SSPP_VIG0,
  317. psde->pipe_qos_cfg.danger_safe_en,
  318. psde->pipe_qos_cfg.vblank_en,
  319. psde->pipe_qos_cfg.creq_vblank,
  320. psde->pipe_qos_cfg.danger_vblank,
  321. psde->is_rt_pipe);
  322. psde->pipe_hw->ops.setup_qos_ctrl(psde->pipe_hw,
  323. &psde->pipe_qos_cfg);
  324. }
  325. void sde_plane_set_revalidate(struct drm_plane *plane, bool enable)
  326. {
  327. struct sde_plane *psde;
  328. if (!plane)
  329. return;
  330. psde = to_sde_plane(plane);
  331. psde->revalidate = enable;
  332. }
  333. int sde_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
  334. {
  335. struct sde_plane *psde;
  336. int rc;
  337. if (!plane) {
  338. SDE_ERROR("invalid arguments\n");
  339. return -EINVAL;
  340. }
  341. psde = to_sde_plane(plane);
  342. if (!psde->is_rt_pipe)
  343. goto end;
  344. rc = pm_runtime_resume_and_get(plane->dev->dev);
  345. if (rc < 0) {
  346. SDE_ERROR("failed to enable power resource %d\n", rc);
  347. SDE_EVT32(rc, SDE_EVTLOG_ERROR);
  348. return rc;
  349. }
  350. _sde_plane_set_qos_ctrl(plane, enable, SDE_PLANE_QOS_PANIC_CTRL);
  351. pm_runtime_put_sync(plane->dev->dev);
  352. end:
  353. return 0;
  354. }
  355. /**
  356. * _sde_plane_set_ot_limit - set OT limit for the given plane
  357. * @plane: Pointer to drm plane
  358. * @crtc: Pointer to drm crtc
  359. */
  360. static void _sde_plane_set_ot_limit(struct drm_plane *plane,
  361. struct drm_crtc *crtc)
  362. {
  363. struct sde_plane *psde;
  364. struct sde_vbif_set_ot_params ot_params;
  365. struct msm_drm_private *priv;
  366. struct sde_kms *sde_kms;
  367. if (!plane || !plane->dev || !crtc) {
  368. SDE_ERROR("invalid arguments plane %d crtc %d\n",
  369. !plane, !crtc);
  370. return;
  371. }
  372. priv = plane->dev->dev_private;
  373. if (!priv || !priv->kms) {
  374. SDE_ERROR("invalid KMS reference\n");
  375. return;
  376. }
  377. sde_kms = to_sde_kms(priv->kms);
  378. psde = to_sde_plane(plane);
  379. if (!psde->pipe_hw) {
  380. SDE_ERROR("invalid pipe reference\n");
  381. return;
  382. }
  383. memset(&ot_params, 0, sizeof(ot_params));
  384. ot_params.xin_id = psde->pipe_hw->cap->xin_id;
  385. ot_params.num = psde->pipe_hw->idx - SSPP_NONE;
  386. ot_params.width = psde->pipe_cfg.src_rect.w;
  387. ot_params.height = psde->pipe_cfg.src_rect.h;
  388. ot_params.is_wfd = !psde->is_rt_pipe;
  389. ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode);
  390. ot_params.vbif_idx = VBIF_RT;
  391. ot_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  392. ot_params.rd = true;
  393. sde_vbif_set_ot_limit(sde_kms, &ot_params);
  394. }
  395. /**
  396. * _sde_plane_set_vbif_qos - set vbif QoS for the given plane
  397. * @plane: Pointer to drm plane
  398. */
  399. static void _sde_plane_set_qos_remap(struct drm_plane *plane)
  400. {
  401. struct sde_plane *psde;
  402. struct sde_vbif_set_qos_params qos_params;
  403. struct msm_drm_private *priv;
  404. struct sde_kms *sde_kms;
  405. if (!plane || !plane->dev) {
  406. SDE_ERROR("invalid arguments\n");
  407. return;
  408. }
  409. priv = plane->dev->dev_private;
  410. if (!priv || !priv->kms) {
  411. SDE_ERROR("invalid KMS reference\n");
  412. return;
  413. }
  414. sde_kms = to_sde_kms(priv->kms);
  415. psde = to_sde_plane(plane);
  416. if (!psde->pipe_hw) {
  417. SDE_ERROR("invalid pipe reference\n");
  418. return;
  419. }
  420. memset(&qos_params, 0, sizeof(qos_params));
  421. qos_params.vbif_idx = VBIF_RT;
  422. qos_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  423. qos_params.xin_id = psde->pipe_hw->cap->xin_id;
  424. qos_params.num = psde->pipe_hw->idx - SSPP_VIG0;
  425. qos_params.client_type = psde->is_rt_pipe ?
  426. VBIF_RT_CLIENT : VBIF_NRT_CLIENT;
  427. SDE_DEBUG("plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
  428. plane->base.id, qos_params.num,
  429. qos_params.vbif_idx,
  430. qos_params.xin_id, qos_params.client_type,
  431. qos_params.clk_ctrl);
  432. sde_vbif_set_qos_remap(sde_kms, &qos_params);
  433. }
  434. /**
  435. * _sde_plane_set_ts_prefill - set prefill with traffic shaper
  436. * @plane: Pointer to drm plane
  437. * @pstate: Pointer to sde plane state
  438. */
  439. static void _sde_plane_set_ts_prefill(struct drm_plane *plane,
  440. struct sde_plane_state *pstate)
  441. {
  442. struct sde_plane *psde;
  443. struct sde_hw_pipe_ts_cfg cfg;
  444. struct msm_drm_private *priv;
  445. struct sde_kms *sde_kms;
  446. if (!plane || !plane->dev) {
  447. SDE_ERROR("invalid arguments");
  448. return;
  449. }
  450. priv = plane->dev->dev_private;
  451. if (!priv || !priv->kms) {
  452. SDE_ERROR("invalid KMS reference\n");
  453. return;
  454. }
  455. sde_kms = to_sde_kms(priv->kms);
  456. psde = to_sde_plane(plane);
  457. if (!psde->pipe_hw) {
  458. SDE_ERROR("invalid pipe reference\n");
  459. return;
  460. }
  461. if (!psde->pipe_hw || !psde->pipe_hw->ops.setup_ts_prefill)
  462. return;
  463. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_VBLANK_AMORTIZE);
  464. memset(&cfg, 0, sizeof(cfg));
  465. cfg.size = sde_plane_get_property(pstate,
  466. PLANE_PROP_PREFILL_SIZE);
  467. cfg.time = sde_plane_get_property(pstate,
  468. PLANE_PROP_PREFILL_TIME);
  469. SDE_DEBUG("plane%d size:%llu time:%llu\n",
  470. plane->base.id, cfg.size, cfg.time);
  471. SDE_EVT32_VERBOSE(DRMID(plane), cfg.size, cfg.time);
  472. psde->pipe_hw->ops.setup_ts_prefill(psde->pipe_hw, &cfg,
  473. pstate->multirect_index);
  474. }
  475. /* helper to update a state's input fence pointer from the property */
  476. static void _sde_plane_set_input_fence(struct sde_plane *psde,
  477. struct sde_plane_state *pstate, uint64_t fd)
  478. {
  479. if (!psde || !pstate) {
  480. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  481. !psde, !pstate);
  482. return;
  483. }
  484. /* clear previous reference */
  485. if (pstate->input_fence)
  486. sde_sync_put(pstate->input_fence);
  487. /* get fence pointer for later */
  488. if (fd == 0)
  489. pstate->input_fence = NULL;
  490. else
  491. pstate->input_fence = sde_sync_get(fd);
  492. SDE_DEBUG_PLANE(psde, "0x%llX\n", fd);
  493. }
  494. int sde_plane_wait_input_fence(struct drm_plane *plane, uint32_t wait_ms)
  495. {
  496. struct sde_plane *psde;
  497. struct sde_plane_state *pstate;
  498. uint32_t prefix;
  499. void *input_fence;
  500. int ret = -EINVAL;
  501. signed long rc;
  502. if (!plane) {
  503. SDE_ERROR("invalid plane\n");
  504. } else if (!plane->state) {
  505. SDE_ERROR_PLANE(to_sde_plane(plane), "invalid state\n");
  506. } else {
  507. psde = to_sde_plane(plane);
  508. pstate = to_sde_plane_state(plane->state);
  509. input_fence = pstate->input_fence;
  510. if (input_fence) {
  511. prefix = sde_sync_get_name_prefix(input_fence);
  512. rc = sde_sync_wait(input_fence, wait_ms);
  513. switch (rc) {
  514. case 0:
  515. SDE_ERROR_PLANE(psde, "%ums timeout on %08X fd %lld\n",
  516. wait_ms, prefix, sde_plane_get_property(pstate,
  517. PLANE_PROP_INPUT_FENCE));
  518. psde->is_error = true;
  519. sde_kms_timeline_status(plane->dev);
  520. ret = -ETIMEDOUT;
  521. break;
  522. case -ERESTARTSYS:
  523. SDE_ERROR_PLANE(psde,
  524. "%ums wait interrupted on %08X\n",
  525. wait_ms, prefix);
  526. psde->is_error = true;
  527. ret = -ERESTARTSYS;
  528. break;
  529. case -EINVAL:
  530. SDE_ERROR_PLANE(psde,
  531. "invalid fence param for %08X\n",
  532. prefix);
  533. psde->is_error = true;
  534. ret = -EINVAL;
  535. break;
  536. case -EBADF:
  537. SDE_INFO("plane%d spec fd signaled on bind failure fd %lld\n",
  538. plane->base.id,
  539. sde_plane_get_property(pstate, PLANE_PROP_INPUT_FENCE));
  540. psde->is_error = true;
  541. ret = 0;
  542. break;
  543. default:
  544. SDE_DEBUG_PLANE(psde, "signaled\n");
  545. ret = 0;
  546. break;
  547. }
  548. SDE_EVT32_VERBOSE(DRMID(plane), -ret, prefix);
  549. } else {
  550. ret = 0;
  551. }
  552. }
  553. return ret;
  554. }
  555. /**
  556. * _sde_plane_get_aspace: gets the address space based on the
  557. * fb_translation mode property
  558. */
  559. static int _sde_plane_get_aspace(
  560. struct sde_plane *psde,
  561. struct sde_plane_state *pstate,
  562. struct msm_gem_address_space **aspace)
  563. {
  564. struct sde_kms *kms;
  565. int mode;
  566. if (!psde || !pstate || !aspace) {
  567. SDE_ERROR("invalid parameters\n");
  568. return -EINVAL;
  569. }
  570. kms = _sde_plane_get_kms(&psde->base);
  571. if (!kms) {
  572. SDE_ERROR("invalid kms\n");
  573. return -EINVAL;
  574. }
  575. mode = sde_plane_get_property(pstate,
  576. PLANE_PROP_FB_TRANSLATION_MODE);
  577. switch (mode) {
  578. case SDE_DRM_FB_NON_SEC:
  579. *aspace = kms->aspace[MSM_SMMU_DOMAIN_UNSECURE];
  580. if (!aspace)
  581. return -EINVAL;
  582. break;
  583. case SDE_DRM_FB_SEC:
  584. *aspace = kms->aspace[MSM_SMMU_DOMAIN_SECURE];
  585. if (!aspace)
  586. return -EINVAL;
  587. break;
  588. case SDE_DRM_FB_NON_SEC_DIR_TRANS:
  589. case SDE_DRM_FB_SEC_DIR_TRANS:
  590. *aspace = NULL;
  591. break;
  592. default:
  593. SDE_ERROR("invalid fb_translation mode:%d\n", mode);
  594. return -EFAULT;
  595. }
  596. return 0;
  597. }
  598. static inline void _sde_plane_set_scanout(struct drm_plane *plane,
  599. struct sde_plane_state *pstate,
  600. struct sde_hw_pipe_cfg *pipe_cfg,
  601. struct drm_framebuffer *fb)
  602. {
  603. struct sde_plane *psde;
  604. struct msm_gem_address_space *aspace = NULL;
  605. int ret, mode;
  606. bool secure = false;
  607. if (!plane || !pstate || !pipe_cfg || !fb) {
  608. SDE_ERROR(
  609. "invalid arg(s), plane %d state %d cfg %d fb %d\n",
  610. !plane, !pstate, !pipe_cfg, !fb);
  611. return;
  612. }
  613. psde = to_sde_plane(plane);
  614. if (!psde->pipe_hw) {
  615. SDE_ERROR_PLANE(psde, "invalid pipe_hw\n");
  616. return;
  617. }
  618. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  619. if (ret) {
  620. SDE_ERROR_PLANE(psde, "Failed to get aspace %d\n", ret);
  621. return;
  622. }
  623. /*
  624. * framebuffer prepare is deferred for prepare_fb calls that
  625. * happen during the transition from secure to non-secure.
  626. * Handle the prepare at this point for such cases. This can be
  627. * expected for one or two frames during the transition.
  628. */
  629. if (aspace && pstate->defer_prepare_fb) {
  630. SDE_EVT32(DRMID(plane), psde->pipe, aspace->domain_attached);
  631. ret = msm_framebuffer_prepare(fb, pstate->aspace);
  632. if (ret) {
  633. SDE_ERROR_PLANE(psde,
  634. "failed to prepare framebuffer %d\n", ret);
  635. return;
  636. }
  637. pstate->defer_prepare_fb = false;
  638. }
  639. mode = sde_plane_get_property(pstate, PLANE_PROP_FB_TRANSLATION_MODE);
  640. if ((mode == SDE_DRM_FB_SEC) || (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  641. secure = true;
  642. ret = sde_format_populate_layout(aspace, fb, &pipe_cfg->layout);
  643. if (ret == -EAGAIN)
  644. SDE_DEBUG_PLANE(psde, "not updating same src addrs\n");
  645. else if (ret) {
  646. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  647. /*
  648. * Force solid fill color on error. This is to prevent
  649. * smmu faults during secure session transition.
  650. */
  651. psde->is_error = true;
  652. } else if (psde->pipe_hw->ops.setup_sourceaddress) {
  653. SDE_EVT32_VERBOSE(psde->pipe_hw->idx,
  654. pipe_cfg->layout.width,
  655. pipe_cfg->layout.height,
  656. pipe_cfg->layout.plane_addr[0],
  657. pipe_cfg->layout.plane_size[0],
  658. pipe_cfg->layout.plane_addr[1],
  659. pipe_cfg->layout.plane_size[1],
  660. pipe_cfg->layout.plane_addr[2],
  661. pipe_cfg->layout.plane_size[2],
  662. pipe_cfg->layout.plane_addr[3],
  663. pipe_cfg->layout.plane_size[3],
  664. pstate->multirect_index,
  665. secure);
  666. psde->pipe_hw->ops.setup_sourceaddress(psde->pipe_hw, pipe_cfg,
  667. pstate->multirect_index);
  668. }
  669. }
  670. static int _sde_plane_setup_scaler3_lut(struct sde_plane *psde,
  671. struct sde_plane_state *pstate)
  672. {
  673. struct sde_hw_scaler3_cfg *cfg;
  674. int ret = 0;
  675. if (!psde || !pstate) {
  676. SDE_ERROR("invalid args\n");
  677. return -EINVAL;
  678. }
  679. cfg = &psde->scaler3_cfg;
  680. cfg->dir_lut = msm_property_get_blob(
  681. &psde->property_info,
  682. &pstate->property_state, &cfg->dir_len,
  683. PLANE_PROP_SCALER_LUT_ED);
  684. cfg->cir_lut = msm_property_get_blob(
  685. &psde->property_info,
  686. &pstate->property_state, &cfg->cir_len,
  687. PLANE_PROP_SCALER_LUT_CIR);
  688. cfg->sep_lut = msm_property_get_blob(
  689. &psde->property_info,
  690. &pstate->property_state, &cfg->sep_len,
  691. PLANE_PROP_SCALER_LUT_SEP);
  692. if (!cfg->dir_lut || !cfg->cir_lut || !cfg->sep_lut)
  693. ret = -ENODATA;
  694. return ret;
  695. }
  696. static int _sde_plane_setup_scaler3lite_lut(struct sde_plane *psde,
  697. struct sde_plane_state *pstate)
  698. {
  699. struct sde_hw_scaler3_cfg *cfg;
  700. cfg = &psde->scaler3_cfg;
  701. cfg->sep_lut = msm_property_get_blob(
  702. &psde->property_info,
  703. &pstate->property_state, &cfg->sep_len,
  704. PLANE_PROP_SCALER_LUT_SEP);
  705. return cfg->sep_lut ? 0 : -ENODATA;
  706. }
  707. static void _sde_plane_setup_scaler3(struct sde_plane *psde,
  708. struct sde_plane_state *pstate, const struct sde_format *fmt,
  709. uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
  710. {
  711. uint32_t decimated, i, src_w, src_h, dst_w, dst_h, src_h_pre_down;
  712. struct sde_hw_scaler3_cfg *scale_cfg;
  713. bool pre_down_supported = (psde->features & BIT(SDE_SSPP_PREDOWNSCALE));
  714. bool inline_rotation = (pstate->rotation & DRM_MODE_ROTATE_90);
  715. if (!fmt || !chroma_subsmpl_h || !chroma_subsmpl_v) {
  716. SDE_ERROR("fmt %d smp_h %d smp_v %d\n", !fmt,
  717. chroma_subsmpl_h, chroma_subsmpl_v);
  718. return;
  719. }
  720. scale_cfg = &psde->scaler3_cfg;
  721. src_w = psde->pipe_cfg.src_rect.w;
  722. src_h = psde->pipe_cfg.src_rect.h;
  723. dst_w = psde->pipe_cfg.dst_rect.w;
  724. dst_h = psde->pipe_cfg.dst_rect.h;
  725. memset(scale_cfg, 0, sizeof(*scale_cfg));
  726. memset(&psde->pixel_ext, 0, sizeof(struct sde_hw_pixel_ext));
  727. /*
  728. * For inline rotation cases, scaler config is post-rotation,
  729. * so swap the dimensions here. However, pixel extension will
  730. * need pre-rotation settings, this will be corrected below
  731. * when calculating pixel extension settings.
  732. */
  733. if (inline_rotation)
  734. swap(src_w, src_h);
  735. decimated = DECIMATED_DIMENSION(src_w,
  736. psde->pipe_cfg.horz_decimation);
  737. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] =
  738. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_w);
  739. decimated = DECIMATED_DIMENSION(src_h,
  740. psde->pipe_cfg.vert_decimation);
  741. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] =
  742. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_h);
  743. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2] =
  744. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] / chroma_subsmpl_v;
  745. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2] =
  746. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] / chroma_subsmpl_h;
  747. scale_cfg->phase_step_x[SDE_SSPP_COMP_2] =
  748. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2];
  749. scale_cfg->phase_step_y[SDE_SSPP_COMP_2] =
  750. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2];
  751. scale_cfg->phase_step_x[SDE_SSPP_COMP_3] =
  752. scale_cfg->phase_step_x[SDE_SSPP_COMP_0];
  753. scale_cfg->phase_step_y[SDE_SSPP_COMP_3] =
  754. scale_cfg->phase_step_y[SDE_SSPP_COMP_0];
  755. for (i = 0; i < SDE_MAX_PLANES; i++) {
  756. /*
  757. * For inline rotation cases with pre-downscaling enabled
  758. * set x pre-downscale value if required. Only x direction
  759. * is currently supported. Use src_h as values have been swapped
  760. * and x direction corresponds to height value.
  761. */
  762. src_h_pre_down = src_h;
  763. if (pre_down_supported && inline_rotation) {
  764. if (i == 0 && (src_h > mult_frac(dst_h, 11, 5)))
  765. src_h_pre_down = src_h / 2;
  766. }
  767. scale_cfg->src_width[i] = DECIMATED_DIMENSION(src_w,
  768. psde->pipe_cfg.horz_decimation);
  769. scale_cfg->src_height[i] = DECIMATED_DIMENSION(src_h_pre_down,
  770. psde->pipe_cfg.vert_decimation);
  771. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2) {
  772. scale_cfg->src_width[i] /= chroma_subsmpl_h;
  773. scale_cfg->src_height[i] /= chroma_subsmpl_v;
  774. }
  775. scale_cfg->preload_x[i] = psde->pipe_sblk->scaler_blk.h_preload;
  776. scale_cfg->preload_y[i] = psde->pipe_sblk->scaler_blk.v_preload;
  777. /* For pixel extension we need the pre-rotated orientation */
  778. if (inline_rotation) {
  779. psde->pixel_ext.num_ext_pxls_top[i] =
  780. scale_cfg->src_width[i];
  781. psde->pixel_ext.num_ext_pxls_left[i] =
  782. scale_cfg->src_height[i];
  783. } else {
  784. psde->pixel_ext.num_ext_pxls_top[i] =
  785. scale_cfg->src_height[i];
  786. psde->pixel_ext.num_ext_pxls_left[i] =
  787. scale_cfg->src_width[i];
  788. }
  789. }
  790. if ((!(SDE_FORMAT_IS_YUV(fmt)) && (src_h == dst_h)
  791. && (src_w == dst_w) && !inline_rotation) ||
  792. pstate->multirect_mode)
  793. return;
  794. SDE_DEBUG_PLANE(psde,
  795. "setting bilinear: src:%dx%d dst:%dx%d chroma:%dx%d fmt:%x\n",
  796. src_w, src_h, dst_w, dst_h,
  797. chroma_subsmpl_v, chroma_subsmpl_h,
  798. fmt->base.pixel_format);
  799. scale_cfg->dst_width = dst_w;
  800. scale_cfg->dst_height = dst_h;
  801. scale_cfg->y_rgb_filter_cfg = SDE_SCALE_BIL;
  802. scale_cfg->uv_filter_cfg = SDE_SCALE_BIL;
  803. scale_cfg->alpha_filter_cfg = SDE_SCALE_ALPHA_BIL;
  804. scale_cfg->lut_flag = 0;
  805. scale_cfg->blend_cfg = 1;
  806. scale_cfg->enable = 1;
  807. scale_cfg->dyn_exp_disabled = SDE_QSEED_DEFAULT_DYN_EXP;
  808. }
  809. /**
  810. * _sde_plane_setup_scaler2 - determine default scaler phase steps/filter type
  811. * @psde: Pointer to SDE plane object
  812. * @src: Source size
  813. * @dst: Destination size
  814. * @phase_steps: Pointer to output array for phase steps
  815. * @filter: Pointer to output array for filter type
  816. * @fmt: Pointer to format definition
  817. * @chroma_subsampling: Subsampling amount for chroma channel
  818. *
  819. * Returns: 0 on success
  820. */
  821. static int _sde_plane_setup_scaler2(struct sde_plane *psde,
  822. uint32_t src, uint32_t dst, uint32_t *phase_steps,
  823. enum sde_hw_filter *filter, const struct sde_format *fmt,
  824. uint32_t chroma_subsampling)
  825. {
  826. if (!psde || !phase_steps || !filter || !fmt) {
  827. SDE_ERROR(
  828. "invalid arg(s), plane %d phase %d filter %d fmt %d\n",
  829. !psde, !phase_steps, !filter, !fmt);
  830. return -EINVAL;
  831. }
  832. /* calculate phase steps, leave init phase as zero */
  833. phase_steps[SDE_SSPP_COMP_0] =
  834. mult_frac(1 << PHASE_STEP_SHIFT, src, dst);
  835. phase_steps[SDE_SSPP_COMP_1_2] =
  836. phase_steps[SDE_SSPP_COMP_0] / chroma_subsampling;
  837. phase_steps[SDE_SSPP_COMP_2] = phase_steps[SDE_SSPP_COMP_1_2];
  838. phase_steps[SDE_SSPP_COMP_3] = phase_steps[SDE_SSPP_COMP_0];
  839. /* calculate scaler config, if necessary */
  840. if (SDE_FORMAT_IS_YUV(fmt) || src != dst) {
  841. filter[SDE_SSPP_COMP_3] =
  842. (src <= dst) ? SDE_SCALE_FILTER_BIL :
  843. SDE_SCALE_FILTER_PCMN;
  844. if (SDE_FORMAT_IS_YUV(fmt)) {
  845. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_CA;
  846. filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3];
  847. } else {
  848. filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3];
  849. filter[SDE_SSPP_COMP_1_2] =
  850. SDE_SCALE_FILTER_NEAREST;
  851. }
  852. } else {
  853. /* disable scaler */
  854. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_MAX;
  855. filter[SDE_SSPP_COMP_1_2] = SDE_SCALE_FILTER_MAX;
  856. filter[SDE_SSPP_COMP_3] = SDE_SCALE_FILTER_MAX;
  857. }
  858. return 0;
  859. }
  860. /**
  861. * _sde_plane_setup_pixel_ext - determine default pixel extension values
  862. * @psde: Pointer to SDE plane object
  863. * @src: Source size
  864. * @dst: Destination size
  865. * @decimated_src: Source size after decimation, if any
  866. * @phase_steps: Pointer to output array for phase steps
  867. * @out_src: Output array for pixel extension values
  868. * @out_edge1: Output array for pixel extension first edge
  869. * @out_edge2: Output array for pixel extension second edge
  870. * @filter: Pointer to array for filter type
  871. * @fmt: Pointer to format definition
  872. * @chroma_subsampling: Subsampling amount for chroma channel
  873. * @post_compare: Whether to chroma subsampled source size for comparisions
  874. */
  875. static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
  876. uint32_t src, uint32_t dst, uint32_t decimated_src,
  877. uint32_t *phase_steps, uint32_t *out_src, int *out_edge1,
  878. int *out_edge2, enum sde_hw_filter *filter,
  879. const struct sde_format *fmt, uint32_t chroma_subsampling,
  880. bool post_compare)
  881. {
  882. int64_t edge1, edge2, caf;
  883. uint32_t src_work;
  884. int i, tmp;
  885. if (psde && phase_steps && out_src && out_edge1 &&
  886. out_edge2 && filter && fmt) {
  887. /* handle CAF for YUV formats */
  888. if (SDE_FORMAT_IS_YUV(fmt) && *filter == SDE_SCALE_FILTER_CA)
  889. caf = PHASE_STEP_UNIT_SCALE;
  890. else
  891. caf = 0;
  892. for (i = 0; i < SDE_MAX_PLANES; i++) {
  893. src_work = decimated_src;
  894. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2)
  895. src_work /= chroma_subsampling;
  896. if (post_compare)
  897. src = src_work;
  898. if (!SDE_FORMAT_IS_YUV(fmt) && (src == dst)) {
  899. /* unity */
  900. edge1 = 0;
  901. edge2 = 0;
  902. } else if (dst >= src) {
  903. /* upscale */
  904. edge1 = (1 << PHASE_RESIDUAL);
  905. edge1 -= caf;
  906. edge2 = (1 << PHASE_RESIDUAL);
  907. edge2 += (dst - 1) * *(phase_steps + i);
  908. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  909. edge2 += caf;
  910. edge2 = -(edge2);
  911. } else {
  912. /* downscale */
  913. edge1 = 0;
  914. edge2 = (dst - 1) * *(phase_steps + i);
  915. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  916. edge2 += *(phase_steps + i);
  917. edge2 = -(edge2);
  918. }
  919. /* only enable CAF for luma plane */
  920. caf = 0;
  921. /* populate output arrays */
  922. *(out_src + i) = src_work;
  923. /* edge updates taken from __pxl_extn_helper */
  924. if (edge1 >= 0) {
  925. tmp = (uint32_t)edge1;
  926. tmp >>= PHASE_STEP_SHIFT;
  927. *(out_edge1 + i) = -tmp;
  928. } else {
  929. tmp = (uint32_t)(-edge1);
  930. *(out_edge1 + i) =
  931. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  932. PHASE_STEP_SHIFT;
  933. }
  934. if (edge2 >= 0) {
  935. tmp = (uint32_t)edge2;
  936. tmp >>= PHASE_STEP_SHIFT;
  937. *(out_edge2 + i) = -tmp;
  938. } else {
  939. tmp = (uint32_t)(-edge2);
  940. *(out_edge2 + i) =
  941. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  942. PHASE_STEP_SHIFT;
  943. }
  944. }
  945. }
  946. }
  947. static inline void _sde_plane_setup_csc(struct sde_plane *psde)
  948. {
  949. static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = {
  950. {
  951. /* S15.16 format */
  952. 0x00012A00, 0x00000000, 0x00019880,
  953. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  954. 0x00012A00, 0x00020480, 0x00000000,
  955. },
  956. /* signed bias */
  957. { 0xfff0, 0xff80, 0xff80,},
  958. { 0x0, 0x0, 0x0,},
  959. /* unsigned clamp */
  960. { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
  961. { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
  962. };
  963. static const struct sde_csc_cfg sde_csc10_YUV2RGB_601L = {
  964. {
  965. /* S15.16 format */
  966. 0x00012A00, 0x00000000, 0x00019880,
  967. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  968. 0x00012A00, 0x00020480, 0x00000000,
  969. },
  970. /* signed bias */
  971. { 0xffc0, 0xfe00, 0xfe00,},
  972. { 0x0, 0x0, 0x0,},
  973. /* unsigned clamp */
  974. { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
  975. { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
  976. };
  977. if (!psde) {
  978. SDE_ERROR("invalid plane\n");
  979. return;
  980. }
  981. /* revert to kernel default if override not available */
  982. if (psde->csc_usr_ptr)
  983. psde->csc_ptr = psde->csc_usr_ptr;
  984. else if (BIT(SDE_SSPP_CSC_10BIT) & psde->features)
  985. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc10_YUV2RGB_601L;
  986. else
  987. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_YUV2RGB_601L;
  988. SDE_DEBUG_PLANE(psde, "using 0x%X 0x%X 0x%X...\n",
  989. psde->csc_ptr->csc_mv[0],
  990. psde->csc_ptr->csc_mv[1],
  991. psde->csc_ptr->csc_mv[2]);
  992. }
  993. static void sde_color_process_plane_setup(struct drm_plane *plane)
  994. {
  995. struct sde_plane *psde;
  996. struct sde_plane_state *pstate;
  997. uint32_t hue, saturation, value, contrast;
  998. struct drm_msm_memcol *memcol = NULL;
  999. struct drm_msm_3d_gamut *vig_gamut = NULL;
  1000. struct drm_msm_igc_lut *igc = NULL;
  1001. struct drm_msm_pgc_lut *gc = NULL;
  1002. size_t memcol_sz = 0, size = 0;
  1003. struct sde_hw_cp_cfg hw_cfg = {};
  1004. struct sde_hw_ctl *ctl = _sde_plane_get_hw_ctl(plane);
  1005. bool fp16_igc, fp16_unmult;
  1006. struct drm_msm_fp16_gc *fp16_gc = NULL;
  1007. struct drm_msm_fp16_csc *fp16_csc = NULL;
  1008. psde = to_sde_plane(plane);
  1009. pstate = to_sde_plane_state(plane->state);
  1010. hue = (uint32_t) sde_plane_get_property(pstate, PLANE_PROP_HUE_ADJUST);
  1011. if (psde->pipe_hw->ops.setup_pa_hue)
  1012. psde->pipe_hw->ops.setup_pa_hue(psde->pipe_hw, &hue);
  1013. saturation = (uint32_t) sde_plane_get_property(pstate,
  1014. PLANE_PROP_SATURATION_ADJUST);
  1015. if (psde->pipe_hw->ops.setup_pa_sat)
  1016. psde->pipe_hw->ops.setup_pa_sat(psde->pipe_hw, &saturation);
  1017. value = (uint32_t) sde_plane_get_property(pstate,
  1018. PLANE_PROP_VALUE_ADJUST);
  1019. if (psde->pipe_hw->ops.setup_pa_val)
  1020. psde->pipe_hw->ops.setup_pa_val(psde->pipe_hw, &value);
  1021. contrast = (uint32_t) sde_plane_get_property(pstate,
  1022. PLANE_PROP_CONTRAST_ADJUST);
  1023. if (psde->pipe_hw->ops.setup_pa_cont)
  1024. psde->pipe_hw->ops.setup_pa_cont(psde->pipe_hw, &contrast);
  1025. if (psde->pipe_hw->ops.setup_pa_memcolor) {
  1026. /* Skin memory color setup */
  1027. memcol = msm_property_get_blob(&psde->property_info,
  1028. &pstate->property_state,
  1029. &memcol_sz,
  1030. PLANE_PROP_SKIN_COLOR);
  1031. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1032. MEMCOLOR_SKIN, memcol);
  1033. /* Sky memory color setup */
  1034. memcol = msm_property_get_blob(&psde->property_info,
  1035. &pstate->property_state,
  1036. &memcol_sz,
  1037. PLANE_PROP_SKY_COLOR);
  1038. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1039. MEMCOLOR_SKY, memcol);
  1040. /* Foliage memory color setup */
  1041. memcol = msm_property_get_blob(&psde->property_info,
  1042. &pstate->property_state,
  1043. &memcol_sz,
  1044. PLANE_PROP_FOLIAGE_COLOR);
  1045. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1046. MEMCOLOR_FOLIAGE, memcol);
  1047. }
  1048. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_GAMUT &&
  1049. psde->pipe_hw->ops.setup_vig_gamut) {
  1050. vig_gamut = msm_property_get_blob(&psde->property_info,
  1051. &pstate->property_state,
  1052. &size,
  1053. PLANE_PROP_VIG_GAMUT);
  1054. hw_cfg.last_feature = 0;
  1055. hw_cfg.ctl = ctl;
  1056. hw_cfg.len = size;
  1057. hw_cfg.payload = vig_gamut;
  1058. psde->pipe_hw->ops.setup_vig_gamut(psde->pipe_hw, &hw_cfg);
  1059. }
  1060. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_IGC &&
  1061. psde->pipe_hw->ops.setup_vig_igc) {
  1062. igc = msm_property_get_blob(&psde->property_info,
  1063. &pstate->property_state,
  1064. &size,
  1065. PLANE_PROP_VIG_IGC);
  1066. hw_cfg.last_feature = 0;
  1067. hw_cfg.ctl = ctl;
  1068. hw_cfg.len = size;
  1069. hw_cfg.payload = igc;
  1070. psde->pipe_hw->ops.setup_vig_igc(psde->pipe_hw, &hw_cfg);
  1071. }
  1072. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_IGC &&
  1073. psde->pipe_hw->ops.setup_dma_igc) {
  1074. igc = msm_property_get_blob(&psde->property_info,
  1075. &pstate->property_state,
  1076. &size,
  1077. PLANE_PROP_DMA_IGC);
  1078. hw_cfg.last_feature = 0;
  1079. hw_cfg.ctl = ctl;
  1080. hw_cfg.len = size;
  1081. hw_cfg.payload = igc;
  1082. psde->pipe_hw->ops.setup_dma_igc(psde->pipe_hw, &hw_cfg,
  1083. pstate->multirect_index);
  1084. }
  1085. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_GC &&
  1086. psde->pipe_hw->ops.setup_dma_gc) {
  1087. gc = msm_property_get_blob(&psde->property_info,
  1088. &pstate->property_state,
  1089. &size,
  1090. PLANE_PROP_DMA_GC);
  1091. hw_cfg.last_feature = 0;
  1092. hw_cfg.ctl = ctl;
  1093. hw_cfg.len = size;
  1094. hw_cfg.payload = gc;
  1095. psde->pipe_hw->ops.setup_dma_gc(psde->pipe_hw, &hw_cfg,
  1096. pstate->multirect_index);
  1097. }
  1098. if (pstate->dirty & SDE_PLANE_DIRTY_FP16_IGC &&
  1099. psde->pipe_hw->ops.setup_fp16_igc) {
  1100. fp16_igc = !!sde_plane_get_property(pstate,
  1101. PLANE_PROP_FP16_IGC);
  1102. hw_cfg.last_feature = 0;
  1103. hw_cfg.ctl = ctl;
  1104. hw_cfg.len = sizeof(bool);
  1105. hw_cfg.payload = &fp16_igc;
  1106. psde->pipe_hw->ops.setup_fp16_igc(psde->pipe_hw,
  1107. pstate->multirect_index, &hw_cfg);
  1108. }
  1109. if (pstate->dirty & SDE_PLANE_DIRTY_FP16_GC &&
  1110. psde->pipe_hw->ops.setup_fp16_gc) {
  1111. fp16_gc = msm_property_get_blob(&psde->property_info,
  1112. &pstate->property_state,
  1113. &size,
  1114. PLANE_PROP_FP16_GC);
  1115. hw_cfg.last_feature = 0;
  1116. hw_cfg.ctl = ctl;
  1117. hw_cfg.len = size;
  1118. hw_cfg.payload = fp16_gc;
  1119. psde->pipe_hw->ops.setup_fp16_gc(psde->pipe_hw,
  1120. pstate->multirect_index, &hw_cfg);
  1121. }
  1122. if (pstate->dirty & SDE_PLANE_DIRTY_FP16_CSC &&
  1123. psde->pipe_hw->ops.setup_fp16_csc) {
  1124. fp16_csc = msm_property_get_blob(&psde->property_info,
  1125. &pstate->property_state,
  1126. &size,
  1127. PLANE_PROP_FP16_CSC);
  1128. hw_cfg.last_feature = 0;
  1129. hw_cfg.ctl = ctl;
  1130. hw_cfg.len = size;
  1131. hw_cfg.payload = fp16_csc;
  1132. psde->pipe_hw->ops.setup_fp16_csc(psde->pipe_hw,
  1133. pstate->multirect_index, &hw_cfg);
  1134. }
  1135. if (pstate->dirty & SDE_PLANE_DIRTY_FP16_UNMULT &&
  1136. psde->pipe_hw->ops.setup_fp16_unmult) {
  1137. fp16_unmult = !!sde_plane_get_property(pstate,
  1138. PLANE_PROP_FP16_UNMULT);
  1139. hw_cfg.last_feature = 0;
  1140. hw_cfg.ctl = ctl;
  1141. hw_cfg.len = sizeof(bool);
  1142. hw_cfg.payload = &fp16_unmult;
  1143. psde->pipe_hw->ops.setup_fp16_unmult(psde->pipe_hw,
  1144. pstate->multirect_index, &hw_cfg);
  1145. }
  1146. }
  1147. static void _sde_plane_setup_scaler(struct sde_plane *psde,
  1148. struct sde_plane_state *pstate,
  1149. const struct sde_format *fmt, bool color_fill)
  1150. {
  1151. struct sde_hw_pixel_ext *pe;
  1152. uint32_t chroma_subsmpl_h, chroma_subsmpl_v;
  1153. const struct drm_format_info *info = NULL;
  1154. if (!psde || !fmt || !pstate) {
  1155. SDE_ERROR("invalid arg(s), plane %d fmt %d state %d\n",
  1156. !psde, !fmt, !pstate);
  1157. return;
  1158. }
  1159. memcpy(&psde->scaler3_cfg, &pstate->scaler3_cfg,
  1160. sizeof(psde->scaler3_cfg));
  1161. memcpy(&psde->pixel_ext, &pstate->pixel_ext,
  1162. sizeof(psde->pixel_ext));
  1163. info = drm_format_info(fmt->base.pixel_format);
  1164. pe = &psde->pixel_ext;
  1165. psde->pipe_cfg.horz_decimation =
  1166. sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  1167. psde->pipe_cfg.vert_decimation =
  1168. sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  1169. /* don't chroma subsample if decimating */
  1170. chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 : info->hsub;
  1171. chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 : info->vsub;
  1172. /* update scaler */
  1173. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  1174. (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))) {
  1175. int rc = -EINVAL;
  1176. if (!color_fill && !psde->debugfs_default_scale)
  1177. rc = is_qseed3_rev_qseed3lite(psde->pipe_hw->catalog) ?
  1178. _sde_plane_setup_scaler3lite_lut(psde, pstate) :
  1179. _sde_plane_setup_scaler3_lut(psde, pstate);
  1180. if (rc || pstate->scaler_check_state !=
  1181. SDE_PLANE_SCLCHECK_SCALER_V2) {
  1182. SDE_EVT32_VERBOSE(DRMID(&psde->base), color_fill,
  1183. pstate->scaler_check_state,
  1184. psde->debugfs_default_scale, rc,
  1185. psde->pipe_cfg.src_rect.w,
  1186. psde->pipe_cfg.src_rect.h,
  1187. psde->pipe_cfg.dst_rect.w,
  1188. psde->pipe_cfg.dst_rect.h,
  1189. pstate->multirect_mode);
  1190. /* calculate default config for QSEED3 */
  1191. _sde_plane_setup_scaler3(psde, pstate, fmt,
  1192. chroma_subsmpl_h, chroma_subsmpl_v);
  1193. }
  1194. } else if (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V1 ||
  1195. color_fill || psde->debugfs_default_scale) {
  1196. uint32_t deci_dim, i;
  1197. /* calculate default configuration for QSEED2 */
  1198. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  1199. SDE_DEBUG_PLANE(psde, "default config\n");
  1200. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.w,
  1201. psde->pipe_cfg.horz_decimation);
  1202. _sde_plane_setup_scaler2(psde,
  1203. deci_dim,
  1204. psde->pipe_cfg.dst_rect.w,
  1205. pe->phase_step_x,
  1206. pe->horz_filter, fmt, chroma_subsmpl_h);
  1207. if (SDE_FORMAT_IS_YUV(fmt))
  1208. deci_dim &= ~0x1;
  1209. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.w,
  1210. psde->pipe_cfg.dst_rect.w, deci_dim,
  1211. pe->phase_step_x,
  1212. pe->roi_w,
  1213. pe->num_ext_pxls_left,
  1214. pe->num_ext_pxls_right, pe->horz_filter, fmt,
  1215. chroma_subsmpl_h, 0);
  1216. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.h,
  1217. psde->pipe_cfg.vert_decimation);
  1218. _sde_plane_setup_scaler2(psde,
  1219. deci_dim,
  1220. psde->pipe_cfg.dst_rect.h,
  1221. pe->phase_step_y,
  1222. pe->vert_filter, fmt, chroma_subsmpl_v);
  1223. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.h,
  1224. psde->pipe_cfg.dst_rect.h, deci_dim,
  1225. pe->phase_step_y,
  1226. pe->roi_h,
  1227. pe->num_ext_pxls_top,
  1228. pe->num_ext_pxls_btm, pe->vert_filter, fmt,
  1229. chroma_subsmpl_v, 1);
  1230. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1231. if (pe->num_ext_pxls_left[i] >= 0)
  1232. pe->left_rpt[i] = pe->num_ext_pxls_left[i];
  1233. else
  1234. pe->left_ftch[i] = pe->num_ext_pxls_left[i];
  1235. if (pe->num_ext_pxls_right[i] >= 0)
  1236. pe->right_rpt[i] = pe->num_ext_pxls_right[i];
  1237. else
  1238. pe->right_ftch[i] = pe->num_ext_pxls_right[i];
  1239. if (pe->num_ext_pxls_top[i] >= 0)
  1240. pe->top_rpt[i] = pe->num_ext_pxls_top[i];
  1241. else
  1242. pe->top_ftch[i] = pe->num_ext_pxls_top[i];
  1243. if (pe->num_ext_pxls_btm[i] >= 0)
  1244. pe->btm_rpt[i] = pe->num_ext_pxls_btm[i];
  1245. else
  1246. pe->btm_ftch[i] = pe->num_ext_pxls_btm[i];
  1247. }
  1248. }
  1249. if (psde->pipe_hw->ops.setup_pre_downscale)
  1250. psde->pipe_hw->ops.setup_pre_downscale(psde->pipe_hw,
  1251. &pstate->pre_down);
  1252. }
  1253. /**
  1254. * _sde_plane_color_fill - enables color fill on plane
  1255. * @psde: Pointer to SDE plane object
  1256. * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
  1257. * @alpha: 8-bit fill alpha value, 255 selects 100% alpha
  1258. * Returns: 0 on success
  1259. */
  1260. static int _sde_plane_color_fill(struct sde_plane *psde,
  1261. uint32_t color, uint32_t alpha)
  1262. {
  1263. const struct sde_format *fmt;
  1264. const struct drm_plane *plane;
  1265. struct sde_plane_state *pstate;
  1266. bool blend_enable = true;
  1267. if (!psde || !psde->base.state) {
  1268. SDE_ERROR("invalid plane\n");
  1269. return -EINVAL;
  1270. }
  1271. if (!psde->pipe_hw) {
  1272. SDE_ERROR_PLANE(psde, "invalid plane h/w pointer\n");
  1273. return -EINVAL;
  1274. }
  1275. plane = &psde->base;
  1276. pstate = to_sde_plane_state(plane->state);
  1277. SDE_DEBUG_PLANE(psde, "\n");
  1278. /*
  1279. * select fill format to match user property expectation,
  1280. * h/w only supports RGB variants
  1281. */
  1282. fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888);
  1283. blend_enable = (SDE_DRM_BLEND_OP_OPAQUE !=
  1284. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP));
  1285. /* update sspp */
  1286. if (fmt && psde->pipe_hw->ops.setup_solidfill) {
  1287. psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw,
  1288. (color & 0xFFFFFF) | ((alpha & 0xFF) << 24),
  1289. pstate->multirect_index);
  1290. /* override scaler/decimation if solid fill */
  1291. psde->pipe_cfg.src_rect.x = 0;
  1292. psde->pipe_cfg.src_rect.y = 0;
  1293. psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w;
  1294. psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h;
  1295. _sde_plane_setup_scaler(psde, pstate, fmt, true);
  1296. if (psde->pipe_hw->ops.setup_format)
  1297. psde->pipe_hw->ops.setup_format(psde->pipe_hw,
  1298. fmt, blend_enable,
  1299. SDE_SSPP_SOLID_FILL,
  1300. pstate->multirect_index);
  1301. if (psde->pipe_hw->ops.setup_rects)
  1302. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  1303. &psde->pipe_cfg,
  1304. pstate->multirect_index);
  1305. if (psde->pipe_hw->ops.setup_pe)
  1306. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  1307. &psde->pixel_ext);
  1308. if (psde->pipe_hw->ops.setup_scaler &&
  1309. pstate->multirect_index != SDE_SSPP_RECT_1) {
  1310. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  1311. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  1312. &psde->pipe_cfg, &psde->pixel_ext,
  1313. &psde->scaler3_cfg);
  1314. }
  1315. }
  1316. return 0;
  1317. }
  1318. /**
  1319. * sde_plane_rot_atomic_check - verify rotator update of the given state
  1320. * @plane: Pointer to drm plane
  1321. * @state: Pointer to drm plane state to be validated
  1322. * return: 0 if success; error code otherwise
  1323. */
  1324. static int sde_plane_rot_atomic_check(struct drm_plane *plane,
  1325. struct drm_plane_state *state)
  1326. {
  1327. struct sde_plane *psde;
  1328. struct sde_plane_state *pstate, *old_pstate;
  1329. int ret = 0;
  1330. u32 rotation;
  1331. if (!plane || !state) {
  1332. SDE_ERROR("invalid plane/state\n");
  1333. return -EINVAL;
  1334. }
  1335. psde = to_sde_plane(plane);
  1336. pstate = to_sde_plane_state(state);
  1337. old_pstate = to_sde_plane_state(plane->state);
  1338. /* check inline rotation and simplify the transform */
  1339. rotation = drm_rotation_simplify(
  1340. state->rotation,
  1341. DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1342. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1343. if ((rotation & DRM_MODE_ROTATE_180) ||
  1344. (rotation & DRM_MODE_ROTATE_270)) {
  1345. SDE_ERROR_PLANE(psde,
  1346. "invalid rotation transform must be simplified 0x%x\n",
  1347. rotation);
  1348. ret = -EINVAL;
  1349. goto exit;
  1350. }
  1351. if (rotation & DRM_MODE_ROTATE_90) {
  1352. struct msm_drm_private *priv = plane->dev->dev_private;
  1353. struct sde_kms *sde_kms;
  1354. const struct msm_format *msm_fmt;
  1355. const struct sde_format *fmt;
  1356. struct sde_rect src;
  1357. bool q16_data = true;
  1358. POPULATE_RECT(&src, state->src_x, state->src_y,
  1359. state->src_w, state->src_h, q16_data);
  1360. /*
  1361. * DRM framework expects rotation flag in counter-clockwise
  1362. * direction and the HW expects in clockwise direction.
  1363. * Flip the flags to match with HW.
  1364. */
  1365. rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1366. if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num ||
  1367. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom ||
  1368. !psde->pipe_sblk->in_rot_maxdwnscale_nrt ||
  1369. !psde->pipe_sblk->in_rot_maxheight ||
  1370. !psde->pipe_sblk->in_rot_format_list ||
  1371. !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT))) {
  1372. SDE_ERROR_PLANE(psde,
  1373. "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n",
  1374. !psde->pipe_sblk->in_rot_maxdwnscale_rt_num,
  1375. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom,
  1376. !psde->pipe_sblk->in_rot_maxdwnscale_nrt,
  1377. !psde->pipe_sblk->in_rot_format_list,
  1378. !psde->pipe_sblk->in_rot_maxheight,
  1379. psde->features);
  1380. ret = -EINVAL;
  1381. goto exit;
  1382. }
  1383. /* check for valid height */
  1384. if (src.h > psde->pipe_sblk->in_rot_maxheight) {
  1385. SDE_ERROR_PLANE(psde,
  1386. "invalid height for inline rot:%d max:%d\n",
  1387. src.h, psde->pipe_sblk->in_rot_maxheight);
  1388. ret = -EINVAL;
  1389. goto exit;
  1390. }
  1391. if (!sde_plane_enabled(state))
  1392. goto exit;
  1393. /* check for valid formats supported by inline rot */
  1394. sde_kms = to_sde_kms(priv->kms);
  1395. msm_fmt = msm_framebuffer_format(state->fb);
  1396. fmt = to_sde_format(msm_fmt);
  1397. ret = sde_format_validate_fmt(&sde_kms->base, fmt,
  1398. psde->pipe_sblk->in_rot_format_list);
  1399. }
  1400. exit:
  1401. pstate->rotation = rotation;
  1402. return ret;
  1403. }
  1404. static bool _sde_plane_halt_requests(struct drm_plane *plane,
  1405. uint32_t xin_id, bool halt_forced_clk, bool enable)
  1406. {
  1407. struct sde_plane *psde;
  1408. struct msm_drm_private *priv;
  1409. struct sde_vbif_set_xin_halt_params halt_params;
  1410. if (!plane || !plane->dev) {
  1411. SDE_ERROR("invalid arguments\n");
  1412. return false;
  1413. }
  1414. psde = to_sde_plane(plane);
  1415. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1416. SDE_ERROR("invalid pipe reference\n");
  1417. return false;
  1418. }
  1419. priv = plane->dev->dev_private;
  1420. if (!priv || !priv->kms) {
  1421. SDE_ERROR("invalid KMS reference\n");
  1422. return false;
  1423. }
  1424. memset(&halt_params, 0, sizeof(halt_params));
  1425. halt_params.vbif_idx = VBIF_RT;
  1426. halt_params.xin_id = xin_id;
  1427. halt_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1428. halt_params.forced_on = halt_forced_clk;
  1429. halt_params.enable = enable;
  1430. return sde_vbif_set_xin_halt(to_sde_kms(priv->kms), &halt_params);
  1431. }
  1432. void sde_plane_halt_requests(struct drm_plane *plane, bool enable)
  1433. {
  1434. struct sde_plane *psde;
  1435. if (!plane) {
  1436. SDE_ERROR("invalid plane\n");
  1437. return;
  1438. }
  1439. psde = to_sde_plane(plane);
  1440. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1441. SDE_ERROR("invalid pipe reference\n");
  1442. return;
  1443. }
  1444. SDE_EVT32(DRMID(plane), psde->xin_halt_forced_clk, enable);
  1445. psde->xin_halt_forced_clk =
  1446. _sde_plane_halt_requests(plane, psde->pipe_hw->cap->xin_id,
  1447. psde->xin_halt_forced_clk, enable);
  1448. }
  1449. void sde_plane_secure_ctrl_xin_client(struct drm_plane *plane,
  1450. struct drm_crtc *crtc)
  1451. {
  1452. struct sde_plane *psde;
  1453. if (!plane || !crtc) {
  1454. SDE_ERROR("invalid plane/crtc\n");
  1455. return;
  1456. }
  1457. psde = to_sde_plane(plane);
  1458. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  1459. return;
  1460. /* do all VBIF programming for the sec-ui allowed SSPP */
  1461. _sde_plane_set_qos_remap(plane);
  1462. _sde_plane_set_ot_limit(plane, crtc);
  1463. }
  1464. /**
  1465. * sde_plane_rot_install_properties - install plane rotator properties
  1466. * @plane: Pointer to drm plane
  1467. * @catalog: Pointer to mdss configuration
  1468. * return: none
  1469. */
  1470. static void sde_plane_rot_install_properties(struct drm_plane *plane,
  1471. struct sde_mdss_cfg *catalog)
  1472. {
  1473. struct sde_plane *psde = to_sde_plane(plane);
  1474. unsigned int supported_rotations = DRM_MODE_ROTATE_0 |
  1475. DRM_MODE_ROTATE_180 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
  1476. int ret = 0;
  1477. if (!plane || !psde) {
  1478. SDE_ERROR("invalid plane\n");
  1479. return;
  1480. } else if (!catalog) {
  1481. SDE_ERROR("invalid catalog\n");
  1482. return;
  1483. }
  1484. if (!psde->is_virtual && psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT))
  1485. supported_rotations |= DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270;
  1486. ret = drm_plane_create_rotation_property(plane,
  1487. DRM_MODE_ROTATE_0, supported_rotations);
  1488. if (ret) {
  1489. DRM_ERROR("create rotation property failed: %d\n", ret);
  1490. return;
  1491. }
  1492. }
  1493. void sde_plane_clear_multirect(const struct drm_plane_state *drm_state)
  1494. {
  1495. struct sde_plane_state *pstate;
  1496. if (!drm_state)
  1497. return;
  1498. pstate = to_sde_plane_state(drm_state);
  1499. pstate->multirect_index = SDE_SSPP_RECT_SOLO;
  1500. pstate->multirect_mode = SDE_SSPP_MULTIRECT_NONE;
  1501. }
  1502. /**
  1503. * multi_rect validate API allows to validate only R0 and R1 RECT
  1504. * passing for each plane. Client of this API must not pass multiple
  1505. * plane which are not sharing same XIN client. Such calls will fail
  1506. * even though kernel client is passing valid multirect configuration.
  1507. */
  1508. int sde_plane_validate_multirect_v2(struct sde_multirect_plane_states *plane)
  1509. {
  1510. struct sde_plane_state *pstate[R_MAX];
  1511. const struct drm_plane_state *drm_state[R_MAX];
  1512. struct sde_rect src[R_MAX], dst[R_MAX];
  1513. struct sde_plane *sde_plane[R_MAX];
  1514. const struct sde_format *fmt[R_MAX];
  1515. int xin_id[R_MAX];
  1516. bool q16_data = true;
  1517. int i, j, buffer_lines, width_threshold[R_MAX];
  1518. unsigned int max_tile_height = 1;
  1519. bool parallel_fetch_qualified = true;
  1520. enum sde_sspp_multirect_mode mode = SDE_SSPP_MULTIRECT_NONE;
  1521. const struct msm_format *msm_fmt;
  1522. bool const_alpha_enable = true;
  1523. for (i = 0; i < R_MAX; i++) {
  1524. drm_state[i] = i ? plane->r1 : plane->r0;
  1525. if (!drm_state[i]) {
  1526. SDE_ERROR("drm plane state is NULL\n");
  1527. return -EINVAL;
  1528. }
  1529. pstate[i] = to_sde_plane_state(drm_state[i]);
  1530. sde_plane[i] = to_sde_plane(drm_state[i]->plane);
  1531. xin_id[i] = sde_plane[i]->pipe_hw->cap->xin_id;
  1532. for (j = 0; j < i; j++) {
  1533. if (xin_id[i] != xin_id[j]) {
  1534. SDE_ERROR_PLANE(sde_plane[i],
  1535. "invalid multirect validate call base:%d xin_id:%d curr:%d xin:%d\n",
  1536. j, xin_id[j], i, xin_id[i]);
  1537. return -EINVAL;
  1538. }
  1539. }
  1540. msm_fmt = msm_framebuffer_format(drm_state[i]->fb);
  1541. if (!msm_fmt) {
  1542. SDE_ERROR_PLANE(sde_plane[i], "null fb\n");
  1543. return -EINVAL;
  1544. }
  1545. fmt[i] = to_sde_format(msm_fmt);
  1546. if (SDE_FORMAT_IS_UBWC(fmt[i]) &&
  1547. (fmt[i]->tile_height > max_tile_height))
  1548. max_tile_height = fmt[i]->tile_height;
  1549. POPULATE_RECT(&src[i], drm_state[i]->src_x, drm_state[i]->src_y,
  1550. drm_state[i]->src_w, drm_state[i]->src_h, q16_data);
  1551. POPULATE_RECT(&dst[i], drm_state[i]->crtc_x,
  1552. drm_state[i]->crtc_y, drm_state[i]->crtc_w,
  1553. drm_state[i]->crtc_h, !q16_data);
  1554. if (src[i].w != dst[i].w || src[i].h != dst[i].h) {
  1555. SDE_ERROR_PLANE(sde_plane[i],
  1556. "scaling is not supported in multirect mode\n");
  1557. return -EINVAL;
  1558. }
  1559. if (pstate[i]->rotation & DRM_MODE_ROTATE_90) {
  1560. SDE_ERROR_PLANE(sde_plane[i],
  1561. "inline rotation is not supported in mulirect mode\n");
  1562. return -EINVAL;
  1563. }
  1564. if (SDE_FORMAT_IS_YUV(fmt[i])) {
  1565. SDE_ERROR_PLANE(sde_plane[i],
  1566. "Unsupported format for multirect mode\n");
  1567. return -EINVAL;
  1568. }
  1569. /**
  1570. * SSPP PD_MEM is split half - one for each RECT.
  1571. * Tiled formats need 5 lines of buffering while fetching
  1572. * whereas linear formats need only 2 lines.
  1573. * So we cannot support more than half of the supported SSPP
  1574. * width for tiled formats.
  1575. */
  1576. width_threshold[i] = sde_plane[i]->pipe_sblk->maxlinewidth;
  1577. if (SDE_FORMAT_IS_UBWC(fmt[i]))
  1578. width_threshold[i] /= 2;
  1579. if (parallel_fetch_qualified && src[i].w > width_threshold[i])
  1580. parallel_fetch_qualified = false;
  1581. if (sde_plane[i]->is_virtual)
  1582. mode = sde_plane_get_property(pstate[i],
  1583. PLANE_PROP_MULTIRECT_MODE);
  1584. if (pstate[i]->const_alpha_en != const_alpha_enable)
  1585. const_alpha_enable = false;
  1586. }
  1587. buffer_lines = 2 * max_tile_height;
  1588. /**
  1589. * fallback to driver mode selection logic if client is using
  1590. * multirect plane without setting property.
  1591. *
  1592. * validate multirect mode configuration based on rectangle
  1593. */
  1594. switch (mode) {
  1595. case SDE_SSPP_MULTIRECT_NONE:
  1596. if (parallel_fetch_qualified)
  1597. mode = SDE_SSPP_MULTIRECT_PARALLEL;
  1598. else if (TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) ||
  1599. TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines))
  1600. mode = SDE_SSPP_MULTIRECT_TIME_MX;
  1601. else
  1602. SDE_ERROR(
  1603. "planes(%d - %d) multirect mode selection fail\n",
  1604. drm_state[R0]->plane->base.id,
  1605. drm_state[R1]->plane->base.id);
  1606. break;
  1607. case SDE_SSPP_MULTIRECT_PARALLEL:
  1608. if (!parallel_fetch_qualified) {
  1609. SDE_ERROR("R0 plane:%d width_threshold:%d src_w:%d\n",
  1610. drm_state[R0]->plane->base.id,
  1611. width_threshold[R0], src[R0].w);
  1612. SDE_ERROR("R1 plane:%d width_threshold:%d src_w:%d\n",
  1613. drm_state[R1]->plane->base.id,
  1614. width_threshold[R1], src[R1].w);
  1615. SDE_ERROR("parallel fetch not qualified\n");
  1616. mode = SDE_SSPP_MULTIRECT_NONE;
  1617. }
  1618. break;
  1619. case SDE_SSPP_MULTIRECT_TIME_MX:
  1620. if (!TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) &&
  1621. !TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines)) {
  1622. SDE_ERROR(
  1623. "buffer_lines:%d R0 plane:%d dst_y:%d dst_h:%d\n",
  1624. buffer_lines, drm_state[R0]->plane->base.id,
  1625. dst[R0].y, dst[R0].h);
  1626. SDE_ERROR(
  1627. "buffer_lines:%d R1 plane:%d dst_y:%d dst_h:%d\n",
  1628. buffer_lines, drm_state[R1]->plane->base.id,
  1629. dst[R1].y, dst[R1].h);
  1630. SDE_ERROR("time multiplexed fetch not qualified\n");
  1631. mode = SDE_SSPP_MULTIRECT_NONE;
  1632. }
  1633. break;
  1634. default:
  1635. SDE_ERROR("bad mode:%d selection\n", mode);
  1636. mode = SDE_SSPP_MULTIRECT_NONE;
  1637. break;
  1638. }
  1639. for (i = 0; i < R_MAX; i++) {
  1640. pstate[i]->multirect_mode = mode;
  1641. pstate[i]->const_alpha_en = const_alpha_enable;
  1642. }
  1643. if (mode == SDE_SSPP_MULTIRECT_NONE)
  1644. return -EINVAL;
  1645. if (sde_plane[R0]->is_virtual) {
  1646. pstate[R0]->multirect_index = SDE_SSPP_RECT_1;
  1647. pstate[R1]->multirect_index = SDE_SSPP_RECT_0;
  1648. } else {
  1649. pstate[R0]->multirect_index = SDE_SSPP_RECT_0;
  1650. pstate[R1]->multirect_index = SDE_SSPP_RECT_1;
  1651. }
  1652. SDE_DEBUG_PLANE(sde_plane[R0], "R0: %d - %d\n",
  1653. pstate[R0]->multirect_mode, pstate[R0]->multirect_index);
  1654. SDE_DEBUG_PLANE(sde_plane[R1], "R1: %d - %d\n",
  1655. pstate[R1]->multirect_mode, pstate[R1]->multirect_index);
  1656. return 0;
  1657. }
  1658. /**
  1659. * sde_plane_ctl_flush - set/clear control flush bitmask for the given plane
  1660. * @plane: Pointer to drm plane structure
  1661. * @ctl: Pointer to hardware control driver
  1662. * @set: set if true else clear
  1663. */
  1664. void sde_plane_ctl_flush(struct drm_plane *plane, struct sde_hw_ctl *ctl,
  1665. bool set)
  1666. {
  1667. if (!plane || !ctl) {
  1668. SDE_ERROR("invalid parameters\n");
  1669. return;
  1670. }
  1671. if (!ctl->ops.update_bitmask_sspp) {
  1672. SDE_ERROR("invalid ops\n");
  1673. return;
  1674. }
  1675. ctl->ops.update_bitmask_sspp(ctl, sde_plane_pipe(plane), set);
  1676. }
  1677. static int sde_plane_prepare_fb(struct drm_plane *plane,
  1678. struct drm_plane_state *new_state)
  1679. {
  1680. struct drm_framebuffer *fb = new_state->fb;
  1681. struct sde_plane *psde = to_sde_plane(plane);
  1682. struct sde_plane_state *pstate = to_sde_plane_state(new_state);
  1683. struct sde_hw_fmt_layout layout;
  1684. struct msm_gem_address_space *aspace;
  1685. int ret;
  1686. if (!fb)
  1687. return 0;
  1688. SDE_DEBUG_PLANE(psde, "FB[%u]\n", fb->base.id);
  1689. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  1690. if (ret) {
  1691. SDE_ERROR_PLANE(psde, "Failed to get aspace\n");
  1692. return ret;
  1693. }
  1694. /* cache aspace */
  1695. pstate->aspace = aspace;
  1696. /*
  1697. * when transitioning from secure to non-secure,
  1698. * plane->prepare_fb happens before the commit. In such case,
  1699. * defer the prepare_fb and handled it late, during the commit
  1700. * after attaching the domains as part of the transition
  1701. */
  1702. pstate->defer_prepare_fb = (aspace && !aspace->domain_attached) ?
  1703. true : false;
  1704. if (pstate->defer_prepare_fb) {
  1705. SDE_EVT32(DRMID(plane), psde->pipe);
  1706. SDE_DEBUG_PLANE(psde,
  1707. "domain not attached, prepare_fb handled later\n");
  1708. return 0;
  1709. }
  1710. if (pstate->aspace && fb) {
  1711. ret = msm_framebuffer_prepare(fb,
  1712. pstate->aspace);
  1713. if (ret) {
  1714. SDE_ERROR("failed to prepare framebuffer\n");
  1715. return ret;
  1716. }
  1717. }
  1718. /* validate framebuffer layout before commit */
  1719. ret = sde_format_populate_layout(pstate->aspace,
  1720. fb, &layout);
  1721. if (ret) {
  1722. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  1723. return ret;
  1724. }
  1725. return 0;
  1726. }
  1727. static void sde_plane_cleanup_fb(struct drm_plane *plane,
  1728. struct drm_plane_state *old_state)
  1729. {
  1730. struct sde_plane *psde = to_sde_plane(plane);
  1731. struct sde_plane_state *old_pstate;
  1732. if (!old_state || !old_state->fb || !plane)
  1733. return;
  1734. old_pstate = to_sde_plane_state(old_state);
  1735. SDE_DEBUG_PLANE(psde, "FB[%u]\n", old_state->fb->base.id);
  1736. msm_framebuffer_cleanup(old_state->fb, old_pstate->aspace);
  1737. }
  1738. static void _sde_plane_sspp_atomic_check_mode_changed(struct sde_plane *psde,
  1739. struct drm_plane_state *state,
  1740. struct drm_plane_state *old_state)
  1741. {
  1742. struct sde_plane_state *pstate = to_sde_plane_state(state);
  1743. struct sde_plane_state *old_pstate = to_sde_plane_state(old_state);
  1744. struct drm_framebuffer *fb, *old_fb;
  1745. /* no need to check it again */
  1746. if (pstate->dirty == SDE_PLANE_DIRTY_ALL)
  1747. return;
  1748. if (!sde_plane_enabled(state) || !sde_plane_enabled(old_state)
  1749. || psde->is_error) {
  1750. SDE_DEBUG_PLANE(psde,
  1751. "enabling/disabling full modeset required\n");
  1752. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1753. } else if (to_sde_plane_state(old_state)->pending) {
  1754. SDE_DEBUG_PLANE(psde, "still pending\n");
  1755. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1756. } else if (pstate->multirect_index != old_pstate->multirect_index ||
  1757. pstate->multirect_mode != old_pstate->multirect_mode) {
  1758. SDE_DEBUG_PLANE(psde, "multirect config updated\n");
  1759. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1760. } else if (state->src_w != old_state->src_w ||
  1761. state->src_h != old_state->src_h ||
  1762. state->src_x != old_state->src_x ||
  1763. state->src_y != old_state->src_y) {
  1764. SDE_DEBUG_PLANE(psde, "src rect updated\n");
  1765. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1766. } else if (state->crtc_w != old_state->crtc_w ||
  1767. state->crtc_h != old_state->crtc_h ||
  1768. state->crtc_x != old_state->crtc_x ||
  1769. state->crtc_y != old_state->crtc_y) {
  1770. SDE_DEBUG_PLANE(psde, "crtc rect updated\n");
  1771. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1772. } else if (pstate->excl_rect.w != old_pstate->excl_rect.w ||
  1773. pstate->excl_rect.h != old_pstate->excl_rect.h ||
  1774. pstate->excl_rect.x != old_pstate->excl_rect.x ||
  1775. pstate->excl_rect.y != old_pstate->excl_rect.y) {
  1776. SDE_DEBUG_PLANE(psde, "excl_rect updated\n");
  1777. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1778. } else if (pstate->rotation != old_pstate->rotation) {
  1779. SDE_DEBUG_PLANE(psde, "rotation updated 0x%x->0x%x\n",
  1780. pstate->rotation, old_pstate->rotation);
  1781. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT;
  1782. }
  1783. fb = state->fb;
  1784. old_fb = old_state->fb;
  1785. if (!fb || !old_fb) {
  1786. SDE_DEBUG_PLANE(psde, "can't compare fb handles\n");
  1787. } else if ((fb->format->format != old_fb->format->format) ||
  1788. pstate->const_alpha_en != old_pstate->const_alpha_en) {
  1789. SDE_DEBUG_PLANE(psde, "format change\n");
  1790. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT | SDE_PLANE_DIRTY_RECTS;
  1791. } else {
  1792. uint64_t new_mod = fb->modifier;
  1793. uint64_t old_mod = old_fb->modifier;
  1794. uint32_t *new_pitches = fb->pitches;
  1795. uint32_t *old_pitches = old_fb->pitches;
  1796. uint32_t *new_offset = fb->offsets;
  1797. uint32_t *old_offset = old_fb->offsets;
  1798. int i;
  1799. if (new_mod != old_mod) {
  1800. SDE_DEBUG_PLANE(psde,
  1801. "format modifiers change new_mode:%llu old_mode:%llu\n",
  1802. new_mod, old_mod);
  1803. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1804. SDE_PLANE_DIRTY_RECTS;
  1805. }
  1806. for (i = 0; i < ARRAY_SIZE(fb->pitches); i++) {
  1807. if (new_pitches[i] != old_pitches[i]) {
  1808. SDE_DEBUG_PLANE(psde,
  1809. "pitches change plane:%d old_pitches:%u new_pitches:%u\n",
  1810. i, old_pitches[i], new_pitches[i]);
  1811. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1812. break;
  1813. }
  1814. }
  1815. for (i = 0; i < ARRAY_SIZE(fb->offsets); i++) {
  1816. if (new_offset[i] != old_offset[i]) {
  1817. SDE_DEBUG_PLANE(psde,
  1818. "offset change plane:%d old_offset:%u new_offset:%u\n",
  1819. i, old_offset[i], new_offset[i]);
  1820. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1821. SDE_PLANE_DIRTY_RECTS;
  1822. break;
  1823. }
  1824. }
  1825. }
  1826. }
  1827. int sde_plane_validate_src_addr(struct drm_plane *plane,
  1828. unsigned long base_addr, u32 size)
  1829. {
  1830. int ret = -EINVAL;
  1831. u32 addr;
  1832. struct sde_plane *psde = to_sde_plane(plane);
  1833. if (!psde || !base_addr || !size) {
  1834. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1835. return ret;
  1836. }
  1837. if (psde->pipe_hw && psde->pipe_hw->ops.get_sourceaddress) {
  1838. addr = psde->pipe_hw->ops.get_sourceaddress(psde->pipe_hw,
  1839. is_sde_plane_virtual(plane));
  1840. if ((addr >= base_addr) && (addr < (base_addr + size)))
  1841. ret = 0;
  1842. }
  1843. return ret;
  1844. }
  1845. static inline bool _sde_plane_is_pre_downscale_enabled(
  1846. struct sde_hw_inline_pre_downscale_cfg *pre_down)
  1847. {
  1848. return pre_down->pre_downscale_x_0 || pre_down->pre_downscale_y_0;
  1849. }
  1850. static int _sde_plane_validate_scaler_v2(struct sde_plane *psde,
  1851. struct sde_plane_state *pstate,
  1852. const struct sde_format *fmt,
  1853. uint32_t img_w, uint32_t img_h,
  1854. uint32_t src_w, uint32_t src_h,
  1855. uint32_t deci_w, uint32_t deci_h)
  1856. {
  1857. struct sde_hw_inline_pre_downscale_cfg *pd_cfg;
  1858. bool pre_down_en;
  1859. int i;
  1860. if (!psde || !pstate || !fmt) {
  1861. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1862. return -EINVAL;
  1863. }
  1864. if (psde->debugfs_default_scale ||
  1865. (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2 &&
  1866. pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2_CHECK))
  1867. return 0;
  1868. pd_cfg = &pstate->pre_down;
  1869. pre_down_en = _sde_plane_is_pre_downscale_enabled(pd_cfg);
  1870. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_INVALID;
  1871. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1872. uint32_t hor_req_pixels, hor_fetch_pixels;
  1873. uint32_t vert_req_pixels, vert_fetch_pixels;
  1874. uint32_t src_w_tmp, src_h_tmp;
  1875. uint32_t scaler_w, scaler_h;
  1876. uint32_t pre_down_ratio_x = 1, pre_down_ratio_y = 1;
  1877. bool rot;
  1878. /* re-use color plane 1's config for plane 2 */
  1879. if (i == 2)
  1880. continue;
  1881. if (pre_down_en) {
  1882. if (i == 0 && pd_cfg->pre_downscale_x_0)
  1883. pre_down_ratio_x = pd_cfg->pre_downscale_x_0;
  1884. if (i == 0 && pd_cfg->pre_downscale_y_0)
  1885. pre_down_ratio_y = pd_cfg->pre_downscale_y_0;
  1886. if ((i == 1 || i == 2) && pd_cfg->pre_downscale_x_1)
  1887. pre_down_ratio_x = pd_cfg->pre_downscale_x_1;
  1888. if ((i == 1 || i == 2) && pd_cfg->pre_downscale_y_1)
  1889. pre_down_ratio_y = pd_cfg->pre_downscale_y_1;
  1890. SDE_DEBUG_PLANE(psde, "pre_down[%d]: x:%d, y:%d\n",
  1891. i, pre_down_ratio_x, pre_down_ratio_y);
  1892. }
  1893. src_w_tmp = src_w;
  1894. src_h_tmp = src_h;
  1895. /*
  1896. * For chroma plane, width is half for the following sub sampled
  1897. * formats. Except in case of decimation, where hardware avoids
  1898. * 1 line of decimation instead of downsampling.
  1899. */
  1900. if (i == 1) {
  1901. if (!deci_w &&
  1902. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1903. fmt->chroma_sample == SDE_CHROMA_H2V1))
  1904. src_w_tmp >>= 1;
  1905. if (!deci_h &&
  1906. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1907. fmt->chroma_sample == SDE_CHROMA_H1V2))
  1908. src_h_tmp >>= 1;
  1909. }
  1910. hor_req_pixels = pstate->pixel_ext.roi_w[i];
  1911. vert_req_pixels = pstate->pixel_ext.roi_h[i];
  1912. hor_fetch_pixels = DECIMATED_DIMENSION(src_w_tmp +
  1913. (int8_t)(pstate->pixel_ext.left_ftch[i] & 0xFF) +
  1914. (int8_t)(pstate->pixel_ext.right_ftch[i] & 0xFF),
  1915. deci_w);
  1916. vert_fetch_pixels = DECIMATED_DIMENSION(src_h_tmp +
  1917. (int8_t)(pstate->pixel_ext.top_ftch[i] & 0xFF) +
  1918. (int8_t)(pstate->pixel_ext.btm_ftch[i] & 0xFF),
  1919. deci_h);
  1920. if ((hor_req_pixels != hor_fetch_pixels) ||
  1921. (hor_fetch_pixels > img_w) ||
  1922. (vert_req_pixels != vert_fetch_pixels) ||
  1923. (vert_fetch_pixels > img_h)) {
  1924. SDE_ERROR_PLANE(psde,
  1925. "req %d/%d, fetch %d/%d, src %dx%d\n",
  1926. hor_req_pixels, vert_req_pixels,
  1927. hor_fetch_pixels, vert_fetch_pixels,
  1928. img_w, img_h);
  1929. return -EINVAL;
  1930. }
  1931. /*
  1932. * swap the scaler src width & height for inline-rotation 90
  1933. * comparison with Pixel-Extension, as PE is based on
  1934. * pre-rotation and QSEED is based on post-rotation
  1935. */
  1936. rot = pstate->rotation & DRM_MODE_ROTATE_90;
  1937. scaler_w = rot ? pstate->scaler3_cfg.src_height[i]
  1938. : pstate->scaler3_cfg.src_width[i];
  1939. scaler_h = rot ? pstate->scaler3_cfg.src_width[i]
  1940. : pstate->scaler3_cfg.src_height[i];
  1941. /*
  1942. * Alpha plane can only be scaled using bilinear or pixel
  1943. * repeat/drop, src_width and src_height are only specified
  1944. * for Y and UV plane
  1945. */
  1946. if (i != 3 && (hor_req_pixels / pre_down_ratio_x != scaler_w ||
  1947. vert_req_pixels / pre_down_ratio_y !=
  1948. scaler_h)) {
  1949. SDE_ERROR_PLANE(psde,
  1950. "roi[%d] roi:%dx%d scaler:%dx%d src:%dx%d rot:%d pd:%d/%d\n",
  1951. i, pstate->pixel_ext.roi_w[i],
  1952. pstate->pixel_ext.roi_h[i], scaler_w, scaler_h,
  1953. src_w, src_h, rot, pre_down_ratio_x, pre_down_ratio_y);
  1954. return -EINVAL;
  1955. }
  1956. /*
  1957. * SSPP fetch , unpack output and QSEED3 input lines need
  1958. * to match for Y plane
  1959. */
  1960. if (i == 0 &&
  1961. (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  1962. BIT(SDE_DRM_DEINTERLACE)) &&
  1963. ((pstate->scaler3_cfg.src_height[i] != (src_h/2)) ||
  1964. (pstate->pixel_ext.roi_h[i] != (src_h/2)))) {
  1965. SDE_ERROR_PLANE(psde,
  1966. "de-interlace fail roi[%d] %d/%d, src %dx%d, src %dx%d\n",
  1967. i, pstate->pixel_ext.roi_w[i],
  1968. pstate->pixel_ext.roi_h[i],
  1969. pstate->scaler3_cfg.src_width[i],
  1970. pstate->scaler3_cfg.src_height[i],
  1971. src_w, src_h);
  1972. return -EINVAL;
  1973. }
  1974. }
  1975. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2;
  1976. return 0;
  1977. }
  1978. static inline bool _sde_plane_has_pre_downscale(struct sde_plane *psde)
  1979. {
  1980. return (psde->features & BIT(SDE_SSPP_PREDOWNSCALE));
  1981. }
  1982. static int _sde_atomic_check_pre_downscale(struct sde_plane *psde,
  1983. struct sde_plane_state *pstate, struct sde_rect *dst,
  1984. u32 src_w, u32 src_h)
  1985. {
  1986. int ret = 0;
  1987. u32 min_ratio_numer, min_ratio_denom;
  1988. struct sde_hw_inline_pre_downscale_cfg *pd_cfg = &pstate->pre_down;
  1989. bool pd_x;
  1990. bool pd_y;
  1991. if (!_sde_plane_is_pre_downscale_enabled(pd_cfg))
  1992. return ret;
  1993. pd_x = pd_cfg->pre_downscale_x_0 > 1;
  1994. pd_y = pd_cfg->pre_downscale_y_0 > 1;
  1995. min_ratio_numer = psde->pipe_sblk->in_rot_maxdwnscale_rt_nopd_num;
  1996. min_ratio_denom = psde->pipe_sblk->in_rot_maxdwnscale_rt_nopd_denom;
  1997. if (pd_x && !_sde_plane_has_pre_downscale(psde)) {
  1998. SDE_ERROR_PLANE(psde,
  1999. "hw does not support pre-downscale X: 0x%x\n",
  2000. psde->features);
  2001. ret = -EINVAL;
  2002. } else if (pd_y && !(psde->features & BIT(SDE_SSPP_PREDOWNSCALE_Y))) {
  2003. SDE_ERROR_PLANE(psde,
  2004. "hw does not support pre-downscale Y: 0x%x\n",
  2005. psde->features);
  2006. ret = -EINVAL;
  2007. } else if (!min_ratio_numer || !min_ratio_denom) {
  2008. SDE_ERROR_PLANE(psde,
  2009. "min downscale ratio not set! %u / %u\n",
  2010. min_ratio_numer, min_ratio_denom);
  2011. ret = -EINVAL;
  2012. /* compare pre-rotated src w/h with post-rotated dst h/w resp. */
  2013. } else if (pd_x && (src_w < mult_frac(dst->h, min_ratio_numer,
  2014. min_ratio_denom))) {
  2015. SDE_ERROR_PLANE(psde,
  2016. "failed min downscale-x check %u->%u, %u/%u\n",
  2017. src_w, dst->h, min_ratio_numer, min_ratio_denom);
  2018. ret = -EINVAL;
  2019. } else if (pd_y && (src_h < mult_frac(dst->w, min_ratio_numer,
  2020. min_ratio_denom))) {
  2021. SDE_ERROR_PLANE(psde,
  2022. "failed min downscale-y check %u->%u, %u/%u\n",
  2023. src_h, dst->w, min_ratio_numer, min_ratio_denom);
  2024. ret = -EINVAL;
  2025. }
  2026. return ret;
  2027. }
  2028. static void _sde_plane_get_max_downscale_limits(struct sde_plane *psde,
  2029. struct sde_plane_state *pstate, bool rt_client, u32 dst_h,
  2030. u32 src_h, u32 *max_numer_w, u32 *max_denom_w,
  2031. u32 *max_numer_h, u32 *max_denom_h)
  2032. {
  2033. bool rotated, has_predown, default_scale;
  2034. const struct sde_sspp_sub_blks *sblk;
  2035. struct sde_hw_inline_pre_downscale_cfg *pd = NULL;
  2036. rotated = pstate->rotation & DRM_MODE_ROTATE_90;
  2037. sblk = psde->pipe_sblk;
  2038. *max_numer_w = sblk->maxdwnscale;
  2039. *max_denom_w = 1;
  2040. *max_numer_h = sblk->maxdwnscale;
  2041. *max_denom_h = 1;
  2042. has_predown = _sde_plane_has_pre_downscale(psde);
  2043. if (has_predown)
  2044. pd = &pstate->pre_down;
  2045. default_scale = psde->debugfs_default_scale ||
  2046. (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2 &&
  2047. pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2_CHECK);
  2048. /**
  2049. * Inline rotation has different max vertical downscaling limits since
  2050. * the source-width becomes the scaler's pre-downscaled source-height.
  2051. **/
  2052. if (rotated) {
  2053. if (pd != NULL && rt_client && has_predown) {
  2054. if (default_scale)
  2055. pd->pre_downscale_x_0 = (src_h >
  2056. mult_frac(dst_h, 11, 5)) ? 2 : 0;
  2057. *max_numer_h = pd->pre_downscale_x_0 ?
  2058. sblk->in_rot_maxdwnscale_rt_num :
  2059. sblk->in_rot_maxdwnscale_rt_nopd_num;
  2060. *max_denom_h = pd->pre_downscale_x_0 ?
  2061. sblk->in_rot_maxdwnscale_rt_denom :
  2062. sblk->in_rot_maxdwnscale_rt_nopd_denom;
  2063. } else if (rt_client) {
  2064. *max_numer_h = sblk->in_rot_maxdwnscale_rt_num;
  2065. *max_denom_h = sblk->in_rot_maxdwnscale_rt_denom;
  2066. } else {
  2067. *max_numer_h = sblk->in_rot_maxdwnscale_nrt;
  2068. }
  2069. }
  2070. }
  2071. static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state,
  2072. struct sde_plane *psde, const struct sde_format *fmt,
  2073. struct sde_plane_state *pstate, struct sde_rect *src,
  2074. struct sde_rect *dst, u32 width, u32 height)
  2075. {
  2076. int ret = 0;
  2077. uint32_t deci_w, deci_h, src_deci_w, src_deci_h;
  2078. uint32_t scaler_src_w, scaler_src_h;
  2079. uint32_t max_downscale_num_w, max_downscale_denom_w;
  2080. uint32_t max_downscale_num_h, max_downscale_denom_h;
  2081. uint32_t max_upscale, max_linewidth;
  2082. bool inline_rotation, rt_client;
  2083. struct drm_crtc *crtc;
  2084. struct drm_crtc_state *new_cstate;
  2085. const struct sde_sspp_sub_blks *sblk;
  2086. if (!state || !state->state || !state->crtc) {
  2087. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  2088. return -EINVAL;
  2089. }
  2090. deci_w = sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  2091. deci_h = sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  2092. src_deci_w = DECIMATED_DIMENSION(src->w, deci_w);
  2093. src_deci_h = DECIMATED_DIMENSION(src->h, deci_h);
  2094. /* with inline rotator, the source of the scaler is post-rotated */
  2095. inline_rotation = pstate->rotation & DRM_MODE_ROTATE_90 ? true : false;
  2096. if (inline_rotation) {
  2097. scaler_src_w = src_deci_h;
  2098. scaler_src_h = src_deci_w;
  2099. } else {
  2100. scaler_src_w = src_deci_w;
  2101. scaler_src_h = src_deci_h;
  2102. }
  2103. sblk = psde->pipe_sblk;
  2104. max_upscale = sblk->maxupscale;
  2105. if (inline_rotation)
  2106. max_linewidth = sblk->in_rot_maxheight;
  2107. else if (scaler_src_w != state->crtc_w || scaler_src_h != state->crtc_h)
  2108. max_linewidth = sblk->scaling_linewidth;
  2109. else
  2110. max_linewidth = sblk->maxlinewidth;
  2111. crtc = state->crtc;
  2112. new_cstate = drm_atomic_get_new_crtc_state(state->state, crtc);
  2113. rt_client = sde_crtc_is_rt_client(crtc, new_cstate);
  2114. _sde_plane_get_max_downscale_limits(psde, pstate, rt_client, dst->h,
  2115. scaler_src_h, &max_downscale_num_w, &max_downscale_denom_w,
  2116. &max_downscale_num_h, &max_downscale_denom_h);
  2117. /* decimation validation */
  2118. if ((deci_w || deci_h)
  2119. && ((deci_w > sblk->maxhdeciexp)
  2120. || (deci_h > sblk->maxvdeciexp))) {
  2121. SDE_ERROR_PLANE(psde, "too much decimation requested\n");
  2122. ret = -EINVAL;
  2123. } else if ((deci_w || deci_h)
  2124. && (fmt->fetch_mode != SDE_FETCH_LINEAR)) {
  2125. SDE_ERROR_PLANE(psde, "decimation requires linear fetch\n");
  2126. ret = -EINVAL;
  2127. } else if (!(psde->features & SDE_SSPP_SCALER) &&
  2128. ((src->w != dst->w) || (src->h != dst->h))) {
  2129. SDE_ERROR_PLANE(psde,
  2130. "pipe doesn't support scaling %ux%u->%ux%u\n",
  2131. src->w, src->h, dst->w, dst->h);
  2132. ret = -EINVAL;
  2133. /* check scaler source width */
  2134. } else if (scaler_src_w > max_linewidth) {
  2135. SDE_ERROR_PLANE(psde,
  2136. "invalid src w:%u, scaler w:%u, line w:%u, rot: %d\n",
  2137. src->w, scaler_src_w, max_linewidth, inline_rotation);
  2138. ret = -E2BIG;
  2139. /* check max scaler capability */
  2140. } else if (((scaler_src_w * max_upscale) < dst->w) ||
  2141. ((scaler_src_h * max_upscale) < dst->h) ||
  2142. (mult_frac(dst->w, max_downscale_num_w, max_downscale_denom_w)
  2143. < scaler_src_w) ||
  2144. (mult_frac(dst->h, max_downscale_num_h, max_downscale_denom_h)
  2145. < scaler_src_h)) {
  2146. SDE_ERROR_PLANE(psde,
  2147. "too much scaling %ux%u->%ux%u rot:%d dwn:%d/%d %d/%d\n",
  2148. scaler_src_w, scaler_src_h, dst->w, dst->h,
  2149. inline_rotation, max_downscale_num_w,
  2150. max_downscale_denom_w, max_downscale_num_h,
  2151. max_downscale_denom_h);
  2152. ret = -E2BIG;
  2153. /* check inline pre-downscale support */
  2154. } else if (inline_rotation && _sde_atomic_check_pre_downscale(psde,
  2155. pstate, dst, src_deci_w, src_deci_h)) {
  2156. ret = -EINVAL;
  2157. /* QSEED validation */
  2158. } else if (_sde_plane_validate_scaler_v2(psde, pstate, fmt,
  2159. width, height, src->w, src->h,
  2160. deci_w, deci_h)) {
  2161. ret = -EINVAL;
  2162. }
  2163. return ret;
  2164. }
  2165. static int _sde_atomic_check_excl_rect(struct sde_plane *psde,
  2166. struct sde_plane_state *pstate, struct sde_rect *src,
  2167. const struct sde_format *fmt, int ret)
  2168. {
  2169. /* check excl rect configs */
  2170. if (!ret && pstate->excl_rect.w && pstate->excl_rect.h) {
  2171. struct sde_rect intersect;
  2172. /*
  2173. * Check exclusion rect against src rect.
  2174. * it must intersect with source rect.
  2175. */
  2176. sde_kms_rect_intersect(src, &pstate->excl_rect, &intersect);
  2177. if (intersect.w != pstate->excl_rect.w ||
  2178. intersect.h != pstate->excl_rect.h ||
  2179. SDE_FORMAT_IS_YUV(fmt)) {
  2180. SDE_ERROR_PLANE(psde,
  2181. "invalid excl_rect:{%d,%d,%d,%d} src:{%d,%d,%d,%d}, fmt: %4.4s\n",
  2182. pstate->excl_rect.x, pstate->excl_rect.y,
  2183. pstate->excl_rect.w, pstate->excl_rect.h,
  2184. src->x, src->y, src->w, src->h,
  2185. (char *)&fmt->base.pixel_format);
  2186. ret = -EINVAL;
  2187. }
  2188. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  2189. pstate->excl_rect.x, pstate->excl_rect.y,
  2190. pstate->excl_rect.w, pstate->excl_rect.h);
  2191. }
  2192. return ret;
  2193. }
  2194. static int _sde_plane_validate_shared_crtc(struct sde_plane *psde,
  2195. struct drm_plane_state *state)
  2196. {
  2197. struct sde_kms *sde_kms;
  2198. struct sde_splash_display *splash_display;
  2199. int i;
  2200. sde_kms = _sde_plane_get_kms(&psde->base);
  2201. if (!sde_kms || !state->crtc)
  2202. return 0;
  2203. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  2204. splash_display = &sde_kms->splash_data.splash_display[i];
  2205. if (splash_display && splash_display->cont_splash_enabled &&
  2206. splash_display->encoder &&
  2207. state->crtc != splash_display->encoder->crtc) {
  2208. struct sde_sspp_index_info *pipe_info = &splash_display->pipe_info;
  2209. if (test_bit(psde->pipe, pipe_info->pipes) ||
  2210. test_bit(psde->pipe, pipe_info->virt_pipes)) {
  2211. SDE_ERROR_PLANE(psde, "pipe:%d used in cont-splash on crtc:%d\n",
  2212. psde->pipe,
  2213. splash_display->encoder->crtc->base.id);
  2214. return -EINVAL;
  2215. }
  2216. }
  2217. }
  2218. return 0;
  2219. }
  2220. static int _sde_plane_sspp_atomic_check_helper(struct sde_plane *psde,
  2221. const struct sde_format *fmt,
  2222. struct sde_rect src, struct sde_rect dst,
  2223. u32 width, u32 height)
  2224. {
  2225. int ret = 0;
  2226. u32 min_src_size = SDE_FORMAT_IS_YUV(fmt) ? 2 : 1;
  2227. if (SDE_FORMAT_IS_YUV(fmt) &&
  2228. (!(psde->features & SDE_SSPP_SCALER) ||
  2229. !(psde->features & (BIT(SDE_SSPP_CSC)
  2230. | BIT(SDE_SSPP_CSC_10BIT))))) {
  2231. SDE_ERROR_PLANE(psde,
  2232. "plane doesn't have scaler/csc for yuv\n");
  2233. ret = -EINVAL;
  2234. /* check src bounds */
  2235. } else if (width > MAX_IMG_WIDTH || height > MAX_IMG_HEIGHT ||
  2236. src.w < min_src_size || src.h < min_src_size ||
  2237. CHECK_LAYER_BOUNDS(src.x, src.w, width) ||
  2238. CHECK_LAYER_BOUNDS(src.y, src.h, height)) {
  2239. SDE_ERROR_PLANE(psde, "invalid source %u, %u, %ux%u\n",
  2240. src.x, src.y, src.w, src.h);
  2241. ret = -E2BIG;
  2242. /* valid yuv image */
  2243. } else if (SDE_FORMAT_IS_YUV(fmt) && ((src.x & 0x1) || (src.y & 0x1) ||
  2244. (src.w & 0x1) || (src.h & 0x1))) {
  2245. SDE_ERROR_PLANE(psde, "invalid yuv source %u, %u, %ux%u\n",
  2246. src.x, src.y, src.w, src.h);
  2247. ret = -EINVAL;
  2248. /* min dst support */
  2249. } else if (dst.w < 0x1 || dst.h < 0x1) {
  2250. SDE_ERROR_PLANE(psde, "invalid dest rect %u, %u, %ux%u\n",
  2251. dst.x, dst.y, dst.w, dst.h);
  2252. ret = -EINVAL;
  2253. } else if (SDE_FORMAT_IS_UBWC(fmt) &&
  2254. !psde->catalog->ubwc_rev) {
  2255. SDE_ERROR_PLANE(psde, "ubwc not supported\n");
  2256. ret = -EINVAL;
  2257. }
  2258. return ret;
  2259. }
  2260. static int sde_plane_sspp_atomic_check(struct drm_plane *plane,
  2261. struct drm_plane_state *state)
  2262. {
  2263. int ret = 0;
  2264. struct sde_plane *psde;
  2265. struct sde_plane_state *pstate;
  2266. const struct msm_format *msm_fmt;
  2267. const struct sde_format *fmt;
  2268. struct sde_rect src, dst;
  2269. bool q16_data = true;
  2270. struct drm_framebuffer *fb;
  2271. u32 width;
  2272. u32 height;
  2273. psde = to_sde_plane(plane);
  2274. pstate = to_sde_plane_state(state);
  2275. if (!psde->pipe_sblk) {
  2276. SDE_ERROR_PLANE(psde, "invalid catalog\n");
  2277. return -EINVAL;
  2278. }
  2279. /* src values are in Q16 fixed point, convert to integer */
  2280. POPULATE_RECT(&src, state->src_x, state->src_y,
  2281. state->src_w, state->src_h, q16_data);
  2282. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y, state->crtc_w,
  2283. state->crtc_h, !q16_data);
  2284. SDE_DEBUG_PLANE(psde, "check %d -> %d\n",
  2285. sde_plane_enabled(plane->state), sde_plane_enabled(state));
  2286. if (!sde_plane_enabled(state))
  2287. goto modeset_update;
  2288. fb = state->fb;
  2289. width = fb ? state->fb->width : 0x0;
  2290. height = fb ? state->fb->height : 0x0;
  2291. SDE_DEBUG("plane%d sspp:%x/%dx%d/%4.4s/%llx\n",
  2292. plane->base.id,
  2293. pstate->rotation,
  2294. width, height,
  2295. fb ? (char *) &state->fb->format->format : 0x0,
  2296. fb ? state->fb->modifier : 0x0);
  2297. SDE_DEBUG("src:%dx%d %d,%d crtc:%dx%d+%d+%d\n",
  2298. state->src_w >> 16, state->src_h >> 16,
  2299. state->src_x >> 16, state->src_y >> 16,
  2300. state->crtc_w, state->crtc_h,
  2301. state->crtc_x, state->crtc_y);
  2302. msm_fmt = msm_framebuffer_format(fb);
  2303. fmt = to_sde_format(msm_fmt);
  2304. ret = _sde_plane_sspp_atomic_check_helper(psde, fmt, src, dst, width,
  2305. height);
  2306. if (ret)
  2307. return ret;
  2308. ret = _sde_atomic_check_decimation_scaler(state, psde, fmt, pstate,
  2309. &src, &dst, width, height);
  2310. if (ret)
  2311. return ret;
  2312. ret = _sde_atomic_check_excl_rect(psde, pstate,
  2313. &src, fmt, ret);
  2314. if (ret)
  2315. return ret;
  2316. ret = _sde_plane_validate_shared_crtc(psde, state);
  2317. if (ret)
  2318. return ret;
  2319. pstate->const_alpha_en = fmt->alpha_enable &&
  2320. (SDE_DRM_BLEND_OP_OPAQUE !=
  2321. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)) &&
  2322. (pstate->stage != SDE_STAGE_0);
  2323. modeset_update:
  2324. if (!ret)
  2325. _sde_plane_sspp_atomic_check_mode_changed(psde,
  2326. state, plane->state);
  2327. return ret;
  2328. }
  2329. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  2330. static int sde_plane_atomic_check(struct drm_plane *plane,
  2331. struct drm_atomic_state *atomic_state)
  2332. #else
  2333. static int sde_plane_atomic_check(struct drm_plane *plane,
  2334. struct drm_plane_state *state)
  2335. #endif
  2336. {
  2337. int ret = 0;
  2338. struct sde_plane *psde;
  2339. struct sde_plane_state *pstate;
  2340. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  2341. struct drm_plane_state *state = drm_atomic_get_new_plane_state(atomic_state, plane);
  2342. #endif
  2343. if (!plane || !state) {
  2344. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  2345. !plane, !state);
  2346. ret = -EINVAL;
  2347. goto exit;
  2348. }
  2349. psde = to_sde_plane(plane);
  2350. pstate = to_sde_plane_state(state);
  2351. SDE_DEBUG_PLANE(psde, "\n");
  2352. ret = sde_plane_rot_atomic_check(plane, state);
  2353. if (ret)
  2354. goto exit;
  2355. ret = sde_plane_sspp_atomic_check(plane, state);
  2356. exit:
  2357. return ret;
  2358. }
  2359. void sde_plane_flush(struct drm_plane *plane)
  2360. {
  2361. struct sde_plane *psde;
  2362. struct sde_plane_state *pstate;
  2363. if (!plane || !plane->state) {
  2364. SDE_ERROR("invalid plane\n");
  2365. return;
  2366. }
  2367. psde = to_sde_plane(plane);
  2368. pstate = to_sde_plane_state(plane->state);
  2369. /*
  2370. * These updates have to be done immediately before the plane flush
  2371. * timing, and may not be moved to the atomic_update/mode_set functions.
  2372. */
  2373. if (psde->is_error)
  2374. /* force white frame with 100% alpha pipe output on error */
  2375. _sde_plane_color_fill(psde, 0xFFFFFF, 0xFF);
  2376. else if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG)
  2377. /* force 100% alpha */
  2378. _sde_plane_color_fill(psde, psde->color_fill, 0xFF);
  2379. else if (psde->pipe_hw && psde->csc_ptr && psde->pipe_hw->ops.setup_csc)
  2380. psde->pipe_hw->ops.setup_csc(psde->pipe_hw, psde->csc_ptr);
  2381. /* flag h/w flush complete */
  2382. if (plane->state)
  2383. pstate->pending = false;
  2384. }
  2385. /**
  2386. * sde_plane_set_error: enable/disable error condition
  2387. * @plane: pointer to drm_plane structure
  2388. */
  2389. void sde_plane_set_error(struct drm_plane *plane, bool error)
  2390. {
  2391. struct sde_plane *psde;
  2392. if (!plane)
  2393. return;
  2394. psde = to_sde_plane(plane);
  2395. psde->is_error = error;
  2396. }
  2397. static void _sde_plane_sspp_setup_sys_cache(struct sde_plane *psde,
  2398. struct sde_plane_state *pstate)
  2399. {
  2400. struct drm_plane_state *state = psde->base.state;
  2401. struct sde_sc_cfg *sc_cfg = psde->catalog->sc_cfg;
  2402. struct sde_hw_pipe_sc_cfg *cfg = &pstate->sc_cfg;
  2403. bool prev_rd_en = cfg->rd_en;
  2404. u32 fb_cache_flag, fb_cache_type;
  2405. msm_framebuffer_get_cache_hint(state->fb, &fb_cache_flag, &fb_cache_type);
  2406. cfg->rd_en = false;
  2407. cfg->rd_scid = 0x0;
  2408. cfg->flags = SYS_CACHE_EN_FLAG | SYS_CACHE_SCID;
  2409. cfg->type = SDE_SYS_CACHE_NONE;
  2410. if ((sc_cfg[SDE_SYS_CACHE_DISP].has_sys_cache)
  2411. && ((pstate->static_cache_state == CACHE_STATE_FRAME_WRITE)
  2412. || (pstate->static_cache_state == CACHE_STATE_FRAME_READ))) {
  2413. cfg->rd_en = true;
  2414. cfg->rd_scid = sc_cfg[SDE_SYS_CACHE_DISP].llcc_scid;
  2415. cfg->rd_noallocate = (pstate->static_cache_state == CACHE_STATE_FRAME_READ);
  2416. cfg->flags |= SYS_CACHE_NO_ALLOC;
  2417. cfg->type = SDE_SYS_CACHE_DISP;
  2418. } else if ((sc_cfg[fb_cache_type].has_sys_cache)
  2419. && (fb_cache_flag & MSM_FB_CACHE_WRITE_EN)) {
  2420. cfg->rd_en = true;
  2421. cfg->rd_scid = sc_cfg[fb_cache_type].llcc_scid;
  2422. cfg->rd_noallocate = true;
  2423. cfg->flags |= SYS_CACHE_NO_ALLOC;
  2424. cfg->type = fb_cache_type;
  2425. msm_framebuffer_set_cache_hint(state->fb, MSM_FB_CACHE_READ_EN, fb_cache_type);
  2426. }
  2427. if (!cfg->rd_en && !prev_rd_en)
  2428. return;
  2429. SDE_EVT32(DRMID(&psde->base), cfg->rd_scid, cfg->rd_en, cfg->rd_noallocate, cfg->flags,
  2430. fb_cache_flag, fb_cache_type);
  2431. psde->pipe_hw->ops.setup_sys_cache(psde->pipe_hw, cfg);
  2432. }
  2433. void sde_plane_static_img_control(struct drm_plane *plane,
  2434. enum sde_sys_cache_state state)
  2435. {
  2436. struct sde_plane *psde;
  2437. struct sde_plane_state *pstate;
  2438. if (!plane || !plane->state) {
  2439. SDE_ERROR("invalid plane\n");
  2440. return;
  2441. }
  2442. psde = to_sde_plane(plane);
  2443. pstate = to_sde_plane_state(plane->state);
  2444. pstate->static_cache_state = state;
  2445. if (state == CACHE_STATE_FRAME_WRITE || state == CACHE_STATE_FRAME_READ)
  2446. _sde_plane_sspp_setup_sys_cache(psde, pstate);
  2447. }
  2448. static void _sde_plane_map_prop_to_dirty_bits(void)
  2449. {
  2450. plane_prop_array[PLANE_PROP_SCALER_V1] =
  2451. plane_prop_array[PLANE_PROP_SCALER_V2] =
  2452. plane_prop_array[PLANE_PROP_SCALER_LUT_ED] =
  2453. plane_prop_array[PLANE_PROP_SCALER_LUT_CIR] =
  2454. plane_prop_array[PLANE_PROP_SCALER_LUT_SEP] =
  2455. plane_prop_array[PLANE_PROP_H_DECIMATE] =
  2456. plane_prop_array[PLANE_PROP_V_DECIMATE] =
  2457. plane_prop_array[PLANE_PROP_SRC_CONFIG] =
  2458. plane_prop_array[PLANE_PROP_ZPOS] =
  2459. plane_prop_array[PLANE_PROP_EXCL_RECT_V1] =
  2460. plane_prop_array[PLANE_PROP_UBWC_STATS_ROI] =
  2461. SDE_PLANE_DIRTY_RECTS;
  2462. plane_prop_array[PLANE_PROP_CSC_V1] =
  2463. plane_prop_array[PLANE_PROP_CSC_DMA_V1] =
  2464. plane_prop_array[PLANE_PROP_INVERSE_PMA] =
  2465. SDE_PLANE_DIRTY_FORMAT;
  2466. plane_prop_array[PLANE_PROP_MULTIRECT_MODE] =
  2467. plane_prop_array[PLANE_PROP_COLOR_FILL] =
  2468. SDE_PLANE_DIRTY_ALL;
  2469. /* no special action required */
  2470. plane_prop_array[PLANE_PROP_INFO] =
  2471. plane_prop_array[PLANE_PROP_ALPHA] =
  2472. plane_prop_array[PLANE_PROP_INPUT_FENCE] =
  2473. plane_prop_array[PLANE_PROP_BLEND_OP] = 0;
  2474. plane_prop_array[PLANE_PROP_FB_TRANSLATION_MODE] =
  2475. SDE_PLANE_DIRTY_FB_TRANSLATION_MODE;
  2476. plane_prop_array[PLANE_PROP_PREFILL_SIZE] =
  2477. plane_prop_array[PLANE_PROP_PREFILL_TIME] =
  2478. SDE_PLANE_DIRTY_PERF;
  2479. plane_prop_array[PLANE_PROP_VIG_GAMUT] = SDE_PLANE_DIRTY_VIG_GAMUT;
  2480. plane_prop_array[PLANE_PROP_VIG_IGC] = SDE_PLANE_DIRTY_VIG_IGC;
  2481. plane_prop_array[PLANE_PROP_DMA_IGC] = SDE_PLANE_DIRTY_DMA_IGC;
  2482. plane_prop_array[PLANE_PROP_DMA_GC] = SDE_PLANE_DIRTY_DMA_GC;
  2483. plane_prop_array[PLANE_PROP_SKIN_COLOR] =
  2484. plane_prop_array[PLANE_PROP_SKY_COLOR] =
  2485. plane_prop_array[PLANE_PROP_FOLIAGE_COLOR] =
  2486. plane_prop_array[PLANE_PROP_HUE_ADJUST] =
  2487. plane_prop_array[PLANE_PROP_SATURATION_ADJUST] =
  2488. plane_prop_array[PLANE_PROP_VALUE_ADJUST] =
  2489. plane_prop_array[PLANE_PROP_CONTRAST_ADJUST] =
  2490. SDE_PLANE_DIRTY_ALL;
  2491. plane_prop_array[PLANE_PROP_FP16_IGC] = SDE_PLANE_DIRTY_FP16_IGC;
  2492. plane_prop_array[PLANE_PROP_FP16_GC] = SDE_PLANE_DIRTY_FP16_GC;
  2493. plane_prop_array[PLANE_PROP_FP16_CSC] = SDE_PLANE_DIRTY_FP16_CSC;
  2494. plane_prop_array[PLANE_PROP_FP16_UNMULT] = SDE_PLANE_DIRTY_FP16_UNMULT;
  2495. }
  2496. static inline bool _sde_plane_allow_uidle(struct sde_plane *psde,
  2497. struct sde_rect *src, struct sde_rect *dst)
  2498. {
  2499. u32 max_downscale = psde->catalog->uidle_cfg.max_dwnscale;
  2500. u32 downscale = (src->h * 1000)/dst->h;
  2501. return (downscale > max_downscale) ? false : true;
  2502. }
  2503. static void _sde_plane_setup_uidle(struct drm_crtc *crtc,
  2504. struct sde_plane *psde, struct sde_plane_state *pstate,
  2505. struct sde_rect *src, struct sde_rect *dst)
  2506. {
  2507. struct sde_hw_pipe_uidle_cfg cfg;
  2508. u32 line_time = sde_crtc_get_line_time(crtc);
  2509. u32 fal1_target_idle_time_ns =
  2510. psde->catalog->uidle_cfg.fal1_target_idle_time * 1000; /* nS */
  2511. u32 fal10_target_idle_time_ns =
  2512. psde->catalog->uidle_cfg.fal10_target_idle_time * 1000; /* nS */
  2513. u32 fal10_threshold =
  2514. psde->catalog->uidle_cfg.fal10_threshold; /* uS */
  2515. if (line_time && fal10_threshold && fal10_target_idle_time_ns &&
  2516. fal1_target_idle_time_ns) {
  2517. cfg.enable = _sde_plane_allow_uidle(psde, src, dst);
  2518. cfg.fal10_threshold = fal10_threshold;
  2519. cfg.fal10_exit_threshold = fal10_threshold + 2;
  2520. cfg.fal1_threshold = min(1 +
  2521. (fal1_target_idle_time_ns*1000/line_time*2)/1000,
  2522. psde->catalog->uidle_cfg.fal1_max_threshold);
  2523. cfg.fal_allowed_threshold = fal10_threshold +
  2524. (fal10_target_idle_time_ns*1000/line_time*2)/1000;
  2525. } else {
  2526. SDE_ERROR("invalid settings, will disable UIDLE %d %d %d %d\n",
  2527. line_time, fal10_threshold, fal10_target_idle_time_ns,
  2528. fal1_target_idle_time_ns);
  2529. memset(&cfg, 0, sizeof(struct sde_hw_pipe_uidle_cfg));
  2530. }
  2531. SDE_DEBUG_PLANE(psde,
  2532. "tholds: fal10=%d fal10_exit=%d fal1=%d fal_allowed=%d\n",
  2533. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2534. cfg.fal1_threshold, cfg.fal_allowed_threshold);
  2535. SDE_DEBUG_PLANE(psde,
  2536. "times: line:%d fal1_idle:%d fal10_idle:%d dwnscale:%d\n",
  2537. line_time, fal1_target_idle_time_ns,
  2538. fal10_target_idle_time_ns,
  2539. psde->catalog->uidle_cfg.max_dwnscale);
  2540. SDE_EVT32_VERBOSE(cfg.enable,
  2541. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2542. cfg.fal1_threshold, cfg.fal_allowed_threshold,
  2543. psde->catalog->uidle_cfg.max_dwnscale);
  2544. psde->pipe_hw->ops.setup_uidle(
  2545. psde->pipe_hw, &cfg,
  2546. pstate->multirect_index);
  2547. }
  2548. static void _sde_plane_update_secure_session(struct sde_plane *psde,
  2549. struct sde_plane_state *pstate)
  2550. {
  2551. bool enable = false;
  2552. int mode = sde_plane_get_property(pstate,
  2553. PLANE_PROP_FB_TRANSLATION_MODE);
  2554. if ((mode == SDE_DRM_FB_SEC) ||
  2555. (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  2556. enable = true;
  2557. /* update secure session flag */
  2558. psde->pipe_hw->ops.setup_secure_address(psde->pipe_hw,
  2559. pstate->multirect_index,
  2560. enable);
  2561. }
  2562. static void _sde_plane_update_roi_config(struct drm_plane *plane,
  2563. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2564. {
  2565. const struct sde_format *fmt;
  2566. const struct msm_format *msm_fmt;
  2567. struct sde_plane *psde;
  2568. struct drm_plane_state *state;
  2569. struct sde_plane_state *pstate;
  2570. struct sde_rect src, dst;
  2571. const struct sde_rect *crtc_roi;
  2572. bool q16_data = true;
  2573. int idx;
  2574. psde = to_sde_plane(plane);
  2575. state = plane->state;
  2576. pstate = to_sde_plane_state(state);
  2577. msm_fmt = msm_framebuffer_format(fb);
  2578. if (!msm_fmt) {
  2579. SDE_ERROR("crtc%d plane%d: null format\n",
  2580. DRMID(crtc), DRMID(plane));
  2581. return;
  2582. }
  2583. fmt = to_sde_format(msm_fmt);
  2584. POPULATE_RECT(&src, state->src_x, state->src_y,
  2585. state->src_w, state->src_h, q16_data);
  2586. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y,
  2587. state->crtc_w, state->crtc_h, !q16_data);
  2588. SDE_DEBUG_PLANE(psde,
  2589. "FB[%u] %u,%u,%ux%u->crtc%u %d,%d,%ux%u, %4.4s ubwc %d\n",
  2590. fb->base.id, src.x, src.y, src.w, src.h,
  2591. crtc->base.id, dst.x, dst.y, dst.w, dst.h,
  2592. (char *)&fmt->base.pixel_format,
  2593. SDE_FORMAT_IS_UBWC(fmt));
  2594. if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2595. BIT(SDE_DRM_DEINTERLACE)) {
  2596. SDE_DEBUG_PLANE(psde, "deinterlace\n");
  2597. for (idx = 0; idx < SDE_MAX_PLANES; ++idx)
  2598. psde->pipe_cfg.layout.plane_pitch[idx] <<= 1;
  2599. src.h /= 2;
  2600. src.y = DIV_ROUND_UP(src.y, 2);
  2601. src.y &= ~0x1;
  2602. }
  2603. /*
  2604. * adjust layer mixer position of the sspp in the presence
  2605. * of a partial update to the active lm origin
  2606. */
  2607. sde_crtc_get_crtc_roi(crtc->state, &crtc_roi);
  2608. dst.x -= crtc_roi->x;
  2609. dst.y -= crtc_roi->y;
  2610. /* check for UIDLE */
  2611. if (psde->pipe_hw->ops.setup_uidle)
  2612. _sde_plane_setup_uidle(crtc, psde, pstate, &src, &dst);
  2613. psde->pipe_cfg.src_rect = src;
  2614. psde->pipe_cfg.dst_rect = dst;
  2615. _sde_plane_setup_scaler(psde, pstate, fmt, false);
  2616. /* check for color fill */
  2617. psde->color_fill = (uint32_t)sde_plane_get_property(pstate,
  2618. PLANE_PROP_COLOR_FILL);
  2619. if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG) {
  2620. /* skip remaining processing on color fill */
  2621. pstate->dirty = 0x0;
  2622. } else if (psde->pipe_hw->ops.setup_rects) {
  2623. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  2624. &psde->pipe_cfg,
  2625. pstate->multirect_index);
  2626. }
  2627. if (psde->pipe_hw->ops.setup_pe &&
  2628. (pstate->multirect_index != SDE_SSPP_RECT_1))
  2629. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  2630. &psde->pixel_ext);
  2631. /**
  2632. * when programmed in multirect mode, scalar block will be
  2633. * bypassed. Still we need to update alpha and bitwidth
  2634. * ONLY for RECT0
  2635. */
  2636. if (psde->pipe_hw->ops.setup_scaler &&
  2637. pstate->multirect_index != SDE_SSPP_RECT_1) {
  2638. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  2639. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  2640. &psde->pipe_cfg, &psde->pixel_ext,
  2641. &psde->scaler3_cfg);
  2642. }
  2643. /* update excl rect */
  2644. if (psde->pipe_hw->ops.setup_excl_rect)
  2645. psde->pipe_hw->ops.setup_excl_rect(psde->pipe_hw,
  2646. &pstate->excl_rect,
  2647. pstate->multirect_index);
  2648. /* enable multirect config of corresponding rect */
  2649. if (psde->pipe_hw->ops.update_multirect)
  2650. psde->pipe_hw->ops.update_multirect(
  2651. psde->pipe_hw,
  2652. true,
  2653. pstate->multirect_index,
  2654. pstate->multirect_mode);
  2655. }
  2656. static void _sde_plane_update_format_and_rects(struct sde_plane *psde,
  2657. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2658. {
  2659. uint32_t src_flags = 0;
  2660. SDE_DEBUG_PLANE(psde, "rotation 0x%X\n", pstate->rotation);
  2661. if (pstate->rotation & DRM_MODE_REFLECT_X)
  2662. src_flags |= SDE_SSPP_FLIP_LR;
  2663. if (pstate->rotation & DRM_MODE_REFLECT_Y)
  2664. src_flags |= SDE_SSPP_FLIP_UD;
  2665. if (pstate->rotation & DRM_MODE_ROTATE_90)
  2666. src_flags |= SDE_SSPP_ROT_90;
  2667. /* update format */
  2668. psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt,
  2669. pstate->const_alpha_en, src_flags,
  2670. pstate->multirect_index);
  2671. if (psde->pipe_hw->ops.setup_cdp) {
  2672. struct sde_hw_pipe_cdp_cfg *cdp_cfg = &pstate->cdp_cfg;
  2673. memset(cdp_cfg, 0, sizeof(struct sde_hw_pipe_cdp_cfg));
  2674. cdp_cfg->enable = psde->catalog->perf.cdp_cfg
  2675. [SDE_PERF_CDP_USAGE_RT].rd_enable;
  2676. cdp_cfg->ubwc_meta_enable =
  2677. SDE_FORMAT_IS_UBWC(fmt);
  2678. cdp_cfg->tile_amortize_enable =
  2679. SDE_FORMAT_IS_UBWC(fmt) ||
  2680. SDE_FORMAT_IS_TILE(fmt);
  2681. cdp_cfg->preload_ahead = SDE_WB_CDP_PRELOAD_AHEAD_64;
  2682. psde->pipe_hw->ops.setup_cdp(psde->pipe_hw, cdp_cfg,
  2683. pstate->multirect_index);
  2684. }
  2685. _sde_plane_sspp_setup_sys_cache(psde, pstate);
  2686. /* update csc */
  2687. if (SDE_FORMAT_IS_YUV(fmt))
  2688. _sde_plane_setup_csc(psde);
  2689. else
  2690. psde->csc_ptr = 0;
  2691. if (psde->pipe_hw->ops.setup_inverse_pma) {
  2692. uint32_t pma_mode = 0;
  2693. if (fmt->alpha_enable)
  2694. pma_mode = (uint32_t) sde_plane_get_property(
  2695. pstate, PLANE_PROP_INVERSE_PMA);
  2696. psde->pipe_hw->ops.setup_inverse_pma(psde->pipe_hw,
  2697. pstate->multirect_index, pma_mode);
  2698. }
  2699. if (psde->pipe_hw->ops.setup_dgm_csc)
  2700. psde->pipe_hw->ops.setup_dgm_csc(psde->pipe_hw,
  2701. pstate->multirect_index, psde->csc_usr_ptr);
  2702. if (psde->pipe_hw->ops.set_ubwc_stats_roi) {
  2703. if (SDE_FORMAT_IS_UBWC(fmt) && !SDE_FORMAT_IS_YUV(fmt))
  2704. psde->pipe_hw->ops.set_ubwc_stats_roi(psde->pipe_hw,
  2705. pstate->multirect_index, &pstate->ubwc_stats_roi);
  2706. else
  2707. psde->pipe_hw->ops.set_ubwc_stats_roi(psde->pipe_hw,
  2708. pstate->multirect_index, NULL);
  2709. }
  2710. }
  2711. static void _sde_plane_update_sharpening(struct sde_plane *psde)
  2712. {
  2713. psde->sharp_cfg.strength = SHARP_STRENGTH_DEFAULT;
  2714. psde->sharp_cfg.edge_thr = SHARP_EDGE_THR_DEFAULT;
  2715. psde->sharp_cfg.smooth_thr = SHARP_SMOOTH_THR_DEFAULT;
  2716. psde->sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT;
  2717. psde->pipe_hw->ops.setup_sharpening(psde->pipe_hw,
  2718. &psde->sharp_cfg);
  2719. }
  2720. static void _sde_plane_update_properties(struct drm_plane *plane,
  2721. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2722. {
  2723. uint32_t nplanes;
  2724. const struct msm_format *msm_fmt;
  2725. const struct sde_format *fmt;
  2726. struct sde_plane *psde;
  2727. struct drm_plane_state *state;
  2728. struct sde_plane_state *pstate;
  2729. psde = to_sde_plane(plane);
  2730. state = plane->state;
  2731. pstate = to_sde_plane_state(state);
  2732. if (!pstate) {
  2733. SDE_ERROR("invalid plane state for plane%d\n", DRMID(plane));
  2734. return;
  2735. }
  2736. msm_fmt = msm_framebuffer_format(fb);
  2737. if (!msm_fmt) {
  2738. SDE_ERROR("crtc%d plane%d: null format\n",
  2739. DRMID(crtc), DRMID(plane));
  2740. return;
  2741. }
  2742. fmt = to_sde_format(msm_fmt);
  2743. nplanes = fmt->num_planes;
  2744. /* update secure session flag */
  2745. if (pstate->dirty & SDE_PLANE_DIRTY_FB_TRANSLATION_MODE)
  2746. _sde_plane_update_secure_session(psde, pstate);
  2747. /* update roi config */
  2748. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2749. _sde_plane_update_roi_config(plane, crtc, fb);
  2750. if ((pstate->dirty & SDE_PLANE_DIRTY_FORMAT ||
  2751. pstate->dirty & SDE_PLANE_DIRTY_RECTS) &&
  2752. psde->pipe_hw->ops.setup_format)
  2753. _sde_plane_update_format_and_rects(psde, pstate, fmt);
  2754. sde_color_process_plane_setup(plane);
  2755. /* update sharpening */
  2756. if ((pstate->dirty & SDE_PLANE_DIRTY_SHARPEN) &&
  2757. psde->pipe_hw->ops.setup_sharpening)
  2758. _sde_plane_update_sharpening(psde);
  2759. if (pstate->dirty & (SDE_PLANE_DIRTY_QOS | SDE_PLANE_DIRTY_RECTS |
  2760. SDE_PLANE_DIRTY_FORMAT))
  2761. _sde_plane_set_qos_lut(plane, crtc, fb);
  2762. _sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL);
  2763. _sde_plane_set_ot_limit(plane, crtc);
  2764. if (pstate->dirty & SDE_PLANE_DIRTY_PERF)
  2765. _sde_plane_set_ts_prefill(plane, pstate);
  2766. if (pstate->dirty & SDE_PLANE_DIRTY_QOS)
  2767. _sde_plane_set_qos_remap(plane);
  2768. /* clear dirty */
  2769. pstate->dirty = 0x0;
  2770. }
  2771. static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
  2772. struct drm_plane_state *old_state)
  2773. {
  2774. struct sde_plane *psde;
  2775. struct drm_plane_state *state;
  2776. struct sde_plane_state *pstate;
  2777. struct sde_plane_state *old_pstate;
  2778. struct drm_crtc *crtc;
  2779. struct drm_framebuffer *fb;
  2780. int idx;
  2781. int dirty_prop_flag;
  2782. bool is_rt;
  2783. if (!plane) {
  2784. SDE_ERROR("invalid plane\n");
  2785. return -EINVAL;
  2786. } else if (!plane->state) {
  2787. SDE_ERROR("invalid plane state\n");
  2788. return -EINVAL;
  2789. } else if (!old_state) {
  2790. SDE_ERROR("invalid old state\n");
  2791. return -EINVAL;
  2792. }
  2793. psde = to_sde_plane(plane);
  2794. state = plane->state;
  2795. pstate = to_sde_plane_state(state);
  2796. old_pstate = to_sde_plane_state(old_state);
  2797. crtc = state->crtc;
  2798. fb = state->fb;
  2799. if (!crtc || !fb) {
  2800. SDE_ERROR_PLANE(psde, "invalid crtc %d or fb %d\n",
  2801. !crtc, !fb);
  2802. return -EINVAL;
  2803. }
  2804. SDE_DEBUG(
  2805. "plane%d sspp:%dx%d/%4.4s/%llx/%dx%d+%d+%d/%x crtc:%dx%d+%d+%d\n",
  2806. plane->base.id,
  2807. state->fb->width, state->fb->height,
  2808. (char *) &state->fb->format->format,
  2809. state->fb->modifier,
  2810. state->src_w >> 16, state->src_h >> 16,
  2811. state->src_x >> 16, state->src_y >> 16,
  2812. pstate->rotation,
  2813. state->crtc_w, state->crtc_h,
  2814. state->crtc_x, state->crtc_y);
  2815. /* force reprogramming of all the parameters, if the flag is set */
  2816. if (psde->revalidate) {
  2817. SDE_DEBUG("plane:%d - reconfigure all the parameters\n",
  2818. plane->base.id);
  2819. pstate->dirty = SDE_PLANE_DIRTY_ALL | SDE_PLANE_DIRTY_CP;
  2820. psde->revalidate = false;
  2821. }
  2822. /* determine what needs to be refreshed */
  2823. mutex_lock(&psde->property_info.property_lock);
  2824. while ((idx = msm_property_pop_dirty(&psde->property_info,
  2825. &pstate->property_state)) >= 0) {
  2826. dirty_prop_flag = plane_prop_array[idx];
  2827. pstate->dirty |= dirty_prop_flag;
  2828. }
  2829. mutex_unlock(&psde->property_info.property_lock);
  2830. /**
  2831. * since plane_atomic_check is invoked before crtc_atomic_check
  2832. * in the commit sequence, all the parameters for updating the
  2833. * plane dirty flag will not be available during
  2834. * plane_atomic_check as some features params are updated
  2835. * in crtc_atomic_check (eg.:sDMA). So check for mode_change
  2836. * before sspp update.
  2837. */
  2838. _sde_plane_sspp_atomic_check_mode_changed(psde, state,
  2839. old_state);
  2840. /* re-program the output rects always if partial update roi changed */
  2841. if (sde_crtc_is_crtc_roi_dirty(crtc->state))
  2842. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  2843. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2844. memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg));
  2845. _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
  2846. is_rt = sde_crtc_is_rt_client(crtc, crtc->state);
  2847. if (is_rt != psde->is_rt_pipe || crtc->state->mode_changed) {
  2848. psde->is_rt_pipe = is_rt;
  2849. pstate->dirty |= SDE_PLANE_DIRTY_QOS;
  2850. }
  2851. /* early out if nothing dirty */
  2852. if (!pstate->dirty)
  2853. return 0;
  2854. pstate->pending = true;
  2855. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  2856. _sde_plane_update_properties(plane, crtc, fb);
  2857. return 0;
  2858. }
  2859. static void _sde_plane_atomic_disable(struct drm_plane *plane,
  2860. struct drm_plane_state *old_state)
  2861. {
  2862. struct sde_plane *psde;
  2863. struct drm_plane_state *state;
  2864. struct sde_plane_state *pstate;
  2865. u32 multirect_index = SDE_SSPP_RECT_0;
  2866. struct sde_cp_crtc_skip_blend_plane skip_blend_plane;
  2867. u32 blend_type;
  2868. if (!plane) {
  2869. SDE_ERROR("invalid plane\n");
  2870. return;
  2871. } else if (!plane->state) {
  2872. SDE_ERROR("invalid plane state\n");
  2873. return;
  2874. } else if (!old_state) {
  2875. SDE_ERROR("invalid old state\n");
  2876. return;
  2877. }
  2878. psde = to_sde_plane(plane);
  2879. state = plane->state;
  2880. pstate = to_sde_plane_state(state);
  2881. blend_type = sde_plane_get_property(pstate,
  2882. PLANE_PROP_BLEND_OP);
  2883. /* some of the color features are dependent on plane with skip blend.
  2884. * if skip blend plane is being disabled, we need to disable color properties.
  2885. */
  2886. if (blend_type == SDE_DRM_BLEND_OP_SKIP && old_state->crtc) {
  2887. skip_blend_plane.valid_plane = false;
  2888. skip_blend_plane.plane = SSPP_NONE;
  2889. sde_cp_set_skip_blend_plane_info(old_state->crtc, &skip_blend_plane);
  2890. sde_crtc_disable_cp_features(old_state->crtc);
  2891. }
  2892. SDE_EVT32(DRMID(plane), is_sde_plane_virtual(plane),
  2893. pstate->multirect_mode);
  2894. pstate->pending = true;
  2895. if (is_sde_plane_virtual(plane))
  2896. multirect_index = SDE_SSPP_RECT_1;
  2897. /* disable multirect config of corresponding rect */
  2898. if (psde->pipe_hw && psde->pipe_hw->ops.update_multirect)
  2899. psde->pipe_hw->ops.update_multirect(psde->pipe_hw, false,
  2900. multirect_index, SDE_SSPP_MULTIRECT_TIME_MX);
  2901. }
  2902. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  2903. static void _sde_plane_atomic_update(struct drm_plane *plane,
  2904. struct drm_plane_state *old_state)
  2905. #else
  2906. static void sde_plane_atomic_update(struct drm_plane *plane,
  2907. struct drm_plane_state *old_state)
  2908. #endif
  2909. {
  2910. struct sde_plane *psde;
  2911. struct drm_plane_state *state;
  2912. if (!plane) {
  2913. SDE_ERROR("invalid plane\n");
  2914. return;
  2915. } else if (!plane->state) {
  2916. SDE_ERROR("invalid plane state\n");
  2917. return;
  2918. }
  2919. psde = to_sde_plane(plane);
  2920. psde->is_error = false;
  2921. state = plane->state;
  2922. SDE_DEBUG_PLANE(psde, "\n");
  2923. if (!sde_plane_enabled(state)) {
  2924. _sde_plane_atomic_disable(plane, old_state);
  2925. } else {
  2926. int ret;
  2927. ret = sde_plane_sspp_atomic_update(plane, old_state);
  2928. /* atomic_check should have ensured that this doesn't fail */
  2929. WARN_ON(ret < 0);
  2930. }
  2931. }
  2932. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  2933. static void sde_plane_atomic_update(struct drm_plane *plane,
  2934. struct drm_atomic_state *atomic_state)
  2935. {
  2936. struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(atomic_state, plane);
  2937. _sde_plane_atomic_update(plane, old_state);
  2938. }
  2939. #endif
  2940. void sde_plane_restore(struct drm_plane *plane)
  2941. {
  2942. struct sde_plane *psde;
  2943. if (!plane || !plane->state) {
  2944. SDE_ERROR("invalid plane\n");
  2945. return;
  2946. }
  2947. psde = to_sde_plane(plane);
  2948. /*
  2949. * Revalidate is only true here if idle PC occurred and
  2950. * there is no plane state update in current commit cycle.
  2951. */
  2952. if (!psde->revalidate)
  2953. return;
  2954. SDE_DEBUG_PLANE(psde, "\n");
  2955. /* last plane state is same as current state */
  2956. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  2957. _sde_plane_atomic_update(plane, plane->state);
  2958. #else
  2959. sde_plane_atomic_update(plane, plane->state);
  2960. #endif
  2961. }
  2962. bool sde_plane_is_cache_required(struct drm_plane *plane,
  2963. enum sde_sys_cache_type type)
  2964. {
  2965. struct sde_plane_state *pstate;
  2966. if (!plane || !plane->state) {
  2967. SDE_ERROR("invalid plane\n");
  2968. return false;
  2969. }
  2970. pstate = to_sde_plane_state(plane->state);
  2971. /* check if llcc is required for the plane */
  2972. if (pstate->sc_cfg.rd_en && (pstate->sc_cfg.type == type))
  2973. return true;
  2974. else
  2975. return false;
  2976. }
  2977. static void _sde_plane_install_master_only_properties(struct sde_plane *psde)
  2978. {
  2979. char feature_name[256];
  2980. if (psde->pipe_sblk->maxhdeciexp) {
  2981. msm_property_install_range(&psde->property_info,
  2982. "h_decimate", 0x0, 0,
  2983. psde->pipe_sblk->maxhdeciexp, 0,
  2984. PLANE_PROP_H_DECIMATE);
  2985. }
  2986. if (psde->pipe_sblk->maxvdeciexp) {
  2987. msm_property_install_range(&psde->property_info,
  2988. "v_decimate", 0x0, 0,
  2989. psde->pipe_sblk->maxvdeciexp, 0,
  2990. PLANE_PROP_V_DECIMATE);
  2991. }
  2992. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  2993. msm_property_install_range(
  2994. &psde->property_info, "scaler_v2",
  2995. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2996. msm_property_install_blob(&psde->property_info,
  2997. "lut_ed", 0, PLANE_PROP_SCALER_LUT_ED);
  2998. msm_property_install_blob(&psde->property_info,
  2999. "lut_cir", 0,
  3000. PLANE_PROP_SCALER_LUT_CIR);
  3001. msm_property_install_blob(&psde->property_info,
  3002. "lut_sep", 0,
  3003. PLANE_PROP_SCALER_LUT_SEP);
  3004. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE)) {
  3005. msm_property_install_range(
  3006. &psde->property_info, "scaler_v2",
  3007. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  3008. msm_property_install_blob(&psde->property_info,
  3009. "lut_sep", 0,
  3010. PLANE_PROP_SCALER_LUT_SEP);
  3011. } else if (psde->features & SDE_SSPP_SCALER) {
  3012. msm_property_install_range(
  3013. &psde->property_info, "scaler_v1", 0x0,
  3014. 0, ~0, 0, PLANE_PROP_SCALER_V1);
  3015. }
  3016. if (psde->features & BIT(SDE_SSPP_CSC) ||
  3017. psde->features & BIT(SDE_SSPP_CSC_10BIT))
  3018. msm_property_install_volatile_range(
  3019. &psde->property_info, "csc_v1", 0x0,
  3020. 0, ~0, 0, PLANE_PROP_CSC_V1);
  3021. if (psde->features & BIT(SDE_SSPP_HSIC)) {
  3022. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3023. "SDE_SSPP_HUE_V",
  3024. psde->pipe_sblk->hsic_blk.version >> 16);
  3025. msm_property_install_range(&psde->property_info,
  3026. feature_name, 0, 0, 0xFFFFFFFF, 0,
  3027. PLANE_PROP_HUE_ADJUST);
  3028. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3029. "SDE_SSPP_SATURATION_V",
  3030. psde->pipe_sblk->hsic_blk.version >> 16);
  3031. msm_property_install_range(&psde->property_info,
  3032. feature_name, 0, 0, 0xFFFFFFFF, 0,
  3033. PLANE_PROP_SATURATION_ADJUST);
  3034. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3035. "SDE_SSPP_VALUE_V",
  3036. psde->pipe_sblk->hsic_blk.version >> 16);
  3037. msm_property_install_range(&psde->property_info,
  3038. feature_name, 0, 0, 0xFFFFFFFF, 0,
  3039. PLANE_PROP_VALUE_ADJUST);
  3040. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3041. "SDE_SSPP_CONTRAST_V",
  3042. psde->pipe_sblk->hsic_blk.version >> 16);
  3043. msm_property_install_range(&psde->property_info,
  3044. feature_name, 0, 0, 0xFFFFFFFF, 0,
  3045. PLANE_PROP_CONTRAST_ADJUST);
  3046. }
  3047. }
  3048. static void _sde_plane_install_colorproc_properties(struct sde_plane *psde,
  3049. struct sde_kms_info *info)
  3050. {
  3051. char feature_name[256];
  3052. bool is_master = !psde->is_virtual;
  3053. if ((is_master &&
  3054. (psde->features & BIT(SDE_SSPP_INVERSE_PMA))) ||
  3055. (psde->features & BIT(SDE_SSPP_DGM_INVERSE_PMA))) {
  3056. msm_property_install_range(&psde->property_info,
  3057. "inverse_pma", 0x0, 0, 1, 0, PLANE_PROP_INVERSE_PMA);
  3058. sde_kms_info_add_keyint(info, "inverse_pma", 1);
  3059. }
  3060. if (psde->features & BIT(SDE_SSPP_DGM_CSC)) {
  3061. msm_property_install_volatile_range(
  3062. &psde->property_info, "csc_dma_v1", 0x0,
  3063. 0, ~0, 0, PLANE_PROP_CSC_DMA_V1);
  3064. sde_kms_info_add_keyint(info, "csc_dma_v1", 1);
  3065. }
  3066. if (psde->features & BIT(SDE_SSPP_MEMCOLOR)) {
  3067. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3068. "SDE_SSPP_SKIN_COLOR_V",
  3069. psde->pipe_sblk->memcolor_blk.version >> 16);
  3070. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3071. PLANE_PROP_SKIN_COLOR);
  3072. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3073. "SDE_SSPP_SKY_COLOR_V",
  3074. psde->pipe_sblk->memcolor_blk.version >> 16);
  3075. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3076. PLANE_PROP_SKY_COLOR);
  3077. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3078. "SDE_SSPP_FOLIAGE_COLOR_V",
  3079. psde->pipe_sblk->memcolor_blk.version >> 16);
  3080. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3081. PLANE_PROP_FOLIAGE_COLOR);
  3082. }
  3083. if (psde->features & BIT(SDE_SSPP_VIG_GAMUT)) {
  3084. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3085. "SDE_VIG_3D_LUT_GAMUT_V",
  3086. psde->pipe_sblk->gamut_blk.version >> 16);
  3087. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3088. PLANE_PROP_VIG_GAMUT);
  3089. }
  3090. if (psde->features & BIT(SDE_SSPP_VIG_IGC)) {
  3091. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3092. "SDE_VIG_1D_LUT_IGC_V",
  3093. psde->pipe_sblk->igc_blk[0].version >> 16);
  3094. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3095. PLANE_PROP_VIG_IGC);
  3096. }
  3097. if (psde->features & BIT(SDE_SSPP_DMA_IGC)) {
  3098. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3099. "SDE_DGM_1D_LUT_IGC_V",
  3100. psde->pipe_sblk->igc_blk[0].version >> 16);
  3101. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3102. PLANE_PROP_DMA_IGC);
  3103. }
  3104. if (psde->features & BIT(SDE_SSPP_DMA_GC)) {
  3105. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3106. "SDE_DGM_1D_LUT_GC_V",
  3107. psde->pipe_sblk->gc_blk[0].version >> 16);
  3108. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3109. PLANE_PROP_DMA_GC);
  3110. }
  3111. if (psde->features & BIT(SDE_SSPP_FP16_IGC)) {
  3112. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3113. "SDE_SSPP_FP16_IGC_V",
  3114. psde->pipe_sblk->fp16_igc_blk[0].version >> 16);
  3115. msm_property_install_range(&psde->property_info, feature_name,
  3116. 0x0, 0, 1, 0, PLANE_PROP_FP16_IGC);
  3117. }
  3118. if (psde->features & BIT(SDE_SSPP_FP16_GC)) {
  3119. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3120. "SDE_SSPP_FP16_GC_V",
  3121. psde->pipe_sblk->fp16_gc_blk[0].version >> 16);
  3122. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3123. PLANE_PROP_FP16_GC);
  3124. }
  3125. if (psde->features & BIT(SDE_SSPP_FP16_CSC)) {
  3126. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3127. "SDE_SSPP_FP16_CSC_V",
  3128. psde->pipe_sblk->fp16_csc_blk[0].version >> 16);
  3129. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3130. PLANE_PROP_FP16_CSC);
  3131. }
  3132. if (psde->features & BIT(SDE_SSPP_FP16_UNMULT)) {
  3133. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3134. "SDE_SSPP_FP16_UNMULT_V",
  3135. psde->pipe_sblk->fp16_unmult_blk[0].version >> 16);
  3136. msm_property_install_range(&psde->property_info, feature_name,
  3137. 0x0, 0, 1, 0, PLANE_PROP_FP16_UNMULT);
  3138. }
  3139. }
  3140. static void _sde_plane_setup_capabilities_blob(struct sde_plane *psde,
  3141. u32 master_plane_id, struct sde_kms_info *info,
  3142. struct sde_mdss_cfg *catalog)
  3143. {
  3144. bool is_master = !psde->is_virtual;
  3145. const struct sde_format_extended *format_list;
  3146. u32 index;
  3147. int pipe_id;
  3148. if (is_master) {
  3149. format_list = psde->pipe_sblk->format_list;
  3150. } else {
  3151. format_list = psde->pipe_sblk->virt_format_list;
  3152. sde_kms_info_add_keyint(info, "primary_smart_plane_id",
  3153. master_plane_id);
  3154. }
  3155. if (format_list) {
  3156. sde_kms_info_start(info, "pixel_formats");
  3157. while (format_list->fourcc_format) {
  3158. sde_kms_info_append_format(info,
  3159. format_list->fourcc_format,
  3160. format_list->modifier);
  3161. ++format_list;
  3162. }
  3163. sde_kms_info_stop(info);
  3164. }
  3165. if (psde->pipe_hw && catalog->qseed_hw_rev)
  3166. sde_kms_info_add_keyint(info, "scaler_step_ver", catalog->qseed_hw_rev);
  3167. sde_kms_info_add_keyint(info, "max_linewidth",
  3168. psde->pipe_sblk->maxlinewidth);
  3169. sde_kms_info_add_keyint(info, "max_upscale",
  3170. psde->pipe_sblk->maxupscale);
  3171. sde_kms_info_add_keyint(info, "max_downscale",
  3172. psde->pipe_sblk->maxdwnscale);
  3173. sde_kms_info_add_keyint(info, "max_horizontal_deci",
  3174. psde->pipe_sblk->maxhdeciexp);
  3175. sde_kms_info_add_keyint(info, "max_vertical_deci",
  3176. psde->pipe_sblk->maxvdeciexp);
  3177. sde_kms_info_add_keyint(info, "max_per_pipe_bw",
  3178. psde->pipe_sblk->max_per_pipe_bw * 1000LL);
  3179. sde_kms_info_add_keyint(info, "max_per_pipe_bw_high",
  3180. psde->pipe_sblk->max_per_pipe_bw_high * 1000LL);
  3181. if (SDE_SSPP_VALID_VIG(psde->pipe))
  3182. pipe_id = psde->pipe - SSPP_VIG0;
  3183. else if (SDE_SSPP_VALID_DMA(psde->pipe))
  3184. pipe_id = psde->pipe - SSPP_DMA0;
  3185. else
  3186. pipe_id = -1;
  3187. sde_kms_info_add_keyint(info, "pipe_idx", pipe_id);
  3188. index = (master_plane_id == 0) ? 0 : 1;
  3189. if (test_bit(SDE_FEATURE_DEMURA, catalog->features) &&
  3190. catalog->demura_supported[psde->pipe][index] != ~0x0)
  3191. sde_kms_info_add_keyint(info, "demura_block", index);
  3192. if (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED))
  3193. sde_kms_info_add_keyint(info, "sec_ui_allowed", 1);
  3194. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  3195. sde_kms_info_add_keyint(info, "block_sec_ui", 1);
  3196. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT)) {
  3197. const struct sde_format_extended *inline_rot_fmt_list;
  3198. sde_kms_info_add_keyint(info, "true_inline_rot_rev",
  3199. catalog->true_inline_rot_rev);
  3200. sde_kms_info_add_keyint(info,
  3201. "true_inline_dwnscale_rt",
  3202. (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num /
  3203. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom));
  3204. sde_kms_info_add_keyint(info,
  3205. "true_inline_dwnscale_rt_numerator",
  3206. psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3207. sde_kms_info_add_keyint(info,
  3208. "true_inline_dwnscale_rt_denominator",
  3209. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3210. sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt",
  3211. psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3212. sde_kms_info_add_keyint(info, "true_inline_max_height",
  3213. psde->pipe_sblk->in_rot_maxheight);
  3214. inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list;
  3215. if (inline_rot_fmt_list) {
  3216. sde_kms_info_start(info, "inline_rot_pixel_formats");
  3217. while (inline_rot_fmt_list->fourcc_format) {
  3218. sde_kms_info_append_format(info,
  3219. inline_rot_fmt_list->fourcc_format,
  3220. inline_rot_fmt_list->modifier);
  3221. ++inline_rot_fmt_list;
  3222. }
  3223. sde_kms_info_stop(info);
  3224. }
  3225. }
  3226. }
  3227. /* helper to install properties which are common to planes and crtcs */
  3228. static void _sde_plane_install_properties(struct drm_plane *plane,
  3229. struct sde_mdss_cfg *catalog, u32 master_plane_id)
  3230. {
  3231. static const struct drm_prop_enum_list e_blend_op[] = {
  3232. {SDE_DRM_BLEND_OP_NOT_DEFINED, "not_defined"},
  3233. {SDE_DRM_BLEND_OP_OPAQUE, "opaque"},
  3234. {SDE_DRM_BLEND_OP_PREMULTIPLIED, "premultiplied"},
  3235. {SDE_DRM_BLEND_OP_COVERAGE, "coverage"},
  3236. {SDE_DRM_BLEND_OP_SKIP, "skip_blending"},
  3237. };
  3238. static const struct drm_prop_enum_list e_src_config[] = {
  3239. {SDE_DRM_DEINTERLACE, "deinterlace"}
  3240. };
  3241. static const struct drm_prop_enum_list e_fb_translation_mode[] = {
  3242. {SDE_DRM_FB_NON_SEC, "non_sec"},
  3243. {SDE_DRM_FB_SEC, "sec"},
  3244. {SDE_DRM_FB_NON_SEC_DIR_TRANS, "non_sec_direct_translation"},
  3245. {SDE_DRM_FB_SEC_DIR_TRANS, "sec_direct_translation"},
  3246. };
  3247. static const struct drm_prop_enum_list e_multirect_mode[] = {
  3248. {SDE_SSPP_MULTIRECT_NONE, "none"},
  3249. {SDE_SSPP_MULTIRECT_PARALLEL, "parallel"},
  3250. {SDE_SSPP_MULTIRECT_TIME_MX, "serial"},
  3251. };
  3252. struct sde_kms_info *info;
  3253. struct sde_plane *psde = to_sde_plane(plane);
  3254. bool is_master;
  3255. int zpos_max = 255;
  3256. int zpos_def = 0;
  3257. if (!plane || !psde) {
  3258. SDE_ERROR("invalid plane\n");
  3259. return;
  3260. } else if (!psde->pipe_hw || !psde->pipe_sblk) {
  3261. SDE_ERROR("invalid plane, pipe_hw %d pipe_sblk %d\n",
  3262. !psde->pipe_hw, !psde->pipe_sblk);
  3263. return;
  3264. } else if (!catalog) {
  3265. SDE_ERROR("invalid catalog\n");
  3266. return;
  3267. }
  3268. psde->catalog = catalog;
  3269. is_master = !psde->is_virtual;
  3270. info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
  3271. if (!info) {
  3272. SDE_ERROR("failed to allocate info memory\n");
  3273. return;
  3274. }
  3275. if (sde_is_custom_client()) {
  3276. if (catalog->mixer_count &&
  3277. catalog->mixer[0].sblk->maxblendstages) {
  3278. zpos_max = catalog->mixer[0].sblk->maxblendstages - 1;
  3279. if (test_bit(SDE_FEATURE_BASE_LAYER, catalog->features) &&
  3280. (zpos_max > SDE_STAGE_MAX - 1))
  3281. zpos_max = SDE_STAGE_MAX - 1;
  3282. else if (zpos_max > SDE_STAGE_MAX - SDE_STAGE_0 - 1)
  3283. zpos_max = SDE_STAGE_MAX - SDE_STAGE_0 - 1;
  3284. }
  3285. } else if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
  3286. /* reserve zpos == 0 for primary planes */
  3287. zpos_def = drm_plane_index(plane) + 1;
  3288. }
  3289. msm_property_install_range(&psde->property_info, "zpos",
  3290. 0x0, 0, zpos_max, zpos_def, PLANE_PROP_ZPOS);
  3291. msm_property_install_range(&psde->property_info, "alpha",
  3292. 0x0, 0, 255, 255, PLANE_PROP_ALPHA);
  3293. /* linux default file descriptor range on each process */
  3294. msm_property_install_range(&psde->property_info, "input_fence",
  3295. 0x0, 0, INR_OPEN_MAX, 0, PLANE_PROP_INPUT_FENCE);
  3296. if (is_master)
  3297. _sde_plane_install_master_only_properties(psde);
  3298. else
  3299. msm_property_install_enum(&psde->property_info,
  3300. "multirect_mode", 0x0, 0, e_multirect_mode,
  3301. ARRAY_SIZE(e_multirect_mode), 0,
  3302. PLANE_PROP_MULTIRECT_MODE);
  3303. if (psde->features & BIT(SDE_SSPP_EXCL_RECT))
  3304. msm_property_install_volatile_range(&psde->property_info,
  3305. "excl_rect_v1", 0x0, 0, ~0, 0, PLANE_PROP_EXCL_RECT_V1);
  3306. sde_plane_rot_install_properties(plane, catalog);
  3307. msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0,
  3308. e_blend_op, ARRAY_SIZE(e_blend_op), 0, PLANE_PROP_BLEND_OP);
  3309. msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1,
  3310. e_src_config, ARRAY_SIZE(e_src_config), 0,
  3311. PLANE_PROP_SRC_CONFIG);
  3312. if (psde->pipe_hw->ops.setup_solidfill)
  3313. msm_property_install_range(&psde->property_info, "color_fill",
  3314. 0, 0, 0xFFFFFFFF, 0, PLANE_PROP_COLOR_FILL);
  3315. msm_property_install_range(&psde->property_info, "prefill_size", 0x0,
  3316. 0, ~0, 0, PLANE_PROP_PREFILL_SIZE);
  3317. msm_property_install_range(&psde->property_info, "prefill_time", 0x0,
  3318. 0, ~0, 0, PLANE_PROP_PREFILL_TIME);
  3319. msm_property_install_blob(&psde->property_info, "capabilities",
  3320. DRM_MODE_PROP_IMMUTABLE, PLANE_PROP_INFO);
  3321. sde_kms_info_reset(info);
  3322. _sde_plane_setup_capabilities_blob(psde, master_plane_id, info,
  3323. catalog);
  3324. _sde_plane_install_colorproc_properties(psde, info);
  3325. msm_property_set_blob(&psde->property_info, &psde->blob_info,
  3326. info->data, SDE_KMS_INFO_DATALEN(info),
  3327. PLANE_PROP_INFO);
  3328. msm_property_install_enum(&psde->property_info, "fb_translation_mode",
  3329. 0x0, 0, e_fb_translation_mode,
  3330. ARRAY_SIZE(e_fb_translation_mode), 0,
  3331. PLANE_PROP_FB_TRANSLATION_MODE);
  3332. if (psde->pipe_hw->ops.set_ubwc_stats_roi)
  3333. msm_property_install_range(&psde->property_info, "ubwc_stats_roi",
  3334. 0, 0, 0xFFFFFFFF, 0, PLANE_PROP_UBWC_STATS_ROI);
  3335. kfree(info);
  3336. }
  3337. static inline void _sde_plane_set_csc_v1(struct sde_plane *psde,
  3338. void __user *usr_ptr)
  3339. {
  3340. struct sde_drm_csc_v1 csc_v1;
  3341. int i;
  3342. if (!psde) {
  3343. SDE_ERROR("invalid plane\n");
  3344. return;
  3345. }
  3346. psde->csc_usr_ptr = NULL;
  3347. if (!usr_ptr) {
  3348. SDE_DEBUG_PLANE(psde, "csc data removed\n");
  3349. return;
  3350. }
  3351. if (copy_from_user(&csc_v1, usr_ptr, sizeof(csc_v1))) {
  3352. SDE_ERROR_PLANE(psde, "failed to copy csc data\n");
  3353. return;
  3354. }
  3355. /* populate from user space */
  3356. for (i = 0; i < SDE_CSC_MATRIX_COEFF_SIZE; ++i)
  3357. psde->csc_cfg.csc_mv[i] = csc_v1.ctm_coeff[i] >> 16;
  3358. for (i = 0; i < SDE_CSC_BIAS_SIZE; ++i) {
  3359. psde->csc_cfg.csc_pre_bv[i] = csc_v1.pre_bias[i];
  3360. psde->csc_cfg.csc_post_bv[i] = csc_v1.post_bias[i];
  3361. }
  3362. for (i = 0; i < SDE_CSC_CLAMP_SIZE; ++i) {
  3363. psde->csc_cfg.csc_pre_lv[i] = csc_v1.pre_clamp[i];
  3364. psde->csc_cfg.csc_post_lv[i] = csc_v1.post_clamp[i];
  3365. }
  3366. psde->csc_usr_ptr = &psde->csc_cfg;
  3367. }
  3368. static inline void _sde_plane_set_scaler_v1(struct sde_plane *psde,
  3369. struct sde_plane_state *pstate, void __user *usr)
  3370. {
  3371. struct sde_drm_scaler_v1 scale_v1;
  3372. struct sde_hw_pixel_ext *pe;
  3373. int i;
  3374. if (!psde || !pstate) {
  3375. SDE_ERROR("invalid argument(s)\n");
  3376. return;
  3377. }
  3378. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3379. if (!usr) {
  3380. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3381. return;
  3382. }
  3383. if (copy_from_user(&scale_v1, usr, sizeof(scale_v1))) {
  3384. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3385. return;
  3386. }
  3387. /* force property to be dirty, even if the pointer didn't change */
  3388. msm_property_set_dirty(&psde->property_info,
  3389. &pstate->property_state, PLANE_PROP_SCALER_V1);
  3390. /* populate from user space */
  3391. pe = &pstate->pixel_ext;
  3392. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3393. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3394. pe->init_phase_x[i] = scale_v1.init_phase_x[i];
  3395. pe->phase_step_x[i] = scale_v1.phase_step_x[i];
  3396. pe->init_phase_y[i] = scale_v1.init_phase_y[i];
  3397. pe->phase_step_y[i] = scale_v1.phase_step_y[i];
  3398. pe->horz_filter[i] = scale_v1.horz_filter[i];
  3399. pe->vert_filter[i] = scale_v1.vert_filter[i];
  3400. }
  3401. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3402. pe->left_ftch[i] = scale_v1.pe.left_ftch[i];
  3403. pe->right_ftch[i] = scale_v1.pe.right_ftch[i];
  3404. pe->left_rpt[i] = scale_v1.pe.left_rpt[i];
  3405. pe->right_rpt[i] = scale_v1.pe.right_rpt[i];
  3406. pe->roi_w[i] = scale_v1.pe.num_ext_pxls_lr[i];
  3407. pe->top_ftch[i] = scale_v1.pe.top_ftch[i];
  3408. pe->btm_ftch[i] = scale_v1.pe.btm_ftch[i];
  3409. pe->top_rpt[i] = scale_v1.pe.top_rpt[i];
  3410. pe->btm_rpt[i] = scale_v1.pe.btm_rpt[i];
  3411. pe->roi_h[i] = scale_v1.pe.num_ext_pxls_tb[i];
  3412. }
  3413. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V1;
  3414. SDE_EVT32_VERBOSE(DRMID(&psde->base));
  3415. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3416. }
  3417. static void _sde_plane_clear_predownscale_settings(
  3418. struct sde_plane_state *pstate)
  3419. {
  3420. pstate->pre_down.pre_downscale_x_0 = 0;
  3421. pstate->pre_down.pre_downscale_x_1 = 0;
  3422. pstate->pre_down.pre_downscale_y_0 = 0;
  3423. pstate->pre_down.pre_downscale_y_1 = 0;
  3424. }
  3425. static inline void _sde_plane_set_scaler_v2(struct sde_plane *psde,
  3426. struct sde_plane_state *pstate, void __user *usr)
  3427. {
  3428. struct sde_drm_scaler_v2 scale_v2;
  3429. struct sde_hw_pixel_ext *pe;
  3430. int i;
  3431. struct sde_hw_scaler3_cfg *cfg;
  3432. struct sde_hw_inline_pre_downscale_cfg *pd_cfg;
  3433. if (!psde || !pstate) {
  3434. SDE_ERROR("invalid argument(s)\n");
  3435. return;
  3436. }
  3437. cfg = &pstate->scaler3_cfg;
  3438. pd_cfg = &pstate->pre_down;
  3439. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3440. if (!usr) {
  3441. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3442. cfg->enable = 0;
  3443. _sde_plane_clear_predownscale_settings(pstate);
  3444. goto end;
  3445. }
  3446. if (copy_from_user(&scale_v2, usr, sizeof(scale_v2))) {
  3447. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3448. return;
  3449. }
  3450. /* detach/ignore user data if 'disabled' */
  3451. if (!scale_v2.enable) {
  3452. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3453. cfg->enable = 0;
  3454. _sde_plane_clear_predownscale_settings(pstate);
  3455. goto end;
  3456. }
  3457. /* populate from user space */
  3458. sde_set_scaler_v2(cfg, &scale_v2);
  3459. if (_sde_plane_has_pre_downscale(psde)) {
  3460. pd_cfg->pre_downscale_x_0 = scale_v2.pre_downscale_x_0;
  3461. pd_cfg->pre_downscale_x_1 = scale_v2.pre_downscale_x_1;
  3462. pd_cfg->pre_downscale_y_0 = scale_v2.pre_downscale_y_0;
  3463. pd_cfg->pre_downscale_y_1 = scale_v2.pre_downscale_y_1;
  3464. }
  3465. pe = &pstate->pixel_ext;
  3466. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3467. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3468. pe->left_ftch[i] = scale_v2.pe.left_ftch[i];
  3469. pe->right_ftch[i] = scale_v2.pe.right_ftch[i];
  3470. pe->left_rpt[i] = scale_v2.pe.left_rpt[i];
  3471. pe->right_rpt[i] = scale_v2.pe.right_rpt[i];
  3472. pe->roi_w[i] = scale_v2.pe.num_ext_pxls_lr[i];
  3473. pe->top_ftch[i] = scale_v2.pe.top_ftch[i];
  3474. pe->btm_ftch[i] = scale_v2.pe.btm_ftch[i];
  3475. pe->top_rpt[i] = scale_v2.pe.top_rpt[i];
  3476. pe->btm_rpt[i] = scale_v2.pe.btm_rpt[i];
  3477. pe->roi_h[i] = scale_v2.pe.num_ext_pxls_tb[i];
  3478. }
  3479. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2_CHECK;
  3480. end:
  3481. /* force property to be dirty, even if the pointer didn't change */
  3482. msm_property_set_dirty(&psde->property_info,
  3483. &pstate->property_state, PLANE_PROP_SCALER_V2);
  3484. SDE_EVT32_VERBOSE(DRMID(&psde->base), cfg->enable, cfg->de.enable,
  3485. cfg->src_width[0], cfg->src_height[0],
  3486. cfg->dst_width, cfg->dst_height);
  3487. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3488. }
  3489. static void _sde_plane_set_excl_rect_v1(struct sde_plane *psde,
  3490. struct sde_plane_state *pstate, void __user *usr_ptr)
  3491. {
  3492. struct drm_clip_rect excl_rect_v1;
  3493. if (!psde || !pstate) {
  3494. SDE_ERROR("invalid argument(s)\n");
  3495. return;
  3496. }
  3497. if (!usr_ptr) {
  3498. memset(&pstate->excl_rect, 0, sizeof(pstate->excl_rect));
  3499. SDE_DEBUG_PLANE(psde, "excl_rect data cleared\n");
  3500. return;
  3501. }
  3502. if (copy_from_user(&excl_rect_v1, usr_ptr, sizeof(excl_rect_v1))) {
  3503. SDE_ERROR_PLANE(psde, "failed to copy excl_rect data\n");
  3504. return;
  3505. }
  3506. /* populate from user space */
  3507. pstate->excl_rect.x = excl_rect_v1.x1;
  3508. pstate->excl_rect.y = excl_rect_v1.y1;
  3509. pstate->excl_rect.w = excl_rect_v1.x2 - excl_rect_v1.x1;
  3510. pstate->excl_rect.h = excl_rect_v1.y2 - excl_rect_v1.y1;
  3511. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  3512. pstate->excl_rect.x, pstate->excl_rect.y,
  3513. pstate->excl_rect.w, pstate->excl_rect.h);
  3514. }
  3515. static void _sde_plane_set_ubwc_stats_roi(struct sde_plane *psde,
  3516. struct sde_plane_state *pstate, uint64_t roi)
  3517. {
  3518. uint16_t y0, y1;
  3519. if (!psde || !pstate) {
  3520. SDE_ERROR("invalid argument(s)\n");
  3521. return;
  3522. }
  3523. y0 = roi & 0xFFFF;
  3524. y1 = (roi >> 0x10) & 0xFFFF;
  3525. if (y0 > psde->pipe_cfg.src_rect.h || y1 > psde->pipe_cfg.src_rect.h) {
  3526. SDE_ERROR_PLANE(psde, "invalid ubwc roi y0 0x%x, y1 0x%x, src height 0x%x",
  3527. y0, y1, psde->pipe_cfg.src_rect.h);
  3528. y0 = 0;
  3529. y1 = 0;
  3530. }
  3531. pstate->ubwc_stats_roi.y_coord0 = y0;
  3532. pstate->ubwc_stats_roi.y_coord1 = y1;
  3533. }
  3534. static int sde_plane_atomic_set_property(struct drm_plane *plane,
  3535. struct drm_plane_state *state, struct drm_property *property,
  3536. uint64_t val)
  3537. {
  3538. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3539. struct sde_plane_state *pstate;
  3540. int idx, ret = -EINVAL;
  3541. SDE_DEBUG_PLANE(psde, "\n");
  3542. if (!plane) {
  3543. SDE_ERROR("invalid plane\n");
  3544. } else if (!state) {
  3545. SDE_ERROR_PLANE(psde, "invalid state\n");
  3546. } else {
  3547. pstate = to_sde_plane_state(state);
  3548. ret = msm_property_atomic_set(&psde->property_info,
  3549. &pstate->property_state, property, val);
  3550. if (!ret) {
  3551. idx = msm_property_index(&psde->property_info,
  3552. property);
  3553. switch (idx) {
  3554. case PLANE_PROP_INPUT_FENCE:
  3555. _sde_plane_set_input_fence(psde, pstate, val);
  3556. break;
  3557. case PLANE_PROP_CSC_V1:
  3558. case PLANE_PROP_CSC_DMA_V1:
  3559. _sde_plane_set_csc_v1(psde, (void __user *)val);
  3560. break;
  3561. case PLANE_PROP_SCALER_V1:
  3562. _sde_plane_set_scaler_v1(psde, pstate,
  3563. (void *)(uintptr_t)val);
  3564. break;
  3565. case PLANE_PROP_SCALER_V2:
  3566. _sde_plane_set_scaler_v2(psde, pstate,
  3567. (void *)(uintptr_t)val);
  3568. break;
  3569. case PLANE_PROP_EXCL_RECT_V1:
  3570. _sde_plane_set_excl_rect_v1(psde, pstate,
  3571. (void *)(uintptr_t)val);
  3572. break;
  3573. case PLANE_PROP_UBWC_STATS_ROI:
  3574. _sde_plane_set_ubwc_stats_roi(psde, pstate, val);
  3575. break;
  3576. default:
  3577. /* nothing to do */
  3578. break;
  3579. }
  3580. }
  3581. }
  3582. SDE_DEBUG_PLANE(psde, "%s[%d] <= 0x%llx ret=%d\n",
  3583. property->name, property->base.id, val, ret);
  3584. return ret;
  3585. }
  3586. static int sde_plane_atomic_get_property(struct drm_plane *plane,
  3587. const struct drm_plane_state *state,
  3588. struct drm_property *property, uint64_t *val)
  3589. {
  3590. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3591. struct sde_plane_state *pstate;
  3592. int ret = -EINVAL;
  3593. if (!plane) {
  3594. SDE_ERROR("invalid plane\n");
  3595. } else if (!state) {
  3596. SDE_ERROR("invalid state\n");
  3597. } else {
  3598. SDE_DEBUG_PLANE(psde, "\n");
  3599. pstate = to_sde_plane_state(state);
  3600. ret = msm_property_atomic_get(&psde->property_info,
  3601. &pstate->property_state, property, val);
  3602. }
  3603. return ret;
  3604. }
  3605. int sde_plane_helper_reset_custom_properties(struct drm_plane *plane,
  3606. struct drm_plane_state *plane_state)
  3607. {
  3608. struct sde_plane *psde;
  3609. struct sde_plane_state *pstate;
  3610. struct drm_property *drm_prop;
  3611. enum msm_mdp_plane_property prop_idx;
  3612. if (!plane || !plane_state) {
  3613. SDE_ERROR("invalid params\n");
  3614. return -EINVAL;
  3615. }
  3616. psde = to_sde_plane(plane);
  3617. pstate = to_sde_plane_state(plane_state);
  3618. for (prop_idx = 0; prop_idx < PLANE_PROP_COUNT; prop_idx++) {
  3619. uint64_t val = pstate->property_values[prop_idx].value;
  3620. uint64_t def;
  3621. int ret;
  3622. drm_prop = msm_property_index_to_drm_property(
  3623. &psde->property_info, prop_idx);
  3624. if (!drm_prop) {
  3625. /* not all props will be installed, based on caps */
  3626. SDE_DEBUG_PLANE(psde, "invalid property index %d\n",
  3627. prop_idx);
  3628. continue;
  3629. }
  3630. def = msm_property_get_default(&psde->property_info, prop_idx);
  3631. if (val == def)
  3632. continue;
  3633. SDE_DEBUG_PLANE(psde, "set prop %s idx %d from %llu to %llu\n",
  3634. drm_prop->name, prop_idx, val, def);
  3635. ret = sde_plane_atomic_set_property(plane, plane_state,
  3636. drm_prop, def);
  3637. if (ret) {
  3638. SDE_ERROR_PLANE(psde,
  3639. "set property failed, idx %d ret %d\n",
  3640. prop_idx, ret);
  3641. continue;
  3642. }
  3643. }
  3644. return 0;
  3645. }
  3646. static void sde_plane_destroy(struct drm_plane *plane)
  3647. {
  3648. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3649. SDE_DEBUG_PLANE(psde, "\n");
  3650. if (psde) {
  3651. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  3652. if (psde->blob_info)
  3653. drm_property_blob_put(psde->blob_info);
  3654. msm_property_destroy(&psde->property_info);
  3655. mutex_destroy(&psde->lock);
  3656. /* this will destroy the states as well */
  3657. drm_plane_cleanup(plane);
  3658. if (psde->pipe_hw)
  3659. sde_hw_sspp_destroy(psde->pipe_hw);
  3660. kfree(psde);
  3661. }
  3662. }
  3663. void sde_plane_destroy_fb(struct drm_plane_state *state)
  3664. {
  3665. struct sde_plane_state *pstate;
  3666. if (!state) {
  3667. SDE_ERROR("invalid arg state %d\n", !state);
  3668. return;
  3669. }
  3670. pstate = to_sde_plane_state(state);
  3671. if (sde_plane_get_property(pstate, PLANE_PROP_FB_TRANSLATION_MODE) ==
  3672. SDE_DRM_FB_SEC) {
  3673. /* remove ref count for frame buffers */
  3674. if (state->fb) {
  3675. drm_framebuffer_put(state->fb);
  3676. state->fb = NULL;
  3677. }
  3678. }
  3679. }
  3680. static void sde_plane_destroy_state(struct drm_plane *plane,
  3681. struct drm_plane_state *state)
  3682. {
  3683. struct sde_plane *psde;
  3684. struct sde_plane_state *pstate;
  3685. if (!plane || !state) {
  3686. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  3687. !plane, !state);
  3688. return;
  3689. }
  3690. psde = to_sde_plane(plane);
  3691. pstate = to_sde_plane_state(state);
  3692. SDE_DEBUG_PLANE(psde, "\n");
  3693. /* remove ref count for frame buffers */
  3694. if (state->fb)
  3695. drm_framebuffer_put(state->fb);
  3696. /* remove ref count for fence */
  3697. if (pstate->input_fence)
  3698. sde_sync_put(pstate->input_fence);
  3699. pstate->input_fence = 0;
  3700. /* destroy value helper */
  3701. msm_property_destroy_state(&psde->property_info, pstate,
  3702. &pstate->property_state);
  3703. }
  3704. static struct drm_plane_state *
  3705. sde_plane_duplicate_state(struct drm_plane *plane)
  3706. {
  3707. struct sde_plane *psde;
  3708. struct sde_plane_state *pstate;
  3709. struct sde_plane_state *old_state;
  3710. struct drm_property *drm_prop;
  3711. uint64_t input_fence_default;
  3712. if (!plane) {
  3713. SDE_ERROR("invalid plane\n");
  3714. return NULL;
  3715. } else if (!plane->state) {
  3716. SDE_ERROR("invalid plane state\n");
  3717. return NULL;
  3718. }
  3719. old_state = to_sde_plane_state(plane->state);
  3720. psde = to_sde_plane(plane);
  3721. if (old_state->cont_splash_populated) {
  3722. plane->state->crtc = NULL;
  3723. old_state->cont_splash_populated = false;
  3724. }
  3725. pstate = msm_property_alloc_state(&psde->property_info);
  3726. if (!pstate) {
  3727. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3728. return NULL;
  3729. }
  3730. SDE_DEBUG_PLANE(psde, "\n");
  3731. /* duplicate value helper */
  3732. msm_property_duplicate_state(&psde->property_info, old_state, pstate,
  3733. &pstate->property_state, pstate->property_values);
  3734. /* clear out any input fence */
  3735. pstate->input_fence = 0;
  3736. input_fence_default = msm_property_get_default(
  3737. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3738. drm_prop = msm_property_index_to_drm_property(
  3739. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3740. if (msm_property_atomic_set(&psde->property_info,
  3741. &pstate->property_state, drm_prop,
  3742. input_fence_default))
  3743. SDE_DEBUG_PLANE(psde,
  3744. "error clearing duplicated input fence\n");
  3745. pstate->dirty = 0x0;
  3746. pstate->pending = false;
  3747. __drm_atomic_helper_plane_duplicate_state(plane, &pstate->base);
  3748. /* reset layout offset */
  3749. if (pstate->layout_offset) {
  3750. if (pstate->layout_offset > 0)
  3751. pstate->base.crtc_x += pstate->layout_offset;
  3752. pstate->layout = SDE_LAYOUT_NONE;
  3753. pstate->layout_offset = 0;
  3754. }
  3755. return &pstate->base;
  3756. }
  3757. static void sde_plane_reset(struct drm_plane *plane)
  3758. {
  3759. struct sde_plane *psde;
  3760. struct sde_plane_state *pstate;
  3761. if (!plane) {
  3762. SDE_ERROR("invalid plane\n");
  3763. return;
  3764. }
  3765. psde = to_sde_plane(plane);
  3766. SDE_DEBUG_PLANE(psde, "\n");
  3767. if (plane->state && !sde_crtc_is_reset_required(plane->state->crtc)) {
  3768. SDE_DEBUG_PLANE(psde, "avoid reset for plane\n");
  3769. return;
  3770. }
  3771. /* remove previous state, if present */
  3772. if (plane->state) {
  3773. sde_plane_destroy_state(plane, plane->state);
  3774. plane->state = 0;
  3775. }
  3776. pstate = msm_property_alloc_state(&psde->property_info);
  3777. if (!pstate) {
  3778. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3779. return;
  3780. }
  3781. /* reset value helper */
  3782. msm_property_reset_state(&psde->property_info, pstate,
  3783. &pstate->property_state,
  3784. pstate->property_values);
  3785. pstate->base.plane = plane;
  3786. plane->state = &pstate->base;
  3787. }
  3788. void sde_plane_get_frame_data(struct drm_plane *plane,
  3789. struct sde_drm_plane_frame_data *data)
  3790. {
  3791. struct sde_plane *psde;
  3792. struct sde_plane_state *pstate;
  3793. struct sde_drm_ubwc_stats_data *ubwc_stats;
  3794. if (!plane) {
  3795. SDE_ERROR("invalid plane\n");
  3796. return;
  3797. }
  3798. psde = to_sde_plane(plane);
  3799. pstate = to_sde_plane_state(plane->state);
  3800. ubwc_stats = &data->ubwc_stats;
  3801. data->plane_id = DRMID(plane);
  3802. if (psde->pipe_hw->ops.get_ubwc_stats_data) {
  3803. memcpy(&ubwc_stats->roi, &pstate->ubwc_stats_roi,
  3804. sizeof(struct sde_drm_ubwc_stats_roi));
  3805. psde->pipe_hw->ops.get_ubwc_stats_data(psde->pipe_hw,
  3806. pstate->multirect_index, ubwc_stats);
  3807. }
  3808. if (psde->pipe_hw->ops.get_ubwc_error)
  3809. ubwc_stats->error = psde->pipe_hw->ops.get_ubwc_error(psde->pipe_hw,
  3810. pstate->multirect_index);
  3811. if (psde->pipe_hw->ops.clear_ubwc_error && ubwc_stats->error)
  3812. psde->pipe_hw->ops.clear_ubwc_error(psde->pipe_hw, pstate->multirect_index);
  3813. if (psde->pipe_hw->ops.get_meta_error)
  3814. ubwc_stats->meta_error = psde->pipe_hw->ops.get_meta_error(psde->pipe_hw,
  3815. pstate->multirect_index);
  3816. if (psde->pipe_hw->ops.clear_meta_error && ubwc_stats->meta_error)
  3817. psde->pipe_hw->ops.clear_meta_error(psde->pipe_hw, pstate->multirect_index);
  3818. if (ubwc_stats->error || ubwc_stats->meta_error) {
  3819. SDE_EVT32(DRMID(plane), ubwc_stats->error, ubwc_stats->meta_error,
  3820. SDE_EVTLOG_ERROR);
  3821. SDE_DEBUG_PLANE(psde, "plane%d ubwc_error %d meta_error %d\n",
  3822. ubwc_stats->error, ubwc_stats->meta_error);
  3823. }
  3824. }
  3825. #ifdef CONFIG_DEBUG_FS
  3826. static ssize_t _sde_plane_danger_read(struct file *file,
  3827. char __user *buff, size_t count, loff_t *ppos)
  3828. {
  3829. struct sde_kms *kms = file->private_data;
  3830. struct sde_mdss_cfg *cfg = kms->catalog;
  3831. int len = 0;
  3832. char buf[40] = {'\0'};
  3833. if (!cfg)
  3834. return -ENODEV;
  3835. if (*ppos)
  3836. return 0; /* the end */
  3837. len = snprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl);
  3838. if (len < 0 || len >= sizeof(buf))
  3839. return 0;
  3840. if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
  3841. return -EFAULT;
  3842. *ppos += len; /* increase offset */
  3843. return len;
  3844. }
  3845. static void _sde_plane_set_danger_state(struct sde_kms *kms, bool enable)
  3846. {
  3847. struct drm_plane *plane;
  3848. drm_for_each_plane(plane, kms->dev) {
  3849. if (plane->fb && plane->state) {
  3850. sde_plane_danger_signal_ctrl(plane, enable);
  3851. SDE_DEBUG("plane:%d img:%dx%d ",
  3852. plane->base.id, plane->fb->width,
  3853. plane->fb->height);
  3854. SDE_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n",
  3855. plane->state->src_x >> 16,
  3856. plane->state->src_y >> 16,
  3857. plane->state->src_w >> 16,
  3858. plane->state->src_h >> 16,
  3859. plane->state->crtc_x, plane->state->crtc_y,
  3860. plane->state->crtc_w, plane->state->crtc_h);
  3861. } else {
  3862. SDE_DEBUG("Inactive plane:%d\n", plane->base.id);
  3863. }
  3864. }
  3865. }
  3866. static ssize_t _sde_plane_danger_write(struct file *file,
  3867. const char __user *user_buf, size_t count, loff_t *ppos)
  3868. {
  3869. struct sde_kms *kms = file->private_data;
  3870. struct sde_mdss_cfg *cfg = kms->catalog;
  3871. int disable_panic;
  3872. char buf[10];
  3873. if (!cfg)
  3874. return -EFAULT;
  3875. if (count >= sizeof(buf))
  3876. return -EFAULT;
  3877. if (copy_from_user(buf, user_buf, count))
  3878. return -EFAULT;
  3879. buf[count] = 0; /* end of string */
  3880. if (kstrtoint(buf, 0, &disable_panic))
  3881. return -EFAULT;
  3882. if (disable_panic) {
  3883. /* Disable panic signal for all active pipes */
  3884. SDE_DEBUG("Disabling danger:\n");
  3885. _sde_plane_set_danger_state(kms, false);
  3886. kms->has_danger_ctrl = false;
  3887. } else {
  3888. /* Enable panic signal for all active pipes */
  3889. SDE_DEBUG("Enabling danger:\n");
  3890. kms->has_danger_ctrl = true;
  3891. _sde_plane_set_danger_state(kms, true);
  3892. }
  3893. return count;
  3894. }
  3895. static const struct file_operations sde_plane_danger_enable = {
  3896. .open = simple_open,
  3897. .read = _sde_plane_danger_read,
  3898. .write = _sde_plane_danger_write,
  3899. };
  3900. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3901. {
  3902. struct sde_plane *psde;
  3903. struct sde_kms *kms;
  3904. struct msm_drm_private *priv;
  3905. const struct sde_sspp_sub_blks *sblk = 0;
  3906. const struct sde_sspp_cfg *cfg = 0;
  3907. if (!plane || !plane->dev) {
  3908. SDE_ERROR("invalid arguments\n");
  3909. return -EINVAL;
  3910. }
  3911. priv = plane->dev->dev_private;
  3912. if (!priv || !priv->kms) {
  3913. SDE_ERROR("invalid KMS reference\n");
  3914. return -EINVAL;
  3915. }
  3916. kms = to_sde_kms(priv->kms);
  3917. psde = to_sde_plane(plane);
  3918. if (psde && psde->pipe_hw)
  3919. cfg = psde->pipe_hw->cap;
  3920. if (cfg)
  3921. sblk = cfg->sblk;
  3922. if (!sblk)
  3923. return 0;
  3924. /* create overall sub-directory for the pipe */
  3925. psde->debugfs_root =
  3926. debugfs_create_dir(psde->pipe_name,
  3927. plane->dev->primary->debugfs_root);
  3928. if (!psde->debugfs_root)
  3929. return -ENOMEM;
  3930. /* don't error check these */
  3931. debugfs_create_x64("features", 0400,
  3932. psde->debugfs_root, &psde->features);
  3933. if (cfg->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  3934. cfg->features & BIT(SDE_SSPP_SCALER_QSEED3LITE) ||
  3935. cfg->features & BIT(SDE_SSPP_SCALER_QSEED2))
  3936. debugfs_create_bool("default_scaling",
  3937. 0600,
  3938. psde->debugfs_root,
  3939. &psde->debugfs_default_scale);
  3940. if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT)) {
  3941. debugfs_create_u32("in_rot_max_downscale_rt_num",
  3942. 0600,
  3943. psde->debugfs_root,
  3944. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3945. debugfs_create_u32("in_rot_max_downscale_rt_denom",
  3946. 0600,
  3947. psde->debugfs_root,
  3948. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3949. debugfs_create_u32("in_rot_max_downscale_nrt",
  3950. 0600,
  3951. psde->debugfs_root,
  3952. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3953. debugfs_create_u32("in_rot_max_height",
  3954. 0600,
  3955. psde->debugfs_root,
  3956. (u32 *) &psde->pipe_sblk->in_rot_maxheight);
  3957. }
  3958. debugfs_create_u32("xin_id",
  3959. 0400,
  3960. psde->debugfs_root,
  3961. (u32 *) &cfg->xin_id);
  3962. debugfs_create_x32("creq_vblank",
  3963. 0600,
  3964. psde->debugfs_root,
  3965. (u32 *) &sblk->creq_vblank);
  3966. debugfs_create_x32("danger_vblank",
  3967. 0600,
  3968. psde->debugfs_root,
  3969. (u32 *) &sblk->danger_vblank);
  3970. debugfs_create_file("disable_danger",
  3971. 0600,
  3972. psde->debugfs_root,
  3973. kms, &sde_plane_danger_enable);
  3974. return 0;
  3975. }
  3976. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3977. {
  3978. struct sde_plane *psde;
  3979. if (!plane)
  3980. return;
  3981. psde = to_sde_plane(plane);
  3982. debugfs_remove_recursive(psde->debugfs_root);
  3983. }
  3984. #else
  3985. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3986. {
  3987. return 0;
  3988. }
  3989. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3990. {
  3991. }
  3992. #endif
  3993. static int sde_plane_late_register(struct drm_plane *plane)
  3994. {
  3995. return _sde_plane_init_debugfs(plane);
  3996. }
  3997. static void sde_plane_early_unregister(struct drm_plane *plane)
  3998. {
  3999. _sde_plane_destroy_debugfs(plane);
  4000. }
  4001. static const struct drm_plane_funcs sde_plane_funcs = {
  4002. .update_plane = drm_atomic_helper_update_plane,
  4003. .disable_plane = drm_atomic_helper_disable_plane,
  4004. .destroy = sde_plane_destroy,
  4005. .atomic_set_property = sde_plane_atomic_set_property,
  4006. .atomic_get_property = sde_plane_atomic_get_property,
  4007. .reset = sde_plane_reset,
  4008. .atomic_duplicate_state = sde_plane_duplicate_state,
  4009. .atomic_destroy_state = sde_plane_destroy_state,
  4010. .late_register = sde_plane_late_register,
  4011. .early_unregister = sde_plane_early_unregister,
  4012. };
  4013. static const struct drm_plane_helper_funcs sde_plane_helper_funcs = {
  4014. .prepare_fb = sde_plane_prepare_fb,
  4015. .cleanup_fb = sde_plane_cleanup_fb,
  4016. .atomic_check = sde_plane_atomic_check,
  4017. .atomic_update = sde_plane_atomic_update,
  4018. };
  4019. enum sde_sspp sde_plane_pipe(struct drm_plane *plane)
  4020. {
  4021. return plane ? to_sde_plane(plane)->pipe : SSPP_NONE;
  4022. }
  4023. bool is_sde_plane_virtual(struct drm_plane *plane)
  4024. {
  4025. return plane ? to_sde_plane(plane)->is_virtual : false;
  4026. }
  4027. /* initialize plane */
  4028. struct drm_plane *sde_plane_init(struct drm_device *dev,
  4029. uint32_t pipe, bool primary_plane,
  4030. unsigned long possible_crtcs, u32 master_plane_id)
  4031. {
  4032. struct drm_plane *plane = NULL, *master_plane = NULL;
  4033. const struct sde_format_extended *format_list;
  4034. struct sde_plane *psde;
  4035. struct msm_drm_private *priv;
  4036. struct sde_kms *kms;
  4037. enum drm_plane_type type;
  4038. struct sde_vbif_clk_client clk_client;
  4039. int ret = -EINVAL;
  4040. if (!dev) {
  4041. SDE_ERROR("[%u]device is NULL\n", pipe);
  4042. goto exit;
  4043. }
  4044. priv = dev->dev_private;
  4045. if (!priv) {
  4046. SDE_ERROR("[%u]private data is NULL\n", pipe);
  4047. goto exit;
  4048. }
  4049. if (!priv->kms) {
  4050. SDE_ERROR("[%u]invalid KMS reference\n", pipe);
  4051. goto exit;
  4052. }
  4053. kms = to_sde_kms(priv->kms);
  4054. if (!kms->catalog) {
  4055. SDE_ERROR("[%u]invalid catalog reference\n", pipe);
  4056. goto exit;
  4057. }
  4058. /* create and zero local structure */
  4059. psde = kzalloc(sizeof(*psde), GFP_KERNEL);
  4060. if (!psde) {
  4061. SDE_ERROR("[%u]failed to allocate local plane struct\n", pipe);
  4062. ret = -ENOMEM;
  4063. goto exit;
  4064. }
  4065. /* cache local stuff for later */
  4066. plane = &psde->base;
  4067. psde->pipe = pipe;
  4068. psde->is_virtual = (master_plane_id != 0);
  4069. INIT_LIST_HEAD(&psde->mplane_list);
  4070. master_plane = drm_plane_find(dev, NULL, master_plane_id);
  4071. if (master_plane) {
  4072. struct sde_plane *mpsde = to_sde_plane(master_plane);
  4073. list_add_tail(&psde->mplane_list, &mpsde->mplane_list);
  4074. }
  4075. /* initialize underlying h/w driver */
  4076. psde->pipe_hw = sde_hw_sspp_init(pipe, kms->mmio, kms->catalog, psde->is_virtual,
  4077. &clk_client);
  4078. if (IS_ERR(psde->pipe_hw)) {
  4079. SDE_ERROR("[%u]SSPP init failed\n", pipe);
  4080. ret = PTR_ERR(psde->pipe_hw);
  4081. goto clean_plane;
  4082. } else if (!psde->pipe_hw->cap || !psde->pipe_hw->cap->sblk) {
  4083. SDE_ERROR("[%u]SSPP init returned invalid cfg\n", pipe);
  4084. goto clean_sspp;
  4085. }
  4086. if (test_bit(SDE_FEATURE_VBIF_CLK_SPLIT, kms->catalog->features)) {
  4087. ret = sde_vbif_clk_register(kms, &clk_client);
  4088. if (ret) {
  4089. SDE_ERROR("failed to register vbif client %d\n",
  4090. clk_client.clk_ctrl);
  4091. goto clean_sspp;
  4092. }
  4093. }
  4094. /* cache features mask for later */
  4095. psde->features = psde->pipe_hw->cap->features_ext;
  4096. psde->perf_features = psde->pipe_hw->cap->perf_features;
  4097. psde->pipe_sblk = psde->pipe_hw->cap->sblk;
  4098. if (!psde->pipe_sblk) {
  4099. SDE_ERROR("[%u]invalid sblk\n", pipe);
  4100. goto clean_sspp;
  4101. }
  4102. if (psde->is_virtual)
  4103. format_list = psde->pipe_sblk->virt_format_list;
  4104. else
  4105. format_list = psde->pipe_sblk->format_list;
  4106. psde->nformats = sde_populate_formats(format_list,
  4107. psde->formats,
  4108. 0,
  4109. ARRAY_SIZE(psde->formats));
  4110. if (!psde->nformats) {
  4111. SDE_ERROR("[%u]no valid formats for plane\n", pipe);
  4112. goto clean_sspp;
  4113. }
  4114. if (primary_plane)
  4115. type = DRM_PLANE_TYPE_PRIMARY;
  4116. else
  4117. type = DRM_PLANE_TYPE_OVERLAY;
  4118. ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs,
  4119. psde->formats, psde->nformats,
  4120. NULL, type, NULL);
  4121. if (ret)
  4122. goto clean_sspp;
  4123. /* Populate static array of plane property flags */
  4124. _sde_plane_map_prop_to_dirty_bits();
  4125. /* success! finalize initialization */
  4126. drm_plane_helper_add(plane, &sde_plane_helper_funcs);
  4127. msm_property_init(&psde->property_info, &plane->base, dev,
  4128. priv->plane_property, psde->property_data,
  4129. PLANE_PROP_COUNT, PLANE_PROP_BLOBCOUNT,
  4130. sizeof(struct sde_plane_state));
  4131. _sde_plane_install_properties(plane, kms->catalog, master_plane_id);
  4132. /* save user friendly pipe name for later */
  4133. snprintf(psde->pipe_name, SDE_NAME_SIZE, "plane%u", plane->base.id);
  4134. mutex_init(&psde->lock);
  4135. SDE_DEBUG("%s created for pipe:%u id:%u master:%u\n", psde->pipe_name,
  4136. pipe, plane->base.id, master_plane_id);
  4137. return plane;
  4138. clean_sspp:
  4139. if (psde && psde->pipe_hw)
  4140. sde_hw_sspp_destroy(psde->pipe_hw);
  4141. clean_plane:
  4142. kfree(psde);
  4143. exit:
  4144. return ERR_PTR(ret);
  4145. }
  4146. void sde_plane_add_data_to_minidump_va(struct drm_plane *plane)
  4147. {
  4148. struct sde_plane *sde_plane;
  4149. struct sde_plane_state *pstate;
  4150. sde_plane = to_sde_plane(plane);
  4151. pstate = to_sde_plane_state(plane->state);
  4152. sde_mini_dump_add_va_region("sde_plane", sizeof(*sde_plane), sde_plane);
  4153. sde_mini_dump_add_va_region("plane_state", sizeof(*pstate), pstate);
  4154. }