swr-dmic.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/init.h>
  8. #include <linux/slab.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/device.h>
  11. #include <linux/printk.h>
  12. #include <linux/bitops.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/delay.h>
  16. #include <linux/kernel.h>
  17. #include <linux/gpio.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/debugfs.h>
  21. #include <soc/soundwire.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/tlv.h>
  27. #include <asoc/msm-cdc-pinctrl.h>
  28. #include <asoc/msm-cdc-supply.h>
  29. #include <bindings/audio-codec-port-types.h>
  30. #include "wcd938x/wcd938x.h"
  31. #include "swr-dmic.h"
  32. #define NUM_ATTEMPTS 5
  33. #define SWRS_SCP_CONTROL 0x44
  34. #define MAX_NAME_LEN 40
  35. static int swr_master_channel_map[] = {
  36. ZERO,
  37. SWRM_TX_PCM_OUT,
  38. SWRM_TX1_CH1,
  39. SWRM_TX1_CH2,
  40. SWRM_TX1_CH3,
  41. SWRM_TX1_CH4,
  42. SWRM_TX2_CH1,
  43. SWRM_TX2_CH2,
  44. SWRM_TX2_CH3,
  45. SWRM_TX2_CH4,
  46. SWRM_TX3_CH1,
  47. SWRM_TX3_CH2,
  48. SWRM_TX3_CH3,
  49. SWRM_TX3_CH4,
  50. SWRM_TX_PCM_IN,
  51. };
  52. /*
  53. * Private data Structure for swr-dmic. All parameters related to
  54. * external mic codec needs to be defined here.
  55. */
  56. struct swr_dmic_priv {
  57. struct device *dev;
  58. struct swr_device *swr_slave;
  59. struct snd_soc_component *component;
  60. struct snd_soc_component_driver *driver;
  61. struct snd_soc_dai_driver *dai_driver;
  62. struct snd_soc_component *supply_component;
  63. u32 micb_num;
  64. struct device_node *wcd_handle;
  65. bool is_wcd_supply;
  66. int is_en_supply;
  67. u8 tx_master_port_map[SWR_DMIC_MAX_PORTS];
  68. struct swr_port_params tx_port_params[SWR_UC_MAX][SWR_DMIC_MAX_PORTS];
  69. struct swr_dev_frame_config swr_tx_port_params[SWR_UC_MAX];
  70. struct notifier_block nblock;
  71. };
  72. const char *codec_name_list[] = {
  73. "swr-dmic.01",
  74. "swr-dmic.02",
  75. "swr-dmic.03",
  76. "swr-dmic.04",
  77. };
  78. const char *dai_name_list[] = {
  79. "swr_dmic_tx0",
  80. "swr_dmic_tx1",
  81. "swr_dmic_tx2",
  82. "swr_dmic_tx3",
  83. };
  84. const char *aif_name_list[] = {
  85. "SWR_DMIC_AIF0 Capture",
  86. "SWR_DMIC_AIF1 Capture",
  87. "SWR_DMIC_AIF2 Capture",
  88. "SWR_DMIC_AIF3 Capture",
  89. };
  90. static int swr_dmic_reset(struct swr_device *pdev);
  91. static int swr_dmic_up(struct swr_device *pdev);
  92. static int swr_dmic_down(struct swr_device *pdev);
  93. static int swr_dmic_event_notify(struct notifier_block *block,
  94. unsigned long val,
  95. void *data);
  96. static inline int swr_dmic_tx_get_slave_port_type_idx(const char *wname,
  97. unsigned int *port_idx)
  98. {
  99. u8 port_type;
  100. if (strnstr(wname, "HIFI", strlen(wname)))
  101. port_type = SWR_DMIC_HIFI_PORT;
  102. else if (strnstr(wname, "LP", strlen(wname)))
  103. port_type = SWR_DMIC_LP_PORT;
  104. else
  105. return -EINVAL;
  106. *port_idx = port_type;
  107. return 0;
  108. }
  109. static inline int swr_dmic_get_master_port_val(int port)
  110. {
  111. int i;
  112. for (i = 0; i < ARRAY_SIZE(swr_master_channel_map); i++)
  113. if (port == swr_master_channel_map[i])
  114. return i;
  115. return 0;
  116. }
  117. static int swr_dmic_tx_master_port_get(struct snd_kcontrol *kcontrol,
  118. struct snd_ctl_elem_value *ucontrol)
  119. {
  120. struct snd_soc_component *component =
  121. snd_soc_kcontrol_component(kcontrol);
  122. struct swr_dmic_priv *swr_dmic = NULL;
  123. int ret = 0;
  124. unsigned int slave_port_idx = SWR_DMIC_MAX_PORTS;
  125. if (NULL == component) {
  126. pr_err_ratelimited("%s: swr dmic component is NULL\n", __func__);
  127. return -EINVAL;
  128. }
  129. swr_dmic = snd_soc_component_get_drvdata(component);
  130. if (NULL == swr_dmic) {
  131. pr_err_ratelimited("%s: swr_dmic_priv is NULL\n", __func__);
  132. return -EINVAL;
  133. }
  134. ret = swr_dmic_tx_get_slave_port_type_idx(kcontrol->id.name,
  135. &slave_port_idx);
  136. if (ret) {
  137. dev_dbg(component->dev, "%s: invalid port string\n", __func__);
  138. return ret;
  139. }
  140. if (slave_port_idx >= SWR_DMIC_MAX_PORTS) {
  141. pr_err_ratelimited("%s: invalid slave port id\n", __func__);
  142. return -EINVAL;
  143. }
  144. ucontrol->value.integer.value[0] =
  145. swr_dmic_get_master_port_val(
  146. swr_dmic->tx_master_port_map[slave_port_idx]);
  147. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  148. __func__, ucontrol->value.integer.value[0]);
  149. return 0;
  150. }
  151. static int swr_dmic_tx_master_port_put(struct snd_kcontrol *kcontrol,
  152. struct snd_ctl_elem_value *ucontrol)
  153. {
  154. struct snd_soc_component *component =
  155. snd_soc_kcontrol_component(kcontrol);
  156. struct swr_dmic_priv *swr_dmic = NULL;
  157. int ret = 0;
  158. unsigned int slave_port_idx = SWR_DMIC_MAX_PORTS;
  159. unsigned int idx = 0;
  160. if (NULL == component) {
  161. pr_err_ratelimited("%s: swr dmic component is NULL\n", __func__);
  162. return -EINVAL;
  163. }
  164. swr_dmic = snd_soc_component_get_drvdata(component);
  165. if (NULL == swr_dmic) {
  166. pr_err_ratelimited("%s: swr_dmic_priv is NULL\n", __func__);
  167. return -EINVAL;
  168. }
  169. ret = swr_dmic_tx_get_slave_port_type_idx(kcontrol->id.name,
  170. &slave_port_idx);
  171. if (ret) {
  172. dev_dbg(component->dev, "%s: invalid port string\n", __func__);
  173. return ret;
  174. }
  175. if (slave_port_idx >= SWR_DMIC_MAX_PORTS) {
  176. pr_err_ratelimited("%s: invalid slave port id\n", __func__);
  177. return -EINVAL;
  178. }
  179. idx = ucontrol->value.enumerated.item[0];
  180. if (idx < 0 || idx >= ARRAY_SIZE(swr_master_channel_map))
  181. return -EINVAL;
  182. swr_dmic->tx_master_port_map[slave_port_idx] =
  183. swr_master_channel_map[idx];
  184. dev_dbg(component->dev, "%s: slv port id: %d, master_port_type: %d\n",
  185. __func__, slave_port_idx,
  186. swr_dmic->tx_master_port_map[slave_port_idx]);
  187. return 0;
  188. }
  189. static int swr_dmic_port_enable(struct snd_soc_dapm_widget *w,
  190. struct snd_kcontrol *kcontrol, int event)
  191. {
  192. int ret = 0;
  193. struct snd_soc_component *component =
  194. snd_soc_dapm_to_component(w->dapm);
  195. struct swr_dmic_priv *swr_dmic =
  196. snd_soc_component_get_drvdata(component);
  197. u8 ch_mask = 0x01; /* only DpnChannelEN1 register is available */
  198. u8 num_port = 1;
  199. u8 port_id = w->shift;
  200. u8 port_type = swr_dmic->tx_master_port_map[port_id];
  201. switch (event) {
  202. case SND_SOC_DAPM_POST_PMU:
  203. ret = swr_slvdev_datapath_control(swr_dmic->swr_slave,
  204. swr_dmic->swr_slave->dev_num, true);
  205. break;
  206. case SND_SOC_DAPM_PRE_PMD:
  207. ret = swr_disconnect_port(swr_dmic->swr_slave,
  208. &port_id, num_port, &ch_mask, &port_type);
  209. break;
  210. };
  211. return ret;
  212. }
  213. static int dmic_swr_ctrl(struct snd_soc_dapm_widget *w,
  214. struct snd_kcontrol *kcontrol, int event)
  215. {
  216. int ret = 0;
  217. struct snd_soc_component *component =
  218. snd_soc_dapm_to_component(w->dapm);
  219. struct swr_dmic_priv *swr_dmic =
  220. snd_soc_component_get_drvdata(component);
  221. u8 num_ch = 1;
  222. u8 ch_mask = 0x01; /* only DpnChannelEN1 register is available */
  223. u32 ch_rate = SWR_CLK_RATE_4P8MHZ;
  224. u8 num_port = 1;
  225. u8 port_type = 0;
  226. u8 port_id = w->shift;
  227. if (port_id >= SWR_DMIC_MAX_PORTS)
  228. {
  229. dev_err_ratelimited(component->dev, "%s: invalid port id: %d\n",
  230. __func__, port_id);
  231. return -EINVAL;
  232. }
  233. /*
  234. * Port 1 is high quality / 2.4 or 3.072 Mbps
  235. * Port 2 is listen low power / 0.6 or 0.768 Mbps
  236. */
  237. if (port_id == SWR_DMIC_HIFI_PORT)
  238. ch_rate = SWR_CLK_RATE_2P4MHZ;
  239. else
  240. ch_rate = SWR_CLK_RATE_0P6MHZ;
  241. port_type = swr_dmic->tx_master_port_map[port_id];
  242. dev_dbg(component->dev, "%s port_type: %d event: %d\n", __func__,
  243. port_type, event);
  244. switch (event) {
  245. case SND_SOC_DAPM_PRE_PMU:
  246. ret = swr_connect_port(swr_dmic->swr_slave, &port_id,
  247. num_port, &ch_mask, &ch_rate,
  248. &num_ch, &port_type);
  249. break;
  250. case SND_SOC_DAPM_POST_PMD:
  251. ret = swr_slvdev_datapath_control(swr_dmic->swr_slave,
  252. swr_dmic->swr_slave->dev_num, false);
  253. break;
  254. };
  255. return ret;
  256. }
  257. /* qcom,swr-tx-port-params = <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL5 LANE0>, *UC0*
  258. <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, *UC1*
  259. <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, *UC2*
  260. <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, *UC3 */
  261. static int swr_dmic_parse_port_params(struct device *dev,
  262. char *prop)
  263. {
  264. int i, j;
  265. u32 *dt_array, map_size, max_uc;
  266. int ret = 0;
  267. u32 cnt = 0;
  268. struct swr_port_params (*map)[SWR_UC_MAX][SWR_DMIC_MAX_PORTS];
  269. struct swr_dev_frame_config (*map_uc)[SWR_UC_MAX];
  270. struct swr_dmic_priv *swr_dmic = dev_get_drvdata(dev);
  271. map = &swr_dmic->tx_port_params;
  272. map_uc = &swr_dmic->swr_tx_port_params;
  273. if (!of_find_property(dev->of_node, prop,
  274. &map_size)) {
  275. dev_err(dev, "missing port mapping prop %s\n", prop);
  276. ret = -EINVAL;
  277. goto err_port_map;
  278. }
  279. max_uc = map_size / (SWR_DMIC_MAX_PORTS * SWR_PORT_PARAMS * sizeof(u32));
  280. if (max_uc != SWR_UC_MAX) {
  281. dev_err(dev,
  282. "%s:port params not provided for all usecases\n",
  283. __func__);
  284. ret = -EINVAL;
  285. goto err_port_map;
  286. }
  287. dt_array = kzalloc(map_size, GFP_KERNEL);
  288. if (!dt_array) {
  289. ret = -ENOMEM;
  290. goto err_alloc;
  291. }
  292. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  293. SWR_DMIC_MAX_PORTS * SWR_PORT_PARAMS * max_uc);
  294. if (ret) {
  295. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  296. __func__, prop);
  297. goto err_pdata_fail;
  298. }
  299. for (i = 0; i < max_uc; i++) {
  300. for (j = 0; j < SWR_DMIC_MAX_PORTS; j++) {
  301. cnt = (i * SWR_DMIC_MAX_PORTS + j) * SWR_PORT_PARAMS;
  302. (*map)[i][j].offset1 = dt_array[cnt];
  303. (*map)[i][j].lane_ctrl = dt_array[cnt + 1];
  304. dev_err(dev, "%s: port %d, uc: %d, offset1:%d, lane: %d\n",
  305. __func__, j, i, dt_array[cnt], dt_array[cnt + 1]);
  306. }
  307. (*map_uc)[i].pp = &(*map)[i][0];
  308. }
  309. kfree(dt_array);
  310. return 0;
  311. err_pdata_fail:
  312. kfree(dt_array);
  313. err_alloc:
  314. err_port_map:
  315. return ret;
  316. }
  317. static const char * const tx_master_port_text[] = {
  318. "ZERO", "SWRM_PCM_OUT", "SWRM_TX1_CH1", "SWRM_TX1_CH2", "SWRM_TX1_CH3",
  319. "SWRM_TX1_CH4", "SWRM_TX2_CH1", "SWRM_TX2_CH2", "SWRM_TX2_CH3",
  320. "SWRM_TX2_CH4", "SWRM_TX3_CH1", "SWRM_TX3_CH2", "SWRM_TX3_CH3",
  321. "SWRM_TX3_CH4", "SWRM_PCM_IN",
  322. };
  323. static const struct soc_enum tx_master_port_enum =
  324. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(tx_master_port_text),
  325. tx_master_port_text);
  326. static const struct snd_kcontrol_new swr_dmic_snd_controls[] = {
  327. SOC_ENUM_EXT("HIFI PortMap", tx_master_port_enum,
  328. swr_dmic_tx_master_port_get, swr_dmic_tx_master_port_put),
  329. SOC_ENUM_EXT("LP PortMap", tx_master_port_enum,
  330. swr_dmic_tx_master_port_get, swr_dmic_tx_master_port_put),
  331. };
  332. static const struct snd_kcontrol_new dmic_switch[] = {
  333. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  334. };
  335. static const struct snd_kcontrol_new va_dmic_switch[] = {
  336. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  337. };
  338. static const struct snd_soc_dapm_widget swr_dmic_dapm_widgets[] = {
  339. SND_SOC_DAPM_MIXER_E("SWR_DMIC_MIXER", SND_SOC_NOPM,
  340. SWR_DMIC_HIFI_PORT, 0,
  341. dmic_switch, ARRAY_SIZE(dmic_switch), dmic_swr_ctrl,
  342. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  343. SND_SOC_DAPM_MIXER_E("SWR_DMIC_VA_MIXER", SND_SOC_NOPM,
  344. SWR_DMIC_LP_PORT, 0,
  345. va_dmic_switch, ARRAY_SIZE(va_dmic_switch), dmic_swr_ctrl,
  346. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  347. SND_SOC_DAPM_INPUT("SWR_DMIC"),
  348. SND_SOC_DAPM_INPUT("VA_SWR_DMIC"),
  349. SND_SOC_DAPM_OUT_DRV_E("SMIC_PORT_EN", SND_SOC_NOPM,
  350. SWR_DMIC_HIFI_PORT, 0, NULL, 0,
  351. swr_dmic_port_enable,
  352. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  353. SND_SOC_DAPM_OUT_DRV_E("SMIC_VA_PORT_EN", SND_SOC_NOPM,
  354. SWR_DMIC_LP_PORT, 0, NULL, 0,
  355. swr_dmic_port_enable,
  356. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  357. SND_SOC_DAPM_OUTPUT("SWR_DMIC_OUTPUT"),
  358. SND_SOC_DAPM_OUTPUT("SWR_DMIC_VA_OUTPUT"),
  359. };
  360. static const struct snd_soc_dapm_route swr_dmic_audio_map[] = {
  361. {"SWR_DMIC_MIXER", "Switch", "SWR_DMIC"},
  362. {"SMIC_PORT_EN", NULL, "SWR_DMIC_MIXER"},
  363. {"SWR_DMIC_OUTPUT", NULL, "SMIC_PORT_EN"},
  364. {"SWR_DMIC_VA_MIXER", "Switch", "VA_SWR_DMIC"},
  365. {"SMIC_VA_PORT_EN", NULL, "SWR_DMIC_VA_MIXER"},
  366. {"SWR_DMIC_VA_OUTPUT", NULL, "SMIC_VA_PORT_EN"},
  367. };
  368. static int swr_dmic_codec_probe(struct snd_soc_component *component)
  369. {
  370. struct swr_dmic_priv *swr_dmic =
  371. snd_soc_component_get_drvdata(component);
  372. struct snd_soc_dapm_context *dapm =
  373. snd_soc_component_get_dapm(component);
  374. char w_name[MAX_NAME_LEN];
  375. if (!swr_dmic)
  376. return -EINVAL;
  377. swr_dmic->component = component;
  378. if (!component->name_prefix) {
  379. dev_err(component->dev, "%s: component prefix is NULL\n", __func__);
  380. return -EPROBE_DEFER;
  381. }
  382. memset(w_name, 0, sizeof(w_name));
  383. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  384. strlcat(w_name, " ", sizeof(w_name));
  385. strlcat(w_name, swr_dmic->dai_driver->capture.stream_name,
  386. sizeof(w_name));
  387. snd_soc_dapm_ignore_suspend(dapm, w_name);
  388. memset(w_name, 0, sizeof(w_name));
  389. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  390. strlcat(w_name, " SWR_DMIC", sizeof(w_name));
  391. snd_soc_dapm_ignore_suspend(dapm, w_name);
  392. memset(w_name, 0, sizeof(w_name));
  393. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  394. strlcat(w_name, " SMIC_PORT_EN", sizeof(w_name));
  395. snd_soc_dapm_ignore_suspend(dapm, w_name);
  396. memset(w_name, 0, sizeof(w_name));
  397. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  398. strlcat(w_name, " SWR_DMIC_OUTPUT", sizeof(w_name));
  399. snd_soc_dapm_ignore_suspend(dapm, w_name);
  400. memset(w_name, 0, sizeof(w_name));
  401. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  402. strlcat(w_name, " VA_SWR_DMIC", sizeof(w_name));
  403. snd_soc_dapm_ignore_suspend(dapm, w_name);
  404. memset(w_name, 0, sizeof(w_name));
  405. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  406. strlcat(w_name, " SMIC_VA_PORT_EN", sizeof(w_name));
  407. snd_soc_dapm_ignore_suspend(dapm, w_name);
  408. memset(w_name, 0, sizeof(w_name));
  409. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  410. strlcat(w_name, " SWR_DMIC_VA_OUTPUT", sizeof(w_name));
  411. snd_soc_dapm_ignore_suspend(dapm, w_name);
  412. snd_soc_dapm_sync(dapm);
  413. swr_dmic->nblock.notifier_call = swr_dmic_event_notify;
  414. wcd938x_swr_dmic_register_notifier(swr_dmic->supply_component,
  415. &swr_dmic->nblock, true);
  416. return 0;
  417. }
  418. static void swr_dmic_codec_remove(struct snd_soc_component *component)
  419. {
  420. struct swr_dmic_priv *swr_dmic =
  421. snd_soc_component_get_drvdata(component);
  422. swr_dmic->component = NULL;
  423. return;
  424. }
  425. static const struct snd_soc_component_driver soc_codec_dev_swr_dmic = {
  426. .name = NULL,
  427. .probe = swr_dmic_codec_probe,
  428. .remove = swr_dmic_codec_remove,
  429. .controls = swr_dmic_snd_controls,
  430. .num_controls = ARRAY_SIZE(swr_dmic_snd_controls),
  431. .dapm_widgets = swr_dmic_dapm_widgets,
  432. .num_dapm_widgets = ARRAY_SIZE(swr_dmic_dapm_widgets),
  433. .dapm_routes = swr_dmic_audio_map,
  434. .num_dapm_routes = ARRAY_SIZE(swr_dmic_audio_map),
  435. };
  436. static int enable_wcd_codec_supply(struct swr_dmic_priv *swr_dmic, bool enable)
  437. {
  438. int rc = 0;
  439. int micb_num = swr_dmic->micb_num;
  440. struct snd_soc_component *component = swr_dmic->supply_component;
  441. if (!component) {
  442. pr_err_ratelimited("%s: component is NULL\n", __func__);
  443. return -EINVAL;
  444. }
  445. dev_dbg(component->dev, "%s: supply %d micbias: %d enable: %d\n",
  446. __func__, swr_dmic->is_en_supply, micb_num, enable);
  447. if (enable)
  448. rc = wcd938x_codec_force_enable_micbias_v2(component,
  449. SND_SOC_DAPM_PRE_PMU, micb_num);
  450. else
  451. rc = wcd938x_codec_force_enable_micbias_v2(component,
  452. SND_SOC_DAPM_POST_PMD, micb_num);
  453. return rc;
  454. }
  455. static int swr_dmic_parse_supply(struct device_node *np,
  456. struct swr_dmic_priv *swr_dmic)
  457. {
  458. struct platform_device *pdev = NULL;
  459. if (!np || !swr_dmic)
  460. return -EINVAL;
  461. pdev = of_find_device_by_node(np);
  462. if (!pdev)
  463. return -EINVAL;
  464. swr_dmic->supply_component = snd_soc_lookup_component(&pdev->dev, NULL);
  465. return 0;
  466. }
  467. static struct snd_soc_dai_driver swr_dmic_dai[] = {
  468. {
  469. .name = "",
  470. .id = 0,
  471. .capture = {
  472. .stream_name = "",
  473. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  474. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
  475. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  476. .formats = (SNDRV_PCM_FMTBIT_S16_LE |
  477. SNDRV_PCM_FMTBIT_S24_LE |
  478. SNDRV_PCM_FMTBIT_S32_LE),
  479. .rate_max = 192000,
  480. .rate_min = 8000,
  481. .channels_min = 1,
  482. .channels_max = 2,
  483. },
  484. },
  485. };
  486. static int swr_dmic_event_notify(struct notifier_block *block,
  487. unsigned long val,
  488. void *data)
  489. {
  490. u16 event = (val & 0xffff);
  491. int ret = 0;
  492. struct swr_dmic_priv *swr_dmic = container_of(block,
  493. struct swr_dmic_priv,
  494. nblock);
  495. switch (event) {
  496. case WCD938X_EVT_SSR_DOWN:
  497. ret = swr_dmic_down(swr_dmic->swr_slave);
  498. break;
  499. case WCD938X_EVT_SSR_UP:
  500. ret = swr_dmic_up(swr_dmic->swr_slave);
  501. if (!ret)
  502. ret = swr_dmic_reset(swr_dmic->swr_slave);
  503. break;
  504. }
  505. return ret;
  506. }
  507. static int swr_dmic_probe(struct swr_device *pdev)
  508. {
  509. int ret = 0;
  510. int i = 0;
  511. u8 swr_devnum = 0;
  512. int dev_index = -1;
  513. struct swr_dmic_priv *swr_dmic = NULL;
  514. const char *swr_dmic_codec_name_of = NULL;
  515. struct snd_soc_component *component = NULL;
  516. int num_retry = NUM_ATTEMPTS;
  517. swr_dmic = devm_kzalloc(&pdev->dev, sizeof(struct swr_dmic_priv),
  518. GFP_KERNEL);
  519. if (!swr_dmic)
  520. return -ENOMEM;
  521. ret = of_property_read_u32(pdev->dev.of_node, "qcom,swr-dmic-supply",
  522. &swr_dmic->micb_num);
  523. if (ret) {
  524. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  525. __func__, "qcom,swr-dmic-supply",
  526. pdev->dev.of_node->full_name);
  527. goto err;
  528. }
  529. swr_dmic->wcd_handle = of_parse_phandle(pdev->dev.of_node,
  530. "qcom,wcd-handle", 0);
  531. if (!swr_dmic->wcd_handle) {
  532. dev_dbg(&pdev->dev, "%s: no wcd handle listed\n",
  533. __func__);
  534. swr_dmic->is_wcd_supply = false;
  535. } else {
  536. swr_dmic_parse_supply(swr_dmic->wcd_handle, swr_dmic);
  537. swr_dmic->is_wcd_supply = true;
  538. }
  539. if (swr_dmic->is_wcd_supply) {
  540. ret = enable_wcd_codec_supply(swr_dmic, true);
  541. if (ret) {
  542. ret = -EPROBE_DEFER;
  543. swr_dmic->is_wcd_supply = false;
  544. swr_dmic->wcd_handle = NULL;
  545. goto err;
  546. }
  547. ++swr_dmic->is_en_supply;
  548. }
  549. swr_set_dev_data(pdev, swr_dmic);
  550. swr_dmic->swr_slave = pdev;
  551. ret = of_property_read_string(pdev->dev.of_node, "qcom,codec-name",
  552. &swr_dmic_codec_name_of);
  553. if (ret) {
  554. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  555. __func__, "qcom,codec-name",
  556. pdev->dev.of_node->full_name);
  557. goto dev_err;
  558. }
  559. ret = swr_dmic_parse_port_params(&pdev->dev, "qcom,swr-tx-port-params");
  560. if (ret) {
  561. dev_err(&pdev->dev, "%s: Parsing %s failed in node %s\n",
  562. __func__, "qcom,swr-tx-port-params",
  563. pdev->dev.of_node->full_name);
  564. goto dev_err;
  565. }
  566. /*
  567. * Add 5msec delay to provide sufficient time for
  568. * soundwire auto enumeration of slave devices as
  569. * as per HW requirement.
  570. */
  571. usleep_range(5000, 5010);
  572. do {
  573. /* Add delay for soundwire enumeration */
  574. usleep_range(100, 110);
  575. ret = swr_get_logical_dev_num(pdev, pdev->addr, &swr_devnum);
  576. } while (ret && --num_retry);
  577. if (ret) {
  578. dev_info(&pdev->dev,
  579. "%s get devnum %d for dev addr %llx failed\n",
  580. __func__, swr_devnum, pdev->addr);
  581. ret = -EPROBE_DEFER;
  582. if (swr_dmic->is_en_supply == 1) {
  583. enable_wcd_codec_supply(swr_dmic, false);
  584. --swr_dmic->is_en_supply;
  585. }
  586. swr_dmic->is_wcd_supply = false;
  587. swr_dmic->wcd_handle = NULL;
  588. goto err;
  589. }
  590. pdev->dev_num = swr_devnum;
  591. swr_init_port_params(pdev, SWR_DMIC_MAX_PORTS,
  592. swr_dmic->swr_tx_port_params);
  593. swr_dmic->driver = devm_kzalloc(&pdev->dev,
  594. sizeof(struct snd_soc_component_driver), GFP_KERNEL);
  595. if (!swr_dmic->driver) {
  596. ret = -ENOMEM;
  597. goto dev_err;
  598. }
  599. memcpy(swr_dmic->driver, &soc_codec_dev_swr_dmic,
  600. sizeof(struct snd_soc_component_driver));
  601. for (i = 0; i < ARRAY_SIZE(codec_name_list); i++) {
  602. if (!strcmp(swr_dmic_codec_name_of, codec_name_list[i])) {
  603. dev_index = i;
  604. break;
  605. }
  606. }
  607. if (dev_index < 0) {
  608. ret = -EINVAL;
  609. goto dev_err;
  610. }
  611. swr_dmic->driver->name = codec_name_list[dev_index];
  612. swr_dmic->dai_driver = devm_kzalloc(&pdev->dev,
  613. sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
  614. if (!swr_dmic->dai_driver) {
  615. ret = -ENOMEM;
  616. goto dev_err;
  617. }
  618. memcpy(swr_dmic->dai_driver, swr_dmic_dai,
  619. sizeof(struct snd_soc_dai_driver));
  620. swr_dmic->dai_driver->id = dev_index;
  621. swr_dmic->dai_driver->name = dai_name_list[dev_index];
  622. swr_dmic->dai_driver->capture.stream_name = aif_name_list[dev_index];
  623. /* Number of DAI's used is 1 */
  624. ret = snd_soc_register_component(&pdev->dev, swr_dmic->driver,
  625. swr_dmic->dai_driver, 1);
  626. if (ret) {
  627. dev_err(&pdev->dev, "%s: Codec registration failed\n",
  628. __func__);
  629. goto dev_err;
  630. }
  631. component = snd_soc_lookup_component(&pdev->dev,
  632. swr_dmic->driver->name);
  633. if (!component) {
  634. dev_err(&pdev->dev, "%s: could not find swr_dmic component\n",
  635. __func__);
  636. goto dev_err;
  637. }
  638. swr_dmic->component = component;
  639. return 0;
  640. dev_err:
  641. if (swr_dmic->is_en_supply == 1) {
  642. enable_wcd_codec_supply(swr_dmic, false);
  643. --swr_dmic->is_en_supply;
  644. }
  645. swr_dmic->is_wcd_supply = false;
  646. swr_dmic->wcd_handle = NULL;
  647. swr_remove_device(pdev);
  648. err:
  649. return ret;
  650. }
  651. static int swr_dmic_remove(struct swr_device *pdev)
  652. {
  653. struct swr_dmic_priv *swr_dmic;
  654. swr_dmic = swr_get_dev_data(pdev);
  655. if (!swr_dmic) {
  656. dev_err(&pdev->dev, "%s: swr_dmic is NULL\n", __func__);
  657. return -EINVAL;
  658. }
  659. if (swr_dmic->is_en_supply == 1) {
  660. enable_wcd_codec_supply(swr_dmic, false);
  661. --swr_dmic->is_en_supply;
  662. }
  663. snd_soc_unregister_component(&pdev->dev);
  664. swr_set_dev_data(pdev, NULL);
  665. return 0;
  666. }
  667. static int swr_dmic_up(struct swr_device *pdev)
  668. {
  669. int ret = 0;
  670. struct swr_dmic_priv *swr_dmic;
  671. swr_dmic = swr_get_dev_data(pdev);
  672. if (!swr_dmic) {
  673. dev_err_ratelimited(&pdev->dev, "%s: swr_dmic is NULL\n", __func__);
  674. return -EINVAL;
  675. }
  676. ++swr_dmic->is_en_supply;
  677. if (swr_dmic->is_en_supply == 1)
  678. ret = enable_wcd_codec_supply(swr_dmic, true);
  679. return ret;
  680. }
  681. static int swr_dmic_down(struct swr_device *pdev)
  682. {
  683. struct swr_dmic_priv *swr_dmic;
  684. int ret = 0;
  685. swr_dmic = swr_get_dev_data(pdev);
  686. if (!swr_dmic) {
  687. dev_err_ratelimited(&pdev->dev, "%s: swr_dmic is NULL\n", __func__);
  688. return -EINVAL;
  689. }
  690. dev_dbg(&pdev->dev, "%s: is_en_supply: %d\n",
  691. __func__, swr_dmic->is_en_supply);
  692. --swr_dmic->is_en_supply;
  693. if (swr_dmic->is_en_supply < 0) {
  694. dev_warn(&pdev->dev, "%s: mismatch in supply count %d\n",
  695. __func__, swr_dmic->is_en_supply);
  696. swr_dmic->is_en_supply = 0;
  697. goto done;
  698. }
  699. if (!swr_dmic->is_en_supply)
  700. enable_wcd_codec_supply(swr_dmic, false);
  701. done:
  702. return ret;
  703. }
  704. static int swr_dmic_reset(struct swr_device *pdev)
  705. {
  706. struct swr_dmic_priv *swr_dmic;
  707. u8 retry = NUM_ATTEMPTS;
  708. u8 devnum = 0;
  709. swr_dmic = swr_get_dev_data(pdev);
  710. if (!swr_dmic) {
  711. dev_err_ratelimited(&pdev->dev, "%s: swr_dmic is NULL\n", __func__);
  712. return -EINVAL;
  713. }
  714. while (swr_get_logical_dev_num(pdev, pdev->addr, &devnum) && retry--) {
  715. /* Retry after 1 msec delay */
  716. usleep_range(1000, 1100);
  717. }
  718. pdev->dev_num = devnum;
  719. dev_dbg(&pdev->dev, "%s: devnum: %d\n", __func__, devnum);
  720. return 0;
  721. }
  722. #ifdef CONFIG_PM_SLEEP
  723. static int swr_dmic_suspend(struct device *dev)
  724. {
  725. dev_dbg(dev, "%s: system suspend\n", __func__);
  726. return 0;
  727. }
  728. static int swr_dmic_resume(struct device *dev)
  729. {
  730. struct swr_dmic_priv *swr_dmic = swr_get_dev_data(to_swr_device(dev));
  731. if (!swr_dmic) {
  732. dev_err_ratelimited(dev, "%s: swr_dmic private data is NULL\n", __func__);
  733. return -EINVAL;
  734. }
  735. dev_dbg(dev, "%s: system resume\n", __func__);
  736. return 0;
  737. }
  738. #endif /* CONFIG_PM_SLEEP */
  739. static const struct dev_pm_ops swr_dmic_pm_ops = {
  740. SET_SYSTEM_SLEEP_PM_OPS(swr_dmic_suspend, swr_dmic_resume)
  741. };
  742. static const struct swr_device_id swr_dmic_id[] = {
  743. {"swr-dmic", 0},
  744. {}
  745. };
  746. static const struct of_device_id swr_dmic_dt_match[] = {
  747. {
  748. .compatible = "qcom,swr-dmic",
  749. },
  750. {}
  751. };
  752. static struct swr_driver swr_dmic_driver = {
  753. .driver = {
  754. .name = "swr-dmic",
  755. .owner = THIS_MODULE,
  756. .pm = &swr_dmic_pm_ops,
  757. .of_match_table = swr_dmic_dt_match,
  758. },
  759. .probe = swr_dmic_probe,
  760. .remove = swr_dmic_remove,
  761. .id_table = swr_dmic_id,
  762. };
  763. static int __init swr_dmic_init(void)
  764. {
  765. return swr_driver_register(&swr_dmic_driver);
  766. }
  767. static void __exit swr_dmic_exit(void)
  768. {
  769. swr_driver_unregister(&swr_dmic_driver);
  770. }
  771. module_init(swr_dmic_init);
  772. module_exit(swr_dmic_exit);
  773. MODULE_DESCRIPTION("SWR DMIC driver");
  774. MODULE_LICENSE("GPL v2");