lpass-cdc.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #include <linux/of_platform.h>
  6. #include <linux/module.h>
  7. #include <linux/io.h>
  8. #include <linux/init.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/printk.h>
  11. #include <linux/delay.h>
  12. #include <linux/kernel.h>
  13. #include <linux/clk.h>
  14. #include <soc/snd_event.h>
  15. #include <linux/pm_runtime.h>
  16. #include <soc/swr-common.h>
  17. #include <dsp/digital-cdc-rsc-mgr.h>
  18. #include "lpass-cdc.h"
  19. #include "internal.h"
  20. #include "lpass-cdc-clk-rsc.h"
  21. #include <linux/qti-regmap-debugfs.h>
  22. #define DRV_NAME "lpass-cdc"
  23. #define LPASS_CDC_VERSION_ENTRY_SIZE 32
  24. #define LPASS_CDC_STRING_LEN 80
  25. static const struct snd_soc_component_driver lpass_cdc;
  26. /* pm runtime auto suspend timer in msecs */
  27. #define LPASS_CDC_AUTO_SUSPEND_DELAY 100 /* delay in msec */
  28. /* MCLK_MUX table for all macros */
  29. static u16 lpass_cdc_mclk_mux_tbl[MAX_MACRO][MCLK_MUX_MAX] = {
  30. {TX_MACRO, VA_MACRO},
  31. {TX_MACRO, RX_MACRO},
  32. {TX_MACRO, WSA_MACRO},
  33. {TX_MACRO, VA_MACRO},
  34. };
  35. static bool lpass_cdc_is_valid_codec_dev(struct device *dev);
  36. int lpass_cdc_set_port_map(struct snd_soc_component *component,
  37. u32 size, void *data)
  38. {
  39. struct lpass_cdc_priv *priv = NULL;
  40. struct swr_mstr_port_map *map = NULL;
  41. u16 idx;
  42. if (!component || (size == 0) || !data)
  43. return -EINVAL;
  44. priv = snd_soc_component_get_drvdata(component);
  45. if (!priv)
  46. return -EINVAL;
  47. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  48. dev_err_ratelimited(priv->dev, "%s: invalid codec\n", __func__);
  49. return -EINVAL;
  50. }
  51. map = (struct swr_mstr_port_map *)data;
  52. for (idx = 0; idx < size; idx++) {
  53. if (priv->macro_params[map->id].set_port_map)
  54. priv->macro_params[map->id].set_port_map(component,
  55. map->uc,
  56. SWR_MSTR_PORT_LEN,
  57. map->swr_port_params);
  58. map += 1;
  59. }
  60. return 0;
  61. }
  62. EXPORT_SYMBOL(lpass_cdc_set_port_map);
  63. static void lpass_cdc_ahb_write_device(char __iomem *io_base,
  64. u16 reg, u8 value)
  65. {
  66. u32 temp = (u32)(value) & 0x000000FF;
  67. iowrite32(temp, io_base + reg);
  68. }
  69. static void lpass_cdc_ahb_read_device(char __iomem *io_base,
  70. u16 reg, u8 *value)
  71. {
  72. u32 temp;
  73. temp = ioread32(io_base + reg);
  74. *value = (u8)temp;
  75. }
  76. static int __lpass_cdc_reg_read(struct lpass_cdc_priv *priv,
  77. u16 macro_id, u16 reg, u8 *val)
  78. {
  79. int ret = 0;
  80. mutex_lock(&priv->clk_lock);
  81. if (!priv->dev_up) {
  82. dev_dbg_ratelimited(priv->dev,
  83. "%s: SSR in progress, exit\n", __func__);
  84. ret = -EINVAL;
  85. goto ssr_err;
  86. }
  87. if (priv->macro_params[VA_MACRO].dev) {
  88. pm_runtime_get_sync(priv->macro_params[VA_MACRO].dev);
  89. mutex_lock(&priv->vote_lock);
  90. if (((priv->lpass_core_hw_vote && !priv->core_hw_vote_count) ||
  91. (priv->lpass_audio_hw_vote && !priv->core_audio_vote_count))) {
  92. goto vote_err;
  93. }
  94. }
  95. lpass_cdc_ahb_read_device(
  96. priv->macro_params[macro_id].io_base, reg, val);
  97. vote_err:
  98. if (priv->macro_params[VA_MACRO].dev) {
  99. mutex_unlock(&priv->vote_lock);
  100. pm_runtime_mark_last_busy(priv->macro_params[VA_MACRO].dev);
  101. pm_runtime_put_autosuspend(priv->macro_params[VA_MACRO].dev);
  102. }
  103. ssr_err:
  104. mutex_unlock(&priv->clk_lock);
  105. return ret;
  106. }
  107. static int __lpass_cdc_reg_write(struct lpass_cdc_priv *priv,
  108. u16 macro_id, u16 reg, u8 val)
  109. {
  110. int ret = 0;
  111. mutex_lock(&priv->clk_lock);
  112. if (!priv->dev_up) {
  113. dev_dbg_ratelimited(priv->dev,
  114. "%s: SSR in progress, exit\n", __func__);
  115. ret = -EINVAL;
  116. goto ssr_err;
  117. }
  118. if (priv->macro_params[VA_MACRO].dev) {
  119. pm_runtime_get_sync(priv->macro_params[VA_MACRO].dev);
  120. mutex_lock(&priv->vote_lock);
  121. if (((priv->lpass_core_hw_vote && !priv->core_hw_vote_count) ||
  122. (priv->lpass_audio_hw_vote && !priv->core_audio_vote_count))) {
  123. goto vote_err;
  124. }
  125. }
  126. lpass_cdc_ahb_write_device(
  127. priv->macro_params[macro_id].io_base, reg, val);
  128. vote_err:
  129. if (priv->macro_params[VA_MACRO].dev) {
  130. mutex_unlock(&priv->vote_lock);
  131. pm_runtime_mark_last_busy(priv->macro_params[VA_MACRO].dev);
  132. pm_runtime_put_autosuspend(priv->macro_params[VA_MACRO].dev);
  133. }
  134. ssr_err:
  135. mutex_unlock(&priv->clk_lock);
  136. return ret;
  137. }
  138. static int lpass_cdc_update_wcd_event(void *handle, u16 event, u32 data)
  139. {
  140. struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
  141. if (!priv) {
  142. pr_err_ratelimited("%s:Invalid lpass_cdc priv handle\n", __func__);
  143. return -EINVAL;
  144. }
  145. switch (event) {
  146. case WCD_LPASS_CDC_EVT_RX_MUTE:
  147. if (priv->macro_params[RX_MACRO].event_handler)
  148. priv->macro_params[RX_MACRO].event_handler(
  149. priv->component,
  150. LPASS_CDC_MACRO_EVT_RX_MUTE, data);
  151. break;
  152. case WCD_LPASS_CDC_EVT_IMPED_TRUE:
  153. if (priv->macro_params[RX_MACRO].event_handler)
  154. priv->macro_params[RX_MACRO].event_handler(
  155. priv->component,
  156. LPASS_CDC_MACRO_EVT_IMPED_TRUE, data);
  157. break;
  158. case WCD_LPASS_CDC_EVT_IMPED_FALSE:
  159. if (priv->macro_params[RX_MACRO].event_handler)
  160. priv->macro_params[RX_MACRO].event_handler(
  161. priv->component,
  162. LPASS_CDC_MACRO_EVT_IMPED_FALSE, data);
  163. break;
  164. case WCD_LPASS_CDC_EVT_RX_COMPANDER_SOFT_RST:
  165. if (priv->macro_params[RX_MACRO].event_handler)
  166. priv->macro_params[RX_MACRO].event_handler(
  167. priv->component,
  168. LPASS_CDC_MACRO_EVT_RX_COMPANDER_SOFT_RST, data);
  169. break;
  170. case WCD_LPASS_CDC_EVT_BCS_CLK_OFF:
  171. if (priv->macro_params[TX_MACRO].event_handler)
  172. priv->macro_params[TX_MACRO].event_handler(
  173. priv->component,
  174. LPASS_CDC_MACRO_EVT_BCS_CLK_OFF, data);
  175. break;
  176. case WCD_LPASS_CDC_EVT_RX_PA_GAIN_UPDATE:
  177. if (priv->macro_params[RX_MACRO].event_handler)
  178. priv->macro_params[RX_MACRO].event_handler(
  179. priv->component,
  180. LPASS_CDC_MACRO_EVT_RX_PA_GAIN_UPDATE,
  181. data);
  182. break;
  183. case WCD_LPASS_CDC_EVT_HPHL_HD2_ENABLE:
  184. if (priv->macro_params[RX_MACRO].event_handler)
  185. priv->macro_params[RX_MACRO].event_handler(
  186. priv->component,
  187. LPASS_CDC_MACRO_EVT_HPHL_HD2_ENABLE, data);
  188. break;
  189. case WCD_LPASS_CDC_EVT_HPHR_HD2_ENABLE:
  190. if (priv->macro_params[RX_MACRO].event_handler)
  191. priv->macro_params[RX_MACRO].event_handler(
  192. priv->component,
  193. LPASS_CDC_MACRO_EVT_HPHR_HD2_ENABLE, data);
  194. break;
  195. default:
  196. dev_err_ratelimited(priv->dev, "%s: Invalid event %d trigger from wcd\n",
  197. __func__, event);
  198. return -EINVAL;
  199. }
  200. return 0;
  201. }
  202. static int lpass_cdc_register_notifier(void *handle,
  203. struct notifier_block *nblock,
  204. bool enable)
  205. {
  206. struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
  207. if (!priv) {
  208. pr_err_ratelimited("%s: lpass_cdc priv is null\n", __func__);
  209. return -EINVAL;
  210. }
  211. if (enable)
  212. return blocking_notifier_chain_register(&priv->notifier,
  213. nblock);
  214. return blocking_notifier_chain_unregister(&priv->notifier,
  215. nblock);
  216. }
  217. static void lpass_cdc_notifier_call(struct lpass_cdc_priv *priv,
  218. u32 data)
  219. {
  220. dev_dbg(priv->dev, "%s: notifier call, data:%d\n", __func__, data);
  221. blocking_notifier_call_chain(&priv->notifier,
  222. data, (void *)priv->wcd_dev);
  223. }
  224. static bool lpass_cdc_is_valid_child_dev(struct device *dev)
  225. {
  226. if (of_device_is_compatible(dev->parent->of_node, "qcom,lpass-cdc"))
  227. return true;
  228. return false;
  229. }
  230. static bool lpass_cdc_is_valid_codec_dev(struct device *dev)
  231. {
  232. if (of_device_is_compatible(dev->of_node, "qcom,lpass-cdc"))
  233. return true;
  234. return false;
  235. }
  236. /**
  237. * lpass_cdc_clear_amic_tx_hold - clears AMIC register on analog codec
  238. *
  239. * @dev: lpass_cdc device ptr.
  240. *
  241. */
  242. void lpass_cdc_clear_amic_tx_hold(struct device *dev, u16 adc_n)
  243. {
  244. struct lpass_cdc_priv *priv;
  245. u16 event;
  246. u16 amic = 0;
  247. if (!dev) {
  248. pr_err("%s: dev is null\n", __func__);
  249. return;
  250. }
  251. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  252. pr_err("%s: invalid codec\n", __func__);
  253. return;
  254. }
  255. priv = dev_get_drvdata(dev);
  256. if (!priv) {
  257. dev_err(dev, "%s: priv is null\n", __func__);
  258. return;
  259. }
  260. event = LPASS_CDC_WCD_EVT_TX_CH_HOLD_CLEAR;
  261. if (adc_n == LPASS_CDC_ADC0)
  262. amic = 0x1;
  263. else if (adc_n == LPASS_CDC_ADC1)
  264. amic = 0x2;
  265. else if (adc_n == LPASS_CDC_ADC2)
  266. amic = 0x2;
  267. else if (adc_n == LPASS_CDC_ADC3)
  268. amic = 0x3;
  269. else
  270. return;
  271. lpass_cdc_notifier_call(priv, (amic << 0x10 | event));
  272. }
  273. EXPORT_SYMBOL(lpass_cdc_clear_amic_tx_hold);
  274. /**
  275. * lpass_cdc_get_device_ptr - Get child or macro device ptr
  276. *
  277. * @dev: lpass_cdc device ptr.
  278. * @macro_id: ID of macro calling this API.
  279. *
  280. * Returns dev ptr on success or NULL on error.
  281. */
  282. struct device *lpass_cdc_get_device_ptr(struct device *dev, u16 macro_id)
  283. {
  284. struct lpass_cdc_priv *priv;
  285. if (!dev) {
  286. pr_err_ratelimited("%s: dev is null\n", __func__);
  287. return NULL;
  288. }
  289. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  290. pr_err_ratelimited("%s: invalid codec\n", __func__);
  291. return NULL;
  292. }
  293. priv = dev_get_drvdata(dev);
  294. if (!priv || (macro_id >= MAX_MACRO)) {
  295. dev_err_ratelimited(dev, "%s: priv is null or invalid macro\n", __func__);
  296. return NULL;
  297. }
  298. return priv->macro_params[macro_id].dev;
  299. }
  300. EXPORT_SYMBOL(lpass_cdc_get_device_ptr);
  301. /**
  302. * lpass_cdc_get_rsc_clk_device_ptr - Get rsc clk device ptr
  303. *
  304. * @dev: lpass_cdc device ptr.
  305. *
  306. * Returns dev ptr on success or NULL on error.
  307. */
  308. struct device *lpass_cdc_get_rsc_clk_device_ptr(struct device *dev)
  309. {
  310. struct lpass_cdc_priv *priv;
  311. if (!dev) {
  312. pr_err_ratelimited("%s: dev is null\n", __func__);
  313. return NULL;
  314. }
  315. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  316. pr_err_ratelimited("%s: invalid codec\n", __func__);
  317. return NULL;
  318. }
  319. priv = dev_get_drvdata(dev);
  320. if (!priv) {
  321. dev_err_ratelimited(dev, "%s: priv is null\n", __func__);
  322. return NULL;
  323. }
  324. return priv->clk_dev;
  325. }
  326. EXPORT_SYMBOL(lpass_cdc_get_rsc_clk_device_ptr);
  327. static int lpass_cdc_copy_dais_from_macro(struct lpass_cdc_priv *priv)
  328. {
  329. struct snd_soc_dai_driver *dai_ptr;
  330. u16 macro_idx;
  331. /* memcpy into lpass_cdc_dais all macro dais */
  332. if (!priv->lpass_cdc_dais)
  333. priv->lpass_cdc_dais = devm_kzalloc(priv->dev,
  334. priv->num_dais *
  335. sizeof(
  336. struct snd_soc_dai_driver),
  337. GFP_KERNEL);
  338. if (!priv->lpass_cdc_dais)
  339. return -ENOMEM;
  340. dai_ptr = priv->lpass_cdc_dais;
  341. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  342. if (priv->macro_params[macro_idx].dai_ptr) {
  343. memcpy(dai_ptr,
  344. priv->macro_params[macro_idx].dai_ptr,
  345. priv->macro_params[macro_idx].num_dais *
  346. sizeof(struct snd_soc_dai_driver));
  347. dai_ptr += priv->macro_params[macro_idx].num_dais;
  348. }
  349. }
  350. return 0;
  351. }
  352. /**
  353. * lpass_cdc_register_res_clk - Registers rsc clk driver to lpass_cdc
  354. *
  355. * @dev: rsc clk device ptr.
  356. * @rsc_clk_cb: event handler callback for notifications like SSR
  357. *
  358. * Returns 0 on success or -EINVAL on error.
  359. */
  360. int lpass_cdc_register_res_clk(struct device *dev, rsc_clk_cb_t rsc_clk_cb)
  361. {
  362. struct lpass_cdc_priv *priv;
  363. if (!dev || !rsc_clk_cb) {
  364. pr_err_ratelimited("%s: dev or rsc_clk_cb is null\n", __func__);
  365. return -EINVAL;
  366. }
  367. if (!lpass_cdc_is_valid_child_dev(dev)) {
  368. dev_err_ratelimited(dev, "%s: child device :%pK not added yet\n",
  369. __func__, dev);
  370. return -EINVAL;
  371. }
  372. priv = dev_get_drvdata(dev->parent);
  373. if (!priv) {
  374. dev_err_ratelimited(dev, "%s: priv is null\n", __func__);
  375. return -EINVAL;
  376. }
  377. priv->clk_dev = dev;
  378. priv->rsc_clk_cb = rsc_clk_cb;
  379. return 0;
  380. }
  381. EXPORT_SYMBOL(lpass_cdc_register_res_clk);
  382. /**
  383. * lpass_cdc_unregister_res_clk - Unregisters rsc clk driver from lpass_cdc
  384. *
  385. * @dev: resource clk device ptr.
  386. */
  387. void lpass_cdc_unregister_res_clk(struct device *dev)
  388. {
  389. struct lpass_cdc_priv *priv;
  390. if (!dev) {
  391. pr_err_ratelimited("%s: dev is NULL\n", __func__);
  392. return;
  393. }
  394. if (!lpass_cdc_is_valid_child_dev(dev)) {
  395. dev_err_ratelimited(dev, "%s: child device :%pK not added\n",
  396. __func__, dev);
  397. return;
  398. }
  399. priv = dev_get_drvdata(dev->parent);
  400. if (!priv) {
  401. dev_err_ratelimited(dev, "%s: priv is null\n", __func__);
  402. return;
  403. }
  404. priv->clk_dev = NULL;
  405. priv->rsc_clk_cb = NULL;
  406. }
  407. EXPORT_SYMBOL(lpass_cdc_unregister_res_clk);
  408. static u8 lpass_cdc_dmic_clk_div_get(struct snd_soc_component *component,
  409. u32 mode)
  410. {
  411. struct lpass_cdc_priv* priv = snd_soc_component_get_drvdata(component);
  412. int macro = (mode ? VA_MACRO : TX_MACRO);
  413. int ret = 0;
  414. if (priv->macro_params[macro].clk_div_get) {
  415. ret = priv->macro_params[macro].clk_div_get(component);
  416. if (ret >= 0)
  417. return ret;
  418. }
  419. return 1;
  420. }
  421. int lpass_cdc_dmic_clk_enable(struct snd_soc_component *component,
  422. u32 dmic, u32 tx_mode, bool enable)
  423. {
  424. struct lpass_cdc_priv* priv = snd_soc_component_get_drvdata(component);
  425. u8 dmic_clk_en = 0x01;
  426. u16 dmic_clk_reg = 0;
  427. s32 *dmic_clk_cnt = NULL;
  428. u8 *dmic_clk_div = NULL;
  429. u8 freq_change_mask = 0;
  430. u8 clk_div = 0;
  431. dev_dbg(component->dev, "%s: enable: %d, tx_mode:%d, dmic: %d\n",
  432. __func__, enable, tx_mode, dmic);
  433. switch (dmic) {
  434. case 0:
  435. case 1:
  436. dmic_clk_cnt = &(priv->dmic_0_1_clk_cnt);
  437. dmic_clk_div = &(priv->dmic_0_1_clk_div);
  438. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC0_CTL;
  439. freq_change_mask = 0x01;
  440. break;
  441. case 2:
  442. case 3:
  443. dmic_clk_cnt = &(priv->dmic_2_3_clk_cnt);
  444. dmic_clk_div = &(priv->dmic_2_3_clk_div);
  445. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC1_CTL;
  446. freq_change_mask = 0x02;
  447. break;
  448. case 4:
  449. case 5:
  450. dmic_clk_cnt = &(priv->dmic_4_5_clk_cnt);
  451. dmic_clk_div = &(priv->dmic_4_5_clk_div);
  452. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC2_CTL;
  453. freq_change_mask = 0x04;
  454. break;
  455. case 6:
  456. case 7:
  457. dmic_clk_cnt = &(priv->dmic_6_7_clk_cnt);
  458. dmic_clk_div = &(priv->dmic_6_7_clk_div);
  459. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC3_CTL;
  460. freq_change_mask = 0x08;
  461. break;
  462. default:
  463. dev_err_ratelimited(component->dev, "%s: Invalid DMIC Selection\n",
  464. __func__);
  465. return -EINVAL;
  466. }
  467. dev_dbg(component->dev, "%s: DMIC%d dmic_clk_cnt %d\n",
  468. __func__, dmic, *dmic_clk_cnt);
  469. if (enable) {
  470. clk_div = lpass_cdc_dmic_clk_div_get(component, tx_mode);
  471. (*dmic_clk_cnt)++;
  472. if (*dmic_clk_cnt == 1) {
  473. snd_soc_component_update_bits(component,
  474. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  475. 0x80, 0x00);
  476. snd_soc_component_update_bits(component, dmic_clk_reg,
  477. 0x0E, clk_div << 0x1);
  478. snd_soc_component_update_bits(component, dmic_clk_reg,
  479. dmic_clk_en, dmic_clk_en);
  480. } else {
  481. if (*dmic_clk_div > clk_div) {
  482. snd_soc_component_update_bits(component,
  483. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  484. freq_change_mask, freq_change_mask);
  485. snd_soc_component_update_bits(component, dmic_clk_reg,
  486. 0x0E, clk_div << 0x1);
  487. snd_soc_component_update_bits(component,
  488. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  489. freq_change_mask, 0x00);
  490. } else {
  491. clk_div = *dmic_clk_div;
  492. }
  493. }
  494. *dmic_clk_div = clk_div;
  495. } else {
  496. (*dmic_clk_cnt)--;
  497. if (*dmic_clk_cnt == 0) {
  498. snd_soc_component_update_bits(component, dmic_clk_reg,
  499. dmic_clk_en, 0);
  500. clk_div = 0;
  501. snd_soc_component_update_bits(component, dmic_clk_reg,
  502. 0x0E, clk_div << 0x1);
  503. } else {
  504. clk_div = lpass_cdc_dmic_clk_div_get(component, tx_mode);
  505. if (*dmic_clk_div > clk_div) {
  506. clk_div = lpass_cdc_dmic_clk_div_get(component, !tx_mode);
  507. snd_soc_component_update_bits(component,
  508. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  509. freq_change_mask, freq_change_mask);
  510. snd_soc_component_update_bits(component, dmic_clk_reg,
  511. 0x0E, clk_div << 0x1);
  512. snd_soc_component_update_bits(component,
  513. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  514. freq_change_mask, 0x00);
  515. } else {
  516. clk_div = *dmic_clk_div;
  517. }
  518. }
  519. *dmic_clk_div = clk_div;
  520. }
  521. return 0;
  522. }
  523. EXPORT_SYMBOL(lpass_cdc_dmic_clk_enable);
  524. bool lpass_cdc_is_va_macro_registered(struct device *dev)
  525. {
  526. struct lpass_cdc_priv *priv;
  527. if (!dev) {
  528. pr_err_ratelimited("%s: dev is null\n", __func__);
  529. return false;
  530. }
  531. if (!lpass_cdc_is_valid_child_dev(dev)) {
  532. dev_err_ratelimited(dev, "%s: child device calling is not added yet\n",
  533. __func__);
  534. return false;
  535. }
  536. priv = dev_get_drvdata(dev->parent);
  537. if (!priv) {
  538. dev_err_ratelimited(dev, "%s: priv is null\n", __func__);
  539. return false;
  540. }
  541. return priv->macros_supported[VA_MACRO];
  542. }
  543. EXPORT_SYMBOL(lpass_cdc_is_va_macro_registered);
  544. /**
  545. * lpass_cdc_register_macro - Registers macro to lpass_cdc
  546. *
  547. * @dev: macro device ptr.
  548. * @macro_id: ID of macro calling this API.
  549. * @ops: macro params to register.
  550. *
  551. * Returns 0 on success or -EINVAL on error.
  552. */
  553. int lpass_cdc_register_macro(struct device *dev, u16 macro_id,
  554. struct macro_ops *ops)
  555. {
  556. struct lpass_cdc_priv *priv;
  557. int ret = -EINVAL;
  558. if (!dev || !ops) {
  559. pr_err("%s: dev or ops is null\n", __func__);
  560. return -EINVAL;
  561. }
  562. if (!lpass_cdc_is_valid_child_dev(dev)) {
  563. dev_err(dev, "%s: child device for macro:%d not added yet\n",
  564. __func__, macro_id);
  565. return -EINVAL;
  566. }
  567. priv = dev_get_drvdata(dev->parent);
  568. if (!priv || (macro_id >= MAX_MACRO)) {
  569. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  570. return -EINVAL;
  571. }
  572. priv->macro_params[macro_id].clk_id_req = ops->clk_id_req;
  573. priv->macro_params[macro_id].default_clk_id = ops->default_clk_id;
  574. priv->macro_params[macro_id].init = ops->init;
  575. priv->macro_params[macro_id].exit = ops->exit;
  576. priv->macro_params[macro_id].io_base = ops->io_base;
  577. priv->macro_params[macro_id].num_dais = ops->num_dais;
  578. priv->macro_params[macro_id].dai_ptr = ops->dai_ptr;
  579. priv->macro_params[macro_id].event_handler = ops->event_handler;
  580. priv->macro_params[macro_id].set_port_map = ops->set_port_map;
  581. priv->macro_params[macro_id].dev = dev;
  582. priv->current_mclk_mux_macro[macro_id] =
  583. lpass_cdc_mclk_mux_tbl[macro_id][MCLK_MUX0];
  584. if (macro_id == TX_MACRO) {
  585. priv->macro_params[macro_id].reg_wake_irq = ops->reg_wake_irq;
  586. priv->macro_params[macro_id].reg_evt_listener =
  587. ops->reg_evt_listener;
  588. priv->macro_params[macro_id].clk_enable = ops->clk_enable;
  589. }
  590. if (macro_id == TX_MACRO || macro_id == VA_MACRO)
  591. priv->macro_params[macro_id].clk_div_get = ops->clk_div_get;
  592. if (macro_id == VA_MACRO)
  593. priv->macro_params[macro_id].reg_wake_irq =
  594. ops->reg_wake_irq;
  595. priv->num_dais += ops->num_dais;
  596. priv->num_macros_registered++;
  597. priv->macros_supported[macro_id] = true;
  598. dev_info(dev, "%s: register macro successful:%d\n", __func__, macro_id);
  599. if (priv->num_macros_registered == priv->num_macros) {
  600. ret = lpass_cdc_copy_dais_from_macro(priv);
  601. if (ret < 0) {
  602. dev_err(dev, "%s: copy_dais failed\n", __func__);
  603. return ret;
  604. }
  605. if (priv->macros_supported[TX_MACRO] == false) {
  606. lpass_cdc_mclk_mux_tbl[WSA_MACRO][MCLK_MUX0] = WSA_MACRO;
  607. priv->current_mclk_mux_macro[WSA_MACRO] = WSA_MACRO;
  608. lpass_cdc_mclk_mux_tbl[VA_MACRO][MCLK_MUX0] = VA_MACRO;
  609. priv->current_mclk_mux_macro[VA_MACRO] = VA_MACRO;
  610. }
  611. ret = snd_soc_register_component(dev->parent, &lpass_cdc,
  612. priv->lpass_cdc_dais, priv->num_dais);
  613. if (ret < 0) {
  614. dev_err(dev, "%s: register codec failed\n", __func__);
  615. return ret;
  616. }
  617. }
  618. return 0;
  619. }
  620. EXPORT_SYMBOL(lpass_cdc_register_macro);
  621. /**
  622. * lpass_cdc_unregister_macro - De-Register macro from lpass_cdc
  623. *
  624. * @dev: macro device ptr.
  625. * @macro_id: ID of macro calling this API.
  626. *
  627. */
  628. void lpass_cdc_unregister_macro(struct device *dev, u16 macro_id)
  629. {
  630. struct lpass_cdc_priv *priv;
  631. if (!dev) {
  632. pr_err_ratelimited("%s: dev is null\n", __func__);
  633. return;
  634. }
  635. if (!lpass_cdc_is_valid_child_dev(dev)) {
  636. dev_err_ratelimited(dev, "%s: macro:%d not in valid registered macro-list\n",
  637. __func__, macro_id);
  638. return;
  639. }
  640. priv = dev_get_drvdata(dev->parent);
  641. if (!priv || (macro_id >= MAX_MACRO)) {
  642. dev_err_ratelimited(dev, "%s: priv is null or invalid macro\n", __func__);
  643. return;
  644. }
  645. priv->macro_params[macro_id].init = NULL;
  646. priv->macro_params[macro_id].num_dais = 0;
  647. priv->macro_params[macro_id].dai_ptr = NULL;
  648. priv->macro_params[macro_id].event_handler = NULL;
  649. priv->macro_params[macro_id].dev = NULL;
  650. if (macro_id == TX_MACRO) {
  651. priv->macro_params[macro_id].reg_wake_irq = NULL;
  652. priv->macro_params[macro_id].reg_evt_listener = NULL;
  653. priv->macro_params[macro_id].clk_enable = NULL;
  654. }
  655. if (macro_id == TX_MACRO || macro_id == VA_MACRO)
  656. priv->macro_params[macro_id].clk_div_get = NULL;
  657. priv->num_dais -= priv->macro_params[macro_id].num_dais;
  658. priv->num_macros_registered--;
  659. /* UNREGISTER CODEC HERE */
  660. if (priv->num_macros - 1 == priv->num_macros_registered)
  661. snd_soc_unregister_component(dev->parent);
  662. }
  663. EXPORT_SYMBOL(lpass_cdc_unregister_macro);
  664. void lpass_cdc_wsa_pa_on(struct device *dev, bool adie_lb)
  665. {
  666. struct lpass_cdc_priv *priv;
  667. if (!dev) {
  668. pr_err_ratelimited("%s: dev is null\n", __func__);
  669. return;
  670. }
  671. if (!lpass_cdc_is_valid_child_dev(dev)) {
  672. dev_err_ratelimited(dev, "%s: not a valid child dev\n",
  673. __func__);
  674. return;
  675. }
  676. priv = dev_get_drvdata(dev->parent);
  677. if (!priv) {
  678. dev_err_ratelimited(dev, "%s: priv is null\n", __func__);
  679. return;
  680. }
  681. if (adie_lb)
  682. lpass_cdc_notifier_call(priv,
  683. LPASS_CDC_WCD_EVT_PA_ON_POST_FSCLK_ADIE_LB);
  684. else
  685. lpass_cdc_notifier_call(priv,
  686. LPASS_CDC_WCD_EVT_PA_ON_POST_FSCLK);
  687. }
  688. EXPORT_SYMBOL(lpass_cdc_wsa_pa_on);
  689. int lpass_cdc_get_version(struct device *dev)
  690. {
  691. struct lpass_cdc_priv *priv;
  692. if (!dev) {
  693. pr_err("%s: dev is null\n", __func__);
  694. return -EINVAL;
  695. }
  696. if (!lpass_cdc_is_valid_child_dev(dev)) {
  697. dev_err(dev, "%s: child device for macro not added yet\n",
  698. __func__);
  699. return -EINVAL;
  700. }
  701. priv = dev_get_drvdata(dev->parent);
  702. if (!priv) {
  703. dev_err(dev, "%s: priv is null\n", __func__);
  704. return -EINVAL;
  705. }
  706. return priv->version;
  707. }
  708. EXPORT_SYMBOL(lpass_cdc_get_version);
  709. static ssize_t lpass_cdc_version_read(struct snd_info_entry *entry,
  710. void *file_private_data,
  711. struct file *file,
  712. char __user *buf, size_t count,
  713. loff_t pos)
  714. {
  715. struct lpass_cdc_priv *priv;
  716. char buffer[LPASS_CDC_VERSION_ENTRY_SIZE];
  717. int len = 0;
  718. priv = (struct lpass_cdc_priv *) entry->private_data;
  719. if (!priv) {
  720. pr_err_ratelimited("%s: lpass_cdc priv is null\n", __func__);
  721. return -EINVAL;
  722. }
  723. switch (priv->version) {
  724. case LPASS_CDC_VERSION_1_0:
  725. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_0\n");
  726. break;
  727. case LPASS_CDC_VERSION_1_1:
  728. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_1\n");
  729. break;
  730. case LPASS_CDC_VERSION_1_2:
  731. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_2\n");
  732. break;
  733. case LPASS_CDC_VERSION_2_1:
  734. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_1\n");
  735. break;
  736. case LPASS_CDC_VERSION_2_5:
  737. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_5\n");
  738. break;
  739. case LPASS_CDC_VERSION_2_6:
  740. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_6\n");
  741. break;
  742. default:
  743. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  744. }
  745. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  746. }
  747. static int lpass_cdc_ssr_enable(struct device *dev, void *data)
  748. {
  749. struct lpass_cdc_priv *priv = data;
  750. int macro_idx;
  751. if (priv->initial_boot) {
  752. priv->initial_boot = false;
  753. return 0;
  754. }
  755. if (priv->rsc_clk_cb)
  756. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_UP);
  757. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  758. if (priv->macro_params[macro_idx].event_handler)
  759. priv->macro_params[macro_idx].event_handler(
  760. priv->component,
  761. LPASS_CDC_MACRO_EVT_CLK_RESET, 0x0);
  762. }
  763. trace_printk("%s: clk count reset\n", __func__);
  764. mutex_lock(&priv->clk_lock);
  765. priv->pre_dev_up = true;
  766. mutex_unlock(&priv->clk_lock);
  767. if (priv->rsc_clk_cb)
  768. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_GFMUX_UP);
  769. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  770. if (!priv->macro_params[macro_idx].event_handler)
  771. continue;
  772. priv->macro_params[macro_idx].event_handler(
  773. priv->component,
  774. LPASS_CDC_MACRO_EVT_PRE_SSR_UP, 0x0);
  775. }
  776. regcache_cache_only(priv->regmap, false);
  777. mutex_lock(&priv->clk_lock);
  778. priv->dev_up = true;
  779. mutex_unlock(&priv->clk_lock);
  780. regcache_mark_dirty(priv->regmap);
  781. lpass_cdc_clk_rsc_enable_all_clocks(priv->clk_dev, true);
  782. regcache_sync(priv->regmap);
  783. /* Add a 100usec sleep to ensure last register write is done */
  784. usleep_range(100,110);
  785. lpass_cdc_clk_rsc_enable_all_clocks(priv->clk_dev, false);
  786. trace_printk("%s: regcache_sync done\n", __func__);
  787. /* call ssr event for supported macros */
  788. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  789. if (!priv->macro_params[macro_idx].event_handler)
  790. continue;
  791. priv->macro_params[macro_idx].event_handler(
  792. priv->component,
  793. LPASS_CDC_MACRO_EVT_SSR_UP, 0x0);
  794. }
  795. trace_printk("%s: SSR up events processed by all macros\n", __func__);
  796. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_SSR_UP);
  797. return 0;
  798. }
  799. static void lpass_cdc_ssr_disable(struct device *dev, void *data)
  800. {
  801. struct lpass_cdc_priv *priv = data;
  802. int macro_idx;
  803. if (!priv->dev_up) {
  804. dev_err_ratelimited(priv->dev,
  805. "%s: already disabled\n", __func__);
  806. return;
  807. }
  808. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_PA_OFF_PRE_SSR);
  809. regcache_cache_only(priv->regmap, true);
  810. mutex_lock(&priv->clk_lock);
  811. priv->dev_up = false;
  812. priv->pre_dev_up = false;
  813. mutex_unlock(&priv->clk_lock);
  814. if (priv->rsc_clk_cb)
  815. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_DOWN);
  816. /* call ssr event for supported macros */
  817. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  818. if (!priv->macro_params[macro_idx].event_handler)
  819. continue;
  820. priv->macro_params[macro_idx].event_handler(
  821. priv->component,
  822. LPASS_CDC_MACRO_EVT_SSR_DOWN, 0x0);
  823. }
  824. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_SSR_DOWN);
  825. }
  826. static struct snd_info_entry_ops lpass_cdc_info_ops = {
  827. .read = lpass_cdc_version_read,
  828. };
  829. static const struct snd_event_ops lpass_cdc_ssr_ops = {
  830. .enable = lpass_cdc_ssr_enable,
  831. .disable = lpass_cdc_ssr_disable,
  832. };
  833. /*
  834. * lpass_cdc_info_create_codec_entry - creates lpass_cdc module
  835. * @codec_root: The parent directory
  836. * @component: Codec component instance
  837. *
  838. * Creates lpass_cdc module and version entry under the given
  839. * parent directory.
  840. *
  841. * Return: 0 on success or negative error code on failure.
  842. */
  843. int lpass_cdc_info_create_codec_entry(struct snd_info_entry *codec_root,
  844. struct snd_soc_component *component)
  845. {
  846. struct snd_info_entry *version_entry;
  847. struct lpass_cdc_priv *priv;
  848. struct snd_soc_card *card;
  849. if (!codec_root || !component)
  850. return -EINVAL;
  851. priv = snd_soc_component_get_drvdata(component);
  852. if (priv->entry) {
  853. dev_dbg(priv->dev,
  854. "%s:lpass_cdc module already created\n", __func__);
  855. return 0;
  856. }
  857. card = component->card;
  858. priv->entry = snd_info_create_module_entry(codec_root->module,
  859. "lpass-cdc", codec_root);
  860. if (!priv->entry) {
  861. dev_dbg(component->dev, "%s: failed to create lpass_cdc entry\n",
  862. __func__);
  863. return -ENOMEM;
  864. }
  865. priv->entry->mode = S_IFDIR | 0555;
  866. if (snd_info_register(priv->entry) < 0) {
  867. snd_info_free_entry(priv->entry);
  868. return -ENOMEM;
  869. }
  870. version_entry = snd_info_create_card_entry(card->snd_card,
  871. "version",
  872. priv->entry);
  873. if (!version_entry) {
  874. dev_err_ratelimited(component->dev, "%s: failed to create lpass_cdc version entry\n",
  875. __func__);
  876. snd_info_free_entry(priv->entry);
  877. return -ENOMEM;
  878. }
  879. version_entry->private_data = priv;
  880. version_entry->size = LPASS_CDC_VERSION_ENTRY_SIZE;
  881. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  882. version_entry->c.ops = &lpass_cdc_info_ops;
  883. if (snd_info_register(version_entry) < 0) {
  884. snd_info_free_entry(version_entry);
  885. snd_info_free_entry(priv->entry);
  886. return -ENOMEM;
  887. }
  888. priv->version_entry = version_entry;
  889. return 0;
  890. }
  891. EXPORT_SYMBOL(lpass_cdc_info_create_codec_entry);
  892. /**
  893. * lpass_cdc_register_wake_irq - Register wake irq of Tx macro
  894. *
  895. * @component: codec component ptr.
  896. * @ipc_wakeup: bool to identify ipc_wakeup to be used or HW interrupt line.
  897. *
  898. * Return: 0 on success or negative error code on failure.
  899. */
  900. int lpass_cdc_register_wake_irq(struct snd_soc_component *component,
  901. u32 ipc_wakeup)
  902. {
  903. struct lpass_cdc_priv *priv = NULL;
  904. if (!component)
  905. return -EINVAL;
  906. priv = snd_soc_component_get_drvdata(component);
  907. if (!priv)
  908. return -EINVAL;
  909. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  910. dev_err_ratelimited(component->dev, "%s: invalid codec\n", __func__);
  911. return -EINVAL;
  912. }
  913. if (priv->macro_params[VA_MACRO].reg_wake_irq)
  914. priv->macro_params[VA_MACRO].reg_wake_irq(
  915. component, ipc_wakeup);
  916. return 0;
  917. }
  918. EXPORT_SYMBOL(lpass_cdc_register_wake_irq);
  919. /**
  920. * lpass_cdc_tx_mclk_enable - Enable/Disable TX Macro mclk
  921. *
  922. * @component: pointer to codec component instance.
  923. * @enable: set true to enable, otherwise false.
  924. *
  925. * Returns 0 on success or -EINVAL on error.
  926. */
  927. int lpass_cdc_tx_mclk_enable(struct snd_soc_component *component,
  928. bool enable)
  929. {
  930. struct lpass_cdc_priv *priv = NULL;
  931. int ret = 0;
  932. if (!component)
  933. return -EINVAL;
  934. priv = snd_soc_component_get_drvdata(component);
  935. if (!priv)
  936. return -EINVAL;
  937. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  938. dev_err_ratelimited(component->dev, "%s: invalid codec\n", __func__);
  939. return -EINVAL;
  940. }
  941. if (priv->macro_params[TX_MACRO].clk_enable)
  942. ret = priv->macro_params[TX_MACRO].clk_enable(component,
  943. enable);
  944. return ret;
  945. }
  946. EXPORT_SYMBOL(lpass_cdc_tx_mclk_enable);
  947. /**
  948. * lpass_cdc_register_event_listener - Register/Deregister to event listener
  949. *
  950. * @component: pointer to codec component instance.
  951. * @enable: when set to 1 registers to event listener otherwise, derigisters
  952. * from the event listener
  953. *
  954. * Returns 0 on success or -EINVAL on error.
  955. */
  956. int lpass_cdc_register_event_listener(struct snd_soc_component *component,
  957. bool enable)
  958. {
  959. struct lpass_cdc_priv *priv = NULL;
  960. int ret = 0;
  961. if (!component)
  962. return -EINVAL;
  963. priv = snd_soc_component_get_drvdata(component);
  964. if (!priv)
  965. return -EINVAL;
  966. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  967. dev_err_ratelimited(component->dev, "%s: invalid codec\n", __func__);
  968. return -EINVAL;
  969. }
  970. if (priv->macro_params[TX_MACRO].reg_evt_listener)
  971. ret = priv->macro_params[TX_MACRO].reg_evt_listener(component,
  972. enable);
  973. return ret;
  974. }
  975. EXPORT_SYMBOL(lpass_cdc_register_event_listener);
  976. static int lpass_cdc_soc_codec_probe(struct snd_soc_component *component)
  977. {
  978. struct lpass_cdc_priv *priv = dev_get_drvdata(component->dev);
  979. int macro_idx, ret = 0;
  980. u8 core_id_0 = 0, core_id_1 = 0, core_id_2 = 0;
  981. snd_soc_component_init_regmap(component, priv->regmap);
  982. if (!priv->version) {
  983. /*
  984. * In order for the ADIE RTC to differentiate between targets
  985. * version info is used.
  986. * Assign 1.0 for target with only one macro
  987. * Assign 1.1 for target with two macros
  988. * Assign 1.2 for target with more than two macros
  989. */
  990. if (priv->num_macros_registered == 1)
  991. priv->version = LPASS_CDC_VERSION_1_0;
  992. else if (priv->num_macros_registered == 2)
  993. priv->version = LPASS_CDC_VERSION_1_1;
  994. else if (priv->num_macros_registered > 2)
  995. priv->version = LPASS_CDC_VERSION_1_2;
  996. }
  997. /* Assign lpass_cdc version */
  998. core_id_0 = snd_soc_component_read(component,
  999. LPASS_CDC_VA_TOP_CSR_CORE_ID_0);
  1000. core_id_1 = snd_soc_component_read(component,
  1001. LPASS_CDC_VA_TOP_CSR_CORE_ID_1);
  1002. core_id_2 = snd_soc_component_read(component,
  1003. LPASS_CDC_VA_TOP_CSR_CORE_ID_2);
  1004. if ((core_id_0 == 0x01) && (core_id_1 == 0x0F))
  1005. priv->version = LPASS_CDC_VERSION_2_0;
  1006. if ((core_id_0 == 0x02) && (core_id_1 == 0x0E))
  1007. priv->version = LPASS_CDC_VERSION_2_1;
  1008. if ((core_id_0 == 0x02) && (core_id_1 == 0x0F))
  1009. priv->version = LPASS_CDC_VERSION_2_5;
  1010. if ((core_id_0 == 0x02) && (core_id_1 == 0x0F) && (core_id_2 == 0x60 || core_id_2 == 0x61))
  1011. priv->version = LPASS_CDC_VERSION_2_6;
  1012. /* call init for supported macros */
  1013. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  1014. if (priv->macro_params[macro_idx].init) {
  1015. ret = priv->macro_params[macro_idx].init(component);
  1016. if (ret < 0) {
  1017. dev_err(component->dev,
  1018. "%s: init for macro %d failed\n",
  1019. __func__, macro_idx);
  1020. goto err;
  1021. }
  1022. }
  1023. }
  1024. priv->component = component;
  1025. ret = snd_event_client_register(priv->dev, &lpass_cdc_ssr_ops, priv);
  1026. if (!ret) {
  1027. snd_event_notify(priv->dev, SND_EVENT_UP);
  1028. } else {
  1029. dev_err(component->dev,
  1030. "%s: Registration with SND event FWK failed ret = %d\n",
  1031. __func__, ret);
  1032. goto err;
  1033. }
  1034. dev_dbg(component->dev, "%s: lpass_cdc soc codec probe success\n",
  1035. __func__);
  1036. err:
  1037. return ret;
  1038. }
  1039. static void lpass_cdc_soc_codec_remove(struct snd_soc_component *component)
  1040. {
  1041. struct lpass_cdc_priv *priv = dev_get_drvdata(component->dev);
  1042. int macro_idx;
  1043. snd_event_client_deregister(priv->dev);
  1044. /* call exit for supported macros */
  1045. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++)
  1046. if (priv->macro_params[macro_idx].exit)
  1047. priv->macro_params[macro_idx].exit(component);
  1048. return;
  1049. }
  1050. static const struct snd_soc_component_driver lpass_cdc = {
  1051. .name = DRV_NAME,
  1052. .probe = lpass_cdc_soc_codec_probe,
  1053. .remove = lpass_cdc_soc_codec_remove,
  1054. };
  1055. static void lpass_cdc_add_child_devices(struct work_struct *work)
  1056. {
  1057. struct lpass_cdc_priv *priv;
  1058. bool split_codec = false;
  1059. struct platform_device *pdev;
  1060. struct device_node *node;
  1061. int ret = 0, count = 0;
  1062. struct wcd_ctrl_platform_data *platdata = NULL;
  1063. char plat_dev_name[LPASS_CDC_STRING_LEN] = "";
  1064. priv = container_of(work, struct lpass_cdc_priv,
  1065. lpass_cdc_add_child_devices_work);
  1066. if (!priv) {
  1067. pr_err("%s: Memory for lpass_cdc priv does not exist\n",
  1068. __func__);
  1069. return;
  1070. }
  1071. if (!priv->dev || !priv->dev->of_node) {
  1072. dev_err(priv->dev, "%s: DT node for lpass_cdc does not exist\n",
  1073. __func__);
  1074. return;
  1075. }
  1076. platdata = &priv->plat_data;
  1077. priv->child_count = 0;
  1078. for_each_available_child_of_node(priv->dev->of_node, node) {
  1079. split_codec = false;
  1080. if (of_find_property(node, "qcom,split-codec", NULL)) {
  1081. split_codec = true;
  1082. dev_dbg(priv->dev, "%s: split codec slave exists\n",
  1083. __func__);
  1084. }
  1085. strlcpy(plat_dev_name, node->name,
  1086. (LPASS_CDC_STRING_LEN - 1));
  1087. pdev = platform_device_alloc(plat_dev_name, -1);
  1088. if (!pdev) {
  1089. dev_err(priv->dev, "%s: pdev memory alloc failed\n",
  1090. __func__);
  1091. ret = -ENOMEM;
  1092. goto err;
  1093. }
  1094. pdev->dev.parent = priv->dev;
  1095. pdev->dev.of_node = node;
  1096. priv->dev->platform_data = platdata;
  1097. if (split_codec)
  1098. priv->wcd_dev = &pdev->dev;
  1099. ret = platform_device_add(pdev);
  1100. if (ret) {
  1101. dev_err(&pdev->dev,
  1102. "%s: Cannot add platform device\n",
  1103. __func__);
  1104. platform_device_put(pdev);
  1105. goto fail_pdev_add;
  1106. }
  1107. if (priv->child_count < LPASS_CDC_CHILD_DEVICES_MAX)
  1108. priv->pdev_child_devices[priv->child_count++] = pdev;
  1109. else
  1110. goto err;
  1111. }
  1112. return;
  1113. fail_pdev_add:
  1114. for (count = 0; count < priv->child_count; count++)
  1115. platform_device_put(priv->pdev_child_devices[count]);
  1116. err:
  1117. return;
  1118. }
  1119. static int lpass_cdc_probe(struct platform_device *pdev)
  1120. {
  1121. struct lpass_cdc_priv *priv;
  1122. u32 num_macros = 0;
  1123. int ret;
  1124. struct clk *lpass_core_hw_vote = NULL;
  1125. struct clk *lpass_audio_hw_vote = NULL;
  1126. priv = devm_kzalloc(&pdev->dev, sizeof(struct lpass_cdc_priv),
  1127. GFP_KERNEL);
  1128. if (!priv)
  1129. return -ENOMEM;
  1130. ret = of_property_read_u32(pdev->dev.of_node, "qcom,num-macros",
  1131. &num_macros);
  1132. if (ret) {
  1133. dev_err(&pdev->dev,
  1134. "%s:num-macros property not found\n",
  1135. __func__);
  1136. return ret;
  1137. }
  1138. priv->num_macros = num_macros;
  1139. if (priv->num_macros > MAX_MACRO) {
  1140. dev_err(&pdev->dev,
  1141. "%s:num_macros(%d) > MAX_MACRO(%d) than supported\n",
  1142. __func__, priv->num_macros, MAX_MACRO);
  1143. return -EINVAL;
  1144. }
  1145. ret = of_property_read_u32(pdev->dev.of_node,
  1146. "qcom,lpass-cdc-version", &priv->version);
  1147. if (ret) {
  1148. dev_dbg(&pdev->dev, "%s:lpass_cdc version not specified\n",
  1149. __func__);
  1150. ret = 0;
  1151. }
  1152. BLOCKING_INIT_NOTIFIER_HEAD(&priv->notifier);
  1153. priv->dev = &pdev->dev;
  1154. priv->dev_up = true;
  1155. priv->pre_dev_up = true;
  1156. priv->initial_boot = true;
  1157. priv->regmap = lpass_cdc_regmap_init(priv->dev,
  1158. &lpass_cdc_regmap_config);
  1159. if (IS_ERR_OR_NULL((void *)(priv->regmap))) {
  1160. dev_err(&pdev->dev, "%s:regmap init failed\n", __func__);
  1161. return -EINVAL;
  1162. }
  1163. devm_regmap_qti_debugfs_register(priv->dev, priv->regmap);
  1164. priv->read_dev = __lpass_cdc_reg_read;
  1165. priv->write_dev = __lpass_cdc_reg_write;
  1166. priv->plat_data.handle = (void *) priv;
  1167. priv->plat_data.update_wcd_event = lpass_cdc_update_wcd_event;
  1168. priv->plat_data.register_notifier = lpass_cdc_register_notifier;
  1169. priv->core_hw_vote_count = 0;
  1170. priv->core_audio_vote_count = 0;
  1171. dev_set_drvdata(&pdev->dev, priv);
  1172. mutex_init(&priv->io_lock);
  1173. mutex_init(&priv->clk_lock);
  1174. mutex_init(&priv->vote_lock);
  1175. INIT_WORK(&priv->lpass_cdc_add_child_devices_work,
  1176. lpass_cdc_add_child_devices);
  1177. /* Register LPASS core hw vote */
  1178. lpass_core_hw_vote = devm_clk_get(&pdev->dev, "lpass_core_hw_vote");
  1179. if (IS_ERR(lpass_core_hw_vote)) {
  1180. ret = PTR_ERR(lpass_core_hw_vote);
  1181. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  1182. __func__, "lpass_core_hw_vote", ret);
  1183. lpass_core_hw_vote = NULL;
  1184. ret = 0;
  1185. }
  1186. priv->lpass_core_hw_vote = lpass_core_hw_vote;
  1187. /* Register LPASS audio hw vote */
  1188. lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
  1189. if (IS_ERR(lpass_audio_hw_vote)) {
  1190. ret = PTR_ERR(lpass_audio_hw_vote);
  1191. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  1192. __func__, "lpass_audio_hw_vote", ret);
  1193. lpass_audio_hw_vote = NULL;
  1194. ret = 0;
  1195. }
  1196. priv->lpass_audio_hw_vote = lpass_audio_hw_vote;
  1197. schedule_work(&priv->lpass_cdc_add_child_devices_work);
  1198. return 0;
  1199. }
  1200. static int lpass_cdc_remove(struct platform_device *pdev)
  1201. {
  1202. struct lpass_cdc_priv *priv = dev_get_drvdata(&pdev->dev);
  1203. if (!priv)
  1204. return -EINVAL;
  1205. of_platform_depopulate(&pdev->dev);
  1206. mutex_destroy(&priv->io_lock);
  1207. mutex_destroy(&priv->clk_lock);
  1208. mutex_destroy(&priv->vote_lock);
  1209. return 0;
  1210. }
  1211. #ifdef CONFIG_PM
  1212. int lpass_cdc_runtime_resume(struct device *dev)
  1213. {
  1214. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1215. int ret = 0;
  1216. trace_printk("%s, enter\n", __func__);
  1217. mutex_lock(&priv->vote_lock);
  1218. if (priv->lpass_core_hw_vote == NULL) {
  1219. dev_dbg(dev, "%s: Invalid lpass core hw node\n", __func__);
  1220. goto audio_vote;
  1221. }
  1222. if (priv->core_hw_vote_count == 0) {
  1223. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_core_hw_vote);
  1224. if (ret < 0) {
  1225. dev_err_ratelimited(dev, "%s:lpass core hw enable failed\n",
  1226. __func__);
  1227. goto audio_vote;
  1228. }
  1229. }
  1230. priv->core_hw_vote_count++;
  1231. trace_printk("%s: hw vote count %d\n",
  1232. __func__, priv->core_hw_vote_count);
  1233. audio_vote:
  1234. if (priv->lpass_audio_hw_vote == NULL) {
  1235. dev_dbg(dev, "%s: Invalid lpass audio hw node\n", __func__);
  1236. goto done;
  1237. }
  1238. if (priv->core_audio_vote_count == 0) {
  1239. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote);
  1240. if (ret < 0) {
  1241. dev_err_ratelimited(dev, "%s:lpass audio hw enable failed\n",
  1242. __func__);
  1243. goto done;
  1244. }
  1245. }
  1246. priv->core_audio_vote_count++;
  1247. trace_printk("%s: audio vote count %d\n",
  1248. __func__, priv->core_audio_vote_count);
  1249. done:
  1250. mutex_unlock(&priv->vote_lock);
  1251. trace_printk("%s, leave\n", __func__);
  1252. pm_runtime_set_autosuspend_delay(priv->dev, LPASS_CDC_AUTO_SUSPEND_DELAY);
  1253. return 0;
  1254. }
  1255. EXPORT_SYMBOL(lpass_cdc_runtime_resume);
  1256. int lpass_cdc_runtime_suspend(struct device *dev)
  1257. {
  1258. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1259. trace_printk("%s, enter\n", __func__);
  1260. mutex_lock(&priv->vote_lock);
  1261. if (priv->lpass_core_hw_vote != NULL) {
  1262. if (--priv->core_hw_vote_count == 0)
  1263. digital_cdc_rsc_mgr_hw_vote_disable(
  1264. priv->lpass_core_hw_vote);
  1265. if (priv->core_hw_vote_count < 0)
  1266. priv->core_hw_vote_count = 0;
  1267. } else {
  1268. dev_dbg(dev, "%s: Invalid lpass core hw node\n",
  1269. __func__);
  1270. }
  1271. trace_printk("%s: hw vote count %d\n",
  1272. __func__, priv->core_hw_vote_count);
  1273. if (priv->lpass_audio_hw_vote != NULL) {
  1274. if (--priv->core_audio_vote_count == 0)
  1275. digital_cdc_rsc_mgr_hw_vote_disable(
  1276. priv->lpass_audio_hw_vote);
  1277. if (priv->core_audio_vote_count < 0)
  1278. priv->core_audio_vote_count = 0;
  1279. } else {
  1280. dev_dbg(dev, "%s: Invalid lpass audio hw node\n",
  1281. __func__);
  1282. }
  1283. trace_printk("%s: audio vote count %d\n",
  1284. __func__, priv->core_audio_vote_count);
  1285. mutex_unlock(&priv->vote_lock);
  1286. trace_printk("%s, leave\n", __func__);
  1287. return 0;
  1288. }
  1289. EXPORT_SYMBOL(lpass_cdc_runtime_suspend);
  1290. #endif /* CONFIG_PM */
  1291. bool lpass_cdc_check_core_votes(struct device *dev)
  1292. {
  1293. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1294. bool ret = true;
  1295. trace_printk("%s, enter\n", __func__);
  1296. mutex_lock(&priv->vote_lock);
  1297. if (!priv->pre_dev_up ||
  1298. (priv->lpass_core_hw_vote && !priv->core_hw_vote_count) ||
  1299. (priv->lpass_audio_hw_vote && !priv->core_audio_vote_count))
  1300. ret = false;
  1301. mutex_unlock(&priv->vote_lock);
  1302. trace_printk("%s, leave\n", __func__);
  1303. return ret;
  1304. }
  1305. EXPORT_SYMBOL(lpass_cdc_check_core_votes);
  1306. static const struct of_device_id lpass_cdc_dt_match[] = {
  1307. {.compatible = "qcom,lpass-cdc"},
  1308. {}
  1309. };
  1310. MODULE_DEVICE_TABLE(of, lpass_cdc_dt_match);
  1311. static struct platform_driver lpass_cdc_drv = {
  1312. .driver = {
  1313. .name = "lpass-cdc",
  1314. .owner = THIS_MODULE,
  1315. .of_match_table = lpass_cdc_dt_match,
  1316. .suppress_bind_attrs = true,
  1317. },
  1318. .probe = lpass_cdc_probe,
  1319. .remove = lpass_cdc_remove,
  1320. };
  1321. static int lpass_cdc_drv_init(void)
  1322. {
  1323. return platform_driver_register(&lpass_cdc_drv);
  1324. }
  1325. static void lpass_cdc_drv_exit(void)
  1326. {
  1327. platform_driver_unregister(&lpass_cdc_drv);
  1328. }
  1329. static int __init lpass_cdc_init(void)
  1330. {
  1331. lpass_cdc_drv_init();
  1332. lpass_cdc_clk_rsc_mgr_init();
  1333. return 0;
  1334. }
  1335. module_init(lpass_cdc_init);
  1336. static void __exit lpass_cdc_exit(void)
  1337. {
  1338. lpass_cdc_clk_rsc_mgr_exit();
  1339. lpass_cdc_drv_exit();
  1340. }
  1341. module_exit(lpass_cdc_exit);
  1342. MODULE_DESCRIPTION("LPASS Codec driver");
  1343. MODULE_LICENSE("GPL v2");