main.c 114 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  85. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  86. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  87. };
  88. static struct cnss_fw_files FW_FILES_DEFAULT = {
  89. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  90. "utfbd.bin", "epping.bin", "evicted.bin"
  91. };
  92. struct cnss_driver_event {
  93. struct list_head list;
  94. enum cnss_driver_event_type type;
  95. bool sync;
  96. struct completion complete;
  97. int ret;
  98. void *data;
  99. };
  100. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  101. struct cnss_plat_data *plat_priv)
  102. {
  103. plat_env = plat_priv;
  104. }
  105. bool cnss_check_driver_loading_allowed(void)
  106. {
  107. return cnss_allow_driver_loading;
  108. }
  109. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  110. {
  111. return plat_env;
  112. }
  113. /**
  114. * cnss_get_mem_seg_count - Get segment count of memory
  115. * @type: memory type
  116. * @seg: segment count
  117. *
  118. * Return: 0 on success, negative value on failure
  119. */
  120. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  121. {
  122. struct cnss_plat_data *plat_priv;
  123. plat_priv = cnss_get_plat_priv(NULL);
  124. if (!plat_priv)
  125. return -ENODEV;
  126. switch (type) {
  127. case CNSS_REMOTE_MEM_TYPE_FW:
  128. *seg = plat_priv->fw_mem_seg_len;
  129. break;
  130. case CNSS_REMOTE_MEM_TYPE_QDSS:
  131. *seg = plat_priv->qdss_mem_seg_len;
  132. break;
  133. default:
  134. return -EINVAL;
  135. }
  136. return 0;
  137. }
  138. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  139. /**
  140. * cnss_get_wifi_kobject -return wifi kobject
  141. * Return: Null, to maintain driver comnpatibilty
  142. */
  143. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  144. {
  145. struct cnss_plat_data *plat_priv;
  146. plat_priv = cnss_get_plat_priv(NULL);
  147. if (!plat_priv)
  148. return NULL;
  149. return plat_priv->wifi_kobj;
  150. }
  151. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  152. /**
  153. * cnss_get_mem_segment_info - Get memory info of different type
  154. * @type: memory type
  155. * @segment: array to save the segment info
  156. * @seg: segment count
  157. *
  158. * Return: 0 on success, negative value on failure
  159. */
  160. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  161. struct cnss_mem_segment segment[],
  162. u32 segment_count)
  163. {
  164. struct cnss_plat_data *plat_priv;
  165. u32 i;
  166. plat_priv = cnss_get_plat_priv(NULL);
  167. if (!plat_priv)
  168. return -ENODEV;
  169. switch (type) {
  170. case CNSS_REMOTE_MEM_TYPE_FW:
  171. if (segment_count > plat_priv->fw_mem_seg_len)
  172. segment_count = plat_priv->fw_mem_seg_len;
  173. for (i = 0; i < segment_count; i++) {
  174. segment[i].size = plat_priv->fw_mem[i].size;
  175. segment[i].va = plat_priv->fw_mem[i].va;
  176. segment[i].pa = plat_priv->fw_mem[i].pa;
  177. }
  178. break;
  179. case CNSS_REMOTE_MEM_TYPE_QDSS:
  180. if (segment_count > plat_priv->qdss_mem_seg_len)
  181. segment_count = plat_priv->qdss_mem_seg_len;
  182. for (i = 0; i < segment_count; i++) {
  183. segment[i].size = plat_priv->qdss_mem[i].size;
  184. segment[i].va = plat_priv->qdss_mem[i].va;
  185. segment[i].pa = plat_priv->qdss_mem[i].pa;
  186. }
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. return 0;
  192. }
  193. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  194. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  195. {
  196. struct device_node *audio_ion_node;
  197. struct platform_device *audio_ion_pdev;
  198. audio_ion_node = of_find_compatible_node(NULL, NULL,
  199. "qcom,msm-audio-ion");
  200. if (!audio_ion_node) {
  201. cnss_pr_err("Unable to get Audio ion node");
  202. return -EINVAL;
  203. }
  204. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  205. of_node_put(audio_ion_node);
  206. if (!audio_ion_pdev) {
  207. cnss_pr_err("Unable to get Audio ion platform device");
  208. return -EINVAL;
  209. }
  210. plat_priv->audio_iommu_domain =
  211. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  212. put_device(&audio_ion_pdev->dev);
  213. if (!plat_priv->audio_iommu_domain) {
  214. cnss_pr_err("Unable to get Audio ion iommu domain");
  215. return -EINVAL;
  216. }
  217. return 0;
  218. }
  219. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  220. enum cnss_feature_v01 feature)
  221. {
  222. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  223. return -EINVAL;
  224. plat_priv->feature_list |= 1 << feature;
  225. return 0;
  226. }
  227. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  228. enum cnss_feature_v01 feature)
  229. {
  230. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  231. return -EINVAL;
  232. plat_priv->feature_list &= ~(1 << feature);
  233. return 0;
  234. }
  235. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  236. u64 *feature_list)
  237. {
  238. if (unlikely(!plat_priv))
  239. return -EINVAL;
  240. *feature_list = plat_priv->feature_list;
  241. return 0;
  242. }
  243. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  244. {
  245. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  246. return;
  247. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  248. plat_priv->driver_state,
  249. atomic_read(&plat_priv->pm_count));
  250. pm_stay_awake(&plat_priv->plat_dev->dev);
  251. }
  252. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  253. {
  254. int r = atomic_dec_return(&plat_priv->pm_count);
  255. WARN_ON(r < 0);
  256. if (r != 0)
  257. return;
  258. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  259. plat_priv->driver_state,
  260. atomic_read(&plat_priv->pm_count));
  261. pm_relax(&plat_priv->plat_dev->dev);
  262. }
  263. int cnss_get_fw_files_for_target(struct device *dev,
  264. struct cnss_fw_files *pfw_files,
  265. u32 target_type, u32 target_version)
  266. {
  267. if (!pfw_files)
  268. return -ENODEV;
  269. switch (target_version) {
  270. case QCA6174_REV3_VERSION:
  271. case QCA6174_REV3_2_VERSION:
  272. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  273. break;
  274. default:
  275. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  276. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  277. target_type, target_version);
  278. break;
  279. }
  280. return 0;
  281. }
  282. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  283. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  284. {
  285. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  286. if (!plat_priv)
  287. return -ENODEV;
  288. if (!cap)
  289. return -EINVAL;
  290. *cap = plat_priv->cap;
  291. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  292. return 0;
  293. }
  294. EXPORT_SYMBOL(cnss_get_platform_cap);
  295. /**
  296. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  297. * @dev: Device
  298. * @fw_cap: FW Capability which needs to be checked
  299. *
  300. * Return: TRUE if supported, FALSE on failure or if not supported
  301. */
  302. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  303. {
  304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  305. bool is_supported = false;
  306. if (!plat_priv)
  307. return is_supported;
  308. if (!plat_priv->fw_caps)
  309. return is_supported;
  310. switch (fw_cap) {
  311. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  312. is_supported = !!(plat_priv->fw_caps &
  313. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  314. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  315. is_supported = false;
  316. break;
  317. default:
  318. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  319. }
  320. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  321. is_supported ? "supported" : "not supported");
  322. return is_supported;
  323. }
  324. EXPORT_SYMBOL(cnss_get_fw_cap);
  325. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  326. {
  327. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  328. if (!plat_priv)
  329. return;
  330. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  331. }
  332. EXPORT_SYMBOL(cnss_request_pm_qos);
  333. void cnss_remove_pm_qos(struct device *dev)
  334. {
  335. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  336. if (!plat_priv)
  337. return;
  338. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  339. }
  340. EXPORT_SYMBOL(cnss_remove_pm_qos);
  341. int cnss_wlan_enable(struct device *dev,
  342. struct cnss_wlan_enable_cfg *config,
  343. enum cnss_driver_mode mode,
  344. const char *host_version)
  345. {
  346. int ret = 0;
  347. struct cnss_plat_data *plat_priv;
  348. if (!dev) {
  349. cnss_pr_err("Invalid dev pointer\n");
  350. return -EINVAL;
  351. }
  352. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  353. if (!plat_priv)
  354. return -ENODEV;
  355. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  356. return 0;
  357. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  358. return 0;
  359. if (!config || !host_version) {
  360. cnss_pr_err("Invalid config or host_version pointer\n");
  361. return -EINVAL;
  362. }
  363. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  364. mode, config, host_version);
  365. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  366. goto skip_cfg;
  367. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  368. if (ret)
  369. goto out;
  370. skip_cfg:
  371. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  372. out:
  373. return ret;
  374. }
  375. EXPORT_SYMBOL(cnss_wlan_enable);
  376. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  377. {
  378. int ret = 0;
  379. struct cnss_plat_data *plat_priv;
  380. if (!dev) {
  381. cnss_pr_err("Invalid dev pointer\n");
  382. return -EINVAL;
  383. }
  384. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  385. if (!plat_priv)
  386. return -ENODEV;
  387. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  388. return 0;
  389. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  390. return 0;
  391. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  392. cnss_bus_free_qdss_mem(plat_priv);
  393. return ret;
  394. }
  395. EXPORT_SYMBOL(cnss_wlan_disable);
  396. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  397. dma_addr_t iova, size_t size)
  398. {
  399. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  400. uint32_t page_offset;
  401. if (!plat_priv)
  402. return -ENODEV;
  403. if (!plat_priv->audio_iommu_domain)
  404. return -EINVAL;
  405. page_offset = iova & (PAGE_SIZE - 1);
  406. if (page_offset + size > PAGE_SIZE)
  407. size += PAGE_SIZE;
  408. iova -= page_offset;
  409. paddr -= page_offset;
  410. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  411. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  412. IOMMU_CACHE);
  413. }
  414. EXPORT_SYMBOL(cnss_audio_smmu_map);
  415. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  416. {
  417. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  418. uint32_t page_offset;
  419. if (!plat_priv)
  420. return;
  421. if (!plat_priv->audio_iommu_domain)
  422. return;
  423. page_offset = iova & (PAGE_SIZE - 1);
  424. if (page_offset + size > PAGE_SIZE)
  425. size += PAGE_SIZE;
  426. iova -= page_offset;
  427. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  428. roundup(size, PAGE_SIZE));
  429. }
  430. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  431. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  432. u32 data_len, u8 *output)
  433. {
  434. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  435. int ret = 0;
  436. if (!plat_priv) {
  437. cnss_pr_err("plat_priv is NULL!\n");
  438. return -EINVAL;
  439. }
  440. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  441. return 0;
  442. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  443. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  444. plat_priv->driver_state);
  445. ret = -EINVAL;
  446. goto out;
  447. }
  448. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  449. data_len, output);
  450. out:
  451. return ret;
  452. }
  453. EXPORT_SYMBOL(cnss_athdiag_read);
  454. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  455. u32 data_len, u8 *input)
  456. {
  457. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  458. int ret = 0;
  459. if (!plat_priv) {
  460. cnss_pr_err("plat_priv is NULL!\n");
  461. return -EINVAL;
  462. }
  463. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  464. return 0;
  465. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  466. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  467. plat_priv->driver_state);
  468. ret = -EINVAL;
  469. goto out;
  470. }
  471. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  472. data_len, input);
  473. out:
  474. return ret;
  475. }
  476. EXPORT_SYMBOL(cnss_athdiag_write);
  477. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  478. {
  479. struct cnss_plat_data *plat_priv;
  480. if (!dev) {
  481. cnss_pr_err("Invalid dev pointer\n");
  482. return -EINVAL;
  483. }
  484. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  485. if (!plat_priv)
  486. return -ENODEV;
  487. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  488. return 0;
  489. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  490. }
  491. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  492. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  493. {
  494. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  495. if (!plat_priv)
  496. return -EINVAL;
  497. if (!plat_priv->fw_pcie_gen_switch) {
  498. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  499. return -EOPNOTSUPP;
  500. }
  501. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  502. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  503. return -EINVAL;
  504. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  505. plat_priv->pcie_gen_speed = pcie_gen_speed;
  506. return 0;
  507. }
  508. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  509. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  510. {
  511. int ret = 0;
  512. if (!plat_priv)
  513. return -ENODEV;
  514. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  515. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  516. if (ret)
  517. goto out;
  518. if (plat_priv->hds_enabled)
  519. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  520. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  521. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  522. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  523. plat_priv->ctrl_params.bdf_type);
  524. if (ret)
  525. goto out;
  526. ret = cnss_bus_load_m3(plat_priv);
  527. if (ret)
  528. goto out;
  529. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  530. if (ret)
  531. goto out;
  532. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  533. return 0;
  534. out:
  535. return ret;
  536. }
  537. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  538. {
  539. int ret = 0;
  540. if (!plat_priv->antenna) {
  541. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  542. if (ret)
  543. goto out;
  544. }
  545. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  546. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  547. if (ret)
  548. goto out;
  549. }
  550. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  551. if (ret)
  552. goto out;
  553. return 0;
  554. out:
  555. return ret;
  556. }
  557. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  558. {
  559. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  560. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  561. }
  562. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  563. {
  564. u32 i;
  565. int ret = 0;
  566. struct cnss_plat_ipc_daemon_config *cfg;
  567. ret = cnss_qmi_get_dms_mac(plat_priv);
  568. if (ret == 0 && plat_priv->dms.mac_valid)
  569. goto qmi_send;
  570. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  571. * Thus assert on failure to get MAC from DMS even after retries
  572. */
  573. if (plat_priv->use_nv_mac) {
  574. /* Check if Daemon says platform support DMS MAC provisioning */
  575. cfg = cnss_plat_ipc_qmi_daemon_config();
  576. if (cfg) {
  577. if (!cfg->dms_mac_addr_supported) {
  578. cnss_pr_err("DMS MAC address not supported\n");
  579. CNSS_ASSERT(0);
  580. return -EINVAL;
  581. }
  582. }
  583. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  584. if (plat_priv->dms.mac_valid)
  585. break;
  586. ret = cnss_qmi_get_dms_mac(plat_priv);
  587. if (ret == 0)
  588. break;
  589. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  590. }
  591. if (!plat_priv->dms.mac_valid) {
  592. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  593. CNSS_ASSERT(0);
  594. return -EINVAL;
  595. }
  596. }
  597. qmi_send:
  598. if (plat_priv->dms.mac_valid)
  599. ret =
  600. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  601. ARRAY_SIZE(plat_priv->dms.mac));
  602. return ret;
  603. }
  604. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  605. enum cnss_cal_db_op op, u32 *size)
  606. {
  607. int ret = 0;
  608. u32 timeout = cnss_get_timeout(plat_priv,
  609. CNSS_TIMEOUT_DAEMON_CONNECTION);
  610. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  611. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  612. if (op >= CNSS_CAL_DB_INVALID_OP)
  613. return -EINVAL;
  614. if (!plat_priv->cbc_file_download) {
  615. cnss_pr_info("CAL DB file not required as per BDF\n");
  616. return 0;
  617. }
  618. if (*size == 0) {
  619. cnss_pr_err("Invalid cal file size\n");
  620. return -EINVAL;
  621. }
  622. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  623. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  624. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  625. msecs_to_jiffies(timeout));
  626. if (!ret) {
  627. cnss_pr_err("Daemon not yet connected\n");
  628. CNSS_ASSERT(0);
  629. return ret;
  630. }
  631. }
  632. if (!plat_priv->cal_mem->va) {
  633. cnss_pr_err("CAL DB Memory not setup for FW\n");
  634. return -EINVAL;
  635. }
  636. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  637. if (op == CNSS_CAL_DB_DOWNLOAD) {
  638. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  639. ret = cnss_plat_ipc_qmi_file_download(client_id,
  640. CNSS_CAL_DB_FILE_NAME,
  641. plat_priv->cal_mem->va,
  642. size);
  643. } else {
  644. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  645. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  646. CNSS_CAL_DB_FILE_NAME,
  647. plat_priv->cal_mem->va,
  648. *size);
  649. }
  650. if (ret)
  651. cnss_pr_err("Cal DB file %s %s failure\n",
  652. CNSS_CAL_DB_FILE_NAME,
  653. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  654. else
  655. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  656. CNSS_CAL_DB_FILE_NAME,
  657. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  658. *size);
  659. return ret;
  660. }
  661. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  662. {
  663. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  664. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  665. return -EINVAL;
  666. }
  667. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  668. &plat_priv->cal_file_size);
  669. }
  670. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  671. u32 *cal_file_size)
  672. {
  673. /* To download pass the total size of cal DB mem allocated.
  674. * After cal file is download to mem, its size is updated in
  675. * return pointer
  676. */
  677. *cal_file_size = plat_priv->cal_mem->size;
  678. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  679. cal_file_size);
  680. }
  681. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  682. {
  683. int ret = 0;
  684. u32 cal_file_size = 0;
  685. if (!plat_priv)
  686. return -ENODEV;
  687. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  688. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  689. return -EINVAL;
  690. }
  691. cnss_pr_dbg("Processing FW Init Done..\n");
  692. del_timer(&plat_priv->fw_boot_timer);
  693. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  694. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  695. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  696. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  697. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  698. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  699. }
  700. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  701. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  702. CNSS_WALTEST);
  703. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  704. cnss_request_antenna_sharing(plat_priv);
  705. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  706. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  707. plat_priv->cal_time = jiffies;
  708. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  709. CNSS_CALIBRATION);
  710. } else {
  711. ret = cnss_setup_dms_mac(plat_priv);
  712. ret = cnss_bus_call_driver_probe(plat_priv);
  713. }
  714. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  715. goto out;
  716. else if (ret)
  717. goto shutdown;
  718. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  719. return 0;
  720. shutdown:
  721. cnss_bus_dev_shutdown(plat_priv);
  722. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  723. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  724. out:
  725. return ret;
  726. }
  727. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  728. {
  729. switch (type) {
  730. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  731. return "SERVER_ARRIVE";
  732. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  733. return "SERVER_EXIT";
  734. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  735. return "REQUEST_MEM";
  736. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  737. return "FW_MEM_READY";
  738. case CNSS_DRIVER_EVENT_FW_READY:
  739. return "FW_READY";
  740. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  741. return "COLD_BOOT_CAL_START";
  742. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  743. return "COLD_BOOT_CAL_DONE";
  744. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  745. return "REGISTER_DRIVER";
  746. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  747. return "UNREGISTER_DRIVER";
  748. case CNSS_DRIVER_EVENT_RECOVERY:
  749. return "RECOVERY";
  750. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  751. return "FORCE_FW_ASSERT";
  752. case CNSS_DRIVER_EVENT_POWER_UP:
  753. return "POWER_UP";
  754. case CNSS_DRIVER_EVENT_POWER_DOWN:
  755. return "POWER_DOWN";
  756. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  757. return "IDLE_RESTART";
  758. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  759. return "IDLE_SHUTDOWN";
  760. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  761. return "IMS_WFC_CALL_IND";
  762. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  763. return "WLFW_TWC_CFG_IND";
  764. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  765. return "QDSS_TRACE_REQ_MEM";
  766. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  767. return "FW_MEM_FILE_SAVE";
  768. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  769. return "QDSS_TRACE_FREE";
  770. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  771. return "QDSS_TRACE_REQ_DATA";
  772. case CNSS_DRIVER_EVENT_MAX:
  773. return "EVENT_MAX";
  774. }
  775. return "UNKNOWN";
  776. };
  777. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  778. enum cnss_driver_event_type type,
  779. u32 flags, void *data)
  780. {
  781. struct cnss_driver_event *event;
  782. unsigned long irq_flags;
  783. int gfp = GFP_KERNEL;
  784. int ret = 0;
  785. if (!plat_priv)
  786. return -ENODEV;
  787. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  788. cnss_driver_event_to_str(type), type,
  789. flags ? "-sync" : "", plat_priv->driver_state, flags);
  790. if (type >= CNSS_DRIVER_EVENT_MAX) {
  791. cnss_pr_err("Invalid Event type: %d, can't post", type);
  792. return -EINVAL;
  793. }
  794. if (in_interrupt() || irqs_disabled())
  795. gfp = GFP_ATOMIC;
  796. event = kzalloc(sizeof(*event), gfp);
  797. if (!event)
  798. return -ENOMEM;
  799. cnss_pm_stay_awake(plat_priv);
  800. event->type = type;
  801. event->data = data;
  802. init_completion(&event->complete);
  803. event->ret = CNSS_EVENT_PENDING;
  804. event->sync = !!(flags & CNSS_EVENT_SYNC);
  805. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  806. list_add_tail(&event->list, &plat_priv->event_list);
  807. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  808. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  809. if (!(flags & CNSS_EVENT_SYNC))
  810. goto out;
  811. if (flags & CNSS_EVENT_UNKILLABLE)
  812. wait_for_completion(&event->complete);
  813. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  814. ret = wait_for_completion_killable(&event->complete);
  815. else
  816. ret = wait_for_completion_interruptible(&event->complete);
  817. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  818. cnss_driver_event_to_str(type), type,
  819. plat_priv->driver_state, ret, event->ret);
  820. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  821. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  822. event->sync = false;
  823. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  824. ret = -EINTR;
  825. goto out;
  826. }
  827. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  828. ret = event->ret;
  829. kfree(event);
  830. out:
  831. cnss_pm_relax(plat_priv);
  832. return ret;
  833. }
  834. /**
  835. * cnss_get_timeout - Get timeout for corresponding type.
  836. * @plat_priv: Pointer to platform driver context.
  837. * @cnss_timeout_type: Timeout type.
  838. *
  839. * Return: Timeout in milliseconds.
  840. */
  841. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  842. enum cnss_timeout_type timeout_type)
  843. {
  844. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  845. switch (timeout_type) {
  846. case CNSS_TIMEOUT_QMI:
  847. return qmi_timeout;
  848. case CNSS_TIMEOUT_POWER_UP:
  849. return (qmi_timeout << 2);
  850. case CNSS_TIMEOUT_IDLE_RESTART:
  851. /* In idle restart power up sequence, we have fw_boot_timer to
  852. * handle FW initialization failure.
  853. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  854. * account for FW dump collection and FW re-initialization on
  855. * retry.
  856. */
  857. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  858. case CNSS_TIMEOUT_CALIBRATION:
  859. /* Similar to mission mode, in CBC if FW init fails
  860. * fw recovery is tried. Thus return 2x the CBC timeout.
  861. */
  862. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  863. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  864. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  865. case CNSS_TIMEOUT_RDDM:
  866. return CNSS_RDDM_TIMEOUT_MS;
  867. case CNSS_TIMEOUT_RECOVERY:
  868. return RECOVERY_TIMEOUT;
  869. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  870. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  871. default:
  872. return qmi_timeout;
  873. }
  874. }
  875. unsigned int cnss_get_boot_timeout(struct device *dev)
  876. {
  877. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  878. if (!plat_priv) {
  879. cnss_pr_err("plat_priv is NULL\n");
  880. return 0;
  881. }
  882. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  883. }
  884. EXPORT_SYMBOL(cnss_get_boot_timeout);
  885. int cnss_power_up(struct device *dev)
  886. {
  887. int ret = 0;
  888. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  889. unsigned int timeout;
  890. if (!plat_priv) {
  891. cnss_pr_err("plat_priv is NULL\n");
  892. return -ENODEV;
  893. }
  894. cnss_pr_dbg("Powering up device\n");
  895. ret = cnss_driver_event_post(plat_priv,
  896. CNSS_DRIVER_EVENT_POWER_UP,
  897. CNSS_EVENT_SYNC, NULL);
  898. if (ret)
  899. goto out;
  900. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  901. goto out;
  902. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  903. reinit_completion(&plat_priv->power_up_complete);
  904. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  905. msecs_to_jiffies(timeout));
  906. if (!ret) {
  907. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  908. timeout);
  909. ret = -EAGAIN;
  910. goto out;
  911. }
  912. return 0;
  913. out:
  914. return ret;
  915. }
  916. EXPORT_SYMBOL(cnss_power_up);
  917. int cnss_power_down(struct device *dev)
  918. {
  919. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  920. if (!plat_priv) {
  921. cnss_pr_err("plat_priv is NULL\n");
  922. return -ENODEV;
  923. }
  924. cnss_pr_dbg("Powering down device\n");
  925. return cnss_driver_event_post(plat_priv,
  926. CNSS_DRIVER_EVENT_POWER_DOWN,
  927. CNSS_EVENT_SYNC, NULL);
  928. }
  929. EXPORT_SYMBOL(cnss_power_down);
  930. int cnss_idle_restart(struct device *dev)
  931. {
  932. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  933. unsigned int timeout;
  934. int ret = 0;
  935. if (!plat_priv) {
  936. cnss_pr_err("plat_priv is NULL\n");
  937. return -ENODEV;
  938. }
  939. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  940. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  941. return -EBUSY;
  942. }
  943. cnss_pr_dbg("Doing idle restart\n");
  944. reinit_completion(&plat_priv->power_up_complete);
  945. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  946. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  947. ret = -EINVAL;
  948. goto out;
  949. }
  950. ret = cnss_driver_event_post(plat_priv,
  951. CNSS_DRIVER_EVENT_IDLE_RESTART,
  952. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  953. if (ret)
  954. goto out;
  955. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  956. ret = cnss_bus_call_driver_probe(plat_priv);
  957. goto out;
  958. }
  959. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  960. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  961. msecs_to_jiffies(timeout));
  962. if (plat_priv->power_up_error) {
  963. ret = plat_priv->power_up_error;
  964. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  965. cnss_pr_dbg("Power up error:%d, exiting\n",
  966. plat_priv->power_up_error);
  967. goto out;
  968. }
  969. if (!ret) {
  970. /* This exception occurs after attempting retry of FW recovery.
  971. * Thus we can safely power off the device.
  972. */
  973. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  974. timeout);
  975. ret = -ETIMEDOUT;
  976. cnss_power_down(dev);
  977. CNSS_ASSERT(0);
  978. goto out;
  979. }
  980. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  981. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  982. del_timer(&plat_priv->fw_boot_timer);
  983. ret = -EINVAL;
  984. goto out;
  985. }
  986. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  987. * non-DRV is supported only once after device reboots and before wifi
  988. * is turned on. We do not allow switching back to DRV.
  989. * To bring device back into DRV, user needs to reboot device.
  990. */
  991. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  992. cnss_pr_dbg("DRV is disabled\n");
  993. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  994. }
  995. mutex_unlock(&plat_priv->driver_ops_lock);
  996. return 0;
  997. out:
  998. mutex_unlock(&plat_priv->driver_ops_lock);
  999. return ret;
  1000. }
  1001. EXPORT_SYMBOL(cnss_idle_restart);
  1002. int cnss_idle_shutdown(struct device *dev)
  1003. {
  1004. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1005. unsigned int timeout;
  1006. int ret;
  1007. if (!plat_priv) {
  1008. cnss_pr_err("plat_priv is NULL\n");
  1009. return -ENODEV;
  1010. }
  1011. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1012. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1013. return -EAGAIN;
  1014. }
  1015. cnss_pr_dbg("Doing idle shutdown\n");
  1016. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  1017. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1018. goto skip_wait;
  1019. reinit_completion(&plat_priv->recovery_complete);
  1020. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  1021. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  1022. msecs_to_jiffies(timeout));
  1023. if (!ret) {
  1024. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  1025. timeout);
  1026. CNSS_ASSERT(0);
  1027. }
  1028. skip_wait:
  1029. return cnss_driver_event_post(plat_priv,
  1030. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1031. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1032. }
  1033. EXPORT_SYMBOL(cnss_idle_shutdown);
  1034. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1035. {
  1036. int ret = 0;
  1037. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1038. if (ret < 0) {
  1039. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1040. goto out;
  1041. }
  1042. ret = cnss_get_clk(plat_priv);
  1043. if (ret) {
  1044. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1045. goto put_vreg;
  1046. }
  1047. ret = cnss_get_pinctrl(plat_priv);
  1048. if (ret) {
  1049. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1050. goto put_clk;
  1051. }
  1052. return 0;
  1053. put_clk:
  1054. cnss_put_clk(plat_priv);
  1055. put_vreg:
  1056. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1057. out:
  1058. return ret;
  1059. }
  1060. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1061. {
  1062. cnss_put_clk(plat_priv);
  1063. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1064. }
  1065. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1066. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1067. unsigned long code,
  1068. void *ss_handle)
  1069. {
  1070. struct cnss_plat_data *plat_priv =
  1071. container_of(nb, struct cnss_plat_data, modem_nb);
  1072. struct cnss_esoc_info *esoc_info;
  1073. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1074. if (!plat_priv)
  1075. return NOTIFY_DONE;
  1076. esoc_info = &plat_priv->esoc_info;
  1077. if (code == SUBSYS_AFTER_POWERUP)
  1078. esoc_info->modem_current_status = 1;
  1079. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1080. esoc_info->modem_current_status = 0;
  1081. else
  1082. return NOTIFY_DONE;
  1083. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1084. esoc_info->modem_current_status))
  1085. return NOTIFY_DONE;
  1086. return NOTIFY_OK;
  1087. }
  1088. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1089. {
  1090. int ret = 0;
  1091. struct device *dev;
  1092. struct cnss_esoc_info *esoc_info;
  1093. struct esoc_desc *esoc_desc;
  1094. const char *client_desc;
  1095. dev = &plat_priv->plat_dev->dev;
  1096. esoc_info = &plat_priv->esoc_info;
  1097. esoc_info->notify_modem_status =
  1098. of_property_read_bool(dev->of_node,
  1099. "qcom,notify-modem-status");
  1100. if (!esoc_info->notify_modem_status)
  1101. goto out;
  1102. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1103. &client_desc);
  1104. if (ret) {
  1105. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1106. } else {
  1107. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1108. if (IS_ERR_OR_NULL(esoc_desc)) {
  1109. ret = PTR_RET(esoc_desc);
  1110. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1111. ret);
  1112. goto out;
  1113. }
  1114. esoc_info->esoc_desc = esoc_desc;
  1115. }
  1116. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1117. esoc_info->modem_current_status = 0;
  1118. esoc_info->modem_notify_handler =
  1119. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1120. esoc_info->esoc_desc->name :
  1121. "modem", &plat_priv->modem_nb);
  1122. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1123. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1124. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1125. ret);
  1126. goto unreg_esoc;
  1127. }
  1128. return 0;
  1129. unreg_esoc:
  1130. if (esoc_info->esoc_desc)
  1131. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1132. out:
  1133. return ret;
  1134. }
  1135. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1136. {
  1137. struct device *dev;
  1138. struct cnss_esoc_info *esoc_info;
  1139. dev = &plat_priv->plat_dev->dev;
  1140. esoc_info = &plat_priv->esoc_info;
  1141. if (esoc_info->notify_modem_status)
  1142. subsys_notif_unregister_notifier
  1143. (esoc_info->modem_notify_handler,
  1144. &plat_priv->modem_nb);
  1145. if (esoc_info->esoc_desc)
  1146. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1147. }
  1148. #else
  1149. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1150. {
  1151. return 0;
  1152. }
  1153. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1154. #endif
  1155. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1156. {
  1157. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1158. int ret = 0;
  1159. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1160. return 0;
  1161. enable_irq(sol_gpio->dev_sol_irq);
  1162. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1163. if (ret)
  1164. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1165. ret);
  1166. return ret;
  1167. }
  1168. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1169. {
  1170. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1171. int ret = 0;
  1172. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1173. return 0;
  1174. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1175. if (ret)
  1176. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1177. ret);
  1178. disable_irq(sol_gpio->dev_sol_irq);
  1179. return ret;
  1180. }
  1181. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1182. {
  1183. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1184. if (sol_gpio->dev_sol_gpio < 0)
  1185. return -EINVAL;
  1186. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1187. }
  1188. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1189. {
  1190. struct cnss_plat_data *plat_priv = data;
  1191. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1192. sol_gpio->dev_sol_counter++;
  1193. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1194. irq, sol_gpio->dev_sol_counter);
  1195. /* Make sure abort current suspend */
  1196. cnss_pm_stay_awake(plat_priv);
  1197. cnss_pm_relax(plat_priv);
  1198. pm_system_wakeup();
  1199. cnss_bus_handle_dev_sol_irq(plat_priv);
  1200. return IRQ_HANDLED;
  1201. }
  1202. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1203. {
  1204. struct device *dev = &plat_priv->plat_dev->dev;
  1205. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1206. int ret = 0;
  1207. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1208. "wlan-dev-sol-gpio", 0);
  1209. if (sol_gpio->dev_sol_gpio < 0)
  1210. goto out;
  1211. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1212. sol_gpio->dev_sol_gpio);
  1213. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1214. if (ret) {
  1215. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1216. ret);
  1217. goto out;
  1218. }
  1219. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1220. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1221. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1222. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1223. if (ret) {
  1224. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1225. goto free_gpio;
  1226. }
  1227. return 0;
  1228. free_gpio:
  1229. gpio_free(sol_gpio->dev_sol_gpio);
  1230. out:
  1231. return ret;
  1232. }
  1233. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1234. {
  1235. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1236. if (sol_gpio->dev_sol_gpio < 0)
  1237. return;
  1238. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1239. gpio_free(sol_gpio->dev_sol_gpio);
  1240. }
  1241. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1242. {
  1243. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1244. if (sol_gpio->host_sol_gpio < 0)
  1245. return -EINVAL;
  1246. if (value)
  1247. cnss_pr_dbg("Assert host SOL GPIO\n");
  1248. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1249. return 0;
  1250. }
  1251. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1252. {
  1253. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1254. if (sol_gpio->host_sol_gpio < 0)
  1255. return -EINVAL;
  1256. return gpio_get_value(sol_gpio->host_sol_gpio);
  1257. }
  1258. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1259. {
  1260. struct device *dev = &plat_priv->plat_dev->dev;
  1261. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1262. int ret = 0;
  1263. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1264. "wlan-host-sol-gpio", 0);
  1265. if (sol_gpio->host_sol_gpio < 0)
  1266. goto out;
  1267. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1268. sol_gpio->host_sol_gpio);
  1269. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1270. if (ret) {
  1271. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1272. ret);
  1273. goto out;
  1274. }
  1275. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1276. return 0;
  1277. out:
  1278. return ret;
  1279. }
  1280. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1281. {
  1282. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1283. if (sol_gpio->host_sol_gpio < 0)
  1284. return;
  1285. gpio_free(sol_gpio->host_sol_gpio);
  1286. }
  1287. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1288. {
  1289. int ret;
  1290. ret = cnss_init_dev_sol_gpio(plat_priv);
  1291. if (ret)
  1292. goto out;
  1293. ret = cnss_init_host_sol_gpio(plat_priv);
  1294. if (ret)
  1295. goto deinit_dev_sol;
  1296. return 0;
  1297. deinit_dev_sol:
  1298. cnss_deinit_dev_sol_gpio(plat_priv);
  1299. out:
  1300. return ret;
  1301. }
  1302. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1303. {
  1304. cnss_deinit_host_sol_gpio(plat_priv);
  1305. cnss_deinit_dev_sol_gpio(plat_priv);
  1306. }
  1307. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1308. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1309. {
  1310. struct cnss_plat_data *plat_priv;
  1311. int ret = 0;
  1312. if (!subsys_desc->dev) {
  1313. cnss_pr_err("dev from subsys_desc is NULL\n");
  1314. return -ENODEV;
  1315. }
  1316. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1317. if (!plat_priv) {
  1318. cnss_pr_err("plat_priv is NULL\n");
  1319. return -ENODEV;
  1320. }
  1321. if (!plat_priv->driver_state) {
  1322. cnss_pr_dbg("subsys powerup is ignored\n");
  1323. return 0;
  1324. }
  1325. ret = cnss_bus_dev_powerup(plat_priv);
  1326. if (ret)
  1327. __pm_relax(plat_priv->recovery_ws);
  1328. return ret;
  1329. }
  1330. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1331. bool force_stop)
  1332. {
  1333. struct cnss_plat_data *plat_priv;
  1334. if (!subsys_desc->dev) {
  1335. cnss_pr_err("dev from subsys_desc is NULL\n");
  1336. return -ENODEV;
  1337. }
  1338. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1339. if (!plat_priv) {
  1340. cnss_pr_err("plat_priv is NULL\n");
  1341. return -ENODEV;
  1342. }
  1343. if (!plat_priv->driver_state) {
  1344. cnss_pr_dbg("subsys shutdown is ignored\n");
  1345. return 0;
  1346. }
  1347. return cnss_bus_dev_shutdown(plat_priv);
  1348. }
  1349. void cnss_device_crashed(struct device *dev)
  1350. {
  1351. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1352. struct cnss_subsys_info *subsys_info;
  1353. if (!plat_priv)
  1354. return;
  1355. subsys_info = &plat_priv->subsys_info;
  1356. if (subsys_info->subsys_device) {
  1357. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1358. subsys_set_crash_status(subsys_info->subsys_device, true);
  1359. subsystem_restart_dev(subsys_info->subsys_device);
  1360. }
  1361. }
  1362. EXPORT_SYMBOL(cnss_device_crashed);
  1363. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1364. {
  1365. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1366. if (!plat_priv) {
  1367. cnss_pr_err("plat_priv is NULL\n");
  1368. return;
  1369. }
  1370. cnss_bus_dev_crash_shutdown(plat_priv);
  1371. }
  1372. static int cnss_subsys_ramdump(int enable,
  1373. const struct subsys_desc *subsys_desc)
  1374. {
  1375. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1376. if (!plat_priv) {
  1377. cnss_pr_err("plat_priv is NULL\n");
  1378. return -ENODEV;
  1379. }
  1380. if (!enable)
  1381. return 0;
  1382. return cnss_bus_dev_ramdump(plat_priv);
  1383. }
  1384. static void cnss_recovery_work_handler(struct work_struct *work)
  1385. {
  1386. }
  1387. #else
  1388. static void cnss_recovery_work_handler(struct work_struct *work)
  1389. {
  1390. int ret;
  1391. struct cnss_plat_data *plat_priv =
  1392. container_of(work, struct cnss_plat_data, recovery_work);
  1393. if (!plat_priv->recovery_enabled)
  1394. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1395. cnss_bus_dev_shutdown(plat_priv);
  1396. cnss_bus_dev_ramdump(plat_priv);
  1397. msleep(POWER_RESET_MIN_DELAY_MS);
  1398. ret = cnss_bus_dev_powerup(plat_priv);
  1399. if (ret)
  1400. __pm_relax(plat_priv->recovery_ws);
  1401. return;
  1402. }
  1403. void cnss_device_crashed(struct device *dev)
  1404. {
  1405. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1406. if (!plat_priv)
  1407. return;
  1408. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1409. schedule_work(&plat_priv->recovery_work);
  1410. }
  1411. EXPORT_SYMBOL(cnss_device_crashed);
  1412. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1413. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1414. {
  1415. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1416. struct cnss_ramdump_info *ramdump_info;
  1417. if (!plat_priv)
  1418. return NULL;
  1419. ramdump_info = &plat_priv->ramdump_info;
  1420. *size = ramdump_info->ramdump_size;
  1421. return ramdump_info->ramdump_va;
  1422. }
  1423. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1424. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1425. {
  1426. switch (reason) {
  1427. case CNSS_REASON_DEFAULT:
  1428. return "DEFAULT";
  1429. case CNSS_REASON_LINK_DOWN:
  1430. return "LINK_DOWN";
  1431. case CNSS_REASON_RDDM:
  1432. return "RDDM";
  1433. case CNSS_REASON_TIMEOUT:
  1434. return "TIMEOUT";
  1435. }
  1436. return "UNKNOWN";
  1437. };
  1438. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1439. enum cnss_recovery_reason reason)
  1440. {
  1441. plat_priv->recovery_count++;
  1442. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1443. goto self_recovery;
  1444. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1445. cnss_pr_dbg("Skip device recovery\n");
  1446. return 0;
  1447. }
  1448. /* FW recovery sequence has multiple steps and firmware load requires
  1449. * linux PM in awake state. Thus hold the cnss wake source until
  1450. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1451. * time taken in this process.
  1452. */
  1453. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1454. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1455. true);
  1456. switch (reason) {
  1457. case CNSS_REASON_LINK_DOWN:
  1458. if (!cnss_bus_check_link_status(plat_priv)) {
  1459. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1460. return 0;
  1461. }
  1462. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1463. &plat_priv->ctrl_params.quirks))
  1464. goto self_recovery;
  1465. if (!cnss_bus_recover_link_down(plat_priv)) {
  1466. /* clear recovery bit here to avoid skipping
  1467. * the recovery work for RDDM later
  1468. */
  1469. clear_bit(CNSS_DRIVER_RECOVERY,
  1470. &plat_priv->driver_state);
  1471. return 0;
  1472. }
  1473. break;
  1474. case CNSS_REASON_RDDM:
  1475. cnss_bus_collect_dump_info(plat_priv, false);
  1476. break;
  1477. case CNSS_REASON_DEFAULT:
  1478. case CNSS_REASON_TIMEOUT:
  1479. break;
  1480. default:
  1481. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1482. cnss_recovery_reason_to_str(reason), reason);
  1483. break;
  1484. }
  1485. cnss_bus_device_crashed(plat_priv);
  1486. return 0;
  1487. self_recovery:
  1488. cnss_pr_dbg("Going for self recovery\n");
  1489. cnss_bus_dev_shutdown(plat_priv);
  1490. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1491. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1492. &plat_priv->ctrl_params.quirks);
  1493. cnss_bus_dev_powerup(plat_priv);
  1494. return 0;
  1495. }
  1496. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1497. void *data)
  1498. {
  1499. struct cnss_recovery_data *recovery_data = data;
  1500. int ret = 0;
  1501. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1502. cnss_recovery_reason_to_str(recovery_data->reason),
  1503. recovery_data->reason);
  1504. if (!plat_priv->driver_state) {
  1505. cnss_pr_err("Improper driver state, ignore recovery\n");
  1506. ret = -EINVAL;
  1507. goto out;
  1508. }
  1509. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1510. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1511. ret = -EINVAL;
  1512. goto out;
  1513. }
  1514. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1515. cnss_pr_err("Recovery is already in progress\n");
  1516. CNSS_ASSERT(0);
  1517. ret = -EINVAL;
  1518. goto out;
  1519. }
  1520. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1521. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1522. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1523. ret = -EINVAL;
  1524. goto out;
  1525. }
  1526. switch (plat_priv->device_id) {
  1527. case QCA6174_DEVICE_ID:
  1528. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1529. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1530. &plat_priv->driver_state)) {
  1531. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1532. ret = -EINVAL;
  1533. goto out;
  1534. }
  1535. break;
  1536. default:
  1537. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1538. set_bit(CNSS_FW_BOOT_RECOVERY,
  1539. &plat_priv->driver_state);
  1540. }
  1541. break;
  1542. }
  1543. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1544. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1545. out:
  1546. kfree(data);
  1547. return ret;
  1548. }
  1549. int cnss_self_recovery(struct device *dev,
  1550. enum cnss_recovery_reason reason)
  1551. {
  1552. cnss_schedule_recovery(dev, reason);
  1553. return 0;
  1554. }
  1555. EXPORT_SYMBOL(cnss_self_recovery);
  1556. void cnss_schedule_recovery(struct device *dev,
  1557. enum cnss_recovery_reason reason)
  1558. {
  1559. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1560. struct cnss_recovery_data *data;
  1561. int gfp = GFP_KERNEL;
  1562. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1563. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1564. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1565. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1566. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1567. return;
  1568. }
  1569. if (in_interrupt() || irqs_disabled())
  1570. gfp = GFP_ATOMIC;
  1571. data = kzalloc(sizeof(*data), gfp);
  1572. if (!data)
  1573. return;
  1574. data->reason = reason;
  1575. cnss_driver_event_post(plat_priv,
  1576. CNSS_DRIVER_EVENT_RECOVERY,
  1577. 0, data);
  1578. }
  1579. EXPORT_SYMBOL(cnss_schedule_recovery);
  1580. int cnss_force_fw_assert(struct device *dev)
  1581. {
  1582. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1583. if (!plat_priv) {
  1584. cnss_pr_err("plat_priv is NULL\n");
  1585. return -ENODEV;
  1586. }
  1587. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1588. cnss_pr_info("Forced FW assert is not supported\n");
  1589. return -EOPNOTSUPP;
  1590. }
  1591. if (cnss_bus_is_device_down(plat_priv)) {
  1592. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1593. return 0;
  1594. }
  1595. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1596. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1597. return 0;
  1598. }
  1599. if (in_interrupt() || irqs_disabled())
  1600. cnss_driver_event_post(plat_priv,
  1601. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1602. 0, NULL);
  1603. else
  1604. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1605. return 0;
  1606. }
  1607. EXPORT_SYMBOL(cnss_force_fw_assert);
  1608. int cnss_force_collect_rddm(struct device *dev)
  1609. {
  1610. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1611. unsigned int timeout;
  1612. int ret = 0;
  1613. if (!plat_priv) {
  1614. cnss_pr_err("plat_priv is NULL\n");
  1615. return -ENODEV;
  1616. }
  1617. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1618. cnss_pr_info("Force collect rddm is not supported\n");
  1619. return -EOPNOTSUPP;
  1620. }
  1621. if (cnss_bus_is_device_down(plat_priv)) {
  1622. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1623. goto wait_rddm;
  1624. }
  1625. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1626. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1627. goto wait_rddm;
  1628. }
  1629. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1630. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1631. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1632. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1633. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1634. return 0;
  1635. }
  1636. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1637. if (ret)
  1638. return ret;
  1639. wait_rddm:
  1640. reinit_completion(&plat_priv->rddm_complete);
  1641. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1642. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1643. msecs_to_jiffies(timeout));
  1644. if (!ret) {
  1645. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1646. timeout);
  1647. ret = -ETIMEDOUT;
  1648. } else if (ret > 0) {
  1649. ret = 0;
  1650. }
  1651. return ret;
  1652. }
  1653. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1654. int cnss_qmi_send_get(struct device *dev)
  1655. {
  1656. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1657. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1658. return 0;
  1659. return cnss_bus_qmi_send_get(plat_priv);
  1660. }
  1661. EXPORT_SYMBOL(cnss_qmi_send_get);
  1662. int cnss_qmi_send_put(struct device *dev)
  1663. {
  1664. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1665. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1666. return 0;
  1667. return cnss_bus_qmi_send_put(plat_priv);
  1668. }
  1669. EXPORT_SYMBOL(cnss_qmi_send_put);
  1670. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1671. int cmd_len, void *cb_ctx,
  1672. int (*cb)(void *ctx, void *event, int event_len))
  1673. {
  1674. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1675. int ret;
  1676. if (!plat_priv)
  1677. return -ENODEV;
  1678. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1679. return -EINVAL;
  1680. plat_priv->get_info_cb = cb;
  1681. plat_priv->get_info_cb_ctx = cb_ctx;
  1682. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1683. if (ret) {
  1684. plat_priv->get_info_cb = NULL;
  1685. plat_priv->get_info_cb_ctx = NULL;
  1686. }
  1687. return ret;
  1688. }
  1689. EXPORT_SYMBOL(cnss_qmi_send);
  1690. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1691. {
  1692. int ret = 0;
  1693. u32 retry = 0, timeout;
  1694. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1695. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1696. goto out;
  1697. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1698. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1699. goto out;
  1700. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1701. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1702. goto out;
  1703. }
  1704. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1705. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1706. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1707. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1708. CNSS_ASSERT(0);
  1709. return -EINVAL;
  1710. }
  1711. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1712. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1713. break;
  1714. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1715. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1716. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1717. CNSS_ASSERT(0);
  1718. ret = -EINVAL;
  1719. goto mark_cal_fail;
  1720. }
  1721. }
  1722. switch (plat_priv->device_id) {
  1723. case QCA6290_DEVICE_ID:
  1724. case QCA6390_DEVICE_ID:
  1725. case QCA6490_DEVICE_ID:
  1726. case KIWI_DEVICE_ID:
  1727. case MANGO_DEVICE_ID:
  1728. break;
  1729. default:
  1730. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1731. plat_priv->device_id);
  1732. ret = -EINVAL;
  1733. goto mark_cal_fail;
  1734. }
  1735. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1736. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1737. timeout = cnss_get_timeout(plat_priv,
  1738. CNSS_TIMEOUT_CALIBRATION);
  1739. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1740. timeout / 1000);
  1741. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1742. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1743. msecs_to_jiffies(timeout));
  1744. }
  1745. reinit_completion(&plat_priv->cal_complete);
  1746. ret = cnss_bus_dev_powerup(plat_priv);
  1747. mark_cal_fail:
  1748. if (ret) {
  1749. complete(&plat_priv->cal_complete);
  1750. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1751. /* Set CBC done in driver state to mark attempt and note error
  1752. * since calibration cannot be retried at boot.
  1753. */
  1754. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1755. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1756. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1757. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1758. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1759. goto out;
  1760. cnss_pr_info("Schedule WLAN driver load\n");
  1761. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1762. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1763. 0);
  1764. }
  1765. }
  1766. out:
  1767. return ret;
  1768. }
  1769. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1770. void *data)
  1771. {
  1772. struct cnss_cal_info *cal_info = data;
  1773. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1774. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1775. goto out;
  1776. switch (cal_info->cal_status) {
  1777. case CNSS_CAL_DONE:
  1778. cnss_pr_dbg("Calibration completed successfully\n");
  1779. plat_priv->cal_done = true;
  1780. break;
  1781. case CNSS_CAL_TIMEOUT:
  1782. case CNSS_CAL_FAILURE:
  1783. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1784. cal_info->cal_status);
  1785. break;
  1786. default:
  1787. cnss_pr_err("Unknown calibration status: %u\n",
  1788. cal_info->cal_status);
  1789. break;
  1790. }
  1791. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1792. cnss_bus_free_qdss_mem(plat_priv);
  1793. cnss_release_antenna_sharing(plat_priv);
  1794. cnss_bus_dev_shutdown(plat_priv);
  1795. msleep(POWER_RESET_MIN_DELAY_MS);
  1796. complete(&plat_priv->cal_complete);
  1797. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1798. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1799. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1800. cnss_cal_mem_upload_to_file(plat_priv);
  1801. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1802. goto out;
  1803. cnss_pr_dbg("Schedule WLAN driver load\n");
  1804. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1805. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1806. 0);
  1807. }
  1808. out:
  1809. kfree(data);
  1810. return 0;
  1811. }
  1812. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1813. {
  1814. int ret;
  1815. ret = cnss_bus_dev_powerup(plat_priv);
  1816. if (ret)
  1817. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1818. return ret;
  1819. }
  1820. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1821. {
  1822. cnss_bus_dev_shutdown(plat_priv);
  1823. return 0;
  1824. }
  1825. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1826. {
  1827. int ret = 0;
  1828. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1829. if (ret < 0)
  1830. return ret;
  1831. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1832. }
  1833. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1834. u32 mem_seg_len, u64 pa, u32 size)
  1835. {
  1836. int i = 0;
  1837. u64 offset = 0;
  1838. void *va = NULL;
  1839. u64 local_pa;
  1840. u32 local_size;
  1841. for (i = 0; i < mem_seg_len; i++) {
  1842. local_pa = (u64)fw_mem[i].pa;
  1843. local_size = (u32)fw_mem[i].size;
  1844. if (pa == local_pa && size <= local_size) {
  1845. va = fw_mem[i].va;
  1846. break;
  1847. }
  1848. if (pa > local_pa &&
  1849. pa < local_pa + local_size &&
  1850. pa + size <= local_pa + local_size) {
  1851. offset = pa - local_pa;
  1852. va = fw_mem[i].va + offset;
  1853. break;
  1854. }
  1855. }
  1856. return va;
  1857. }
  1858. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1859. void *data)
  1860. {
  1861. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1862. struct cnss_fw_mem *fw_mem_seg;
  1863. int ret = 0L;
  1864. void *va = NULL;
  1865. u32 i, fw_mem_seg_len;
  1866. switch (event_data->mem_type) {
  1867. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1868. if (!plat_priv->fw_mem_seg_len)
  1869. goto invalid_mem_save;
  1870. fw_mem_seg = plat_priv->fw_mem;
  1871. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1872. break;
  1873. case QMI_WLFW_MEM_QDSS_V01:
  1874. if (!plat_priv->qdss_mem_seg_len)
  1875. goto invalid_mem_save;
  1876. fw_mem_seg = plat_priv->qdss_mem;
  1877. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1878. break;
  1879. default:
  1880. goto invalid_mem_save;
  1881. }
  1882. for (i = 0; i < event_data->mem_seg_len; i++) {
  1883. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1884. event_data->mem_seg[i].addr,
  1885. event_data->mem_seg[i].size);
  1886. if (!va) {
  1887. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1888. &event_data->mem_seg[i].addr,
  1889. event_data->mem_type);
  1890. ret = -EINVAL;
  1891. break;
  1892. }
  1893. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1894. event_data->file_name,
  1895. event_data->mem_seg[i].size);
  1896. if (ret < 0) {
  1897. cnss_pr_err("Fail to save fw mem data: %d\n",
  1898. ret);
  1899. break;
  1900. }
  1901. }
  1902. kfree(data);
  1903. return ret;
  1904. invalid_mem_save:
  1905. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1906. event_data->mem_type);
  1907. kfree(data);
  1908. return -EINVAL;
  1909. }
  1910. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1911. {
  1912. cnss_bus_free_qdss_mem(plat_priv);
  1913. return 0;
  1914. }
  1915. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1916. void *data)
  1917. {
  1918. int ret = 0;
  1919. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1920. if (!plat_priv)
  1921. return -ENODEV;
  1922. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1923. event_data->total_size);
  1924. kfree(data);
  1925. return ret;
  1926. }
  1927. static void cnss_driver_event_work(struct work_struct *work)
  1928. {
  1929. struct cnss_plat_data *plat_priv =
  1930. container_of(work, struct cnss_plat_data, event_work);
  1931. struct cnss_driver_event *event;
  1932. unsigned long flags;
  1933. int ret = 0;
  1934. if (!plat_priv) {
  1935. cnss_pr_err("plat_priv is NULL!\n");
  1936. return;
  1937. }
  1938. cnss_pm_stay_awake(plat_priv);
  1939. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1940. while (!list_empty(&plat_priv->event_list)) {
  1941. event = list_first_entry(&plat_priv->event_list,
  1942. struct cnss_driver_event, list);
  1943. list_del(&event->list);
  1944. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1945. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1946. cnss_driver_event_to_str(event->type),
  1947. event->sync ? "-sync" : "", event->type,
  1948. plat_priv->driver_state);
  1949. switch (event->type) {
  1950. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1951. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1952. break;
  1953. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1954. ret = cnss_wlfw_server_exit(plat_priv);
  1955. break;
  1956. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1957. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1958. if (ret)
  1959. break;
  1960. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1961. break;
  1962. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1963. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1964. break;
  1965. case CNSS_DRIVER_EVENT_FW_READY:
  1966. ret = cnss_fw_ready_hdlr(plat_priv);
  1967. break;
  1968. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1969. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1970. break;
  1971. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1972. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1973. event->data);
  1974. break;
  1975. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1976. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1977. event->data);
  1978. break;
  1979. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1980. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1981. break;
  1982. case CNSS_DRIVER_EVENT_RECOVERY:
  1983. ret = cnss_driver_recovery_hdlr(plat_priv,
  1984. event->data);
  1985. break;
  1986. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1987. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1988. break;
  1989. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1990. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1991. &plat_priv->driver_state);
  1992. fallthrough;
  1993. case CNSS_DRIVER_EVENT_POWER_UP:
  1994. ret = cnss_power_up_hdlr(plat_priv);
  1995. break;
  1996. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1997. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1998. &plat_priv->driver_state);
  1999. fallthrough;
  2000. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2001. ret = cnss_power_down_hdlr(plat_priv);
  2002. break;
  2003. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2004. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2005. event->data);
  2006. break;
  2007. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2008. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2009. event->data);
  2010. break;
  2011. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2012. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2013. break;
  2014. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2015. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2016. event->data);
  2017. break;
  2018. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2019. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2020. break;
  2021. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2022. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2023. event->data);
  2024. break;
  2025. default:
  2026. cnss_pr_err("Invalid driver event type: %d",
  2027. event->type);
  2028. kfree(event);
  2029. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2030. continue;
  2031. }
  2032. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2033. if (event->sync) {
  2034. event->ret = ret;
  2035. complete(&event->complete);
  2036. continue;
  2037. }
  2038. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2039. kfree(event);
  2040. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2041. }
  2042. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2043. cnss_pm_relax(plat_priv);
  2044. }
  2045. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2046. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2047. {
  2048. int ret = 0;
  2049. struct cnss_subsys_info *subsys_info;
  2050. subsys_info = &plat_priv->subsys_info;
  2051. subsys_info->subsys_desc.name = "wlan";
  2052. subsys_info->subsys_desc.owner = THIS_MODULE;
  2053. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2054. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2055. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2056. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2057. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2058. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2059. if (IS_ERR(subsys_info->subsys_device)) {
  2060. ret = PTR_ERR(subsys_info->subsys_device);
  2061. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2062. goto out;
  2063. }
  2064. subsys_info->subsys_handle =
  2065. subsystem_get(subsys_info->subsys_desc.name);
  2066. if (!subsys_info->subsys_handle) {
  2067. cnss_pr_err("Failed to get subsys_handle!\n");
  2068. ret = -EINVAL;
  2069. goto unregister_subsys;
  2070. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2071. ret = PTR_ERR(subsys_info->subsys_handle);
  2072. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2073. goto unregister_subsys;
  2074. }
  2075. return 0;
  2076. unregister_subsys:
  2077. subsys_unregister(subsys_info->subsys_device);
  2078. out:
  2079. return ret;
  2080. }
  2081. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2082. {
  2083. struct cnss_subsys_info *subsys_info;
  2084. subsys_info = &plat_priv->subsys_info;
  2085. subsystem_put(subsys_info->subsys_handle);
  2086. subsys_unregister(subsys_info->subsys_device);
  2087. }
  2088. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2089. {
  2090. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2091. return create_ramdump_device(subsys_info->subsys_desc.name,
  2092. subsys_info->subsys_desc.dev);
  2093. }
  2094. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2095. void *ramdump_dev)
  2096. {
  2097. destroy_ramdump_device(ramdump_dev);
  2098. }
  2099. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2100. {
  2101. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2102. struct ramdump_segment segment;
  2103. memset(&segment, 0, sizeof(segment));
  2104. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2105. segment.size = ramdump_info->ramdump_size;
  2106. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2107. }
  2108. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2109. {
  2110. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2111. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2112. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2113. struct ramdump_segment *ramdump_segs, *s;
  2114. struct cnss_dump_meta_info meta_info = {0};
  2115. int i, ret = 0;
  2116. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2117. sizeof(*ramdump_segs),
  2118. GFP_KERNEL);
  2119. if (!ramdump_segs)
  2120. return -ENOMEM;
  2121. s = ramdump_segs + 1;
  2122. for (i = 0; i < dump_data->nentries; i++) {
  2123. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2124. cnss_pr_err("Unsupported dump type: %d",
  2125. dump_seg->type);
  2126. continue;
  2127. }
  2128. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2129. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2130. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2131. }
  2132. meta_info.entry[dump_seg->type].entry_num++;
  2133. s->address = dump_seg->address;
  2134. s->v_address = (void __iomem *)dump_seg->v_address;
  2135. s->size = dump_seg->size;
  2136. s++;
  2137. dump_seg++;
  2138. }
  2139. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2140. meta_info.version = CNSS_RAMDUMP_VERSION;
  2141. meta_info.chipset = plat_priv->device_id;
  2142. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2143. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2144. ramdump_segs->size = sizeof(meta_info);
  2145. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2146. dump_data->nentries + 1);
  2147. kfree(ramdump_segs);
  2148. return ret;
  2149. }
  2150. #else
  2151. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2152. void *data)
  2153. {
  2154. struct cnss_plat_data *plat_priv =
  2155. container_of(nb, struct cnss_plat_data, panic_nb);
  2156. cnss_bus_dev_crash_shutdown(plat_priv);
  2157. return NOTIFY_DONE;
  2158. }
  2159. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2160. {
  2161. int ret;
  2162. if (!plat_priv)
  2163. return -ENODEV;
  2164. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2165. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2166. &plat_priv->panic_nb);
  2167. if (ret) {
  2168. cnss_pr_err("Failed to register panic handler\n");
  2169. return -EINVAL;
  2170. }
  2171. return 0;
  2172. }
  2173. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2174. {
  2175. int ret;
  2176. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2177. &plat_priv->panic_nb);
  2178. if (ret)
  2179. cnss_pr_err("Failed to unregister panic handler\n");
  2180. }
  2181. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2182. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2183. {
  2184. return &plat_priv->plat_dev->dev;
  2185. }
  2186. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2187. void *ramdump_dev)
  2188. {
  2189. }
  2190. #endif
  2191. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2192. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2193. {
  2194. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2195. struct qcom_dump_segment segment;
  2196. struct list_head head;
  2197. INIT_LIST_HEAD(&head);
  2198. memset(&segment, 0, sizeof(segment));
  2199. segment.va = ramdump_info->ramdump_va;
  2200. segment.size = ramdump_info->ramdump_size;
  2201. list_add(&segment.node, &head);
  2202. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2203. }
  2204. #else
  2205. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2206. {
  2207. return 0;
  2208. }
  2209. /* Using completion event inside dynamically allocated ramdump_desc
  2210. * may result a race between freeing the event after setting it to
  2211. * complete inside dev coredump free callback and the thread that is
  2212. * waiting for completion.
  2213. */
  2214. DECLARE_COMPLETION(dump_done);
  2215. #define TIMEOUT_SAVE_DUMP_MS 30000
  2216. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2217. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2218. { \
  2219. if (class == ELFCLASS32) \
  2220. return sizeof(struct elf32_##__xhdr); \
  2221. else \
  2222. return sizeof(struct elf64_##__xhdr); \
  2223. }
  2224. SIZEOF_ELF_STRUCT(phdr)
  2225. SIZEOF_ELF_STRUCT(hdr)
  2226. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2227. do { \
  2228. if (class == ELFCLASS32) \
  2229. ((struct elf32_##__xhdr *)arg)->member = value; \
  2230. else \
  2231. ((struct elf64_##__xhdr *)arg)->member = value; \
  2232. } while (0)
  2233. #define set_ehdr_property(arg, class, member, value) \
  2234. set_xhdr_property(hdr, arg, class, member, value)
  2235. #define set_phdr_property(arg, class, member, value) \
  2236. set_xhdr_property(phdr, arg, class, member, value)
  2237. /* These replace qcom_ramdump driver APIs called from common API
  2238. * cnss_do_elf_dump() by the ones defined here.
  2239. */
  2240. #define qcom_dump_segment cnss_qcom_dump_segment
  2241. #define qcom_elf_dump cnss_qcom_elf_dump
  2242. #define dump_enabled cnss_dump_enabled
  2243. struct cnss_qcom_dump_segment {
  2244. struct list_head node;
  2245. dma_addr_t da;
  2246. void *va;
  2247. size_t size;
  2248. };
  2249. struct cnss_qcom_ramdump_desc {
  2250. void *data;
  2251. struct completion dump_done;
  2252. };
  2253. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2254. void *data, size_t datalen)
  2255. {
  2256. struct cnss_qcom_ramdump_desc *desc = data;
  2257. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2258. datalen);
  2259. }
  2260. static void cnss_qcom_devcd_freev(void *data)
  2261. {
  2262. struct cnss_qcom_ramdump_desc *desc = data;
  2263. cnss_pr_dbg("Free dump data for dev coredump\n");
  2264. complete(&dump_done);
  2265. vfree(desc->data);
  2266. kfree(desc);
  2267. }
  2268. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2269. gfp_t gfp)
  2270. {
  2271. struct cnss_qcom_ramdump_desc *desc;
  2272. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2273. int ret;
  2274. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2275. if (!desc)
  2276. return -ENOMEM;
  2277. desc->data = data;
  2278. reinit_completion(&dump_done);
  2279. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2280. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2281. ret = wait_for_completion_timeout(&dump_done,
  2282. msecs_to_jiffies(timeout));
  2283. if (!ret)
  2284. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2285. timeout);
  2286. return ret ? 0 : -ETIMEDOUT;
  2287. }
  2288. /* Since the elf32 and elf64 identification is identical apart from
  2289. * the class, use elf32 by default.
  2290. */
  2291. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2292. {
  2293. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2294. ehdr->e_ident[EI_CLASS] = class;
  2295. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2296. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2297. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2298. }
  2299. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2300. unsigned char class)
  2301. {
  2302. struct cnss_qcom_dump_segment *segment;
  2303. void *phdr, *ehdr;
  2304. size_t data_size, offset;
  2305. int phnum = 0;
  2306. void *data;
  2307. void __iomem *ptr;
  2308. if (!segs || list_empty(segs))
  2309. return -EINVAL;
  2310. data_size = sizeof_elf_hdr(class);
  2311. list_for_each_entry(segment, segs, node) {
  2312. data_size += sizeof_elf_phdr(class) + segment->size;
  2313. phnum++;
  2314. }
  2315. data = vmalloc(data_size);
  2316. if (!data)
  2317. return -ENOMEM;
  2318. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2319. ehdr = data;
  2320. memset(ehdr, 0, sizeof_elf_hdr(class));
  2321. init_elf_identification(ehdr, class);
  2322. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2323. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2324. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2325. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2326. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2327. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2328. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2329. phdr = data + sizeof_elf_hdr(class);
  2330. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2331. list_for_each_entry(segment, segs, node) {
  2332. memset(phdr, 0, sizeof_elf_phdr(class));
  2333. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2334. set_phdr_property(phdr, class, p_offset, offset);
  2335. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2336. set_phdr_property(phdr, class, p_paddr, segment->da);
  2337. set_phdr_property(phdr, class, p_filesz, segment->size);
  2338. set_phdr_property(phdr, class, p_memsz, segment->size);
  2339. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2340. set_phdr_property(phdr, class, p_align, 0);
  2341. if (segment->va) {
  2342. memcpy(data + offset, segment->va, segment->size);
  2343. } else {
  2344. ptr = devm_ioremap(dev, segment->da, segment->size);
  2345. if (!ptr) {
  2346. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2347. &segment->da, segment->size);
  2348. memset(data + offset, 0xff, segment->size);
  2349. } else {
  2350. memcpy_fromio(data + offset, ptr,
  2351. segment->size);
  2352. }
  2353. }
  2354. offset += segment->size;
  2355. phdr += sizeof_elf_phdr(class);
  2356. }
  2357. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2358. }
  2359. /* Saving dump to file system is always needed in this case. */
  2360. static bool cnss_dump_enabled(void)
  2361. {
  2362. return true;
  2363. }
  2364. #endif /* CONFIG_QCOM_RAMDUMP */
  2365. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2366. {
  2367. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2368. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2369. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2370. struct qcom_dump_segment *seg;
  2371. struct cnss_dump_meta_info meta_info = {0};
  2372. struct list_head head;
  2373. int i, ret = 0;
  2374. if (!dump_enabled()) {
  2375. cnss_pr_info("Dump collection is not enabled\n");
  2376. return ret;
  2377. }
  2378. INIT_LIST_HEAD(&head);
  2379. for (i = 0; i < dump_data->nentries; i++) {
  2380. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2381. cnss_pr_err("Unsupported dump type: %d",
  2382. dump_seg->type);
  2383. continue;
  2384. }
  2385. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2386. if (!seg)
  2387. continue;
  2388. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2389. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2390. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2391. }
  2392. meta_info.entry[dump_seg->type].entry_num++;
  2393. seg->da = dump_seg->address;
  2394. seg->va = dump_seg->v_address;
  2395. seg->size = dump_seg->size;
  2396. list_add_tail(&seg->node, &head);
  2397. dump_seg++;
  2398. }
  2399. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2400. if (!seg)
  2401. goto do_elf_dump;
  2402. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2403. meta_info.version = CNSS_RAMDUMP_VERSION;
  2404. meta_info.chipset = plat_priv->device_id;
  2405. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2406. seg->va = &meta_info;
  2407. seg->size = sizeof(meta_info);
  2408. list_add(&seg->node, &head);
  2409. do_elf_dump:
  2410. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2411. while (!list_empty(&head)) {
  2412. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2413. list_del(&seg->node);
  2414. kfree(seg);
  2415. }
  2416. return ret;
  2417. }
  2418. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2419. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2420. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2421. {
  2422. struct cnss_ramdump_info *ramdump_info;
  2423. struct msm_dump_entry dump_entry;
  2424. ramdump_info = &plat_priv->ramdump_info;
  2425. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2426. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2427. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2428. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2429. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2430. sizeof(ramdump_info->dump_data.name));
  2431. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2432. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2433. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2434. &dump_entry);
  2435. }
  2436. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2437. {
  2438. int ret = 0;
  2439. struct device *dev;
  2440. struct cnss_ramdump_info *ramdump_info;
  2441. u32 ramdump_size = 0;
  2442. dev = &plat_priv->plat_dev->dev;
  2443. ramdump_info = &plat_priv->ramdump_info;
  2444. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2445. /* dt type: legacy or converged */
  2446. ret = of_property_read_u32(dev->of_node,
  2447. "qcom,wlan-ramdump-dynamic",
  2448. &ramdump_size);
  2449. } else {
  2450. ret = of_property_read_u32(plat_priv->dev_node,
  2451. "qcom,wlan-ramdump-dynamic",
  2452. &ramdump_size);
  2453. }
  2454. if (ret == 0) {
  2455. ramdump_info->ramdump_va =
  2456. dma_alloc_coherent(dev, ramdump_size,
  2457. &ramdump_info->ramdump_pa,
  2458. GFP_KERNEL);
  2459. if (ramdump_info->ramdump_va)
  2460. ramdump_info->ramdump_size = ramdump_size;
  2461. }
  2462. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2463. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2464. if (ramdump_info->ramdump_size == 0) {
  2465. cnss_pr_info("Ramdump will not be collected");
  2466. goto out;
  2467. }
  2468. ret = cnss_init_dump_entry(plat_priv);
  2469. if (ret) {
  2470. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2471. goto free_ramdump;
  2472. }
  2473. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2474. if (!ramdump_info->ramdump_dev) {
  2475. cnss_pr_err("Failed to create ramdump device!");
  2476. ret = -ENOMEM;
  2477. goto free_ramdump;
  2478. }
  2479. return 0;
  2480. free_ramdump:
  2481. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2482. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2483. out:
  2484. return ret;
  2485. }
  2486. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2487. {
  2488. struct device *dev;
  2489. struct cnss_ramdump_info *ramdump_info;
  2490. dev = &plat_priv->plat_dev->dev;
  2491. ramdump_info = &plat_priv->ramdump_info;
  2492. if (ramdump_info->ramdump_dev)
  2493. cnss_destroy_ramdump_device(plat_priv,
  2494. ramdump_info->ramdump_dev);
  2495. if (ramdump_info->ramdump_va)
  2496. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2497. ramdump_info->ramdump_va,
  2498. ramdump_info->ramdump_pa);
  2499. }
  2500. /**
  2501. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2502. * @ret: Error returned by msm_dump_data_register_nominidump
  2503. *
  2504. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2505. * ignore failure.
  2506. *
  2507. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2508. */
  2509. static int cnss_ignore_dump_data_reg_fail(int ret)
  2510. {
  2511. return ret;
  2512. }
  2513. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2514. {
  2515. int ret = 0;
  2516. struct cnss_ramdump_info_v2 *info_v2;
  2517. struct cnss_dump_data *dump_data;
  2518. struct msm_dump_entry dump_entry;
  2519. struct device *dev = &plat_priv->plat_dev->dev;
  2520. u32 ramdump_size = 0;
  2521. info_v2 = &plat_priv->ramdump_info_v2;
  2522. dump_data = &info_v2->dump_data;
  2523. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2524. /* dt type: legacy or converged */
  2525. ret = of_property_read_u32(dev->of_node,
  2526. "qcom,wlan-ramdump-dynamic",
  2527. &ramdump_size);
  2528. } else {
  2529. ret = of_property_read_u32(plat_priv->dev_node,
  2530. "qcom,wlan-ramdump-dynamic",
  2531. &ramdump_size);
  2532. }
  2533. if (ret == 0)
  2534. info_v2->ramdump_size = ramdump_size;
  2535. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2536. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2537. if (!info_v2->dump_data_vaddr)
  2538. return -ENOMEM;
  2539. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2540. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2541. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2542. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2543. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2544. sizeof(dump_data->name));
  2545. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2546. dump_entry.addr = virt_to_phys(dump_data);
  2547. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2548. &dump_entry);
  2549. if (ret) {
  2550. ret = cnss_ignore_dump_data_reg_fail(ret);
  2551. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2552. ret ? "Error" : "Ignoring", ret);
  2553. goto free_ramdump;
  2554. }
  2555. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2556. if (!info_v2->ramdump_dev) {
  2557. cnss_pr_err("Failed to create ramdump device!\n");
  2558. ret = -ENOMEM;
  2559. goto free_ramdump;
  2560. }
  2561. return 0;
  2562. free_ramdump:
  2563. kfree(info_v2->dump_data_vaddr);
  2564. info_v2->dump_data_vaddr = NULL;
  2565. return ret;
  2566. }
  2567. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2568. {
  2569. struct cnss_ramdump_info_v2 *info_v2;
  2570. info_v2 = &plat_priv->ramdump_info_v2;
  2571. if (info_v2->ramdump_dev)
  2572. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2573. kfree(info_v2->dump_data_vaddr);
  2574. info_v2->dump_data_vaddr = NULL;
  2575. info_v2->dump_data_valid = false;
  2576. }
  2577. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2578. {
  2579. int ret = 0;
  2580. switch (plat_priv->device_id) {
  2581. case QCA6174_DEVICE_ID:
  2582. ret = cnss_register_ramdump_v1(plat_priv);
  2583. break;
  2584. case QCA6290_DEVICE_ID:
  2585. case QCA6390_DEVICE_ID:
  2586. case QCA6490_DEVICE_ID:
  2587. case KIWI_DEVICE_ID:
  2588. case MANGO_DEVICE_ID:
  2589. ret = cnss_register_ramdump_v2(plat_priv);
  2590. break;
  2591. default:
  2592. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2593. ret = -ENODEV;
  2594. break;
  2595. }
  2596. return ret;
  2597. }
  2598. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2599. {
  2600. switch (plat_priv->device_id) {
  2601. case QCA6174_DEVICE_ID:
  2602. cnss_unregister_ramdump_v1(plat_priv);
  2603. break;
  2604. case QCA6290_DEVICE_ID:
  2605. case QCA6390_DEVICE_ID:
  2606. case QCA6490_DEVICE_ID:
  2607. case KIWI_DEVICE_ID:
  2608. case MANGO_DEVICE_ID:
  2609. cnss_unregister_ramdump_v2(plat_priv);
  2610. break;
  2611. default:
  2612. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2613. break;
  2614. }
  2615. }
  2616. #else
  2617. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2618. {
  2619. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2620. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2621. struct device *dev = &plat_priv->plat_dev->dev;
  2622. u32 ramdump_size = 0;
  2623. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2624. &ramdump_size) == 0)
  2625. info_v2->ramdump_size = ramdump_size;
  2626. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2627. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2628. if (!info_v2->dump_data_vaddr)
  2629. return -ENOMEM;
  2630. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2631. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2632. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2633. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2634. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2635. sizeof(dump_data->name));
  2636. info_v2->ramdump_dev = dev;
  2637. return 0;
  2638. }
  2639. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2640. {
  2641. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2642. info_v2->ramdump_dev = NULL;
  2643. kfree(info_v2->dump_data_vaddr);
  2644. info_v2->dump_data_vaddr = NULL;
  2645. info_v2->dump_data_valid = false;
  2646. }
  2647. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2648. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2649. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2650. phys_addr_t *pa, unsigned long attrs)
  2651. {
  2652. struct sg_table sgt;
  2653. int ret;
  2654. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2655. if (ret) {
  2656. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2657. va, &dma, size, attrs);
  2658. return -EINVAL;
  2659. }
  2660. *pa = page_to_phys(sg_page(sgt.sgl));
  2661. sg_free_table(&sgt);
  2662. return 0;
  2663. }
  2664. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2665. enum cnss_fw_dump_type type, int seg_no,
  2666. void *va, phys_addr_t pa, size_t size)
  2667. {
  2668. struct md_region md_entry;
  2669. int ret;
  2670. switch (type) {
  2671. case CNSS_FW_IMAGE:
  2672. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2673. seg_no);
  2674. break;
  2675. case CNSS_FW_RDDM:
  2676. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2677. seg_no);
  2678. break;
  2679. case CNSS_FW_REMOTE_HEAP:
  2680. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2681. seg_no);
  2682. break;
  2683. default:
  2684. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2685. return -EINVAL;
  2686. }
  2687. md_entry.phys_addr = pa;
  2688. md_entry.virt_addr = (uintptr_t)va;
  2689. md_entry.size = size;
  2690. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2691. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2692. md_entry.name, va, &pa, size);
  2693. ret = msm_minidump_add_region(&md_entry);
  2694. if (ret < 0)
  2695. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2696. return ret;
  2697. }
  2698. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2699. enum cnss_fw_dump_type type, int seg_no,
  2700. void *va, phys_addr_t pa, size_t size)
  2701. {
  2702. struct md_region md_entry;
  2703. int ret;
  2704. switch (type) {
  2705. case CNSS_FW_IMAGE:
  2706. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2707. seg_no);
  2708. break;
  2709. case CNSS_FW_RDDM:
  2710. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2711. seg_no);
  2712. break;
  2713. case CNSS_FW_REMOTE_HEAP:
  2714. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2715. seg_no);
  2716. break;
  2717. default:
  2718. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2719. return -EINVAL;
  2720. }
  2721. md_entry.phys_addr = pa;
  2722. md_entry.virt_addr = (uintptr_t)va;
  2723. md_entry.size = size;
  2724. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2725. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2726. md_entry.name, va, &pa, size);
  2727. ret = msm_minidump_remove_region(&md_entry);
  2728. if (ret)
  2729. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2730. ret);
  2731. return ret;
  2732. }
  2733. #else
  2734. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2735. phys_addr_t *pa, unsigned long attrs)
  2736. {
  2737. return 0;
  2738. }
  2739. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2740. enum cnss_fw_dump_type type, int seg_no,
  2741. void *va, phys_addr_t pa, size_t size)
  2742. {
  2743. return 0;
  2744. }
  2745. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2746. enum cnss_fw_dump_type type, int seg_no,
  2747. void *va, phys_addr_t pa, size_t size)
  2748. {
  2749. return 0;
  2750. }
  2751. #endif /* CONFIG_QCOM_MINIDUMP */
  2752. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2753. const struct firmware **fw_entry,
  2754. const char *filename)
  2755. {
  2756. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2757. return request_firmware_direct(fw_entry, filename,
  2758. &plat_priv->plat_dev->dev);
  2759. else
  2760. return firmware_request_nowarn(fw_entry, filename,
  2761. &plat_priv->plat_dev->dev);
  2762. }
  2763. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2764. /**
  2765. * cnss_register_bus_scale() - Setup interconnect voting data
  2766. * @plat_priv: Platform data structure
  2767. *
  2768. * For different interconnect path configured in device tree setup voting data
  2769. * for list of bandwidth requirements.
  2770. *
  2771. * Result: 0 for success. -EINVAL if not configured
  2772. */
  2773. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2774. {
  2775. int ret = -EINVAL;
  2776. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2777. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2778. struct device *dev = &plat_priv->plat_dev->dev;
  2779. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2780. ret = of_property_read_u32(dev->of_node,
  2781. "qcom,icc-path-count",
  2782. &plat_priv->icc.path_count);
  2783. if (ret) {
  2784. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2785. return 0;
  2786. }
  2787. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2788. "qcom,bus-bw-cfg-count",
  2789. &plat_priv->icc.bus_bw_cfg_count);
  2790. if (ret) {
  2791. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2792. goto cleanup;
  2793. }
  2794. cfg_arr_size = plat_priv->icc.path_count *
  2795. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2796. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2797. if (!cfg_arr) {
  2798. cnss_pr_err("Failed to alloc cfg table mem\n");
  2799. ret = -ENOMEM;
  2800. goto cleanup;
  2801. }
  2802. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2803. "qcom,bus-bw-cfg", cfg_arr,
  2804. cfg_arr_size);
  2805. if (ret) {
  2806. cnss_pr_err("Invalid Bus BW Config Table\n");
  2807. goto cleanup;
  2808. }
  2809. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2810. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2811. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2812. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2813. GFP_KERNEL);
  2814. if (!bus_bw_info) {
  2815. ret = -ENOMEM;
  2816. goto out;
  2817. }
  2818. ret = of_property_read_string_index(dev->of_node,
  2819. "interconnect-names", idx,
  2820. &bus_bw_info->icc_name);
  2821. if (ret)
  2822. goto out;
  2823. bus_bw_info->icc_path =
  2824. of_icc_get(&plat_priv->plat_dev->dev,
  2825. bus_bw_info->icc_name);
  2826. if (IS_ERR(bus_bw_info->icc_path)) {
  2827. ret = PTR_ERR(bus_bw_info->icc_path);
  2828. if (ret != -EPROBE_DEFER) {
  2829. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2830. bus_bw_info->icc_name, ret);
  2831. goto out;
  2832. }
  2833. }
  2834. bus_bw_info->cfg_table =
  2835. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2836. sizeof(*bus_bw_info->cfg_table),
  2837. GFP_KERNEL);
  2838. if (!bus_bw_info->cfg_table) {
  2839. ret = -ENOMEM;
  2840. goto out;
  2841. }
  2842. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2843. bus_bw_info->icc_name);
  2844. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2845. CNSS_ICC_VOTE_MAX);
  2846. i < plat_priv->icc.bus_bw_cfg_count;
  2847. i++, j += 2) {
  2848. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2849. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2850. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2851. i, bus_bw_info->cfg_table[i].avg_bw,
  2852. bus_bw_info->cfg_table[i].peak_bw);
  2853. }
  2854. list_add_tail(&bus_bw_info->list,
  2855. &plat_priv->icc.list_head);
  2856. }
  2857. kfree(cfg_arr);
  2858. return 0;
  2859. out:
  2860. list_for_each_entry_safe(bus_bw_info, tmp,
  2861. &plat_priv->icc.list_head, list) {
  2862. list_del(&bus_bw_info->list);
  2863. }
  2864. cleanup:
  2865. kfree(cfg_arr);
  2866. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2867. return ret;
  2868. }
  2869. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2870. {
  2871. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2872. list_for_each_entry_safe(bus_bw_info, tmp,
  2873. &plat_priv->icc.list_head, list) {
  2874. list_del(&bus_bw_info->list);
  2875. if (bus_bw_info->icc_path)
  2876. icc_put(bus_bw_info->icc_path);
  2877. }
  2878. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2879. }
  2880. #else
  2881. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2882. {
  2883. return 0;
  2884. }
  2885. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2886. #endif /* CONFIG_INTERCONNECT */
  2887. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2888. {
  2889. struct cnss_plat_data *plat_priv = cb_ctx;
  2890. if (!plat_priv) {
  2891. cnss_pr_err("%s: Invalid context\n", __func__);
  2892. return;
  2893. }
  2894. if (status) {
  2895. cnss_pr_info("CNSS Daemon connected\n");
  2896. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2897. complete(&plat_priv->daemon_connected);
  2898. } else {
  2899. cnss_pr_info("CNSS Daemon disconnected\n");
  2900. reinit_completion(&plat_priv->daemon_connected);
  2901. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2902. }
  2903. }
  2904. static ssize_t enable_hds_store(struct device *dev,
  2905. struct device_attribute *attr,
  2906. const char *buf, size_t count)
  2907. {
  2908. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2909. unsigned int enable_hds = 0;
  2910. if (!plat_priv)
  2911. return -ENODEV;
  2912. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2913. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2914. return -EINVAL;
  2915. }
  2916. if (enable_hds)
  2917. plat_priv->hds_enabled = true;
  2918. else
  2919. plat_priv->hds_enabled = false;
  2920. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2921. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2922. return count;
  2923. }
  2924. static ssize_t recovery_show(struct device *dev,
  2925. struct device_attribute *attr,
  2926. char *buf)
  2927. {
  2928. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2929. u32 buf_size = PAGE_SIZE;
  2930. u32 curr_len = 0;
  2931. u32 buf_written = 0;
  2932. if (!plat_priv)
  2933. return -ENODEV;
  2934. buf_written = scnprintf(buf, buf_size,
  2935. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2936. "BIT0 -- wlan fw recovery\n"
  2937. "BIT1 -- wlan pcss recovery\n"
  2938. "---------------------------------\n");
  2939. curr_len += buf_written;
  2940. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2941. "WLAN recovery %s[%d]\n",
  2942. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2943. plat_priv->recovery_enabled);
  2944. curr_len += buf_written;
  2945. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2946. "WLAN PCSS recovery %s[%d]\n",
  2947. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2948. plat_priv->recovery_pcss_enabled);
  2949. curr_len += buf_written;
  2950. /*
  2951. * Now size of curr_len is not over page size for sure,
  2952. * later if new item or none-fixed size item added, need
  2953. * add check to make sure curr_len is not over page size.
  2954. */
  2955. return curr_len;
  2956. }
  2957. static ssize_t time_sync_period_show(struct device *dev,
  2958. struct device_attribute *attr,
  2959. char *buf)
  2960. {
  2961. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2962. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  2963. plat_priv->ctrl_params.time_sync_period);
  2964. }
  2965. static ssize_t time_sync_period_store(struct device *dev,
  2966. struct device_attribute *attr,
  2967. const char *buf, size_t count)
  2968. {
  2969. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2970. unsigned int time_sync_period = 0;
  2971. if (!plat_priv)
  2972. return -ENODEV;
  2973. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  2974. cnss_pr_err("Invalid time sync sysfs command\n");
  2975. return -EINVAL;
  2976. }
  2977. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  2978. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  2979. return count;
  2980. }
  2981. static ssize_t recovery_store(struct device *dev,
  2982. struct device_attribute *attr,
  2983. const char *buf, size_t count)
  2984. {
  2985. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2986. unsigned int recovery = 0;
  2987. int ret;
  2988. if (!plat_priv)
  2989. return -ENODEV;
  2990. if (sscanf(buf, "%du", &recovery) != 1) {
  2991. cnss_pr_err("Invalid recovery sysfs command\n");
  2992. return -EINVAL;
  2993. }
  2994. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2995. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2996. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2997. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2998. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2999. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3000. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  3001. if (ret < 0) {
  3002. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3003. plat_priv->recovery_pcss_enabled = false;
  3004. return -EINVAL;
  3005. }
  3006. return count;
  3007. }
  3008. static ssize_t shutdown_store(struct device *dev,
  3009. struct device_attribute *attr,
  3010. const char *buf, size_t count)
  3011. {
  3012. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3013. if (plat_priv) {
  3014. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3015. del_timer(&plat_priv->fw_boot_timer);
  3016. complete_all(&plat_priv->power_up_complete);
  3017. complete_all(&plat_priv->cal_complete);
  3018. }
  3019. cnss_pr_dbg("Received shutdown notification\n");
  3020. return count;
  3021. }
  3022. static ssize_t fs_ready_store(struct device *dev,
  3023. struct device_attribute *attr,
  3024. const char *buf, size_t count)
  3025. {
  3026. int fs_ready = 0;
  3027. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3028. if (sscanf(buf, "%du", &fs_ready) != 1)
  3029. return -EINVAL;
  3030. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3031. fs_ready, count);
  3032. if (!plat_priv) {
  3033. cnss_pr_err("plat_priv is NULL\n");
  3034. return count;
  3035. }
  3036. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3037. cnss_pr_dbg("QMI is bypassed\n");
  3038. return count;
  3039. }
  3040. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3041. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3042. cnss_driver_event_post(plat_priv,
  3043. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3044. 0, NULL);
  3045. }
  3046. return count;
  3047. }
  3048. static ssize_t qdss_trace_start_store(struct device *dev,
  3049. struct device_attribute *attr,
  3050. const char *buf, size_t count)
  3051. {
  3052. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3053. wlfw_qdss_trace_start(plat_priv);
  3054. cnss_pr_dbg("Received QDSS start command\n");
  3055. return count;
  3056. }
  3057. static ssize_t qdss_trace_stop_store(struct device *dev,
  3058. struct device_attribute *attr,
  3059. const char *buf, size_t count)
  3060. {
  3061. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3062. u32 option = 0;
  3063. if (sscanf(buf, "%du", &option) != 1)
  3064. return -EINVAL;
  3065. wlfw_qdss_trace_stop(plat_priv, option);
  3066. cnss_pr_dbg("Received QDSS stop command\n");
  3067. return count;
  3068. }
  3069. static ssize_t qdss_conf_download_store(struct device *dev,
  3070. struct device_attribute *attr,
  3071. const char *buf, size_t count)
  3072. {
  3073. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3074. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3075. cnss_pr_dbg("Received QDSS download config command\n");
  3076. return count;
  3077. }
  3078. static ssize_t hw_trace_override_store(struct device *dev,
  3079. struct device_attribute *attr,
  3080. const char *buf, size_t count)
  3081. {
  3082. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3083. int tmp = 0;
  3084. if (sscanf(buf, "%du", &tmp) != 1)
  3085. return -EINVAL;
  3086. plat_priv->hw_trc_override = tmp;
  3087. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3088. return count;
  3089. }
  3090. static ssize_t charger_mode_store(struct device *dev,
  3091. struct device_attribute *attr,
  3092. const char *buf, size_t count)
  3093. {
  3094. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3095. int tmp = 0;
  3096. if (sscanf(buf, "%du", &tmp) != 1)
  3097. return -EINVAL;
  3098. plat_priv->charger_mode = tmp;
  3099. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3100. return count;
  3101. }
  3102. static DEVICE_ATTR_WO(fs_ready);
  3103. static DEVICE_ATTR_WO(shutdown);
  3104. static DEVICE_ATTR_RW(recovery);
  3105. static DEVICE_ATTR_WO(enable_hds);
  3106. static DEVICE_ATTR_WO(qdss_trace_start);
  3107. static DEVICE_ATTR_WO(qdss_trace_stop);
  3108. static DEVICE_ATTR_WO(qdss_conf_download);
  3109. static DEVICE_ATTR_WO(hw_trace_override);
  3110. static DEVICE_ATTR_WO(charger_mode);
  3111. static DEVICE_ATTR_RW(time_sync_period);
  3112. static struct attribute *cnss_attrs[] = {
  3113. &dev_attr_fs_ready.attr,
  3114. &dev_attr_shutdown.attr,
  3115. &dev_attr_recovery.attr,
  3116. &dev_attr_enable_hds.attr,
  3117. &dev_attr_qdss_trace_start.attr,
  3118. &dev_attr_qdss_trace_stop.attr,
  3119. &dev_attr_qdss_conf_download.attr,
  3120. &dev_attr_hw_trace_override.attr,
  3121. &dev_attr_charger_mode.attr,
  3122. &dev_attr_time_sync_period.attr,
  3123. NULL,
  3124. };
  3125. static struct attribute_group cnss_attr_group = {
  3126. .attrs = cnss_attrs,
  3127. };
  3128. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3129. {
  3130. struct device *dev = &plat_priv->plat_dev->dev;
  3131. int ret;
  3132. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3133. if (ret) {
  3134. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3135. ret);
  3136. goto out;
  3137. }
  3138. /* This is only for backward compatibility. */
  3139. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3140. if (ret) {
  3141. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3142. ret);
  3143. goto rm_cnss_link;
  3144. }
  3145. return 0;
  3146. rm_cnss_link:
  3147. sysfs_remove_link(kernel_kobj, "cnss");
  3148. out:
  3149. return ret;
  3150. }
  3151. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3152. {
  3153. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3154. sysfs_remove_link(kernel_kobj, "cnss");
  3155. }
  3156. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3157. {
  3158. int ret = 0;
  3159. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3160. &cnss_attr_group);
  3161. if (ret) {
  3162. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3163. ret);
  3164. goto out;
  3165. }
  3166. cnss_create_sysfs_link(plat_priv);
  3167. return 0;
  3168. out:
  3169. return ret;
  3170. }
  3171. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3172. {
  3173. cnss_remove_sysfs_link(plat_priv);
  3174. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3175. }
  3176. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3177. {
  3178. spin_lock_init(&plat_priv->event_lock);
  3179. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3180. WQ_UNBOUND, 1);
  3181. if (!plat_priv->event_wq) {
  3182. cnss_pr_err("Failed to create event workqueue!\n");
  3183. return -EFAULT;
  3184. }
  3185. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3186. INIT_LIST_HEAD(&plat_priv->event_list);
  3187. return 0;
  3188. }
  3189. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3190. {
  3191. destroy_workqueue(plat_priv->event_wq);
  3192. }
  3193. static int cnss_reboot_notifier(struct notifier_block *nb,
  3194. unsigned long action,
  3195. void *data)
  3196. {
  3197. struct cnss_plat_data *plat_priv =
  3198. container_of(nb, struct cnss_plat_data, reboot_nb);
  3199. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3200. del_timer(&plat_priv->fw_boot_timer);
  3201. complete_all(&plat_priv->power_up_complete);
  3202. complete_all(&plat_priv->cal_complete);
  3203. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3204. return NOTIFY_DONE;
  3205. }
  3206. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3207. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3208. {
  3209. struct Object client_env;
  3210. struct Object app_object;
  3211. u32 wifi_uid = HW_WIFI_UID;
  3212. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3213. int ret;
  3214. u8 state = 0;
  3215. /* Once this flag is set, secure peripheral feature
  3216. * will not be supported till next reboot
  3217. */
  3218. if (plat_priv->sec_peri_feature_disable)
  3219. return 0;
  3220. /* get rootObj */
  3221. ret = get_client_env_object(&client_env);
  3222. if (ret) {
  3223. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3224. goto end;
  3225. }
  3226. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3227. if (ret) {
  3228. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3229. if (ret == FEATURE_NOT_SUPPORTED) {
  3230. ret = 0; /* Do not Assert */
  3231. plat_priv->sec_peri_feature_disable = true;
  3232. cnss_pr_dbg("Secure HW feature not supported\n");
  3233. }
  3234. goto exit_release_clientenv;
  3235. }
  3236. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3237. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3238. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3239. ObjectCounts_pack(1, 1, 0, 0));
  3240. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3241. if (ret) {
  3242. if (ret == PERIPHERAL_NOT_FOUND) {
  3243. ret = 0; /* Do not Assert */
  3244. plat_priv->sec_peri_feature_disable = true;
  3245. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3246. }
  3247. goto exit_release_app_obj;
  3248. }
  3249. if (state == 1)
  3250. set_bit(CNSS_WLAN_HW_DISABLED,
  3251. &plat_priv->driver_state);
  3252. else
  3253. clear_bit(CNSS_WLAN_HW_DISABLED,
  3254. &plat_priv->driver_state);
  3255. exit_release_app_obj:
  3256. Object_release(app_object);
  3257. exit_release_clientenv:
  3258. Object_release(client_env);
  3259. end:
  3260. if (ret) {
  3261. cnss_pr_err("Unable to get HW disable status\n");
  3262. CNSS_ASSERT(0);
  3263. }
  3264. return ret;
  3265. }
  3266. #else
  3267. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3268. {
  3269. return 0;
  3270. }
  3271. #endif
  3272. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3273. {
  3274. int ret;
  3275. ret = cnss_init_sol_gpio(plat_priv);
  3276. if (ret)
  3277. return ret;
  3278. timer_setup(&plat_priv->fw_boot_timer,
  3279. cnss_bus_fw_boot_timeout_hdlr, 0);
  3280. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3281. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3282. if (ret)
  3283. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3284. ret);
  3285. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3286. if (ret)
  3287. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3288. ret);
  3289. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3290. init_completion(&plat_priv->power_up_complete);
  3291. init_completion(&plat_priv->cal_complete);
  3292. init_completion(&plat_priv->rddm_complete);
  3293. init_completion(&plat_priv->recovery_complete);
  3294. init_completion(&plat_priv->daemon_connected);
  3295. mutex_init(&plat_priv->dev_lock);
  3296. mutex_init(&plat_priv->driver_ops_lock);
  3297. plat_priv->recovery_ws =
  3298. wakeup_source_register(&plat_priv->plat_dev->dev,
  3299. "CNSS_FW_RECOVERY");
  3300. if (!plat_priv->recovery_ws)
  3301. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3302. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3303. cnss_daemon_connection_update_cb,
  3304. plat_priv);
  3305. if (ret)
  3306. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3307. ret);
  3308. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3309. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3310. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3311. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3312. "qcom,rc-ep-short-channel"))
  3313. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3314. return 0;
  3315. }
  3316. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3317. {
  3318. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3319. plat_priv);
  3320. complete_all(&plat_priv->recovery_complete);
  3321. complete_all(&plat_priv->rddm_complete);
  3322. complete_all(&plat_priv->cal_complete);
  3323. complete_all(&plat_priv->power_up_complete);
  3324. complete_all(&plat_priv->daemon_connected);
  3325. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3326. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3327. del_timer(&plat_priv->fw_boot_timer);
  3328. wakeup_source_unregister(plat_priv->recovery_ws);
  3329. cnss_deinit_sol_gpio(plat_priv);
  3330. kfree(plat_priv->sram_dump);
  3331. }
  3332. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3333. {
  3334. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3335. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3336. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3337. "qcom,wlan-cbc-enabled");
  3338. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3339. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3340. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3341. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3342. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3343. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3344. * enabled by default
  3345. */
  3346. plat_priv->adsp_pc_enabled = true;
  3347. }
  3348. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3349. {
  3350. struct device *dev = &plat_priv->plat_dev->dev;
  3351. plat_priv->use_pm_domain =
  3352. of_property_read_bool(dev->of_node, "use-pm-domain");
  3353. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3354. }
  3355. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3356. {
  3357. struct device *dev = &plat_priv->plat_dev->dev;
  3358. plat_priv->set_wlaon_pwr_ctrl =
  3359. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3360. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3361. plat_priv->set_wlaon_pwr_ctrl);
  3362. }
  3363. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3364. {
  3365. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3366. "qcom,converged-dt") ||
  3367. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3368. "qcom,same-dt-multi-dev") ||
  3369. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3370. "qcom,multi-wlan-exchg"));
  3371. }
  3372. static const struct platform_device_id cnss_platform_id_table[] = {
  3373. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3374. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3375. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3376. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3377. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3378. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3379. { .name = "qcaconv", .driver_data = 0, },
  3380. { },
  3381. };
  3382. static const struct of_device_id cnss_of_match_table[] = {
  3383. {
  3384. .compatible = "qcom,cnss",
  3385. .data = (void *)&cnss_platform_id_table[0]},
  3386. {
  3387. .compatible = "qcom,cnss-qca6290",
  3388. .data = (void *)&cnss_platform_id_table[1]},
  3389. {
  3390. .compatible = "qcom,cnss-qca6390",
  3391. .data = (void *)&cnss_platform_id_table[2]},
  3392. {
  3393. .compatible = "qcom,cnss-qca6490",
  3394. .data = (void *)&cnss_platform_id_table[3]},
  3395. {
  3396. .compatible = "qcom,cnss-kiwi",
  3397. .data = (void *)&cnss_platform_id_table[4]},
  3398. {
  3399. .compatible = "qcom,cnss-mango",
  3400. .data = (void *)&cnss_platform_id_table[5]},
  3401. {
  3402. .compatible = "qcom,cnss-qca-converged",
  3403. .data = (void *)&cnss_platform_id_table[6]},
  3404. { },
  3405. };
  3406. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3407. static inline bool
  3408. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3409. {
  3410. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3411. "use-nv-mac");
  3412. }
  3413. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3414. {
  3415. struct device_node *child;
  3416. u32 id, i;
  3417. int id_n, device_identifier_gpio, ret;
  3418. u8 gpio_value;
  3419. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3420. return 0;
  3421. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3422. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3423. if (ret) {
  3424. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3425. return ret;
  3426. }
  3427. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3428. gpio_value = gpio_get_value(device_identifier_gpio);
  3429. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3430. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3431. child) {
  3432. if (strcmp(child->name, "chip_cfg"))
  3433. continue;
  3434. id_n = of_property_count_u32_elems(child, "supported-ids");
  3435. if (id_n <= 0) {
  3436. cnss_pr_err("Device id is NOT set\n");
  3437. return -EINVAL;
  3438. }
  3439. for (i = 0; i < id_n; i++) {
  3440. ret = of_property_read_u32_index(child,
  3441. "supported-ids",
  3442. i, &id);
  3443. if (ret) {
  3444. cnss_pr_err("Failed to read supported ids\n");
  3445. return -EINVAL;
  3446. }
  3447. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3448. plat_priv->plat_dev->dev.of_node = child;
  3449. plat_priv->device_id = QCA6490_DEVICE_ID;
  3450. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3451. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3452. child->name, i, id);
  3453. return 0;
  3454. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3455. plat_priv->plat_dev->dev.of_node = child;
  3456. plat_priv->device_id = KIWI_DEVICE_ID;
  3457. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3458. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3459. child->name, i, id);
  3460. return 0;
  3461. }
  3462. }
  3463. }
  3464. return -EINVAL;
  3465. }
  3466. static inline u32
  3467. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3468. {
  3469. bool is_converged_dt = of_property_read_bool(
  3470. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3471. bool is_multi_wlan_xchg;
  3472. if (is_converged_dt)
  3473. return CNSS_DTT_CONVERGED;
  3474. is_multi_wlan_xchg = of_property_read_bool(
  3475. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3476. if (is_multi_wlan_xchg)
  3477. return CNSS_DTT_MULTIEXCHG;
  3478. return CNSS_DTT_LEGACY;
  3479. }
  3480. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3481. {
  3482. int ret = 0;
  3483. int retry = 0;
  3484. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3485. return 0;
  3486. retry:
  3487. ret = cnss_power_on_device(plat_priv, true);
  3488. if (ret)
  3489. goto end;
  3490. ret = cnss_bus_init(plat_priv);
  3491. if (ret) {
  3492. if ((ret != -EPROBE_DEFER) &&
  3493. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3494. cnss_power_off_device(plat_priv);
  3495. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3496. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3497. goto retry;
  3498. }
  3499. goto power_off;
  3500. }
  3501. return 0;
  3502. power_off:
  3503. cnss_power_off_device(plat_priv);
  3504. end:
  3505. return ret;
  3506. }
  3507. int cnss_wlan_hw_enable(void)
  3508. {
  3509. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3510. int ret = 0;
  3511. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3512. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3513. goto register_driver;
  3514. ret = cnss_wlan_device_init(plat_priv);
  3515. if (ret) {
  3516. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3517. CNSS_ASSERT(0);
  3518. return ret;
  3519. }
  3520. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3521. cnss_driver_event_post(plat_priv,
  3522. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3523. 0, NULL);
  3524. register_driver:
  3525. if (plat_priv->driver_ops)
  3526. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3527. return ret;
  3528. }
  3529. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3530. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3531. {
  3532. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3533. int ret = 0;
  3534. if (!plat_priv)
  3535. return -ENODEV;
  3536. /* If IMS server is connected, return success without QMI send */
  3537. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3538. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3539. return ret;
  3540. }
  3541. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3542. return ret;
  3543. }
  3544. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3545. static int cnss_probe(struct platform_device *plat_dev)
  3546. {
  3547. int ret = 0;
  3548. struct cnss_plat_data *plat_priv;
  3549. const struct of_device_id *of_id;
  3550. const struct platform_device_id *device_id;
  3551. if (cnss_get_plat_priv(plat_dev)) {
  3552. cnss_pr_err("Driver is already initialized!\n");
  3553. ret = -EEXIST;
  3554. goto out;
  3555. }
  3556. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3557. if (!of_id || !of_id->data) {
  3558. cnss_pr_err("Failed to find of match device!\n");
  3559. ret = -ENODEV;
  3560. goto out;
  3561. }
  3562. device_id = of_id->data;
  3563. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3564. GFP_KERNEL);
  3565. if (!plat_priv) {
  3566. ret = -ENOMEM;
  3567. goto out;
  3568. }
  3569. plat_priv->plat_dev = plat_dev;
  3570. plat_priv->dev_node = NULL;
  3571. plat_priv->device_id = device_id->driver_data;
  3572. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3573. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3574. plat_priv->dt_type);
  3575. plat_priv->use_fw_path_with_prefix =
  3576. cnss_use_fw_path_with_prefix(plat_priv);
  3577. ret = cnss_get_dev_cfg_node(plat_priv);
  3578. if (ret) {
  3579. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3580. goto reset_plat_dev;
  3581. }
  3582. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  3583. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3584. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3585. cnss_set_plat_priv(plat_dev, plat_priv);
  3586. platform_set_drvdata(plat_dev, plat_priv);
  3587. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3588. INIT_LIST_HEAD(&plat_priv->clk_list);
  3589. cnss_get_pm_domain_info(plat_priv);
  3590. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3591. cnss_power_misc_params_init(plat_priv);
  3592. cnss_get_tcs_info(plat_priv);
  3593. cnss_get_cpr_info(plat_priv);
  3594. cnss_aop_mbox_init(plat_priv);
  3595. cnss_init_control_params(plat_priv);
  3596. ret = cnss_get_resources(plat_priv);
  3597. if (ret)
  3598. goto reset_ctx;
  3599. ret = cnss_register_esoc(plat_priv);
  3600. if (ret)
  3601. goto free_res;
  3602. ret = cnss_register_bus_scale(plat_priv);
  3603. if (ret)
  3604. goto unreg_esoc;
  3605. ret = cnss_create_sysfs(plat_priv);
  3606. if (ret)
  3607. goto unreg_bus_scale;
  3608. ret = cnss_event_work_init(plat_priv);
  3609. if (ret)
  3610. goto remove_sysfs;
  3611. ret = cnss_qmi_init(plat_priv);
  3612. if (ret)
  3613. goto deinit_event_work;
  3614. ret = cnss_dms_init(plat_priv);
  3615. if (ret)
  3616. goto deinit_qmi;
  3617. ret = cnss_debugfs_create(plat_priv);
  3618. if (ret)
  3619. goto deinit_dms;
  3620. ret = cnss_misc_init(plat_priv);
  3621. if (ret)
  3622. goto destroy_debugfs;
  3623. ret = cnss_wlan_hw_disable_check(plat_priv);
  3624. if (ret)
  3625. goto deinit_misc;
  3626. /* Make sure all platform related init are done before
  3627. * device power on and bus init.
  3628. */
  3629. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3630. ret = cnss_wlan_device_init(plat_priv);
  3631. if (ret)
  3632. goto deinit_misc;
  3633. } else {
  3634. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3635. }
  3636. cnss_register_coex_service(plat_priv);
  3637. cnss_register_ims_service(plat_priv);
  3638. ret = cnss_genl_init();
  3639. if (ret < 0)
  3640. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3641. cnss_pr_info("Platform driver probed successfully.\n");
  3642. return 0;
  3643. deinit_misc:
  3644. cnss_misc_deinit(plat_priv);
  3645. destroy_debugfs:
  3646. cnss_debugfs_destroy(plat_priv);
  3647. deinit_dms:
  3648. cnss_dms_deinit(plat_priv);
  3649. deinit_qmi:
  3650. cnss_qmi_deinit(plat_priv);
  3651. deinit_event_work:
  3652. cnss_event_work_deinit(plat_priv);
  3653. remove_sysfs:
  3654. cnss_remove_sysfs(plat_priv);
  3655. unreg_bus_scale:
  3656. cnss_unregister_bus_scale(plat_priv);
  3657. unreg_esoc:
  3658. cnss_unregister_esoc(plat_priv);
  3659. free_res:
  3660. cnss_put_resources(plat_priv);
  3661. reset_ctx:
  3662. platform_set_drvdata(plat_dev, NULL);
  3663. reset_plat_dev:
  3664. cnss_set_plat_priv(plat_dev, NULL);
  3665. out:
  3666. return ret;
  3667. }
  3668. static int cnss_remove(struct platform_device *plat_dev)
  3669. {
  3670. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3671. plat_priv->audio_iommu_domain = NULL;
  3672. cnss_genl_exit();
  3673. cnss_unregister_ims_service(plat_priv);
  3674. cnss_unregister_coex_service(plat_priv);
  3675. cnss_bus_deinit(plat_priv);
  3676. cnss_misc_deinit(plat_priv);
  3677. cnss_debugfs_destroy(plat_priv);
  3678. cnss_dms_deinit(plat_priv);
  3679. cnss_qmi_deinit(plat_priv);
  3680. cnss_event_work_deinit(plat_priv);
  3681. cnss_cancel_dms_work();
  3682. cnss_remove_sysfs(plat_priv);
  3683. cnss_unregister_bus_scale(plat_priv);
  3684. cnss_unregister_esoc(plat_priv);
  3685. cnss_put_resources(plat_priv);
  3686. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3687. mbox_free_channel(plat_priv->mbox_chan);
  3688. platform_set_drvdata(plat_dev, NULL);
  3689. plat_env = NULL;
  3690. return 0;
  3691. }
  3692. static struct platform_driver cnss_platform_driver = {
  3693. .probe = cnss_probe,
  3694. .remove = cnss_remove,
  3695. .driver = {
  3696. .name = "cnss2",
  3697. .of_match_table = cnss_of_match_table,
  3698. #ifdef CONFIG_CNSS_ASYNC
  3699. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3700. #endif
  3701. },
  3702. };
  3703. static bool cnss_check_compatible_node(void)
  3704. {
  3705. struct device_node *dn = NULL;
  3706. for_each_matching_node(dn, cnss_of_match_table) {
  3707. if (of_device_is_available(dn)) {
  3708. cnss_allow_driver_loading = true;
  3709. return true;
  3710. }
  3711. }
  3712. return false;
  3713. }
  3714. /**
  3715. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3716. *
  3717. * Valid device tree node means a node with "compatible" property from the
  3718. * device match table and "status" property is not disabled.
  3719. *
  3720. * Return: true if valid device tree node found, false if not found
  3721. */
  3722. static bool cnss_is_valid_dt_node_found(void)
  3723. {
  3724. struct device_node *dn = NULL;
  3725. for_each_matching_node(dn, cnss_of_match_table) {
  3726. if (of_device_is_available(dn))
  3727. break;
  3728. }
  3729. if (dn)
  3730. return true;
  3731. return false;
  3732. }
  3733. static int __init cnss_initialize(void)
  3734. {
  3735. int ret = 0;
  3736. if (!cnss_is_valid_dt_node_found())
  3737. return -ENODEV;
  3738. if (!cnss_check_compatible_node())
  3739. return ret;
  3740. cnss_debug_init();
  3741. ret = platform_driver_register(&cnss_platform_driver);
  3742. if (ret)
  3743. cnss_debug_deinit();
  3744. return ret;
  3745. }
  3746. static void __exit cnss_exit(void)
  3747. {
  3748. platform_driver_unregister(&cnss_platform_driver);
  3749. cnss_debug_deinit();
  3750. }
  3751. module_init(cnss_initialize);
  3752. module_exit(cnss_exit);
  3753. MODULE_LICENSE("GPL v2");
  3754. MODULE_DESCRIPTION("CNSS2 Platform Driver");