982 sor
31 KiB
C
982 sor
31 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _MSM_VIDC_INTERNAL_H_
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#define _MSM_VIDC_INTERNAL_H_
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#include <linux/version.h>
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#include <linux/bits.h>
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#include <linux/workqueue.h>
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#include <linux/spinlock.h>
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#include <linux/sync_file.h>
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#include <linux/dma-fence.h>
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#include <media/v4l2-dev.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/videobuf2-core.h>
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#include <media/videobuf2-v4l2.h>
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struct msm_vidc_inst;
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/* TODO : remove once available in mainline kernel */
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#ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE
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#define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3)
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#endif
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enum msm_vidc_blur_types {
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MSM_VIDC_BLUR_NONE = 0x0,
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MSM_VIDC_BLUR_EXTERNAL = 0x1,
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MSM_VIDC_BLUR_ADAPTIVE = 0x2,
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};
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/* various Metadata - encoder & decoder */
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enum msm_vidc_metadata_bits {
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MSM_VIDC_META_DISABLE = 0x0,
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MSM_VIDC_META_ENABLE = 0x1,
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MSM_VIDC_META_TX_INPUT = 0x2,
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MSM_VIDC_META_TX_OUTPUT = 0x4,
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MSM_VIDC_META_RX_INPUT = 0x8,
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MSM_VIDC_META_RX_OUTPUT = 0x10,
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MSM_VIDC_META_MAX = 0x20,
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};
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#define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */
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#define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */
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#define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE
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#define MSM_VIDC_METADATA_DOLBY_RPU_SIZE (41 * 1024) /* 41 KB */
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#define MAX_NAME_LENGTH 128
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#define VENUS_VERSION_LENGTH 128
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#define MAX_MATRIX_COEFFS 9
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#define MAX_BIAS_COEFFS 3
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#define MAX_LIMIT_COEFFS 6
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#define MAX_DEBUGFS_NAME 50
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#define DEFAULT_HEIGHT 240
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#define DEFAULT_WIDTH 320
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#define DEFAULT_FPS 30
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#define MAXIMUM_VP9_FPS 60
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#define NRT_PRIORITY_OFFSET 2
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#define RT_DEC_DOWN_PRORITY_OFFSET 1
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#define MAX_SUPPORTED_INSTANCES 16
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#define DEFAULT_BSE_VPP_DELAY 2
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#define MAX_CAP_PARENTS 20
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#define MAX_CAP_CHILDREN 20
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#define DEFAULT_MAX_HOST_BUF_COUNT 64
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#define DEFAULT_MAX_HOST_BURST_BUF_COUNT 256
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#define BIT_DEPTH_8 (8 << 16 | 8)
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#define BIT_DEPTH_10 (10 << 16 | 10)
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#define CODED_FRAMES_PROGRESSIVE 0x0
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#define CODED_FRAMES_INTERLACE 0x1
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#define MAX_VP9D_INST_COUNT 6
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/* TODO: move below macros to waipio.c */
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#define MAX_ENH_LAYER_HB 3
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#define MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW 5
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#define MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW 3
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#define MAX_AVC_ENH_LAYER_SLIDING_WINDOW 3
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#define MAX_AVC_ENH_LAYER_HYBRID_HP 5
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#define INVALID_DEFAULT_MARK_OR_USE_LTR -1
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#define MAX_SLICES_PER_FRAME 10
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#define MAX_SLICES_FRAME_RATE 60
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#define MAX_MB_SLICE_WIDTH 4096
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#define MAX_MB_SLICE_HEIGHT 2160
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#define MAX_BYTES_SLICE_WIDTH 1920
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#define MAX_BYTES_SLICE_HEIGHT 1088
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#define MIN_HEVC_SLICE_WIDTH 384
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#define MIN_AVC_SLICE_WIDTH 192
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#define MIN_SLICE_HEIGHT 128
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#define MAX_BITRATE_BOOST 25
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#define MAX_SUPPORTED_MIN_QUALITY 70
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#define MIN_CHROMA_QP_OFFSET -12
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#define MAX_CHROMA_QP_OFFSET 0
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#define MIN_QP_10BIT -11
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#define MIN_QP_8BIT 1
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#define INVALID_FD -1
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#define INVALID_CLIENT_ID -1
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#define MAX_ENCODING_REFERNCE_FRAMES 7
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#define MAX_LTR_FRAME_COUNT_5 5
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#define MAX_LTR_FRAME_COUNT_2 2
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#define DCVS_WINDOW 16
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#define ENC_FPS_WINDOW 3
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#define DEC_FPS_WINDOW 10
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#define INPUT_TIMER_LIST_SIZE 30
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#define DEFAULT_COMPLEXITY 50
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#define INPUT_MPLANE V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
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#define OUTPUT_MPLANE V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
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#define INPUT_META_PLANE V4L2_BUF_TYPE_META_OUTPUT
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#define OUTPUT_META_PLANE V4L2_BUF_TYPE_META_CAPTURE
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#define VIDC_IFACEQ_MAX_PKT_SIZE 1024
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#define VIDC_IFACEQ_MED_PKT_SIZE 768
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#define VIDC_IFACEQ_MIN_PKT_SIZE 8
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#define VIDC_IFACEQ_VAR_SMALL_PKT_SIZE 100
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#define VIDC_IFACEQ_VAR_LARGE_PKT_SIZE 512
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#define VIDC_IFACEQ_VAR_HUGE_PKT_SIZE (1024*4)
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#define NUM_MBS_PER_SEC(__height, __width, __fps) \
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(NUM_MBS_PER_FRAME(__height, __width) * __fps)
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#define NUM_MBS_PER_FRAME(__height, __width) \
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((ALIGN(__height, 16) / 16) * (ALIGN(__width, 16) / 16))
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#ifdef V4L2_CTRL_CLASS_CODEC
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#define IS_PRIV_CTRL(idx) ( \
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(V4L2_CTRL_ID2WHICH(idx) == V4L2_CTRL_CLASS_CODEC) && \
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V4L2_CTRL_DRIVER_PRIV(idx))
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#else
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#define IS_PRIV_CTRL(idx) ( \
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(V4L2_CTRL_ID2WHICH(idx) == V4L2_CTRL_CLASS_MPEG) && \
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V4L2_CTRL_DRIVER_PRIV(idx))
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#endif
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#define BUFFER_ALIGNMENT_SIZE(x) x
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#define NUM_MBS_360P (((480 + 15) >> 4) * ((360 + 15) >> 4))
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#define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4))
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#define NUM_MBS_4k (((4096 + 15) >> 4) * ((2304 + 15) >> 4))
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#define MB_SIZE_IN_PIXEL (16 * 16)
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#define DB_H264_DISABLE_SLICE_BOUNDARY \
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V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY
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#define DB_HEVC_DISABLE_SLICE_BOUNDARY \
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V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY
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/*
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* Convert Q16 number into Integer and Fractional part upto 2 places.
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* Ex : 105752 / 65536 = 1.61; 1.61 in Q16 = 105752;
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* Integer part = 105752 / 65536 = 1;
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* Reminder = 105752 * 0xFFFF = 40216; Last 16 bits.
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* Fractional part = 40216 * 100 / 65536 = 61;
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* Now convert to FP(1, 61, 100).
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*/
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#define Q16_INT(q) ((q) >> 16)
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#define Q16_FRAC(q) ((((q) & 0xFFFF) * 100) >> 16)
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/* define timeout values */
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#define HW_RESPONSE_TIMEOUT_VALUE (1000)
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#define SW_PC_DELAY_VALUE (HW_RESPONSE_TIMEOUT_VALUE + 500)
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#define FW_UNLOAD_DELAY_VALUE (SW_PC_DELAY_VALUE + 1500)
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#define MAX_MAP_OUTPUT_COUNT 64
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#define MAX_DPB_COUNT 32
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/*
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* max dpb count in firmware = 16
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* each dpb: 4 words - <base_address, addr_offset, data_offset>
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* dpb list array size = 16 * 4
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* dpb payload size = 16 * 4 * 4
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*/
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#define MAX_DPB_LIST_ARRAY_SIZE (16 * 4)
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#define MAX_DPB_LIST_PAYLOAD_SIZE (16 * 4 * 4)
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#define GENERATE_ENUM(ENUM) ENUM,
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#define GENERATE_STRING(STRING) (#STRING),
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/* append MSM_VIDC_ to prepare enum */
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#define GENERATE_MSM_VIDC_ENUM(ENUM) MSM_VIDC_##ENUM,
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/* append MSM_VIDC_BUF_ to prepare enum */
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#define GENERATE_MSM_VIDC_BUF_ENUM(ENUM) MSM_VIDC_BUF_##ENUM,
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/**
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* msm_vidc_prepare_dependency_list() api will prepare caps_list by looping over
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* enums(msm_vidc_inst_capability_type) from 0 to INST_CAP_MAX and arranges the
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* node in such a way that parents willbe at the front and dependent children
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* in the back.
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*
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* caps_list preparation may become CPU intensive task, so to save CPU cycles,
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* organize enum in proper order(leaf caps at the beginning and dependent parent caps
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* at back), so that during caps_list preparation num CPU cycles spent will reduce.
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*
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* Note: It will work, if enum kept at different places, but not efficient.
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*
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* - place all metadata cap(META_*) af the front.
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* - place all leaf(no child) enums before PROFILE cap.
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* - place all intermittent(having both parent and child) enums before FRAME_WIDTH cap.
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* - place all root(no parent) enums before INST_CAP_MAX cap.
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*/
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#define FOREACH_CAP(CAP) { \
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CAP(INST_CAP_NONE) \
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CAP(META_SEQ_HDR_NAL) \
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CAP(META_BITSTREAM_RESOLUTION) \
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CAP(META_CROP_OFFSETS) \
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CAP(META_DPB_MISR) \
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CAP(META_OPB_MISR) \
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CAP(META_INTERLACE) \
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CAP(META_OUTBUF_FENCE) \
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CAP(META_LTR_MARK_USE) \
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CAP(META_TIMESTAMP) \
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CAP(META_CONCEALED_MB_CNT) \
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CAP(META_HIST_INFO) \
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CAP(META_PICTURE_TYPE) \
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CAP(META_SEI_MASTERING_DISP) \
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CAP(META_SEI_CLL) \
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CAP(META_HDR10PLUS) \
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CAP(META_BUF_TAG) \
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CAP(META_DPB_TAG_LIST) \
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CAP(META_SUBFRAME_OUTPUT) \
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CAP(META_ENC_QP_METADATA) \
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CAP(META_DEC_QP_METADATA) \
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CAP(META_MAX_NUM_REORDER_FRAMES) \
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CAP(META_EVA_STATS) \
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CAP(META_ROI_INFO) \
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CAP(META_SALIENCY_INFO) \
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CAP(META_TRANSCODING_STAT_INFO) \
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CAP(META_DOLBY_RPU) \
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CAP(MIN_FRAME_QP) \
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CAP(MAX_FRAME_QP) \
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CAP(I_FRAME_QP) \
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CAP(P_FRAME_QP) \
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CAP(B_FRAME_QP) \
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CAP(TIME_DELTA_BASED_RC) \
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CAP(CONSTANT_QUALITY) \
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CAP(VBV_DELAY) \
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CAP(PEAK_BITRATE) \
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CAP(ENTROPY_MODE) \
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CAP(TRANSFORM_8X8) \
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CAP(STAGE) \
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CAP(LTR_COUNT) \
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CAP(IR_PERIOD) \
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CAP(BITRATE_BOOST) \
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CAP(BLUR_RESOLUTION) \
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CAP(OUTPUT_ORDER) \
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CAP(INPUT_BUF_HOST_MAX_COUNT) \
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CAP(OUTPUT_BUF_HOST_MAX_COUNT) \
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CAP(DELIVERY_MODE) \
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CAP(VUI_TIMING_INFO) \
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CAP(SLICE_DECODE) \
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CAP(PROFILE) \
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CAP(ENH_LAYER_COUNT) \
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CAP(BIT_RATE) \
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CAP(LOWLATENCY_MODE) \
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CAP(GOP_SIZE) \
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CAP(B_FRAME) \
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CAP(ALL_INTRA) \
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CAP(MIN_QUALITY) \
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CAP(CONTENT_ADAPTIVE_CODING) \
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CAP(BLUR_TYPES) \
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CAP(REQUEST_PREPROCESS) \
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CAP(SLICE_MODE) \
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CAP(FRAME_WIDTH) \
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CAP(LOSSLESS_FRAME_WIDTH) \
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CAP(SECURE_FRAME_WIDTH) \
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CAP(FRAME_HEIGHT) \
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CAP(LOSSLESS_FRAME_HEIGHT) \
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CAP(SECURE_FRAME_HEIGHT) \
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CAP(PIX_FMTS) \
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CAP(MIN_BUFFERS_INPUT) \
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CAP(MIN_BUFFERS_OUTPUT) \
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CAP(MBPF) \
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CAP(BATCH_MBPF) \
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CAP(BATCH_FPS) \
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CAP(LOSSLESS_MBPF) \
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CAP(SECURE_MBPF) \
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CAP(FRAME_RATE) \
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CAP(OPERATING_RATE) \
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CAP(INPUT_RATE) \
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CAP(TIMESTAMP_RATE) \
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CAP(SCALE_FACTOR) \
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CAP(MB_CYCLES_VSP) \
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CAP(MB_CYCLES_VPP) \
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CAP(MB_CYCLES_LP) \
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CAP(MB_CYCLES_FW) \
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CAP(MB_CYCLES_FW_VPP) \
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CAP(CLIENT_ID) \
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CAP(SECURE_MODE) \
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CAP(FENCE_ID) \
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CAP(FENCE_FD) \
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CAP(TS_REORDER) \
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CAP(HFLIP) \
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CAP(VFLIP) \
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CAP(ROTATION) \
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CAP(SUPER_FRAME) \
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CAP(HEADER_MODE) \
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CAP(PREPEND_SPSPPS_TO_IDR) \
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CAP(WITHOUT_STARTCODE) \
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CAP(NAL_LENGTH_FIELD) \
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CAP(REQUEST_I_FRAME) \
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CAP(BITRATE_MODE) \
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CAP(LOSSLESS) \
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CAP(FRAME_SKIP_MODE) \
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CAP(FRAME_RC_ENABLE) \
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CAP(GOP_CLOSURE) \
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CAP(CSC) \
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CAP(CSC_CUSTOM_MATRIX) \
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CAP(USE_LTR) \
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CAP(MARK_LTR) \
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CAP(BASELAYER_PRIORITY) \
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CAP(IR_TYPE) \
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CAP(AU_DELIMITER) \
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CAP(GRID) \
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CAP(I_FRAME_MIN_QP) \
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CAP(P_FRAME_MIN_QP) \
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CAP(B_FRAME_MIN_QP) \
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CAP(I_FRAME_MAX_QP) \
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CAP(P_FRAME_MAX_QP) \
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CAP(B_FRAME_MAX_QP) \
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CAP(LAYER_TYPE) \
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CAP(LAYER_ENABLE) \
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CAP(L0_BR) \
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CAP(L1_BR) \
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CAP(L2_BR) \
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CAP(L3_BR) \
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CAP(L4_BR) \
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CAP(L5_BR) \
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CAP(LEVEL) \
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CAP(HEVC_TIER) \
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CAP(AV1_TIER) \
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CAP(DISPLAY_DELAY_ENABLE) \
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CAP(DISPLAY_DELAY) \
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CAP(CONCEAL_COLOR_8BIT) \
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CAP(CONCEAL_COLOR_10BIT) \
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CAP(LF_MODE) \
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CAP(LF_ALPHA) \
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CAP(LF_BETA) \
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CAP(SLICE_MAX_BYTES) \
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CAP(SLICE_MAX_MB) \
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CAP(MB_RC) \
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CAP(CHROMA_QP_INDEX_OFFSET) \
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CAP(PIPE) \
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CAP(POC) \
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CAP(CODED_FRAMES) \
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CAP(BIT_DEPTH) \
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CAP(CODEC_CONFIG) \
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CAP(BITSTREAM_SIZE_OVERWRITE) \
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CAP(THUMBNAIL_MODE) \
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CAP(DEFAULT_HEADER) \
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CAP(RAP_FRAME) \
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CAP(SEQ_CHANGE_AT_SYNC_FRAME) \
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CAP(QUALITY_MODE) \
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CAP(PRIORITY) \
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CAP(FIRMWARE_PRIORITY_OFFSET) \
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CAP(CRITICAL_PRIORITY) \
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CAP(RESERVE_DURATION) \
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CAP(DPB_LIST) \
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CAP(FILM_GRAIN) \
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CAP(SUPER_BLOCK) \
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CAP(DRAP) \
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CAP(ENC_IP_CR) \
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CAP(COMPLEXITY) \
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CAP(CABAC_MAX_BITRATE) \
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CAP(CAVLC_MAX_BITRATE) \
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CAP(ALLINTRA_MAX_BITRATE) \
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CAP(LOWLATENCY_MAX_BITRATE) \
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CAP(LAST_FLAG_EVENT_ENABLE) \
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CAP(NUM_COMV) \
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CAP(SIGNAL_COLOR_INFO) \
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CAP(INST_CAP_MAX) \
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}
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#define FOREACH_BUF_TYPE(BUF_TYPE) { \
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BUF_TYPE(NONE) \
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BUF_TYPE(INPUT) \
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BUF_TYPE(OUTPUT) \
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BUF_TYPE(INPUT_META) \
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BUF_TYPE(OUTPUT_META) \
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BUF_TYPE(READ_ONLY) \
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BUF_TYPE(INTERFACE_QUEUE) \
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BUF_TYPE(BIN) \
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BUF_TYPE(ARP) \
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BUF_TYPE(COMV) \
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BUF_TYPE(NON_COMV) \
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BUF_TYPE(LINE) \
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BUF_TYPE(DPB) \
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BUF_TYPE(PERSIST) \
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BUF_TYPE(VPSS) \
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BUF_TYPE(PARTIAL_DATA) \
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}
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#define FOREACH_ALLOW(ALLOW) { \
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ALLOW(MSM_VIDC_DISALLOW) \
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ALLOW(MSM_VIDC_ALLOW) \
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ALLOW(MSM_VIDC_DEFER) \
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ALLOW(MSM_VIDC_DISCARD) \
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ALLOW(MSM_VIDC_IGNORE) \
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}
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enum msm_vidc_domain_type {
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MSM_VIDC_ENCODER = BIT(0),
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MSM_VIDC_DECODER = BIT(1),
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};
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enum msm_vidc_codec_type {
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MSM_VIDC_H264 = BIT(0),
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MSM_VIDC_HEVC = BIT(1),
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MSM_VIDC_VP9 = BIT(2),
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MSM_VIDC_HEIC = BIT(3),
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MSM_VIDC_AV1 = BIT(4),
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};
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enum msm_vidc_colorformat_type {
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MSM_VIDC_FMT_NONE = 0,
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MSM_VIDC_FMT_NV12C = BIT(0),
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MSM_VIDC_FMT_NV12 = BIT(1),
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MSM_VIDC_FMT_NV21 = BIT(2),
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MSM_VIDC_FMT_TP10C = BIT(3),
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MSM_VIDC_FMT_P010 = BIT(4),
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MSM_VIDC_FMT_RGBA8888C = BIT(5),
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MSM_VIDC_FMT_RGBA8888 = BIT(6),
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MSM_VIDC_FMT_META = BIT(31),
|
|
};
|
|
|
|
enum msm_vidc_buffer_type FOREACH_BUF_TYPE(GENERATE_MSM_VIDC_BUF_ENUM);
|
|
|
|
/* always match with v4l2 flags V4L2_BUF_FLAG_* */
|
|
enum msm_vidc_buffer_flags {
|
|
MSM_VIDC_BUF_FLAG_KEYFRAME = 0x00000008,
|
|
MSM_VIDC_BUF_FLAG_PFRAME = 0x00000010,
|
|
MSM_VIDC_BUF_FLAG_BFRAME = 0x00000020,
|
|
MSM_VIDC_BUF_FLAG_ERROR = 0x00000040,
|
|
MSM_VIDC_BUF_FLAG_LAST = 0x00100000,
|
|
/* codec config is a vendor specific flag */
|
|
MSM_VIDC_BUF_FLAG_CODECCONFIG = 0x01000000,
|
|
/* sub frame is a vendor specific flag */
|
|
MSM_VIDC_BUF_FLAG_SUBFRAME = 0x02000000,
|
|
};
|
|
|
|
enum msm_vidc_buffer_attributes {
|
|
MSM_VIDC_ATTR_DEFERRED = BIT(0),
|
|
MSM_VIDC_ATTR_READ_ONLY = BIT(1),
|
|
MSM_VIDC_ATTR_PENDING_RELEASE = BIT(2),
|
|
MSM_VIDC_ATTR_QUEUED = BIT(3),
|
|
MSM_VIDC_ATTR_DEQUEUED = BIT(4),
|
|
MSM_VIDC_ATTR_BUFFER_DONE = BIT(5),
|
|
};
|
|
|
|
enum msm_vidc_buffer_region {
|
|
MSM_VIDC_REGION_NONE = 0,
|
|
MSM_VIDC_NON_SECURE,
|
|
MSM_VIDC_NON_SECURE_PIXEL,
|
|
MSM_VIDC_SECURE_PIXEL,
|
|
MSM_VIDC_SECURE_NONPIXEL,
|
|
MSM_VIDC_SECURE_BITSTREAM,
|
|
MSM_VIDC_REGION_MAX,
|
|
};
|
|
|
|
enum msm_vidc_device_region {
|
|
MSM_VIDC_DEVICE_REGION_NONE = 0,
|
|
MSM_VIDC_AON_REGISTERS,
|
|
MSM_VIDC_DEVICE_REGION_MAX,
|
|
};
|
|
|
|
enum msm_vidc_port_type {
|
|
INPUT_PORT = 0,
|
|
OUTPUT_PORT,
|
|
INPUT_META_PORT,
|
|
OUTPUT_META_PORT,
|
|
PORT_NONE,
|
|
MAX_PORT,
|
|
};
|
|
|
|
enum msm_vidc_stage_type {
|
|
MSM_VIDC_STAGE_NONE = 0,
|
|
MSM_VIDC_STAGE_1 = 1,
|
|
MSM_VIDC_STAGE_2 = 2,
|
|
};
|
|
|
|
enum msm_vidc_pipe_type {
|
|
MSM_VIDC_PIPE_NONE = 0,
|
|
MSM_VIDC_PIPE_1 = 1,
|
|
MSM_VIDC_PIPE_2 = 2,
|
|
MSM_VIDC_PIPE_4 = 4,
|
|
};
|
|
|
|
enum msm_vidc_quality_mode {
|
|
MSM_VIDC_MAX_QUALITY_MODE = 0x1,
|
|
MSM_VIDC_POWER_SAVE_MODE = 0x2,
|
|
};
|
|
|
|
enum msm_vidc_color_primaries {
|
|
MSM_VIDC_PRIMARIES_RESERVED = 0,
|
|
MSM_VIDC_PRIMARIES_BT709 = 1,
|
|
MSM_VIDC_PRIMARIES_UNSPECIFIED = 2,
|
|
MSM_VIDC_PRIMARIES_BT470_SYSTEM_M = 4,
|
|
MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG = 5,
|
|
MSM_VIDC_PRIMARIES_BT601_525 = 6,
|
|
MSM_VIDC_PRIMARIES_SMPTE_ST240M = 7,
|
|
MSM_VIDC_PRIMARIES_GENERIC_FILM = 8,
|
|
MSM_VIDC_PRIMARIES_BT2020 = 9,
|
|
MSM_VIDC_PRIMARIES_SMPTE_ST428_1 = 10,
|
|
MSM_VIDC_PRIMARIES_SMPTE_RP431_2 = 11,
|
|
MSM_VIDC_PRIMARIES_SMPTE_EG431_1 = 12,
|
|
MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH = 22,
|
|
};
|
|
|
|
enum msm_vidc_transfer_characteristics {
|
|
MSM_VIDC_TRANSFER_RESERVED = 0,
|
|
MSM_VIDC_TRANSFER_BT709 = 1,
|
|
MSM_VIDC_TRANSFER_UNSPECIFIED = 2,
|
|
MSM_VIDC_TRANSFER_BT470_SYSTEM_M = 4,
|
|
MSM_VIDC_TRANSFER_BT470_SYSTEM_BG = 5,
|
|
MSM_VIDC_TRANSFER_BT601_525_OR_625 = 6,
|
|
MSM_VIDC_TRANSFER_SMPTE_ST240M = 7,
|
|
MSM_VIDC_TRANSFER_LINEAR = 8,
|
|
MSM_VIDC_TRANSFER_LOG_100_1 = 9,
|
|
MSM_VIDC_TRANSFER_LOG_SQRT = 10,
|
|
MSM_VIDC_TRANSFER_XVYCC = 11,
|
|
MSM_VIDC_TRANSFER_BT1361_0 = 12,
|
|
MSM_VIDC_TRANSFER_SRGB_SYCC = 13,
|
|
MSM_VIDC_TRANSFER_BT2020_14 = 14,
|
|
MSM_VIDC_TRANSFER_BT2020_15 = 15,
|
|
MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ = 16,
|
|
MSM_VIDC_TRANSFER_SMPTE_ST428_1 = 17,
|
|
MSM_VIDC_TRANSFER_BT2100_2_HLG = 18,
|
|
};
|
|
|
|
enum msm_vidc_matrix_coefficients {
|
|
MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1 = 0,
|
|
MSM_VIDC_MATRIX_COEFF_BT709 = 1,
|
|
MSM_VIDC_MATRIX_COEFF_UNSPECIFIED = 2,
|
|
MSM_VIDC_MATRIX_COEFF_RESERVED = 3,
|
|
MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47 = 4,
|
|
MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625 = 5,
|
|
MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625 = 6,
|
|
MSM_VIDC_MATRIX_COEFF_SMPTE_ST240 = 7,
|
|
MSM_VIDC_MATRIX_COEFF_YCGCO = 8,
|
|
MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT = 9,
|
|
MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT = 10,
|
|
MSM_VIDC_MATRIX_COEFF_SMPTE_ST2085 = 11,
|
|
MSM_VIDC_MATRIX_COEFF_SMPTE_CHROM_DERV_NON_CONSTANT = 12,
|
|
MSM_VIDC_MATRIX_COEFF_SMPTE_CHROM_DERV_CONSTANT = 13,
|
|
MSM_VIDC_MATRIX_COEFF_BT2100 = 14,
|
|
};
|
|
|
|
enum msm_vidc_preprocess_type {
|
|
MSM_VIDC_PREPROCESS_NONE = BIT(0),
|
|
MSM_VIDC_PREPROCESS_TYPE0 = BIT(1),
|
|
};
|
|
|
|
enum msm_vidc_core_capability_type {
|
|
CORE_CAP_NONE = 0,
|
|
ENC_CODECS,
|
|
DEC_CODECS,
|
|
MAX_SESSION_COUNT,
|
|
MAX_NUM_720P_SESSIONS,
|
|
MAX_NUM_1080P_SESSIONS,
|
|
MAX_NUM_4K_SESSIONS,
|
|
MAX_NUM_8K_SESSIONS,
|
|
MAX_SECURE_SESSION_COUNT,
|
|
MAX_LOAD,
|
|
MAX_RT_MBPF,
|
|
MAX_MBPF,
|
|
MAX_MBPS,
|
|
MAX_IMAGE_MBPF,
|
|
MAX_MBPF_HQ,
|
|
MAX_MBPS_HQ,
|
|
MAX_MBPF_B_FRAME,
|
|
MAX_MBPS_B_FRAME,
|
|
MAX_MBPS_ALL_INTRA,
|
|
MAX_ENH_LAYER_COUNT,
|
|
NUM_VPP_PIPE,
|
|
SW_PC,
|
|
SW_PC_DELAY,
|
|
FW_UNLOAD,
|
|
FW_UNLOAD_DELAY,
|
|
HW_RESPONSE_TIMEOUT,
|
|
PREFIX_BUF_COUNT_PIX,
|
|
PREFIX_BUF_SIZE_PIX,
|
|
PREFIX_BUF_COUNT_NON_PIX,
|
|
PREFIX_BUF_SIZE_NON_PIX,
|
|
PAGEFAULT_NON_FATAL,
|
|
PAGETABLE_CACHING,
|
|
DCVS,
|
|
DECODE_BATCH,
|
|
DECODE_BATCH_TIMEOUT,
|
|
STATS_TIMEOUT_MS,
|
|
AV_SYNC_WINDOW_SIZE,
|
|
CLK_FREQ_THRESHOLD,
|
|
NON_FATAL_FAULTS,
|
|
ENC_AUTO_FRAMERATE,
|
|
DEVICE_CAPS,
|
|
SUPPORTS_REQUESTS,
|
|
CORE_CAP_MAX,
|
|
};
|
|
|
|
enum msm_vidc_inst_capability_type FOREACH_CAP(GENERATE_ENUM);
|
|
|
|
enum msm_vidc_inst_capability_flags {
|
|
CAP_FLAG_NONE = 0,
|
|
CAP_FLAG_DYNAMIC_ALLOWED = BIT(0),
|
|
CAP_FLAG_MENU = BIT(1),
|
|
CAP_FLAG_INPUT_PORT = BIT(2),
|
|
CAP_FLAG_OUTPUT_PORT = BIT(3),
|
|
CAP_FLAG_CLIENT_SET = BIT(4),
|
|
CAP_FLAG_BITMASK = BIT(5),
|
|
CAP_FLAG_VOLATILE = BIT(6),
|
|
CAP_FLAG_META = BIT(7),
|
|
};
|
|
|
|
struct msm_vidc_inst_cap {
|
|
enum msm_vidc_inst_capability_type cap_id;
|
|
s32 min;
|
|
s32 max;
|
|
u32 step_or_mask;
|
|
s32 value;
|
|
u32 v4l2_id;
|
|
u32 hfi_id;
|
|
enum msm_vidc_inst_capability_flags flags;
|
|
enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN];
|
|
int (*adjust)(void *inst,
|
|
struct v4l2_ctrl *ctrl);
|
|
int (*set)(void *inst,
|
|
enum msm_vidc_inst_capability_type cap_id);
|
|
};
|
|
|
|
struct msm_vidc_inst_capability {
|
|
enum msm_vidc_domain_type domain;
|
|
enum msm_vidc_codec_type codec;
|
|
struct msm_vidc_inst_cap cap[INST_CAP_MAX+1];
|
|
};
|
|
|
|
struct msm_vidc_core_capability {
|
|
enum msm_vidc_core_capability_type type;
|
|
u32 value;
|
|
};
|
|
|
|
struct msm_vidc_inst_cap_entry {
|
|
/* list of struct msm_vidc_inst_cap_entry */
|
|
struct list_head list;
|
|
enum msm_vidc_inst_capability_type cap_id;
|
|
};
|
|
|
|
struct msm_vidc_event_data {
|
|
union {
|
|
bool bval;
|
|
u32 uval;
|
|
u64 uval64;
|
|
s32 val;
|
|
s64 val64;
|
|
void *ptr;
|
|
} edata;
|
|
};
|
|
|
|
struct debug_buf_count {
|
|
u64 etb;
|
|
u64 ftb;
|
|
u64 fbd;
|
|
u64 ebd;
|
|
};
|
|
|
|
struct msm_vidc_statistics {
|
|
struct debug_buf_count count;
|
|
u64 data_size;
|
|
u64 time_ms;
|
|
};
|
|
|
|
enum efuse_purpose {
|
|
SKU_VERSION = 0,
|
|
};
|
|
|
|
enum sku_version {
|
|
SKU_VERSION_0 = 0,
|
|
SKU_VERSION_1,
|
|
SKU_VERSION_2,
|
|
};
|
|
|
|
enum msm_vidc_ssr_trigger_type {
|
|
SSR_ERR_FATAL = 1,
|
|
SSR_SW_DIV_BY_ZERO,
|
|
SSR_HW_WDOG_IRQ,
|
|
};
|
|
|
|
enum msm_vidc_stability_trigger_type {
|
|
STABILITY_VCODEC_HUNG = 1,
|
|
STABILITY_ENC_BUFFER_FULL,
|
|
};
|
|
|
|
enum msm_vidc_cache_op {
|
|
MSM_VIDC_CACHE_CLEAN,
|
|
MSM_VIDC_CACHE_INVALIDATE,
|
|
MSM_VIDC_CACHE_CLEAN_INVALIDATE,
|
|
};
|
|
|
|
enum msm_vidc_dcvs_flags {
|
|
MSM_VIDC_DCVS_INCR = BIT(0),
|
|
MSM_VIDC_DCVS_DECR = BIT(1),
|
|
};
|
|
|
|
enum msm_vidc_clock_properties {
|
|
CLOCK_PROP_HAS_SCALING = BIT(0),
|
|
CLOCK_PROP_HAS_MEM_RETENTION = BIT(1),
|
|
};
|
|
|
|
enum profiling_points {
|
|
FRAME_PROCESSING = 0,
|
|
MAX_PROFILING_POINTS,
|
|
};
|
|
|
|
enum signal_session_response {
|
|
SIGNAL_CMD_STOP_INPUT = 0,
|
|
SIGNAL_CMD_STOP_OUTPUT,
|
|
SIGNAL_CMD_CLOSE,
|
|
MAX_SIGNAL,
|
|
};
|
|
|
|
struct profile_data {
|
|
u64 start;
|
|
u64 stop;
|
|
u64 cumulative;
|
|
char name[64];
|
|
u32 sampling;
|
|
u64 average;
|
|
};
|
|
|
|
struct msm_vidc_debug {
|
|
struct profile_data pdata[MAX_PROFILING_POINTS];
|
|
u32 profile;
|
|
u32 samples;
|
|
};
|
|
|
|
struct msm_vidc_input_cr_data {
|
|
struct list_head list;
|
|
u32 index;
|
|
u32 input_cr;
|
|
};
|
|
|
|
struct msm_vidc_session_idle {
|
|
bool idle;
|
|
u64 last_activity_time_ns;
|
|
};
|
|
|
|
struct msm_vidc_color_info {
|
|
u32 colorspace;
|
|
u32 ycbcr_enc;
|
|
u32 xfer_func;
|
|
u32 quantization;
|
|
};
|
|
|
|
struct msm_vidc_rectangle {
|
|
u32 left;
|
|
u32 top;
|
|
u32 width;
|
|
u32 height;
|
|
};
|
|
|
|
struct msm_vidc_subscription_params {
|
|
u32 bitstream_resolution;
|
|
u32 crop_offsets[2];
|
|
u32 bit_depth;
|
|
u32 coded_frames;
|
|
u32 fw_min_count;
|
|
u32 pic_order_cnt;
|
|
u32 color_info;
|
|
u32 profile;
|
|
u32 level;
|
|
u32 tier;
|
|
u32 av1_film_grain_present;
|
|
u32 av1_super_block_enabled;
|
|
};
|
|
|
|
struct msm_vidc_hfi_frame_info {
|
|
u32 picture_type;
|
|
u32 no_output;
|
|
u32 subframe_input;
|
|
u32 cr;
|
|
u32 cf;
|
|
u32 data_corrupt;
|
|
u32 overflow;
|
|
u32 fence_id;
|
|
};
|
|
|
|
struct msm_vidc_decode_vpp_delay {
|
|
bool enable;
|
|
u32 size;
|
|
};
|
|
|
|
struct msm_vidc_decode_batch {
|
|
bool enable;
|
|
u32 size;
|
|
struct delayed_work work;
|
|
};
|
|
|
|
enum msm_vidc_power_mode {
|
|
VIDC_POWER_NORMAL = 0,
|
|
VIDC_POWER_LOW,
|
|
VIDC_POWER_TURBO,
|
|
};
|
|
|
|
struct vidc_bus_vote_data {
|
|
enum msm_vidc_domain_type domain;
|
|
enum msm_vidc_codec_type codec;
|
|
enum msm_vidc_power_mode power_mode;
|
|
u32 color_formats[2];
|
|
int num_formats; /* 1 = DPB-OPB unified; 2 = split */
|
|
int input_height, input_width, bitrate;
|
|
int output_height, output_width;
|
|
int rotation;
|
|
int compression_ratio;
|
|
int complexity_factor;
|
|
int input_cr;
|
|
u32 lcu_size;
|
|
u32 fps;
|
|
u32 work_mode;
|
|
bool use_sys_cache;
|
|
bool b_frames_enabled;
|
|
u64 calc_bw_ddr;
|
|
u64 calc_bw_llcc;
|
|
u32 num_vpp_pipes;
|
|
bool vpss_preprocessing_enabled;
|
|
};
|
|
|
|
struct msm_vidc_power {
|
|
enum msm_vidc_power_mode power_mode;
|
|
u32 buffer_counter;
|
|
u32 min_threshold;
|
|
u32 nom_threshold;
|
|
u32 max_threshold;
|
|
bool dcvs_mode;
|
|
u32 dcvs_window;
|
|
u64 min_freq;
|
|
u64 curr_freq;
|
|
u32 ddr_bw;
|
|
u32 sys_cache_bw;
|
|
u32 dcvs_flags;
|
|
u32 fw_cr;
|
|
u32 fw_cf;
|
|
};
|
|
|
|
struct msm_vidc_fence_context {
|
|
char name[MAX_NAME_LENGTH];
|
|
u64 ctx_num;
|
|
u64 seq_num;
|
|
};
|
|
|
|
struct msm_vidc_fence {
|
|
struct list_head list;
|
|
struct dma_fence dma_fence;
|
|
char name[MAX_NAME_LENGTH];
|
|
spinlock_t lock;
|
|
struct sync_file *sync_file;
|
|
int fd;
|
|
};
|
|
|
|
struct msm_vidc_mem {
|
|
struct list_head list;
|
|
enum msm_vidc_buffer_type type;
|
|
enum msm_vidc_buffer_region region;
|
|
u32 size;
|
|
u8 secure:1;
|
|
u8 map_kernel:1;
|
|
struct dma_buf *dmabuf;
|
|
/*
|
|
* Kalama uses Kernel Version 5.15.x,
|
|
* Pineapple uses Kernel version 5.18.x
|
|
*/
|
|
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0))
|
|
struct iosys_map dmabuf_map;
|
|
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0))
|
|
struct dma_buf_map dmabuf_map;
|
|
#endif
|
|
void *kvaddr;
|
|
dma_addr_t device_addr;
|
|
unsigned long attrs;
|
|
u32 refcount;
|
|
struct sg_table *table;
|
|
struct dma_buf_attachment *attach;
|
|
phys_addr_t phys_addr;
|
|
};
|
|
|
|
struct msm_vidc_mem_list {
|
|
struct list_head list; // list of "struct msm_vidc_mem"
|
|
};
|
|
|
|
struct msm_vidc_buffer {
|
|
struct list_head list;
|
|
struct msm_vidc_inst *inst;
|
|
enum msm_vidc_buffer_type type;
|
|
u32 index;
|
|
int fd;
|
|
u32 buffer_size;
|
|
u32 data_offset;
|
|
u32 data_size;
|
|
u64 device_addr;
|
|
u32 flags;
|
|
u64 timestamp;
|
|
enum msm_vidc_buffer_attributes attr;
|
|
void *dmabuf;
|
|
struct sg_table *sg_table;
|
|
struct dma_buf_attachment *attach;
|
|
u32 dbuf_get:1;
|
|
u64 fence_id;
|
|
u32 start_time_ms;
|
|
u32 end_time_ms;
|
|
};
|
|
|
|
struct msm_vidc_buffers {
|
|
struct list_head list; // list of "struct msm_vidc_buffer"
|
|
u32 min_count;
|
|
u32 extra_count;
|
|
u32 actual_count;
|
|
u32 size;
|
|
bool reuse;
|
|
};
|
|
|
|
struct msm_vidc_buffer_stats {
|
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struct list_head list;
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u32 frame_num;
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|
u64 timestamp;
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|
u32 etb_time_ms;
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|
u32 ebd_time_ms;
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|
u32 ftb_time_ms;
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|
u32 fbd_time_ms;
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|
u32 data_size;
|
|
u32 flags;
|
|
u32 ts_offset;
|
|
};
|
|
|
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enum msm_vidc_buffer_stats_flag {
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|
MSM_VIDC_STATS_FLAG_CORRUPT = BIT(0),
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|
MSM_VIDC_STATS_FLAG_OVERFLOW = BIT(1),
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|
MSM_VIDC_STATS_FLAG_NO_OUTPUT = BIT(2),
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|
MSM_VIDC_STATS_FLAG_SUBFRAME_INPUT = BIT(3),
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|
};
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|
|
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struct msm_vidc_sort {
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|
struct list_head list;
|
|
s64 val;
|
|
};
|
|
|
|
struct msm_vidc_timestamp {
|
|
struct msm_vidc_sort sort;
|
|
u64 rank;
|
|
};
|
|
|
|
struct msm_vidc_timestamps {
|
|
struct list_head list;
|
|
u32 count;
|
|
u64 rank;
|
|
};
|
|
|
|
struct msm_vidc_input_timer {
|
|
struct list_head list;
|
|
u64 time_us;
|
|
};
|
|
|
|
enum msm_vidc_allow FOREACH_ALLOW(GENERATE_ENUM);
|
|
|
|
struct msm_vidc_ssr {
|
|
enum msm_vidc_ssr_trigger_type ssr_type;
|
|
u32 sub_client_id;
|
|
u32 test_addr;
|
|
};
|
|
|
|
struct msm_vidc_stability {
|
|
enum msm_vidc_stability_trigger_type stability_type;
|
|
u32 sub_client_id;
|
|
u32 value;
|
|
};
|
|
|
|
struct msm_vidc_sfr {
|
|
u32 bufSize;
|
|
u8 rg_data[1];
|
|
};
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|
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#endif // _MSM_VIDC_INTERNAL_H_
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