htt_stats.h 454 KB

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  1. /*
  2. * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /**
  20. * @file htt_stats.h
  21. *
  22. * @details the public header file of HTT STATS
  23. */
  24. #ifndef __HTT_STATS_H__
  25. #define __HTT_STATS_H__
  26. #include <htt_deps.h> /* A_UINT32 */
  27. #include <htt_common.h>
  28. #include <htt.h> /* HTT stats TLV struct def and tag defs */
  29. /* HTT_STATS_VAR_LEN_ARRAY1:
  30. * This macro is for converting the definition of existing variable-length
  31. * arrays within TLV structs of the form "type name[1];" to use the form
  32. * "type name[];" while ensuring that the length of the TLV struct is
  33. * unmodified by the conversion.
  34. * In general, any new variable-length structs should simply use
  35. * "type name[];" directly, rather than using HTT_STATS_VAR_LEN_ARRAY1.
  36. * However, if there's a legitimate reason to make the new variable-length
  37. * struct appear to not have a variable length, HTT_STATS_VAR_LEN_ARRAY1
  38. * can be used for this purpose.
  39. */
  40. #if defined(ATH_TARGET) || defined(__WINDOWS__)
  41. #define HTT_STATS_VAR_LEN_ARRAY1(type, name) type name[1]
  42. #else
  43. /*
  44. * Certain build settings of the Linux kernel don't allow zero-element
  45. * arrays, and C++ doesn't allow zero-length empty structs.
  46. * Confirm that there's no build that combines kernel with C++.
  47. */
  48. #ifdef __cplusplus
  49. #error unsupported combination of kernel and C plus plus
  50. #endif
  51. #define HTT_STATS_DUMMY_ZERO_LEN_FIELD struct {} dummy_zero_len_field
  52. #define HTT_STATS_VAR_LEN_ARRAY1(type, name) \
  53. union { \
  54. type name ## __first_elem; \
  55. struct { \
  56. HTT_STATS_DUMMY_ZERO_LEN_FIELD; \
  57. type name[]; \
  58. }; \
  59. }
  60. #endif
  61. /**
  62. * htt_dbg_ext_stats_type -
  63. * The base structure for each of the stats_type is only for reference
  64. * Host should use this information to know the type of TLVs to expect
  65. * for a particular stats type.
  66. *
  67. * Max supported stats :- 256.
  68. */
  69. enum htt_dbg_ext_stats_type {
  70. /** HTT_DBG_EXT_STATS_RESET
  71. * PARAM:
  72. * - config_param0 : start_offset (stats type)
  73. * - config_param1 : stats bmask from start offset
  74. * - config_param2 : stats bmask from start offset + 32
  75. * - config_param3 : stats bmask from start offset + 64
  76. * RESP MSG:
  77. * - No response sent.
  78. */
  79. HTT_DBG_EXT_STATS_RESET = 0,
  80. /** HTT_DBG_EXT_STATS_PDEV_TX
  81. * PARAMS:
  82. * - No Params
  83. * RESP MSG:
  84. * - htt_tx_pdev_stats_t
  85. */
  86. HTT_DBG_EXT_STATS_PDEV_TX = 1,
  87. /** HTT_DBG_EXT_STATS_PDEV_RX
  88. * PARAMS:
  89. * - No Params
  90. * RESP MSG:
  91. * - htt_rx_pdev_stats_t
  92. */
  93. HTT_DBG_EXT_STATS_PDEV_RX = 2,
  94. /** HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  95. * PARAMS:
  96. * - config_param0: [Bit31: Bit0] HWQ mask
  97. * RESP MSG:
  98. * - htt_tx_hwq_stats_t
  99. */
  100. HTT_DBG_EXT_STATS_PDEV_TX_HWQ = 3,
  101. /** HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  102. * PARAMS:
  103. * - config_param0: [Bit31: Bit0] TXQ mask
  104. * RESP MSG:
  105. * - htt_stats_tx_sched_t
  106. */
  107. HTT_DBG_EXT_STATS_PDEV_TX_SCHED = 4,
  108. /** HTT_DBG_EXT_STATS_PDEV_ERROR
  109. * PARAMS:
  110. * - No Params
  111. * RESP MSG:
  112. * - htt_hw_err_stats_t
  113. */
  114. HTT_DBG_EXT_STATS_PDEV_ERROR = 5,
  115. /** HTT_DBG_EXT_STATS_PDEV_TQM
  116. * PARAMS:
  117. * - No Params
  118. * RESP MSG:
  119. * - htt_tx_tqm_pdev_stats_t
  120. */
  121. HTT_DBG_EXT_STATS_PDEV_TQM = 6,
  122. /** HTT_DBG_EXT_STATS_TQM_CMDQ
  123. * PARAMS:
  124. * - config_param0:
  125. * [Bit15: Bit0 ] cmdq id :if 0xFFFF print all cmdq's
  126. * [Bit31: Bit16] reserved
  127. * RESP MSG:
  128. * - htt_tx_tqm_cmdq_stats_t
  129. */
  130. HTT_DBG_EXT_STATS_TQM_CMDQ = 7,
  131. /** HTT_DBG_EXT_STATS_TX_DE_INFO
  132. * PARAMS:
  133. * - No Params
  134. * RESP MSG:
  135. * - htt_tx_de_stats_t
  136. */
  137. HTT_DBG_EXT_STATS_TX_DE_INFO = 8,
  138. /** HTT_DBG_EXT_STATS_PDEV_TX_RATE
  139. * PARAMS:
  140. * - No Params
  141. * RESP MSG:
  142. * - htt_tx_pdev_rate_stats_t
  143. */
  144. HTT_DBG_EXT_STATS_PDEV_TX_RATE = 9,
  145. /** HTT_DBG_EXT_STATS_PDEV_RX_RATE
  146. * PARAMS:
  147. * - No Params
  148. * RESP MSG:
  149. * - htt_rx_pdev_rate_stats_t
  150. */
  151. HTT_DBG_EXT_STATS_PDEV_RX_RATE = 10,
  152. /** HTT_DBG_EXT_STATS_PEER_INFO
  153. * PARAMS:
  154. * - config_param0:
  155. * [Bit0] - [0] for sw_peer_id, [1] for mac_addr based request
  156. * [Bit15 : Bit 1] htt_peer_stats_req_mode_t
  157. * [Bit31 : Bit16] sw_peer_id
  158. * config_param1:
  159. * peer_stats_req_type_mask:32 (enum htt_peer_stats_tlv_enum)
  160. * 0 bit htt_peer_stats_cmn_tlv
  161. * 1 bit htt_peer_details_tlv
  162. * 2 bit htt_tx_peer_rate_stats_tlv
  163. * 3 bit htt_rx_peer_rate_stats_tlv
  164. * 4 bit htt_tx_tid_stats_tlv/htt_tx_tid_stats_v1_tlv
  165. * 5 bit htt_rx_tid_stats_tlv
  166. * 6 bit htt_msdu_flow_stats_tlv
  167. * 7 bit htt_peer_sched_stats_tlv
  168. * 8 bit htt_peer_ax_ofdma_stats_tlv
  169. * 9 bit htt_peer_be_ofdma_stats_tlv
  170. * - config_param2: [Bit31 : Bit0] mac_addr31to0
  171. * - config_param3: [Bit15 : Bit0] mac_addr47to32
  172. * [Bit 16] If this bit is set, reset per peer stats
  173. * of corresponding tlv indicated by config
  174. * param 1.
  175. * HTT_DBG_EXT_PEER_STATS_RESET_GET will be
  176. * used to get this bit position.
  177. * WMI_SERVICE_PER_PEER_HTT_STATS_RESET
  178. * indicates that FW supports per peer HTT
  179. * stats reset.
  180. * [Bit31 : Bit17] reserved
  181. * RESP MSG:
  182. * - htt_peer_stats_t
  183. */
  184. HTT_DBG_EXT_STATS_PEER_INFO = 11,
  185. /** HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  186. * PARAMS:
  187. * - No Params
  188. * RESP MSG:
  189. * - htt_tx_pdev_selfgen_stats_t
  190. */
  191. HTT_DBG_EXT_STATS_TX_SELFGEN_INFO = 12,
  192. /** HTT_DBG_EXT_STATS_TX_MU_HWQ
  193. * PARAMS:
  194. * - config_param0: [Bit31: Bit0] HWQ mask
  195. * RESP MSG:
  196. * - htt_tx_hwq_mu_mimo_stats_t
  197. */
  198. HTT_DBG_EXT_STATS_TX_MU_HWQ = 13,
  199. /** HTT_DBG_EXT_STATS_RING_IF_INFO
  200. * PARAMS:
  201. * - config_param0:
  202. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  203. * [Bit31: Bit16] reserved
  204. * RESP MSG:
  205. * - htt_ring_if_stats_t
  206. */
  207. HTT_DBG_EXT_STATS_RING_IF_INFO = 14,
  208. /** HTT_DBG_EXT_STATS_SRNG_INFO
  209. * PARAMS:
  210. * - config_param0:
  211. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  212. * [Bit31: Bit16] reserved
  213. * - No Params
  214. * RESP MSG:
  215. * - htt_sring_stats_t
  216. */
  217. HTT_DBG_EXT_STATS_SRNG_INFO = 15,
  218. /** HTT_DBG_EXT_STATS_SFM_INFO
  219. * PARAMS:
  220. * - No Params
  221. * RESP MSG:
  222. * - htt_sfm_stats_t
  223. */
  224. HTT_DBG_EXT_STATS_SFM_INFO = 16,
  225. /** HTT_DBG_EXT_STATS_PDEV_TX_MU
  226. * PARAMS:
  227. * - No Params
  228. * RESP MSG:
  229. * - htt_tx_pdev_mu_mimo_stats_t
  230. */
  231. HTT_DBG_EXT_STATS_PDEV_TX_MU = 17,
  232. /** HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  233. * PARAMS:
  234. * - config_param0:
  235. * [Bit7 : Bit0] vdev_id:8
  236. * note:0xFF to get all active peers based on pdev_mask.
  237. * [Bit31 : Bit8] rsvd:24
  238. * RESP MSG:
  239. * - htt_active_peer_details_list_t
  240. */
  241. HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST = 18,
  242. /** HTT_DBG_EXT_STATS_PDEV_CCA_STATS
  243. * PARAMS:
  244. * - config_param0:
  245. * [Bit0] - Clear bit0 to read 1sec,100ms & cumulative CCA stats.
  246. * Set bit0 to 1 to read 1sec interval histogram.
  247. * [Bit1] - 100ms interval histogram
  248. * [Bit3] - Cumulative CCA stats
  249. * RESP MSG:
  250. * - htt_pdev_cca_stats_t
  251. */
  252. HTT_DBG_EXT_STATS_PDEV_CCA_STATS = 19,
  253. /** HTT_DBG_EXT_STATS_TWT_SESSIONS
  254. * PARAMS:
  255. * - config_param0:
  256. * No params
  257. * RESP MSG:
  258. * - htt_pdev_twt_sessions_stats_t
  259. */
  260. HTT_DBG_EXT_STATS_TWT_SESSIONS = 20,
  261. /** HTT_DBG_EXT_STATS_REO_CNTS
  262. * PARAMS:
  263. * - config_param0:
  264. * No params
  265. * RESP MSG:
  266. * - htt_soc_reo_resource_stats_t
  267. */
  268. HTT_DBG_EXT_STATS_REO_RESOURCE_STATS = 21,
  269. /** HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  270. * PARAMS:
  271. * - config_param0:
  272. * [Bit0] vdev_id_set:1
  273. * set to 1 if vdev_id is set and vdev stats are requested.
  274. * set to 0 if pdev_stats sounding stats are requested.
  275. * [Bit8 : Bit1] vdev_id:8
  276. * note:0xFF to get all active vdevs based on pdev_mask.
  277. * [Bit31 : Bit9] rsvd:22
  278. *
  279. * RESP MSG:
  280. * - htt_tx_sounding_stats_t
  281. */
  282. HTT_DBG_EXT_STATS_TX_SOUNDING_INFO = 22,
  283. /** HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS
  284. * PARAMS:
  285. * - config_param0:
  286. * No params
  287. * RESP MSG:
  288. * - htt_pdev_obss_pd_stats_t
  289. */
  290. HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
  291. /** HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS
  292. * PARAMS:
  293. * - config_param0:
  294. * No params
  295. * RESP MSG:
  296. * - htt_stats_ring_backpressure_stats_t
  297. */
  298. HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS = 24,
  299. /** HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  300. * PARAMS:
  301. *
  302. * RESP MSG:
  303. * - htt_latency_prof_stats_tlv showing latency profile stats for
  304. * high-level (pdev or vdev level) events such as tx/rx suspend
  305. * or resume, or UMAC, DMAC, or PMAC reset.
  306. */
  307. HTT_DBG_EXT_STATS_LATENCY_PROF_STATS = 25,
  308. /** HTT_DBG_EXT_STATS_PDEV_UL_TRIGGER
  309. * PARAMS:
  310. * - No Params
  311. * RESP MSG:
  312. * - htt_rx_pdev_ul_trig_stats_t
  313. */
  314. HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS = 26,
  315. /** HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS = 27
  316. * PARAMS:
  317. * - No Params
  318. * RESP MSG:
  319. * - htt_rx_pdev_ul_mumimo_trig_stats_t
  320. */
  321. HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS = 27,
  322. /** HTT_DBG_EXT_STATS_FSE_RX
  323. * PARAMS:
  324. * - No Params
  325. * RESP MSG:
  326. * - htt_rx_fse_stats_t
  327. */
  328. HTT_DBG_EXT_STATS_FSE_RX = 28,
  329. /** HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS
  330. * PARAMS:
  331. * - config_param0: [Bit0] : [1] for mac_addr based request
  332. * - config_param1: [Bit31 : Bit0] mac_addr31to0
  333. * - config_param2: [Bit15 : Bit0] mac_addr47to32
  334. * RESP MSG:
  335. * - htt_ctrl_path_txrx_stats_t
  336. */
  337. HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS = 29,
  338. /** HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT
  339. * PARAMS:
  340. * - No Params
  341. * RESP MSG:
  342. * - htt_rx_pdev_rate_ext_stats_t
  343. */
  344. HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT = 30,
  345. /** HTT_DBG_EXT_STATS_PDEV_TX_RATE_TXBF
  346. * PARAMS:
  347. * - No Params
  348. * RESP MSG:
  349. * - htt_tx_pdev_txbf_rate_stats_t
  350. */
  351. HTT_DBG_EXT_STATS_PDEV_TX_RATE_TXBF = 31,
  352. /** HTT_DBG_EXT_STATS_TXBF_OFDMA
  353. */
  354. HTT_DBG_EXT_STATS_TXBF_OFDMA = 32,
  355. /** HTT_DBG_EXT_STA_11AX_UL_STATS
  356. * PARAMS:
  357. * - No Params
  358. * RESP MSG:
  359. * - htt_sta_11ax_ul_stats
  360. */
  361. HTT_DBG_EXT_STA_11AX_UL_STATS = 33,
  362. /** HTT_DBG_EXT_VDEV_RTT_RESP_STATS
  363. * PARAMS:
  364. * - config_param0:
  365. * [Bit7 : Bit0] vdev_id:8
  366. * [Bit31 : Bit8] rsvd:24
  367. * RESP MSG:
  368. * -
  369. */
  370. HTT_DBG_EXT_VDEV_RTT_RESP_STATS = 34,
  371. /** HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS
  372. * PARAMS:
  373. * - No Params
  374. * RESP MSG:
  375. * - htt_pktlog_and_htt_ring_stats_t
  376. */
  377. HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS = 35,
  378. /** HTT_DBG_EXT_STATS_DLPAGER_STATS
  379. * PARAMS:
  380. *
  381. * RESP MSG:
  382. * - htt_dlpager_stats_t
  383. */
  384. HTT_DBG_EXT_STATS_DLPAGER_STATS = 36,
  385. /** HTT_DBG_EXT_PHY_COUNTERS_AND_PHY_STATS
  386. * PARAMS:
  387. * - No Params
  388. * RESP MSG:
  389. * - htt_phy_counters_and_phy_stats_t
  390. */
  391. HTT_DBG_EXT_PHY_COUNTERS_AND_PHY_STATS = 37,
  392. /** HTT_DBG_EXT_VDEVS_TXRX_STATS
  393. * PARAMS:
  394. * - No Params
  395. * RESP MSG:
  396. * - htt_vdevs_txrx_stats_t
  397. */
  398. HTT_DBG_EXT_VDEVS_TXRX_STATS = 38,
  399. HTT_DBG_EXT_VDEV_RTT_INITIATOR_STATS = 39,
  400. /** HTT_DBG_EXT_PDEV_PER_STATS
  401. * PARAMS:
  402. * - No Params
  403. * RESP MSG:
  404. * - htt_tx_pdev_per_stats_t
  405. */
  406. HTT_DBG_EXT_PDEV_PER_STATS = 40,
  407. HTT_DBG_EXT_AST_ENTRIES = 41,
  408. /** HTT_DBG_EXT_RX_RING_STATS
  409. * PARAMS:
  410. * - No Params
  411. * RESP MSG:
  412. * - htt_rx_fw_ring_stats_tlv_v
  413. */
  414. HTT_DBG_EXT_RX_RING_STATS = 42,
  415. /** HTT_STRM_GEN_MPDUS_STATS, HTT_STRM_GEN_MPDUS_DETAILS_STATS
  416. * PARAMS:
  417. * - No params
  418. * RESP MSG: HTT_T2H STREAMING_STATS_IND (not EXT_STATS_CONF)
  419. * - HTT_STRM_GEN_MPDUS_STATS:
  420. * htt_stats_strm_gen_mpdus_tlv_t
  421. * - HTT_STRM_GEN_MPDUS_DETAILS_STATS:
  422. * htt_stats_strm_gen_mpdus_details_tlv_t
  423. */
  424. HTT_STRM_GEN_MPDUS_STATS = 43,
  425. HTT_STRM_GEN_MPDUS_DETAILS_STATS = 44,
  426. /** HTT_DBG_SOC_ERROR_STATS
  427. * PARAMS:
  428. * - No Params
  429. * RESP MSG:
  430. * - htt_dmac_reset_stats_tlv
  431. */
  432. HTT_DBG_SOC_ERROR_STATS = 45,
  433. /** HTT_DBG_PDEV_PUNCTURE_STATS
  434. * PARAMS:
  435. * - param 0: enum from htt_tx_pdev_puncture_stats_upload_t, indicating
  436. * the stats to upload
  437. * RESP MSG:
  438. * - one or more htt_pdev_puncture_stats_tlv, depending on param 0
  439. */
  440. HTT_DBG_PDEV_PUNCTURE_STATS = 46,
  441. /** HTT_DBG_EXT_STATS_ML_PEERS_INFO
  442. * PARAMS:
  443. * - param 0:
  444. * Bit 0 -> HTT_ML_PEER_DETAILS_TLV always enabled by default
  445. * Bit 1 -> HTT_ML_PEER_EXT_DETAILS_TLV will be uploaded when
  446. * this bit is set
  447. * Bit 2 -> HTT_ML_LINK_INFO_TLV will be uploaded when this bit is set
  448. * RESP MSG:
  449. * - htt_ml_peer_stats_t
  450. */
  451. HTT_DBG_EXT_STATS_ML_PEERS_INFO = 47,
  452. /** HTT_DBG_ODD_MANDATORY_STATS
  453. * params:
  454. * None
  455. * Response MSG:
  456. * htt_odd_mandatory_pdev_stats_tlv
  457. */
  458. HTT_DBG_ODD_MANDATORY_STATS = 48,
  459. /** HTT_DBG_PDEV_SCHED_ALGO_STATS
  460. * PARAMS:
  461. * - No Params
  462. * RESP MSG:
  463. * - htt_pdev_sched_algo_ofdma_stats_tlv
  464. */
  465. HTT_DBG_PDEV_SCHED_ALGO_STATS = 49,
  466. /** HTT_DBG_ODD_MANDATORY_MUMIMO_STATS
  467. * params:
  468. * None
  469. * Response MSG:
  470. * htt_odd_mandatory_mumimo_pdev_stats_tlv
  471. */
  472. HTT_DBG_ODD_MANDATORY_MUMIMO_STATS = 50,
  473. /** HTT_DBG_ODD_MANDATORY_MUOFDMA_STATS
  474. * params:
  475. * None
  476. * Response MSG:
  477. * htt_odd_mandatory_muofdma_pdev_stats_tlv
  478. */
  479. HTT_DBG_ODD_MANDATORY_MUOFDMA_STATS = 51,
  480. /** HTT_DBG_EXT_PHY_PROF_CAL_STATS
  481. * params:
  482. * None
  483. * Response MSG:
  484. * htt_stats_latency_prof_cal_data_tlv
  485. */
  486. HTT_DBG_EXT_PHY_PROF_CAL_STATS = 52,
  487. /** HTT_DBG_EXT_STATS_PDEV_BW_MGR
  488. * PARAMS:
  489. * - No Params
  490. * RESP MSG:
  491. * - htt_pdev_bw_mgr_stats_t
  492. */
  493. HTT_DBG_EXT_STATS_PDEV_BW_MGR = 53,
  494. /** HTT_DBG_PDEV_MBSSID_CTRL_FRAME_STATS
  495. * PARAMS:
  496. * - No Params
  497. * RESP MSG:
  498. * - htt_pdev_mbssid_ctrl_frame_stats
  499. */
  500. HTT_DBG_PDEV_MBSSID_CTRL_FRAME_STATS = 54,
  501. /** HTT_DBG_SOC_SSR_STATS
  502. * Used for non-MLO UMAC recovery stats.
  503. * PARAMS:
  504. * - No Params
  505. * RESP MSG:
  506. * - htt_umac_ssr_stats_tlv
  507. */
  508. HTT_DBG_SOC_SSR_STATS = 55,
  509. /** HTT_DBG_MLO_UMAC_SSR_STATS
  510. * Used for MLO UMAC recovery stats.
  511. * PARAMS:
  512. * - No Params
  513. * RESP MSG:
  514. * - htt_mlo_umac_ssr_stats_tlv
  515. */
  516. HTT_DBG_MLO_UMAC_SSR_STATS = 56,
  517. /** HTT_DBG_PDEV_TDMA_STATS
  518. * PARAMS:
  519. * - No Params
  520. * RESP MSG:
  521. * - htt_pdev_tdma_stats_tlv
  522. */
  523. HTT_DBG_PDEV_TDMA_STATS = 57,
  524. /** HTT_DBG_CODEL_STATS
  525. * PARAMS:
  526. * - No Params
  527. * RESP MSG:
  528. * - htt_codel_svc_class_stats_tlv
  529. * - htt_codel_msduq_stats_tlv
  530. */
  531. HTT_DBG_CODEL_STATS = 58,
  532. /** HTT_DBG_ODD_PDEV_BE_TX_MU_OFDMA_STATS
  533. * PARAMS:
  534. * - No Params
  535. * RESP MSG:
  536. * - htt_tx_pdev_mpdu_stats_tlv
  537. */
  538. HTT_DBG_ODD_PDEV_BE_TX_MU_OFDMA_STATS = 59,
  539. /** HTT_DBG_EXT_STATS_PDEV_UL_TRIGGER
  540. * PARAMS:
  541. * - No Params
  542. * RESP MSG:
  543. * - htt_rx_pdev_be_ul_ofdma_user_stats_tlv
  544. */
  545. HTT_DBG_ODD_UL_BE_OFDMA_STATS = 60,
  546. /** HTT_DBG_ODD_BE_TXBF_OFDMA_STATS
  547. */
  548. HTT_DBG_ODD_BE_TXBF_OFDMA_STATS = 61,
  549. /** HTT_DBG_ODD_STATS_PDEV_BE_UL_MUMIMO_TRIG_STATS
  550. * PARAMS:
  551. * - No Params
  552. * RESP MSG:
  553. * - htt_rx_pdev_be_ul_ofdma_user_stats_tlv
  554. */
  555. HTT_DBG_ODD_STATS_PDEV_BE_UL_MUMIMO_TRIG_STATS = 62,
  556. /** HTT_DBG_MLO_SCHED_STATS
  557. * PARAMS:
  558. * - No Params
  559. * RESP MSG:
  560. * - htt_pdev_mlo_sched_stats_tlv
  561. */
  562. HTT_DBG_MLO_SCHED_STATS = 63,
  563. /** HTT_DBG_PDEV_MLO_IPC_STATS
  564. * PARAMS:
  565. * - No Params
  566. * RESP MSG:
  567. * - htt_pdev_mlo_ipc_stats_tlv
  568. */
  569. HTT_DBG_PDEV_MLO_IPC_STATS = 64,
  570. /** HTT_DBG_EXT_PDEV_RTT_RESP_STATS
  571. * PARAMS:
  572. * - No Params
  573. * RESP MSG:
  574. * - htt_stats_pdev_rtt_resp_stats_tlv
  575. * - htt_stats_pdev_rtt_hw_stats_tlv
  576. * - htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv
  577. * - htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv
  578. */
  579. HTT_DBG_EXT_PDEV_RTT_RESP_STATS = 65,
  580. /** HTT_DBG_EXT_PDEV_RTT_INITIATOR_STATS
  581. * PARAMS:
  582. * - No Params
  583. * RESP MSG:
  584. * - htt_stats_pdev_rtt_init_stats_tlv
  585. * - htt_stats_pdev_rtt_hw_stats_tlv
  586. */
  587. HTT_DBG_EXT_PDEV_RTT_INITIATOR_STATS = 66,
  588. /** HTT_DBG_EXT_STATS_LATENCY_PROF_STATS_LO
  589. * PARAMS:
  590. *
  591. * RESP MSG:
  592. * - htt_latency_prof_stats_tlv showing latency profile stats for
  593. * finer-grained events than HTT_DBG_EXT_STATS_LATENCY_PROF_STATS,
  594. * such as individual steps within a larger pdev or vdev event.
  595. */
  596. HTT_DBG_EXT_STATS_LATENCY_PROF_STATS_LO = 67,
  597. /** HTT_DBG_GTX_STATS
  598. * PARAMS:
  599. * - No Params
  600. * RESP MSG:
  601. * - htt_pdev_gtx_stats_tlv
  602. */
  603. HTT_DBG_GTX_STATS = 68,
  604. /* keep this last */
  605. HTT_DBG_NUM_EXT_STATS = 256,
  606. };
  607. /*
  608. * Macros to get/set the bit field in config param[3] that indicates to
  609. * clear corresponding per peer stats specified by config param 1
  610. */
  611. #define HTT_DBG_EXT_PEER_STATS_RESET_M 0x00010000
  612. #define HTT_DBG_EXT_PEER_STATS_RESET_S 16
  613. #define HTT_DBG_EXT_PEER_STATS_RESET_GET(_var) \
  614. (((_var) & HTT_DBG_EXT_PEER_STATS_RESET_M) >> \
  615. HTT_DBG_EXT_PEER_STATS_RESET_S)
  616. #define HTT_DBG_EXT_PEER_STATS_RESET_SET(_var, _val) \
  617. do { \
  618. HTT_CHECK_SET_VAL(HTT_DBG_EXT_PEER_STATS_RESET, _val); \
  619. ((_var) |= ((_val) << HTT_DBG_EXT_PEER_STATS_RESET_S)); \
  620. } while (0)
  621. #define HTT_STATS_SUBTYPE_MAX 16
  622. /* htt_mu_stats_upload_t
  623. * Enumerations for specifying whether to upload all MU stats in response to
  624. * HTT_DBG_EXT_STATS_PDEV_TX_MU, or if not all, then which subset.
  625. */
  626. typedef enum {
  627. /* HTT_UPLOAD_MU_STATS: upload all MU stats:
  628. * UL MU-MIMO + DL MU-MIMO + UL MU-OFDMA + DL MU-OFDMA
  629. * (note: included OFDMA stats are limited to 11ax)
  630. */
  631. HTT_UPLOAD_MU_STATS,
  632. /* HTT_UPLOAD_MU_MIMO_STATS: upload UL MU-MIMO + DL MU-MIMO stats */
  633. HTT_UPLOAD_MU_MIMO_STATS,
  634. /* HTT_UPLOAD_MU_OFDMA_STATS:
  635. * upload UL MU-OFDMA + DL MU-OFDMA stats (note: 11ax only stats)
  636. */
  637. HTT_UPLOAD_MU_OFDMA_STATS,
  638. HTT_UPLOAD_DL_MU_MIMO_STATS,
  639. HTT_UPLOAD_UL_MU_MIMO_STATS,
  640. /* HTT_UPLOAD_DL_MU_OFDMA_STATS:
  641. * upload DL MU-OFDMA stats (note: 11ax only stats)
  642. */
  643. HTT_UPLOAD_DL_MU_OFDMA_STATS,
  644. /* HTT_UPLOAD_UL_MU_OFDMA_STATS:
  645. * upload UL MU-OFDMA stats (note: 11ax only stats)
  646. */
  647. HTT_UPLOAD_UL_MU_OFDMA_STATS,
  648. /*
  649. * Upload BE UL MU-OFDMA + BE DL MU-OFDMA stats,
  650. * TLV: htt_tx_pdev_dl_be_mu_ofdma_sch_stats_tlv and
  651. * htt_tx_pdev_ul_be_mu_ofdma_sch_stats_tlv
  652. */
  653. HTT_UPLOAD_BE_MU_OFDMA_STATS,
  654. /*
  655. * Upload BE DL MU-OFDMA
  656. * TLV: htt_tx_pdev_dl_be_mu_ofdma_sch_stats_tlv
  657. */
  658. HTT_UPLOAD_BE_DL_MU_OFDMA_STATS,
  659. /*
  660. * Upload BE UL MU-OFDMA
  661. * TLV: htt_tx_pdev_ul_be_mu_ofdma_sch_stats_tlv
  662. */
  663. HTT_UPLOAD_BE_UL_MU_OFDMA_STATS,
  664. } htt_mu_stats_upload_t;
  665. /* htt_tx_rate_stats_upload_t
  666. * Enumerations for specifying which stats to upload in response to
  667. * HTT_DBG_EXT_STATS_PDEV_TX_RATE.
  668. */
  669. typedef enum {
  670. /* 11abgn, 11ac, and 11ax TX stats, and a few 11be SU stats
  671. *
  672. * TLV: htt_tx_pdev_rate_stats_tlv
  673. */
  674. HTT_TX_RATE_STATS_DEFAULT,
  675. /*
  676. * Upload 11be OFDMA TX stats
  677. *
  678. * TLV: htt_tx_pdev_rate_stats_be_ofdma_tlv
  679. */
  680. HTT_TX_RATE_STATS_UPLOAD_11BE_OFDMA,
  681. } htt_tx_rate_stats_upload_t;
  682. /* htt_rx_ul_trigger_stats_upload_t
  683. * Enumerations for specifying which stats to upload in response to
  684. * HTT_DBG_EXT_STATS_PDEV_TX_RATE.
  685. */
  686. typedef enum {
  687. /* Upload 11ax UL OFDMA RX Trigger stats
  688. *
  689. * TLV: htt_rx_pdev_ul_trigger_stats_tlv
  690. */
  691. HTT_RX_UL_TRIGGER_STATS_UPLOAD_11AX_OFDMA,
  692. /*
  693. * Upload 11be UL OFDMA RX Trigger stats
  694. *
  695. * TLV: htt_rx_pdev_be_ul_trigger_stats_tlv
  696. */
  697. HTT_RX_UL_TRIGGER_STATS_UPLOAD_11BE_OFDMA,
  698. } htt_rx_ul_trigger_stats_upload_t;
  699. /*
  700. * The htt_rx_ul_mumimo_trigger_stats_upload_t enum values are
  701. * provided by the host as one of the config param elements in
  702. * the HTT_H2T EXT_STATS_REQ message, for stats type ==
  703. * HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS.
  704. */
  705. typedef enum {
  706. /*
  707. * Upload 11ax UL MUMIMO RX Trigger stats
  708. * TLV: htt_rx_pdev_ul_mumimo_trig_stats_tlv
  709. */
  710. HTT_RX_UL_MUMIMO_TRIGGER_STATS_UPLOAD_11AX,
  711. /*
  712. * Upload 11be UL MUMIMO RX Trigger stats
  713. * TLV: htt_rx_pdev_ul_mumimo_trig_be_stats_tlv
  714. */
  715. HTT_RX_UL_MUMIMO_TRIGGER_STATS_UPLOAD_11BE,
  716. } htt_rx_ul_mumimo_trigger_stats_upload_t;
  717. /* htt_tx_pdev_txbf_ofdma_stats_upload_t
  718. * Enumerations for specifying which stats to upload in response to
  719. * HTT_DBG_EXT_STATS_TXBF_OFDMA.
  720. */
  721. typedef enum {
  722. /* upload 11ax TXBF OFDMA stats
  723. *
  724. * TLV: htt_tx_pdev_ax_txbf_ofdma_stats_t
  725. */
  726. HTT_UPLOAD_AX_TXBF_OFDMA_STATS,
  727. /*
  728. * Upload 11be TXBF OFDMA stats
  729. *
  730. * TLV: htt_tx_pdev_be_txbf_ofdma_stats_t
  731. */
  732. HTT_UPLOAD_BE_TXBF_OFDMA_STATS,
  733. } htt_tx_pdev_txbf_ofdma_stats_upload_t;
  734. /* htt_tx_pdev_puncture_stats_upload_t
  735. * Enumerations for specifying which stats to upload in response to
  736. * HTT_DBG_PDEV_PUNCTURE_STATS.
  737. */
  738. typedef enum {
  739. /* upload puncture stats for all supported modes, both TX and RX */
  740. HTT_UPLOAD_PUNCTURE_STATS_ALL,
  741. /* upload puncture stats for all supported TX modes */
  742. HTT_UPLOAD_PUNCTURE_STATS_TX,
  743. /* upload puncture stats for all supported RX modes */
  744. HTT_UPLOAD_PUNCTURE_STATS_RX,
  745. } htt_tx_pdev_puncture_stats_upload_t;
  746. #define HTT_STATS_MAX_STRING_SZ32 4
  747. #define HTT_STATS_MACID_INVALID 0xff
  748. #define HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS 10
  749. #define HTT_TX_HWQ_MAX_CMD_RESULT_STATS 13
  750. #define HTT_TX_HWQ_MAX_CMD_STALL_STATS 5
  751. #define HTT_TX_HWQ_MAX_FES_RESULT_STATS 10
  752. #define HTT_PDEV_STATS_PPDU_DUR_HIST_BINS 16
  753. #define HTT_PDEV_STATS_PPDU_DUR_HIST_INTERVAL_US 250
  754. typedef enum {
  755. HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0,
  756. HTT_STATS_TX_PDEV_DATA_UNDERRUN_BETWEEN_MPDU = 1,
  757. HTT_STATS_TX_PDEV_DATA_UNDERRUN_WITHIN_MPDU = 2,
  758. HTT_TX_PDEV_MAX_URRN_STATS = 3,
  759. } htt_tx_pdev_underrun_enum;
  760. #define HTT_TX_PDEV_MAX_FLUSH_REASON_STATS 150
  761. #define HTT_TX_PDEV_MAX_SIFS_BURST_STATS 9
  762. #define HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS 10
  763. #define HTT_TX_PDEV_MAX_PHY_ERR_STATS 18
  764. /* HTT_TX_PDEV_SCHED_TX_MODE_MAX:
  765. * DEPRECATED - num sched tx mode max is 8
  766. */
  767. #define HTT_TX_PDEV_SCHED_TX_MODE_MAX 4
  768. #define HTT_TX_PDEV_NUM_SCHED_ORDER_LOG 20
  769. #define HTT_RX_STATS_REFILL_MAX_RING 4
  770. #define HTT_RX_STATS_RXDMA_MAX_ERR 16
  771. #define HTT_RX_STATS_FW_DROP_REASON_MAX 16
  772. /* Bytes stored in little endian order */
  773. /* Length should be multiple of DWORD */
  774. typedef struct {
  775. htt_tlv_hdr_t tlv_hdr;
  776. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, data); /* Can be variable length */
  777. } htt_stats_string_tlv;
  778. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_M 0x000000ff
  779. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_S 0
  780. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_GET(_var) \
  781. (((_var) & HTT_TX_PDEV_STATS_CMN_MAC_ID_M) >> \
  782. HTT_TX_PDEV_STATS_CMN_MAC_ID_S)
  783. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_SET(_var, _val) \
  784. do { \
  785. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_CMN_MAC_ID, _val); \
  786. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_CMN_MAC_ID_S)); \
  787. } while (0)
  788. /* == TX PDEV STATS == */
  789. typedef struct {
  790. htt_tlv_hdr_t tlv_hdr;
  791. /**
  792. * BIT [ 7 : 0] :- mac_id
  793. * BIT [31 : 8] :- reserved
  794. */
  795. A_UINT32 mac_id__word;
  796. /** Num PPDUs queued to HW */
  797. A_UINT32 hw_queued;
  798. /** Num PPDUs reaped from HW */
  799. A_UINT32 hw_reaped;
  800. /** Num underruns */
  801. A_UINT32 underrun;
  802. /** Num HW Paused counter */
  803. A_UINT32 hw_paused;
  804. /** Num HW flush counter */
  805. A_UINT32 hw_flush;
  806. /** Num HW filtered counter */
  807. A_UINT32 hw_filt;
  808. /** Num PPDUs cleaned up in TX abort */
  809. A_UINT32 tx_abort;
  810. /** Num MPDUs requeued by SW */
  811. A_UINT32 mpdu_requed;
  812. /** excessive retries */
  813. A_UINT32 tx_xretry;
  814. /** Last used data hw rate code */
  815. A_UINT32 data_rc;
  816. /** frames dropped due to excessive SW retries */
  817. A_UINT32 mpdu_dropped_xretry;
  818. /** illegal rate phy errors */
  819. A_UINT32 illgl_rate_phy_err;
  820. /** wal pdev continuous xretry */
  821. A_UINT32 cont_xretry;
  822. /** wal pdev tx timeout */
  823. A_UINT32 tx_timeout;
  824. /** wal pdev resets */
  825. A_UINT32 pdev_resets;
  826. /** PHY/BB underrun */
  827. A_UINT32 phy_underrun;
  828. /** MPDU is more than txop limit */
  829. A_UINT32 txop_ovf;
  830. /** Number of Sequences posted */
  831. A_UINT32 seq_posted;
  832. /** Number of Sequences failed queueing */
  833. A_UINT32 seq_failed_queueing;
  834. /** Number of Sequences completed */
  835. A_UINT32 seq_completed;
  836. /** Number of Sequences restarted */
  837. A_UINT32 seq_restarted;
  838. /** Number of MU Sequences posted */
  839. A_UINT32 mu_seq_posted;
  840. /** Number of time HW ring is paused between seq switch within ISR */
  841. A_UINT32 seq_switch_hw_paused;
  842. /** Number of times seq continuation in DSR */
  843. A_UINT32 next_seq_posted_dsr;
  844. /** Number of times seq continuation in ISR */
  845. A_UINT32 seq_posted_isr;
  846. /** Number of seq_ctrl cached. */
  847. A_UINT32 seq_ctrl_cached;
  848. /** Number of MPDUs successfully transmitted */
  849. A_UINT32 mpdu_count_tqm;
  850. /** Number of MSDUs successfully transmitted */
  851. A_UINT32 msdu_count_tqm;
  852. /** Number of MPDUs dropped */
  853. A_UINT32 mpdu_removed_tqm;
  854. /** Number of MSDUs dropped */
  855. A_UINT32 msdu_removed_tqm;
  856. /** Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
  857. A_UINT32 mpdus_sw_flush;
  858. /** Num MPDUs filtered by HW, all filter condition (TTL expired) */
  859. A_UINT32 mpdus_hw_filter;
  860. /**
  861. * Num MPDUs truncated by PDG
  862. * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw)
  863. */
  864. A_UINT32 mpdus_truncated;
  865. /** Num MPDUs that was tried but didn't receive ACK or BA */
  866. A_UINT32 mpdus_ack_failed;
  867. /** Num MPDUs that was dropped due to expiry (MSDU TTL) */
  868. A_UINT32 mpdus_expired;
  869. /** Num MPDUs that was retried within seq_ctrl (MGMT/LEGACY) */
  870. A_UINT32 mpdus_seq_hw_retry;
  871. /** Num of TQM acked cmds processed */
  872. A_UINT32 ack_tlv_proc;
  873. /** coex_abort_mpdu_cnt valid */
  874. A_UINT32 coex_abort_mpdu_cnt_valid;
  875. /** coex_abort_mpdu_cnt from TX FES stats */
  876. A_UINT32 coex_abort_mpdu_cnt;
  877. /**
  878. * Number of total PPDUs
  879. * (DATA, MGMT, excludes selfgen) tried over the air (OTA)
  880. */
  881. A_UINT32 num_total_ppdus_tried_ota;
  882. /** Number of data PPDUs tried over the air (OTA) */
  883. A_UINT32 num_data_ppdus_tried_ota;
  884. /** Num Local control/mgmt frames (MSDUs) queued */
  885. A_UINT32 local_ctrl_mgmt_enqued;
  886. /**
  887. * Num Local control/mgmt frames (MSDUs) done
  888. * It includes all local ctrl/mgmt completions
  889. * (acked, no ack, flush, TTL, etc)
  890. */
  891. A_UINT32 local_ctrl_mgmt_freed;
  892. /** Num Local data frames (MSDUs) queued */
  893. A_UINT32 local_data_enqued;
  894. /**
  895. * Num Local data frames (MSDUs) done
  896. * It includes all local data completions
  897. * (acked, no ack, flush, TTL, etc)
  898. */
  899. A_UINT32 local_data_freed;
  900. /** Num MPDUs tried by SW */
  901. A_UINT32 mpdu_tried;
  902. /** Num of waiting seq posted in ISR completion handler */
  903. A_UINT32 isr_wait_seq_posted;
  904. A_UINT32 tx_active_dur_us_low;
  905. A_UINT32 tx_active_dur_us_high;
  906. /** Number of MPDUs dropped after max retries */
  907. A_UINT32 remove_mpdus_max_retries;
  908. /** Num HTT cookies dispatched */
  909. A_UINT32 comp_delivered;
  910. /** successful ppdu transmissions */
  911. A_UINT32 ppdu_ok;
  912. /** Scheduler self triggers */
  913. A_UINT32 self_triggers;
  914. /** FES duration of last tx data PPDU in us (sch_eval_end - ppdu_start) */
  915. A_UINT32 tx_time_dur_data;
  916. /** Num of times sequence terminated due to ppdu duration < burst limit */
  917. A_UINT32 seq_qdepth_repost_stop;
  918. /** Num of times MU sequence terminated due to MSDUs reaching threshold */
  919. A_UINT32 mu_seq_min_msdu_repost_stop;
  920. /** Num of times SU sequence terminated due to MSDUs reaching threshold */
  921. A_UINT32 seq_min_msdu_repost_stop;
  922. /** Num of times sequence terminated due to no TXOP available */
  923. A_UINT32 seq_txop_repost_stop;
  924. /** Num of times the next sequence got cancelled */
  925. A_UINT32 next_seq_cancel;
  926. /** Num of times fes offset was misaligned */
  927. A_UINT32 fes_offsets_err_cnt;
  928. /** Num of times peer denylisted for MU-MIMO transmission */
  929. A_UINT32 num_mu_peer_blacklisted;
  930. /** Num of times mu_ofdma seq posted */
  931. A_UINT32 mu_ofdma_seq_posted;
  932. /** Num of times UL MU MIMO seq posted */
  933. A_UINT32 ul_mumimo_seq_posted;
  934. /** Num of times UL OFDMA seq posted */
  935. A_UINT32 ul_ofdma_seq_posted;
  936. /** Num of times Thermal module suspended scheduler */
  937. A_UINT32 thermal_suspend_cnt;
  938. /** Num of times DFS module suspended scheduler */
  939. A_UINT32 dfs_suspend_cnt;
  940. /** Num of times TX abort module suspended scheduler */
  941. A_UINT32 tx_abort_suspend_cnt;
  942. /**
  943. * This field is a target-specific bit mask of suspended PPDU tx queues.
  944. * Since the bit mask definition is different for different targets,
  945. * this field is not meant for general use, but rather for debugging use.
  946. */
  947. A_UINT32 tgt_specific_opaque_txq_suspend_info;
  948. /**
  949. * Last SCHEDULER suspend reason
  950. * 1 -> Thermal Module
  951. * 2 -> DFS Module
  952. * 3 -> Tx Abort Module
  953. */
  954. A_UINT32 last_suspend_reason;
  955. /** Num of dynamic mimo ps dlmumimo sequences posted */
  956. A_UINT32 num_dyn_mimo_ps_dlmumimo_sequences;
  957. /** Num of times su bf sequences are denylisted */
  958. A_UINT32 num_su_txbf_denylisted;
  959. /** pdev uptime in microseconds **/
  960. A_UINT32 pdev_up_time_us_low;
  961. A_UINT32 pdev_up_time_us_high;
  962. /** count of ofdma sequences flushed */
  963. A_UINT32 ofdma_seq_flush;
  964. } htt_stats_tx_pdev_cmn_tlv;
  965. /* preserve old name alias for new name consistent with the tag name */
  966. typedef htt_stats_tx_pdev_cmn_tlv htt_tx_pdev_stats_cmn_tlv;
  967. #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  968. /* NOTE: Variable length TLV, use length spec to infer array size */
  969. typedef struct {
  970. htt_tlv_hdr_t tlv_hdr;
  971. /* HTT_TX_PDEV_MAX_URRN_STATS */
  972. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, urrn_stats);
  973. } htt_stats_tx_pdev_underrun_tlv;
  974. /* preserve old name alias for new name consistent with the tag name */
  975. typedef htt_stats_tx_pdev_underrun_tlv htt_tx_pdev_stats_urrn_tlv_v;
  976. #define HTT_TX_PDEV_STATS_FLUSH_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  977. /* NOTE: Variable length TLV, use length spec to infer array size */
  978. typedef struct {
  979. htt_tlv_hdr_t tlv_hdr;
  980. /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
  981. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, flush_errs);
  982. } htt_stats_tx_pdev_flush_tlv;
  983. /* preserve old name alias for new name consistent with the tag name */
  984. typedef htt_stats_tx_pdev_flush_tlv htt_tx_pdev_stats_flush_tlv_v;
  985. #define HTT_TX_PDEV_STATS_MLO_ABORT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  986. /* NOTE: Variable length TLV, use length spec to infer array size */
  987. typedef struct {
  988. htt_tlv_hdr_t tlv_hdr;
  989. /* HTT_TX_PDEV_MAX_MLO_ABORT_REASON_STATS */
  990. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, mlo_abort_cnt);
  991. } htt_stats_tx_pdev_mlo_abort_tlv;
  992. /* preserve old name alias for new name consistent with the tag name */
  993. typedef htt_stats_tx_pdev_mlo_abort_tlv htt_tx_pdev_stats_mlo_abort_tlv_v;
  994. #define HTT_TX_PDEV_STATS_MLO_TXOP_ABORT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  995. /* NOTE: Variable length TLV, use length spec to infer array size */
  996. typedef struct {
  997. htt_tlv_hdr_t tlv_hdr;
  998. /* HTT_TX_PDEV_MAX_MLO_ABORT_REASON_STATS */
  999. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, mlo_txop_abort_cnt);
  1000. } htt_stats_tx_pdev_mlo_txop_abort_tlv;
  1001. /* preserve old name alias for new name consistent with the tag name */
  1002. typedef htt_stats_tx_pdev_mlo_txop_abort_tlv
  1003. htt_tx_pdev_stats_mlo_txop_abort_tlv_v;
  1004. #define HTT_TX_PDEV_STATS_SIFS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1005. /* NOTE: Variable length TLV, use length spec to infer array size */
  1006. typedef struct {
  1007. htt_tlv_hdr_t tlv_hdr;
  1008. /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
  1009. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, sifs_status);
  1010. } htt_stats_tx_pdev_sifs_tlv;
  1011. /* preserve old name alias for new name consistent with the tag name */
  1012. typedef htt_stats_tx_pdev_sifs_tlv htt_tx_pdev_stats_sifs_tlv_v;
  1013. #define HTT_TX_PDEV_STATS_PHY_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1014. /* NOTE: Variable length TLV, use length spec to infer array size */
  1015. typedef struct {
  1016. htt_tlv_hdr_t tlv_hdr;
  1017. /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
  1018. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, phy_errs);
  1019. } htt_stats_tx_pdev_phy_err_tlv;
  1020. /* preserve old name alias for new name consistent with the tag name */
  1021. typedef htt_stats_tx_pdev_phy_err_tlv htt_tx_pdev_stats_phy_err_tlv_v;
  1022. /*
  1023. * Each array in the below struct has 16 elements, to cover the 16 possible
  1024. * values for the CW and AIFS parameters. Each element within the array
  1025. * stores the counter indicating how many transmissions have occurred with
  1026. * that particular value for the MU EDCA parameter in question.
  1027. */
  1028. #define HTT_STATS_MUEDCA_VALUE_MAX 16
  1029. typedef struct { /* DEPRECATED */
  1030. htt_tlv_hdr_t tlv_hdr;
  1031. A_UINT32 aifs[HTT_NUM_AC_WMM][HTT_STATS_MUEDCA_VALUE_MAX];
  1032. A_UINT32 cw_min[HTT_NUM_AC_WMM][HTT_STATS_MUEDCA_VALUE_MAX];
  1033. A_UINT32 cw_max[HTT_NUM_AC_WMM][HTT_STATS_MUEDCA_VALUE_MAX];
  1034. } htt_stats_tx_pdev_muedca_params_stats_tlv;
  1035. /* preserve old name alias for new name consistent with the tag name */
  1036. typedef htt_stats_tx_pdev_muedca_params_stats_tlv
  1037. htt_tx_pdev_muedca_params_stats_tlv_v;
  1038. typedef struct {
  1039. htt_tlv_hdr_t tlv_hdr;
  1040. A_UINT32 relaxed_mu_edca[HTT_NUM_AC_WMM];
  1041. A_UINT32 mumimo_aggressive_mu_edca[HTT_NUM_AC_WMM];
  1042. A_UINT32 mumimo_relaxed_mu_edca[HTT_NUM_AC_WMM];
  1043. A_UINT32 muofdma_aggressive_mu_edca[HTT_NUM_AC_WMM];
  1044. A_UINT32 muofdma_relaxed_mu_edca[HTT_NUM_AC_WMM];
  1045. A_UINT32 latency_mu_edca[HTT_NUM_AC_WMM];
  1046. A_UINT32 psd_boost_mu_edca[HTT_NUM_AC_WMM];
  1047. } htt_stats_tx_pdev_mu_edca_params_stats_tlv;
  1048. /* preserve old name alias for new name consistent with the tag name */
  1049. typedef htt_stats_tx_pdev_mu_edca_params_stats_tlv
  1050. htt_tx_pdev_mu_edca_params_stats_tlv_v;
  1051. typedef struct {
  1052. htt_tlv_hdr_t tlv_hdr;
  1053. A_UINT32 ul_mumimo_less_aggressive[HTT_NUM_AC_WMM];
  1054. A_UINT32 ul_mumimo_medium_aggressive[HTT_NUM_AC_WMM];
  1055. A_UINT32 ul_mumimo_highly_aggressive[HTT_NUM_AC_WMM];
  1056. A_UINT32 ul_mumimo_default_relaxed[HTT_NUM_AC_WMM];
  1057. A_UINT32 ul_muofdma_less_aggressive[HTT_NUM_AC_WMM];
  1058. A_UINT32 ul_muofdma_medium_aggressive[HTT_NUM_AC_WMM];
  1059. A_UINT32 ul_muofdma_highly_aggressive[HTT_NUM_AC_WMM];
  1060. A_UINT32 ul_muofdma_default_relaxed[HTT_NUM_AC_WMM];
  1061. } htt_stats_tx_pdev_ap_edca_params_stats_tlv;
  1062. /* preserve old name alias for new name consistent with the tag name */
  1063. typedef htt_stats_tx_pdev_ap_edca_params_stats_tlv
  1064. htt_tx_pdev_ap_edca_params_stats_tlv_v;
  1065. #define HTT_TX_PDEV_SIFS_BURST_HIST_STATS 10
  1066. #define HTT_TX_PDEV_STATS_SIFS_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1067. /* NOTE: Variable length TLV, use length spec to infer array size */
  1068. typedef struct {
  1069. htt_tlv_hdr_t tlv_hdr;
  1070. /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
  1071. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, sifs_hist_status);
  1072. } htt_stats_tx_pdev_sifs_hist_tlv;
  1073. /* preserve old name alias for new name consistent with the tag name */
  1074. typedef htt_stats_tx_pdev_sifs_hist_tlv htt_tx_pdev_stats_sifs_hist_tlv_v;
  1075. typedef struct {
  1076. htt_tlv_hdr_t tlv_hdr;
  1077. A_UINT32 num_data_ppdus_legacy_su;
  1078. A_UINT32 num_data_ppdus_ac_su;
  1079. A_UINT32 num_data_ppdus_ax_su;
  1080. A_UINT32 num_data_ppdus_ac_su_txbf;
  1081. A_UINT32 num_data_ppdus_ax_su_txbf;
  1082. } htt_stats_tx_pdev_tx_ppdu_stats_tlv;
  1083. /* preserve old name alias for new name consistent with the tag name */
  1084. typedef htt_stats_tx_pdev_tx_ppdu_stats_tlv
  1085. htt_tx_pdev_stats_tx_ppdu_stats_tlv_v;
  1086. typedef enum {
  1087. HTT_TX_WAL_ISR_SCHED_SUCCESS,
  1088. HTT_TX_WAL_ISR_SCHED_FILTER,
  1089. HTT_TX_WAL_ISR_SCHED_RESP_TIMEOUT,
  1090. HTT_TX_WAL_ISR_SCHED_RATES_EXHAUSTED,
  1091. HTT_TX_WAL_ISR_SCHED_DATA_EXHAUSTED,
  1092. HTT_TX_WAL_ISR_SCHED_SEQ_ABORT,
  1093. HTT_TX_WAL_ISR_SCHED_NOTIFY_FRAME_ENCOUNTERED,
  1094. HTT_TX_WAL_ISR_SCHED_COMPLETION,
  1095. HTT_TX_WAL_ISR_SCHED_IN_PROGRESS,
  1096. } htt_tx_wal_tx_isr_sched_status;
  1097. /* [0]- nr4 , [1]- nr8 */
  1098. #define HTT_STATS_NUM_NR_BINS 2
  1099. /* Termination status stated in htt_tx_wal_tx_isr_sched_status */
  1100. #define HTT_STATS_MAX_NUM_SCHED_STATUS 9
  1101. #define HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST 10
  1102. #define HTT_STATS_MAX_NUM_SCHED_STATUS_WORDS \
  1103. (HTT_STATS_NUM_NR_BINS * HTT_STATS_MAX_NUM_SCHED_STATUS)
  1104. #define HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS \
  1105. (HTT_STATS_NUM_NR_BINS * HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST)
  1106. typedef enum {
  1107. HTT_STATS_HWMODE_AC = 0,
  1108. HTT_STATS_HWMODE_AX = 1,
  1109. HTT_STATS_HWMODE_BE = 2,
  1110. } htt_stats_hw_mode;
  1111. typedef struct {
  1112. htt_tlv_hdr_t tlv_hdr;
  1113. A_UINT32 hw_mode; /* HTT_STATS_HWMODE_xx */
  1114. A_UINT32 mu_mimo_num_seq_term_status[HTT_STATS_MAX_NUM_SCHED_STATUS_WORDS];
  1115. A_UINT32 mu_mimo_num_ppdu_completed_per_burst[HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS];
  1116. A_UINT32 mu_mimo_num_seq_posted[HTT_STATS_NUM_NR_BINS];
  1117. A_UINT32 mu_mimo_num_ppdu_posted_per_burst[HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS];
  1118. } htt_stats_mu_ppdu_dist_tlv;
  1119. /* preserve old name alias for new name consistent with the tag name */
  1120. typedef htt_stats_mu_ppdu_dist_tlv htt_pdev_mu_ppdu_dist_tlv_v;
  1121. #define HTT_TX_PDEV_STATS_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1122. /* NOTE: Variable length TLV, use length spec to infer array size .
  1123. *
  1124. * Tried_mpdu_cnt_hist is the histogram of MPDUs tries per HWQ.
  1125. * The tries here is the count of the MPDUS within a PPDU that the
  1126. * HW had attempted to transmit on air, for the HWSCH Schedule
  1127. * command submitted by FW.It is not the retry attempts.
  1128. * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
  1129. * 10 bins in this histogram. They are defined in FW using the
  1130. * following macros
  1131. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  1132. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  1133. *
  1134. */
  1135. typedef struct {
  1136. htt_tlv_hdr_t tlv_hdr;
  1137. A_UINT32 hist_bin_size;
  1138. /* HTT_TX_PDEV_TRIED_MPDU_CNT_HIST */
  1139. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, tried_mpdu_cnt_hist);
  1140. } htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv;
  1141. /* preserve old name alias for new name consistent with the tag name */
  1142. typedef htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv
  1143. htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v;
  1144. typedef struct {
  1145. htt_tlv_hdr_t tlv_hdr;
  1146. /* Num MGMT MPDU transmitted by the target */
  1147. A_UINT32 fw_tx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  1148. } htt_stats_pdev_ctrl_path_tx_stats_tlv;
  1149. /* preserve old name alias for new name consistent with the tag name */
  1150. typedef htt_stats_pdev_ctrl_path_tx_stats_tlv htt_pdev_ctrl_path_tx_stats_tlv_v;
  1151. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_TX
  1152. * TLV_TAGS:
  1153. * - HTT_STATS_TX_PDEV_CMN_TAG
  1154. * - HTT_STATS_TX_PDEV_URRN_TAG
  1155. * - HTT_STATS_TX_PDEV_SIFS_TAG
  1156. * - HTT_STATS_TX_PDEV_FLUSH_TAG
  1157. * - HTT_STATS_TX_PDEV_PHY_ERR_TAG
  1158. * - HTT_STATS_TX_PDEV_SIFS_HIST_TAG
  1159. * - HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG
  1160. * - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG
  1161. * - HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG
  1162. * - HTT_STATS_MU_PPDU_DIST_TAG
  1163. */
  1164. /* NOTE:
  1165. * This structure is for documentation, and cannot be safely used directly.
  1166. * Instead, use the constituent TLV structures to fill/parse.
  1167. */
  1168. #ifdef ATH_TARGET
  1169. typedef struct _htt_tx_pdev_stats {
  1170. htt_stats_tx_pdev_cmn_tlv cmn_tlv;
  1171. htt_stats_tx_pdev_underrun_tlv underrun_tlv;
  1172. htt_stats_tx_pdev_sifs_tlv sifs_tlv;
  1173. htt_stats_tx_pdev_flush_tlv flush_tlv;
  1174. htt_stats_tx_pdev_phy_err_tlv phy_err_tlv;
  1175. htt_stats_tx_pdev_sifs_hist_tlv sifs_hist_tlv;
  1176. htt_stats_tx_pdev_tx_ppdu_stats_tlv tx_su_tlv;
  1177. htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv tried_mpdu_cnt_hist_tlv;
  1178. htt_stats_pdev_ctrl_path_tx_stats_tlv ctrl_path_tx_tlv;
  1179. htt_stats_mu_ppdu_dist_tlv mu_ppdu_dist_tlv;
  1180. } htt_tx_pdev_stats_t;
  1181. #endif /* ATH_TARGET */
  1182. /* == SOC ERROR STATS == */
  1183. /* =============== PDEV ERROR STATS ============== */
  1184. #define HTT_STATS_MAX_HW_INTR_NAME_LEN 8
  1185. typedef struct {
  1186. htt_tlv_hdr_t tlv_hdr;
  1187. /* Stored as little endian */
  1188. A_UINT8 hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN];
  1189. A_UINT32 mask;
  1190. A_UINT32 count;
  1191. } htt_stats_hw_intr_misc_tlv;
  1192. /* preserve old name alias for new name consistent with the tag name */
  1193. typedef htt_stats_hw_intr_misc_tlv htt_hw_stats_intr_misc_tlv;
  1194. #define HTT_STATS_MAX_HW_MODULE_NAME_LEN 8
  1195. typedef struct {
  1196. htt_tlv_hdr_t tlv_hdr;
  1197. /* Stored as little endian */
  1198. A_UINT8 hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN];
  1199. A_UINT32 count;
  1200. } htt_stats_hw_wd_timeout_tlv;
  1201. /* preserve old name alias for new name consistent with the tag name */
  1202. typedef htt_stats_hw_wd_timeout_tlv htt_hw_stats_wd_timeout_tlv;
  1203. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_M 0x000000ff
  1204. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_S 0
  1205. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_GET(_var) \
  1206. (((_var) & HTT_HW_STATS_PDEV_ERRS_MAC_ID_M) >> \
  1207. HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)
  1208. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_SET(_var, _val) \
  1209. do { \
  1210. HTT_CHECK_SET_VAL(HTT_HW_STATS_PDEV_ERRS_MAC_ID, _val); \
  1211. ((_var) |= ((_val) << HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)); \
  1212. } while (0)
  1213. typedef struct {
  1214. htt_tlv_hdr_t tlv_hdr;
  1215. /* BIT [ 7 : 0] :- mac_id
  1216. * BIT [31 : 8] :- reserved
  1217. */
  1218. A_UINT32 mac_id__word;
  1219. A_UINT32 tx_abort;
  1220. A_UINT32 tx_abort_fail_count;
  1221. A_UINT32 rx_abort;
  1222. A_UINT32 rx_abort_fail_count;
  1223. A_UINT32 warm_reset;
  1224. A_UINT32 cold_reset;
  1225. A_UINT32 tx_flush;
  1226. A_UINT32 tx_glb_reset;
  1227. A_UINT32 tx_txq_reset;
  1228. A_UINT32 rx_timeout_reset;
  1229. A_UINT32 mac_cold_reset_restore_cal;
  1230. A_UINT32 mac_cold_reset;
  1231. A_UINT32 mac_warm_reset;
  1232. A_UINT32 mac_only_reset;
  1233. A_UINT32 phy_warm_reset;
  1234. A_UINT32 phy_warm_reset_ucode_trig;
  1235. A_UINT32 mac_warm_reset_restore_cal;
  1236. A_UINT32 mac_sfm_reset;
  1237. A_UINT32 phy_warm_reset_m3_ssr;
  1238. A_UINT32 phy_warm_reset_reason_phy_m3;
  1239. A_UINT32 phy_warm_reset_reason_tx_hw_stuck;
  1240. A_UINT32 phy_warm_reset_reason_num_cca_rx_frame_stuck;
  1241. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_rx_busy;
  1242. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_mac_hang;
  1243. A_UINT32 phy_warm_reset_reason_mac_reset_converted_phy_reset;
  1244. A_UINT32 wal_rx_recovery_rst_mac_hang_count;
  1245. A_UINT32 wal_rx_recovery_rst_known_sig_count;
  1246. A_UINT32 wal_rx_recovery_rst_no_rx_count;
  1247. A_UINT32 wal_rx_recovery_rst_no_rx_consecutive_count;
  1248. A_UINT32 wal_rx_recovery_rst_rx_busy_count;
  1249. A_UINT32 wal_rx_recovery_rst_phy_mac_hang_count;
  1250. A_UINT32 rx_flush_cnt; /* Num rx flush issued */
  1251. A_UINT32 phy_warm_reset_reason_tx_lifetime_expiry_cca_stuck;
  1252. A_UINT32 phy_warm_reset_reason_tx_consecutive_flush9_war;
  1253. A_UINT32 phy_warm_reset_reason_tx_hwsch_reset_war;
  1254. A_UINT32 phy_warm_reset_reason_hwsch_wdog_or_cca_wdog_war;
  1255. A_UINT32 fw_rx_rings_reset;
  1256. /**
  1257. * Num of iterations rx leak prevention successfully done.
  1258. */
  1259. A_UINT32 rx_dest_drain_rx_descs_leak_prevention_done;
  1260. /**
  1261. * Num of rx descs successfully saved by rx leak prevention.
  1262. */
  1263. A_UINT32 rx_dest_drain_rx_descs_saved_cnt;
  1264. /*
  1265. * Stats to debug reason Rx leak prevention
  1266. * was not required to be kicked in.
  1267. */
  1268. A_UINT32 rx_dest_drain_rxdma2reo_leak_detected;
  1269. A_UINT32 rx_dest_drain_rxdma2fw_leak_detected;
  1270. A_UINT32 rx_dest_drain_rxdma2wbm_leak_detected;
  1271. A_UINT32 rx_dest_drain_rxdma1_2sw_leak_detected;
  1272. A_UINT32 rx_dest_drain_rx_drain_ok_mac_idle;
  1273. A_UINT32 rx_dest_drain_ok_mac_not_idle;
  1274. A_UINT32 rx_dest_drain_prerequisite_invld;
  1275. A_UINT32 rx_dest_drain_skip_for_non_lmac_reset;
  1276. A_UINT32 rx_dest_drain_hw_fifo_not_empty_post_drain_wait;
  1277. } htt_stats_hw_pdev_errs_tlv;
  1278. /* preserve old name alias for new name consistent with the tag name */
  1279. typedef htt_stats_hw_pdev_errs_tlv htt_hw_stats_pdev_errs_tlv;
  1280. typedef struct {
  1281. htt_tlv_hdr_t tlv_hdr;
  1282. /* BIT [ 7 : 0] :- mac_id
  1283. * BIT [31 : 8] :- reserved
  1284. */
  1285. A_UINT32 mac_id__word;
  1286. A_UINT32 last_unpause_ppdu_id;
  1287. A_UINT32 hwsch_unpause_wait_tqm_write;
  1288. A_UINT32 hwsch_dummy_tlv_skipped;
  1289. A_UINT32 hwsch_misaligned_offset_received;
  1290. A_UINT32 hwsch_reset_count;
  1291. A_UINT32 hwsch_dev_reset_war;
  1292. A_UINT32 hwsch_delayed_pause;
  1293. A_UINT32 hwsch_long_delayed_pause;
  1294. A_UINT32 sch_rx_ppdu_no_response;
  1295. A_UINT32 sch_selfgen_response;
  1296. A_UINT32 sch_rx_sifs_resp_trigger;
  1297. } htt_stats_whal_tx_tlv;
  1298. /* preserve old name alias for new name consistent with the tag name */
  1299. typedef htt_stats_whal_tx_tlv htt_hw_stats_whal_tx_tlv;
  1300. typedef struct {
  1301. htt_tlv_hdr_t tlv_hdr;
  1302. A_UINT32 wsib_event_watchdog_timeout;
  1303. A_UINT32 wsib_event_slave_tlv_length_error;
  1304. A_UINT32 wsib_event_slave_parity_error;
  1305. A_UINT32 wsib_event_slave_direct_message;
  1306. A_UINT32 wsib_event_slave_backpressure_error;
  1307. A_UINT32 wsib_event_master_tlv_length_error;
  1308. } htt_stats_whal_wsi_tlv;
  1309. typedef struct {
  1310. htt_tlv_hdr_t tlv_hdr;
  1311. /**
  1312. * BIT [ 7 : 0] :- mac_id
  1313. * BIT [31 : 8] :- reserved
  1314. */
  1315. union {
  1316. struct {
  1317. A_UINT32 mac_id: 8,
  1318. reserved: 24;
  1319. };
  1320. A_UINT32 mac_id__word;
  1321. };
  1322. /**
  1323. * hw_wars is a variable-length array, with each element counting
  1324. * the number of occurrences of the corresponding type of HW WAR.
  1325. * That is, hw_wars[0] indicates how many times HW WAR 0 occurred,
  1326. * hw_wars[1] indicates how many times HW WAR 1 occurred, etc.
  1327. * The target has an internal HW WAR mapping that it uses to keep
  1328. * track of which HW WAR is WAR 0, which HW WAR is WAR 1, etc.
  1329. */
  1330. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, hw_wars);
  1331. } htt_stats_hw_war_tlv;
  1332. /* preserve old name alias for new name consistent with the tag name */
  1333. typedef htt_stats_hw_war_tlv htt_hw_war_stats_tlv;
  1334. /* provide properly-named macro */
  1335. #define HTT_STATS_HW_WAR_MAC_ID_GET(word) (word & 0xff)
  1336. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_ERROR
  1337. * TLV_TAGS:
  1338. * - HTT_STATS_HW_PDEV_ERRS_TAG
  1339. * - HTT_STATS_HW_INTR_MISC_TAG (multiple)
  1340. * - HTT_STATS_HW_WD_TIMEOUT_TAG (multiple)
  1341. * - HTT_STATS_WHAL_TX_TAG
  1342. * - HTT_STATS_HW_WAR_TAG
  1343. */
  1344. /* NOTE:
  1345. * This structure is for documentation, and cannot be safely used directly.
  1346. * Instead, use the constituent TLV structures to fill/parse.
  1347. */
  1348. #ifdef ATH_TARGET
  1349. typedef struct _htt_pdev_err_stats {
  1350. htt_stats_hw_pdev_errs_tlv pdev_errs;
  1351. htt_stats_hw_intr_misc_tlv misc_stats[1];
  1352. htt_stats_hw_wd_timeout_tlv wd_timeout[1];
  1353. htt_stats_whal_tx_tlv whal_tx_stats;
  1354. htt_stats_hw_war_tlv hw_war;
  1355. } htt_hw_err_stats_t;
  1356. #endif /* ATH_TARGET */
  1357. /* ============ PEER STATS ============ */
  1358. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M 0x0000ffff
  1359. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S 0
  1360. #define HTT_MSDU_FLOW_STATS_TID_NUM_M 0x000f0000
  1361. #define HTT_MSDU_FLOW_STATS_TID_NUM_S 16
  1362. #define HTT_MSDU_FLOW_STATS_DROP_M 0x00100000
  1363. #define HTT_MSDU_FLOW_STATS_DROP_S 20
  1364. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_GET(_var) \
  1365. (((_var) & HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M) >> \
  1366. HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)
  1367. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_SET(_var, _val) \
  1368. do { \
  1369. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TX_FLOW_NUM, _val); \
  1370. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)); \
  1371. } while (0)
  1372. #define HTT_MSDU_FLOW_STATS_TID_NUM_GET(_var) \
  1373. (((_var) & HTT_MSDU_FLOW_STATS_TID_NUM_M) >> \
  1374. HTT_MSDU_FLOW_STATS_TID_NUM_S)
  1375. #define HTT_MSDU_FLOW_STATS_TID_NUM_SET(_var, _val) \
  1376. do { \
  1377. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TID_NUM, _val); \
  1378. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TID_NUM_S)); \
  1379. } while (0)
  1380. #define HTT_MSDU_FLOW_STATS_DROP_GET(_var) \
  1381. (((_var) & HTT_MSDU_FLOW_STATS_DROP_M) >> \
  1382. HTT_MSDU_FLOW_STATS_DROP_S)
  1383. #define HTT_MSDU_FLOW_STATS_DROP_SET(_var, _val) \
  1384. do { \
  1385. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_DROP, _val); \
  1386. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_DROP_S)); \
  1387. } while (0)
  1388. typedef struct _htt_msdu_flow_stats_tlv {
  1389. htt_tlv_hdr_t tlv_hdr;
  1390. A_UINT32 last_update_timestamp;
  1391. A_UINT32 last_add_timestamp;
  1392. A_UINT32 last_remove_timestamp;
  1393. A_UINT32 total_processed_msdu_count;
  1394. A_UINT32 cur_msdu_count_in_flowq;
  1395. /** This will help to find which peer_id is stuck state */
  1396. A_UINT32 sw_peer_id;
  1397. /**
  1398. * BIT [15 : 0] :- tx_flow_number
  1399. * BIT [19 : 16] :- tid_num
  1400. * BIT [20 : 20] :- drop_rule
  1401. * BIT [31 : 21] :- reserved
  1402. */
  1403. A_UINT32 tx_flow_no__tid_num__drop_rule;
  1404. A_UINT32 last_cycle_enqueue_count;
  1405. A_UINT32 last_cycle_dequeue_count;
  1406. A_UINT32 last_cycle_drop_count;
  1407. /**
  1408. * BIT [15 : 0] :- current_drop_th
  1409. * BIT [31 : 16] :- reserved
  1410. */
  1411. A_UINT32 current_drop_th;
  1412. } htt_stats_peer_msdu_flowq_tlv;
  1413. /* preserve old name alias for new name consistent with the tag name */
  1414. typedef htt_stats_peer_msdu_flowq_tlv htt_msdu_flow_stats_tlv;
  1415. #define MAX_HTT_TID_NAME 8
  1416. /* DWORD sw_peer_id__tid_num */
  1417. #define HTT_TX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  1418. #define HTT_TX_TID_STATS_SW_PEER_ID_S 0
  1419. #define HTT_TX_TID_STATS_TID_NUM_M 0xffff0000
  1420. #define HTT_TX_TID_STATS_TID_NUM_S 16
  1421. #define HTT_TX_TID_STATS_SW_PEER_ID_GET(_var) \
  1422. (((_var) & HTT_TX_TID_STATS_SW_PEER_ID_M) >> \
  1423. HTT_TX_TID_STATS_SW_PEER_ID_S)
  1424. #define HTT_TX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  1425. do { \
  1426. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_SW_PEER_ID, _val); \
  1427. ((_var) |= ((_val) << HTT_TX_TID_STATS_SW_PEER_ID_S)); \
  1428. } while (0)
  1429. #define HTT_TX_TID_STATS_TID_NUM_GET(_var) \
  1430. (((_var) & HTT_TX_TID_STATS_TID_NUM_M) >> \
  1431. HTT_TX_TID_STATS_TID_NUM_S)
  1432. #define HTT_TX_TID_STATS_TID_NUM_SET(_var, _val) \
  1433. do { \
  1434. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_TID_NUM, _val); \
  1435. ((_var) |= ((_val) << HTT_TX_TID_STATS_TID_NUM_S)); \
  1436. } while (0)
  1437. /* DWORD num_sched_pending__num_ppdu_in_hwq */
  1438. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_M 0x000000ff
  1439. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_S 0
  1440. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M 0x0000ff00
  1441. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S 8
  1442. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_GET(_var) \
  1443. (((_var) & HTT_TX_TID_STATS_NUM_SCHED_PENDING_M) >> \
  1444. HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)
  1445. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_SET(_var, _val) \
  1446. do { \
  1447. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_SCHED_PENDING, _val); \
  1448. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)); \
  1449. } while (0)
  1450. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_GET(_var) \
  1451. (((_var) & HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M) >> \
  1452. HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)
  1453. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_SET(_var, _val) \
  1454. do { \
  1455. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ, _val); \
  1456. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)); \
  1457. } while (0)
  1458. /* Tidq stats */
  1459. typedef struct _htt_tx_tid_stats_tlv {
  1460. htt_tlv_hdr_t tlv_hdr;
  1461. /** Stored as little endian */
  1462. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  1463. /**
  1464. * BIT [15 : 0] :- sw_peer_id
  1465. * BIT [31 : 16] :- tid_num
  1466. */
  1467. A_UINT32 sw_peer_id__tid_num;
  1468. /**
  1469. * BIT [ 7 : 0] :- num_sched_pending
  1470. * BIT [15 : 8] :- num_ppdu_in_hwq
  1471. * BIT [31 : 16] :- reserved
  1472. */
  1473. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  1474. A_UINT32 tid_flags;
  1475. /** per tid # of hw_queued ppdu */
  1476. A_UINT32 hw_queued;
  1477. /** number of per tid successful PPDU */
  1478. A_UINT32 hw_reaped;
  1479. /** per tid Num MPDUs filtered by HW */
  1480. A_UINT32 mpdus_hw_filter;
  1481. A_UINT32 qdepth_bytes;
  1482. A_UINT32 qdepth_num_msdu;
  1483. A_UINT32 qdepth_num_mpdu;
  1484. A_UINT32 last_scheduled_tsmp;
  1485. A_UINT32 pause_module_id;
  1486. A_UINT32 block_module_id;
  1487. /** tid tx airtime in sec */
  1488. A_UINT32 tid_tx_airtime;
  1489. } htt_stats_tx_tid_details_tlv;
  1490. /* preserve old name alias for new name consistent with the tag name */
  1491. typedef htt_stats_tx_tid_details_tlv htt_tx_tid_stats_tlv;
  1492. /* Tidq stats */
  1493. typedef struct _htt_tx_tid_stats_v1_tlv {
  1494. htt_tlv_hdr_t tlv_hdr;
  1495. /** Stored as little endian */
  1496. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  1497. /**
  1498. * BIT [15 : 0] :- sw_peer_id
  1499. * BIT [31 : 16] :- tid_num
  1500. */
  1501. A_UINT32 sw_peer_id__tid_num;
  1502. /**
  1503. * BIT [ 7 : 0] :- num_sched_pending
  1504. * BIT [15 : 8] :- num_ppdu_in_hwq
  1505. * BIT [31 : 16] :- reserved
  1506. */
  1507. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  1508. A_UINT32 tid_flags;
  1509. /** Max qdepth in bytes reached by this tid */
  1510. A_UINT32 max_qdepth_bytes;
  1511. /** number of msdus qdepth reached max */
  1512. A_UINT32 max_qdepth_n_msdus;
  1513. A_UINT32 rsvd;
  1514. A_UINT32 qdepth_bytes;
  1515. A_UINT32 qdepth_num_msdu;
  1516. A_UINT32 qdepth_num_mpdu;
  1517. A_UINT32 last_scheduled_tsmp;
  1518. A_UINT32 pause_module_id;
  1519. A_UINT32 block_module_id;
  1520. /** tid tx airtime in sec */
  1521. A_UINT32 tid_tx_airtime;
  1522. A_UINT32 allow_n_flags;
  1523. /**
  1524. * BIT [15 : 0] :- sendn_frms_allowed
  1525. * BIT [31 : 16] :- reserved
  1526. */
  1527. A_UINT32 sendn_frms_allowed;
  1528. /*
  1529. * tid_ext_flags, tid_ext2_flags, and tid_flush_reason are opaque fields
  1530. * that cannot be interpreted by the host.
  1531. * They are only for off-line debug.
  1532. */
  1533. A_UINT32 tid_ext_flags;
  1534. A_UINT32 tid_ext2_flags;
  1535. A_UINT32 tid_flush_reason;
  1536. A_UINT32 mlo_flush_tqm_status_pending_low;
  1537. A_UINT32 mlo_flush_tqm_status_pending_high;
  1538. A_UINT32 mlo_flush_partner_info_low;
  1539. A_UINT32 mlo_flush_partner_info_high;
  1540. A_UINT32 mlo_flush_initator_info_low;
  1541. A_UINT32 mlo_flush_initator_info_high;
  1542. /*
  1543. * head_msdu_tqm_timestamp_us:
  1544. * MSDU enqueue timestamp (TQM reference timestamp) for the MSDU
  1545. * at the head of the MPDU queue
  1546. * head_msdu_tqm_latency_us:
  1547. * The age of the MSDU that is at the head of the MPDU queue,
  1548. * i.e. the delta between the current TQM time and the MSDU's
  1549. * enqueue timestamp.
  1550. */
  1551. A_UINT32 head_msdu_tqm_timestamp_us;
  1552. A_UINT32 head_msdu_tqm_latency_us;
  1553. } htt_stats_tx_tid_details_v1_tlv;
  1554. /* preserve old name alias for new name consistent with the tag name */
  1555. typedef htt_stats_tx_tid_details_v1_tlv htt_tx_tid_stats_v1_tlv;
  1556. #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  1557. #define HTT_RX_TID_STATS_SW_PEER_ID_S 0
  1558. #define HTT_RX_TID_STATS_TID_NUM_M 0xffff0000
  1559. #define HTT_RX_TID_STATS_TID_NUM_S 16
  1560. #define HTT_RX_TID_STATS_SW_PEER_ID_GET(_var) \
  1561. (((_var) & HTT_RX_TID_STATS_SW_PEER_ID_M) >> \
  1562. HTT_RX_TID_STATS_SW_PEER_ID_S)
  1563. #define HTT_RX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  1564. do { \
  1565. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_SW_PEER_ID, _val); \
  1566. ((_var) |= ((_val) << HTT_RX_TID_STATS_SW_PEER_ID_S)); \
  1567. } while (0)
  1568. #define HTT_RX_TID_STATS_TID_NUM_GET(_var) \
  1569. (((_var) & HTT_RX_TID_STATS_TID_NUM_M) >> \
  1570. HTT_RX_TID_STATS_TID_NUM_S)
  1571. #define HTT_RX_TID_STATS_TID_NUM_SET(_var, _val) \
  1572. do { \
  1573. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_TID_NUM, _val); \
  1574. ((_var) |= ((_val) << HTT_RX_TID_STATS_TID_NUM_S)); \
  1575. } while (0)
  1576. typedef struct _htt_rx_tid_stats_tlv {
  1577. htt_tlv_hdr_t tlv_hdr;
  1578. /**
  1579. * BIT [15 : 0] : sw_peer_id
  1580. * BIT [31 : 16] : tid_num
  1581. */
  1582. A_UINT32 sw_peer_id__tid_num;
  1583. /** Stored as little endian */
  1584. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  1585. /**
  1586. * dup_in_reorder not collected per tid for now,
  1587. * as there is no wal_peer back ptr in data rx peer.
  1588. */
  1589. A_UINT32 dup_in_reorder;
  1590. A_UINT32 dup_past_outside_window;
  1591. A_UINT32 dup_past_within_window;
  1592. /** Number of per tid MSDUs with flag of decrypt_err */
  1593. A_UINT32 rxdesc_err_decrypt;
  1594. /** tid rx airtime in sec */
  1595. A_UINT32 tid_rx_airtime;
  1596. } htt_stats_rx_tid_details_tlv;
  1597. /* preserve old name alias for new name consistent with the tag name */
  1598. typedef htt_stats_rx_tid_details_tlv htt_rx_tid_stats_tlv;
  1599. #define HTT_MAX_COUNTER_NAME 8
  1600. typedef struct {
  1601. htt_tlv_hdr_t tlv_hdr;
  1602. /** Stored as little endian */
  1603. A_UINT8 counter_name[HTT_MAX_COUNTER_NAME];
  1604. A_UINT32 count;
  1605. } htt_stats_counter_name_tlv;
  1606. /* preserve old name alias for new name consistent with the tag name */
  1607. typedef htt_stats_counter_name_tlv htt_counter_tlv;
  1608. typedef struct {
  1609. htt_tlv_hdr_t tlv_hdr;
  1610. /** Number of rx PPDU */
  1611. A_UINT32 ppdu_cnt;
  1612. /** Number of rx MPDU */
  1613. A_UINT32 mpdu_cnt;
  1614. /** Number of rx MSDU */
  1615. A_UINT32 msdu_cnt;
  1616. /** pause bitmap */
  1617. A_UINT32 pause_bitmap;
  1618. /** block bitmap */
  1619. A_UINT32 block_bitmap;
  1620. /** current timestamp */
  1621. A_UINT32 current_timestamp;
  1622. /** Peer cumulative tx airtime in sec */
  1623. A_UINT32 peer_tx_airtime;
  1624. /** Peer cumulative rx airtime in sec */
  1625. A_UINT32 peer_rx_airtime;
  1626. /** Peer current rssi in dBm */
  1627. A_INT32 rssi;
  1628. /** Total enqueued, dequeued and dropped MSDU's for peer */
  1629. A_UINT32 peer_enqueued_count_low;
  1630. A_UINT32 peer_enqueued_count_high;
  1631. A_UINT32 peer_dequeued_count_low;
  1632. A_UINT32 peer_dequeued_count_high;
  1633. A_UINT32 peer_dropped_count_low;
  1634. A_UINT32 peer_dropped_count_high;
  1635. /** Total ppdu transmitted bytes for peer: includes MAC header overhead */
  1636. A_UINT32 ppdu_transmitted_bytes_low;
  1637. A_UINT32 ppdu_transmitted_bytes_high;
  1638. A_UINT32 peer_ttl_removed_count;
  1639. /**
  1640. * inactive_time
  1641. * Running duration of the time since last tx/rx activity by this peer,
  1642. * units = seconds.
  1643. * If the peer is currently active, this inactive_time will be 0x0.
  1644. */
  1645. A_UINT32 inactive_time;
  1646. /** Number of MPDUs dropped after max retries */
  1647. A_UINT32 remove_mpdus_max_retries;
  1648. } htt_stats_peer_stats_cmn_tlv;
  1649. /* preserve old name alias for new name consistent with the tag name */
  1650. typedef htt_stats_peer_stats_cmn_tlv htt_peer_stats_cmn_tlv;
  1651. #define HTT_PEER_DETAILS_ML_PEER_OFFSET_BYTES 32
  1652. #define HTT_PEER_DETAILS_ML_PEER_OFFSET_DWORD 8
  1653. #define HTT_PEER_DETAILS_ML_PEER_ID_VALID_M 0x00000001
  1654. #define HTT_PEER_DETAILS_ML_PEER_ID_VALID_S 0
  1655. #define HTT_PEER_DETAILS_ML_PEER_ID_M 0x00001ffe
  1656. #define HTT_PEER_DETAILS_ML_PEER_ID_S 1
  1657. #define HTT_PEER_DETAILS_LINK_IDX_M 0x001fe000
  1658. #define HTT_PEER_DETAILS_LINK_IDX_S 13
  1659. #define HTT_PEER_DETAILS_USE_PPE_M 0x00200000
  1660. #define HTT_PEER_DETAILS_USE_PPE_S 21
  1661. #define HTT_PEER_DETAILS_SRC_INFO_M 0x00000fff
  1662. #define HTT_PEER_DETAILS_SRC_INFO_S 0
  1663. #define HTT_PEER_DETAILS_SET(word, httsym, val) \
  1664. do { \
  1665. HTT_CHECK_SET_VAL(HTT_PEER_DETAILS_ ## httsym, val); \
  1666. (word) |= ((val) << HTT_PEER_DETAILS_ ## httsym ## _S); \
  1667. } while(0)
  1668. #define HTT_PEER_DETAILS_GET(word, httsym) \
  1669. (((word) & HTT_PEER_DETAILS_ ## httsym ## _M) >> HTT_PEER_DETAILS_ ## httsym ## _S)
  1670. typedef struct {
  1671. htt_tlv_hdr_t tlv_hdr;
  1672. /** This enum type of HTT_PEER_TYPE */
  1673. A_UINT32 peer_type;
  1674. A_UINT32 sw_peer_id;
  1675. /**
  1676. * BIT [7 : 0] :- vdev_id
  1677. * BIT [15 : 8] :- pdev_id
  1678. * BIT [31 : 16] :- ast_indx
  1679. */
  1680. A_UINT32 vdev_pdev_ast_idx;
  1681. htt_mac_addr mac_addr;
  1682. A_UINT32 peer_flags;
  1683. A_UINT32 qpeer_flags;
  1684. /* Dword 8 */
  1685. union {
  1686. A_UINT32 word__ml_peer_id_valid__ml_peer_id__link_idx__use_ppe;
  1687. struct {
  1688. A_UINT32 ml_peer_id_valid : 1, /* [0:0] */
  1689. ml_peer_id : 12, /* [12:1] */
  1690. link_idx : 8, /* [20:13] */
  1691. use_ppe : 1, /* [21:21] */
  1692. rsvd0 : 10; /* [31:22] */
  1693. };
  1694. };
  1695. /* Dword 9 */
  1696. union {
  1697. A_UINT32 word__src_info;
  1698. struct {
  1699. A_UINT32 src_info : 12, /* [11:0] */
  1700. rsvd1 : 20; /* [31:12] */
  1701. };
  1702. };
  1703. } htt_stats_peer_details_tlv;
  1704. /* preserve old name alias for new name consistent with the tag name */
  1705. typedef htt_stats_peer_details_tlv htt_peer_details_tlv;
  1706. #define HTT_STATS_PEER_DETAILS_ML_PEER_ID_VALID_GET(word) ((word >> 0) & 0x1)
  1707. #define HTT_STATS_PEER_DETAILS_ML_PEER_ID_GET(word) ((word >> 1) & 0xfff)
  1708. #define HTT_STATS_PEER_DETAILS_LINK_IDX_GET(word) ((word >> 13) & 0xff)
  1709. #define HTT_STATS_PEER_DETAILS_USE_PPE_GET(word) ((word >> 21) & 0x1)
  1710. #define HTT_STATS_PEER_DETAILS_SRC_INFO_GET(word) ((word >> 0) & 0xfff)
  1711. typedef struct {
  1712. htt_tlv_hdr_t tlv_hdr;
  1713. A_UINT32 sw_peer_id;
  1714. A_UINT32 ast_index;
  1715. htt_mac_addr mac_addr;
  1716. A_UINT32
  1717. pdev_id : 2,
  1718. vdev_id : 8,
  1719. next_hop : 1,
  1720. mcast : 1,
  1721. monitor_direct : 1,
  1722. mesh_sta : 1,
  1723. mec : 1,
  1724. intra_bss : 1,
  1725. chip_id : 2,
  1726. ml_peer_id : 13,
  1727. on_chip : 1;
  1728. A_UINT32
  1729. tx_monitor_override_sta : 1,
  1730. rx_monitor_override_sta : 1,
  1731. reserved1 : 30;
  1732. } htt_stats_ast_entry_tlv;
  1733. /* preserve old name alias for new name consistent with the tag name */
  1734. typedef htt_stats_ast_entry_tlv htt_ast_entry_tlv;
  1735. typedef enum {
  1736. HTT_STATS_DIRECTION_TX,
  1737. HTT_STATS_DIRECTION_RX,
  1738. } HTT_STATS_DIRECTION;
  1739. typedef enum {
  1740. HTT_STATS_PPDU_TYPE_MODE_SU,
  1741. HTT_STATS_PPDU_TYPE_DL_MU_MIMO,
  1742. HTT_STATS_PPDU_TYPE_UL_MU_MIMO,
  1743. HTT_STATS_PPDU_TYPE_DL_MU_OFDMA,
  1744. HTT_STATS_PPDU_TYPE_UL_MU_OFDMA,
  1745. } HTT_STATS_PPDU_TYPE;
  1746. typedef enum {
  1747. HTT_STATS_PREAM_OFDM,
  1748. HTT_STATS_PREAM_CCK,
  1749. HTT_STATS_PREAM_HT,
  1750. HTT_STATS_PREAM_VHT,
  1751. HTT_STATS_PREAM_HE,
  1752. HTT_STATS_PREAM_EHT,
  1753. HTT_STATS_PREAM_RSVD1,
  1754. HTT_STATS_PREAM_COUNT,
  1755. } HTT_STATS_PREAM_TYPE;
  1756. #define HTT_TX_PEER_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  1757. #define HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  1758. #define HTT_TX_PEER_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
  1759. /* HTT_TX_PEER_STATS_NUM_GI_COUNTERS:
  1760. * GI Index 0: WHAL_GI_800
  1761. * GI Index 1: WHAL_GI_400
  1762. * GI Index 2: WHAL_GI_1600
  1763. * GI Index 3: WHAL_GI_3200
  1764. */
  1765. #define HTT_TX_PEER_STATS_NUM_GI_COUNTERS 4
  1766. #define HTT_TX_PEER_STATS_NUM_DCM_COUNTERS 5
  1767. /* HTT_TX_PEER_STATS_NUM_BW_COUNTERS:
  1768. * bw index 0: rssi_pri20_chain0
  1769. * bw index 1: rssi_ext20_chain0
  1770. * bw index 2: rssi_ext40_low20_chain0
  1771. * bw index 3: rssi_ext40_high20_chain0
  1772. */
  1773. #define HTT_TX_PEER_STATS_NUM_BW_COUNTERS 4
  1774. /* HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS:
  1775. * bw index 4 (bw ext index 0): rssi_ext80_low20_chain0
  1776. * bw index 5 (bw ext index 1): rssi_ext80_low_high20_chain0
  1777. * bw index 6 (bw ext index 2): rssi_ext80_high_low20_chain0
  1778. * bw index 7 (bw ext index 3): rssi_ext80_high20_chain0
  1779. */
  1780. #define HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS 4
  1781. #define HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS 4
  1782. /* HTT_RX STATS_NUM_BW_EXT_2_COUNTERS:
  1783. * bw index 8 (bw ext_2 index 0): rssi_ext160_0_chainX
  1784. * bw index 9 (bw ext_2 index 1): rssi_ext160_1_chainX
  1785. * bw index 10 (bw ext_2 index 2): rssi_ext160_2_chainX
  1786. * bw index 11 (bw ext_2 index 3): rssi_ext160_3_chainX
  1787. * bw index 12 (bw ext_2 index 4): rssi_ext160_4_chainX
  1788. * bw index 13 (bw ext_2 index 5): rssi_ext160_5_chainX
  1789. * bw index 14 (bw ext_2 index 6): rssi_ext160_6_chainX
  1790. * bw index 15 (bw ext_2 index 7): rssi_ext160_7_chainX
  1791. */
  1792. #define HTT_RX_PDEV_STATS_NUM_BW_EXT_2_COUNTERS 8
  1793. #define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1794. #define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1795. #define HTT_TX_PEER_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  1796. typedef struct _htt_tx_peer_rate_stats_tlv {
  1797. htt_tlv_hdr_t tlv_hdr;
  1798. /** Number of tx LDPC packets */
  1799. A_UINT32 tx_ldpc;
  1800. /** Number of tx RTS packets */
  1801. A_UINT32 rts_cnt;
  1802. /** RSSI value of last ack packet (units = dB above noise floor) */
  1803. A_UINT32 ack_rssi;
  1804. A_UINT32 tx_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1805. A_UINT32 tx_su_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1806. A_UINT32 tx_mu_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1807. /**
  1808. * element 0,1, ...7 -> NSS 1,2, ...8
  1809. */
  1810. A_UINT32 tx_nss[HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS];
  1811. /**
  1812. * element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz
  1813. */
  1814. A_UINT32 tx_bw[HTT_TX_PEER_STATS_NUM_BW_COUNTERS];
  1815. A_UINT32 tx_stbc[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1816. A_UINT32 tx_pream[HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1817. /**
  1818. * Counters to track number of tx packets in each GI
  1819. * (400us, 800us, 1600us & 3200us) in each mcs (0-11)
  1820. */
  1821. A_UINT32 tx_gi[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1822. /** Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  1823. A_UINT32 tx_dcm[HTT_TX_PEER_STATS_NUM_DCM_COUNTERS];
  1824. /** Stats for MCS 12/13 */
  1825. A_UINT32 tx_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1826. A_UINT32 tx_su_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1827. A_UINT32 tx_mu_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1828. A_UINT32 tx_stbc_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1829. A_UINT32 tx_gi_ext[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1830. A_UINT32 reduced_tx_bw[HTT_TX_PEER_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PEER_STATS_NUM_BW_COUNTERS];
  1831. A_UINT32 tx_bw_320mhz;
  1832. /* MCS 14,15 */
  1833. A_UINT32 tx_mcs_ext_2[HTT_TX_PEER_STATS_NUM_EXTRA2_MCS_COUNTERS];
  1834. } htt_stats_peer_tx_rate_stats_tlv;
  1835. /* preserve old name alias for new name consistent with the tag name */
  1836. typedef htt_stats_peer_tx_rate_stats_tlv htt_tx_peer_rate_stats_tlv;
  1837. #define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  1838. #define HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  1839. #define HTT_RX_PEER_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
  1840. #define HTT_RX_PEER_STATS_NUM_GI_COUNTERS 4
  1841. #define HTT_RX_PEER_STATS_NUM_DCM_COUNTERS 5
  1842. #define HTT_RX_PEER_STATS_NUM_BW_COUNTERS 4
  1843. #define HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1844. #define HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1845. #define HTT_RX_PEER_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  1846. typedef struct _htt_rx_peer_rate_stats_tlv {
  1847. htt_tlv_hdr_t tlv_hdr;
  1848. A_UINT32 nsts;
  1849. /** Number of rx LDPC packets */
  1850. A_UINT32 rx_ldpc;
  1851. /** Number of rx RTS packets */
  1852. A_UINT32 rts_cnt;
  1853. /** units = dB above noise floor */
  1854. A_UINT32 rssi_mgmt;
  1855. /** units = dB above noise floor */
  1856. A_UINT32 rssi_data;
  1857. /** units = dB above noise floor */
  1858. A_UINT32 rssi_comb;
  1859. A_UINT32 rx_mcs[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1860. /**
  1861. * element 0,1, ...7 -> NSS 1,2, ...8
  1862. */
  1863. A_UINT32 rx_nss[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS];
  1864. A_UINT32 rx_dcm[HTT_RX_PEER_STATS_NUM_DCM_COUNTERS];
  1865. A_UINT32 rx_stbc[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1866. /**
  1867. * element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz
  1868. */
  1869. A_UINT32 rx_bw[HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1870. A_UINT32 rx_pream[HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1871. /** units = dB above noise floor */
  1872. A_UINT8 rssi_chain[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1873. /** Counters to track number of rx packets in each GI in each mcs (0-11) */
  1874. A_UINT32 rx_gi[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1875. A_UINT32 rx_ulofdma_non_data_ppdu; /** PPDU level */
  1876. A_UINT32 rx_ulofdma_data_ppdu; /** PPDU level */
  1877. A_UINT32 rx_ulofdma_mpdu_ok; /** MPDU level */
  1878. A_UINT32 rx_ulofdma_mpdu_fail; /** MPDU level */
  1879. A_INT8 rx_ul_fd_rssi[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* dBm unit */
  1880. /* per_chain_rssi_pkt_type:
  1881. * This field shows what type of rx frame the per-chain RSSI was computed
  1882. * on, by recording the frame type and sub-type as bit-fields within this
  1883. * field:
  1884. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  1885. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  1886. * BIT [31 : 8] :- Reserved
  1887. */
  1888. A_UINT32 per_chain_rssi_pkt_type;
  1889. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1890. /** PPDU level */
  1891. A_UINT32 rx_ulmumimo_non_data_ppdu;
  1892. /** PPDU level */
  1893. A_UINT32 rx_ulmumimo_data_ppdu;
  1894. /** MPDU level */
  1895. A_UINT32 rx_ulmumimo_mpdu_ok;
  1896. /** mpdu level */
  1897. A_UINT32 rx_ulmumimo_mpdu_fail;
  1898. /** units = dB above noise floor */
  1899. A_UINT8 rssi_chain_ext[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS];
  1900. /** Stats for MCS 12/13 */
  1901. A_UINT32 rx_mcs_ext[HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1902. A_UINT32 rx_stbc_ext[HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1903. A_UINT32 rx_gi_ext[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1904. A_UINT32 reduced_rx_bw[HTT_RX_PEER_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1905. A_INT8 rx_per_chain_rssi_in_dbm_ext[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS];
  1906. A_UINT32 rx_bw_320mhz;
  1907. /* MCS 14,15 */
  1908. A_UINT32 rx_mcs_ext_2[HTT_RX_PEER_STATS_NUM_EXTRA2_MCS_COUNTERS];
  1909. } htt_stats_peer_rx_rate_stats_tlv;
  1910. /* preserve old name alias for new name consistent with the tag name */
  1911. typedef htt_stats_peer_rx_rate_stats_tlv htt_rx_peer_rate_stats_tlv;
  1912. typedef enum {
  1913. HTT_PEER_STATS_REQ_MODE_NO_QUERY,
  1914. HTT_PEER_STATS_REQ_MODE_QUERY_TQM,
  1915. HTT_PEER_STATS_REQ_MODE_FLUSH_TQM,
  1916. } htt_peer_stats_req_mode_t;
  1917. typedef enum {
  1918. HTT_PEER_STATS_CMN_TLV = 0,
  1919. HTT_PEER_DETAILS_TLV = 1,
  1920. HTT_TX_PEER_RATE_STATS_TLV = 2,
  1921. HTT_RX_PEER_RATE_STATS_TLV = 3,
  1922. HTT_TX_TID_STATS_TLV = 4,
  1923. HTT_RX_TID_STATS_TLV = 5,
  1924. HTT_MSDU_FLOW_STATS_TLV = 6,
  1925. HTT_PEER_SCHED_STATS_TLV = 7,
  1926. HTT_PEER_AX_OFDMA_STATS_TLV = 8,
  1927. HTT_PEER_BE_OFDMA_STATS_TLV = 9,
  1928. HTT_PEER_STATS_MAX_TLV = 31,
  1929. } htt_peer_stats_tlv_enum;
  1930. typedef struct {
  1931. htt_tlv_hdr_t tlv_hdr;
  1932. A_UINT32 peer_id;
  1933. /** Num of DL schedules for peer */
  1934. A_UINT32 num_sched_dl;
  1935. /** Num od UL schedules for peer */
  1936. A_UINT32 num_sched_ul;
  1937. /** Peer TX time */
  1938. A_UINT32 peer_tx_active_dur_us_low;
  1939. A_UINT32 peer_tx_active_dur_us_high;
  1940. /** Peer RX time */
  1941. A_UINT32 peer_rx_active_dur_us_low;
  1942. A_UINT32 peer_rx_active_dur_us_high;
  1943. A_UINT32 peer_curr_rate_kbps;
  1944. } htt_stats_peer_sched_stats_tlv;
  1945. /* preserve old name alias for new name consistent with the tag name */
  1946. typedef htt_stats_peer_sched_stats_tlv htt_peer_sched_stats_tlv;
  1947. typedef struct {
  1948. htt_tlv_hdr_t tlv_hdr;
  1949. A_UINT32 peer_id;
  1950. A_UINT32 ax_basic_trig_count;
  1951. A_UINT32 ax_basic_trig_err;
  1952. A_UINT32 ax_bsr_trig_count;
  1953. A_UINT32 ax_bsr_trig_err;
  1954. A_UINT32 ax_mu_bar_trig_count;
  1955. A_UINT32 ax_mu_bar_trig_err;
  1956. A_UINT32 ax_basic_trig_with_per;
  1957. A_UINT32 ax_bsr_trig_with_per;
  1958. A_UINT32 ax_mu_bar_trig_with_per;
  1959. /* is_airtime_large_for_dl_ofdma, is_airtime_large_for_ul_ofdma
  1960. * These fields contain 2 counters each. The first element in each
  1961. * array counts how many times the airtime is short enough to use
  1962. * OFDMA, and the second element in each array counts how many times the
  1963. * airtime is too large to select OFDMA for the PPDUs involving the peer.
  1964. */
  1965. A_UINT32 is_airtime_large_for_dl_ofdma[2];
  1966. A_UINT32 is_airtime_large_for_ul_ofdma[2];
  1967. /* Last updated value of DL and UL queue depths for each peer per AC */
  1968. A_UINT32 last_updated_dl_qdepth[HTT_NUM_AC_WMM];
  1969. A_UINT32 last_updated_ul_qdepth[HTT_NUM_AC_WMM];
  1970. /* Per peer Manual 11ax UL OFDMA trigger and trigger error counts */
  1971. A_UINT32 ax_manual_ulofdma_trig_count;
  1972. A_UINT32 ax_manual_ulofdma_trig_err_count;
  1973. } htt_stats_peer_ax_ofdma_stats_tlv;
  1974. /* preserve old name alias for new name consistent with the tag name */
  1975. typedef htt_stats_peer_ax_ofdma_stats_tlv htt_peer_ax_ofdma_stats_tlv;
  1976. typedef struct {
  1977. htt_tlv_hdr_t tlv_hdr;
  1978. A_UINT32 peer_id;
  1979. /* Per peer Manual 11be UL OFDMA trigger and trigger error counts */
  1980. A_UINT32 be_manual_ulofdma_trig_count;
  1981. A_UINT32 be_manual_ulofdma_trig_err_count;
  1982. } htt_stats_peer_be_ofdma_stats_tlv;
  1983. /* preserve old name alias for new name consistent with the tag name */
  1984. typedef htt_stats_peer_be_ofdma_stats_tlv htt_peer_be_ofdma_stats_tlv;
  1985. /* config_param0 */
  1986. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_M 0x00000001
  1987. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_S 0
  1988. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_GET(_var) \
  1989. (((_var) & HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_M) >> \
  1990. HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_S)
  1991. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_SET(_var, _val) \
  1992. do { \
  1993. HTT_CHECK_SET_VAL(HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR, _val); \
  1994. ((_var) |= ((_val) << HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_S)); \
  1995. } while (0)
  1996. /* DEPRECATED
  1997. * The old IS_peer_MAC_ADDR_SET macro name is being retained for now,
  1998. * as an alias for the corrected macro name.
  1999. * If/when all references to the old name are removed, the definition of
  2000. * the old name will also be removed.
  2001. */
  2002. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_peer_MAC_ADDR_SET HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_SET
  2003. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M 0x00000001
  2004. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S 0
  2005. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_M 0x0000FFFE
  2006. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_S 1
  2007. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M 0xFFFF0000
  2008. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S 16
  2009. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(_var, _val) \
  2010. do { \
  2011. HTT_CHECK_SET_VAL(HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR, _val); \
  2012. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)); \
  2013. } while (0)
  2014. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_GET(_var) \
  2015. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M) >> \
  2016. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)
  2017. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_GET(_var) \
  2018. (((_var) & HTT_DBG_EXT_STATS_PEER_REQ_MODE_M) >> \
  2019. HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)
  2020. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_SET(_var, _val) \
  2021. do { \
  2022. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)); \
  2023. } while (0)
  2024. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_GET(_var) \
  2025. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M) >> \
  2026. HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)
  2027. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_SET(_var, _val) \
  2028. do { \
  2029. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)); \
  2030. } while (0)
  2031. /* STATS_TYPE : HTT_DBG_EXT_STATS_PEER_INFO
  2032. * TLV_TAGS:
  2033. * - HTT_STATS_PEER_STATS_CMN_TAG
  2034. * - HTT_STATS_PEER_DETAILS_TAG
  2035. * - HTT_STATS_PEER_TX_RATE_STATS_TAG
  2036. * - HTT_STATS_PEER_RX_RATE_STATS_TAG
  2037. * - HTT_STATS_TX_TID_DETAILS_TAG (multiple) (deprecated, so 0 elements in updated systems)
  2038. * - HTT_STATS_RX_TID_DETAILS_TAG (multiple)
  2039. * - HTT_STATS_PEER_MSDU_FLOWQ_TAG (multiple)
  2040. * - HTT_STATS_TX_TID_DETAILS_V1_TAG (multiple)
  2041. * - HTT_STATS_PEER_SCHED_STATS_TAG
  2042. * - HTT_STATS_PEER_AX_OFDMA_STATS_TAG
  2043. */
  2044. /* NOTE:
  2045. * This structure is for documentation, and cannot be safely used directly.
  2046. * Instead, use the constituent TLV structures to fill/parse.
  2047. */
  2048. #ifdef ATH_TARGET
  2049. typedef struct _htt_peer_stats {
  2050. htt_stats_peer_stats_cmn_tlv cmn_tlv;
  2051. htt_stats_peer_details_tlv peer_details;
  2052. /* from g_rate_info_stats */
  2053. htt_stats_peer_tx_rate_stats_tlv tx_rate;
  2054. htt_stats_peer_rx_rate_stats_tlv rx_rate;
  2055. htt_stats_tx_tid_details_tlv tx_tid_stats[1];
  2056. htt_stats_rx_tid_details_tlv rx_tid_stats[1];
  2057. htt_stats_peer_msdu_flowq_tlv msdu_flowq[1];
  2058. htt_stats_tx_tid_details_v1_tlv tx_tid_stats_v1[1];
  2059. htt_stats_peer_sched_stats_tlv peer_sched_stats;
  2060. htt_stats_peer_ax_ofdma_stats_tlv ax_ofdma_stats;
  2061. htt_stats_peer_be_ofdma_stats_tlv be_ofdma_stats;
  2062. } htt_peer_stats_t;
  2063. #endif /* ATH_TARGET */
  2064. /* =========== ACTIVE PEER LIST ========== */
  2065. /* STATS_TYPE: HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  2066. * TLV_TAGS:
  2067. * - HTT_STATS_PEER_DETAILS_TAG
  2068. */
  2069. /* NOTE:
  2070. * This structure is for documentation, and cannot be safely used directly.
  2071. * Instead, use the constituent TLV structures to fill/parse.
  2072. */
  2073. #ifdef ATH_TARGET
  2074. typedef struct {
  2075. htt_stats_peer_details_tlv peer_details[1];
  2076. } htt_active_peer_details_list_t;
  2077. #endif /* ATH_TARGET */
  2078. /* =========== MUMIMO HWQ stats =========== */
  2079. /* MU MIMO stats per hwQ */
  2080. typedef struct {
  2081. htt_tlv_hdr_t tlv_hdr;
  2082. /** number of MU MIMO schedules posted to HW */
  2083. A_UINT32 mu_mimo_sch_posted;
  2084. /** number of MU MIMO schedules failed to post */
  2085. A_UINT32 mu_mimo_sch_failed;
  2086. /** number of MU MIMO PPDUs posted to HW */
  2087. A_UINT32 mu_mimo_ppdu_posted;
  2088. } htt_stats_tx_hwq_mumimo_sch_stats_tlv;
  2089. /* preserve old name alias for new name consistent with the tag name */
  2090. typedef htt_stats_tx_hwq_mumimo_sch_stats_tlv htt_tx_hwq_mu_mimo_sch_stats_tlv;
  2091. typedef struct {
  2092. htt_tlv_hdr_t tlv_hdr;
  2093. /** 11AC DL MU MIMO number of mpdus queued to HW, per user */
  2094. A_UINT32 mu_mimo_mpdus_queued_usr;
  2095. /** 11AC DL MU MIMO number of mpdus tried over the air, per user */
  2096. A_UINT32 mu_mimo_mpdus_tried_usr;
  2097. /** 11AC DL MU MIMO number of mpdus failed acknowledgement, per user */
  2098. A_UINT32 mu_mimo_mpdus_failed_usr;
  2099. /** 11AC DL MU MIMO number of mpdus re-queued to HW, per user */
  2100. A_UINT32 mu_mimo_mpdus_requeued_usr;
  2101. /** 11AC DL MU MIMO BA not received, per user */
  2102. A_UINT32 mu_mimo_err_no_ba_usr;
  2103. /** 11AC DL MU MIMO mpdu underrun encountered, per user */
  2104. A_UINT32 mu_mimo_mpdu_underrun_usr;
  2105. /** 11AC DL MU MIMO ampdu underrun encountered, per user */
  2106. A_UINT32 mu_mimo_ampdu_underrun_usr;
  2107. } htt_stats_tx_hwq_mumimo_mpdu_stats_tlv;
  2108. /* preserve old name alias for new name consistent with the tag name */
  2109. typedef htt_stats_tx_hwq_mumimo_mpdu_stats_tlv
  2110. htt_tx_hwq_mu_mimo_mpdu_stats_tlv;
  2111. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M 0x000000ff
  2112. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S 0
  2113. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M 0x0000ff00
  2114. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S 8
  2115. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_GET(_var) \
  2116. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M) >> \
  2117. HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)
  2118. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_SET(_var, _val) \
  2119. do { \
  2120. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID, _val); \
  2121. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)); \
  2122. } while (0)
  2123. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_GET(_var) \
  2124. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M) >> \
  2125. HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)
  2126. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_SET(_var, _val) \
  2127. do { \
  2128. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID, _val); \
  2129. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)); \
  2130. } while (0)
  2131. typedef struct {
  2132. htt_tlv_hdr_t tlv_hdr;
  2133. /**
  2134. * BIT [ 7 : 0] :- mac_id
  2135. * BIT [15 : 8] :- hwq_id
  2136. * BIT [31 : 16] :- reserved
  2137. */
  2138. A_UINT32 mac_id__hwq_id__word;
  2139. } htt_stats_tx_hwq_mumimo_cmn_stats_tlv;
  2140. /* preserve old name alias for new name consistent with the tag name */
  2141. typedef htt_stats_tx_hwq_mumimo_cmn_stats_tlv htt_tx_hwq_mu_mimo_cmn_stats_tlv;
  2142. /* NOTE:
  2143. * This structure is for documentation, and cannot be safely used directly.
  2144. * Instead, use the constituent TLV structures to fill/parse.
  2145. */
  2146. #ifdef ATH_TARGET
  2147. typedef struct {
  2148. struct {
  2149. htt_stats_tx_hwq_mumimo_cmn_stats_tlv cmn_tlv;
  2150. /** WAL_TX_STATS_MAX_GROUP_SIZE */
  2151. htt_stats_tx_hwq_mumimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1];
  2152. /** WAL_TX_STATS_TX_MAX_NUM_USERS */
  2153. htt_stats_tx_hwq_mumimo_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1];
  2154. } hwq[1];
  2155. } htt_tx_hwq_mu_mimo_stats_t;
  2156. #endif /* ATH_TARGET */
  2157. /* == TX HWQ STATS == */
  2158. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_M 0x000000ff
  2159. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_S 0
  2160. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_M 0x0000ff00
  2161. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_S 8
  2162. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_GET(_var) \
  2163. (((_var) & HTT_TX_HWQ_STATS_CMN_MAC_ID_M) >> \
  2164. HTT_TX_HWQ_STATS_CMN_MAC_ID_S)
  2165. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_SET(_var, _val) \
  2166. do { \
  2167. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_MAC_ID, _val); \
  2168. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_MAC_ID_S)); \
  2169. } while (0)
  2170. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_GET(_var) \
  2171. (((_var) & HTT_TX_HWQ_STATS_CMN_HWQ_ID_M) >> \
  2172. HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)
  2173. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_SET(_var, _val) \
  2174. do { \
  2175. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_HWQ_ID, _val); \
  2176. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)); \
  2177. } while (0)
  2178. typedef struct {
  2179. htt_tlv_hdr_t tlv_hdr;
  2180. /**
  2181. * BIT [ 7 : 0] :- mac_id
  2182. * BIT [15 : 8] :- hwq_id
  2183. * BIT [31 : 16] :- reserved
  2184. */
  2185. A_UINT32 mac_id__hwq_id__word;
  2186. /*--- PPDU level stats */
  2187. /** Number of times ack is failed for the PPDU scheduled on this txQ */
  2188. A_UINT32 xretry;
  2189. /** Number of times sched cmd status reported mpdu underrun */
  2190. A_UINT32 underrun_cnt;
  2191. /** Number of times sched cmd is flushed */
  2192. A_UINT32 flush_cnt;
  2193. /** Number of times sched cmd is filtered */
  2194. A_UINT32 filt_cnt;
  2195. /** Number of times HWSCH uploaded null mpdu bitmap */
  2196. A_UINT32 null_mpdu_bmap;
  2197. /**
  2198. * Number of times user ack or BA TLV is not seen on FES ring
  2199. * where it is expected to be
  2200. */
  2201. A_UINT32 user_ack_failure;
  2202. /** Number of times TQM processed ack TLV received from HWSCH */
  2203. A_UINT32 ack_tlv_proc;
  2204. /** Cache latest processed scheduler ID received from ack BA TLV */
  2205. A_UINT32 sched_id_proc;
  2206. /** Number of times TxPCU reported MPDUs transmitted for a user is zero */
  2207. A_UINT32 null_mpdu_tx_count;
  2208. /**
  2209. * Number of times SW did not see any MPDU info bitmap TLV
  2210. * on FES status ring
  2211. */
  2212. A_UINT32 mpdu_bmap_not_recvd;
  2213. /*--- Selfgen stats per hwQ */
  2214. /** Number of SU/MU BAR frames posted to hwQ */
  2215. A_UINT32 num_bar;
  2216. /** Number of RTS frames posted to hwQ */
  2217. A_UINT32 rts;
  2218. /** Number of cts2self frames posted to hwQ */
  2219. A_UINT32 cts2self;
  2220. /** Number of qos null frames posted to hwQ */
  2221. A_UINT32 qos_null;
  2222. /*--- MPDU level stats */
  2223. /** mpdus tried Tx by HWSCH/TQM */
  2224. A_UINT32 mpdu_tried_cnt;
  2225. /** mpdus queued to HWSCH */
  2226. A_UINT32 mpdu_queued_cnt;
  2227. /** mpdus tried but ack was not received */
  2228. A_UINT32 mpdu_ack_fail_cnt;
  2229. /** This will include sched cmd flush and time based discard */
  2230. A_UINT32 mpdu_filt_cnt;
  2231. /** Number of MPDUs for which ACK was successful but no Tx happened */
  2232. A_UINT32 false_mpdu_ack_count;
  2233. /** Number of times txq timeout happened */
  2234. A_UINT32 txq_timeout;
  2235. } htt_stats_tx_hwq_cmn_tlv;
  2236. /* preserve old name alias for new name consistent with the tag name */
  2237. typedef htt_stats_tx_hwq_cmn_tlv htt_tx_hwq_stats_cmn_tlv;
  2238. #define HTT_TX_HWQ_DIFS_LATENCY_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) + /* hist_intvl */ \
  2239. (sizeof(A_UINT32) * (_num_elems)))
  2240. /* NOTE: Variable length TLV, use length spec to infer array size */
  2241. typedef struct {
  2242. htt_tlv_hdr_t tlv_hdr;
  2243. A_UINT32 hist_intvl;
  2244. /** difs_latency_hist:
  2245. * histogram of ppdu post to hwsch - > cmd status receive,
  2246. * HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS
  2247. */
  2248. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, difs_latency_hist);
  2249. } htt_stats_tx_hwq_difs_latency_tlv;
  2250. /* preserve old name alias for new name consistent with the tag name */
  2251. typedef htt_stats_tx_hwq_difs_latency_tlv htt_tx_hwq_difs_latency_stats_tlv_v;
  2252. #define HTT_TX_HWQ_CMD_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2253. /* NOTE: Variable length TLV, use length spec to infer array size */
  2254. typedef struct {
  2255. htt_tlv_hdr_t tlv_hdr;
  2256. /** cmd_result:
  2257. * Histogram of sched cmd result,
  2258. * HTT_TX_HWQ_MAX_CMD_RESULT_STATS
  2259. */
  2260. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, cmd_result);
  2261. } htt_stats_tx_hwq_cmd_result_tlv;
  2262. /* preserve old name alias for new name consistent with the tag name */
  2263. typedef htt_stats_tx_hwq_cmd_result_tlv htt_tx_hwq_cmd_result_stats_tlv_v;
  2264. #define HTT_TX_HWQ_CMD_STALL_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2265. /* NOTE: Variable length TLV, use length spec to infer array size */
  2266. typedef struct {
  2267. htt_tlv_hdr_t tlv_hdr;
  2268. /** cmd_stall_status:
  2269. * Histogram of various pause conitions
  2270. * HTT_TX_HWQ_MAX_CMD_STALL_STATS
  2271. */
  2272. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, cmd_stall_status);
  2273. } htt_stats_tx_hwq_cmd_stall_tlv;
  2274. /* preserve old name alias for new name consistent with the tag name */
  2275. typedef htt_stats_tx_hwq_cmd_stall_tlv htt_tx_hwq_cmd_stall_stats_tlv_v;
  2276. #define HTT_TX_HWQ_FES_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2277. /* NOTE: Variable length TLV, use length spec to infer array size */
  2278. typedef struct {
  2279. htt_tlv_hdr_t tlv_hdr;
  2280. /** fes_result:
  2281. * Histogram of number of user fes result,
  2282. * HTT_TX_HWQ_MAX_FES_RESULT_STATS
  2283. */
  2284. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, fes_result);
  2285. } htt_stats_tx_hwq_fes_status_tlv;
  2286. /* preserve old name alias for new name consistent with the tag name */
  2287. typedef htt_stats_tx_hwq_fes_status_tlv htt_tx_hwq_fes_result_stats_tlv_v;
  2288. #define HTT_TX_HWQ_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2289. /* NOTE: Variable length TLV, use length spec to infer array size
  2290. *
  2291. * The hwq_tried_mpdu_cnt_hist is a histogram of MPDUs tries per HWQ.
  2292. * The tries here is the count of the MPDUS within a PPDU that the HW
  2293. * had attempted to transmit on air, for the HWSCH Schedule command
  2294. * submitted by FW in this HWQ .It is not the retry attempts. The
  2295. * histogram bins are 0-29, 30-59, 60-89 and so on. The are 10 bins
  2296. * in this histogram.
  2297. * they are defined in FW using the following macros
  2298. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  2299. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  2300. *
  2301. * */
  2302. typedef struct {
  2303. htt_tlv_hdr_t tlv_hdr;
  2304. A_UINT32 hist_bin_size;
  2305. /** tried_mpdu_cnt_hist:
  2306. * Histogram of number of mpdus on tried mpdu,
  2307. * HTT_TX_HWQ_TRIED_MPDU_CNT_HIST
  2308. */
  2309. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, tried_mpdu_cnt_hist);
  2310. } htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv;
  2311. /* preserve old name alias for new name consistent with the tag name */
  2312. typedef htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv
  2313. htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v;
  2314. #define HTT_TX_HWQ_TXOP_USED_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2315. /* NOTE: Variable length TLV, use length spec to infer array size
  2316. *
  2317. * The txop_used_cnt_hist is the histogram of txop per burst. After
  2318. * completing the burst, we identify the txop used in the burst and
  2319. * incr the corresponding bin.
  2320. * Each bin represents 1ms & we have 10 bins in this histogram.
  2321. * they are defined in FW using the following macros
  2322. * #define WAL_MAX_TXOP_USED_CNT_HISTOGRAM 10
  2323. * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
  2324. *
  2325. * */
  2326. typedef struct {
  2327. htt_tlv_hdr_t tlv_hdr;
  2328. /** txop_used_cnt_hist:
  2329. * Histogram of txop used cnt,
  2330. * HTT_TX_HWQ_TXOP_USED_CNT_HIST
  2331. */
  2332. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, txop_used_cnt_hist);
  2333. } htt_stats_tx_hwq_txop_used_cnt_hist_tlv;
  2334. /* preserve old name alias for new name consistent with the tag name */
  2335. typedef htt_stats_tx_hwq_txop_used_cnt_hist_tlv
  2336. htt_tx_hwq_txop_used_cnt_hist_tlv_v;
  2337. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  2338. * TLV_TAGS:
  2339. * - HTT_STATS_STRING_TAG
  2340. * - HTT_STATS_TX_HWQ_CMN_TAG
  2341. * - HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG
  2342. * - HTT_STATS_TX_HWQ_CMD_RESULT_TAG
  2343. * - HTT_STATS_TX_HWQ_CMD_STALL_TAG
  2344. * - HTT_STATS_TX_HWQ_FES_STATUS_TAG
  2345. * - HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG
  2346. * - HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG
  2347. */
  2348. /* NOTE:
  2349. * This structure is for documentation, and cannot be safely used directly.
  2350. * Instead, use the constituent TLV structures to fill/parse.
  2351. * General HWQ stats Mechanism:
  2352. * Once the host request for the stats, FW fill all the HWQ TAGS in a buffer
  2353. * for all the HWQ requested. & the FW send the buffer to host. In the
  2354. * buffer the HWQ ID is filled in mac_id__hwq_id, thus identifying each
  2355. * HWQ distinctly.
  2356. */
  2357. #ifdef ATH_TARGET
  2358. typedef struct _htt_tx_hwq_stats {
  2359. htt_stats_string_tlv hwq_str_tlv;
  2360. htt_stats_tx_hwq_cmn_tlv cmn_tlv;
  2361. htt_stats_tx_hwq_difs_latency_tlv difs_tlv;
  2362. htt_stats_tx_hwq_cmd_result_tlv cmd_result_tlv;
  2363. htt_stats_tx_hwq_cmd_stall_tlv cmd_stall_tlv;
  2364. htt_stats_tx_hwq_fes_status_tlv fes_stats_tlv;
  2365. htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv tried_mpdu_tlv;
  2366. htt_stats_tx_hwq_txop_used_cnt_hist_tlv txop_used_tlv;
  2367. } htt_tx_hwq_stats_t;
  2368. #endif /* ATH_TARGET */
  2369. /* == TX SELFGEN STATS == */
  2370. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M 0x000000ff
  2371. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S 0
  2372. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_GET(_var) \
  2373. (((_var) & HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M) >> \
  2374. HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)
  2375. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_SET(_var, _val) \
  2376. do { \
  2377. HTT_CHECK_SET_VAL(HTT_TX_SELFGEN_CMN_STATS_MAC_ID, _val); \
  2378. ((_var) |= ((_val) << HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)); \
  2379. } while (0)
  2380. typedef enum {
  2381. HTT_TXERR_NONE,
  2382. HTT_TXERR_RESP, /* response timeout, mismatch,
  2383. * BW mismatch, mimo ctrl mismatch,
  2384. * CRC error.. */
  2385. HTT_TXERR_FILT, /* blocked by tx filtering */
  2386. HTT_TXERR_FIFO, /* fifo, misc errors in HW */
  2387. HTT_TXERR_SWABORT, /* software initialted abort (TX_ABORT) */
  2388. HTT_TXERR_RESERVED1,
  2389. HTT_TXERR_RESERVED2,
  2390. HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS = 7,
  2391. HTT_TXERR_INVALID = 0xff,
  2392. } htt_tx_err_status_t;
  2393. /* Matching enum for htt_tx_selfgen_sch_tsflag_error_stats */
  2394. typedef enum {
  2395. HTT_TX_SELFGEN_SCH_TSFLAG_FLUSH_RCVD_ERR,
  2396. HTT_TX_SELFGEN_SCH_TSFLAG_FILT_SCHED_CMD_ERR,
  2397. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_MISMATCH_ERR,
  2398. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_MIMO_CTRL_MISMATCH_ERR,
  2399. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_BW_MISMATCH_ERR,
  2400. HTT_TX_SELFGEN_SCH_TSFLAG_RETRY_COUNT_FAIL_ERR,
  2401. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_TOO_LATE_RECEIVED_ERR,
  2402. HTT_TX_SELFGEN_SCH_TSFLAG_SIFS_STALL_NO_NEXT_CMD_ERR,
  2403. HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS = 8,
  2404. HTT_TX_SELFGEN_SCH_TSFLAG_ERROR_STATS_VALID = 8
  2405. } htt_tx_selfgen_sch_tsflag_error_stats;
  2406. typedef enum {
  2407. HTT_TX_MUMIMO_GRP_VALID,
  2408. HTT_TX_MUMIMO_GRP_INVALID_NUM_MU_USERS_EXCEEDED_MU_MAX_USERS,
  2409. HTT_TX_MUMIMO_GRP_INVALID_SCHED_ALGO_NOT_MU_COMPATIBLE_GID,
  2410. HTT_TX_MUMIMO_GRP_INVALID_NON_PRIMARY_GRP,
  2411. HTT_TX_MUMIMO_GRP_INVALID_ZERO_CANDIDATES,
  2412. HTT_TX_MUMIMO_GRP_INVALID_MORE_CANDIDATES,
  2413. HTT_TX_MUMIMO_GRP_INVALID_GROUP_SIZE_EXCEED_NSS,
  2414. HTT_TX_MUMIMO_GRP_INVALID_GROUP_INELIGIBLE,
  2415. HTT_TX_MUMIMO_GRP_INVALID,
  2416. HTT_TX_MUMIMO_GRP_INVALID_GROUP_EFF_MU_TPUT_OMBPS,
  2417. HTT_TX_MUMIMO_GRP_INVALID_MAX_REASON_CODE,
  2418. } htt_tx_mumimo_grp_invalid_reason_code_stats;
  2419. #define HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS 4
  2420. #define HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS 8
  2421. #define HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS 8
  2422. #define HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS 74
  2423. #define HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS 8
  2424. #define HTT_STATS_MAX_MUMIMO_GRP_SZ 8
  2425. /*
  2426. * Each bin represents a 300 mbps throughput
  2427. * [0] - 0-300mbps; [1] - 300-600mbps [2] - 600-900mbps; [3] - 900-1200mbps; [4] - 1200-1500mbps
  2428. * [5] - 1500-1800mbps; [6] - 1800-2100mbps; [7] - 2100-2400mbps; [8] - 2400-2700mbps; [9] - >=2700mbps
  2429. */
  2430. #define HTT_STATS_MUMIMO_TPUT_NUM_BINS 10
  2431. #define HTT_STATS_MAX_INVALID_REASON_CODE \
  2432. HTT_TX_MUMIMO_GRP_INVALID_MAX_REASON_CODE
  2433. /* Reasons stated in htt_tx_mumimo_grp_invalid_reason_code_stats */
  2434. #define HTT_TX_NUM_MUMIMO_GRP_INVALID_WORDS \
  2435. (HTT_STATS_MAX_MUMIMO_GRP_SZ * HTT_STATS_MAX_INVALID_REASON_CODE)
  2436. #define HTT_MAX_NUM_SBT_INTR 4
  2437. typedef struct {
  2438. htt_tlv_hdr_t tlv_hdr;
  2439. /*
  2440. * BIT [ 7 : 0] :- mac_id
  2441. * BIT [31 : 8] :- reserved
  2442. */
  2443. A_UINT32 mac_id__word;
  2444. /** BAR sent out for SU transmission */
  2445. A_UINT32 su_bar;
  2446. /** SW generated RTS frame sent */
  2447. A_UINT32 rts;
  2448. /** SW generated CTS-to-self frame sent */
  2449. A_UINT32 cts2self;
  2450. /** SW generated QOS NULL frame sent */
  2451. A_UINT32 qos_null;
  2452. /** BAR sent for MU user 1 */
  2453. A_UINT32 delayed_bar_1;
  2454. /** BAR sent for MU user 2 */
  2455. A_UINT32 delayed_bar_2;
  2456. /** BAR sent for MU user 3 */
  2457. A_UINT32 delayed_bar_3;
  2458. /** BAR sent for MU user 4 */
  2459. A_UINT32 delayed_bar_4;
  2460. /** BAR sent for MU user 5 */
  2461. A_UINT32 delayed_bar_5;
  2462. /** BAR sent for MU user 6 */
  2463. A_UINT32 delayed_bar_6;
  2464. /** BAR sent for MU user 7 */
  2465. A_UINT32 delayed_bar_7;
  2466. A_UINT32 bar_with_tqm_head_seq_num;
  2467. A_UINT32 bar_with_tid_seq_num;
  2468. /** SW generated RTS frame queued to the HW */
  2469. A_UINT32 su_sw_rts_queued;
  2470. /** SW generated RTS frame sent over the air */
  2471. A_UINT32 su_sw_rts_tried;
  2472. /** SW generated RTS frame completed with error */
  2473. A_UINT32 su_sw_rts_err;
  2474. /** SW generated RTS frame flushed */
  2475. A_UINT32 su_sw_rts_flushed;
  2476. /** CTS (RTS response) received in different BW */
  2477. A_UINT32 su_sw_rts_rcvd_cts_diff_bw;
  2478. /* START DEPRECATED FIELDS */
  2479. /** 11AX HE MU Combined Freq. BSRP Trigger frame sent over the air */
  2480. A_UINT32 combined_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2481. /** 11AX HE MU Combined Freq. BSRP Trigger completed with error(s) */
  2482. A_UINT32 combined_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2483. /** 11AX HE MU Standalone Freq. BSRP Trigger frame sent over the air */
  2484. A_UINT32 standalone_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2485. /** 11AX HE MU Standalone Freq. BSRP Trigger completed with error(s) */
  2486. A_UINT32 standalone_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2487. /* END DEPRECATED FIELDS */
  2488. /** smart_basic_trig_sch_histogram:
  2489. * Count how many times the interval between predictive basic triggers
  2490. * sent to a given STA based on analysis of that STA's traffic patterns
  2491. * is within a given range:
  2492. *
  2493. * smart_basic_trig_sch_histogram[0]: SBT interval <= 10 ms
  2494. * smart_basic_trig_sch_histogram[1]: 10 ms < SBT interval <= 20 ms
  2495. * smart_basic_trig_sch_histogram[2]: 20 ms < SBT interval <= 30 ms
  2496. * smart_basic_trig_sch_histogram[3]: 30 ms < SBT interval <= 40 ms
  2497. *
  2498. * (Smart basic triggers are only used with intervals <= 40 ms.)
  2499. */
  2500. A_UINT32 smart_basic_trig_sch_histogram[HTT_MAX_NUM_SBT_INTR];
  2501. } htt_stats_tx_selfgen_cmn_stats_tlv;
  2502. /* preserve old name alias for new name consistent with the tag name */
  2503. typedef htt_stats_tx_selfgen_cmn_stats_tlv htt_tx_selfgen_cmn_stats_tlv;
  2504. typedef struct {
  2505. htt_tlv_hdr_t tlv_hdr;
  2506. /** 11AC VHT SU NDPA frame sent over the air */
  2507. A_UINT32 ac_su_ndpa;
  2508. /** 11AC VHT SU NDP frame sent over the air */
  2509. A_UINT32 ac_su_ndp;
  2510. /** 11AC VHT MU MIMO NDPA frame sent over the air */
  2511. A_UINT32 ac_mu_mimo_ndpa;
  2512. /** 11AC VHT MU MIMO NDP frame sent over the air */
  2513. A_UINT32 ac_mu_mimo_ndp;
  2514. /** 11AC VHT MU MIMO BR-POLL for user 1 sent over the air */
  2515. A_UINT32 ac_mu_mimo_brpoll_1;
  2516. /** 11AC VHT MU MIMO BR-POLL for user 2 sent over the air */
  2517. A_UINT32 ac_mu_mimo_brpoll_2;
  2518. /** 11AC VHT MU MIMO BR-POLL for user 3 sent over the air */
  2519. A_UINT32 ac_mu_mimo_brpoll_3;
  2520. /** 11AC VHT SU NDPA frame queued to the HW */
  2521. A_UINT32 ac_su_ndpa_queued;
  2522. /** 11AC VHT SU NDP frame queued to the HW */
  2523. A_UINT32 ac_su_ndp_queued;
  2524. /** 11AC VHT MU MIMO NDPA frame queued to the HW */
  2525. A_UINT32 ac_mu_mimo_ndpa_queued;
  2526. /** 11AC VHT MU MIMO NDP frame queued to the HW */
  2527. A_UINT32 ac_mu_mimo_ndp_queued;
  2528. /** 11AC VHT MU MIMO BR-POLL for user 1 frame queued to the HW */
  2529. A_UINT32 ac_mu_mimo_brpoll_1_queued;
  2530. /** 11AC VHT MU MIMO BR-POLL for user 2 frame queued to the HW */
  2531. A_UINT32 ac_mu_mimo_brpoll_2_queued;
  2532. /** 11AC VHT MU MIMO BR-POLL for user 3 frame queued to the HW */
  2533. A_UINT32 ac_mu_mimo_brpoll_3_queued;
  2534. } htt_stats_tx_selfgen_ac_stats_tlv;
  2535. /* preserve old name alias for new name consistent with the tag name */
  2536. typedef htt_stats_tx_selfgen_ac_stats_tlv htt_tx_selfgen_ac_stats_tlv;
  2537. typedef struct {
  2538. htt_tlv_hdr_t tlv_hdr;
  2539. /** 11AX HE SU NDPA frame sent over the air */
  2540. A_UINT32 ax_su_ndpa;
  2541. /** 11AX HE NDP frame sent over the air */
  2542. A_UINT32 ax_su_ndp;
  2543. /** 11AX HE MU MIMO NDPA frame sent over the air */
  2544. A_UINT32 ax_mu_mimo_ndpa;
  2545. /** 11AX HE MU MIMO NDP frame sent over the air */
  2546. A_UINT32 ax_mu_mimo_ndp;
  2547. union {
  2548. struct {
  2549. /* deprecated old names */
  2550. A_UINT32 ax_mu_mimo_brpoll_1;
  2551. A_UINT32 ax_mu_mimo_brpoll_2;
  2552. A_UINT32 ax_mu_mimo_brpoll_3;
  2553. A_UINT32 ax_mu_mimo_brpoll_4;
  2554. A_UINT32 ax_mu_mimo_brpoll_5;
  2555. A_UINT32 ax_mu_mimo_brpoll_6;
  2556. A_UINT32 ax_mu_mimo_brpoll_7;
  2557. };
  2558. /** 11AX HE MU BR-POLL frame for users 1 - 7 sent over the air */
  2559. A_UINT32 ax_mu_mimo_brpoll[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  2560. };
  2561. /** 11AX HE MU Basic Trigger frame sent over the air */
  2562. A_UINT32 ax_basic_trigger;
  2563. /** 11AX HE MU BSRP Trigger frame sent over the air */
  2564. A_UINT32 ax_bsr_trigger;
  2565. /** 11AX HE MU BAR Trigger frame sent over the air */
  2566. A_UINT32 ax_mu_bar_trigger;
  2567. /** 11AX HE MU RTS Trigger frame sent over the air */
  2568. A_UINT32 ax_mu_rts_trigger;
  2569. /** 11AX HE MU UL-MUMIMO Trigger frame sent over the air */
  2570. A_UINT32 ax_ulmumimo_trigger;
  2571. /** 11AX HE SU NDPA frame queued to the HW */
  2572. A_UINT32 ax_su_ndpa_queued;
  2573. /** 11AX HE SU NDP frame queued to the HW */
  2574. A_UINT32 ax_su_ndp_queued;
  2575. /** 11AX HE MU MIMO NDPA frame queued to the HW */
  2576. A_UINT32 ax_mu_mimo_ndpa_queued;
  2577. /** 11AX HE MU MIMO NDP frame queued to the HW */
  2578. A_UINT32 ax_mu_mimo_ndp_queued;
  2579. /** 11AX HE MU BR-POLL frame for users 1 - 7 queued to the HW */
  2580. A_UINT32 ax_mu_mimo_brpoll_queued[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  2581. /**
  2582. * 11AX HE UL-MUMIMO Trigger frame for users 0 - 7
  2583. * successfully sent over the air
  2584. */
  2585. A_UINT32 ax_ul_mumimo_trigger[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  2586. /** 11AX HE MU Combined Freq. BSRP Trigger frame sent over the air */
  2587. A_UINT32 combined_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2588. /** 11AX HE MU Combined Freq. BSRP Trigger completed with error(s) */
  2589. A_UINT32 combined_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2590. /** 11AX HE MU Standalone Freq. BSRP Trigger frame sent over the air */
  2591. A_UINT32 standalone_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2592. /** 11AX HE MU Standalone Freq. BSRP Trigger completed with error(s) */
  2593. A_UINT32 standalone_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2594. /** 11AX HE Manual Single-User UL OFDMA Trigger frame sent over the air */
  2595. A_UINT32 manual_ax_su_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2596. /** 11AX HE Manual Single-User UL OFDMA Trigger completed with error(s) */
  2597. A_UINT32 manual_ax_su_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2598. /** 11AX HE Manual Multi-User UL OFDMA Trigger frame sent over the air */
  2599. A_UINT32 manual_ax_mu_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2600. /** 11AX HE Manual Multi-User UL OFDMA Trigger completed with error(s) */
  2601. A_UINT32 manual_ax_mu_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2602. /** 11AX HE UL OFDMA Basic Trigger frames per AC */
  2603. A_UINT32 ax_basic_trigger_per_ac[HTT_NUM_AC_WMM];
  2604. /** 11AX HE UL OFDMA Basic Trigger frames per AC completed with error(s) */
  2605. A_UINT32 ax_basic_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2606. /** 11AX HE MU-BAR Trigger frames per AC */
  2607. A_UINT32 ax_mu_bar_trigger_per_ac[HTT_NUM_AC_WMM];
  2608. /** 11AX HE MU-BAR Trigger frames per AC completed with error(s) */
  2609. A_UINT32 ax_mu_bar_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2610. } htt_stats_tx_selfgen_ax_stats_tlv;
  2611. /* preserve old name alias for new name consistent with the tag name */
  2612. typedef htt_stats_tx_selfgen_ax_stats_tlv htt_tx_selfgen_ax_stats_tlv;
  2613. typedef struct {
  2614. htt_tlv_hdr_t tlv_hdr;
  2615. /** 11be EHT SU NDPA frame sent over the air */
  2616. A_UINT32 be_su_ndpa;
  2617. /** 11be EHT NDP frame sent over the air */
  2618. A_UINT32 be_su_ndp;
  2619. /** 11be EHT MU MIMO NDPA frame sent over the air */
  2620. A_UINT32 be_mu_mimo_ndpa;
  2621. /** 11be EHT MU MIMO NDP frame sent over theT air */
  2622. A_UINT32 be_mu_mimo_ndp;
  2623. /** 11be EHT MU BR-POLL frame for users 1 - 7 sent over the air */
  2624. A_UINT32 be_mu_mimo_brpoll[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  2625. /** 11be EHT MU Basic Trigger frame sent over the air */
  2626. A_UINT32 be_basic_trigger;
  2627. /** 11be EHT MU BSRP Trigger frame sent over the air */
  2628. A_UINT32 be_bsr_trigger;
  2629. /** 11be EHT MU BAR Trigger frame sent over the air */
  2630. A_UINT32 be_mu_bar_trigger;
  2631. /** 11be EHT MU RTS Trigger frame sent over the air */
  2632. A_UINT32 be_mu_rts_trigger;
  2633. /** 11be EHT MU UL-MUMIMO Trigger frame sent over the air */
  2634. A_UINT32 be_ulmumimo_trigger;
  2635. /** 11be EHT SU NDPA frame queued to the HW */
  2636. A_UINT32 be_su_ndpa_queued;
  2637. /** 11be EHT SU NDP frame queued to the HW */
  2638. A_UINT32 be_su_ndp_queued;
  2639. /** 11be EHT MU MIMO NDPA frame queued to the HW */
  2640. A_UINT32 be_mu_mimo_ndpa_queued;
  2641. /** 11be EHT MU MIMO NDP frame queued to the HW */
  2642. A_UINT32 be_mu_mimo_ndp_queued;
  2643. /** 11be EHT MU BR-POLL frame for users 1 - 7 queued to the HW */
  2644. A_UINT32 be_mu_mimo_brpoll_queued[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  2645. /**
  2646. * 11be EHT UL-MUMIMO Trigger frame for users 0 - 7
  2647. * successfully sent over the air
  2648. */
  2649. A_UINT32 be_ul_mumimo_trigger[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  2650. /** 11BE EHT MU Combined Freq. BSRP Trigger frame sent over the air */
  2651. A_UINT32 combined_be_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2652. /** 11BE EHT MU Combined Freq. BSRP Trigger completed with error(s) */
  2653. A_UINT32 combined_be_bsr_trigger_err[HTT_NUM_AC_WMM];
  2654. /** 11BE EHT MU Standalone Freq. BSRP Trigger frame sent over the air */
  2655. A_UINT32 standalone_be_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2656. /** 11BE EHT MU Standalone Freq. BSRP Trigger completed with error(s) */
  2657. A_UINT32 standalone_be_bsr_trigger_err[HTT_NUM_AC_WMM];
  2658. /** 11BE EHT Manual Single-User UL OFDMA Trigger frame sent over the air */
  2659. A_UINT32 manual_be_su_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2660. /** 11BE EHT Manual Single-User UL OFDMA Trigger completed with error(s) */
  2661. A_UINT32 manual_be_su_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2662. /** 11BE EHT Manual Multi-User UL OFDMA Trigger frame sent over the air */
  2663. A_UINT32 manual_be_mu_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2664. /** 11BE EHT Manual Multi-User UL OFDMA Trigger completed with error(s) */
  2665. A_UINT32 manual_be_mu_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2666. /** 11BE EHT UL OFDMA Basic Trigger frames per AC */
  2667. A_UINT32 be_basic_trigger_per_ac[HTT_NUM_AC_WMM];
  2668. /** 11BE EHT UL OFDMA Basic Trigger frames per AC completed with error(s) */
  2669. A_UINT32 be_basic_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2670. /** 11BE EHT MU-BAR Trigger frames per AC */
  2671. A_UINT32 be_mu_bar_trigger_per_ac[HTT_NUM_AC_WMM];
  2672. /** 11BE EHT MU-BAR Trigger frames per AC completed with error(s) */
  2673. A_UINT32 be_mu_bar_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2674. } htt_stats_tx_selfgen_be_stats_tlv;
  2675. /* preserve old name alias for new name consistent with the tag name */
  2676. typedef htt_stats_tx_selfgen_be_stats_tlv htt_tx_selfgen_be_stats_tlv;
  2677. typedef struct { /* DEPRECATED */
  2678. htt_tlv_hdr_t tlv_hdr;
  2679. /** 11AX HE OFDMA NDPA frame queued to the HW */
  2680. A_UINT32 ax_ofdma_ndpa_queued[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2681. /** 11AX HE OFDMA NDPA frame sent over the air */
  2682. A_UINT32 ax_ofdma_ndpa_tried[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2683. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2684. A_UINT32 ax_ofdma_ndpa_flushed[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2685. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2686. A_UINT32 ax_ofdma_ndpa_err[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2687. } htt_stats_txbf_ofdma_ndpa_stats_tlv;
  2688. /* preserve old name alias for new name consistent with the tag name */
  2689. typedef htt_stats_txbf_ofdma_ndpa_stats_tlv htt_txbf_ofdma_ndpa_stats_tlv;
  2690. typedef struct { /* DEPRECATED */
  2691. htt_tlv_hdr_t tlv_hdr;
  2692. /** 11AX HE OFDMA NDP frame queued to the HW */
  2693. A_UINT32 ax_ofdma_ndp_queued[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2694. /** 11AX HE OFDMA NDPA frame sent over the air */
  2695. A_UINT32 ax_ofdma_ndp_tried[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2696. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2697. A_UINT32 ax_ofdma_ndp_flushed[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2698. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2699. A_UINT32 ax_ofdma_ndp_err[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2700. } htt_stats_txbf_ofdma_ndp_stats_tlv;
  2701. /* preserve old name alias for new name consistent with the tag name */
  2702. typedef htt_stats_txbf_ofdma_ndp_stats_tlv htt_txbf_ofdma_ndp_stats_tlv;
  2703. typedef struct { /* DEPRECATED */
  2704. htt_tlv_hdr_t tlv_hdr;
  2705. /** 11AX HE OFDMA MU BRPOLL frame queued to the HW */
  2706. A_UINT32 ax_ofdma_brpoll_queued[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2707. /** 11AX HE OFDMA MU BRPOLL frame sent over the air */
  2708. A_UINT32 ax_ofdma_brpoll_tried[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2709. /** 11AX HE OFDMA MU BRPOLL frame flushed by HW */
  2710. A_UINT32 ax_ofdma_brpoll_flushed[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2711. /** 11AX HE OFDMA MU BRPOLL frame completed with error(s) */
  2712. A_UINT32 ax_ofdma_brp_err[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2713. /**
  2714. * Number of CBF(s) received when 11AX HE OFDMA MU BRPOLL frame
  2715. * completed with error(s)
  2716. */
  2717. A_UINT32 ax_ofdma_brp_err_num_cbf_rcvd[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS+1];
  2718. } htt_stats_txbf_ofdma_brp_stats_tlv;
  2719. /* preserve old name alias for new name consistent with the tag name */
  2720. typedef htt_stats_txbf_ofdma_brp_stats_tlv htt_txbf_ofdma_brp_stats_tlv;
  2721. typedef struct { /* DEPRECATED */
  2722. htt_tlv_hdr_t tlv_hdr;
  2723. /**
  2724. * 11AX HE OFDMA PPDUs that were sent over the air with steering
  2725. * (TXBF + OFDMA)
  2726. */
  2727. A_UINT32 ax_ofdma_num_ppdu_steer[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2728. /** 11AX HE OFDMA PPDUs that were sent over the air in open loop */
  2729. A_UINT32 ax_ofdma_num_ppdu_ol[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2730. /**
  2731. * 11AX HE OFDMA number of users for which CBF prefetch was initiated
  2732. * to PHY HW during TX
  2733. */
  2734. A_UINT32 ax_ofdma_num_usrs_prefetch[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2735. /**
  2736. * 11AX HE OFDMA number of users for which sounding was initiated
  2737. * during TX
  2738. */
  2739. A_UINT32 ax_ofdma_num_usrs_sound[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2740. /** 11AX HE OFDMA number of users for which sounding was forced during TX */
  2741. A_UINT32 ax_ofdma_num_usrs_force_sound[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2742. } htt_stats_txbf_ofdma_steer_stats_tlv;
  2743. /* preserve old name alias for new name consistent with the tag name */
  2744. typedef htt_stats_txbf_ofdma_steer_stats_tlv htt_txbf_ofdma_steer_stats_tlv;
  2745. /* Note:
  2746. * This struct htt_tx_pdev_txbf_ofdma_stats_t and all its constituent
  2747. * struct TLVs are deprecated, due to the need for restructuring these
  2748. * stats into a variable length array
  2749. */
  2750. #ifdef ATH_TARGET
  2751. typedef struct { /* DEPRECATED */
  2752. htt_stats_txbf_ofdma_ndpa_stats_tlv ofdma_ndpa_tlv;
  2753. htt_stats_txbf_ofdma_ndp_stats_tlv ofdma_ndp_tlv;
  2754. htt_stats_txbf_ofdma_brp_stats_tlv ofdma_brp_tlv;
  2755. htt_stats_txbf_ofdma_steer_stats_tlv ofdma_steer_tlv;
  2756. } htt_tx_pdev_txbf_ofdma_stats_t;
  2757. #endif /* ATH_TARGET */
  2758. typedef struct {
  2759. /** 11AX HE OFDMA NDPA frame queued to the HW */
  2760. A_UINT32 ax_ofdma_ndpa_queued;
  2761. /** 11AX HE OFDMA NDPA frame sent over the air */
  2762. A_UINT32 ax_ofdma_ndpa_tried;
  2763. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2764. A_UINT32 ax_ofdma_ndpa_flushed;
  2765. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2766. A_UINT32 ax_ofdma_ndpa_err;
  2767. } htt_txbf_ofdma_ax_ndpa_stats_elem_t;
  2768. typedef struct {
  2769. htt_tlv_hdr_t tlv_hdr;
  2770. /**
  2771. * This field is populated with the num of elems in the ax_ndpa[]
  2772. * variable length array.
  2773. */
  2774. A_UINT32 num_elems_ax_ndpa_arr;
  2775. /**
  2776. * This field will be filled by target with value of
  2777. * sizeof(htt_txbf_ofdma_ax_ndpa_stats_elem_t).
  2778. * This is for allowing host to infer how much data target has provided,
  2779. * even if it using different version of the struct def than what target
  2780. * had used.
  2781. */
  2782. A_UINT32 arr_elem_size_ax_ndpa;
  2783. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_ax_ndpa_stats_elem_t, ax_ndpa);
  2784. } htt_stats_txbf_ofdma_ax_ndpa_stats_tlv;
  2785. /* preserve old name alias for new name consistent with the tag name */
  2786. typedef htt_stats_txbf_ofdma_ax_ndpa_stats_tlv htt_txbf_ofdma_ax_ndpa_stats_tlv;
  2787. typedef struct {
  2788. /** 11AX HE OFDMA NDP frame queued to the HW */
  2789. A_UINT32 ax_ofdma_ndp_queued;
  2790. /** 11AX HE OFDMA NDPA frame sent over the air */
  2791. A_UINT32 ax_ofdma_ndp_tried;
  2792. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2793. A_UINT32 ax_ofdma_ndp_flushed;
  2794. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2795. A_UINT32 ax_ofdma_ndp_err;
  2796. } htt_txbf_ofdma_ax_ndp_stats_elem_t;
  2797. typedef struct {
  2798. htt_tlv_hdr_t tlv_hdr;
  2799. /**
  2800. * This field is populated with the num of elems in the the ax_ndp[]
  2801. * variable length array.
  2802. */
  2803. A_UINT32 num_elems_ax_ndp_arr;
  2804. /**
  2805. * This field will be filled by target with value of
  2806. * sizeof(htt_txbf_ofdma_ax_ndp_stats_elem_t).
  2807. * This is for allowing host to infer how much data target has provided,
  2808. * even if it using different version of the struct def than what target
  2809. * had used.
  2810. */
  2811. A_UINT32 arr_elem_size_ax_ndp;
  2812. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_ax_ndp_stats_elem_t, ax_ndp);
  2813. } htt_stats_txbf_ofdma_ax_ndp_stats_tlv;
  2814. /* preserve old name alias for new name consistent with the tag name */
  2815. typedef htt_stats_txbf_ofdma_ax_ndp_stats_tlv htt_txbf_ofdma_ax_ndp_stats_tlv;
  2816. typedef struct {
  2817. /** 11AX HE OFDMA MU BRPOLL frame queued to the HW */
  2818. A_UINT32 ax_ofdma_brpoll_queued;
  2819. /** 11AX HE OFDMA MU BRPOLL frame sent over the air */
  2820. A_UINT32 ax_ofdma_brpoll_tried;
  2821. /** 11AX HE OFDMA MU BRPOLL frame flushed by HW */
  2822. A_UINT32 ax_ofdma_brpoll_flushed;
  2823. /** 11AX HE OFDMA MU BRPOLL frame completed with error(s) */
  2824. A_UINT32 ax_ofdma_brp_err;
  2825. /**
  2826. * Number of CBF(s) received when 11AX HE OFDMA MU BRPOLL frame
  2827. * completed with error(s)
  2828. */
  2829. A_UINT32 ax_ofdma_brp_err_num_cbf_rcvd;
  2830. } htt_txbf_ofdma_ax_brp_stats_elem_t;
  2831. typedef struct {
  2832. htt_tlv_hdr_t tlv_hdr;
  2833. /**
  2834. * This field is populated with the num of elems in the the ax_brp[]
  2835. * variable length array.
  2836. */
  2837. A_UINT32 num_elems_ax_brp_arr;
  2838. /**
  2839. * This field will be filled by target with value of
  2840. * sizeof(htt_txbf_ofdma_ax_brp_stats_elem_t).
  2841. * This is for allowing host to infer how much data target has provided,
  2842. * even if it using different version of the struct than what target
  2843. * had used.
  2844. */
  2845. A_UINT32 arr_elem_size_ax_brp;
  2846. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_ax_brp_stats_elem_t, ax_brp);
  2847. } htt_stats_txbf_ofdma_ax_brp_stats_tlv;
  2848. /* preserve old name alias for new name consistent with the tag name */
  2849. typedef htt_stats_txbf_ofdma_ax_brp_stats_tlv htt_txbf_ofdma_ax_brp_stats_tlv;
  2850. typedef struct {
  2851. /**
  2852. * 11AX HE OFDMA PPDUs that were sent over the air with steering
  2853. * (TXBF + OFDMA)
  2854. */
  2855. A_UINT32 ax_ofdma_num_ppdu_steer;
  2856. /** 11AX HE OFDMA PPDUs that were sent over the air in open loop */
  2857. A_UINT32 ax_ofdma_num_ppdu_ol;
  2858. /**
  2859. * 11AX HE OFDMA number of users for which CBF prefetch was initiated
  2860. * to PHY HW during TX
  2861. */
  2862. A_UINT32 ax_ofdma_num_usrs_prefetch;
  2863. /**
  2864. * 11AX HE OFDMA number of users for which sounding was initiated
  2865. * during TX
  2866. */
  2867. A_UINT32 ax_ofdma_num_usrs_sound;
  2868. /** 11AX HE OFDMA number of users for which sounding was forced during TX */
  2869. A_UINT32 ax_ofdma_num_usrs_force_sound;
  2870. } htt_txbf_ofdma_ax_steer_stats_elem_t;
  2871. typedef struct {
  2872. htt_tlv_hdr_t tlv_hdr;
  2873. /**
  2874. * This field is populated with the num of elems in the ax_steer[]
  2875. * variable length array.
  2876. */
  2877. A_UINT32 num_elems_ax_steer_arr;
  2878. /**
  2879. * This field will be filled by target with value of
  2880. * sizeof(htt_txbf_ofdma_ax_steer_stats_elem_t).
  2881. * This is for allowing host to infer how much data target has provided,
  2882. * even if it using different version of the struct than what target
  2883. * had used.
  2884. */
  2885. A_UINT32 arr_elem_size_ax_steer;
  2886. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_ax_steer_stats_elem_t, ax_steer);
  2887. } htt_stats_txbf_ofdma_ax_steer_stats_tlv;
  2888. /* preserve old name alias for new name consistent with the tag name */
  2889. typedef htt_stats_txbf_ofdma_ax_steer_stats_tlv
  2890. htt_txbf_ofdma_ax_steer_stats_tlv;
  2891. typedef struct {
  2892. htt_tlv_hdr_t tlv_hdr;
  2893. /* 11AX HE OFDMA MPDUs tried in rbo steering */
  2894. A_UINT32 ax_ofdma_rbo_steer_mpdus_tried;
  2895. /* 11AX HE OFDMA MPDUs failed in rbo steering */
  2896. A_UINT32 ax_ofdma_rbo_steer_mpdus_failed;
  2897. /* 11AX HE OFDMA MPDUs tried in sifs steering */
  2898. A_UINT32 ax_ofdma_sifs_steer_mpdus_tried;
  2899. /* 11AX HE OFDMA MPDUs failed in sifs steering */
  2900. A_UINT32 ax_ofdma_sifs_steer_mpdus_failed;
  2901. } htt_stats_txbf_ofdma_ax_steer_mpdu_stats_tlv;
  2902. /* preserve old name alias for new name consistent with the tag name */
  2903. typedef htt_stats_txbf_ofdma_ax_steer_mpdu_stats_tlv
  2904. htt_txbf_ofdma_ax_steer_mpdu_stats_tlv;
  2905. typedef struct {
  2906. /** 11BE EHT OFDMA NDPA frame queued to the HW */
  2907. A_UINT32 be_ofdma_ndpa_queued;
  2908. /** 11BE EHT OFDMA NDPA frame sent over the air */
  2909. A_UINT32 be_ofdma_ndpa_tried;
  2910. /** 11BE EHT OFDMA NDPA frame flushed by HW */
  2911. A_UINT32 be_ofdma_ndpa_flushed;
  2912. /** 11BE EHT OFDMA NDPA frame completed with error(s) */
  2913. A_UINT32 be_ofdma_ndpa_err;
  2914. } htt_txbf_ofdma_be_ndpa_stats_elem_t;
  2915. typedef struct {
  2916. htt_tlv_hdr_t tlv_hdr;
  2917. /**
  2918. * This field is populated with the num of elems in the be_ndpa[]
  2919. * variable length array.
  2920. */
  2921. A_UINT32 num_elems_be_ndpa_arr;
  2922. /**
  2923. * This field will be filled by target with value of
  2924. * sizeof(htt_txbf_ofdma_be_ndpa_stats_elem_t).
  2925. * This is for allowing host to infer how much data target has provided,
  2926. * even if it using different version of the struct than what target
  2927. * had used.
  2928. */
  2929. A_UINT32 arr_elem_size_be_ndpa;
  2930. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_be_ndpa_stats_elem_t, be_ndpa);
  2931. } htt_stats_txbf_ofdma_be_ndpa_stats_tlv;
  2932. /* preserve old name alias for new name consistent with the tag name */
  2933. typedef htt_stats_txbf_ofdma_be_ndpa_stats_tlv htt_txbf_ofdma_be_ndpa_stats_tlv;
  2934. typedef struct {
  2935. /** 11BE EHT OFDMA NDP frame queued to the HW */
  2936. A_UINT32 be_ofdma_ndp_queued;
  2937. /** 11BE EHT OFDMA NDPA frame sent over the air */
  2938. A_UINT32 be_ofdma_ndp_tried;
  2939. /** 11BE EHT OFDMA NDPA frame flushed by HW */
  2940. A_UINT32 be_ofdma_ndp_flushed;
  2941. /** 11BE EHT OFDMA NDPA frame completed with error(s) */
  2942. A_UINT32 be_ofdma_ndp_err;
  2943. } htt_txbf_ofdma_be_ndp_stats_elem_t;
  2944. typedef struct {
  2945. htt_tlv_hdr_t tlv_hdr;
  2946. /**
  2947. * This field is populated with the num of elems in the be_ndp[]
  2948. * variable length array.
  2949. */
  2950. A_UINT32 num_elems_be_ndp_arr;
  2951. /**
  2952. * This field will be filled by target with value of
  2953. * sizeof(htt_txbf_ofdma_be_ndp_stats_elem_t).
  2954. * This is for allowing host to infer how much data target has provided,
  2955. * even if it using different version of the struct than what target
  2956. * had used.
  2957. */
  2958. A_UINT32 arr_elem_size_be_ndp;
  2959. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_be_ndp_stats_elem_t, be_ndp);
  2960. } htt_stats_txbf_ofdma_be_ndp_stats_tlv;
  2961. /* preserve old name alias for new name consistent with the tag name */
  2962. typedef htt_stats_txbf_ofdma_be_ndp_stats_tlv htt_txbf_ofdma_be_ndp_stats_tlv;
  2963. typedef struct {
  2964. /** 11BE EHT OFDMA MU BRPOLL frame queued to the HW */
  2965. A_UINT32 be_ofdma_brpoll_queued;
  2966. /** 11BE EHT OFDMA MU BRPOLL frame sent over the air */
  2967. A_UINT32 be_ofdma_brpoll_tried;
  2968. /** 11BE EHT OFDMA MU BRPOLL frame flushed by HW */
  2969. A_UINT32 be_ofdma_brpoll_flushed;
  2970. /** 11BE EHT OFDMA MU BRPOLL frame completed with error(s) */
  2971. A_UINT32 be_ofdma_brp_err;
  2972. /**
  2973. * Number of CBF(s) received when 11BE EHT OFDMA MU BRPOLL frame
  2974. * completed with error(s)
  2975. */
  2976. A_UINT32 be_ofdma_brp_err_num_cbf_rcvd;
  2977. } htt_txbf_ofdma_be_brp_stats_elem_t;
  2978. typedef struct {
  2979. htt_tlv_hdr_t tlv_hdr;
  2980. /**
  2981. * This field is populated with the num of elems in the be_brp[]
  2982. * variable length array.
  2983. */
  2984. A_UINT32 num_elems_be_brp_arr;
  2985. /**
  2986. * This field will be filled by target with value of
  2987. * sizeof(htt_txbf_ofdma_be_brp_stats_elem_t).
  2988. * This is for allowing host to infer how much data target has provided,
  2989. * even if it using different version of the struct than what target
  2990. * had used
  2991. */
  2992. A_UINT32 arr_elem_size_be_brp;
  2993. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_be_brp_stats_elem_t, be_brp);
  2994. } htt_stats_txbf_ofdma_be_brp_stats_tlv;
  2995. /* preserve old name alias for new name consistent with the tag name */
  2996. typedef htt_stats_txbf_ofdma_be_brp_stats_tlv htt_txbf_ofdma_be_brp_stats_tlv;
  2997. typedef struct {
  2998. /**
  2999. * 11BE EHT OFDMA PPDUs that were sent over the air with steering
  3000. * (TXBF + OFDMA)
  3001. */
  3002. A_UINT32 be_ofdma_num_ppdu_steer;
  3003. /** 11BE EHT OFDMA PPDUs that were sent over the air in open loop */
  3004. A_UINT32 be_ofdma_num_ppdu_ol;
  3005. /**
  3006. * 11BE EHT OFDMA number of users for which CBF prefetch was initiated
  3007. * to PHY HW during TX
  3008. */
  3009. A_UINT32 be_ofdma_num_usrs_prefetch;
  3010. /**
  3011. * 11BE EHT OFDMA number of users for which sounding was initiated
  3012. * during TX
  3013. */
  3014. A_UINT32 be_ofdma_num_usrs_sound;
  3015. /**
  3016. * 11BE EHT OFDMA number of users for which sounding was forced during TX
  3017. */
  3018. A_UINT32 be_ofdma_num_usrs_force_sound;
  3019. } htt_txbf_ofdma_be_steer_stats_elem_t;
  3020. typedef struct {
  3021. htt_tlv_hdr_t tlv_hdr;
  3022. /**
  3023. * This field is populated with the num of elems in the be_steer[]
  3024. * variable length array.
  3025. */
  3026. A_UINT32 num_elems_be_steer_arr;
  3027. /**
  3028. * This field will be filled by target with value of
  3029. * sizeof(htt_txbf_ofdma_be_steer_stats_elem_t).
  3030. * This is for allowing host to infer how much data target has provided,
  3031. * even if it using different version of the struct than what target
  3032. * had used.
  3033. */
  3034. A_UINT32 arr_elem_size_be_steer;
  3035. HTT_STATS_VAR_LEN_ARRAY1(htt_txbf_ofdma_be_steer_stats_elem_t, be_steer);
  3036. } htt_stats_txbf_ofdma_be_steer_stats_tlv;
  3037. /* preserve old name alias for new name consistent with the tag name */
  3038. typedef htt_stats_txbf_ofdma_be_steer_stats_tlv
  3039. htt_txbf_ofdma_be_steer_stats_tlv;
  3040. typedef struct {
  3041. htt_tlv_hdr_t tlv_hdr;
  3042. /* 11BE EHT OFDMA MPDUs tried in rbo steering */
  3043. A_UINT32 be_ofdma_rbo_steer_mpdus_tried;
  3044. /* 11BE EHT OFDMA MPDUs failed in rbo steering */
  3045. A_UINT32 be_ofdma_rbo_steer_mpdus_failed;
  3046. /* 11BE EHT OFDMA MPDUs tried in sifs steering */
  3047. A_UINT32 be_ofdma_sifs_steer_mpdus_tried;
  3048. /* 11BE EHT OFDMA MPDUs failed in sifs steering */
  3049. A_UINT32 be_ofdma_sifs_steer_mpdus_failed;
  3050. } htt_stats_txbf_ofdma_be_steer_mpdu_stats_tlv;
  3051. /* preserve old name alias for new name consistent with the tag name */
  3052. typedef htt_stats_txbf_ofdma_be_steer_mpdu_stats_tlv
  3053. htt_txbf_ofdma_be_steer_mpdu_stats_tlv;
  3054. /* STATS_TYPE : HTT_DBG_EXT_STATS_TXBF_OFDMA
  3055. * TLV_TAGS:
  3056. * - HTT_STATS_TXBF_OFDMA_NDPA_STATS_TAG
  3057. * - HTT_STATS_TXBF_OFDMA_NDP_STATS_TAG
  3058. * - HTT_STATS_TXBF_OFDMA_BRP_STATS_TAG
  3059. * - HTT_STATS_TXBF_OFDMA_STEER_STATS_TAG
  3060. * - HTT_STATS_TXBF_OFDMA_AX_STEER_MPDU_STATS_TAG
  3061. * - HTT_STATS_TXBF_OFDMA_BE_NDPA_STATS_TAG
  3062. * - HTT_STATS_TXBF_OFDMA_BE_NDP_STATS_TAG
  3063. * - HTT_STATS_TXBF_OFDMA_BE_BRP_STATS_TAG
  3064. * - HTT_STATS_TXBF_OFDMA_BE_STEER_STATS_TAG
  3065. * - HTT_STATS_TXBF_OFDMA_BE_STEER_MPDU_STATS_TAG
  3066. */
  3067. typedef struct {
  3068. htt_tlv_hdr_t tlv_hdr;
  3069. /** 11AC VHT SU NDP frame completed with error(s) */
  3070. A_UINT32 ac_su_ndp_err;
  3071. /** 11AC VHT SU NDPA frame completed with error(s) */
  3072. A_UINT32 ac_su_ndpa_err;
  3073. /** 11AC VHT MU MIMO NDPA frame completed with error(s) */
  3074. A_UINT32 ac_mu_mimo_ndpa_err;
  3075. /** 11AC VHT MU MIMO NDP frame completed with error(s) */
  3076. A_UINT32 ac_mu_mimo_ndp_err;
  3077. /** 11AC VHT MU MIMO BRPOLL for user 1 frame completed with error(s) */
  3078. A_UINT32 ac_mu_mimo_brp1_err;
  3079. /** 11AC VHT MU MIMO BRPOLL for user 2 frame completed with error(s) */
  3080. A_UINT32 ac_mu_mimo_brp2_err;
  3081. /** 11AC VHT MU MIMO BRPOLL for user 3 frame completed with error(s) */
  3082. A_UINT32 ac_mu_mimo_brp3_err;
  3083. /** 11AC VHT SU NDPA frame flushed by HW */
  3084. A_UINT32 ac_su_ndpa_flushed;
  3085. /** 11AC VHT SU NDP frame flushed by HW */
  3086. A_UINT32 ac_su_ndp_flushed;
  3087. /** 11AC VHT MU MIMO NDPA frame flushed by HW */
  3088. A_UINT32 ac_mu_mimo_ndpa_flushed;
  3089. /** 11AC VHT MU MIMO NDP frame flushed by HW */
  3090. A_UINT32 ac_mu_mimo_ndp_flushed;
  3091. /** 11AC VHT MU MIMO BRPOLL for user 1 frame flushed by HW */
  3092. A_UINT32 ac_mu_mimo_brpoll1_flushed;
  3093. /** 11AC VHT MU MIMO BRPOLL for user 2 frame flushed by HW */
  3094. A_UINT32 ac_mu_mimo_brpoll2_flushed;
  3095. /** 11AC VHT MU MIMO BRPOLL for user 3 frame flushed by HW */
  3096. A_UINT32 ac_mu_mimo_brpoll3_flushed;
  3097. } htt_stats_tx_selfgen_ac_err_stats_tlv;
  3098. /* preserve old name alias for new name consistent with the tag name */
  3099. typedef htt_stats_tx_selfgen_ac_err_stats_tlv htt_tx_selfgen_ac_err_stats_tlv;
  3100. typedef struct {
  3101. htt_tlv_hdr_t tlv_hdr;
  3102. /** 11AX HE SU NDP frame completed with error(s) */
  3103. A_UINT32 ax_su_ndp_err;
  3104. /** 11AX HE SU NDPA frame completed with error(s) */
  3105. A_UINT32 ax_su_ndpa_err;
  3106. /** 11AX HE MU MIMO NDPA frame completed with error(s) */
  3107. A_UINT32 ax_mu_mimo_ndpa_err;
  3108. /** 11AX HE MU MIMO NDP frame completed with error(s) */
  3109. A_UINT32 ax_mu_mimo_ndp_err;
  3110. union {
  3111. struct {
  3112. /* deprecated old names */
  3113. A_UINT32 ax_mu_mimo_brp1_err;
  3114. A_UINT32 ax_mu_mimo_brp2_err;
  3115. A_UINT32 ax_mu_mimo_brp3_err;
  3116. A_UINT32 ax_mu_mimo_brp4_err;
  3117. A_UINT32 ax_mu_mimo_brp5_err;
  3118. A_UINT32 ax_mu_mimo_brp6_err;
  3119. A_UINT32 ax_mu_mimo_brp7_err;
  3120. };
  3121. /** 11AX HE MU BR-POLL frame for 1 - 7 users completed with error(s) */
  3122. A_UINT32 ax_mu_mimo_brp_err[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  3123. };
  3124. /** 11AX HE MU Basic Trigger frame completed with error(s) */
  3125. A_UINT32 ax_basic_trigger_err;
  3126. /** 11AX HE MU BSRP Trigger frame completed with error(s) */
  3127. A_UINT32 ax_bsr_trigger_err;
  3128. /** 11AX HE MU BAR Trigger frame completed with error(s) */
  3129. A_UINT32 ax_mu_bar_trigger_err;
  3130. /** 11AX HE MU RTS Trigger frame completed with error(s) */
  3131. A_UINT32 ax_mu_rts_trigger_err;
  3132. /** 11AX HE MU ULMUMIMO Trigger frame completed with error(s) */
  3133. A_UINT32 ax_ulmumimo_trigger_err;
  3134. /**
  3135. * Number of CBF(s) received when 11AX HE MU MIMO BRPOLL
  3136. * frame completed with error(s)
  3137. */
  3138. A_UINT32 ax_mu_mimo_brp_err_num_cbf_received[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3139. /** 11AX HE SU NDPA frame flushed by HW */
  3140. A_UINT32 ax_su_ndpa_flushed;
  3141. /** 11AX HE SU NDP frame flushed by HW */
  3142. A_UINT32 ax_su_ndp_flushed;
  3143. /** 11AX HE MU MIMO NDPA frame flushed by HW */
  3144. A_UINT32 ax_mu_mimo_ndpa_flushed;
  3145. /** 11AX HE MU MIMO NDP frame flushed by HW */
  3146. A_UINT32 ax_mu_mimo_ndp_flushed;
  3147. /** 11AX HE MU BR-POLL frame for users 1 - 7 flushed by HW */
  3148. A_UINT32 ax_mu_mimo_brpoll_flushed[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  3149. /**
  3150. * 11AX HE UL-MUMIMO Trigger frame for users 0 - 7 completed with error(s)
  3151. */
  3152. A_UINT32 ax_ul_mumimo_trigger_err[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3153. /** 11AX HE MU OFDMA Basic Trigger frame completed with partial user response */
  3154. A_UINT32 ax_basic_trigger_partial_resp;
  3155. /** 11AX HE MU BSRP Trigger frame completed with partial user response */
  3156. A_UINT32 ax_bsr_trigger_partial_resp;
  3157. /** 11AX HE MU BAR Trigger frame completed with partial user response */
  3158. A_UINT32 ax_mu_bar_trigger_partial_resp;
  3159. } htt_stats_tx_selfgen_ax_err_stats_tlv;
  3160. /* preserve old name alias for new name consistent with the tag name */
  3161. typedef htt_stats_tx_selfgen_ax_err_stats_tlv htt_tx_selfgen_ax_err_stats_tlv;
  3162. typedef struct {
  3163. htt_tlv_hdr_t tlv_hdr;
  3164. /** 11BE EHT SU NDP frame completed with error(s) */
  3165. A_UINT32 be_su_ndp_err;
  3166. /** 11BE EHT SU NDPA frame completed with error(s) */
  3167. A_UINT32 be_su_ndpa_err;
  3168. /** 11BE EHT MU MIMO NDPA frame completed with error(s) */
  3169. A_UINT32 be_mu_mimo_ndpa_err;
  3170. /** 11BE EHT MU MIMO NDP frame completed with error(s) */
  3171. A_UINT32 be_mu_mimo_ndp_err;
  3172. /** 11BE EHT MU BR-POLL frame for 1 - 7 users completed with error(s) */
  3173. A_UINT32 be_mu_mimo_brp_err[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  3174. /** 11BE EHT MU Basic Trigger frame completed with error(s) */
  3175. A_UINT32 be_basic_trigger_err;
  3176. /** 11BE EHT MU BSRP Trigger frame completed with error(s) */
  3177. A_UINT32 be_bsr_trigger_err;
  3178. /** 11BE EHT MU BAR Trigger frame completed with error(s) */
  3179. A_UINT32 be_mu_bar_trigger_err;
  3180. /** 11BE EHT MU RTS Trigger frame completed with error(s) */
  3181. A_UINT32 be_mu_rts_trigger_err;
  3182. /** 11BE EHT MU ULMUMIMO Trigger frame completed with error(s) */
  3183. A_UINT32 be_ulmumimo_trigger_err;
  3184. /**
  3185. * Number of CBF(s) received when 11BE EHT MU MIMO BRPOLL frame
  3186. * completed with error(s)
  3187. */
  3188. A_UINT32 be_mu_mimo_brp_err_num_cbf_received[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3189. /** 11BE EHT SU NDPA frame flushed by HW */
  3190. A_UINT32 be_su_ndpa_flushed;
  3191. /** 11BE EHT SU NDP frame flushed by HW */
  3192. A_UINT32 be_su_ndp_flushed;
  3193. /** 11BE EHT MU MIMO NDPA frame flushed by HW */
  3194. A_UINT32 be_mu_mimo_ndpa_flushed;
  3195. /** 11BE HT MU MIMO NDP frame flushed by HW */
  3196. A_UINT32 be_mu_mimo_ndp_flushed;
  3197. /** 11BE EHT MU BR-POLL frame for users 1 - 7 flushed by HW */
  3198. A_UINT32 be_mu_mimo_brpoll_flushed[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  3199. /**
  3200. * 11BE EHT UL-MUMIMO Trigger frame for users 0 - 7 completed with error(s)
  3201. */
  3202. A_UINT32 be_ul_mumimo_trigger_err[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3203. /** 11BE EHT MU OFDMA Basic Trigger frame completed with partial user response */
  3204. A_UINT32 be_basic_trigger_partial_resp;
  3205. /** 11BE EHT MU BSRP Trigger frame completed with partial user response */
  3206. A_UINT32 be_bsr_trigger_partial_resp;
  3207. /** 11BE EHT MU BAR Trigger frame completed with partial user response */
  3208. A_UINT32 be_mu_bar_trigger_partial_resp;
  3209. /** 11BE EHT MU RTS Trigger frame blocked due to partner link TX/RX(eMLSR) */
  3210. A_UINT32 be_mu_rts_trigger_blocked;
  3211. /** 11BE EHT MU BSR Trigger frame blocked due to partner link TX/RX(eMLSR) */
  3212. A_UINT32 be_bsr_trigger_blocked;
  3213. } htt_stats_tx_selfgen_be_err_stats_tlv;
  3214. /* preserve old name alias for new name consistent with the tag name */
  3215. typedef htt_stats_tx_selfgen_be_err_stats_tlv htt_tx_selfgen_be_err_stats_tlv;
  3216. /*
  3217. * Scheduler completion status reason code.
  3218. * (0) HTT_TXERR_NONE - No error (Success).
  3219. * (1) HTT_TXERR_RESP - Response timeout, response mismatch, BW mismatch,
  3220. * MIMO control mismatch, CRC error etc.
  3221. * (2) HTT_TXERR_FILT - Blocked by HW tx filtering.
  3222. * (3) HTT_TXERR_FIFO - FIFO, misc. errors in HW.
  3223. * (4) HTT_TXERR_SWABORT - Software initialted abort (TX_ABORT).
  3224. * (5) HTT_TXERR_RESERVED1 - Currently reserved.
  3225. * (6) HTT_TXERR_RESERVED2 - Currently reserved.
  3226. */
  3227. /* Scheduler error code.
  3228. * (0) HTT_TX_SELFGEN_SCH_TSFLAG_FLUSH_RCVD_ERR - Flush received from HW.
  3229. * (1) HTT_TX_SELFGEN_SCH_TSFLAG_FILT_SCHED_CMD_ERR - Scheduler command was
  3230. * filtered by HW.
  3231. * (2) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_MISMATCH_ERR - Response frame mismatch
  3232. * error.
  3233. * (3) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_MIMO_CTRL_MISMATCH_ERR - CBF
  3234. * received with MIMO control mismatch.
  3235. * (4) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_BW_MISMATCH_ERR - CBF received with
  3236. * BW mismatch.
  3237. * (5) HTT_TX_SELFGEN_SCH_TSFLAG_RETRY_COUNT_FAIL_ERR - Error in transmitting
  3238. * frame even after maximum retries.
  3239. * (6) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_TOO_LATE_RECEIVED_ERR - Response frame
  3240. * received outside RX window.
  3241. * (7) HTT_TX_SELFGEN_SCH_TSFLAG_SIFS_STALL_NO_NEXT_CMD_ERR - No frame
  3242. * received by HW for queuing within SIFS interval.
  3243. */
  3244. typedef struct {
  3245. htt_tlv_hdr_t tlv_hdr;
  3246. /** 11AC VHT SU NDPA scheduler completion status reason code */
  3247. A_UINT32 ac_su_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3248. /** 11AC VHT SU NDP scheduler completion status reason code */
  3249. A_UINT32 ac_su_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3250. /** 11AC VHT SU NDP scheduler error code */
  3251. A_UINT32 ac_su_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3252. /** 11AC VHT MU MIMO NDPA scheduler completion status reason code */
  3253. A_UINT32 ac_mu_mimo_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3254. /** 11AC VHT MU MIMO NDP scheduler completion status reason code */
  3255. A_UINT32 ac_mu_mimo_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3256. /** 11AC VHT MU MIMO NDP scheduler error code */
  3257. A_UINT32 ac_mu_mimo_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3258. /** 11AC VHT MU MIMO BRPOLL scheduler completion status reason code */
  3259. A_UINT32 ac_mu_mimo_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3260. /** 11AC VHT MU MIMO BRPOLL scheduler error code */
  3261. A_UINT32 ac_mu_mimo_brp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3262. } htt_stats_tx_selfgen_ac_sched_status_stats_tlv;
  3263. /* preserve old name alias for new name consistent with the tag name */
  3264. typedef htt_stats_tx_selfgen_ac_sched_status_stats_tlv
  3265. htt_tx_selfgen_ac_sched_status_stats_tlv;
  3266. typedef struct {
  3267. htt_tlv_hdr_t tlv_hdr;
  3268. /** 11AX HE SU NDPA scheduler completion status reason code */
  3269. A_UINT32 ax_su_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3270. /** 11AX SU NDP scheduler completion status reason code */
  3271. A_UINT32 ax_su_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3272. /** 11AX HE SU NDP scheduler error code */
  3273. A_UINT32 ax_su_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3274. /** 11AX HE MU MIMO NDPA scheduler completion status reason code */
  3275. A_UINT32 ax_mu_mimo_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3276. /** 11AX HE MU MIMO NDP scheduler completion status reason code */
  3277. A_UINT32 ax_mu_mimo_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3278. /** 11AX HE MU MIMO NDP scheduler error code */
  3279. A_UINT32 ax_mu_mimo_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3280. /** 11AX HE MU MIMO MU BRPOLL scheduler completion status reason code */
  3281. A_UINT32 ax_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3282. /** 11AX HE MU MIMO MU BRPOLL scheduler error code */
  3283. A_UINT32 ax_mu_brp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3284. /** 11AX HE MU BAR scheduler completion status reason code */
  3285. A_UINT32 ax_mu_bar_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3286. /** 11AX HE MU BAR scheduler error code */
  3287. A_UINT32 ax_mu_bar_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3288. /**
  3289. * 11AX HE UL OFDMA Basic Trigger scheduler completion status reason code
  3290. */
  3291. A_UINT32 ax_basic_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3292. /** 11AX HE UL OFDMA Basic Trigger scheduler error code */
  3293. A_UINT32 ax_basic_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3294. /**
  3295. * 11AX HE UL MUMIMO Basic Trigger scheduler completion status reason code
  3296. */
  3297. A_UINT32 ax_ulmumimo_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3298. /** 11AX HE UL MUMIMO Basic Trigger scheduler error code */
  3299. A_UINT32 ax_ulmumimo_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3300. } htt_stats_tx_selfgen_ax_sched_status_stats_tlv;
  3301. /* preserve old name alias for new name consistent with the tag name */
  3302. typedef htt_stats_tx_selfgen_ax_sched_status_stats_tlv
  3303. htt_tx_selfgen_ax_sched_status_stats_tlv;
  3304. typedef struct {
  3305. htt_tlv_hdr_t tlv_hdr;
  3306. /** 11BE EHT SU NDPA scheduler completion status reason code */
  3307. A_UINT32 be_su_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3308. /** 11BE SU NDP scheduler completion status reason code */
  3309. A_UINT32 be_su_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3310. /** 11BE EHT SU NDP scheduler error code */
  3311. A_UINT32 be_su_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3312. /** 11BE EHT MU MIMO NDPA scheduler completion status reason code */
  3313. A_UINT32 be_mu_mimo_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3314. /** 11BE EHT MU MIMO NDP scheduler completion status reason code */
  3315. A_UINT32 be_mu_mimo_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3316. /** 11BE EHT MU MIMO NDP scheduler error code */
  3317. A_UINT32 be_mu_mimo_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3318. /** 11BE EHT MU MIMO MU BRPOLL scheduler completion status reason code */
  3319. A_UINT32 be_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3320. /** 11BE EHT MU MIMO MU BRPOLL scheduler error code */
  3321. A_UINT32 be_mu_brp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3322. /** 11BE EHT MU BAR scheduler completion status reason code */
  3323. A_UINT32 be_mu_bar_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3324. /** 11BE EHT MU BAR scheduler error code */
  3325. A_UINT32 be_mu_bar_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3326. /**
  3327. * 11BE EHT UL OFDMA Basic Trigger scheduler completion status reason code
  3328. */
  3329. A_UINT32 be_basic_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3330. /** 11BE EHT UL OFDMA Basic Trigger scheduler error code */
  3331. A_UINT32 be_basic_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3332. /**
  3333. * 11BE EHT UL MUMIMO Basic Trigger scheduler completion status reason code
  3334. */
  3335. A_UINT32 be_ulmumimo_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3336. /** 11BE EHT UL MUMIMO Basic Trigger scheduler error code */
  3337. A_UINT32 be_ulmumimo_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3338. } htt_stats_tx_selfgen_be_sched_status_stats_tlv;
  3339. /* preserve old name alias for new name consistent with the tag name */
  3340. typedef htt_stats_tx_selfgen_be_sched_status_stats_tlv
  3341. htt_tx_selfgen_be_sched_status_stats_tlv;
  3342. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  3343. * TLV_TAGS:
  3344. * - HTT_STATS_TX_SELFGEN_CMN_STATS_TAG
  3345. * - HTT_STATS_TX_SELFGEN_AC_STATS_TAG
  3346. * - HTT_STATS_TX_SELFGEN_AX_STATS_TAG
  3347. * - HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG
  3348. * - HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG
  3349. * - HTT_STATS_TX_SELFGEN_AC_SCHED_STATUS_STATS_TAG
  3350. * - HTT_STATS_TX_SELFGEN_AX_SCHED_STATUS_STATS_TAG
  3351. * - HTT_STATS_TX_SELFGEN_BE_STATS_TAG
  3352. * - HTT_STATS_TX_SELFGEN_BE_ERR_STATS_TAG
  3353. * - HTT_STATS_TX_SELFGEN_BE_SCHED_STATUS_STATS_TAG
  3354. */
  3355. /* NOTE:
  3356. * This structure is for documentation, and cannot be safely used directly.
  3357. * Instead, use the constituent TLV structures to fill/parse.
  3358. */
  3359. #ifdef ATH_TARGET
  3360. typedef struct {
  3361. htt_stats_tx_selfgen_cmn_stats_tlv cmn_tlv;
  3362. htt_stats_tx_selfgen_ac_stats_tlv ac_tlv;
  3363. htt_stats_tx_selfgen_ax_stats_tlv ax_tlv;
  3364. htt_stats_tx_selfgen_ac_err_stats_tlv ac_err_tlv;
  3365. htt_stats_tx_selfgen_ax_err_stats_tlv ax_err_tlv;
  3366. htt_stats_tx_selfgen_ac_sched_status_stats_tlv ac_sched_status_tlv;
  3367. htt_stats_tx_selfgen_ax_sched_status_stats_tlv ax_sched_status_tlv;
  3368. htt_stats_tx_selfgen_be_stats_tlv be_tlv;
  3369. htt_stats_tx_selfgen_be_err_stats_tlv be_err_tlv;
  3370. htt_stats_tx_selfgen_be_sched_status_stats_tlv be_sched_status_tlv;
  3371. } htt_tx_pdev_selfgen_stats_t;
  3372. #endif /* ATH_TARGET */
  3373. /* == TX MU STATS == */
  3374. typedef struct {
  3375. htt_tlv_hdr_t tlv_hdr;
  3376. /** Number of MU MIMO schedules posted to HW */
  3377. A_UINT32 mu_mimo_sch_posted;
  3378. /** Number of MU MIMO schedules failed to post */
  3379. A_UINT32 mu_mimo_sch_failed;
  3380. /** Number of MU MIMO PPDUs posted to HW */
  3381. A_UINT32 mu_mimo_ppdu_posted;
  3382. /*
  3383. * This is the common description for the below sch stats.
  3384. * Counts the number of transmissions of each number of MU users
  3385. * in each TX mode.
  3386. * The array index is the "number of users - 1".
  3387. * For example, ac_mu_mimo_sch_nusers[1] counts the number of 11AC MU2
  3388. * TX PPDUs, ac_mu_mimo_sch_nusers[2] counts the number of 11AC MU3
  3389. * TX PPDUs and so on.
  3390. * The same is applicable for the other TX mode stats.
  3391. */
  3392. /** Represents the count for 11AC DL MU MIMO sequences */
  3393. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3394. /** Represents the count for 11AX DL MU MIMO sequences */
  3395. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3396. /** Represents the count for 11AX DL MU OFDMA sequences */
  3397. A_UINT32 ax_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3398. /**
  3399. * Represents the count for 11AX UL MU OFDMA sequences with Basic Triggers
  3400. */
  3401. A_UINT32 ax_ul_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3402. /** Represents the count for 11AX UL MU OFDMA sequences with BSRP Triggers */
  3403. A_UINT32 ax_ul_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3404. /** Represents the count for 11AX UL MU OFDMA sequences with BAR Triggers */
  3405. A_UINT32 ax_ul_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3406. /** Represents the count for 11AX UL MU OFDMA sequences with BRP Triggers */
  3407. A_UINT32 ax_ul_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3408. /**
  3409. * Represents the count for 11AX UL MU MIMO sequences with Basic Triggers
  3410. */
  3411. A_UINT32 ax_ul_mumimo_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3412. /** Represents the count for 11AX UL MU MIMO sequences with BRP Triggers */
  3413. A_UINT32 ax_ul_mumimo_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3414. /** Number of 11AC DL MU MIMO schedules posted per group size (0-3) */
  3415. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3416. /** Number of 11AX DL MU MIMO schedules posted per group size */
  3417. A_UINT32 ax_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3418. /** Represents the count for 11BE DL MU MIMO sequences */
  3419. A_UINT32 be_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3420. /** Number of 11BE DL MU MIMO schedules posted per group size */
  3421. A_UINT32 be_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3422. /** Number of 11AC DL MU MIMO schedules posted per group size (4-7) */
  3423. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz_ext[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3424. } htt_stats_tx_pdev_mu_mimo_stats_tlv;
  3425. /* preserve old name alias for new name consistent with the tag name */
  3426. typedef htt_stats_tx_pdev_mu_mimo_stats_tlv htt_tx_pdev_mu_mimo_sch_stats_tlv;
  3427. typedef struct {
  3428. htt_tlv_hdr_t tlv_hdr;
  3429. A_UINT32 dl_mumimo_grp_best_grp_size[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3430. A_UINT32 dl_mumimo_grp_best_num_usrs[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3431. A_UINT32 dl_mumimo_grp_eligible[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3432. A_UINT32 dl_mumimo_grp_ineligible[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3433. A_UINT32 dl_mumimo_grp_invalid[HTT_TX_NUM_MUMIMO_GRP_INVALID_WORDS];
  3434. A_UINT32 dl_mumimo_grp_tputs[HTT_STATS_MUMIMO_TPUT_NUM_BINS];
  3435. A_UINT32 ul_mumimo_grp_best_grp_size[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3436. A_UINT32 ul_mumimo_grp_best_num_usrs[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3437. A_UINT32 ul_mumimo_grp_tputs[HTT_STATS_MUMIMO_TPUT_NUM_BINS];
  3438. } htt_stats_tx_pdev_mumimo_grp_stats_tlv;
  3439. /* preserve old name alias for new name consistent with the tag name */
  3440. typedef htt_stats_tx_pdev_mumimo_grp_stats_tlv htt_tx_pdev_mumimo_grp_stats_tlv;
  3441. typedef struct {
  3442. htt_tlv_hdr_t tlv_hdr;
  3443. /** Number of MU MIMO schedules posted to HW */
  3444. A_UINT32 mu_mimo_sch_posted;
  3445. /** Number of MU MIMO schedules failed to post */
  3446. A_UINT32 mu_mimo_sch_failed;
  3447. /** Number of MU MIMO PPDUs posted to HW */
  3448. A_UINT32 mu_mimo_ppdu_posted;
  3449. /*
  3450. * This is the common description for the below sch stats.
  3451. * Counts the number of transmissions of each number of MU users
  3452. * in each TX mode.
  3453. * The array index is the "number of users - 1".
  3454. * For example, ac_mu_mimo_sch_nusers[1] counts the number of 11AC MU2
  3455. * TX PPDUs, ac_mu_mimo_sch_nusers[2] counts the number of 11AC MU3
  3456. * TX PPDUs and so on.
  3457. * The same is applicable for the other TX mode stats.
  3458. */
  3459. /** Represents the count for 11AC DL MU MIMO sequences */
  3460. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3461. /** Represents the count for 11AX DL MU MIMO sequences */
  3462. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3463. /** Number of 11AC DL MU MIMO schedules posted per group size (0-3) */
  3464. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3465. /** Number of 11AX DL MU MIMO schedules posted per group size */
  3466. A_UINT32 ax_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3467. /** Represents the count for 11BE DL MU MIMO sequences */
  3468. A_UINT32 be_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3469. /** Number of 11BE DL MU MIMO schedules posted per group size */
  3470. A_UINT32 be_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3471. /** Number of 11AC DL MU MIMO schedules posted per group size (4 - 7)*/
  3472. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz_ext[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3473. } htt_stats_tx_pdev_dl_mu_mimo_stats_tlv;
  3474. /* preserve old name alias for new name consistent with the tag name */
  3475. typedef htt_stats_tx_pdev_dl_mu_mimo_stats_tlv
  3476. htt_tx_pdev_dl_mu_mimo_sch_stats_tlv;
  3477. typedef struct {
  3478. htt_tlv_hdr_t tlv_hdr;
  3479. /** Represents the count for 11AX DL MU OFDMA sequences */
  3480. A_UINT32 ax_mu_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3481. } htt_stats_tx_pdev_dl_mu_ofdma_stats_tlv;
  3482. /* preserve old name alias for new name consistent with the tag name */
  3483. typedef htt_stats_tx_pdev_dl_mu_ofdma_stats_tlv
  3484. htt_tx_pdev_dl_mu_ofdma_sch_stats_tlv;
  3485. typedef struct {
  3486. htt_tlv_hdr_t tlv_hdr;
  3487. /** Represents the count for 11BE DL MU OFDMA sequences */
  3488. A_UINT32 be_mu_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3489. } htt_stats_tx_pdev_be_dl_mu_ofdma_stats_tlv;
  3490. /* preserve old name alias for new name consistent with the tag name */
  3491. typedef htt_stats_tx_pdev_be_dl_mu_ofdma_stats_tlv
  3492. htt_tx_pdev_be_dl_mu_ofdma_sch_stats_tlv;
  3493. typedef struct {
  3494. htt_tlv_hdr_t tlv_hdr;
  3495. /**
  3496. * Represents the count for 11AX UL MU OFDMA sequences with Basic Triggers
  3497. */
  3498. A_UINT32 ax_ul_mu_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3499. /**
  3500. * Represents the count for 11AX UL MU OFDMA sequences with BSRP Triggers
  3501. */
  3502. A_UINT32 ax_ul_mu_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3503. /**
  3504. * Represents the count for 11AX UL MU OFDMA sequences with BAR Triggers
  3505. */
  3506. A_UINT32 ax_ul_mu_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3507. /**
  3508. * Represents the count for 11AX UL MU OFDMA sequences with BRP Triggers
  3509. */
  3510. A_UINT32 ax_ul_mu_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3511. } htt_stats_tx_pdev_ul_mu_ofdma_stats_tlv;
  3512. /* preserve old name alias for new name consistent with the tag name */
  3513. typedef htt_stats_tx_pdev_ul_mu_ofdma_stats_tlv
  3514. htt_tx_pdev_ul_mu_ofdma_sch_stats_tlv;
  3515. typedef struct {
  3516. htt_tlv_hdr_t tlv_hdr;
  3517. /**
  3518. * Represents the count for 11BE UL MU OFDMA sequences with Basic Triggers
  3519. */
  3520. A_UINT32 be_ul_mu_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3521. /**
  3522. * Represents the count for 11BE UL MU OFDMA sequences with BSRP Triggers
  3523. */
  3524. A_UINT32 be_ul_mu_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3525. /**
  3526. * Represents the count for 11BE UL MU OFDMA sequences with BAR Triggers
  3527. */
  3528. A_UINT32 be_ul_mu_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3529. /**
  3530. * Represents the count for 11BE UL MU OFDMA sequences with BRP Triggers
  3531. */
  3532. A_UINT32 be_ul_mu_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3533. } htt_stats_tx_pdev_be_ul_mu_ofdma_stats_tlv;
  3534. /* preserve old name alias for new name consistent with the tag name */
  3535. typedef htt_stats_tx_pdev_be_ul_mu_ofdma_stats_tlv
  3536. htt_tx_pdev_be_ul_mu_ofdma_sch_stats_tlv;
  3537. typedef struct {
  3538. htt_tlv_hdr_t tlv_hdr;
  3539. /**
  3540. * Represents the count for 11AX UL MU MIMO sequences with Basic Triggers
  3541. */
  3542. A_UINT32 ax_ul_mu_mimo_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3543. /**
  3544. * Represents the count for 11AX UL MU MIMO sequences with BRP Triggers
  3545. */
  3546. A_UINT32 ax_ul_mu_mimo_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3547. } htt_stats_tx_pdev_ul_mu_mimo_stats_tlv;
  3548. /* preserve old name alias for new name consistent with the tag name */
  3549. typedef htt_stats_tx_pdev_ul_mu_mimo_stats_tlv
  3550. htt_tx_pdev_ul_mu_mimo_sch_stats_tlv;
  3551. typedef struct {
  3552. htt_tlv_hdr_t tlv_hdr;
  3553. /**
  3554. * Represents the count for 11BE UL MU MIMO sequences with Basic Triggers
  3555. */
  3556. A_UINT32 be_ul_mu_mimo_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3557. /**
  3558. * Represents the count for 11BE UL MU MIMO sequences with BRP Triggers
  3559. */
  3560. A_UINT32 be_ul_mu_mimo_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3561. } htt_stats_tx_pdev_be_ul_mu_mimo_stats_tlv;
  3562. /* preserve old name alias for new name consistent with the tag name */
  3563. typedef htt_stats_tx_pdev_be_ul_mu_mimo_stats_tlv
  3564. htt_tx_pdev_be_ul_mu_mimo_sch_stats_tlv;
  3565. typedef struct {
  3566. htt_tlv_hdr_t tlv_hdr;
  3567. /** 11AC DL MU MIMO number of mpdus queued to HW, per user */
  3568. A_UINT32 mu_mimo_mpdus_queued_usr;
  3569. /** 11AC DL MU MIMO number of mpdus tried over the air, per user */
  3570. A_UINT32 mu_mimo_mpdus_tried_usr;
  3571. /** 11AC DL MU MIMO number of mpdus failed acknowledgement, per user */
  3572. A_UINT32 mu_mimo_mpdus_failed_usr;
  3573. /** 11AC DL MU MIMO number of mpdus re-queued to HW, per user */
  3574. A_UINT32 mu_mimo_mpdus_requeued_usr;
  3575. /** 11AC DL MU MIMO BA not received, per user */
  3576. A_UINT32 mu_mimo_err_no_ba_usr;
  3577. /** 11AC DL MU MIMO mpdu underrun encountered, per user */
  3578. A_UINT32 mu_mimo_mpdu_underrun_usr;
  3579. /** 11AC DL MU MIMO ampdu underrun encountered, per user */
  3580. A_UINT32 mu_mimo_ampdu_underrun_usr;
  3581. /** 11AX MU MIMO number of mpdus queued to HW, per user */
  3582. A_UINT32 ax_mu_mimo_mpdus_queued_usr;
  3583. /** 11AX MU MIMO number of mpdus tried over the air, per user */
  3584. A_UINT32 ax_mu_mimo_mpdus_tried_usr;
  3585. /** 11AX DL MU MIMO number of mpdus failed acknowledgement, per user */
  3586. A_UINT32 ax_mu_mimo_mpdus_failed_usr;
  3587. /** 11AX DL MU MIMO number of mpdus re-queued to HW, per user */
  3588. A_UINT32 ax_mu_mimo_mpdus_requeued_usr;
  3589. /** 11AX DL MU MIMO BA not received, per user */
  3590. A_UINT32 ax_mu_mimo_err_no_ba_usr;
  3591. /** 11AX DL MU MIMO mpdu underrun encountered, per user */
  3592. A_UINT32 ax_mu_mimo_mpdu_underrun_usr;
  3593. /** 11AX DL MU MIMO ampdu underrun encountered, per user */
  3594. A_UINT32 ax_mu_mimo_ampdu_underrun_usr;
  3595. /** 11AX MU OFDMA number of mpdus queued to HW, per user */
  3596. A_UINT32 ax_ofdma_mpdus_queued_usr;
  3597. /** 11AX MU OFDMA number of mpdus tried over the air, per user */
  3598. A_UINT32 ax_ofdma_mpdus_tried_usr;
  3599. /** 11AX MU OFDMA number of mpdus failed acknowledgement, per user */
  3600. A_UINT32 ax_ofdma_mpdus_failed_usr;
  3601. /** 11AX MU OFDMA number of mpdus re-queued to HW, per user */
  3602. A_UINT32 ax_ofdma_mpdus_requeued_usr;
  3603. /** 11AX MU OFDMA BA not received, per user */
  3604. A_UINT32 ax_ofdma_err_no_ba_usr;
  3605. /** 11AX MU OFDMA mpdu underrun encountered, per user */
  3606. A_UINT32 ax_ofdma_mpdu_underrun_usr;
  3607. /** 11AX MU OFDMA ampdu underrun encountered, per user */
  3608. A_UINT32 ax_ofdma_ampdu_underrun_usr;
  3609. } htt_stats_tx_pdev_mumimo_mpdu_stats_tlv;
  3610. /* preserve old name alias for new name consistent with the tag name */
  3611. typedef htt_stats_tx_pdev_mumimo_mpdu_stats_tlv
  3612. htt_tx_pdev_mu_mimo_mpdu_stats_tlv;
  3613. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AC 1 /* SCHED_TX_MODE_MU_MIMO_AC */
  3614. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AX 2 /* SCHED_TX_MODE_MU_MIMO_AX */
  3615. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_AX 3 /* SCHED_TX_MODE_MU_OFDMA_AX */
  3616. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_BE 4 /* SCHED_TX_MODE_MU_OFDMA_BE */
  3617. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_BE 5 /* SCHED_TX_MODE_MU_MIMO_BE */
  3618. typedef struct {
  3619. htt_tlv_hdr_t tlv_hdr;
  3620. /* mpdu level stats */
  3621. A_UINT32 mpdus_queued_usr;
  3622. A_UINT32 mpdus_tried_usr;
  3623. A_UINT32 mpdus_failed_usr;
  3624. A_UINT32 mpdus_requeued_usr;
  3625. A_UINT32 err_no_ba_usr;
  3626. A_UINT32 mpdu_underrun_usr;
  3627. A_UINT32 ampdu_underrun_usr;
  3628. A_UINT32 user_index;
  3629. /** HTT_STATS_TX_SCHED_MODE_xxx */
  3630. A_UINT32 tx_sched_mode;
  3631. } htt_stats_tx_pdev_mpdu_stats_tlv;
  3632. /* preserve old name alias for new name consistent with the tag name */
  3633. typedef htt_stats_tx_pdev_mpdu_stats_tlv htt_tx_pdev_mpdu_stats_tlv;
  3634. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_MU
  3635. * TLV_TAGS:
  3636. * - HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG (multiple)
  3637. * - HTT_STATS_TX_PDEV_MPDU_STATS_TAG (multiple)
  3638. */
  3639. /* NOTE:
  3640. * This structure is for documentation, and cannot be safely used directly.
  3641. * Instead, use the constituent TLV structures to fill/parse.
  3642. */
  3643. #ifdef ATH_TARGET
  3644. typedef struct {
  3645. htt_stats_tx_pdev_mu_mimo_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  3646. htt_stats_tx_pdev_dl_mu_mimo_stats_tlv dl_mu_mimo_sch_stats_tlv[1];
  3647. htt_stats_tx_pdev_ul_mu_mimo_stats_tlv ul_mu_mimo_sch_stats_tlv[1];
  3648. htt_stats_tx_pdev_dl_mu_ofdma_stats_tlv dl_mu_ofdma_sch_stats_tlv[1];
  3649. htt_stats_tx_pdev_ul_mu_ofdma_stats_tlv ul_mu_ofdma_sch_stats_tlv[1];
  3650. /*
  3651. * Note that though mu_mimo_mpdu_stats_tlv is named MU-MIMO,
  3652. * it can also hold MU-OFDMA stats.
  3653. */
  3654. htt_stats_tx_pdev_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_MAX_NUM_USERS */
  3655. htt_stats_tx_pdev_mumimo_grp_stats_tlv mumimo_grp_stats_tlv;
  3656. } htt_tx_pdev_mu_mimo_stats_t;
  3657. #endif /* ATH_TARGET */
  3658. /* == TX SCHED STATS == */
  3659. #define HTT_SCHED_TXQ_CMD_POSTED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3660. /* NOTE: Variable length TLV, use length spec to infer array size */
  3661. typedef struct {
  3662. htt_tlv_hdr_t tlv_hdr;
  3663. /** Scheduler command posted per tx_mode */
  3664. A_UINT32 sched_cmd_posted[1/* length = num tx modes */];
  3665. } htt_stats_sched_txq_cmd_posted_tlv;
  3666. /* preserve old name alias for new name consistent with the tag name */
  3667. typedef htt_stats_sched_txq_cmd_posted_tlv htt_sched_txq_cmd_posted_tlv_v;
  3668. #define HTT_SCHED_TXQ_CMD_REAPED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3669. /* NOTE: Variable length TLV, use length spec to infer array size */
  3670. typedef struct {
  3671. htt_tlv_hdr_t tlv_hdr;
  3672. /** Scheduler command reaped per tx_mode */
  3673. A_UINT32 sched_cmd_reaped[1/* length = num tx modes */];
  3674. } htt_stats_sched_txq_cmd_reaped_tlv;
  3675. /* preserve old name alias for new name consistent with the tag name */
  3676. typedef htt_stats_sched_txq_cmd_reaped_tlv htt_sched_txq_cmd_reaped_tlv_v;
  3677. #define HTT_SCHED_TXQ_SCHED_ORDER_SU_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3678. /* NOTE: Variable length TLV, use length spec to infer array size */
  3679. typedef struct {
  3680. htt_tlv_hdr_t tlv_hdr;
  3681. /**
  3682. * sched_order_su contains the peer IDs of peers chosen in the last
  3683. * NUM_SCHED_ORDER_LOG scheduler instances.
  3684. * The array is circular; it's unspecified which array element corresponds
  3685. * to the most recent scheduler invocation, and which corresponds to
  3686. * the (NUM_SCHED_ORDER_LOG-1) most recent scheduler invocation.
  3687. *
  3688. * HTT_TX_PDEV_NUM_SCHED_ORDER_LOG
  3689. */
  3690. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, sched_order_su);
  3691. } htt_stats_sched_txq_sched_order_su_tlv;
  3692. /* preserve old name alias for new name consistent with the tag name */
  3693. typedef htt_stats_sched_txq_sched_order_su_tlv htt_sched_txq_sched_order_su_tlv_v;
  3694. typedef struct {
  3695. htt_tlv_hdr_t tlv_hdr;
  3696. A_UINT32 htt_stats_type;
  3697. } htt_stats_error_tlv_v;
  3698. typedef enum {
  3699. HTT_SCHED_TID_SKIP_SCHED_MASK_DISABLED = 0, /* Skip the tid when WAL_TID_DISABLE_TX_SCHED_MASK is true */
  3700. HTT_SCHED_TID_SKIP_NOTIFY_MPDU, /* Skip the tid's 2nd sched_cmd when 1st cmd is ongoing */
  3701. HTT_SCHED_TID_SKIP_MPDU_STATE_INVALID, /* Skip the tid when MPDU state is invalid */
  3702. HTT_SCHED_TID_SKIP_SCHED_DISABLED, /* Skip the tid when scheduling is disabled for that tid */
  3703. HTT_SCHED_TID_SKIP_TQM_BYPASS_CMD_PENDING, /* Skip the TQM bypass tid when it has pending sched_cmd */
  3704. HTT_SCHED_TID_SKIP_SECOND_SU_SCHEDULE, /* Skip tid from 2nd SU schedule when any of the following flag is set
  3705. WAL_TX_TID(SEND_BAR | TQM_MPDU_STATE_VALID | SEND_QOS_NULL | TQM_NOTIFY_MPDU | SENDN_PENDING) */
  3706. HTT_SCHED_TID_SKIP_CMD_SLOT_NOT_AVAIL, /* Skip the tid when command slot is not available */
  3707. HTT_SCHED_TID_SKIP_NO_DATA, /* Skip tid without data */
  3708. HTT_SCHED_TID_SKIP_NO_ENQ = HTT_SCHED_TID_SKIP_NO_DATA, /* deprecated old name */
  3709. HTT_SCHED_TID_SKIP_LOW_ENQ, /* Skip the tid when enqueue is low */
  3710. HTT_SCHED_TID_SKIP_PAUSED, /* Skipping the paused tid(sendn-frames) */
  3711. HTT_SCHED_TID_SKIP_UL_RESP, /* skip UL response tid */
  3712. HTT_SCHED_TID_SKIP_UL = HTT_SCHED_TID_SKIP_UL_RESP, /* deprecated old name */
  3713. HTT_SCHED_TID_REMOVE_PAUSED, /* Removing the paused tid when number of sendn frames is zero */
  3714. HTT_SCHED_TID_REMOVE_NO_ENQ, /* Remove tid with zero queue depth */
  3715. HTT_SCHED_TID_REMOVE_UL_RESP, /* Remove tid UL response */
  3716. HTT_SCHED_TID_REMOVE_UL = HTT_SCHED_TID_REMOVE_UL_RESP, /* deprecated old name */
  3717. HTT_SCHED_TID_QUERY, /* Moving to next user and adding tid in prepend list when qstats update is pending */
  3718. HTT_SCHED_TID_SU_ONLY, /* Tid is eligible and TX_SCHED_SU_ONLY is true */
  3719. HTT_SCHED_TID_ELIGIBLE, /* Tid is eligible for scheduling */
  3720. HTT_SCHED_TID_SKIP_EXCEPT_EAPOL, /* skip tid except eapol */
  3721. HTT_SCHED_TID_SU_LOW_PRI_ONLY, /* su low priority tid only */
  3722. HTT_SCHED_TID_SKIP_SOUND_IN_PROGRESS, /* skip tid sound in progress */
  3723. HTT_SCHED_TID_SKIP_NO_UL_DATA, /* skip ul tid when no ul data */
  3724. HTT_SCHED_TID_REMOVE_UL_NOT_CAPABLE, /* Remove tid that are not UL capable */
  3725. HTT_SCHED_TID_UL_ELIGIBLE, /* Tid is eligible for UL scheduling */
  3726. HTT_SCHED_TID_FALLBACK_TO_PREV_DECISION, /* Fall back to previous decision */
  3727. HTT_SCHED_TID_SKIP_PEER_ALREADY_IN_TXQ, /* skip tid, peer is already available in the txq */
  3728. HTT_SCHED_TID_SKIP_DELAY_UL_SCHED, /* skip tid delay UL schedule */
  3729. HTT_SCHED_TID_SKIP_PWR_SAVE_STATE_OFF, /* Limit UL scheduling to primary link if not in power save state */
  3730. HTT_SCHED_TID_SKIP_TWT_SUSPEND, /* Skip UL trigger for certain cases ex TWT suspend */
  3731. HTT_SCHED_TID_SKIP_DISABLE_160MHZ_OFDMA, /* Skip ul tid if peer supports 160MHZ */
  3732. HTT_SCHED_TID_SKIP_ULMU_DISABLE_FROM_OMI, /* Skip ul tid if sta send omi to indicate to disable UL mu data */
  3733. HTT_SCHED_TID_SKIP_UL_MAX_SCHED_CMD_EXCEEDED,/* skip ul tid if max sched cmd is exceeded */
  3734. HTT_SCHED_TID_SKIP_UL_SMALL_QDEPTH, /* Skip ul tid for small qdepth */
  3735. HTT_SCHED_TID_SKIP_UL_TWT_PAUSED, /* Skip ul tid if twt txq is paused */
  3736. HTT_SCHED_TID_SKIP_PEER_UL_RX_NOT_ACTIVE, /* Skip ul tid if peer ul rx is not active */
  3737. HTT_SCHED_TID_SKIP_NO_FORCE_TRIGGER, /* Skip ul tid if there is no force triggers */
  3738. HTT_SCHED_TID_SKIP_SMART_BASIC_TRIGGER, /* Skip ul tid if smart basic trigger doesn't have enough data */
  3739. HTT_SCHED_INELIGIBILITY_MAX,
  3740. } htt_sched_txq_sched_ineligibility_tlv_enum;
  3741. #define HTT_SCHED_TXQ_SCHED_INELIGIBILITY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3742. /* NOTE: Variable length TLV, use length spec to infer array size */
  3743. typedef struct {
  3744. htt_tlv_hdr_t tlv_hdr;
  3745. /**
  3746. * sched_ineligibility counts the number of occurrences of different
  3747. * reasons for tid ineligibility during eligibility checks per txq
  3748. * in scheduling
  3749. *
  3750. * Indexed by htt_sched_txq_sched_ineligibility_tlv_enum.
  3751. */
  3752. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, sched_ineligibility);
  3753. } htt_stats_sched_txq_sched_ineligibility_tlv;
  3754. /* preserve old name alias for new name consistent with the tag name */
  3755. typedef htt_stats_sched_txq_sched_ineligibility_tlv
  3756. htt_sched_txq_sched_ineligibility_tlv_v;
  3757. typedef enum {
  3758. HTT_SCHED_SUPERCYCLE_TRIGGER_NONE = 0, /* Supercycle not triggered */
  3759. HTT_SCHED_SUPERCYCLE_TRIGGER_FORCED, /* forced supercycle trigger */
  3760. HTT_SCHED_SUPERCYCLE_TRIGGER_LESS_NUM_TIDQ_ENTRIES, /* Num tidq entries is less than max_client threshold */
  3761. HTT_SCHED_SUPERCYCLE_TRIGGER_LESS_NUM_ACTIVE_TIDS, /* Num active tids is less than max_client threshold */
  3762. HTT_SCHED_SUPERCYCLE_TRIGGER_MAX_ITR_REACHED, /* max sched iteration reached */
  3763. HTT_SCHED_SUPERCYCLE_TRIGGER_DUR_THRESHOLD_REACHED, /* duration threshold reached */
  3764. HTT_SCHED_SUPERCYCLE_TRIGGER_TWT_TRIGGER, /* TWT supercycle trigger */
  3765. HTT_SCHED_SUPERCYCLE_TRIGGER_MAX,
  3766. } htt_sched_txq_supercycle_triggers_tlv_enum;
  3767. #define HTT_SCHED_TXQ_SUPERCYCLE_TRIGGERS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3768. /* NOTE: Variable length TLV, use length spec to infer array size */
  3769. typedef struct {
  3770. htt_tlv_hdr_t tlv_hdr;
  3771. /**
  3772. * supercycle_triggers[] is a histogram that counts the number of
  3773. * occurrences of each different reason for a transmit scheduler
  3774. * supercycle to be triggered.
  3775. * The htt_sched_txq_supercycle_triggers_tlv_enum is used to index
  3776. * supercycle_triggers[], e.g. supercycle_triggers[1] holds the number
  3777. * of times a supercycle has been forced.
  3778. * These supercycle trigger counts are not automatically reset, but
  3779. * are reset upon request.
  3780. */
  3781. A_UINT32 supercycle_triggers[1/*HTT_SCHED_SUPERCYCLE_TRIGGER_MAX*/];
  3782. } htt_stats_sched_txq_supercycle_trigger_tlv;
  3783. /* preserve old name alias for new name consistent with the tag name */
  3784. typedef htt_stats_sched_txq_supercycle_trigger_tlv
  3785. htt_sched_txq_supercycle_triggers_tlv_v;
  3786. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M 0x000000ff
  3787. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S 0
  3788. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M 0x0000ff00
  3789. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S 8
  3790. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_GET(_var) \
  3791. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M) >> \
  3792. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)
  3793. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_SET(_var, _val) \
  3794. do { \
  3795. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID, _val); \
  3796. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)); \
  3797. } while (0)
  3798. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_GET(_var) \
  3799. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M) >> \
  3800. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)
  3801. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_SET(_var, _val) \
  3802. do { \
  3803. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID, _val); \
  3804. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)); \
  3805. } while (0)
  3806. typedef struct {
  3807. htt_tlv_hdr_t tlv_hdr;
  3808. /**
  3809. * BIT [ 7 : 0] :- mac_id
  3810. * BIT [15 : 8] :- txq_id
  3811. * BIT [31 : 16] :- reserved
  3812. */
  3813. A_UINT32 mac_id__txq_id__word;
  3814. /** Scheduler policy ised for this TxQ */
  3815. A_UINT32 sched_policy;
  3816. /** Timestamp of last scheduler command posted */
  3817. A_UINT32 last_sched_cmd_posted_timestamp;
  3818. /** Timestamp of last scheduler command completed */
  3819. A_UINT32 last_sched_cmd_compl_timestamp;
  3820. /** Num of Sched2TAC ring hit Low Water Mark condition */
  3821. A_UINT32 sched_2_tac_lwm_count;
  3822. /** Num of Sched2TAC ring full condition */
  3823. A_UINT32 sched_2_tac_ring_full;
  3824. /**
  3825. * Num of scheduler command post failures that includes SU/MU-MIMO/MU-OFDMA
  3826. * sequence type
  3827. */
  3828. A_UINT32 sched_cmd_post_failure;
  3829. /** Num of active tids for this TxQ at current instance */
  3830. A_UINT32 num_active_tids;
  3831. /** Num of powersave schedules */
  3832. A_UINT32 num_ps_schedules;
  3833. /** Num of scheduler commands pending for this TxQ */
  3834. A_UINT32 sched_cmds_pending;
  3835. /** Num of tidq registration for this TxQ */
  3836. A_UINT32 num_tid_register;
  3837. /** Num of tidq de-registration for this TxQ */
  3838. A_UINT32 num_tid_unregister;
  3839. /** Num of iterations msduq stats was updated */
  3840. A_UINT32 num_qstats_queried;
  3841. /** qstats query update status */
  3842. A_UINT32 qstats_update_pending;
  3843. /** Timestamp of Last query stats made */
  3844. A_UINT32 last_qstats_query_timestamp;
  3845. /** Num of sched2tqm command queue full condition */
  3846. A_UINT32 num_tqm_cmdq_full;
  3847. /** Num of scheduler trigger from DE Module */
  3848. A_UINT32 num_de_sched_algo_trigger;
  3849. /** Num of scheduler trigger from RT Module */
  3850. A_UINT32 num_rt_sched_algo_trigger;
  3851. /** Num of scheduler trigger from TQM Module */
  3852. A_UINT32 num_tqm_sched_algo_trigger;
  3853. /** Num of schedules for notify frame */
  3854. A_UINT32 notify_sched;
  3855. /** Duration based sendn termination */
  3856. A_UINT32 dur_based_sendn_term;
  3857. /** scheduled via NOTIFY2 */
  3858. A_UINT32 su_notify2_sched;
  3859. /** schedule if queued packets are greater than avg MSDUs in PPDU */
  3860. A_UINT32 su_optimal_queued_msdus_sched;
  3861. /** schedule due to timeout */
  3862. A_UINT32 su_delay_timeout_sched;
  3863. /** delay if txtime is less than 500us */
  3864. A_UINT32 su_min_txtime_sched_delay;
  3865. /** scheduled via no delay */
  3866. A_UINT32 su_no_delay;
  3867. /** Num of supercycles for this TxQ */
  3868. A_UINT32 num_supercycles;
  3869. /** Num of subcycles with sort for this TxQ */
  3870. A_UINT32 num_subcycles_with_sort;
  3871. /** Num of subcycles without sort for this Txq */
  3872. A_UINT32 num_subcycles_no_sort;
  3873. } htt_stats_tx_pdev_scheduler_txq_stats_tlv;
  3874. /* preserve old name alias for new name consistent with the tag name */
  3875. typedef htt_stats_tx_pdev_scheduler_txq_stats_tlv
  3876. htt_tx_pdev_stats_sched_per_txq_tlv;
  3877. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_M 0x000000ff
  3878. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_S 0
  3879. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_GET(_var) \
  3880. (((_var) & HTT_STATS_TX_SCHED_CMN_MAC_ID_M) >> \
  3881. HTT_STATS_TX_SCHED_CMN_MAC_ID_S)
  3882. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_SET(_var, _val) \
  3883. do { \
  3884. HTT_CHECK_SET_VAL(HTT_STATS_TX_SCHED_CMN_MAC_ID, _val); \
  3885. ((_var) |= ((_val) << HTT_STATS_TX_SCHED_CMN_MAC_ID_S)); \
  3886. } while (0)
  3887. typedef struct {
  3888. htt_tlv_hdr_t tlv_hdr;
  3889. /**
  3890. * BIT [ 7 : 0] :- mac_id
  3891. * BIT [31 : 8] :- reserved
  3892. */
  3893. A_UINT32 mac_id__word;
  3894. /** Current timestamp */
  3895. A_UINT32 current_timestamp;
  3896. } htt_stats_tx_sched_cmn_tlv;
  3897. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  3898. * TLV_TAGS:
  3899. * - HTT_STATS_TX_SCHED_CMN_TAG
  3900. * - HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG
  3901. * - HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG
  3902. * - HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG
  3903. * - HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG
  3904. * - HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG
  3905. * - HTT_STATS_SCHED_TXQ_SUPERCYCLE_TRIGGER_TAG
  3906. */
  3907. /* NOTE:
  3908. * This structure is for documentation, and cannot be safely used directly.
  3909. * Instead, use the constituent TLV structures to fill/parse.
  3910. */
  3911. typedef struct {
  3912. htt_stats_tx_sched_cmn_tlv cmn_tlv;
  3913. struct {
  3914. htt_stats_tx_pdev_scheduler_txq_stats_tlv txq_tlv;
  3915. htt_stats_sched_txq_cmd_posted_tlv cmd_posted_tlv;
  3916. htt_stats_sched_txq_cmd_reaped_tlv cmd_reaped_tlv;
  3917. htt_stats_sched_txq_sched_order_su_tlv sched_order_su_tlv;
  3918. htt_stats_sched_txq_sched_ineligibility_tlv sched_ineligibility_tlv;
  3919. htt_stats_sched_txq_supercycle_trigger_tlv htt_sched_txq_sched_ineligibility_tlv_esched_supercycle_trigger_tlv;
  3920. } txq[1];
  3921. } htt_stats_tx_sched_t;
  3922. /* == TQM STATS == */
  3923. #define HTT_TX_TQM_MAX_GEN_MPDU_END_REASON 17
  3924. #define HTT_TX_TQM_MAX_LIST_MPDU_END_REASON 16
  3925. #define HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS 16
  3926. #define HTT_TX_TQM_GEN_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3927. /* NOTE: Variable length TLV, use length spec to infer array size */
  3928. typedef struct {
  3929. htt_tlv_hdr_t tlv_hdr;
  3930. /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
  3931. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, gen_mpdu_end_reason);
  3932. } htt_stats_tx_tqm_gen_mpdu_tlv;
  3933. /* preserve old name alias for new name consistent with the tag name */
  3934. typedef htt_stats_tx_tqm_gen_mpdu_tlv htt_tx_tqm_gen_mpdu_stats_tlv_v;
  3935. #define HTT_TX_TQM_LIST_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3936. /* NOTE: Variable length TLV, use length spec to infer array size */
  3937. typedef struct {
  3938. htt_tlv_hdr_t tlv_hdr;
  3939. /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
  3940. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, list_mpdu_end_reason);
  3941. } htt_stats_tx_tqm_list_mpdu_tlv;
  3942. /* preserve old name alias for new name consistent with the tag name */
  3943. typedef htt_stats_tx_tqm_list_mpdu_tlv htt_tx_tqm_list_mpdu_stats_tlv_v;
  3944. #define HTT_TX_TQM_LIST_MPDU_CNT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3945. /* NOTE: Variable length TLV, use length spec to infer array size */
  3946. typedef struct {
  3947. htt_tlv_hdr_t tlv_hdr;
  3948. /* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
  3949. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, list_mpdu_cnt_hist);
  3950. } htt_stats_tx_tqm_list_mpdu_cnt_tlv;
  3951. /* preserve old name alias for new name consistent with the tag name */
  3952. typedef htt_stats_tx_tqm_list_mpdu_cnt_tlv htt_tx_tqm_list_mpdu_cnt_tlv_v;
  3953. typedef struct {
  3954. htt_tlv_hdr_t tlv_hdr;
  3955. A_UINT32 msdu_count;
  3956. A_UINT32 mpdu_count;
  3957. A_UINT32 remove_msdu;
  3958. A_UINT32 remove_mpdu;
  3959. A_UINT32 remove_msdu_ttl;
  3960. A_UINT32 send_bar;
  3961. A_UINT32 bar_sync;
  3962. A_UINT32 notify_mpdu;
  3963. A_UINT32 sync_cmd;
  3964. A_UINT32 write_cmd;
  3965. A_UINT32 hwsch_trigger;
  3966. A_UINT32 ack_tlv_proc;
  3967. A_UINT32 gen_mpdu_cmd;
  3968. A_UINT32 gen_list_cmd;
  3969. A_UINT32 remove_mpdu_cmd;
  3970. A_UINT32 remove_mpdu_tried_cmd;
  3971. A_UINT32 mpdu_queue_stats_cmd;
  3972. A_UINT32 mpdu_head_info_cmd;
  3973. A_UINT32 msdu_flow_stats_cmd;
  3974. A_UINT32 remove_msdu_cmd;
  3975. A_UINT32 remove_msdu_ttl_cmd;
  3976. A_UINT32 flush_cache_cmd;
  3977. A_UINT32 update_mpduq_cmd;
  3978. A_UINT32 enqueue;
  3979. A_UINT32 enqueue_notify;
  3980. A_UINT32 notify_mpdu_at_head;
  3981. A_UINT32 notify_mpdu_state_valid;
  3982. /*
  3983. * On receiving TQM_FLOW_NOT_EMPTY_STATUS from TQM, (on MSDUs being enqueued
  3984. * the flow is non empty), if the number of MSDUs is greater than the threshold,
  3985. * notify is incremented. UDP_THRESH counters are for UDP MSDUs, and NONUDP are
  3986. * for non-UDP MSDUs.
  3987. * MSDUQ_SWNOTIFY_UDP_THRESH1 threshold - sched_udp_notify1 is incremented
  3988. * MSDUQ_SWNOTIFY_UDP_THRESH2 threshold - sched_udp_notify2 is incremented
  3989. * MSDUQ_SWNOTIFY_NONUDP_THRESH1 threshold - sched_nonudp_notify1 is incremented
  3990. * MSDUQ_SWNOTIFY_NONUDP_THRESH2 threshold - sched_nonudp_notify2 is incremented
  3991. *
  3992. * Notify signifies that we trigger the scheduler.
  3993. */
  3994. A_UINT32 sched_udp_notify1;
  3995. A_UINT32 sched_udp_notify2;
  3996. A_UINT32 sched_nonudp_notify1;
  3997. A_UINT32 sched_nonudp_notify2;
  3998. } htt_stats_tx_tqm_pdev_tlv;
  3999. /* preserve old name alias for new name consistent with the tag name */
  4000. typedef htt_stats_tx_tqm_pdev_tlv htt_tx_tqm_pdev_stats_tlv_v;
  4001. #define HTT_TX_TQM_CMN_STATS_MAC_ID_M 0x000000ff
  4002. #define HTT_TX_TQM_CMN_STATS_MAC_ID_S 0
  4003. #define HTT_TX_TQM_CMN_STATS_MAC_ID_GET(_var) \
  4004. (((_var) & HTT_TX_TQM_CMN_STATS_MAC_ID_M) >> \
  4005. HTT_TX_TQM_CMN_STATS_MAC_ID_S)
  4006. #define HTT_TX_TQM_CMN_STATS_MAC_ID_SET(_var, _val) \
  4007. do { \
  4008. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMN_STATS_MAC_ID, _val); \
  4009. ((_var) |= ((_val) << HTT_TX_TQM_CMN_STATS_MAC_ID_S)); \
  4010. } while (0)
  4011. typedef struct {
  4012. htt_tlv_hdr_t tlv_hdr;
  4013. /**
  4014. * BIT [ 7 : 0] :- mac_id
  4015. * BIT [31 : 8] :- reserved
  4016. */
  4017. A_UINT32 mac_id__word;
  4018. A_UINT32 max_cmdq_id;
  4019. A_UINT32 list_mpdu_cnt_hist_intvl;
  4020. /* Global stats */
  4021. A_UINT32 add_msdu;
  4022. A_UINT32 q_empty;
  4023. A_UINT32 q_not_empty;
  4024. A_UINT32 drop_notification;
  4025. A_UINT32 desc_threshold;
  4026. A_UINT32 hwsch_tqm_invalid_status;
  4027. A_UINT32 missed_tqm_gen_mpdus;
  4028. A_UINT32 tqm_active_tids;
  4029. A_UINT32 tqm_inactive_tids;
  4030. A_UINT32 tqm_active_msduq_flows;
  4031. /* SAWF system delay reference timestamp updation related stats */
  4032. A_UINT32 total_msduq_timestamp_updates;
  4033. A_UINT32 total_msduq_timestamp_updates_by_get_mpdu_head_info_cmd;
  4034. A_UINT32 total_msduq_timestamp_updates_by_empty_to_nonempty_status;
  4035. A_UINT32 total_get_mpdu_head_info_cmds_by_sched_algo_la_query;
  4036. A_UINT32 total_get_mpdu_head_info_cmds_by_tac;
  4037. A_UINT32 total_gen_mpdu_cmds_by_sched_algo_la_query;
  4038. A_UINT32 high_prio_q_not_empty;
  4039. } htt_stats_tx_tqm_cmn_tlv;
  4040. /* preserve old name alias for new name consistent with the tag name */
  4041. typedef htt_stats_tx_tqm_cmn_tlv htt_tx_tqm_cmn_stats_tlv;
  4042. typedef struct {
  4043. htt_tlv_hdr_t tlv_hdr;
  4044. /* Error stats */
  4045. A_UINT32 q_empty_failure;
  4046. A_UINT32 q_not_empty_failure;
  4047. A_UINT32 add_msdu_failure;
  4048. /* TQM reset debug stats */
  4049. A_UINT32 tqm_cache_ctl_err;
  4050. A_UINT32 tqm_soft_reset;
  4051. A_UINT32 tqm_reset_total_num_in_use_link_descs;
  4052. A_UINT32 tqm_reset_worst_case_num_lost_link_descs;
  4053. A_UINT32 tqm_reset_worst_case_num_lost_host_tx_bufs_count;
  4054. A_UINT32 tqm_reset_num_in_use_link_descs_internal_tqm;
  4055. A_UINT32 tqm_reset_num_in_use_link_descs_wbm_idle_link_ring;
  4056. A_UINT32 tqm_reset_time_to_tqm_hang_delta_ms;
  4057. A_UINT32 tqm_reset_recovery_time_ms;
  4058. A_UINT32 tqm_reset_num_peers_hdl;
  4059. A_UINT32 tqm_reset_cumm_dirty_hw_mpduq_proc_cnt;
  4060. A_UINT32 tqm_reset_cumm_dirty_hw_msduq_proc;
  4061. A_UINT32 tqm_reset_flush_cache_cmd_su_cnt;
  4062. A_UINT32 tqm_reset_flush_cache_cmd_other_cnt;
  4063. A_UINT32 tqm_reset_flush_cache_cmd_trig_type;
  4064. A_UINT32 tqm_reset_flush_cache_cmd_trig_cfg;
  4065. A_UINT32 tqm_reset_flush_cache_cmd_skip_cmd_status_null;
  4066. } htt_stats_tx_tqm_error_stats_tlv;
  4067. /* preserve old name alias for new name consistent with the tag name */
  4068. typedef htt_stats_tx_tqm_error_stats_tlv htt_tx_tqm_error_stats_tlv;
  4069. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TQM
  4070. * TLV_TAGS:
  4071. * - HTT_STATS_TX_TQM_CMN_TAG
  4072. * - HTT_STATS_TX_TQM_ERROR_STATS_TAG
  4073. * - HTT_STATS_TX_TQM_GEN_MPDU_TAG
  4074. * - HTT_STATS_TX_TQM_LIST_MPDU_TAG
  4075. * - HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG
  4076. * - HTT_STATS_TX_TQM_PDEV_TAG
  4077. */
  4078. /* NOTE:
  4079. * This structure is for documentation, and cannot be safely used directly.
  4080. * Instead, use the constituent TLV structures to fill/parse.
  4081. */
  4082. #ifdef ATH_TARGET
  4083. typedef struct {
  4084. htt_stats_tx_tqm_cmn_tlv cmn_tlv;
  4085. htt_stats_tx_tqm_error_stats_tlv err_tlv;
  4086. htt_stats_tx_tqm_gen_mpdu_tlv gen_mpdu_stats_tlv;
  4087. htt_stats_tx_tqm_list_mpdu_tlv list_mpdu_stats_tlv;
  4088. htt_stats_tx_tqm_list_mpdu_cnt_tlv list_mpdu_cnt_tlv;
  4089. htt_stats_tx_tqm_pdev_tlv tqm_pdev_stats_tlv;
  4090. } htt_tx_tqm_pdev_stats_t;
  4091. #endif /* ATH_TARGET */
  4092. /* == TQM CMDQ stats == */
  4093. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M 0x000000ff
  4094. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S 0
  4095. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M 0x0000ff00
  4096. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S 8
  4097. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_GET(_var) \
  4098. (((_var) & HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M) >> \
  4099. HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)
  4100. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_SET(_var, _val) \
  4101. do { \
  4102. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_MAC_ID, _val); \
  4103. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)); \
  4104. } while (0)
  4105. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_GET(_var) \
  4106. (((_var) & HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M) >> \
  4107. HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)
  4108. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_SET(_var, _val) \
  4109. do { \
  4110. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID, _val); \
  4111. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)); \
  4112. } while (0)
  4113. typedef struct {
  4114. htt_tlv_hdr_t tlv_hdr;
  4115. /*
  4116. * BIT [ 7 : 0] :- mac_id
  4117. * BIT [15 : 8] :- cmdq_id
  4118. * BIT [31 : 16] :- reserved
  4119. */
  4120. A_UINT32 mac_id__cmdq_id__word;
  4121. A_UINT32 sync_cmd;
  4122. A_UINT32 write_cmd;
  4123. A_UINT32 gen_mpdu_cmd;
  4124. A_UINT32 mpdu_queue_stats_cmd;
  4125. A_UINT32 mpdu_head_info_cmd;
  4126. A_UINT32 msdu_flow_stats_cmd;
  4127. A_UINT32 remove_mpdu_cmd;
  4128. A_UINT32 remove_msdu_cmd;
  4129. A_UINT32 flush_cache_cmd;
  4130. A_UINT32 update_mpduq_cmd;
  4131. A_UINT32 update_msduq_cmd;
  4132. } htt_stats_tx_tqm_cmdq_status_tlv;
  4133. /* preserve old name alias for new name consistent with the tag name */
  4134. typedef htt_stats_tx_tqm_cmdq_status_tlv htt_tx_tqm_cmdq_status_tlv;
  4135. /* STATS_TYPE : HTT_DBG_EXT_STATS_TQM_CMDQ
  4136. * TLV_TAGS:
  4137. * - HTT_STATS_STRING_TAG
  4138. * - HTT_STATS_TX_TQM_CMDQ_STATUS_TAG
  4139. */
  4140. /* NOTE:
  4141. * This structure is for documentation, and cannot be safely used directly.
  4142. * Instead, use the constituent TLV structures to fill/parse.
  4143. */
  4144. #ifdef ATH_TARGET
  4145. typedef struct {
  4146. struct {
  4147. htt_stats_string_tlv cmdq_str_tlv;
  4148. htt_stats_tx_tqm_cmdq_status_tlv status_tlv;
  4149. } q[1];
  4150. } htt_tx_tqm_cmdq_stats_t;
  4151. #endif /* ATH_TARGET */
  4152. /* == TX-DE STATS == */
  4153. /* Structures for tx de stats */
  4154. typedef struct {
  4155. htt_tlv_hdr_t tlv_hdr;
  4156. A_UINT32 m1_packets;
  4157. A_UINT32 m2_packets;
  4158. A_UINT32 m3_packets;
  4159. A_UINT32 m4_packets;
  4160. A_UINT32 g1_packets;
  4161. A_UINT32 g2_packets;
  4162. A_UINT32 rc4_packets;
  4163. A_UINT32 eap_packets;
  4164. A_UINT32 eapol_start_packets;
  4165. A_UINT32 eapol_logoff_packets;
  4166. A_UINT32 eapol_encap_asf_packets;
  4167. } htt_stats_tx_de_eapol_packets_tlv;
  4168. /* preserve old name alias for new name consistent with the tag name */
  4169. typedef htt_stats_tx_de_eapol_packets_tlv htt_tx_de_eapol_packets_stats_tlv;
  4170. typedef struct {
  4171. htt_tlv_hdr_t tlv_hdr;
  4172. A_UINT32 ap_bss_peer_not_found;
  4173. A_UINT32 ap_bcast_mcast_no_peer;
  4174. A_UINT32 sta_delete_in_progress;
  4175. A_UINT32 ibss_no_bss_peer;
  4176. A_UINT32 invaild_vdev_type;
  4177. A_UINT32 invalid_ast_peer_entry;
  4178. A_UINT32 peer_entry_invalid;
  4179. A_UINT32 ethertype_not_ip;
  4180. A_UINT32 eapol_lookup_failed;
  4181. A_UINT32 qpeer_not_allow_data;
  4182. A_UINT32 fse_tid_override;
  4183. A_UINT32 ipv6_jumbogram_zero_length;
  4184. A_UINT32 qos_to_non_qos_in_prog;
  4185. A_UINT32 ap_bcast_mcast_eapol;
  4186. A_UINT32 unicast_on_ap_bss_peer;
  4187. A_UINT32 ap_vdev_invalid;
  4188. A_UINT32 incomplete_llc;
  4189. A_UINT32 eapol_duplicate_m3;
  4190. A_UINT32 eapol_duplicate_m4;
  4191. } htt_stats_tx_de_classify_failed_tlv;
  4192. /* preserve old name alias for new name consistent with the tag name */
  4193. typedef htt_stats_tx_de_classify_failed_tlv htt_tx_de_classify_failed_stats_tlv;
  4194. typedef struct {
  4195. htt_tlv_hdr_t tlv_hdr;
  4196. A_UINT32 arp_packets;
  4197. A_UINT32 igmp_packets;
  4198. A_UINT32 dhcp_packets;
  4199. A_UINT32 host_inspected;
  4200. A_UINT32 htt_included;
  4201. A_UINT32 htt_valid_mcs;
  4202. A_UINT32 htt_valid_nss;
  4203. A_UINT32 htt_valid_preamble_type;
  4204. A_UINT32 htt_valid_chainmask;
  4205. A_UINT32 htt_valid_guard_interval;
  4206. A_UINT32 htt_valid_retries;
  4207. A_UINT32 htt_valid_bw_info;
  4208. A_UINT32 htt_valid_power;
  4209. A_UINT32 htt_valid_key_flags;
  4210. A_UINT32 htt_valid_no_encryption;
  4211. A_UINT32 fse_entry_count;
  4212. A_UINT32 fse_priority_be;
  4213. A_UINT32 fse_priority_high;
  4214. A_UINT32 fse_priority_low;
  4215. A_UINT32 fse_traffic_ptrn_be;
  4216. A_UINT32 fse_traffic_ptrn_over_sub;
  4217. A_UINT32 fse_traffic_ptrn_bursty;
  4218. A_UINT32 fse_traffic_ptrn_interactive;
  4219. A_UINT32 fse_traffic_ptrn_periodic;
  4220. A_UINT32 fse_hwqueue_alloc;
  4221. A_UINT32 fse_hwqueue_created;
  4222. A_UINT32 fse_hwqueue_send_to_host;
  4223. A_UINT32 mcast_entry;
  4224. A_UINT32 bcast_entry;
  4225. A_UINT32 htt_update_peer_cache;
  4226. A_UINT32 htt_learning_frame;
  4227. A_UINT32 fse_invalid_peer;
  4228. /**
  4229. * mec_notify is HTT TX WBM multicast echo check notification
  4230. * from firmware to host. FW sends SA addresses to host for all
  4231. * multicast/broadcast packets received on STA side.
  4232. */
  4233. A_UINT32 mec_notify;
  4234. A_UINT32 arp_response;
  4235. A_UINT32 arp_request;
  4236. } htt_stats_tx_de_classify_stats_tlv;
  4237. /* preserve old name alias for new name consistent with the tag name */
  4238. typedef htt_stats_tx_de_classify_stats_tlv htt_tx_de_classify_stats_tlv;
  4239. typedef struct {
  4240. htt_tlv_hdr_t tlv_hdr;
  4241. A_UINT32 eok;
  4242. A_UINT32 classify_done;
  4243. A_UINT32 lookup_failed;
  4244. A_UINT32 send_host_dhcp;
  4245. A_UINT32 send_host_mcast;
  4246. A_UINT32 send_host_unknown_dest;
  4247. A_UINT32 send_host;
  4248. A_UINT32 status_invalid;
  4249. } htt_stats_tx_de_classify_status_tlv;
  4250. /* preserve old name alias for new name consistent with the tag name */
  4251. typedef htt_stats_tx_de_classify_status_tlv htt_tx_de_classify_status_stats_tlv;
  4252. typedef struct {
  4253. htt_tlv_hdr_t tlv_hdr;
  4254. A_UINT32 enqueued_pkts;
  4255. A_UINT32 to_tqm;
  4256. A_UINT32 to_tqm_bypass;
  4257. } htt_stats_tx_de_enqueue_packets_tlv;
  4258. /* preserve old name alias for new name consistent with the tag name */
  4259. typedef htt_stats_tx_de_enqueue_packets_tlv htt_tx_de_enqueue_packets_stats_tlv;
  4260. typedef struct {
  4261. htt_tlv_hdr_t tlv_hdr;
  4262. A_UINT32 discarded_pkts;
  4263. A_UINT32 local_frames;
  4264. A_UINT32 is_ext_msdu;
  4265. A_UINT32 mlo_invalid_routing_discard;
  4266. A_UINT32 mlo_invalid_routing_dup_entry_discard;
  4267. A_UINT32 discard_peer_unauthorized_pkts;
  4268. } htt_stats_tx_de_enqueue_discard_tlv;
  4269. /* preserve old name alias for new name consistent with the tag name */
  4270. typedef htt_stats_tx_de_enqueue_discard_tlv htt_tx_de_enqueue_discard_stats_tlv;
  4271. typedef struct {
  4272. htt_tlv_hdr_t tlv_hdr;
  4273. A_UINT32 tcl_dummy_frame;
  4274. A_UINT32 tqm_dummy_frame;
  4275. A_UINT32 tqm_notify_frame;
  4276. A_UINT32 fw2wbm_enq;
  4277. A_UINT32 tqm_bypass_frame;
  4278. } htt_stats_tx_de_compl_stats_tlv;
  4279. /* preserve old name alias for new name consistent with the tag name */
  4280. typedef htt_stats_tx_de_compl_stats_tlv htt_tx_de_compl_stats_tlv;
  4281. #define HTT_TX_DE_CMN_STATS_MAC_ID_M 0x000000ff
  4282. #define HTT_TX_DE_CMN_STATS_MAC_ID_S 0
  4283. #define HTT_TX_DE_CMN_STATS_MAC_ID_GET(_var) \
  4284. (((_var) & HTT_TX_DE_CMN_STATS_MAC_ID_M) >> \
  4285. HTT_TX_DE_CMN_STATS_MAC_ID_S)
  4286. #define HTT_TX_DE_CMN_STATS_MAC_ID_SET(_var, _val) \
  4287. do { \
  4288. HTT_CHECK_SET_VAL(HTT_TX_DE_CMN_STATS_MAC_ID, _val); \
  4289. ((_var) |= ((_val) << HTT_TX_DE_CMN_STATS_MAC_ID_S)); \
  4290. } while (0)
  4291. /*
  4292. * The htt_tx_de_fw2wbm_ring_full_hist_tlv is a histogram of time we waited
  4293. * for the fw2wbm ring buffer. we are requesting a buffer in FW2WBM release
  4294. * ring,which may fail, due to non availability of buffer. Hence we sleep for
  4295. * 200us & again request for it. This is a histogram of time we wait, with
  4296. * bin of 200ms & there are 10 bin (2 seconds max)
  4297. * They are defined by the following macros in FW
  4298. * #define ENTRIES_PER_BIN_COUNT 1000 // per bin 1000 * 200us = 200ms
  4299. * #define RING_FULL_BIN_ENTRIES (WAL_TX_DE_FW2WBM_ALLOC_TIMEOUT_COUNT /
  4300. * ENTRIES_PER_BIN_COUNT)
  4301. */
  4302. typedef struct {
  4303. htt_tlv_hdr_t tlv_hdr;
  4304. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, fw2wbm_ring_full_hist);
  4305. } htt_stats_tx_de_fw2wbm_ring_full_hist_tlv;
  4306. /* preserve old name alias for new name consistent with the tag name */
  4307. typedef htt_stats_tx_de_fw2wbm_ring_full_hist_tlv
  4308. htt_tx_de_fw2wbm_ring_full_hist_tlv;
  4309. typedef struct {
  4310. htt_tlv_hdr_t tlv_hdr;
  4311. /**
  4312. * BIT [ 7 : 0] :- mac_id
  4313. * BIT [31 : 8] :- reserved
  4314. */
  4315. A_UINT32 mac_id__word;
  4316. /* Global Stats */
  4317. A_UINT32 tcl2fw_entry_count;
  4318. A_UINT32 not_to_fw;
  4319. A_UINT32 invalid_pdev_vdev_peer;
  4320. A_UINT32 tcl_res_invalid_addrx;
  4321. A_UINT32 wbm2fw_entry_count;
  4322. A_UINT32 invalid_pdev;
  4323. A_UINT32 tcl_res_addrx_timeout;
  4324. A_UINT32 invalid_vdev;
  4325. A_UINT32 invalid_tcl_exp_frame_desc;
  4326. A_UINT32 vdev_id_mismatch_cnt;
  4327. } htt_stats_tx_de_cmn_tlv;
  4328. /* preserve old name alias for new name consistent with the tag name */
  4329. typedef htt_stats_tx_de_cmn_tlv htt_tx_de_cmn_stats_tlv;
  4330. #define HTT_STATS_RX_FW_RING_SIZE_NUM_ENTRIES(dword) ((dword >> 0) & 0xffff)
  4331. #define HTT_STATS_RX_FW_RING_CURR_NUM_ENTRIES(dword) ((dword >> 16) & 0xffff)
  4332. /* Rx debug info for status rings */
  4333. typedef struct {
  4334. htt_tlv_hdr_t tlv_hdr;
  4335. /**
  4336. * BIT [15 : 0] :- max possible number of entries in respective ring
  4337. * (size of the ring in terms of entries)
  4338. * BIT [16 : 31] :- current number of entries occupied in respective ring
  4339. */
  4340. A_UINT32 entry_status_sw2rxdma;
  4341. A_UINT32 entry_status_rxdma2reo;
  4342. A_UINT32 entry_status_reo2sw1;
  4343. A_UINT32 entry_status_reo2sw4;
  4344. A_UINT32 entry_status_refillringipa;
  4345. A_UINT32 entry_status_refillringhost;
  4346. /** datarate - Moving Average of Number of Entries */
  4347. A_UINT32 datarate_refillringipa;
  4348. A_UINT32 datarate_refillringhost;
  4349. /**
  4350. * refillringhost_backpress_hist and refillringipa_backpress_hist are
  4351. * deprecated, and will be filled with 0x0 by the target.
  4352. */
  4353. A_UINT32 refillringhost_backpress_hist[3];
  4354. A_UINT32 refillringipa_backpress_hist[3];
  4355. /**
  4356. * Number of times reo2sw4(IPA_DEST_RING) ring is back-pressured
  4357. * in recent time periods
  4358. * element 0: in last 0 to 250ms
  4359. * element 1: 250ms to 500ms
  4360. * element 2: above 500ms
  4361. */
  4362. A_UINT32 reo2sw4ringipa_backpress_hist[3];
  4363. } htt_stats_rx_ring_stats_tlv;
  4364. /* preserve old name alias for new name consistent with the tag name */
  4365. typedef htt_stats_rx_ring_stats_tlv htt_rx_fw_ring_stats_tlv_v;
  4366. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_DE_INFO
  4367. * TLV_TAGS:
  4368. * - HTT_STATS_TX_DE_CMN_TAG
  4369. * - HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG
  4370. * - HTT_STATS_TX_DE_EAPOL_PACKETS_TAG
  4371. * - HTT_STATS_TX_DE_CLASSIFY_STATS_TAG
  4372. * - HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG
  4373. * - HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG
  4374. * - HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG
  4375. * - HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG
  4376. * - HTT_STATS_TX_DE_COMPL_STATS_TAG
  4377. */
  4378. /* NOTE:
  4379. * This structure is for documentation, and cannot be safely used directly.
  4380. * Instead, use the constituent TLV structures to fill/parse.
  4381. */
  4382. #ifdef ATH_TARGET
  4383. typedef struct {
  4384. htt_stats_tx_de_cmn_tlv cmn_tlv;
  4385. htt_stats_tx_de_fw2wbm_ring_full_hist_tlv fw2wbm_hist_tlv;
  4386. htt_stats_tx_de_eapol_packets_tlv eapol_stats_tlv;
  4387. htt_stats_tx_de_classify_stats_tlv classify_stats_tlv;
  4388. htt_stats_tx_de_classify_failed_tlv classify_failed_tlv;
  4389. htt_stats_tx_de_classify_status_tlv classify_status_rlv;
  4390. htt_stats_tx_de_enqueue_packets_tlv enqueue_packets_tlv;
  4391. htt_stats_tx_de_enqueue_discard_tlv enqueue_discard_tlv;
  4392. htt_stats_tx_de_compl_stats_tlv comp_status_tlv;
  4393. } htt_tx_de_stats_t;
  4394. #endif /* ATH_TARGET */
  4395. /* == RING-IF STATS == */
  4396. /* DWORD num_elems__prefetch_tail_idx */
  4397. #define HTT_RING_IF_STATS_NUM_ELEMS_M 0x0000ffff
  4398. #define HTT_RING_IF_STATS_NUM_ELEMS_S 0
  4399. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M 0xffff0000
  4400. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S 16
  4401. #define HTT_RING_IF_STATS_NUM_ELEMS_GET(_var) \
  4402. (((_var) & HTT_RING_IF_STATS_NUM_ELEMS_M) >> \
  4403. HTT_RING_IF_STATS_NUM_ELEMS_S)
  4404. #define HTT_RING_IF_STATS_NUM_ELEMS_SET(_var, _val) \
  4405. do { \
  4406. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_NUM_ELEMS, _val); \
  4407. ((_var) |= ((_val) << HTT_RING_IF_STATS_NUM_ELEMS_S)); \
  4408. } while (0)
  4409. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_GET(_var) \
  4410. (((_var) & HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M) >> \
  4411. HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)
  4412. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_SET(_var, _val) \
  4413. do { \
  4414. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_PREFETCH_TAIL_IDX, _val); \
  4415. ((_var) |= ((_val) << HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)); \
  4416. } while (0)
  4417. /* DWORD head_idx__tail_idx */
  4418. #define HTT_RING_IF_STATS_HEAD_IDX_M 0x0000ffff
  4419. #define HTT_RING_IF_STATS_HEAD_IDX_S 0
  4420. #define HTT_RING_IF_STATS_TAIL_IDX_M 0xffff0000
  4421. #define HTT_RING_IF_STATS_TAIL_IDX_S 16
  4422. #define HTT_RING_IF_STATS_HEAD_IDX_GET(_var) \
  4423. (((_var) & HTT_RING_IF_STATS_HEAD_IDX_M) >> \
  4424. HTT_RING_IF_STATS_HEAD_IDX_S)
  4425. #define HTT_RING_IF_STATS_HEAD_IDX_SET(_var, _val) \
  4426. do { \
  4427. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HEAD_IDX, _val); \
  4428. ((_var) |= ((_val) << HTT_RING_IF_STATS_HEAD_IDX_S)); \
  4429. } while (0)
  4430. #define HTT_RING_IF_STATS_TAIL_IDX_GET(_var) \
  4431. (((_var) & HTT_RING_IF_STATS_TAIL_IDX_M) >> \
  4432. HTT_RING_IF_STATS_TAIL_IDX_S)
  4433. #define HTT_RING_IF_STATS_TAIL_IDX_SET(_var, _val) \
  4434. do { \
  4435. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_TAIL_IDX, _val); \
  4436. ((_var) |= ((_val) << HTT_RING_IF_STATS_TAIL_IDX_S)); \
  4437. } while (0)
  4438. /* DWORD shadow_head_idx__shadow_tail_idx */
  4439. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M 0x0000ffff
  4440. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S 0
  4441. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M 0xffff0000
  4442. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S 16
  4443. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_GET(_var) \
  4444. (((_var) & HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M) >> \
  4445. HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)
  4446. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_SET(_var, _val) \
  4447. do { \
  4448. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_HEAD_IDX, _val); \
  4449. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)); \
  4450. } while (0)
  4451. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_GET(_var) \
  4452. (((_var) & HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M) >> \
  4453. HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)
  4454. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_SET(_var, _val) \
  4455. do { \
  4456. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_TAIL_IDX, _val); \
  4457. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)); \
  4458. } while (0)
  4459. /* DWORD lwm_thresh__hwm_thresh */
  4460. #define HTT_RING_IF_STATS_LWM_THRESHOLD_M 0x0000ffff
  4461. #define HTT_RING_IF_STATS_LWM_THRESHOLD_S 0
  4462. #define HTT_RING_IF_STATS_HWM_THRESHOLD_M 0xffff0000
  4463. #define HTT_RING_IF_STATS_HWM_THRESHOLD_S 16
  4464. #define HTT_RING_IF_STATS_LWM_THRESHOLD_GET(_var) \
  4465. (((_var) & HTT_RING_IF_STATS_LWM_THRESHOLD_M) >> \
  4466. HTT_RING_IF_STATS_LWM_THRESHOLD_S)
  4467. #define HTT_RING_IF_STATS_LWM_THRESHOLD_SET(_var, _val) \
  4468. do { \
  4469. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_LWM_THRESHOLD, _val); \
  4470. ((_var) |= ((_val) << HTT_RING_IF_STATS_LWM_THRESHOLD_S)); \
  4471. } while (0)
  4472. #define HTT_RING_IF_STATS_HWM_THRESHOLD_GET(_var) \
  4473. (((_var) & HTT_RING_IF_STATS_HWM_THRESHOLD_M) >> \
  4474. HTT_RING_IF_STATS_HWM_THRESHOLD_S)
  4475. #define HTT_RING_IF_STATS_HWM_THRESHOLD_SET(_var, _val) \
  4476. do { \
  4477. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HWM_THRESHOLD, _val); \
  4478. ((_var) |= ((_val) << HTT_RING_IF_STATS_HWM_THRESHOLD_S)); \
  4479. } while (0)
  4480. #define HTT_STATS_LOW_WM_BINS 5
  4481. #define HTT_STATS_HIGH_WM_BINS 5
  4482. typedef struct {
  4483. /** DWORD aligned base memory address of the ring */
  4484. A_UINT32 base_addr;
  4485. /** size of each ring element */
  4486. A_UINT32 elem_size;
  4487. /**
  4488. * BIT [15 : 0] :- num_elems
  4489. * BIT [31 : 16] :- prefetch_tail_idx
  4490. */
  4491. A_UINT32 num_elems__prefetch_tail_idx;
  4492. /**
  4493. * BIT [15 : 0] :- head_idx
  4494. * BIT [31 : 16] :- tail_idx
  4495. */
  4496. A_UINT32 head_idx__tail_idx;
  4497. /**
  4498. * BIT [15 : 0] :- shadow_head_idx
  4499. * BIT [31 : 16] :- shadow_tail_idx
  4500. */
  4501. A_UINT32 shadow_head_idx__shadow_tail_idx;
  4502. A_UINT32 num_tail_incr;
  4503. /**
  4504. * BIT [15 : 0] :- lwm_thresh
  4505. * BIT [31 : 16] :- hwm_thresh
  4506. */
  4507. A_UINT32 lwm_thresh__hwm_thresh;
  4508. A_UINT32 overrun_hit_count;
  4509. A_UINT32 underrun_hit_count;
  4510. A_UINT32 prod_blockwait_count;
  4511. A_UINT32 cons_blockwait_count;
  4512. A_UINT32 low_wm_hit_count[HTT_STATS_LOW_WM_BINS];
  4513. A_UINT32 high_wm_hit_count[HTT_STATS_HIGH_WM_BINS];
  4514. } htt_stats_ring_if_tlv;
  4515. /* preserve old name alias for new name consistent with the tag name */
  4516. typedef htt_stats_ring_if_tlv htt_ring_if_stats_tlv;
  4517. #define HTT_RING_IF_CMN_MAC_ID_M 0x000000ff
  4518. #define HTT_RING_IF_CMN_MAC_ID_S 0
  4519. #define HTT_RING_IF_CMN_MAC_ID_GET(_var) \
  4520. (((_var) & HTT_RING_IF_CMN_MAC_ID_M) >> \
  4521. HTT_RING_IF_CMN_MAC_ID_S)
  4522. #define HTT_RING_IF_CMN_MAC_ID_SET(_var, _val) \
  4523. do { \
  4524. HTT_CHECK_SET_VAL(HTT_RING_IF_CMN_MAC_ID, _val); \
  4525. ((_var) |= ((_val) << HTT_RING_IF_CMN_MAC_ID_S)); \
  4526. } while (0)
  4527. typedef struct {
  4528. htt_tlv_hdr_t tlv_hdr;
  4529. /**
  4530. * BIT [ 7 : 0] :- mac_id
  4531. * BIT [31 : 8] :- reserved
  4532. */
  4533. A_UINT32 mac_id__word;
  4534. A_UINT32 num_records;
  4535. } htt_stats_ring_if_cmn_tlv;
  4536. /* preserve old name alias for new name consistent with the tag name */
  4537. typedef htt_stats_ring_if_cmn_tlv htt_ring_if_cmn_tlv;
  4538. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  4539. * TLV_TAGS:
  4540. * - HTT_STATS_RING_IF_CMN_TAG
  4541. * - HTT_STATS_STRING_TAG
  4542. * - HTT_STATS_RING_IF_TAG
  4543. */
  4544. /* NOTE:
  4545. * This structure is for documentation, and cannot be safely used directly.
  4546. * Instead, use the constituent TLV structures to fill/parse.
  4547. */
  4548. #ifdef ATH_TARGET
  4549. typedef struct {
  4550. htt_stats_ring_if_cmn_tlv cmn_tlv;
  4551. /** Variable based on the Number of records. */
  4552. struct {
  4553. htt_stats_string_tlv ring_str_tlv;
  4554. htt_stats_ring_if_tlv ring_tlv;
  4555. } r[1];
  4556. } htt_ring_if_stats_t;
  4557. #endif /* ATH_TARGET */
  4558. /* == SFM STATS == */
  4559. #define HTT_SFM_CLIENT_USER_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  4560. /* NOTE: Variable length TLV, use length spec to infer array size */
  4561. typedef struct {
  4562. htt_tlv_hdr_t tlv_hdr;
  4563. /** Number of DWORDS used per user and per client */
  4564. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, dwords_used_by_user_n);
  4565. } htt_stats_sfm_client_user_tlv;
  4566. /* preserve old name alias for new name consistent with the tag name */
  4567. typedef htt_stats_sfm_client_user_tlv htt_sfm_client_user_tlv_v;
  4568. typedef struct {
  4569. htt_tlv_hdr_t tlv_hdr;
  4570. /** Client ID */
  4571. A_UINT32 client_id;
  4572. /** Minimum number of buffers */
  4573. A_UINT32 buf_min;
  4574. /** Maximum number of buffers */
  4575. A_UINT32 buf_max;
  4576. /** Number of Busy buffers */
  4577. A_UINT32 buf_busy;
  4578. /** Number of Allocated buffers */
  4579. A_UINT32 buf_alloc;
  4580. /** Number of Available/Usable buffers */
  4581. A_UINT32 buf_avail;
  4582. /** Number of users */
  4583. A_UINT32 num_users;
  4584. } htt_stats_sfm_client_tlv;
  4585. /* preserve old name alias for new name consistent with the tag name */
  4586. typedef htt_stats_sfm_client_tlv htt_sfm_client_tlv;
  4587. #define HTT_SFM_CMN_MAC_ID_M 0x000000ff
  4588. #define HTT_SFM_CMN_MAC_ID_S 0
  4589. #define HTT_SFM_CMN_MAC_ID_GET(_var) \
  4590. (((_var) & HTT_SFM_CMN_MAC_ID_M) >> \
  4591. HTT_SFM_CMN_MAC_ID_S)
  4592. #define HTT_SFM_CMN_MAC_ID_SET(_var, _val) \
  4593. do { \
  4594. HTT_CHECK_SET_VAL(HTT_SFM_CMN_MAC_ID, _val); \
  4595. ((_var) |= ((_val) << HTT_SFM_CMN_MAC_ID_S)); \
  4596. } while (0)
  4597. typedef struct {
  4598. htt_tlv_hdr_t tlv_hdr;
  4599. /**
  4600. * BIT [ 7 : 0] :- mac_id
  4601. * BIT [31 : 8] :- reserved
  4602. */
  4603. A_UINT32 mac_id__word;
  4604. /**
  4605. * Indicates the total number of 128 byte buffers in the CMEM
  4606. * that are available for buffer sharing
  4607. */
  4608. A_UINT32 buf_total;
  4609. /**
  4610. * Indicates for certain client or all the clients there is no
  4611. * dword saved in SFM, refer to SFM_R1_MEM_EMPTY
  4612. */
  4613. A_UINT32 mem_empty;
  4614. /** DEALLOCATE_BUFFERS, refer to register SFM_R0_DEALLOCATE_BUFFERS */
  4615. A_UINT32 deallocate_bufs;
  4616. /** Number of Records */
  4617. A_UINT32 num_records;
  4618. } htt_stats_sfm_cmn_tlv;
  4619. /* preserve old name alias for new name consistent with the tag name */
  4620. typedef htt_stats_sfm_cmn_tlv htt_sfm_cmn_tlv;
  4621. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  4622. * TLV_TAGS:
  4623. * - HTT_STATS_SFM_CMN_TAG
  4624. * - HTT_STATS_STRING_TAG
  4625. * - HTT_STATS_SFM_CLIENT_TAG
  4626. * - HTT_STATS_SFM_CLIENT_USER_TAG
  4627. */
  4628. /* NOTE:
  4629. * This structure is for documentation, and cannot be safely used directly.
  4630. * Instead, use the constituent TLV structures to fill/parse.
  4631. */
  4632. #ifdef ATH_TARGET
  4633. typedef struct {
  4634. htt_stats_sfm_cmn_tlv cmn_tlv;
  4635. /** Variable based on the Number of records. */
  4636. struct {
  4637. htt_stats_string_tlv client_str_tlv;
  4638. htt_stats_sfm_client_tlv client_tlv;
  4639. htt_stats_sfm_client_user_tlv user_tlv;
  4640. } r[1];
  4641. } htt_sfm_stats_t;
  4642. #endif /* ATH_TARGET */
  4643. /* == SRNG STATS == */
  4644. /* DWORD mac_id__ring_id__arena__ep */
  4645. #define HTT_SRING_STATS_MAC_ID_M 0x000000ff
  4646. #define HTT_SRING_STATS_MAC_ID_S 0
  4647. #define HTT_SRING_STATS_RING_ID_M 0x0000ff00
  4648. #define HTT_SRING_STATS_RING_ID_S 8
  4649. #define HTT_SRING_STATS_ARENA_M 0x00ff0000
  4650. #define HTT_SRING_STATS_ARENA_S 16
  4651. #define HTT_SRING_STATS_EP_TYPE_M 0x01000000
  4652. #define HTT_SRING_STATS_EP_TYPE_S 24
  4653. #define HTT_SRING_STATS_MAC_ID_GET(_var) \
  4654. (((_var) & HTT_SRING_STATS_MAC_ID_M) >> \
  4655. HTT_SRING_STATS_MAC_ID_S)
  4656. #define HTT_SRING_STATS_MAC_ID_SET(_var, _val) \
  4657. do { \
  4658. HTT_CHECK_SET_VAL(HTT_SRING_STATS_MAC_ID, _val); \
  4659. ((_var) |= ((_val) << HTT_SRING_STATS_MAC_ID_S)); \
  4660. } while (0)
  4661. #define HTT_SRING_STATS_RING_ID_GET(_var) \
  4662. (((_var) & HTT_SRING_STATS_RING_ID_M) >> \
  4663. HTT_SRING_STATS_RING_ID_S)
  4664. #define HTT_SRING_STATS_RING_ID_SET(_var, _val) \
  4665. do { \
  4666. HTT_CHECK_SET_VAL(HTT_SRING_STATS_RING_ID, _val); \
  4667. ((_var) |= ((_val) << HTT_SRING_STATS_RING_ID_S)); \
  4668. } while (0)
  4669. #define HTT_SRING_STATS_ARENA_GET(_var) \
  4670. (((_var) & HTT_SRING_STATS_ARENA_M) >> \
  4671. HTT_SRING_STATS_ARENA_S)
  4672. #define HTT_SRING_STATS_ARENA_SET(_var, _val) \
  4673. do { \
  4674. HTT_CHECK_SET_VAL(HTT_SRING_STATS_ARENA, _val); \
  4675. ((_var) |= ((_val) << HTT_SRING_STATS_ARENA_S)); \
  4676. } while (0)
  4677. #define HTT_SRING_STATS_EP_TYPE_GET(_var) \
  4678. (((_var) & HTT_SRING_STATS_EP_TYPE_M) >> \
  4679. HTT_SRING_STATS_EP_TYPE_S)
  4680. #define HTT_SRING_STATS_EP_TYPE_SET(_var, _val) \
  4681. do { \
  4682. HTT_CHECK_SET_VAL(HTT_SRING_STATS_EP_TYPE, _val); \
  4683. ((_var) |= ((_val) << HTT_SRING_STATS_EP_TYPE_S)); \
  4684. } while (0)
  4685. /* DWORD num_avail_words__num_valid_words */
  4686. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_M 0x0000ffff
  4687. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_S 0
  4688. #define HTT_SRING_STATS_NUM_VALID_WORDS_M 0xffff0000
  4689. #define HTT_SRING_STATS_NUM_VALID_WORDS_S 16
  4690. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_GET(_var) \
  4691. (((_var) & HTT_SRING_STATS_NUM_AVAIL_WORDS_M) >> \
  4692. HTT_SRING_STATS_NUM_AVAIL_WORDS_S)
  4693. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_SET(_var, _val) \
  4694. do { \
  4695. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_AVAIL_WORDS, _val); \
  4696. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_AVAIL_WORDS_S)); \
  4697. } while (0)
  4698. #define HTT_SRING_STATS_NUM_VALID_WORDS_GET(_var) \
  4699. (((_var) & HTT_SRING_STATS_NUM_VALID_WORDS_M) >> \
  4700. HTT_SRING_STATS_NUM_VALID_WORDS_S)
  4701. #define HTT_SRING_STATS_NUM_VALID_WORDS_SET(_var, _val) \
  4702. do { \
  4703. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_VALID_WORDS, _val); \
  4704. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_VALID_WORDS_S)); \
  4705. } while (0)
  4706. /* DWORD head_ptr__tail_ptr */
  4707. #define HTT_SRING_STATS_HEAD_PTR_M 0x0000ffff
  4708. #define HTT_SRING_STATS_HEAD_PTR_S 0
  4709. #define HTT_SRING_STATS_TAIL_PTR_M 0xffff0000
  4710. #define HTT_SRING_STATS_TAIL_PTR_S 16
  4711. #define HTT_SRING_STATS_HEAD_PTR_GET(_var) \
  4712. (((_var) & HTT_SRING_STATS_HEAD_PTR_M) >> \
  4713. HTT_SRING_STATS_HEAD_PTR_S)
  4714. #define HTT_SRING_STATS_HEAD_PTR_SET(_var, _val) \
  4715. do { \
  4716. HTT_CHECK_SET_VAL(HTT_SRING_STATS_HEAD_PTR, _val); \
  4717. ((_var) |= ((_val) << HTT_SRING_STATS_HEAD_PTR_S)); \
  4718. } while (0)
  4719. #define HTT_SRING_STATS_TAIL_PTR_GET(_var) \
  4720. (((_var) & HTT_SRING_STATS_TAIL_PTR_M) >> \
  4721. HTT_SRING_STATS_TAIL_PTR_S)
  4722. #define HTT_SRING_STATS_TAIL_PTR_SET(_var, _val) \
  4723. do { \
  4724. HTT_CHECK_SET_VAL(HTT_SRING_STATS_TAIL_PTR, _val); \
  4725. ((_var) |= ((_val) << HTT_SRING_STATS_TAIL_PTR_S)); \
  4726. } while (0)
  4727. /* DWORD consumer_empty__producer_full */
  4728. #define HTT_SRING_STATS_CONSUMER_EMPTY_M 0x0000ffff
  4729. #define HTT_SRING_STATS_CONSUMER_EMPTY_S 0
  4730. #define HTT_SRING_STATS_PRODUCER_FULL_M 0xffff0000
  4731. #define HTT_SRING_STATS_PRODUCER_FULL_S 16
  4732. #define HTT_SRING_STATS_CONSUMER_EMPTY_GET(_var) \
  4733. (((_var) & HTT_SRING_STATS_CONSUMER_EMPTY_M) >> \
  4734. HTT_SRING_STATS_CONSUMER_EMPTY_S)
  4735. #define HTT_SRING_STATS_CONSUMER_EMPTY_SET(_var, _val) \
  4736. do { \
  4737. HTT_CHECK_SET_VAL(HTT_SRING_STATS_CONSUMER_EMPTY, _val); \
  4738. ((_var) |= ((_val) << HTT_SRING_STATS_CONSUMER_EMPTY_S)); \
  4739. } while (0)
  4740. #define HTT_SRING_STATS_PRODUCER_FULL_GET(_var) \
  4741. (((_var) & HTT_SRING_STATS_PRODUCER_FULL_M) >> \
  4742. HTT_SRING_STATS_PRODUCER_FULL_S)
  4743. #define HTT_SRING_STATS_PRODUCER_FULL_SET(_var, _val) \
  4744. do { \
  4745. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PRODUCER_FULL, _val); \
  4746. ((_var) |= ((_val) << HTT_SRING_STATS_PRODUCER_FULL_S)); \
  4747. } while (0)
  4748. /* DWORD prefetch_count__internal_tail_ptr */
  4749. #define HTT_SRING_STATS_PREFETCH_COUNT_M 0x0000ffff
  4750. #define HTT_SRING_STATS_PREFETCH_COUNT_S 0
  4751. #define HTT_SRING_STATS_INTERNAL_TP_M 0xffff0000
  4752. #define HTT_SRING_STATS_INTERNAL_TP_S 16
  4753. #define HTT_SRING_STATS_PREFETCH_COUNT_GET(_var) \
  4754. (((_var) & HTT_SRING_STATS_PREFETCH_COUNT_M) >> \
  4755. HTT_SRING_STATS_PREFETCH_COUNT_S)
  4756. #define HTT_SRING_STATS_PREFETCH_COUNT_SET(_var, _val) \
  4757. do { \
  4758. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PREFETCH_COUNT, _val); \
  4759. ((_var) |= ((_val) << HTT_SRING_STATS_PREFETCH_COUNT_S)); \
  4760. } while (0)
  4761. #define HTT_SRING_STATS_INTERNAL_TP_GET(_var) \
  4762. (((_var) & HTT_SRING_STATS_INTERNAL_TP_M) >> \
  4763. HTT_SRING_STATS_INTERNAL_TP_S)
  4764. #define HTT_SRING_STATS_INTERNAL_TP_SET(_var, _val) \
  4765. do { \
  4766. HTT_CHECK_SET_VAL(HTT_SRING_STATS_INTERNAL_TP, _val); \
  4767. ((_var) |= ((_val) << HTT_SRING_STATS_INTERNAL_TP_S)); \
  4768. } while (0)
  4769. typedef struct {
  4770. htt_tlv_hdr_t tlv_hdr;
  4771. /**
  4772. * BIT [ 7 : 0] :- mac_id
  4773. * BIT [15 : 8] :- ring_id
  4774. * BIT [23 : 16] :- arena 0 -SRING_HRAM, 1 - SRING_HCRAM, 2 - SRING_HW2HW.
  4775. * BIT [24 : 24] :- EP 0 -consumer, 1 - producer
  4776. * BIT [31 : 25] :- reserved
  4777. */
  4778. A_UINT32 mac_id__ring_id__arena__ep;
  4779. /** DWORD aligned base memory address of the ring */
  4780. A_UINT32 base_addr_lsb;
  4781. A_UINT32 base_addr_msb;
  4782. /** size of ring */
  4783. A_UINT32 ring_size;
  4784. /** size of each ring element */
  4785. A_UINT32 elem_size;
  4786. /** Ring status
  4787. *
  4788. * BIT [15 : 0] :- num_avail_words
  4789. * BIT [31 : 16] :- num_valid_words
  4790. */
  4791. A_UINT32 num_avail_words__num_valid_words;
  4792. /** Index of head and tail
  4793. * BIT [15 : 0] :- head_ptr
  4794. * BIT [31 : 16] :- tail_ptr
  4795. */
  4796. A_UINT32 head_ptr__tail_ptr;
  4797. /** Empty or full counter of rings
  4798. * BIT [15 : 0] :- consumer_empty
  4799. * BIT [31 : 16] :- producer_full
  4800. */
  4801. A_UINT32 consumer_empty__producer_full;
  4802. /** Prefetch status of consumer ring
  4803. * BIT [15 : 0] :- prefetch_count
  4804. * BIT [31 : 16] :- internal_tail_ptr
  4805. */
  4806. A_UINT32 prefetch_count__internal_tail_ptr;
  4807. } htt_stats_sring_stats_tlv;
  4808. /* preserve old name alias for new name consistent with the tag name */
  4809. typedef htt_stats_sring_stats_tlv htt_sring_stats_tlv;
  4810. typedef struct {
  4811. htt_tlv_hdr_t tlv_hdr;
  4812. A_UINT32 num_records;
  4813. } htt_stats_sring_cmn_tlv;
  4814. /* preserve old name alias for new name consistent with the tag name */
  4815. typedef htt_stats_sring_cmn_tlv htt_sring_cmn_tlv;
  4816. /* STATS_TYPE : HTT_DBG_EXT_STATS_SRNG_INFO
  4817. * TLV_TAGS:
  4818. * - HTT_STATS_SRING_CMN_TAG
  4819. * - HTT_STATS_STRING_TAG
  4820. * - HTT_STATS_SRING_STATS_TAG
  4821. */
  4822. /* NOTE:
  4823. * This structure is for documentation, and cannot be safely used directly.
  4824. * Instead, use the constituent TLV structures to fill/parse.
  4825. */
  4826. #ifdef ATH_TARGET
  4827. typedef struct {
  4828. htt_stats_sring_cmn_tlv cmn_tlv;
  4829. /** Variable based on the Number of records */
  4830. struct {
  4831. htt_stats_string_tlv sring_str_tlv;
  4832. htt_stats_sring_stats_tlv sring_stats_tlv;
  4833. } r[1];
  4834. } htt_sring_stats_t;
  4835. #endif /* ATH_TARGET */
  4836. /* == PDEV TX RATE CTRL STATS == */
  4837. #define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  4838. #define HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  4839. #define HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
  4840. #define HTT_TX_PDEV_STATS_NUM_GI_COUNTERS 4
  4841. #define HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS 5
  4842. #define HTT_TX_PDEV_STATS_NUM_BW_COUNTERS 4
  4843. #define HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  4844. #define HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  4845. #define HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  4846. #define HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  4847. #define HTT_TX_PDEV_STATS_NUM_LTF 4
  4848. #define HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES 6
  4849. #define HTT_TX_PDEV_STATS_NUM_11BE_TRIGGER_TYPES 6
  4850. #define HTT_TX_NUM_OF_SOUNDING_STATS_WORDS \
  4851. (HTT_TX_PDEV_STATS_NUM_BW_COUNTERS * \
  4852. HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS)
  4853. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  4854. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_S 0
  4855. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  4856. (((_var) & HTT_TX_PDEV_RATE_STATS_MAC_ID_M) >> \
  4857. HTT_TX_PDEV_RATE_STATS_MAC_ID_S)
  4858. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  4859. do { \
  4860. HTT_CHECK_SET_VAL(HTT_TX_PDEV_RATE_STATS_MAC_ID, _val); \
  4861. ((_var) |= ((_val) << HTT_TX_PDEV_RATE_STATS_MAC_ID_S)); \
  4862. } while (0)
  4863. #define HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS \
  4864. (HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + \
  4865. HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + \
  4866. HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS)
  4867. #define HTT_TX_PDEV_STATS_NUM_PER_COUNTERS 101
  4868. /*
  4869. * Introduce new TX counters to support 320MHz support and punctured modes
  4870. */
  4871. typedef enum {
  4872. HTT_TX_PDEV_STATS_PUNCTURED_NONE = 0,
  4873. HTT_TX_PDEV_STATS_PUNCTURED_20 = 1,
  4874. HTT_TX_PDEV_STATS_PUNCTURED_40 = 2,
  4875. HTT_TX_PDEV_STATS_PUNCTURED_80 = 3,
  4876. HTT_TX_PDEV_STATS_PUNCTURED_120 = 4,
  4877. HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
  4878. } HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;
  4879. #define HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  4880. /* 11be related updates */
  4881. #define HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS 16 /* 0...13,-2,-1 */
  4882. #define HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */
  4883. #define HTT_TX_PDEV_STATS_NUM_HE_SIG_B_MCS_COUNTERS 6
  4884. #define HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS 4
  4885. typedef enum {
  4886. HTT_TX_PDEV_STATS_AX_RU_SIZE_26,
  4887. HTT_TX_PDEV_STATS_AX_RU_SIZE_52,
  4888. HTT_TX_PDEV_STATS_AX_RU_SIZE_106,
  4889. HTT_TX_PDEV_STATS_AX_RU_SIZE_242,
  4890. HTT_TX_PDEV_STATS_AX_RU_SIZE_484,
  4891. HTT_TX_PDEV_STATS_AX_RU_SIZE_996,
  4892. HTT_TX_PDEV_STATS_AX_RU_SIZE_996x2,
  4893. HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS,
  4894. } HTT_TX_PDEV_STATS_AX_RU_SIZE;
  4895. typedef enum {
  4896. HTT_TX_PDEV_STATS_BE_RU_SIZE_26,
  4897. HTT_TX_PDEV_STATS_BE_RU_SIZE_52,
  4898. HTT_TX_PDEV_STATS_BE_RU_SIZE_52_26,
  4899. HTT_TX_PDEV_STATS_BE_RU_SIZE_106,
  4900. HTT_TX_PDEV_STATS_BE_RU_SIZE_106_26,
  4901. HTT_TX_PDEV_STATS_BE_RU_SIZE_242,
  4902. HTT_TX_PDEV_STATS_BE_RU_SIZE_484,
  4903. HTT_TX_PDEV_STATS_BE_RU_SIZE_484_242,
  4904. HTT_TX_PDEV_STATS_BE_RU_SIZE_996,
  4905. HTT_TX_PDEV_STATS_BE_RU_SIZE_996_484,
  4906. HTT_TX_PDEV_STATS_BE_RU_SIZE_996_484_242,
  4907. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x2,
  4908. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x2_484,
  4909. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x3,
  4910. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x3_484,
  4911. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x4,
  4912. HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS,
  4913. } HTT_TX_PDEV_STATS_BE_RU_SIZE;
  4914. typedef struct {
  4915. htt_tlv_hdr_t tlv_hdr;
  4916. /**
  4917. * BIT [ 7 : 0] :- mac_id
  4918. * BIT [31 : 8] :- reserved
  4919. */
  4920. A_UINT32 mac_id__word;
  4921. /** Number of tx ldpc packets */
  4922. A_UINT32 tx_ldpc;
  4923. /** Number of tx rts packets */
  4924. A_UINT32 rts_cnt;
  4925. /** RSSI value of last ack packet (units = dB above noise floor) */
  4926. A_UINT32 ack_rssi;
  4927. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4928. /** tx_xx_mcs: currently unused */
  4929. A_UINT32 tx_su_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4930. A_UINT32 tx_mu_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4931. /* element 0,1, ...7 -> NSS 1,2, ...8 */
  4932. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4933. /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  4934. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4935. A_UINT32 tx_stbc[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4936. A_UINT32 tx_pream[HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  4937. /**
  4938. * Counters to track number of tx packets in each GI
  4939. * (400us, 800us, 1600us & 3200us) in each mcs (0-11)
  4940. */
  4941. A_UINT32 tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4942. /** Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  4943. A_UINT32 tx_dcm[HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS];
  4944. /** Number of CTS-acknowledged RTS packets */
  4945. A_UINT32 rts_success;
  4946. /**
  4947. * Counters for legacy 11a and 11b transmissions.
  4948. *
  4949. * The index corresponds to:
  4950. *
  4951. * CCK: 0: 1 Mbps, 1: 2 Mbps, 2: 5.5 Mbps, 3: 11 Mbps
  4952. *
  4953. * OFDM: 0: 6 Mbps, 1: 9 Mbps, 2: 12 Mbps, 3: 18 Mbps,
  4954. * 4: 24 Mbps, 5: 36 Mbps, 6: 48 Mbps, 7: 54 Mbps
  4955. */
  4956. A_UINT32 tx_legacy_cck_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  4957. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  4958. /** 11AC VHT DL MU MIMO LDPC count */
  4959. A_UINT32 ac_mu_mimo_tx_ldpc;
  4960. /** 11AX HE DL MU MIMO LDPC count */
  4961. A_UINT32 ax_mu_mimo_tx_ldpc;
  4962. /** 11AX HE DL MU OFDMA LDPC count */
  4963. A_UINT32 ofdma_tx_ldpc;
  4964. /**
  4965. * Counters for 11ax HE LTF selection during TX.
  4966. *
  4967. * The index corresponds to:
  4968. *
  4969. * 0: unused, 1: 1x LTF, 2: 2x LTF, 3: 4x LTF
  4970. */
  4971. A_UINT32 tx_he_ltf[HTT_TX_PDEV_STATS_NUM_LTF];
  4972. /** 11AC VHT DL MU MIMO TX MCS stats */
  4973. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4974. /** 11AX HE DL MU MIMO TX MCS stats */
  4975. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4976. /** 11AX HE DL MU OFDMA TX MCS stats */
  4977. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4978. /** 11AC VHT DL MU MIMO TX NSS stats (Indicates NSS for individual users) */
  4979. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4980. /** 11AX HE DL MU MIMO TX NSS stats (Indicates NSS for individual users) */
  4981. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4982. /** 11AX HE DL MU OFDMA TX NSS stats (Indicates NSS for individual users) */
  4983. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4984. /** 11AC VHT DL MU MIMO TX BW stats */
  4985. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4986. /** 11AX HE DL MU MIMO TX BW stats */
  4987. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4988. /** 11AX HE DL MU OFDMA TX BW stats */
  4989. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4990. /** 11AC VHT DL MU MIMO TX guard interval stats */
  4991. A_UINT32 ac_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4992. /** 11AX HE DL MU MIMO TX guard interval stats */
  4993. A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4994. /** 11AX HE DL MU OFDMA TX guard interval stats */
  4995. A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4996. A_UINT32 trigger_type_11ax[HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES];
  4997. A_UINT32 tx_11ax_su_ext;
  4998. /* Stats for MCS 12/13 */
  4999. A_UINT32 tx_mcs_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5000. A_UINT32 tx_stbc_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5001. A_UINT32 tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5002. /** 11AX VHT DL MU MIMO extended TX MCS stats for MCS 12/13 */
  5003. A_UINT32 ax_mu_mimo_tx_mcs_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5004. /** 11AX VHT DL MU OFDMA extended TX MCS stats for MCS 12/13 */
  5005. A_UINT32 ofdma_tx_mcs_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5006. /** 11AX VHT DL MU MIMO extended TX guard interval stats for MCS 12/13 */
  5007. A_UINT32 ax_mu_mimo_tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5008. /** 11AX VHT DL MU OFDMA extended TX guard interval stats for MCS 12/13 */
  5009. A_UINT32 ofdma_tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5010. /* Stats for MCS 14/15 */
  5011. A_UINT32 tx_mcs_ext_2[HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  5012. A_UINT32 tx_bw_320mhz;
  5013. A_UINT32 tx_gi_ext_2[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  5014. A_UINT32 tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  5015. A_UINT32 reduced_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  5016. /** 11AC VHT DL MU MIMO TX BW stats at reduced channel config */
  5017. A_UINT32 reduced_ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  5018. /** 11AX HE DL MU MIMO TX BW stats at reduced channel config */
  5019. A_UINT32 reduced_ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  5020. /** 11AX HE DL MU OFDMA TX BW stats at reduced channel config */
  5021. A_UINT32 reduced_ax_mu_ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  5022. /** 11AX HE DL MU OFDMA TX RU Size stats */
  5023. A_UINT32 ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS];
  5024. /** 11AX HE DL MU OFDMA HE-SIG-B MCS stats */
  5025. A_UINT32 ofdma_he_sig_b_mcs[HTT_TX_PDEV_STATS_NUM_HE_SIG_B_MCS_COUNTERS];
  5026. /** 11AX HE SU data + embedded trigger PPDU success stats (stats for HETP ack success PPDU cnt) */
  5027. A_UINT32 ax_su_embedded_trigger_data_ppdu;
  5028. /** 11AX HE SU data + embedded trigger PPDU failure stats (stats for HETP ack failure PPDU cnt) */
  5029. A_UINT32 ax_su_embedded_trigger_data_ppdu_err;
  5030. /** sta side trigger stats */
  5031. A_UINT32 trigger_type_11be[HTT_TX_PDEV_STATS_NUM_11BE_TRIGGER_TYPES];
  5032. /** Stats for Extra EHT LTF */
  5033. A_UINT32 extra_eht_ltf;
  5034. /** Counter for Extra EHT LTFs in OFDMA sequences */
  5035. A_UINT32 extra_eht_ltf_ofdma;
  5036. /** 11AX HE UL_BA RU Size stats */
  5037. A_UINT32 ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS];
  5038. } htt_stats_tx_pdev_rate_stats_tlv;
  5039. /* preserve old name alias for new name consistent with the tag name */
  5040. typedef htt_stats_tx_pdev_rate_stats_tlv htt_tx_pdev_rate_stats_tlv;
  5041. typedef struct {
  5042. /* 11be mode pdev rate stats; placed in a separate TLV to adhere to size restrictions */
  5043. htt_tlv_hdr_t tlv_hdr;
  5044. /** 11BE EHT DL MU MIMO TX MCS stats */
  5045. A_UINT32 be_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5046. /** 11BE EHT DL MU MIMO TX NSS stats (Indicates NSS for individual users) */
  5047. A_UINT32 be_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5048. /** 11BE EHT DL MU MIMO TX BW stats */
  5049. A_UINT32 be_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5050. /** 11BE EHT DL MU MIMO TX guard interval stats */
  5051. A_UINT32 be_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5052. /** 11BE DL MU MIMO LDPC count */
  5053. A_UINT32 be_mu_mimo_tx_ldpc;
  5054. } htt_stats_tx_pdev_be_rate_stats_tlv;
  5055. /* preserve old name alias for new name consistent with the tag name */
  5056. typedef htt_stats_tx_pdev_be_rate_stats_tlv htt_tx_pdev_rate_stats_be_tlv;
  5057. typedef struct {
  5058. /*
  5059. * SAWF pdev rate stats;
  5060. * placed in a separate TLV to adhere to size restrictions
  5061. */
  5062. htt_tlv_hdr_t tlv_hdr;
  5063. /**
  5064. * Counter incremented when MCS is dropped due to the successive retries
  5065. * to a peer reaching the configured limit.
  5066. */
  5067. A_UINT32 rate_retry_mcs_drop_cnt;
  5068. /**
  5069. * histogram of MCS rate drop down, indexed by pre-drop MCS
  5070. */
  5071. A_UINT32 mcs_drop_rate[HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS];
  5072. /**
  5073. * PPDU PER histogram - each PPDU has its PER computed,
  5074. * and the bin corresponding to that PER percentage is incremented.
  5075. */
  5076. A_UINT32 per_histogram_cnt[HTT_TX_PDEV_STATS_NUM_PER_COUNTERS];
  5077. /**
  5078. * When the service class contains delay bound rate parameters which
  5079. * indicate low latency and we enable latency-based RA params then
  5080. * the low_latency_rate_count will be incremented.
  5081. * This counts the number of peer-TIDs that have been categorized as
  5082. * low-latency.
  5083. */
  5084. A_UINT32 low_latency_rate_cnt;
  5085. /** Indicate how many times rate drop happened within SIFS burst */
  5086. A_UINT32 su_burst_rate_drop_cnt;
  5087. /** Indicates how many within SIFS burst failed to deliver any pkt */
  5088. A_UINT32 su_burst_rate_drop_fail_cnt;
  5089. } htt_stats_tx_pdev_sawf_rate_stats_tlv;
  5090. /* preserve old name alias for new name consistent with the tag name */
  5091. typedef htt_stats_tx_pdev_sawf_rate_stats_tlv htt_tx_pdev_rate_stats_sawf_tlv;
  5092. typedef struct {
  5093. htt_tlv_hdr_t tlv_hdr;
  5094. /**
  5095. * BIT [ 7 : 0] :- mac_id
  5096. * BIT [31 : 8] :- reserved
  5097. */
  5098. A_UINT32 mac_id__word;
  5099. /** 11BE EHT DL MU OFDMA LDPC count */
  5100. A_UINT32 be_ofdma_tx_ldpc;
  5101. /** 11BE EHT DL MU OFDMA TX MCS stats */
  5102. A_UINT32 be_ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5103. /**
  5104. * 11BE EHT DL MU OFDMA TX NSS stats (Indicates NSS for individual users)
  5105. */
  5106. A_UINT32 be_ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5107. /** 11BE EHT DL MU OFDMA TX BW stats */
  5108. A_UINT32 be_ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5109. /** 11BE EHT DL MU OFDMA TX guard interval stats */
  5110. A_UINT32 be_ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5111. /** 11BE EHT DL MU OFDMA TX RU Size stats */
  5112. A_UINT32 be_ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  5113. /** 11BE EHT DL MU OFDMA EHT-SIG MCS stats */
  5114. A_UINT32 be_ofdma_eht_sig_mcs[HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS];
  5115. A_UINT32 be_ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  5116. } htt_stats_tx_pdev_rate_stats_be_ofdma_tlv;
  5117. /* preserve old name alias for new name consistent with the tag name */
  5118. typedef htt_stats_tx_pdev_rate_stats_be_ofdma_tlv
  5119. htt_tx_pdev_rate_stats_be_ofdma_tlv;
  5120. typedef struct {
  5121. htt_tlv_hdr_t tlv_hdr;
  5122. /** tx_ppdu_dur_hist:
  5123. * Tx PPDU duration histogram, which holds the tx duration of PPDUs
  5124. * under histogram bins of interval 250us
  5125. */
  5126. A_UINT32 tx_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS];
  5127. A_UINT32 tx_success_time_us_low;
  5128. A_UINT32 tx_success_time_us_high;
  5129. A_UINT32 tx_fail_time_us_low;
  5130. A_UINT32 tx_fail_time_us_high;
  5131. A_UINT32 pdev_up_time_us_low;
  5132. A_UINT32 pdev_up_time_us_high;
  5133. /** tx_ofdma_ppdu_dur_hist:
  5134. * Tx OFDMA PPDU duration histogram, which holds the tx duration of
  5135. * OFDMA PPDUs under histogram bins of interval 250us
  5136. */
  5137. A_UINT32 tx_ofdma_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS];
  5138. } htt_stats_tx_pdev_ppdu_dur_tlv;
  5139. /* preserve old name alias for new name consistent with the tag name */
  5140. typedef htt_stats_tx_pdev_ppdu_dur_tlv htt_tx_pdev_ppdu_dur_stats_tlv;
  5141. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
  5142. * TLV_TAGS:
  5143. * - HTT_STATS_TX_PDEV_RATE_STATS_TAG
  5144. */
  5145. /* NOTE:
  5146. * This structure is for documentation, and cannot be safely used directly.
  5147. * Instead, use the constituent TLV structures to fill/parse.
  5148. */
  5149. #ifdef ATH_TARGET
  5150. typedef struct {
  5151. htt_stats_tx_pdev_rate_stats_tlv rate_tlv;
  5152. htt_stats_tx_pdev_be_rate_stats_tlv rate_be_tlv;
  5153. htt_stats_tx_pdev_sawf_rate_stats_tlv rate_sawf_tlv;
  5154. htt_stats_tx_pdev_ppdu_dur_tlv tx_ppdu_dur_tlv;
  5155. } htt_tx_pdev_rate_stats_t;
  5156. #endif /* ATH_TARGET */
  5157. /* == PDEV RX RATE CTRL STATS == */
  5158. #define HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  5159. #define HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  5160. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  5161. #define HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  5162. #define HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
  5163. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT 14 /* 0-13 */
  5164. #define HTT_RX_PDEV_STATS_NUM_GI_COUNTERS 4
  5165. #define HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS 5
  5166. #define HTT_RX_PDEV_STATS_NUM_BW_COUNTERS 4
  5167. #define HTT_RX_PDEV_STATS_TOTAL_BW_COUNTERS \
  5168. (HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS + HTT_RX_PDEV_STATS_NUM_BW_COUNTERS)
  5169. #define HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS 5 /* 20, 40, 80, 160, 320Mhz */
  5170. #define HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  5171. #define HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS 8
  5172. #define HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  5173. #define HTT_RX_PDEV_MAX_OFDMA_NUM_USER 8
  5174. #define HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER 8
  5175. #define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16
  5176. #define HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS 16 /* 0-13, -2, -1 */
  5177. #define HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */
  5178. /* HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS:
  5179. * RU size index 0: HTT_UL_OFDMA_V0_RU_SIZE_RU_26
  5180. * RU size index 1: HTT_UL_OFDMA_V0_RU_SIZE_RU_52
  5181. * RU size index 2: HTT_UL_OFDMA_V0_RU_SIZE_RU_106
  5182. * RU size index 3: HTT_UL_OFDMA_V0_RU_SIZE_RU_242
  5183. * RU size index 4: HTT_UL_OFDMA_V0_RU_SIZE_RU_484
  5184. * RU size index 5: HTT_UL_OFDMA_V0_RU_SIZE_RU_996
  5185. */
  5186. #define HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS 6
  5187. /* HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS:
  5188. * RU size index 0: HTT_UL_OFDMA_V0_RU_SIZE_RU_26
  5189. * RU size index 1: HTT_UL_OFDMA_V0_RU_SIZE_RU_52
  5190. * RU size index 2: HTT_UL_OFDMA_V0_RU_SIZE_RU_106
  5191. * RU size index 3: HTT_UL_OFDMA_V0_RU_SIZE_RU_242
  5192. * RU size index 4: HTT_UL_OFDMA_V0_RU_SIZE_RU_484
  5193. * RU size index 5: HTT_UL_OFDMA_V0_RU_SIZE_RU_996
  5194. * RU size index 6: HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  5195. */
  5196. #define HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS 7 /* includes 996x2 */
  5197. typedef enum {
  5198. HTT_RX_PDEV_STATS_BE_RU_SIZE_26,
  5199. HTT_RX_PDEV_STATS_BE_RU_SIZE_52,
  5200. HTT_RX_PDEV_STATS_BE_RU_SIZE_52_26,
  5201. HTT_RX_PDEV_STATS_BE_RU_SIZE_106,
  5202. HTT_RX_PDEV_STATS_BE_RU_SIZE_106_26,
  5203. HTT_RX_PDEV_STATS_BE_RU_SIZE_242,
  5204. HTT_RX_PDEV_STATS_BE_RU_SIZE_484,
  5205. HTT_RX_PDEV_STATS_BE_RU_SIZE_484_242,
  5206. HTT_RX_PDEV_STATS_BE_RU_SIZE_996,
  5207. HTT_RX_PDEV_STATS_BE_RU_SIZE_996_484,
  5208. HTT_RX_PDEV_STATS_BE_RU_SIZE_996_484_242,
  5209. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x2,
  5210. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x2_484,
  5211. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x3,
  5212. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x3_484,
  5213. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x4,
  5214. HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS,
  5215. } HTT_RX_PDEV_STATS_BE_RU_SIZE;
  5216. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  5217. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0
  5218. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  5219. (((_var) & HTT_RX_PDEV_RATE_STATS_MAC_ID_M) >> \
  5220. HTT_RX_PDEV_RATE_STATS_MAC_ID_S)
  5221. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  5222. do { \
  5223. HTT_CHECK_SET_VAL(HTT_RX_PDEV_RATE_STATS_MAC_ID, _val); \
  5224. ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \
  5225. } while (0)
  5226. /* Introduce new RX counters to support 320MHZ support and punctured modes */
  5227. typedef enum {
  5228. HTT_RX_PDEV_STATS_PUNCTURED_NONE = 0,
  5229. HTT_RX_PDEV_STATS_PUNCTURED_20 = 1,
  5230. HTT_RX_PDEV_STATS_PUNCTURED_40 = 2,
  5231. HTT_RX_PDEV_STATS_PUNCTURED_80 = 3,
  5232. HTT_RX_PDEV_STATS_PUNCTURED_120 = 4,
  5233. HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
  5234. } HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;
  5235. #define HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  5236. typedef struct {
  5237. htt_tlv_hdr_t tlv_hdr;
  5238. /**
  5239. * BIT [ 7 : 0] :- mac_id
  5240. * BIT [31 : 8] :- reserved
  5241. */
  5242. A_UINT32 mac_id__word;
  5243. A_UINT32 nsts;
  5244. /** Number of rx ldpc packets */
  5245. A_UINT32 rx_ldpc;
  5246. /** Number of rx rts packets */
  5247. A_UINT32 rts_cnt;
  5248. /** units = dB above noise floor */
  5249. A_UINT32 rssi_mgmt;
  5250. /** units = dB above noise floor */
  5251. A_UINT32 rssi_data;
  5252. /** units = dB above noise floor */
  5253. A_UINT32 rssi_comb;
  5254. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5255. /** element 0,1, ...7 -> NSS 1,2, ...8 */
  5256. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5257. A_UINT32 rx_dcm[HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS];
  5258. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5259. /** element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  5260. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5261. A_UINT32 rx_pream[HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  5262. /** units = dB above noise floor */
  5263. A_UINT8 rssi_chain[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5264. /** Counters to track number of rx packets in each GI in each mcs (0-11) */
  5265. A_UINT32 rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5266. /** rx Signal Strength value in dBm unit */
  5267. A_INT32 rssi_in_dbm;
  5268. A_UINT32 rx_11ax_su_ext;
  5269. A_UINT32 rx_11ac_mumimo;
  5270. A_UINT32 rx_11ax_mumimo;
  5271. A_UINT32 rx_11ax_ofdma;
  5272. A_UINT32 txbf;
  5273. A_UINT32 rx_legacy_cck_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  5274. A_UINT32 rx_legacy_ofdm_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  5275. A_UINT32 rx_active_dur_us_low;
  5276. A_UINT32 rx_active_dur_us_high;
  5277. /** number of times UL MU MIMO RX packets received */
  5278. A_UINT32 rx_11ax_ul_ofdma;
  5279. /** 11AX HE UL OFDMA RX TB PPDU MCS stats */
  5280. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5281. /** 11AX HE UL OFDMA RX TB PPDU GI stats */
  5282. A_UINT32 ul_ofdma_rx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5283. /**
  5284. * 11AX HE UL OFDMA RX TB PPDU NSS stats
  5285. * (Increments the individual user NSS in the OFDMA PPDU received)
  5286. */
  5287. A_UINT32 ul_ofdma_rx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5288. /** 11AX HE UL OFDMA RX TB PPDU BW stats */
  5289. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  5290. /** Number of times UL OFDMA TB PPDUs received with stbc */
  5291. A_UINT32 ul_ofdma_rx_stbc;
  5292. /** Number of times UL OFDMA TB PPDUs received with ldpc */
  5293. A_UINT32 ul_ofdma_rx_ldpc;
  5294. /**
  5295. * Number of non data PPDUs received for each degree (number of users)
  5296. * in UL OFDMA
  5297. */
  5298. A_UINT32 rx_ulofdma_non_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5299. /**
  5300. * Number of data ppdus received for each degree (number of users)
  5301. * in UL OFDMA
  5302. */
  5303. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5304. /**
  5305. * Number of mpdus passed for each degree (number of users)
  5306. * in UL OFDMA TB PPDU
  5307. */
  5308. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5309. /**
  5310. * Number of mpdus failed for each degree (number of users)
  5311. * in UL OFDMA TB PPDU
  5312. */
  5313. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5314. A_UINT32 nss_count;
  5315. A_UINT32 pilot_count;
  5316. /** RxEVM stats in dB */
  5317. A_INT32 rx_pilot_evm_dB[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS];
  5318. /**
  5319. * EVM mean across pilots, computed as
  5320. * mean(10*log10(rx_pilot_evm_linear)) = mean(rx_pilot_evm_dB)
  5321. */
  5322. A_INT32 rx_pilot_evm_dB_mean[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5323. /** dBm units */
  5324. A_INT8 rx_ul_fd_rssi[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5325. /** per_chain_rssi_pkt_type:
  5326. * This field shows what type of rx frame the per-chain RSSI was computed
  5327. * on, by recording the frame type and sub-type as bit-fields within this
  5328. * field:
  5329. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  5330. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  5331. * BIT [31 : 8] :- Reserved
  5332. */
  5333. A_UINT32 per_chain_rssi_pkt_type;
  5334. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5335. A_UINT32 rx_su_ndpa;
  5336. A_UINT32 rx_11ax_su_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5337. A_UINT32 rx_mu_ndpa;
  5338. A_UINT32 rx_11ax_mu_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5339. A_UINT32 rx_br_poll;
  5340. A_UINT32 rx_11ax_dl_ofdma_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5341. A_UINT32 rx_11ax_dl_ofdma_ru[HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS];
  5342. /**
  5343. * Number of non data ppdus received for each degree (number of users)
  5344. * with UL MUMIMO
  5345. */
  5346. A_UINT32 rx_ulmumimo_non_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5347. /**
  5348. * Number of data ppdus received for each degree (number of users)
  5349. * with UL MUMIMO
  5350. */
  5351. A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5352. /**
  5353. * Number of mpdus passed for each degree (number of users)
  5354. * with UL MUMIMO TB PPDU
  5355. */
  5356. A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5357. /**
  5358. * Number of mpdus failed for each degree (number of users)
  5359. * with UL MUMIMO TB PPDU
  5360. */
  5361. A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5362. /**
  5363. * Number of non data ppdus received for each degree (number of users)
  5364. * in UL OFDMA
  5365. */
  5366. A_UINT32 rx_ulofdma_non_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5367. /**
  5368. * Number of data ppdus received for each degree (number of users)
  5369. *in UL OFDMA
  5370. */
  5371. A_UINT32 rx_ulofdma_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5372. /* Stats for MCS 12/13 */
  5373. A_UINT32 rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5374. /*
  5375. * NOTE - this TLV is already large enough that it causes the HTT message
  5376. * carrying it to be nearly at the message size limit that applies to
  5377. * many targets/hosts.
  5378. * No further fields should be added to this TLV without very careful
  5379. * review to ensure the size increase is acceptable.
  5380. */
  5381. } htt_stats_rx_pdev_rate_stats_tlv;
  5382. /* preserve old name alias for new name consistent with the tag name */
  5383. typedef htt_stats_rx_pdev_rate_stats_tlv htt_rx_pdev_rate_stats_tlv;
  5384. typedef struct {
  5385. htt_tlv_hdr_t tlv_hdr;
  5386. /** Tx PPDU duration histogram **/
  5387. A_UINT32 rx_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS];
  5388. } htt_stats_rx_pdev_ppdu_dur_tlv;
  5389. /* preserve old name alias for new name consistent with the tag name */
  5390. typedef htt_stats_rx_pdev_ppdu_dur_tlv htt_rx_pdev_ppdu_dur_stats_tlv;
  5391. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE
  5392. * TLV_TAGS:
  5393. * - HTT_STATS_RX_PDEV_RATE_STATS_TAG
  5394. */
  5395. /* NOTE:
  5396. * This structure is for documentation, and cannot be safely used directly.
  5397. * Instead, use the constituent TLV structures to fill/parse.
  5398. */
  5399. #ifdef ATH_TARGET
  5400. typedef struct {
  5401. htt_stats_rx_pdev_rate_stats_tlv rate_tlv;
  5402. htt_stats_rx_pdev_ppdu_dur_tlv rx_ppdu_dur_tlv;
  5403. } htt_rx_pdev_rate_stats_t;
  5404. #endif /* ATH_TARGET */
  5405. typedef struct {
  5406. htt_tlv_hdr_t tlv_hdr;
  5407. /** units = dB above noise floor */
  5408. A_UINT8 rssi_chain_ext[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS];
  5409. A_INT8 rx_per_chain_rssi_ext_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS];
  5410. /** rx mcast signal strength value in dBm unit */
  5411. A_INT32 rssi_mcast_in_dbm;
  5412. /** rx mgmt packet signal Strength value in dBm unit */
  5413. A_INT32 rssi_mgmt_in_dbm;
  5414. /*
  5415. * Stats for MCS 0-13 since rx_pdev_rate_stats_tlv cannot be updated,
  5416. * due to message size limitations.
  5417. */
  5418. A_UINT32 rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5419. A_UINT32 rx_stbc_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5420. A_UINT32 rx_gi_ext[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5421. A_UINT32 ul_ofdma_rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5422. A_UINT32 ul_ofdma_rx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5423. A_UINT32 rx_11ax_su_txbf_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5424. A_UINT32 rx_11ax_mu_txbf_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5425. A_UINT32 rx_11ax_dl_ofdma_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5426. /* MCS 14,15 */
  5427. A_UINT32 rx_mcs_ext_2[HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  5428. A_UINT32 rx_bw_ext[HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS];
  5429. A_UINT32 rx_gi_ext_2[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  5430. A_UINT32 rx_su_punctured_mode[HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  5431. A_UINT32 reduced_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5432. A_UINT8 rssi_chain_ext_2[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_2_COUNTERS]; /* units = dB above noise floor */
  5433. A_INT8 rx_per_chain_rssi_ext_2_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_2_COUNTERS];
  5434. } htt_stats_rx_pdev_rate_ext_stats_tlv;
  5435. /* preserve old name alias for new name consistent with the tag name */
  5436. typedef htt_stats_rx_pdev_rate_ext_stats_tlv htt_rx_pdev_rate_ext_stats_tlv;
  5437. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT
  5438. * TLV_TAGS:
  5439. * - HTT_STATS_RX_PDEV_RATE_EXT_STATS_TAG
  5440. */
  5441. /* NOTE:
  5442. * This structure is for documentation, and cannot be safely used directly.
  5443. * Instead, use the constituent TLV structures to fill/parse.
  5444. */
  5445. #ifdef ATH_TARGET
  5446. typedef struct {
  5447. htt_stats_rx_pdev_rate_ext_stats_tlv rate_tlv;
  5448. } htt_rx_pdev_rate_ext_stats_t;
  5449. #endif /* ATH_TARGET */
  5450. #define HTT_STATS_CMN_MAC_ID_M 0x000000ff
  5451. #define HTT_STATS_CMN_MAC_ID_S 0
  5452. #define HTT_STATS_CMN_MAC_ID_GET(_var) \
  5453. (((_var) & HTT_STATS_CMN_MAC_ID_M) >> \
  5454. HTT_STATS_CMN_MAC_ID_S)
  5455. #define HTT_STATS_CMN_MAC_ID_SET(_var, _val) \
  5456. do { \
  5457. HTT_CHECK_SET_VAL(HTT_STATS_CMN_MAC_ID, _val); \
  5458. ((_var) |= ((_val) << HTT_STATS_CMN_MAC_ID_S)); \
  5459. } while (0)
  5460. #define HTT_RX_UL_MAX_UPLINK_RSSI_TRACK 5
  5461. typedef struct {
  5462. htt_tlv_hdr_t tlv_hdr;
  5463. /**
  5464. * BIT [ 7 : 0] :- mac_id
  5465. * BIT [31 : 8] :- reserved
  5466. */
  5467. A_UINT32 mac_id__word;
  5468. A_UINT32 rx_11ax_ul_ofdma;
  5469. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5470. A_UINT32 ul_ofdma_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5471. A_UINT32 ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5472. A_UINT32 ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5473. A_UINT32 ul_ofdma_rx_stbc;
  5474. A_UINT32 ul_ofdma_rx_ldpc;
  5475. /*
  5476. * These are arrays to hold the number of PPDUs that we received per RU.
  5477. * E.g. PPDUs (data or non data) received in RU26 will be incremented in
  5478. * array offset 0 and similarly RU52 will be incremented in array offset 1
  5479. */
  5480. A_UINT32 rx_ulofdma_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS]; /* ppdu level */
  5481. A_UINT32 rx_ulofdma_non_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS]; /* ppdu level */
  5482. /*
  5483. * These arrays hold Target RSSI (rx power the AP wants),
  5484. * FD RSSI (rx power the AP sees) & Power headroom values of STAs
  5485. * which can be identified by AIDs, during trigger based RX.
  5486. * Array acts a circular buffer and holds values for last 5 STAs
  5487. * in the same order as RX.
  5488. */
  5489. /**
  5490. * STA AID array for identifying which STA the
  5491. * Target-RSSI / FD-RSSI / pwr headroom stats are for
  5492. */
  5493. A_UINT32 uplink_sta_aid[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5494. /**
  5495. * Trig Target RSSI for STA AID in same index - UNIT(dBm)
  5496. */
  5497. A_INT32 uplink_sta_target_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5498. /**
  5499. * Trig FD RSSI from STA AID in same index - UNIT(dBm)
  5500. */
  5501. A_INT32 uplink_sta_fd_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5502. /**
  5503. * Trig power headroom for STA AID in same idx - UNIT(dB)
  5504. */
  5505. A_UINT32 uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5506. A_UINT32 reduced_ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5507. /*
  5508. * Number of HE UL OFDMA per-user responses containing only a QoS null in
  5509. * response to basic trigger. Typically a data response is expected.
  5510. */
  5511. A_UINT32 ul_ofdma_basic_trigger_rx_qos_null_only;
  5512. } htt_stats_rx_pdev_ul_trig_stats_tlv;
  5513. /* preserve old name alias for new name consistent with the tag name */
  5514. typedef htt_stats_rx_pdev_ul_trig_stats_tlv htt_rx_pdev_ul_trigger_stats_tlv;
  5515. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS
  5516. * TLV_TAGS:
  5517. * - HTT_STATS_RX_PDEV_UL_TRIG_STATS_TAG
  5518. * NOTE:
  5519. * This structure is for documentation, and cannot be safely used directly.
  5520. * Instead, use the constituent TLV structures to fill/parse.
  5521. */
  5522. #ifdef ATH_TARGET
  5523. typedef struct {
  5524. htt_stats_rx_pdev_ul_trig_stats_tlv ul_trigger_tlv;
  5525. } htt_rx_pdev_ul_trigger_stats_t;
  5526. #endif /* ATH_TARGET */
  5527. typedef struct {
  5528. htt_tlv_hdr_t tlv_hdr;
  5529. /**
  5530. * BIT [ 7 : 0] :- mac_id
  5531. * BIT [31 : 8] :- reserved
  5532. */
  5533. A_UINT32 mac_id__word;
  5534. A_UINT32 rx_11be_ul_ofdma;
  5535. A_UINT32 be_ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5536. A_UINT32 be_ul_ofdma_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5537. A_UINT32 be_ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5538. A_UINT32 be_ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5539. A_UINT32 be_ul_ofdma_rx_stbc;
  5540. A_UINT32 be_ul_ofdma_rx_ldpc;
  5541. /*
  5542. * These are arrays to hold the number of PPDUs that we received per RU.
  5543. * E.g. PPDUs (data or non data) received in RU26 will be incremented in
  5544. * array offset 0 and similarly RU52 will be incremented in array offset 1
  5545. */
  5546. /** PPDU level */
  5547. A_UINT32 be_rx_ulofdma_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  5548. /** PPDU level */
  5549. A_UINT32 be_rx_ulofdma_non_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  5550. /*
  5551. * These arrays hold Target RSSI (rx power the AP wants),
  5552. * FD RSSI (rx power the AP sees) & Power headroom values of STAs
  5553. * which can be identified by AIDs, during trigger based RX.
  5554. * Array acts a circular buffer and holds values for last 5 STAs
  5555. * in the same order as RX.
  5556. */
  5557. /**
  5558. * STA AID array for identifying which STA the
  5559. * Target-RSSI / FD-RSSI / pwr headroom stats are for
  5560. */
  5561. A_UINT32 be_uplink_sta_aid[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5562. /**
  5563. * Trig Target RSSI for STA AID in same index - UNIT(dBm)
  5564. */
  5565. A_INT32 be_uplink_sta_target_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5566. /**
  5567. * Trig FD RSSI from STA AID in same index - UNIT(dBm)
  5568. */
  5569. A_INT32 be_uplink_sta_fd_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5570. /**
  5571. * Trig power headroom for STA AID in same idx - UNIT(dB)
  5572. */
  5573. A_UINT32 be_uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5574. /*
  5575. * Number of EHT UL OFDMA per-user responses containing only a QoS null in
  5576. * response to basic trigger. Typically a data response is expected.
  5577. */
  5578. A_UINT32 be_ul_ofdma_basic_trigger_rx_qos_null_only;
  5579. /* UL MLO Queue Depth Sharing Stats */
  5580. A_UINT32 ul_mlo_send_qdepth_params_count;
  5581. A_UINT32 ul_mlo_proc_qdepth_params_count;
  5582. A_UINT32 ul_mlo_proc_accepted_qdepth_params_count;
  5583. A_UINT32 ul_mlo_proc_discarded_qdepth_params_count;
  5584. } htt_stats_rx_pdev_be_ul_trig_stats_tlv;
  5585. /* preserve old name alias for new name consistent with the tag name */
  5586. typedef htt_stats_rx_pdev_be_ul_trig_stats_tlv
  5587. htt_rx_pdev_be_ul_trigger_stats_tlv;
  5588. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS
  5589. * TLV_TAGS:
  5590. * - HTT_STATS_RX_PDEV_BE_UL_TRIG_STATS_TAG
  5591. * NOTE:
  5592. * This structure is for documentation, and cannot be safely used directly.
  5593. * Instead, use the constituent TLV structures to fill/parse.
  5594. */
  5595. #ifdef ATH_TARGET
  5596. typedef struct {
  5597. htt_stats_rx_pdev_be_ul_trig_stats_tlv ul_trigger_tlv;
  5598. } htt_rx_pdev_be_ul_trigger_stats_t;
  5599. #endif /* ATH_TARGET */
  5600. typedef struct {
  5601. htt_tlv_hdr_t tlv_hdr;
  5602. A_UINT32 user_index;
  5603. /** PPDU level */
  5604. A_UINT32 rx_ulofdma_non_data_ppdu;
  5605. /** PPDU level */
  5606. A_UINT32 rx_ulofdma_data_ppdu;
  5607. /** MPDU level */
  5608. A_UINT32 rx_ulofdma_mpdu_ok;
  5609. /** MPDU level */
  5610. A_UINT32 rx_ulofdma_mpdu_fail;
  5611. A_UINT32 rx_ulofdma_non_data_nusers;
  5612. A_UINT32 rx_ulofdma_data_nusers;
  5613. } htt_stats_rx_pdev_ul_ofdma_user_stats_tlv;
  5614. /* preserve old name alias for new name consistent with the tag name */
  5615. typedef htt_stats_rx_pdev_ul_ofdma_user_stats_tlv
  5616. htt_rx_pdev_ul_ofdma_user_stats_tlv;
  5617. typedef struct {
  5618. htt_tlv_hdr_t tlv_hdr;
  5619. A_UINT32 user_index;
  5620. /** PPDU level */
  5621. A_UINT32 be_rx_ulofdma_non_data_ppdu;
  5622. /** PPDU level */
  5623. A_UINT32 be_rx_ulofdma_data_ppdu;
  5624. /** MPDU level */
  5625. A_UINT32 be_rx_ulofdma_mpdu_ok;
  5626. /** MPDU level */
  5627. A_UINT32 be_rx_ulofdma_mpdu_fail;
  5628. A_UINT32 be_rx_ulofdma_non_data_nusers;
  5629. A_UINT32 be_rx_ulofdma_data_nusers;
  5630. } htt_stats_rx_pdev_be_ul_ofdma_user_stats_tlv;
  5631. /* preserve old name alias for new name consistent with the tag name */
  5632. typedef htt_stats_rx_pdev_be_ul_ofdma_user_stats_tlv
  5633. htt_rx_pdev_be_ul_ofdma_user_stats_tlv;
  5634. typedef struct {
  5635. htt_tlv_hdr_t tlv_hdr;
  5636. A_UINT32 user_index;
  5637. /** PPDU level */
  5638. A_UINT32 rx_ulmumimo_non_data_ppdu;
  5639. /** PPDU level */
  5640. A_UINT32 rx_ulmumimo_data_ppdu;
  5641. /** MPDU level */
  5642. A_UINT32 rx_ulmumimo_mpdu_ok;
  5643. /** MPDU level */
  5644. A_UINT32 rx_ulmumimo_mpdu_fail;
  5645. } htt_stats_rx_pdev_ul_mimo_user_stats_tlv;
  5646. /* preserve old name alias for new name consistent with the tag name */
  5647. typedef htt_stats_rx_pdev_ul_mimo_user_stats_tlv
  5648. htt_rx_pdev_ul_mimo_user_stats_tlv;
  5649. typedef struct {
  5650. htt_tlv_hdr_t tlv_hdr;
  5651. A_UINT32 user_index;
  5652. /** PPDU level */
  5653. A_UINT32 be_rx_ulmumimo_non_data_ppdu;
  5654. /** PPDU level */
  5655. A_UINT32 be_rx_ulmumimo_data_ppdu;
  5656. /** MPDU level */
  5657. A_UINT32 be_rx_ulmumimo_mpdu_ok;
  5658. /** MPDU level */
  5659. A_UINT32 be_rx_ulmumimo_mpdu_fail;
  5660. } htt_stats_rx_pdev_be_ul_mimo_user_stats_tlv;
  5661. /* preserve old name alias for new name consistent with the tag name */
  5662. typedef htt_stats_rx_pdev_be_ul_mimo_user_stats_tlv
  5663. htt_rx_pdev_be_ul_mimo_user_stats_tlv;
  5664. /* == RX PDEV/SOC STATS == */
  5665. typedef struct {
  5666. htt_tlv_hdr_t tlv_hdr;
  5667. /**
  5668. * BIT [7:0] :- mac_id
  5669. * BIT [31:8] :- reserved
  5670. *
  5671. * Refer to HTT_STATS_CMN_MAC_ID_GET/SET macros.
  5672. */
  5673. A_UINT32 mac_id__word;
  5674. /** Number of times UL MUMIMO RX packets received */
  5675. A_UINT32 rx_11ax_ul_mumimo;
  5676. /** 11AX HE UL MU-MIMO RX TB PPDU MCS stats */
  5677. A_UINT32 ul_mumimo_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5678. /**
  5679. * 11AX HE UL MU-MIMO RX GI & LTF stats.
  5680. * Index 0 indicates 1xLTF + 1.6 msec GI
  5681. * Index 1 indicates 2xLTF + 1.6 msec GI
  5682. * Index 2 indicates 4xLTF + 3.2 msec GI
  5683. */
  5684. A_UINT32 ul_mumimo_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5685. /**
  5686. * 11AX HE UL MU-MIMO RX TB PPDU NSS stats
  5687. * (Increments the individual user NSS in the UL MU MIMO PPDU received)
  5688. */
  5689. A_UINT32 ul_mumimo_rx_nss[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5690. /** 11AX HE UL MU-MIMO RX TB PPDU BW stats */
  5691. A_UINT32 ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5692. /** Number of times UL MUMIMO TB PPDUs received with STBC */
  5693. A_UINT32 ul_mumimo_rx_stbc;
  5694. /** Number of times UL MUMIMO TB PPDUs received with LDPC */
  5695. A_UINT32 ul_mumimo_rx_ldpc;
  5696. /* Stats for MCS 12/13 */
  5697. A_UINT32 ul_mumimo_rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5698. A_UINT32 ul_mumimo_rx_gi_ext[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5699. /** RSSI in dBm for Rx TB PPDUs */
  5700. A_INT8 rx_ul_mumimo_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_TOTAL_BW_COUNTERS];
  5701. /** Target RSSI programmed in UL MUMIMO triggers (units dBm) */
  5702. A_INT8 rx_ul_mumimo_target_rssi[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5703. /** FD RSSI measured for Rx UL TB PPDUs (units dBm) */
  5704. A_INT8 rx_ul_mumimo_fd_rssi[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5705. /** Average pilot EVM measued for RX UL TB PPDU */
  5706. A_INT8 rx_ulmumimo_pilot_evm_dB_mean[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5707. A_UINT32 reduced_ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5708. /*
  5709. * Number of HE UL MU-MIMO per-user responses containing only a QoS null in
  5710. * response to basic trigger. Typically a data response is expected.
  5711. */
  5712. A_UINT32 ul_mumimo_basic_trigger_rx_qos_null_only;
  5713. } htt_stats_rx_pdev_ul_mumimo_trig_stats_tlv;
  5714. /* preserve old name alias for new name consistent with the tag name */
  5715. typedef htt_stats_rx_pdev_ul_mumimo_trig_stats_tlv
  5716. htt_rx_pdev_ul_mumimo_trig_stats_tlv;
  5717. typedef struct {
  5718. htt_tlv_hdr_t tlv_hdr;
  5719. /**
  5720. * BIT [7:0] :- mac_id
  5721. * BIT [31:8] :- reserved
  5722. *
  5723. * Refer to HTT_STATS_CMN_MAC_ID_GET/SET macros.
  5724. */
  5725. A_UINT32 mac_id__word;
  5726. /** Number of times UL MUMIMO RX packets received */
  5727. A_UINT32 rx_11be_ul_mumimo;
  5728. /** 11BE EHT UL MU-MIMO RX TB PPDU MCS stats */
  5729. A_UINT32 be_ul_mumimo_rx_mcs[HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5730. /**
  5731. * 11BE EHT UL MU-MIMO RX GI & LTF stats.
  5732. * Index 0 indicates 1xLTF + 1.6 msec GI
  5733. * Index 1 indicates 2xLTF + 1.6 msec GI
  5734. * Index 2 indicates 4xLTF + 3.2 msec GI
  5735. */
  5736. A_UINT32 be_ul_mumimo_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5737. /**
  5738. * 11BE EHT UL MU-MIMO RX TB PPDU NSS stats
  5739. * (Increments the individual user NSS in the UL MU MIMO PPDU received)
  5740. */
  5741. A_UINT32 be_ul_mumimo_rx_nss[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5742. /** 11BE EHT UL MU-MIMO RX TB PPDU BW stats */
  5743. A_UINT32 be_ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5744. /** Number of times UL MUMIMO TB PPDUs received with STBC */
  5745. A_UINT32 be_ul_mumimo_rx_stbc;
  5746. /** Number of times UL MUMIMO TB PPDUs received with LDPC */
  5747. A_UINT32 be_ul_mumimo_rx_ldpc;
  5748. /** RSSI in dBm for Rx TB PPDUs */
  5749. A_INT8 be_rx_ul_mumimo_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5750. /** Target RSSI programmed in UL MUMIMO triggers (units dBm) */
  5751. A_INT8 be_rx_ul_mumimo_target_rssi[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER][HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5752. /** FD RSSI measured for Rx UL TB PPDUs (units dBm) */
  5753. A_INT8 be_rx_ul_mumimo_fd_rssi[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5754. /** Average pilot EVM measued for RX UL TB PPDU */
  5755. A_INT8 be_rx_ulmumimo_pilot_evm_dB_mean[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5756. /** Number of times UL MUMIMO TB PPDUs received in a punctured mode */
  5757. A_UINT32 rx_ul_mumimo_punctured_mode[HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  5758. /*
  5759. * Number of EHT UL MU-MIMO per-user responses containing only a QoS null
  5760. * in response to basic trigger. Typically a data response is expected.
  5761. */
  5762. A_UINT32 be_ul_mumimo_basic_trigger_rx_qos_null_only;
  5763. } htt_stats_rx_pdev_ul_mumimo_trig_be_stats_tlv;
  5764. /* preserve old name alias for new name consistent with the tag name */
  5765. typedef htt_stats_rx_pdev_ul_mumimo_trig_be_stats_tlv
  5766. htt_rx_pdev_ul_mumimo_trig_be_stats_tlv;
  5767. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS
  5768. * TLV_TAGS:
  5769. * - HTT_STATS_RX_PDEV_UL_MUMIMO_TRIG_STATS_TAG
  5770. * - HTT_STATS_RX_PDEV_UL_MUMIMO_TRIG_BE_STATS_TAG
  5771. */
  5772. #ifdef ATH_TARGET
  5773. typedef struct {
  5774. htt_stats_rx_pdev_ul_mumimo_trig_stats_tlv ul_mumimo_trig_tlv;
  5775. htt_stats_rx_pdev_ul_mumimo_trig_be_stats_tlv ul_mumimo_trig_be_tlv;
  5776. } htt_rx_pdev_ul_mumimo_trig_stats_t;
  5777. #endif /* ATH_TARGET */
  5778. typedef struct {
  5779. htt_tlv_hdr_t tlv_hdr;
  5780. /** Num Packets received on REO FW ring */
  5781. A_UINT32 fw_reo_ring_data_msdu;
  5782. /** Num bc/mc packets indicated from fw to host */
  5783. A_UINT32 fw_to_host_data_msdu_bcmc;
  5784. /** Num unicast packets indicated from fw to host */
  5785. A_UINT32 fw_to_host_data_msdu_uc;
  5786. /** Num remote buf recycle from offload */
  5787. A_UINT32 ofld_remote_data_buf_recycle_cnt;
  5788. /** Num remote free buf given to offload */
  5789. A_UINT32 ofld_remote_free_buf_indication_cnt;
  5790. /** Num unicast packets from local path indicated to host */
  5791. A_UINT32 ofld_buf_to_host_data_msdu_uc;
  5792. /** Num unicast packets from REO indicated to host */
  5793. A_UINT32 reo_fw_ring_to_host_data_msdu_uc;
  5794. /** Num Packets received from WBM SW1 ring */
  5795. A_UINT32 wbm_sw_ring_reap;
  5796. /** Num packets from WBM forwarded from fw to host via WBM */
  5797. A_UINT32 wbm_forward_to_host_cnt;
  5798. /** Num packets from WBM recycled to target refill ring */
  5799. A_UINT32 wbm_target_recycle_cnt;
  5800. /**
  5801. * Total Num of recycled to refill ring,
  5802. * including packets from WBM and REO
  5803. */
  5804. A_UINT32 target_refill_ring_recycle_cnt;
  5805. } htt_stats_rx_soc_fw_stats_tlv;
  5806. /* preserve old name alias for new name consistent with the tag name */
  5807. typedef htt_stats_rx_soc_fw_stats_tlv htt_rx_soc_fw_stats_tlv;
  5808. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  5809. /* NOTE: Variable length TLV, use length spec to infer array size */
  5810. typedef struct {
  5811. htt_tlv_hdr_t tlv_hdr;
  5812. /** refill_ring_empty_cnt:
  5813. * Num ring empty encountered,
  5814. * HTT_RX_STATS_REFILL_MAX_RING
  5815. */
  5816. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, refill_ring_empty_cnt);
  5817. } htt_stats_rx_soc_fw_refill_ring_empty_tlv;
  5818. /* preserve old name alias for new name consistent with the tag name */
  5819. typedef htt_stats_rx_soc_fw_refill_ring_empty_tlv
  5820. htt_rx_soc_fw_refill_ring_empty_tlv_v;
  5821. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  5822. /* NOTE: Variable length TLV, use length spec to infer array size */
  5823. typedef struct {
  5824. htt_tlv_hdr_t tlv_hdr;
  5825. /** refill_ring_num_refill:
  5826. * Num total buf refilled from refill ring,
  5827. * HTT_RX_STATS_REFILL_MAX_RING
  5828. */
  5829. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, refill_ring_num_refill);
  5830. } htt_stats_rx_soc_fw_refill_ring_num_refill_tlv;
  5831. /* preserve old name alias for new name consistent with the tag name */
  5832. typedef htt_stats_rx_soc_fw_refill_ring_num_refill_tlv
  5833. htt_rx_soc_fw_refill_ring_num_refill_tlv_v;
  5834. /* RXDMA error code from WBM released packets */
  5835. typedef enum {
  5836. HTT_RX_RXDMA_OVERFLOW_ERR = 0,
  5837. HTT_RX_RXDMA_MPDU_LENGTH_ERR = 1,
  5838. HTT_RX_RXDMA_FCS_ERR = 2,
  5839. HTT_RX_RXDMA_DECRYPT_ERR = 3,
  5840. HTT_RX_RXDMA_TKIP_MIC_ERR = 4,
  5841. HTT_RX_RXDMA_UNECRYPTED_ERR = 5,
  5842. HTT_RX_RXDMA_MSDU_LEN_ERR = 6,
  5843. HTT_RX_RXDMA_MSDU_LIMIT_ERR = 7,
  5844. HTT_RX_RXDMA_WIFI_PARSE_ERR = 8,
  5845. HTT_RX_RXDMA_AMSDU_PARSE_ERR = 9,
  5846. HTT_RX_RXDMA_SA_TIMEOUT_ERR = 10,
  5847. HTT_RX_RXDMA_DA_TIMEOUT_ERR = 11,
  5848. HTT_RX_RXDMA_FLOW_TIMEOUT_ERR = 12,
  5849. HTT_RX_RXDMA_FLUSH_REQUEST = 13,
  5850. HTT_RX_RXDMA_ERR_CODE_RVSD0 = 14,
  5851. HTT_RX_RXDMA_ERR_CODE_RVSD1 = 15,
  5852. /*
  5853. * This MAX_ERR_CODE should not be used in any host/target messages,
  5854. * so that even though it is defined within a host/target interface
  5855. * definition header file, it isn't actually part of the host/target
  5856. * interface, and thus can be modified.
  5857. */
  5858. HTT_RX_RXDMA_MAX_ERR_CODE
  5859. } htt_rx_rxdma_error_code_enum;
  5860. /* NOTE: Variable length TLV, use length spec to infer array size */
  5861. typedef struct {
  5862. htt_tlv_hdr_t tlv_hdr;
  5863. /** NOTE:
  5864. * The mapping of RXDMA error types to rxdma_err array elements is HW dependent.
  5865. * It is expected but not required that the target will provide a rxdma_err element
  5866. * for each of the htt_rx_rxdma_error_code_enum values, up to but not including
  5867. * MAX_ERR_CODE. The host should ignore any array elements whose
  5868. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  5869. *
  5870. * HTT_RX_RXDMA_MAX_ERR_CODE
  5871. */
  5872. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, rxdma_err);
  5873. } htt_stats_rx_refill_rxdma_err_tlv;
  5874. /* preserve old name alias for new name consistent with the tag name */
  5875. typedef htt_stats_rx_refill_rxdma_err_tlv
  5876. htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v;
  5877. /* REO error code from WBM released packets */
  5878. typedef enum {
  5879. HTT_RX_REO_QUEUE_DESC_ADDR_ZERO = 0,
  5880. HTT_RX_REO_QUEUE_DESC_NOT_VALID = 1,
  5881. HTT_RX_AMPDU_IN_NON_BA = 2,
  5882. HTT_RX_NON_BA_DUPLICATE = 3,
  5883. HTT_RX_BA_DUPLICATE = 4,
  5884. HTT_RX_REGULAR_FRAME_2K_JUMP = 5,
  5885. HTT_RX_BAR_FRAME_2K_JUMP = 6,
  5886. HTT_RX_REGULAR_FRAME_OOR = 7,
  5887. HTT_RX_BAR_FRAME_OOR = 8,
  5888. HTT_RX_BAR_FRAME_NO_BA_SESSION = 9,
  5889. HTT_RX_BAR_FRAME_SN_EQUALS_SSN = 10,
  5890. HTT_RX_PN_CHECK_FAILED = 11,
  5891. HTT_RX_2K_ERROR_HANDLING_FLAG_SET = 12,
  5892. HTT_RX_PN_ERROR_HANDLING_FLAG_SET = 13,
  5893. HTT_RX_QUEUE_DESCRIPTOR_BLOCKED_SET = 14,
  5894. HTT_RX_REO_ERR_CODE_RVSD = 15,
  5895. /*
  5896. * This MAX_ERR_CODE should not be used in any host/target messages,
  5897. * so that even though it is defined within a host/target interface
  5898. * definition header file, it isn't actually part of the host/target
  5899. * interface, and thus can be modified.
  5900. */
  5901. HTT_RX_REO_MAX_ERR_CODE
  5902. } htt_rx_reo_error_code_enum;
  5903. /* NOTE: Variable length TLV, use length spec to infer array size */
  5904. typedef struct {
  5905. htt_tlv_hdr_t tlv_hdr;
  5906. /** NOTE:
  5907. * The mapping of REO error types to reo_err array elements is HW dependent.
  5908. * It is expected but not required that the target will provide a rxdma_err element
  5909. * for each of the htt_rx_reo_error_code_enum values, up to but not including
  5910. * MAX_ERR_CODE. The host should ignore any array elements whose
  5911. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  5912. *
  5913. * HTT_RX_REO_MAX_ERR_CODE
  5914. */
  5915. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, reo_err);
  5916. } htt_stats_rx_refill_reo_err_tlv;
  5917. /* preserve old name alias for new name consistent with the tag name */
  5918. typedef htt_stats_rx_refill_reo_err_tlv
  5919. htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v;
  5920. /* NOTE:
  5921. * This structure is for documentation, and cannot be safely used directly.
  5922. * Instead, use the constituent TLV structures to fill/parse.
  5923. */
  5924. #ifdef ATH_TARGET
  5925. typedef struct {
  5926. htt_stats_rx_soc_fw_stats_tlv fw_tlv;
  5927. htt_stats_rx_soc_fw_refill_ring_empty_tlv fw_refill_ring_empty_tlv;
  5928. htt_stats_rx_soc_fw_refill_ring_num_refill_tlv
  5929. fw_refill_ring_num_refill_tlv;
  5930. htt_stats_rx_refill_rxdma_err_tlv fw_refill_ring_num_rxdma_err_tlv;
  5931. htt_stats_rx_refill_reo_err_tlv fw_refill_ring_num_reo_err_tlv;
  5932. } htt_rx_soc_stats_t;
  5933. #endif /* ATH_TARGET */
  5934. /* == RX PDEV STATS == */
  5935. #define HTT_RX_PDEV_FW_STATS_MAC_ID_M 0x000000ff
  5936. #define HTT_RX_PDEV_FW_STATS_MAC_ID_S 0
  5937. #define HTT_RX_PDEV_FW_STATS_MAC_ID_GET(_var) \
  5938. (((_var) & HTT_RX_PDEV_FW_STATS_MAC_ID_M) >> \
  5939. HTT_RX_PDEV_FW_STATS_MAC_ID_S)
  5940. #define HTT_RX_PDEV_FW_STATS_MAC_ID_SET(_var, _val) \
  5941. do { \
  5942. HTT_CHECK_SET_VAL(HTT_RX_PDEV_FW_STATS_MAC_ID, _val); \
  5943. ((_var) |= ((_val) << HTT_RX_PDEV_FW_STATS_MAC_ID_S)); \
  5944. } while (0)
  5945. typedef struct {
  5946. htt_tlv_hdr_t tlv_hdr;
  5947. /**
  5948. * BIT [ 7 : 0] :- mac_id
  5949. * BIT [31 : 8] :- reserved
  5950. */
  5951. A_UINT32 mac_id__word;
  5952. /** Num PPDU status processed from HW */
  5953. A_UINT32 ppdu_recvd;
  5954. /** Num MPDU across PPDUs with FCS ok */
  5955. A_UINT32 mpdu_cnt_fcs_ok;
  5956. /** Num MPDU across PPDUs with FCS err */
  5957. A_UINT32 mpdu_cnt_fcs_err;
  5958. /** Num MSDU across PPDUs */
  5959. A_UINT32 tcp_msdu_cnt;
  5960. /** Num MSDU across PPDUs */
  5961. A_UINT32 tcp_ack_msdu_cnt;
  5962. /** Num MSDU across PPDUs */
  5963. A_UINT32 udp_msdu_cnt;
  5964. /** Num MSDU across PPDUs */
  5965. A_UINT32 other_msdu_cnt;
  5966. /** Num MPDU on FW ring indicated */
  5967. A_UINT32 fw_ring_mpdu_ind;
  5968. /** Num MGMT MPDU given to protocol */
  5969. A_UINT32 fw_ring_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  5970. /** Num ctrl MPDU given to protocol */
  5971. A_UINT32 fw_ring_ctrl_subtype[HTT_STATS_SUBTYPE_MAX];
  5972. /** Num mcast data packet received */
  5973. A_UINT32 fw_ring_mcast_data_msdu;
  5974. /** Num broadcast data packet received */
  5975. A_UINT32 fw_ring_bcast_data_msdu;
  5976. /** Num unicast data packet received */
  5977. A_UINT32 fw_ring_ucast_data_msdu;
  5978. /** Num null data packet received */
  5979. A_UINT32 fw_ring_null_data_msdu;
  5980. /** Num MPDU on FW ring dropped */
  5981. A_UINT32 fw_ring_mpdu_drop;
  5982. /** Num buf indication to offload */
  5983. A_UINT32 ofld_local_data_ind_cnt;
  5984. /** Num buf recycle from offload */
  5985. A_UINT32 ofld_local_data_buf_recycle_cnt;
  5986. /** Num buf indication to data_rx */
  5987. A_UINT32 drx_local_data_ind_cnt;
  5988. /** Num buf recycle from data_rx */
  5989. A_UINT32 drx_local_data_buf_recycle_cnt;
  5990. /** Num buf indication to protocol */
  5991. A_UINT32 local_nondata_ind_cnt;
  5992. /** Num buf recycle from protocol */
  5993. A_UINT32 local_nondata_buf_recycle_cnt;
  5994. /** Num buf fed */
  5995. A_UINT32 fw_status_buf_ring_refill_cnt;
  5996. /** Num ring empty encountered */
  5997. A_UINT32 fw_status_buf_ring_empty_cnt;
  5998. /** Num buf fed */
  5999. A_UINT32 fw_pkt_buf_ring_refill_cnt;
  6000. /** Num ring empty encountered */
  6001. A_UINT32 fw_pkt_buf_ring_empty_cnt;
  6002. /** Num buf fed */
  6003. A_UINT32 fw_link_buf_ring_refill_cnt;
  6004. /** Num ring empty encountered */
  6005. A_UINT32 fw_link_buf_ring_empty_cnt;
  6006. /** Num buf fed */
  6007. A_UINT32 host_pkt_buf_ring_refill_cnt;
  6008. /** Num ring empty encountered */
  6009. A_UINT32 host_pkt_buf_ring_empty_cnt;
  6010. /** Num buf fed */
  6011. A_UINT32 mon_pkt_buf_ring_refill_cnt;
  6012. /** Num ring empty encountered */
  6013. A_UINT32 mon_pkt_buf_ring_empty_cnt;
  6014. /** Num buf fed */
  6015. A_UINT32 mon_status_buf_ring_refill_cnt;
  6016. /** Num ring empty encountered */
  6017. A_UINT32 mon_status_buf_ring_empty_cnt;
  6018. /** Num buf fed */
  6019. A_UINT32 mon_desc_buf_ring_refill_cnt;
  6020. /** Num ring empty encountered */
  6021. A_UINT32 mon_desc_buf_ring_empty_cnt;
  6022. /** Num buf fed */
  6023. A_UINT32 mon_dest_ring_update_cnt;
  6024. /** Num ring full encountered */
  6025. A_UINT32 mon_dest_ring_full_cnt;
  6026. /** Num rx suspend is attempted */
  6027. A_UINT32 rx_suspend_cnt;
  6028. /** Num rx suspend failed */
  6029. A_UINT32 rx_suspend_fail_cnt;
  6030. /** Num rx resume attempted */
  6031. A_UINT32 rx_resume_cnt;
  6032. /** Num rx resume failed */
  6033. A_UINT32 rx_resume_fail_cnt;
  6034. /** Num rx ring switch */
  6035. A_UINT32 rx_ring_switch_cnt;
  6036. /** Num rx ring restore */
  6037. A_UINT32 rx_ring_restore_cnt;
  6038. /** Num rx flush issued */
  6039. A_UINT32 rx_flush_cnt;
  6040. /** Num rx recovery */
  6041. A_UINT32 rx_recovery_reset_cnt;
  6042. } htt_stats_rx_pdev_fw_stats_tlv;
  6043. /* preserve old name alias for new name consistent with the tag name */
  6044. typedef htt_stats_rx_pdev_fw_stats_tlv htt_rx_pdev_fw_stats_tlv;
  6045. typedef struct {
  6046. htt_tlv_hdr_t tlv_hdr;
  6047. /** peer mac address */
  6048. htt_mac_addr peer_mac_addr;
  6049. /** Num of tx mgmt frames with subtype on peer level */
  6050. A_UINT32 peer_tx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  6051. /** Num of rx mgmt frames with subtype on peer level */
  6052. A_UINT32 peer_rx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  6053. } htt_stats_peer_ctrl_path_txrx_stats_tlv;
  6054. /* preserve old name alias for new name consistent with the tag name */
  6055. typedef htt_stats_peer_ctrl_path_txrx_stats_tlv
  6056. htt_peer_ctrl_path_txrx_stats_tlv;
  6057. #define HTT_STATS_PHY_ERR_MAX 43
  6058. typedef struct {
  6059. htt_tlv_hdr_t tlv_hdr;
  6060. /**
  6061. * BIT [ 7 : 0] :- mac_id
  6062. * BIT [31 : 8] :- reserved
  6063. */
  6064. A_UINT32 mac_id__word;
  6065. /** Num of phy err */
  6066. A_UINT32 total_phy_err_cnt;
  6067. /** Counts of different types of phy errs
  6068. * The mapping of PHY error types to phy_err array elements is HW dependent.
  6069. * The only currently-supported mapping is shown below:
  6070. *
  6071. * 0 phyrx_err_phy_off Reception aborted due to receiving a PHY_OFF TLV
  6072. * 1 phyrx_err_synth_off
  6073. * 2 phyrx_err_ofdma_timing
  6074. * 3 phyrx_err_ofdma_signal_parity
  6075. * 4 phyrx_err_ofdma_rate_illegal
  6076. * 5 phyrx_err_ofdma_length_illegal
  6077. * 6 phyrx_err_ofdma_restart
  6078. * 7 phyrx_err_ofdma_service
  6079. * 8 phyrx_err_ppdu_ofdma_power_drop
  6080. * 9 phyrx_err_cck_blokker
  6081. * 10 phyrx_err_cck_timing
  6082. * 11 phyrx_err_cck_header_crc
  6083. * 12 phyrx_err_cck_rate_illegal
  6084. * 13 phyrx_err_cck_length_illegal
  6085. * 14 phyrx_err_cck_restart
  6086. * 15 phyrx_err_cck_service
  6087. * 16 phyrx_err_cck_power_drop
  6088. * 17 phyrx_err_ht_crc_err
  6089. * 18 phyrx_err_ht_length_illegal
  6090. * 19 phyrx_err_ht_rate_illegal
  6091. * 20 phyrx_err_ht_zlf
  6092. * 21 phyrx_err_false_radar_ext
  6093. * 22 phyrx_err_green_field
  6094. * 23 phyrx_err_bw_gt_dyn_bw
  6095. * 24 phyrx_err_leg_ht_mismatch
  6096. * 25 phyrx_err_vht_crc_error
  6097. * 26 phyrx_err_vht_siga_unsupported
  6098. * 27 phyrx_err_vht_lsig_len_invalid
  6099. * 28 phyrx_err_vht_ndp_or_zlf
  6100. * 29 phyrx_err_vht_nsym_lt_zero
  6101. * 30 phyrx_err_vht_rx_extra_symbol_mismatch
  6102. * 31 phyrx_err_vht_rx_skip_group_id0
  6103. * 32 phyrx_err_vht_rx_skip_group_id1to62
  6104. * 33 phyrx_err_vht_rx_skip_group_id63
  6105. * 34 phyrx_err_ofdm_ldpc_decoder_disabled
  6106. * 35 phyrx_err_defer_nap
  6107. * 36 phyrx_err_fdomain_timeout
  6108. * 37 phyrx_err_lsig_rel_check
  6109. * 38 phyrx_err_bt_collision
  6110. * 39 phyrx_err_unsupported_mu_feedback
  6111. * 40 phyrx_err_ppdu_tx_interrupt_rx
  6112. * 41 phyrx_err_unsupported_cbf
  6113. * 42 phyrx_err_other
  6114. */
  6115. A_UINT32 phy_err[HTT_STATS_PHY_ERR_MAX];
  6116. } htt_stats_rx_pdev_fw_stats_phy_err_tlv;
  6117. /* preserve old name alias for new name consistent with the tag name */
  6118. typedef htt_stats_rx_pdev_fw_stats_phy_err_tlv htt_rx_pdev_fw_stats_phy_err_tlv;
  6119. #define HTT_RX_PDEV_FW_RING_MPDU_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  6120. /* NOTE: Variable length TLV, use length spec to infer array size */
  6121. typedef struct {
  6122. htt_tlv_hdr_t tlv_hdr;
  6123. /** fw_ring_mpdu_err:
  6124. * Num error MPDU for each RxDMA error type,
  6125. * HTT_RX_STATS_RXDMA_MAX_ERR
  6126. */
  6127. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, fw_ring_mpdu_err);
  6128. } htt_stats_rx_pdev_fw_ring_mpdu_err_tlv;
  6129. /* preserve old name alias for new name consistent with the tag name */
  6130. typedef htt_stats_rx_pdev_fw_ring_mpdu_err_tlv
  6131. htt_rx_pdev_fw_ring_mpdu_err_tlv_v;
  6132. #define HTT_RX_PDEV_FW_MPDU_DROP_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  6133. /* NOTE: Variable length TLV, use length spec to infer array size */
  6134. typedef struct {
  6135. htt_tlv_hdr_t tlv_hdr;
  6136. /** fw_mpdu_drop:
  6137. * Num MPDU dropped,
  6138. * HTT_RX_STATS_FW_DROP_REASON_MAX
  6139. */
  6140. HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, fw_mpdu_drop);
  6141. } htt_stats_rx_pdev_fw_mpdu_drop_tlv;
  6142. /* preserve old name alias for new name consistent with the tag name */
  6143. typedef htt_stats_rx_pdev_fw_mpdu_drop_tlv htt_rx_pdev_fw_mpdu_drop_tlv_v;
  6144. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX
  6145. * TLV_TAGS:
  6146. * - HTT_STATS_RX_SOC_FW_STATS_TAG (head TLV in soc_stats)
  6147. * - HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG (inside soc_stats)
  6148. * - HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG (inside soc_stats)
  6149. * - HTT_STATS_RX_PDEV_FW_STATS_TAG
  6150. * - HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG
  6151. * - HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG
  6152. */
  6153. /* NOTE:
  6154. * This structure is for documentation, and cannot be safely used directly.
  6155. * Instead, use the constituent TLV structures to fill/parse.
  6156. */
  6157. #ifdef ATH_TARGET
  6158. typedef struct {
  6159. htt_rx_soc_stats_t soc_stats;
  6160. htt_stats_rx_pdev_fw_stats_tlv fw_stats_tlv;
  6161. htt_stats_rx_pdev_fw_ring_mpdu_err_tlv fw_ring_mpdu_err_tlv;
  6162. htt_stats_rx_pdev_fw_mpdu_drop_tlv fw_ring_mpdu_drop;
  6163. htt_stats_rx_pdev_fw_stats_phy_err_tlv fw_stats_phy_err_tlv;
  6164. } htt_rx_pdev_stats_t;
  6165. #endif /* ATH_TARGET */
  6166. /* STATS_TYPE : HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS
  6167. * TLV_TAGS:
  6168. * - HTT_STATS_PEER_CTRL_PATH_TXRX_STATS_TAG
  6169. *
  6170. */
  6171. #ifdef ATH_TARGET
  6172. typedef struct {
  6173. htt_stats_peer_ctrl_path_txrx_stats_tlv peer_ctrl_path_txrx_stats_tlv;
  6174. } htt_ctrl_path_txrx_stats_t;
  6175. #endif /* ATH_TARGET */
  6176. #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT (0x1)
  6177. #define HTT_PDEV_CCA_STATS_RX_FRAME_INFO_PRESENT (0x2)
  6178. #define HTT_PDEV_CCA_STATS_RX_CLEAR_INFO_PRESENT (0x4)
  6179. #define HTT_PDEV_CCA_STATS_MY_RX_FRAME_INFO_PRESENT (0x8)
  6180. #define HTT_PDEV_CCA_STATS_USEC_CNT_INFO_PRESENT (0x10)
  6181. #define HTT_PDEV_CCA_STATS_MED_RX_IDLE_INFO_PRESENT (0x20)
  6182. #define HTT_PDEV_CCA_STATS_MED_TX_IDLE_GLOBAL_INFO_PRESENT (0x40)
  6183. #define HTT_PDEV_CCA_STATS_CCA_OBBS_USEC_INFO_PRESENT (0x80)
  6184. typedef struct {
  6185. htt_tlv_hdr_t tlv_hdr;
  6186. /* Below values are obtained from the HW Cycles counter registers */
  6187. A_UINT32 tx_frame_usec;
  6188. A_UINT32 rx_frame_usec;
  6189. A_UINT32 rx_clear_usec;
  6190. A_UINT32 my_rx_frame_usec;
  6191. A_UINT32 usec_cnt;
  6192. A_UINT32 med_rx_idle_usec;
  6193. A_UINT32 med_tx_idle_global_usec;
  6194. A_UINT32 cca_obss_usec;
  6195. A_UINT32 pre_rx_frame_usec;
  6196. } htt_stats_pdev_cca_counters_tlv;
  6197. /* preserve old name alias for new name consistent with the tag name */
  6198. typedef htt_stats_pdev_cca_counters_tlv htt_pdev_stats_cca_counters_tlv;
  6199. /* NOTE: THIS htt_pdev_cca_stats_hist_tlv STRUCTURE IS DEPRECATED,
  6200. * due to lack of support in some host stats infrastructures for
  6201. * TLVs nested within TLVs.
  6202. */
  6203. typedef struct {
  6204. htt_tlv_hdr_t tlv_hdr;
  6205. /** The channel number on which these stats were collected */
  6206. A_UINT32 chan_num;
  6207. /** num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  6208. A_UINT32 num_records;
  6209. /**
  6210. * Bit map of valid CCA counters
  6211. * Bit0 - tx_frame_usec
  6212. * Bit1 - rx_frame_usec
  6213. * Bit2 - rx_clear_usec
  6214. * Bit3 - my_rx_frame_usec
  6215. * bit4 - usec_cnt
  6216. * Bit5 - med_rx_idle_usec
  6217. * Bit6 - med_tx_idle_global_usec
  6218. * Bit7 - cca_obss_usec
  6219. *
  6220. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  6221. */
  6222. A_UINT32 valid_cca_counters_bitmap;
  6223. /** Indicates the stats collection interval
  6224. * Valid Values:
  6225. * 100 - For the 100ms interval CCA stats histogram
  6226. * 1000 - For 1sec interval CCA histogram
  6227. * 0xFFFFFFFF - For Cumulative CCA Stats
  6228. */
  6229. A_UINT32 collection_interval;
  6230. /**
  6231. * This will be followed by an array which contains the CCA stats
  6232. * collected in the last N intervals,
  6233. * if the indication is for last N intervals CCA stats.
  6234. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  6235. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  6236. */
  6237. HTT_STATS_VAR_LEN_ARRAY1(htt_stats_pdev_cca_counters_tlv, cca_hist_tlv);
  6238. } htt_pdev_cca_stats_hist_tlv;
  6239. typedef struct {
  6240. htt_tlv_hdr_t tlv_hdr;
  6241. /** The channel number on which these stats were collected */
  6242. A_UINT32 chan_num;
  6243. /** num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  6244. A_UINT32 num_records;
  6245. /**
  6246. * Bit map of valid CCA counters
  6247. * Bit0 - tx_frame_usec
  6248. * Bit1 - rx_frame_usec
  6249. * Bit2 - rx_clear_usec
  6250. * Bit3 - my_rx_frame_usec
  6251. * bit4 - usec_cnt
  6252. * Bit5 - med_rx_idle_usec
  6253. * Bit6 - med_tx_idle_global_usec
  6254. * Bit7 - cca_obss_usec
  6255. *
  6256. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  6257. */
  6258. A_UINT32 valid_cca_counters_bitmap;
  6259. /** Indicates the stats collection interval
  6260. * Valid Values:
  6261. * 100 - For the 100ms interval CCA stats histogram
  6262. * 1000 - For 1sec interval CCA histogram
  6263. * 0xFFFFFFFF - For Cumulative CCA Stats
  6264. */
  6265. A_UINT32 collection_interval;
  6266. /**
  6267. * This will be followed by an array which contains the CCA stats
  6268. * collected in the last N intervals,
  6269. * if the indication is for last N intervals CCA stats.
  6270. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  6271. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  6272. * htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  6273. */
  6274. } htt_pdev_cca_stats_hist_v1_tlv;
  6275. #define HTT_TWT_SESSION_FLAG_FLOW_ID_M 0x0000000f
  6276. #define HTT_TWT_SESSION_FLAG_FLOW_ID_S 0
  6277. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_M 0x0000fff0
  6278. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_S 4
  6279. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_M 0x00010000
  6280. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_S 16
  6281. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M 0x00020000
  6282. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S 17
  6283. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M 0x00040000
  6284. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S 18
  6285. #define HTT_TWT_SESSION_FLAG_FLOW_ID_GET(_var) \
  6286. (((_var) & HTT_TWT_SESSION_FLAG_FLOW_ID_M) >> \
  6287. HTT_TWT_SESSION_FLAG_FLOW_ID_S)
  6288. #define HTT_TWT_SESSION_FLAG_FLOW_ID_SET(_var, _val) \
  6289. do { \
  6290. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_FLOW_ID, _val); \
  6291. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_FLOW_ID_S)); \
  6292. } while (0)
  6293. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_GET(_var) \
  6294. (((_var) & HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_M) >> \
  6295. HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_S)
  6296. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_SET(_var, _val) \
  6297. do { \
  6298. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT, _val); \
  6299. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_S)); \
  6300. } while (0)
  6301. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_GET(_var) \
  6302. (((_var) & HTT_TWT_SESSION_FLAG_BCAST_TWT_M) >> \
  6303. HTT_TWT_SESSION_FLAG_BCAST_TWT_S)
  6304. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_SET(_var, _val) \
  6305. do { \
  6306. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BCAST_TWT, _val); \
  6307. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BCAST_TWT_S)); \
  6308. } while (0)
  6309. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_GET(_var) \
  6310. (((_var) & HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M) >> \
  6311. HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)
  6312. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_SET(_var, _val) \
  6313. do { \
  6314. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_TRIGGER_TWT, _val); \
  6315. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)); \
  6316. } while (0)
  6317. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_GET(_var) \
  6318. (((_var) & HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M) >> \
  6319. HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)
  6320. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_SET(_var, _val) \
  6321. do { \
  6322. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_ANNOUN_TWT, _val); \
  6323. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)); \
  6324. } while (0)
  6325. #define TWT_DIALOG_ID_UNAVAILABLE 0xFFFFFFFF
  6326. typedef struct {
  6327. htt_tlv_hdr_t tlv_hdr;
  6328. A_UINT32 vdev_id;
  6329. htt_mac_addr peer_mac;
  6330. A_UINT32 flow_id_flags;
  6331. /**
  6332. * TWT_DIALOG_ID_UNAVAILABLE is used when TWT session is
  6333. * not initiated by host
  6334. */
  6335. A_UINT32 dialog_id;
  6336. A_UINT32 wake_dura_us;
  6337. A_UINT32 wake_intvl_us;
  6338. A_UINT32 sp_offset_us;
  6339. } htt_stats_pdev_twt_session_tlv;
  6340. /* preserve old name alias for new name consistent with the tag name */
  6341. typedef htt_stats_pdev_twt_session_tlv htt_pdev_stats_twt_session_tlv;
  6342. typedef struct {
  6343. htt_tlv_hdr_t tlv_hdr;
  6344. A_UINT32 pdev_id;
  6345. A_UINT32 num_sessions;
  6346. HTT_STATS_VAR_LEN_ARRAY1(htt_stats_pdev_twt_session_tlv, twt_session);
  6347. } htt_stats_pdev_twt_sessions_tlv;
  6348. /* preserve old name alias for new name consistent with the tag name */
  6349. typedef htt_stats_pdev_twt_sessions_tlv htt_pdev_stats_twt_sessions_tlv;
  6350. /* STATS_TYPE: HTT_DBG_EXT_STATS_TWT_SESSIONS
  6351. * TLV_TAGS:
  6352. * - HTT_STATS_PDEV_TWT_SESSIONS_TAG
  6353. * - HTT_STATS_PDEV_TWT_SESSION_TAG
  6354. */
  6355. /* NOTE:
  6356. * This structure is for documentation, and cannot be safely used directly.
  6357. * Instead, use the constituent TLV structures to fill/parse.
  6358. */
  6359. #ifdef ATH_TARGET
  6360. typedef struct {
  6361. htt_stats_pdev_twt_session_tlv twt_sessions[1];
  6362. } htt_pdev_twt_sessions_stats_t;
  6363. #endif /* ATH_TARGET */
  6364. typedef enum {
  6365. /* Global link descriptor queued in REO */
  6366. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_0 = 0,
  6367. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_1 = 1,
  6368. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_2 = 2,
  6369. /*Number of queue descriptors of this aging group */
  6370. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC0 = 3,
  6371. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC1 = 4,
  6372. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC2 = 5,
  6373. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC3 = 6,
  6374. /* Total number of MSDUs buffered in AC */
  6375. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC0 = 7,
  6376. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC1 = 8,
  6377. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC2 = 9,
  6378. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC3 = 10,
  6379. HTT_RX_REO_RESOURCE_STATS_MAX = 16
  6380. } htt_rx_reo_resource_sample_id_enum;
  6381. typedef struct {
  6382. htt_tlv_hdr_t tlv_hdr;
  6383. /* Variable based on the Number of records. HTT_RX_REO_RESOURCE_STATS_MAX */
  6384. /** htt_rx_reo_debug_sample_id_enum */
  6385. A_UINT32 sample_id;
  6386. /** Max value of all samples */
  6387. A_UINT32 total_max;
  6388. /** Average value of total samples */
  6389. A_UINT32 total_avg;
  6390. /** Num of samples including both zeros and non zeros ones*/
  6391. A_UINT32 total_sample;
  6392. /** Average value of all non zeros samples */
  6393. A_UINT32 non_zeros_avg;
  6394. /** Num of non zeros samples */
  6395. A_UINT32 non_zeros_sample;
  6396. /** Max value of last N non zero samples (N = last_non_zeros_sample) */
  6397. A_UINT32 last_non_zeros_max;
  6398. /** Min value of last N non zero samples (N = last_non_zeros_sample) */
  6399. A_UINT32 last_non_zeros_min;
  6400. /** Average value of last N non zero samples (N = last_non_zeros_sample) */
  6401. A_UINT32 last_non_zeros_avg;
  6402. /** Num of last non zero samples */
  6403. A_UINT32 last_non_zeros_sample;
  6404. } htt_stats_rx_reo_resource_stats_tlv;
  6405. /* preserve old name alias for new name consistent with the tag name */
  6406. typedef htt_stats_rx_reo_resource_stats_tlv htt_rx_reo_resource_stats_tlv_v;
  6407. /* STATS_TYPE: HTT_DBG_EXT_STATS_REO_RESOURCE_STATS
  6408. * TLV_TAGS:
  6409. * - HTT_STATS_RX_REO_RESOURCE_STATS_TAG
  6410. */
  6411. /* NOTE:
  6412. * This structure is for documentation, and cannot be safely used directly.
  6413. * Instead, use the constituent TLV structures to fill/parse.
  6414. */
  6415. #ifdef ATH_TARGET
  6416. typedef struct {
  6417. htt_stats_rx_reo_resource_stats_tlv reo_resource_stats;
  6418. } htt_soc_reo_resource_stats_t;
  6419. #endif /* ATH_TARGET */
  6420. /* == TX SOUNDING STATS == */
  6421. /* config_param0 */
  6422. #define HTT_DBG_EXT_STATS_SET_VDEV_MASK(_var) ((_var << 1) | 0x1)
  6423. #define HTT_DBG_EXT_STATS_GET_VDEV_ID_FROM_VDEV_MASK(_var) ((_var >> 1) & 0xFF)
  6424. #define HTT_DBG_EXT_STATS_IS_VDEV_ID_SET(_var) ((_var) & 0x1)
  6425. typedef enum {
  6426. /* Implicit beamforming stats */
  6427. HTT_IMPLICIT_TXBF_STEER_STATS = 0,
  6428. /* Single user short inter frame sequence steer stats */
  6429. HTT_EXPLICIT_TXBF_SU_SIFS_STEER_STATS = 1,
  6430. /* Single user random back off steer stats */
  6431. HTT_EXPLICIT_TXBF_SU_RBO_STEER_STATS = 2,
  6432. /* Multi user short inter frame sequence steer stats */
  6433. HTT_EXPLICIT_TXBF_MU_SIFS_STEER_STATS = 3,
  6434. /* Multi user random back off steer stats */
  6435. HTT_EXPLICIT_TXBF_MU_RBO_STEER_STATS = 4,
  6436. /* For backward compatibility new modes cannot be added */
  6437. HTT_TXBF_MAX_NUM_OF_MODES = 5
  6438. } htt_txbf_sound_steer_modes;
  6439. typedef enum {
  6440. HTT_TX_AC_SOUNDING_MODE = 0,
  6441. HTT_TX_AX_SOUNDING_MODE = 1,
  6442. HTT_TX_BE_SOUNDING_MODE = 2,
  6443. HTT_TX_CMN_SOUNDING_MODE = 3,
  6444. HTT_TX_CV_CORR_MODE = 4,
  6445. } htt_stats_sounding_tx_mode;
  6446. #define HTT_TX_CV_CORR_MAX_NUM_COLUMNS 8
  6447. typedef struct {
  6448. htt_tlv_hdr_t tlv_hdr;
  6449. A_UINT32 tx_sounding_mode; /* HTT_TX_XX_SOUNDING_MODE */
  6450. /* Counts number of soundings for all steering modes in each bw */
  6451. A_UINT32 cbf_20[HTT_TXBF_MAX_NUM_OF_MODES];
  6452. A_UINT32 cbf_40[HTT_TXBF_MAX_NUM_OF_MODES];
  6453. A_UINT32 cbf_80[HTT_TXBF_MAX_NUM_OF_MODES];
  6454. A_UINT32 cbf_160[HTT_TXBF_MAX_NUM_OF_MODES];
  6455. /**
  6456. * The sounding array is a 2-D array stored as an 1-D array of
  6457. * A_UINT32. The stats for a particular user/bw combination is
  6458. * referenced with the following:
  6459. *
  6460. * sounding[(user* max_bw) + bw]
  6461. *
  6462. * ... where max_bw == 4 for 160mhz
  6463. */
  6464. A_UINT32 sounding[HTT_TX_NUM_OF_SOUNDING_STATS_WORDS];
  6465. /* cv upload handler stats */
  6466. /** total times CV nc mismatched */
  6467. A_UINT32 cv_nc_mismatch_err;
  6468. /** total times CV has FCS error */
  6469. A_UINT32 cv_fcs_err;
  6470. /** total times CV has invalid NSS index */
  6471. A_UINT32 cv_frag_idx_mismatch;
  6472. /** total times CV has invalid SW peer ID */
  6473. A_UINT32 cv_invalid_peer_id;
  6474. /** total times CV rejected because TXBF is not setup in peer */
  6475. A_UINT32 cv_no_txbf_setup;
  6476. /** total times CV expired while in updating state */
  6477. A_UINT32 cv_expiry_in_update;
  6478. /** total times Pkt b/w exceeding the cbf_bw */
  6479. A_UINT32 cv_pkt_bw_exceed;
  6480. /** total times CV DMA not completed */
  6481. A_UINT32 cv_dma_not_done_err;
  6482. /** total times CV update to peer failed */
  6483. A_UINT32 cv_update_failed;
  6484. /* cv query stats */
  6485. /** total times CV query happened */
  6486. A_UINT32 cv_total_query;
  6487. /** total pattern based CV query */
  6488. A_UINT32 cv_total_pattern_query;
  6489. /** total BW based CV query */
  6490. A_UINT32 cv_total_bw_query;
  6491. /** incorrect encoding in CV flags */
  6492. A_UINT32 cv_invalid_bw_coding;
  6493. /** forced sounding enabled for the peer */
  6494. A_UINT32 cv_forced_sounding;
  6495. /** standalone sounding sequence on-going */
  6496. A_UINT32 cv_standalone_sounding;
  6497. /** NC of available CV lower than expected */
  6498. A_UINT32 cv_nc_mismatch;
  6499. /** feedback type different from expected */
  6500. A_UINT32 cv_fb_type_mismatch;
  6501. /** CV BW not equal to expected BW for OFDMA */
  6502. A_UINT32 cv_ofdma_bw_mismatch;
  6503. /** CV BW not greater than or equal to expected BW */
  6504. A_UINT32 cv_bw_mismatch;
  6505. /** CV pattern not matching with the expected pattern */
  6506. A_UINT32 cv_pattern_mismatch;
  6507. /** CV available is of different preamble type than expected. */
  6508. A_UINT32 cv_preamble_mismatch;
  6509. /** NR of available CV is lower than expected. */
  6510. A_UINT32 cv_nr_mismatch;
  6511. /** CV in use count has exceeded threshold and cannot be used further. */
  6512. A_UINT32 cv_in_use_cnt_exceeded;
  6513. /** A valid CV has been found. */
  6514. A_UINT32 cv_found;
  6515. /** No valid CV was found. */
  6516. A_UINT32 cv_not_found;
  6517. /** Sounding per user in 320MHz bandwidth */
  6518. A_UINT32 sounding_320[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  6519. /** Counts number of soundings for all steering modes in 320MHz bandwidth */
  6520. A_UINT32 cbf_320[HTT_TXBF_MAX_NUM_OF_MODES];
  6521. /* This part can be used for new counters added for CV query/upload. */
  6522. /** non-trigger based ranging sequence on-going */
  6523. A_UINT32 cv_ntbr_sounding;
  6524. /** CV found, but upload is in progress. */
  6525. A_UINT32 cv_found_upload_in_progress;
  6526. /** Expired CV found during query. */
  6527. A_UINT32 cv_expired_during_query;
  6528. /** total times CV dma timeout happened */
  6529. A_UINT32 cv_dma_timeout_error;
  6530. /** total times CV bufs uploaded for IBF case */
  6531. A_UINT32 cv_buf_ibf_uploads;
  6532. /** total times CV bufs uploaded for EBF case */
  6533. A_UINT32 cv_buf_ebf_uploads;
  6534. /** total times CV bufs received from IPC ring */
  6535. A_UINT32 cv_buf_received;
  6536. /** total times CV bufs fed back to the IPC ring */
  6537. A_UINT32 cv_buf_fed_back;
  6538. /** Total times CV query happened for IBF case */
  6539. A_UINT32 cv_total_query_ibf;
  6540. /** A valid CV has been found for IBF case */
  6541. A_UINT32 cv_found_ibf;
  6542. /** A valid CV has not been found for IBF case */
  6543. A_UINT32 cv_not_found_ibf;
  6544. /** Expired CV found during query for IBF case */
  6545. A_UINT32 cv_expired_during_query_ibf;
  6546. /** Total number of times adaptive sounding logic has been queried */
  6547. A_UINT32 adaptive_snd_total_query;
  6548. /**
  6549. * Total number of times adaptive sounding mcs drop has been computed
  6550. * and recorded.
  6551. */
  6552. A_UINT32 adaptive_snd_total_mcs_drop[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  6553. /** Total number of times adaptive sounding logic kicked in */
  6554. A_UINT32 adaptive_snd_kicked_in;
  6555. /** Total number of times we switched back to normal sounding interval */
  6556. A_UINT32 adaptive_snd_back_to_default;
  6557. /**
  6558. * Below are CV correlation feature related stats.
  6559. * This feature is used for DL MU MIMO, but is not available
  6560. * from certain legacy targets.
  6561. */
  6562. /** number of CV Correlation triggers for online mode */
  6563. A_UINT32 cv_corr_trigger_online_mode;
  6564. /** number of CV Correlation triggers for offline mode */
  6565. A_UINT32 cv_corr_trigger_offline_mode;
  6566. /** number of CV Correlation triggers for hybrid mode */
  6567. A_UINT32 cv_corr_trigger_hybrid_mode;
  6568. /** number of CV Correlation triggers with computation level 0 */
  6569. A_UINT32 cv_corr_trigger_computation_level_0;
  6570. /** number of CV Correlation triggers with computation level 1 */
  6571. A_UINT32 cv_corr_trigger_computation_level_1;
  6572. /** number of CV Correlation triggers with computation level 2 */
  6573. A_UINT32 cv_corr_trigger_computation_level_2;
  6574. /** number of users for which CV Correlation was triggered */
  6575. A_UINT32 cv_corr_trigger_num_users[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6576. /** number of streams for which CV Correlation was triggered */
  6577. A_UINT32 cv_corr_trigger_num_streams[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6578. /** number of CV Correlation buffers received through IPC tickle */
  6579. A_UINT32 cv_corr_upload_total_buf_received;
  6580. /** number of CV Correlation buffers fed back to the IPC ring */
  6581. A_UINT32 cv_corr_upload_total_buf_fed_back;
  6582. /** number of CV Correlation buffers for which processing failed */
  6583. A_UINT32 cv_corr_upload_total_processing_failed;
  6584. /**
  6585. * number of CV Correlation buffers for which processing failed,
  6586. * due to no users being present in parsed buffer
  6587. */
  6588. A_UINT32 cv_corr_upload_failed_total_users_zero;
  6589. /**
  6590. * number of CV Correlation buffers for which processing failed,
  6591. * due to number of users present in parsed buffer exceeded
  6592. * CV_CORR_MAX_NUM_COLUMNS
  6593. */
  6594. A_UINT32 cv_corr_upload_failed_total_users_exceeded;
  6595. /**
  6596. * number of CV Correlation buffers for which processing failed,
  6597. * due to peer pointer for parsed peer not available
  6598. */
  6599. A_UINT32 cv_corr_upload_failed_peer_not_found;
  6600. /**
  6601. * number of CV Correlation buffers for which processing encountered,
  6602. * Nss of peer exceeding SCHED_ALGO_MAX_SUPPORTED_MUMIMO_NSS
  6603. */
  6604. A_UINT32 cv_corr_upload_user_nss_exceeded;
  6605. /**
  6606. * number of CV Correlation buffers for which processing encountered,
  6607. * invalid reverse look up index for fetching CV correlation results
  6608. */
  6609. A_UINT32 cv_corr_upload_invalid_lookup_index;
  6610. /** number of users present in uploaded CV Correlation results buffer */
  6611. A_UINT32 cv_corr_upload_total_num_users[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6612. /** number of streams present in uploaded CV Correlation results buffer */
  6613. A_UINT32 cv_corr_upload_total_num_streams[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6614. } htt_stats_tx_sounding_stats_tlv;
  6615. /* preserve old name alias for new name consistent with the tag name */
  6616. typedef htt_stats_tx_sounding_stats_tlv htt_tx_sounding_stats_tlv;
  6617. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  6618. * TLV_TAGS:
  6619. * - HTT_STATS_TX_SOUNDING_STATS_TAG
  6620. */
  6621. /* NOTE:
  6622. * This structure is for documentation, and cannot be safely used directly.
  6623. * Instead, use the constituent TLV structures to fill/parse.
  6624. */
  6625. #ifdef ATH_TARGET
  6626. typedef struct {
  6627. htt_stats_tx_sounding_stats_tlv sounding_tlv;
  6628. } htt_tx_sounding_stats_t;
  6629. #endif /* ATH_TARGET */
  6630. typedef struct {
  6631. htt_tlv_hdr_t tlv_hdr;
  6632. A_UINT32 num_obss_tx_ppdu_success;
  6633. A_UINT32 num_obss_tx_ppdu_failure;
  6634. /** num_sr_tx_transmissions:
  6635. * Counter of TX done by aborting other BSS RX with spatial reuse
  6636. * (for cases where rx RSSI from other BSS is below the packet-detection
  6637. * threshold for doing spatial reuse)
  6638. */
  6639. union {
  6640. A_UINT32 num_sr_tx_transmissions; /* CORRECTED - use this one */
  6641. A_UINT32 num_sr_tx_tranmissions; /* DEPRECATED - has typo in name */
  6642. };
  6643. union {
  6644. /**
  6645. * Count the number of times the RSSI from an other-BSS signal
  6646. * is below the spatial reuse power threshold, thus providing an
  6647. * opportunity for spatial reuse since OBSS interference will be
  6648. * inconsequential.
  6649. */
  6650. A_UINT32 num_spatial_reuse_opportunities;
  6651. /* DEPRECATED: num_sr_rx_ge_pd_rssi_thr
  6652. * This old name has been deprecated because it does not
  6653. * clearly and accurately reflect the information stored within
  6654. * this field.
  6655. * Use the new name (num_spatial_reuse_opportunities) instead of
  6656. * the deprecated old name (num_sr_rx_ge_pd_rssi_thr).
  6657. */
  6658. A_UINT32 num_sr_rx_ge_pd_rssi_thr;
  6659. };
  6660. /**
  6661. * Count of number of times OBSS frames were aborted and non-SRG
  6662. * opportunities were created. Non-SRG opportunities are created when
  6663. * incoming OBSS RSSI is lesser than the global configured non-SRG RSSI
  6664. * threshold and non-SRG OBSS color / non-SRG OBSS BSSID registers
  6665. * allow non-SRG TX.
  6666. */
  6667. A_UINT32 num_non_srg_opportunities;
  6668. /**
  6669. * Count of number of times TX PPDU were transmitted using non-SRG
  6670. * opportunities created. Incoming OBSS frame RSSI is compared with per
  6671. * PPDU non-SRG RSSI threshold configured in each PPDU. If incoming OBSS
  6672. * RSSI < non-SRG RSSI threshold configured in each PPDU, then non-SRG
  6673. * transmission happens.
  6674. */
  6675. A_UINT32 num_non_srg_ppdu_tried;
  6676. /**
  6677. * Count of number of times non-SRG based TX transmissions were successful
  6678. */
  6679. A_UINT32 num_non_srg_ppdu_success;
  6680. /**
  6681. * Count of number of times OBSS frames were aborted and SRG opportunities
  6682. * were created. Srg opportunities are created when incoming OBSS RSSI
  6683. * is less than the global configured SRG RSSI threshold and SRC OBSS
  6684. * color / SRG OBSS BSSID / SRG partial bssid / SRG BSS color bitmap
  6685. * registers allow SRG TX.
  6686. */
  6687. A_UINT32 num_srg_opportunities;
  6688. /**
  6689. * Count of number of times TX PPDU were transmitted using SRG
  6690. * opportunities created.
  6691. * Incoming OBSS frame RSSI is compared with per PPDU SRG RSSI
  6692. * threshold configured in each PPDU.
  6693. * If incoming OBSS RSSI < SRG RSSI threshold configured in each PPDU,
  6694. * then SRG transmission happens.
  6695. */
  6696. A_UINT32 num_srg_ppdu_tried;
  6697. /**
  6698. * Count of number of times SRG based TX transmissions were successful
  6699. */
  6700. A_UINT32 num_srg_ppdu_success;
  6701. /**
  6702. * Count of number of times PSR opportunities were created by aborting
  6703. * OBSS UL OFDMA HE-TB PPDU frame. HE-TB ppdu frames are aborted if the
  6704. * spatial reuse info in the OBSS trigger common field is set to allow PSR
  6705. * based spatial reuse.
  6706. */
  6707. A_UINT32 num_psr_opportunities;
  6708. /**
  6709. * Count of number of times TX PPDU were transmitted using PSR
  6710. * opportunities created.
  6711. */
  6712. A_UINT32 num_psr_ppdu_tried;
  6713. /**
  6714. * Count of number of times PSR based TX transmissions were successful.
  6715. */
  6716. A_UINT32 num_psr_ppdu_success;
  6717. /**
  6718. * Count of number of times TX PPDU per access category were transmitted
  6719. * using non-SRG opportunities created.
  6720. */
  6721. A_UINT32 num_non_srg_ppdu_tried_per_ac[HTT_NUM_AC_WMM];
  6722. /**
  6723. * Count of number of times non-SRG based TX transmissions per access
  6724. * category were successful
  6725. */
  6726. A_UINT32 num_non_srg_ppdu_success_per_ac[HTT_NUM_AC_WMM];
  6727. /**
  6728. * Count of number of times TX PPDU per access category were transmitted
  6729. * using SRG opportunities created.
  6730. */
  6731. A_UINT32 num_srg_ppdu_tried_per_ac[HTT_NUM_AC_WMM];
  6732. /**
  6733. * Count of number of times SRG based TX transmissions per access
  6734. * category were successful
  6735. */
  6736. A_UINT32 num_srg_ppdu_success_per_ac[HTT_NUM_AC_WMM];
  6737. /**
  6738. * Count of number of times ppdu was flushed due to ongoing OBSS
  6739. * frame duration value lesser than minimum required frame duration.
  6740. */
  6741. A_UINT32 num_obss_min_duration_check_flush_cnt;
  6742. /**
  6743. * Count of number of times ppdu was flushed due to ppdu duration
  6744. * exceeding aborted OBSS frame duration
  6745. */
  6746. A_UINT32 num_sr_ppdu_abort_flush_cnt;
  6747. } htt_stats_pdev_obss_pd_tlv;
  6748. /* preserve old name alias for new name consistent with the tag name */
  6749. typedef htt_stats_pdev_obss_pd_tlv htt_pdev_obss_pd_stats_tlv;
  6750. /* NOTE:
  6751. * This structure is for documentation, and cannot be safely used directly.
  6752. * Instead, use the constituent TLV structures to fill/parse.
  6753. */
  6754. #ifdef ATH_TARGET
  6755. typedef struct {
  6756. htt_stats_pdev_obss_pd_tlv obss_pd_stat;
  6757. } htt_pdev_obss_pd_stats_t;
  6758. #endif /* ATH_TARGET */
  6759. typedef struct {
  6760. htt_tlv_hdr_t tlv_hdr;
  6761. A_UINT32 pdev_id;
  6762. A_UINT32 current_head_idx;
  6763. A_UINT32 current_tail_idx;
  6764. A_UINT32 num_htt_msgs_sent;
  6765. /**
  6766. * Time in milliseconds for which the ring has been in
  6767. * its current backpressure condition
  6768. */
  6769. A_UINT32 backpressure_time_ms;
  6770. /** backpressure_hist -
  6771. * histogram showing how many times different degrees of backpressure
  6772. * duration occurred:
  6773. * Index 0 indicates the number of times ring was
  6774. * continuously in backpressure state for 100 - 200ms.
  6775. * Index 1 indicates the number of times ring was
  6776. * continuously in backpressure state for 200 - 300ms.
  6777. * Index 2 indicates the number of times ring was
  6778. * continuously in backpressure state for 300 - 400ms.
  6779. * Index 3 indicates the number of times ring was
  6780. * continuously in backpressure state for 400 - 500ms.
  6781. * Index 4 indicates the number of times ring was
  6782. * continuously in backpressure state beyond 500ms.
  6783. */
  6784. A_UINT32 backpressure_hist[5];
  6785. } htt_stats_ring_backpressure_stats_tlv;
  6786. /* preserve old name alias for new name consistent with the tag name */
  6787. typedef htt_stats_ring_backpressure_stats_tlv htt_ring_backpressure_stats_tlv;
  6788. /* STATS_TYPE : HTT_STATS_RING_BACKPRESSURE_STATS_INFO
  6789. * TLV_TAGS:
  6790. * - HTT_STATS_RING_BACKPRESSURE_STATS_TAG
  6791. */
  6792. /* NOTE:
  6793. * This structure is for documentation, and cannot be safely used directly.
  6794. * Instead, use the constituent TLV structures to fill/parse.
  6795. */
  6796. #ifdef ATH_TARGET
  6797. typedef struct {
  6798. htt_stats_sring_cmn_tlv cmn_tlv;
  6799. struct {
  6800. htt_stats_string_tlv sring_str_tlv;
  6801. htt_stats_ring_backpressure_stats_tlv backpressure_stats_tlv;
  6802. } r[1]; /* variable-length array */
  6803. } htt_ring_backpressure_stats_t;
  6804. #endif /* ATH_TARGET */
  6805. #define HTT_LATENCY_PROFILE_MAX_HIST 3
  6806. #define HTT_STATS_MAX_PROF_STATS_NAME_LEN 32
  6807. #define HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST 3
  6808. typedef struct {
  6809. htt_tlv_hdr_t tlv_hdr;
  6810. /** print_header:
  6811. * This field suggests whether the host should print a header when
  6812. * displaying the TLV (because this is the first latency_prof_stats
  6813. * TLV within a series), or if only the TLV contents should be displayed
  6814. * without a header (because this is not the first TLV within the series).
  6815. */
  6816. A_UINT32 print_header;
  6817. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  6818. /** number of data values included in the tot sum */
  6819. A_UINT32 cnt;
  6820. /** time in us */
  6821. A_UINT32 min;
  6822. /** time in us */
  6823. A_UINT32 max;
  6824. A_UINT32 last;
  6825. /** time in us */
  6826. A_UINT32 tot;
  6827. /** time in us */
  6828. A_UINT32 avg;
  6829. /** hist_intvl:
  6830. * Histogram interval, i.e. the latency range covered by each
  6831. * bin of the histogram, in microsecond units.
  6832. * hist[0] counts how many latencies were between 0 to hist_intvl
  6833. * hist[1] counts how many latencies were between hist_intvl to 2*hist_intvl
  6834. * hist[2] counts how many latencies were more than 2*hist_intvl
  6835. */
  6836. A_UINT32 hist_intvl;
  6837. A_UINT32 hist[HTT_LATENCY_PROFILE_MAX_HIST];
  6838. /** max page faults in any 1 sampling window */
  6839. A_UINT32 page_fault_max;
  6840. /** summed over all sampling windows */
  6841. A_UINT32 page_fault_total;
  6842. /** ignored_latency_count:
  6843. * ignore some of profile latency to avoid avg skewing
  6844. */
  6845. A_UINT32 ignored_latency_count;
  6846. /** interrupts_max: max interrupts within any single sampling window */
  6847. A_UINT32 interrupts_max;
  6848. /** interrupts_hist: histogram of interrupt rate
  6849. * bin0 contains the number of sampling windows that had 0 interrupts,
  6850. * bin1 contains the number of sampling windows that had 1-4 interrupts,
  6851. * bin2 contains the number of sampling windows that had > 4 interrupts
  6852. */
  6853. A_UINT32 interrupts_hist[HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST];
  6854. } htt_stats_latency_prof_stats_tlv;
  6855. /* preserve old name alias for new name consistent with the tag name */
  6856. typedef htt_stats_latency_prof_stats_tlv htt_latency_prof_stats_tlv;
  6857. typedef struct {
  6858. htt_tlv_hdr_t tlv_hdr;
  6859. /** duration:
  6860. * Time period over which counts were gathered, units = microseconds.
  6861. */
  6862. A_UINT32 duration;
  6863. A_UINT32 tx_msdu_cnt;
  6864. A_UINT32 tx_mpdu_cnt;
  6865. A_UINT32 tx_ppdu_cnt;
  6866. A_UINT32 rx_msdu_cnt;
  6867. A_UINT32 rx_mpdu_cnt;
  6868. } htt_stats_latency_ctx_tlv;
  6869. /* preserve old name alias for new name consistent with the tag name */
  6870. typedef htt_stats_latency_ctx_tlv htt_latency_prof_ctx_tlv;
  6871. typedef struct {
  6872. htt_tlv_hdr_t tlv_hdr;
  6873. /** count of enabled profiles */
  6874. A_UINT32 prof_enable_cnt;
  6875. } htt_stats_latency_cnt_tlv;
  6876. /* preserve old name alias for new name consistent with the tag name */
  6877. typedef htt_stats_latency_cnt_tlv htt_latency_prof_cnt_tlv;
  6878. /* STATS_TYPE : HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  6879. * TLV_TAGS:
  6880. * HTT_STATS_LATENCY_PROF_STATS_TAG / htt_latency_prof_stats_tlv
  6881. * HTT_STATS_LATENCY_CTX_TAG / htt_latency_prof_ctx_tlv
  6882. * HTT_STATS_LATENCY_CNT_TAG / htt_latency_prof_cnt_tlv
  6883. */
  6884. /* NOTE:
  6885. * This structure is for documentation, and cannot be safely used directly.
  6886. * Instead, use the constituent TLV structures to fill/parse.
  6887. */
  6888. #ifdef ATH_TARGET
  6889. typedef struct {
  6890. htt_stats_latency_prof_stats_tlv latency_prof_stat;
  6891. htt_stats_latency_ctx_tlv latency_ctx_stat;
  6892. htt_stats_latency_cnt_tlv latency_cnt_stat;
  6893. } htt_soc_latency_stats_t;
  6894. #endif /* ATH_TARGET */
  6895. #define HTT_RX_MAX_PEAK_OCCUPANCY_INDEX 10
  6896. #define HTT_RX_MAX_CURRENT_OCCUPANCY_INDEX 10
  6897. #define HTT_RX_SQUARE_INDEX 6
  6898. #define HTT_RX_MAX_PEAK_SEARCH_INDEX 4
  6899. #define HTT_RX_MAX_PENDING_SEARCH_INDEX 4
  6900. /* STATS_TYPE : HTT_DBG_EXT_RX_FSE_STATS
  6901. * TLV_TAGS:
  6902. * - HTT_STATS_RX_FSE_STATS_TAG
  6903. */
  6904. typedef struct {
  6905. htt_tlv_hdr_t tlv_hdr;
  6906. /**
  6907. * Number of times host requested for fse enable/disable
  6908. */
  6909. A_UINT32 fse_enable_cnt;
  6910. A_UINT32 fse_disable_cnt;
  6911. /**
  6912. * Number of times host requested for fse cache invalidation
  6913. * individual entries or full cache
  6914. */
  6915. A_UINT32 fse_cache_invalidate_entry_cnt;
  6916. A_UINT32 fse_full_cache_invalidate_cnt;
  6917. /**
  6918. * Cache hits count will increase if there is a matching flow in the cache
  6919. * There is no register for cache miss but the number of cache misses can
  6920. * be calculated as
  6921. * cache miss = (num_searches - cache_hits)
  6922. * Thus, there is no need to have a separate variable for cache misses.
  6923. * Num searches is flow search times done in the cache.
  6924. */
  6925. A_UINT32 fse_num_cache_hits_cnt;
  6926. A_UINT32 fse_num_searches_cnt;
  6927. /**
  6928. * Cache Occupancy holds 2 types of values: Peak and Current.
  6929. * 10 bins are used to keep track of peak occupancy.
  6930. * 8 of these bins represent ranges of values, while the first and last
  6931. * bins represent the extreme cases of the cache being completely empty
  6932. * or completely full.
  6933. * For the non-extreme bins, the number of cache occupancy values per
  6934. * bin is the maximum cache occupancy (128), divided by the number of
  6935. * non-extreme bins (8), so 128/8 = 16 values per bin.
  6936. * The range of values for each histogram bins is specified below:
  6937. * Bin0 = Counter increments when cache occupancy is empty
  6938. * Bin1 = Counter increments when cache occupancy is within [1 to 16]
  6939. * Bin2 = Counter increments when cache occupancy is within [17 to 32]
  6940. * Bin3 = Counter increments when cache occupancy is within [33 to 48]
  6941. * Bin4 = Counter increments when cache occupancy is within [49 to 64]
  6942. * Bin5 = Counter increments when cache occupancy is within [65 to 80]
  6943. * Bin6 = Counter increments when cache occupancy is within [81 to 96]
  6944. * Bin7 = Counter increments when cache occupancy is within [97 to 112]
  6945. * Bin8 = Counter increments when cache occupancy is within [113 to 127]
  6946. * Bin9 = Counter increments when cache occupancy is equal to 128
  6947. * The above histogram bin definitions apply to both the peak-occupancy
  6948. * histogram and the current-occupancy histogram.
  6949. *
  6950. * @fse_cache_occupancy_peak_cnt:
  6951. * Array records periodically PEAK cache occupancy values.
  6952. * Peak Occupancy will increment only if it is greater than current
  6953. * occupancy value.
  6954. *
  6955. * @fse_cache_occupancy_curr_cnt:
  6956. * Array records periodically current cache occupancy value.
  6957. * Current Cache occupancy always holds instant snapshot of
  6958. * current number of cache entries.
  6959. **/
  6960. A_UINT32 fse_cache_occupancy_peak_cnt[HTT_RX_MAX_PEAK_OCCUPANCY_INDEX];
  6961. A_UINT32 fse_cache_occupancy_curr_cnt[HTT_RX_MAX_CURRENT_OCCUPANCY_INDEX];
  6962. /**
  6963. * Square stat is sum of squares of cache occupancy to better understand
  6964. * any variation/deviation within each cache set, over a given time-window.
  6965. *
  6966. * Square stat is calculated this way:
  6967. * Square = SUM(Squares of all Occupancy in a Set) / 8
  6968. * The cache has 16-way set associativity, so the occupancy of a
  6969. * set can vary from 0 to 16. There are 8 sets within the cache.
  6970. * Therefore, the minimum possible square value is 0, and the maximum
  6971. * possible square value is (8*16^2) / 8 = 256.
  6972. *
  6973. * 6 bins are used to keep track of square stats:
  6974. * Bin0 = increments when square of current cache occupancy is zero
  6975. * Bin1 = increments when square of current cache occupancy is within
  6976. * [1 to 50]
  6977. * Bin2 = increments when square of current cache occupancy is within
  6978. * [51 to 100]
  6979. * Bin3 = increments when square of current cache occupancy is within
  6980. * [101 to 200]
  6981. * Bin4 = increments when square of current cache occupancy is within
  6982. * [201 to 255]
  6983. * Bin5 = increments when square of current cache occupancy is 256
  6984. */
  6985. A_UINT32 fse_search_stat_square_cnt[HTT_RX_SQUARE_INDEX];
  6986. /**
  6987. * Search stats has 2 types of values: Peak Pending and Number of
  6988. * Search Pending.
  6989. * GSE command ring for FSE can hold maximum of 5 Pending searches
  6990. * at any given time.
  6991. *
  6992. * 4 bins are used to keep track of search stats:
  6993. * Bin0 = Counter increments when there are NO pending searches
  6994. * (For peak, it will be number of pending searches greater
  6995. * than GSE command ring FIFO outstanding requests.
  6996. * For Search Pending, it will be number of pending search
  6997. * inside GSE command ring FIFO.)
  6998. * Bin1 = Counter increments when number of pending searches are within
  6999. * [1 to 2]
  7000. * Bin2 = Counter increments when number of pending searches are within
  7001. * [3 to 4]
  7002. * Bin3 = Counter increments when number of pending searches are
  7003. * greater/equal to [ >= 5]
  7004. */
  7005. A_UINT32 fse_search_stat_peak_cnt[HTT_RX_MAX_PEAK_SEARCH_INDEX];
  7006. A_UINT32 fse_search_stat_search_pending_cnt[HTT_RX_MAX_PENDING_SEARCH_INDEX];
  7007. } htt_stats_rx_fse_stats_tlv;
  7008. /* preserve old name alias for new name consistent with the tag name */
  7009. typedef htt_stats_rx_fse_stats_tlv htt_rx_fse_stats_tlv;
  7010. /* NOTE:
  7011. * This structure is for documentation, and cannot be safely used directly.
  7012. * Instead, use the constituent TLV structures to fill/parse.
  7013. */
  7014. #ifdef ATH_TARGET
  7015. typedef struct {
  7016. htt_stats_rx_fse_stats_tlv rx_fse_stats;
  7017. } htt_rx_fse_stats_t;
  7018. #endif /* ATH_TARGET */
  7019. #define HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS 14
  7020. #define HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS 5 /* 20, 40, 80, 160, 320 */
  7021. #define HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES 2/* 0: Half, 1: Quarter */
  7022. typedef struct {
  7023. htt_tlv_hdr_t tlv_hdr;
  7024. /** SU TxBF TX MCS stats */
  7025. A_UINT32 tx_su_txbf_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  7026. /** Implicit BF TX MCS stats */
  7027. A_UINT32 tx_su_ibf_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  7028. /** Open loop TX MCS stats */
  7029. A_UINT32 tx_su_ol_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  7030. /** SU TxBF TX NSS stats */
  7031. A_UINT32 tx_su_txbf_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  7032. /** Implicit BF TX NSS stats */
  7033. A_UINT32 tx_su_ibf_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  7034. /** Open loop TX NSS stats */
  7035. A_UINT32 tx_su_ol_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  7036. /** SU TxBF TX BW stats */
  7037. A_UINT32 tx_su_txbf_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  7038. /** Implicit BF TX BW stats */
  7039. A_UINT32 tx_su_ibf_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  7040. /** Open loop TX BW stats */
  7041. A_UINT32 tx_su_ol_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  7042. /** Legacy and OFDM TX rate stats */
  7043. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  7044. /** SU TxBF TX BW stats */
  7045. A_UINT32 reduced_tx_su_txbf_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  7046. /** Implicit BF TX BW stats */
  7047. A_UINT32 reduced_tx_su_ibf_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  7048. /** Open loop TX BW stats */
  7049. A_UINT32 reduced_tx_su_ol_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  7050. /** Txbf flag reason stats */
  7051. A_UINT32 txbf_flag_set_mu_mode;
  7052. A_UINT32 txbf_flag_set_final_status;
  7053. A_UINT32 txbf_flag_not_set_verified_txbf_mode;
  7054. A_UINT32 txbf_flag_not_set_disable_p2p_access;
  7055. A_UINT32 txbf_flag_not_set_max_nss_reached_in_he160;
  7056. A_UINT32 txbf_flag_not_set_disable_ul_dl_ofdma;
  7057. A_UINT32 txbf_flag_not_set_mcs_threshold_value;
  7058. A_UINT32 txbf_flag_not_set_final_status;
  7059. } htt_stats_pdev_tx_rate_txbf_stats_tlv;
  7060. /* preserve old name alias for new name consistent with the tag name */
  7061. typedef htt_stats_pdev_tx_rate_txbf_stats_tlv htt_tx_pdev_txbf_rate_stats_tlv;
  7062. typedef enum {
  7063. HTT_STATS_RC_MODE_DLSU = 0,
  7064. HTT_STATS_RC_MODE_DLMUMIMO = 1,
  7065. HTT_STATS_RC_MODE_DLOFDMA = 2,
  7066. HTT_STATS_RC_MODE_ULMUMIMO = 3,
  7067. HTT_STATS_RC_MODE_ULOFDMA = 4,
  7068. } htt_stats_rc_mode;
  7069. typedef struct {
  7070. A_UINT32 ppdus_tried;
  7071. A_UINT32 ppdus_ack_failed;
  7072. A_UINT32 mpdus_tried;
  7073. A_UINT32 mpdus_failed;
  7074. } htt_tx_rate_stats_t;
  7075. typedef enum {
  7076. HTT_RC_MODE_SU_OL,
  7077. HTT_RC_MODE_SU_BF,
  7078. HTT_RC_MODE_MU1_INTF,
  7079. HTT_RC_MODE_MU2_INTF,
  7080. HTT_Rc_MODE_MU3_INTF,
  7081. HTT_RC_MODE_MU4_INTF,
  7082. HTT_RC_MODE_MU5_INTF,
  7083. HTT_RC_MODE_MU6_INTF,
  7084. HTT_RC_MODE_MU7_INTF,
  7085. HTT_RC_MODE_2D_COUNT,
  7086. } HTT_RC_MODE;
  7087. typedef enum {
  7088. HTT_STATS_RU_TYPE_INVALID = 0,
  7089. HTT_STATS_RU_TYPE_SINGLE_RU_ONLY = 1,
  7090. HTT_STATS_RU_TYPE_SINGLE_AND_MULTI_RU = 2,
  7091. } htt_stats_ru_type;
  7092. typedef struct {
  7093. htt_tlv_hdr_t tlv_hdr;
  7094. /** HTT_STATS_RC_MODE_XX */
  7095. A_UINT32 rc_mode;
  7096. A_UINT32 last_probed_mcs;
  7097. A_UINT32 last_probed_nss;
  7098. A_UINT32 last_probed_bw;
  7099. htt_tx_rate_stats_t per_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  7100. htt_tx_rate_stats_t per_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  7101. htt_tx_rate_stats_t per_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  7102. /** 320MHz extension for PER */
  7103. htt_tx_rate_stats_t per_bw320;
  7104. A_UINT32 probe_cnt_per_rcmode[HTT_RC_MODE_2D_COUNT];
  7105. A_UINT32 ru_type; /* refer to htt_stats_ru_type enum */
  7106. htt_tx_rate_stats_t per_ru[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  7107. } htt_stats_per_rate_stats_tlv;
  7108. /* preserve old name alias for new name consistent with the tag name */
  7109. typedef htt_stats_per_rate_stats_tlv htt_tx_rate_stats_per_tlv;
  7110. /* NOTE:
  7111. * This structure is for documentation, and cannot be safely used directly.
  7112. * Instead, use the constituent TLV structures to fill/parse.
  7113. */
  7114. #ifdef ATH_TARGET
  7115. typedef struct {
  7116. htt_stats_pdev_tx_rate_txbf_stats_tlv txbf_rate_stats;
  7117. } htt_pdev_txbf_rate_stats_t;
  7118. #endif /* ATH_TARGET */
  7119. #ifdef ATH_TARGET
  7120. typedef struct {
  7121. htt_stats_per_rate_stats_tlv per_stats;
  7122. } htt_tx_pdev_per_stats_t;
  7123. #endif /* ATH_TARGET */
  7124. typedef enum {
  7125. HTT_ULTRIG_QBOOST_TRIGGER = 0,
  7126. HTT_ULTRIG_PSPOLL_TRIGGER,
  7127. HTT_ULTRIG_UAPSD_TRIGGER,
  7128. HTT_ULTRIG_11AX_TRIGGER,
  7129. HTT_ULTRIG_11AX_WILDCARD_TRIGGER,
  7130. HTT_ULTRIG_11AX_UNASSOC_WILDCARD_TRIGGER,
  7131. HTT_STA_UL_OFDMA_NUM_TRIG_TYPE,
  7132. } HTT_STA_UL_OFDMA_RX_TRIG_TYPE;
  7133. typedef enum {
  7134. HTT_11AX_TRIGGER_BASIC_E = 0,
  7135. HTT_11AX_TRIGGER_BRPOLL_E = 1,
  7136. HTT_11AX_TRIGGER_MU_BAR_E = 2,
  7137. HTT_11AX_TRIGGER_MU_RTS_E = 3,
  7138. HTT_11AX_TRIGGER_BUFFER_SIZE_E = 4,
  7139. HTT_11AX_TRIGGER_GCR_MU_BAR_E = 5,
  7140. HTT_11AX_TRIGGER_BQRP_E = 6,
  7141. HTT_11AX_TRIGGER_NDP_FB_REPORT_POLL_E = 7,
  7142. HTT_11AX_TRIGGER_RESERVED_8_E = 8,
  7143. HTT_11AX_TRIGGER_RESERVED_9_E = 9,
  7144. HTT_11AX_TRIGGER_RESERVED_10_E = 10,
  7145. HTT_11AX_TRIGGER_RESERVED_11_E = 11,
  7146. HTT_11AX_TRIGGER_RESERVED_12_E = 12,
  7147. HTT_11AX_TRIGGER_RESERVED_13_E = 13,
  7148. HTT_11AX_TRIGGER_RESERVED_14_E = 14,
  7149. HTT_11AX_TRIGGER_RESERVED_15_E = 15,
  7150. HTT_STA_UL_OFDMA_NUM_11AX_TRIG_TYPE,
  7151. } HTT_STA_UL_OFDMA_11AX_TRIG_TYPE;
  7152. /* UL RESP Queues 0 - HIPRI, 1 - LOPRI & 2 - BSR */
  7153. #define HTT_STA_UL_OFDMA_NUM_UL_QUEUES 3
  7154. /* Actual resp type sent by STA for trigger
  7155. * 0 - HE TB PPDU, 1 - NULL Delimiter */
  7156. #define HTT_STA_UL_OFDMA_NUM_RESP_END_TYPE 2
  7157. /* Counter for MCS 0-13 */
  7158. #define HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS 14
  7159. /* Counters BW 20,40,80,160,320 */
  7160. #define HTT_STA_UL_OFDMA_NUM_BW_COUNTERS 5
  7161. #define HTT_STA_UL_OFDMA_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  7162. /* STATS_TYPE : HTT_DBG_EXT_STA_11AX_UL_STATS
  7163. * TLV_TAGS:
  7164. * - HTT_STATS_STA_UL_OFDMA_STATS_TAG
  7165. */
  7166. typedef struct {
  7167. htt_tlv_hdr_t tlv_hdr;
  7168. A_UINT32 pdev_id;
  7169. /**
  7170. * Trigger Type reported by HWSCH on RX reception
  7171. * Each index populate enum HTT_STA_UL_OFDMA_RX_TRIG_TYPE
  7172. */
  7173. A_UINT32 rx_trigger_type[HTT_STA_UL_OFDMA_NUM_TRIG_TYPE];
  7174. /**
  7175. * 11AX Trigger Type on RX reception
  7176. * Each index populate enum HTT_STA_UL_OFDMA_11AX_TRIG_TYPE
  7177. */
  7178. A_UINT32 ax_trigger_type[HTT_STA_UL_OFDMA_NUM_11AX_TRIG_TYPE];
  7179. /** Num data PPDUs/Delims responded to trigs. per HWQ for UL RESP */
  7180. A_UINT32 num_data_ppdu_responded_per_hwq[HTT_STA_UL_OFDMA_NUM_UL_QUEUES];
  7181. A_UINT32 num_null_delimiters_responded_per_hwq[HTT_STA_UL_OFDMA_NUM_UL_QUEUES];
  7182. /**
  7183. * Overall UL STA RESP Status 0 - HE TB PPDU, 1 - NULL Delimiter
  7184. * Super set of num_data_ppdu_responded_per_hwq,
  7185. * num_null_delimiters_responded_per_hwq
  7186. */
  7187. A_UINT32 num_total_trig_responses[HTT_STA_UL_OFDMA_NUM_RESP_END_TYPE];
  7188. /**
  7189. * Time interval between current time ms and last successful trigger RX
  7190. * 0xFFFFFFFF denotes no trig received / timestamp roll back
  7191. */
  7192. A_UINT32 last_trig_rx_time_delta_ms;
  7193. /**
  7194. * Rate Statistics for UL OFDMA
  7195. * UL TB PPDU TX MCS, NSS, GI, BW from STA HWQ
  7196. */
  7197. A_UINT32 ul_ofdma_tx_mcs[HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS];
  7198. A_UINT32 ul_ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  7199. A_UINT32 ul_ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS];
  7200. A_UINT32 ul_ofdma_tx_ldpc;
  7201. A_UINT32 ul_ofdma_tx_bw[HTT_STA_UL_OFDMA_NUM_BW_COUNTERS];
  7202. /** Trig based PPDU TX/ RBO based PPDU TX Count */
  7203. A_UINT32 trig_based_ppdu_tx;
  7204. A_UINT32 rbo_based_ppdu_tx;
  7205. /** Switch MU EDCA to SU EDCA Count */
  7206. A_UINT32 mu_edca_to_su_edca_switch_count;
  7207. /** Num MU EDCA applied Count */
  7208. A_UINT32 num_mu_edca_param_apply_count;
  7209. /**
  7210. * Current MU EDCA Parameters for WMM ACs
  7211. * Mode - 0 - SU EDCA, 1- MU EDCA
  7212. */
  7213. A_UINT32 current_edca_hwq_mode[HTT_NUM_AC_WMM];
  7214. /** Contention Window minimum. Range: 1 - 10 */
  7215. A_UINT32 current_cw_min[HTT_NUM_AC_WMM];
  7216. /** Contention Window maximum. Range: 1 - 10 */
  7217. A_UINT32 current_cw_max[HTT_NUM_AC_WMM];
  7218. /** AIFS value - 0 -255 */
  7219. A_UINT32 current_aifs[HTT_NUM_AC_WMM];
  7220. A_UINT32 reduced_ul_ofdma_tx_bw[HTT_STA_UL_OFDMA_NUM_REDUCED_CHAN_TYPES][HTT_STA_UL_OFDMA_NUM_BW_COUNTERS];
  7221. } htt_stats_sta_ul_ofdma_stats_tlv;
  7222. /* preserve old name alias for new name consistent with the tag name */
  7223. typedef htt_stats_sta_ul_ofdma_stats_tlv htt_sta_ul_ofdma_stats_tlv;
  7224. /* NOTE:
  7225. * This structure is for documentation, and cannot be safely used directly.
  7226. * Instead, use the constituent TLV structures to fill/parse.
  7227. */
  7228. #ifdef ATH_TARGET
  7229. typedef struct {
  7230. htt_stats_sta_ul_ofdma_stats_tlv ul_ofdma_sta_stats;
  7231. } htt_sta_11ax_ul_stats_t;
  7232. #endif /* ATH_TARGET */
  7233. typedef struct {
  7234. htt_tlv_hdr_t tlv_hdr;
  7235. /** No of Fine Timing Measurement frames transmitted successfully */
  7236. A_UINT32 tx_ftm_suc;
  7237. /**
  7238. * No of Fine Timing Measurement frames transmitted successfully
  7239. * after retry
  7240. */
  7241. A_UINT32 tx_ftm_suc_retry;
  7242. /** No of Fine Timing Measurement frames not transmitted successfully */
  7243. A_UINT32 tx_ftm_fail;
  7244. /**
  7245. * No of Fine Timing Measurement Request frames received,
  7246. * including initial, non-initial, and duplicates
  7247. */
  7248. A_UINT32 rx_ftmr_cnt;
  7249. /**
  7250. * No of duplicate Fine Timing Measurement Request frames received,
  7251. * including both initial and non-initial
  7252. */
  7253. A_UINT32 rx_ftmr_dup_cnt;
  7254. /** No of initial Fine Timing Measurement Request frames received */
  7255. A_UINT32 rx_iftmr_cnt;
  7256. /**
  7257. * No of duplicate initial Fine Timing Measurement Request frames received
  7258. */
  7259. A_UINT32 rx_iftmr_dup_cnt;
  7260. /** No of responder sessions rejected when initiator was active */
  7261. A_UINT32 initiator_active_responder_rejected_cnt;
  7262. /** Responder terminate count */
  7263. A_UINT32 responder_terminate_cnt;
  7264. A_UINT32 vdev_id;
  7265. } htt_stats_vdev_rtt_resp_stats_tlv;
  7266. /* preserve old name alias for new name consistent with the tag name */
  7267. typedef htt_stats_vdev_rtt_resp_stats_tlv htt_vdev_rtt_resp_stats_tlv;
  7268. #ifdef ATH_TARGET
  7269. typedef struct {
  7270. htt_stats_vdev_rtt_resp_stats_tlv vdev_rtt_resp_stats;
  7271. } htt_vdev_rtt_resp_stats_t;
  7272. #endif /* ATH_TARGET */
  7273. typedef struct {
  7274. htt_tlv_hdr_t tlv_hdr;
  7275. A_UINT32 vdev_id;
  7276. /**
  7277. * No of Fine Timing Measurement request frames transmitted successfully
  7278. */
  7279. A_UINT32 tx_ftmr_cnt;
  7280. /**
  7281. * No of Fine Timing Measurement request frames not transmitted successfully
  7282. */
  7283. A_UINT32 tx_ftmr_fail;
  7284. /**
  7285. * No of Fine Timing Measurement request frames transmitted successfully
  7286. * after retry
  7287. */
  7288. A_UINT32 tx_ftmr_suc_retry;
  7289. /**
  7290. * No of Fine Timing Measurement frames received, including initial,
  7291. * non-initial, and duplicates
  7292. */
  7293. A_UINT32 rx_ftm_cnt;
  7294. /** Initiator Terminate count */
  7295. A_UINT32 initiator_terminate_cnt;
  7296. /** Debug count to check the Measurement request from host */
  7297. A_UINT32 tx_meas_req_count;
  7298. } htt_stats_vdev_rtt_init_stats_tlv;
  7299. /* preserve old name alias for new name consistent with the tag name */
  7300. typedef htt_stats_vdev_rtt_init_stats_tlv htt_vdev_rtt_init_stats_tlv;
  7301. #ifdef ATH_TARGET
  7302. typedef struct {
  7303. htt_stats_vdev_rtt_init_stats_tlv vdev_rtt_init_stats;
  7304. } htt_vdev_rtt_init_stats_t;
  7305. #endif /* ATH_TARGET */
  7306. #define HTT_STATS_MAX_SCH_CMD_RESULT 25
  7307. /* TXSEND self generated frames */
  7308. typedef enum {
  7309. HTT_TXSEND_FTYPE_SGEN_TF_POLL,
  7310. HTT_TXSEND_FTYPE_SGEN_TF_SOUND,
  7311. HTT_TXSEND_FTYPE_SGEN_TBR_NDPA,
  7312. HTT_TXSEND_FTYPE_SGEN_TBR_NDP,
  7313. HTT_TXSEND_FTYPE_SGEN_TBR_LMR,
  7314. HTT_TXSEND_FTYPE_SGEN_TF_REPORT,
  7315. HTT_TXSEND_FTYPE_MAX
  7316. }
  7317. htt_stats_txsend_ftype_t;
  7318. typedef struct {
  7319. htt_tlv_hdr_t tlv_hdr;
  7320. /* 11AZ TBR SU Stats */
  7321. A_UINT32 tbr_su_ftype_queued[HTT_TXSEND_FTYPE_MAX];
  7322. /* 11AZ TBR MU Stats */
  7323. A_UINT32 tbr_mu_ftype_queued[HTT_TXSEND_FTYPE_MAX];
  7324. } htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv;
  7325. typedef struct {
  7326. htt_tlv_hdr_t tlv_hdr;
  7327. /** tbr_num_sch_cmd_result_buckets:
  7328. * Number of sch cmd results buckets in use per chip
  7329. * Each bucket contains the counter of the number of times that bucket
  7330. * index was seen in the sch_cmd_result. The last bucket will capture
  7331. * the count of sch_cmd_result matching the last bucket index and the
  7332. * count of all the sch_cmd_results that exceeded the last bucket index
  7333. * value.
  7334. * tbr_num_sch_cmd_result_buckets must be <= HTT_STATS_MAX_SCH_CMD_RESULT
  7335. */
  7336. A_UINT32 tbr_num_sch_cmd_result_buckets;
  7337. /* cmd result status for SU frames in case of TB ranging */
  7338. A_UINT32 opaque_tbr_su_ftype_cmd_result[HTT_TXSEND_FTYPE_MAX][HTT_STATS_MAX_SCH_CMD_RESULT];
  7339. /* cmd result status for MU frames in case of TB ranging */
  7340. A_UINT32 opaque_tbr_mu_ftype_cmd_result[HTT_TXSEND_FTYPE_MAX][HTT_STATS_MAX_SCH_CMD_RESULT];
  7341. } htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv;
  7342. typedef struct {
  7343. htt_tlv_hdr_t tlv_hdr;
  7344. /** ista_ranging_ndpa_cnt:
  7345. * Indicates the number of Ranging NDPA sent successfully.
  7346. */
  7347. A_UINT32 ista_ranging_ndpa_cnt;
  7348. /** ista_ranging_ndp_cnt:
  7349. * Indicates the number of Ranging NDP sent successfully.
  7350. */
  7351. A_UINT32 ista_ranging_ndp_cnt;
  7352. /** ista_ranging_i2r_lmr_cnt:
  7353. * Indicates the number of Ranging I2R LMR sent successfully.
  7354. */
  7355. A_UINT32 ista_ranging_i2r_lmr_cnt;
  7356. /** rtsa_ranging_resp_cnt
  7357. * Indicates the number of times RXPCU initiates a Ranging response
  7358. * as a RSTA.
  7359. */
  7360. A_UINT32 rtsa_ranging_resp_cnt;
  7361. /** rtsa_ranging_ndp_cnt:
  7362. * Indicates the number of Ranging NDP response sent successfully.
  7363. */
  7364. A_UINT32 rtsa_ranging_ndp_cnt;
  7365. /** rsta_ranging_lmr_cnt:
  7366. * Indicates the number of Ranging R2I LMR response sent successfully.
  7367. */
  7368. A_UINT32 rsta_ranging_lmr_cnt;
  7369. /** tb_ranging_cts2s_rcvd_cnt:
  7370. * Indicates the number of expected CTS2S response received for TF Poll
  7371. * sent.
  7372. */
  7373. A_UINT32 tb_ranging_cts2s_rcvd_cnt;
  7374. /** tb_ranging_ndp_rcvd_cnt:
  7375. * Indicates the number of expected NDP response received for TF Sound
  7376. * or Secure Sound sent.
  7377. */
  7378. A_UINT32 tb_ranging_ndp_rcvd_cnt;
  7379. /** tb_ranging_lmr_rcvd_cnt:
  7380. * Indicates the number of expected LMR response received for TF Report
  7381. * sent.
  7382. */
  7383. A_UINT32 tb_ranging_lmr_rcvd_cnt;
  7384. /** tb_ranging_tf_poll_resp_sent_cnt:
  7385. * Indicates the number of successful responses sent for TF Poll
  7386. * received.
  7387. */
  7388. A_UINT32 tb_ranging_tf_poll_resp_sent_cnt;
  7389. /** tb_ranging_tf_sound_resp_sent_cnt:
  7390. * Indicates the number of successful responses sent for TF Sound
  7391. * (or Secure) received.
  7392. */
  7393. A_UINT32 tb_ranging_tf_sound_resp_sent_cnt;
  7394. /** tb_ranging_tf_report_resp_sent_cnt:
  7395. * Indicates the number of successful responses sent for TF Report
  7396. * received.
  7397. */
  7398. A_UINT32 tb_ranging_tf_report_resp_sent_cnt;
  7399. } htt_stats_pdev_rtt_hw_stats_tlv;
  7400. typedef struct {
  7401. htt_tlv_hdr_t tlv_hdr;
  7402. A_UINT32 pdev_id;
  7403. /** tx_11mc_ftm_suc:
  7404. * Number of 11mc Fine Timing Measurement frames transmitted successfully.
  7405. */
  7406. A_UINT32 tx_11mc_ftm_suc;
  7407. /** tx_11mc_ftm_suc_retry:
  7408. * Number of Fine Timing Measurement frames transmitted successfully
  7409. * after retrying.
  7410. */
  7411. A_UINT32 tx_11mc_ftm_suc_retry;
  7412. /** tx_11mc_ftm_fail:
  7413. * Number of Fine Timing Measurement frames not transmitted successfully.
  7414. */
  7415. A_UINT32 tx_11mc_ftm_fail;
  7416. /** rx_11mc_ftmr_cnt:
  7417. * Number of FTMR frames received, including initial, non-initial,
  7418. * and duplicates.
  7419. */
  7420. A_UINT32 rx_11mc_ftmr_cnt;
  7421. /** rx_11mc_ftmr_dup_cnt:
  7422. * Number of duplicate Fine Timing Measurement Request frames received,
  7423. * including both initial and non-initial.
  7424. */
  7425. A_UINT32 rx_11mc_ftmr_dup_cnt;
  7426. /** rx_11mc_iftmr_cnt:
  7427. * Number of initial Fine Timing Measurement Request frames received.
  7428. */
  7429. A_UINT32 rx_11mc_iftmr_cnt;
  7430. /** rx_11mc_iftmr_dup_cnt:
  7431. * Number of duplicate initial Fine Timing Measurement Request frames
  7432. * received.
  7433. */
  7434. A_UINT32 rx_11mc_iftmr_dup_cnt;
  7435. /** ftmr_drop_11mc_resp_role_not_enabled_cnt:
  7436. * Number of FTMR frames dropped as 11mc is not supported for this VAP.
  7437. */
  7438. A_UINT32 ftmr_drop_11mc_resp_role_not_enabled_cnt;
  7439. /** initiator_active_responder_rejected_cnt:
  7440. * Number of responder sessions rejected when initiator was active.
  7441. */
  7442. A_UINT32 initiator_active_responder_rejected_cnt;
  7443. /** responder_terminate_cnt:
  7444. * Number of times Responder session got terminated.
  7445. */
  7446. A_UINT32 responder_terminate_cnt;
  7447. /** active_rsta_open:
  7448. * Number of active responder contexts in open mode.
  7449. */
  7450. A_UINT32 active_rsta_open;
  7451. /** active_rsta_mac:
  7452. * Number of active responder contexts in mac security mode.
  7453. */
  7454. A_UINT32 active_rsta_mac;
  7455. /** active_rsta_mac_phy:
  7456. * Number of active responder contexts in mac_phy security mode.
  7457. */
  7458. A_UINT32 active_rsta_mac_phy;
  7459. /** num_assoc_ranging_peers:
  7460. * Number of active associated ISTA ranging peers.
  7461. */
  7462. A_UINT32 num_assoc_ranging_peers;
  7463. /** num_unassoc_ranging_peers:
  7464. * Number of active un-associated ISTA ranging peers.
  7465. */
  7466. A_UINT32 num_unassoc_ranging_peers;
  7467. /** responder_alloc_cnt:
  7468. * Number of responder contexts allocated.
  7469. */
  7470. A_UINT32 responder_alloc_cnt;
  7471. /** responder_alloc_failure:
  7472. * Number of times responder context failed to be allocated.
  7473. */
  7474. A_UINT32 responder_alloc_failure;
  7475. /** pn_check_failure_cnt:
  7476. * Number of times PN check failed.
  7477. */
  7478. A_UINT32 pn_check_failure_cnt;
  7479. /** pasn_m1_auth_recv_cnt:
  7480. * Num of M1 auth frames received for PASN over the air from iSTA.
  7481. */
  7482. A_UINT32 pasn_m1_auth_recv_cnt;
  7483. /** pasn_m1_auth_drop_cnt:
  7484. * Number of M1 auth frames received for PASN over the air from iSTA
  7485. * but dropped in FW due to any reason (such as unavailability of
  7486. * responder ctxt or any other check).
  7487. */
  7488. A_UINT32 pasn_m1_auth_drop_cnt;
  7489. /** pasn_m2_auth_recv_cnt:
  7490. * Number of M2 auth frames received in FW for PASN from Host driver.
  7491. */
  7492. A_UINT32 pasn_m2_auth_recv_cnt;
  7493. /** pasn_m2_auth_tx_fail_cnt:
  7494. * Number of M2 auth frames received in FW but Tx failed.
  7495. */
  7496. A_UINT32 pasn_m2_auth_tx_fail_cnt;
  7497. /** pasn_m3_auth_recv_cnt:
  7498. * Number of M3 auth frames received for PASN.
  7499. */
  7500. A_UINT32 pasn_m3_auth_recv_cnt;
  7501. /** pasn_m3_auth_drop_cnt:
  7502. * Number of M3 auth frames received for PASN over the air from iSTA but
  7503. * dropped in FW due to any reason.
  7504. */
  7505. A_UINT32 pasn_m3_auth_drop_cnt;
  7506. /** pasn_peer_create_request_cnt:
  7507. * Number of times FW requested PASN peer create request to Host.
  7508. */
  7509. A_UINT32 pasn_peer_create_request_cnt;
  7510. /** pasn_peer_create_timeout_cnt:
  7511. * Number of times PASN peer was not created within timeout period.
  7512. */
  7513. A_UINT32 pasn_peer_create_timeout_cnt;
  7514. /** pasn_peer_created_cnt:
  7515. * Number of times Host sent PASN peer create request to FW.
  7516. */
  7517. A_UINT32 pasn_peer_created_cnt;
  7518. /** sec_ranging_not_supported_mfp_not_setup:
  7519. * management frame protection not setup, drop secure ranging request.
  7520. */
  7521. A_UINT32 sec_ranging_not_supported_mfp_not_setup;
  7522. /** non_sec_ranging_discarded_for_assoc_peer_with_mfpr_set:
  7523. * Non secured ranging request discarded for Assoc peer with MFPR set.
  7524. */
  7525. A_UINT32 non_sec_ranging_discarded_for_assoc_peer_with_mfpr_set;
  7526. /** open_ranging_discarded_with_URNM_MFPR_set_for_pasn_peer:
  7527. * Failure in case non-secured frame is received for PASN peer and
  7528. * URNM_MFPR is set.
  7529. */
  7530. A_UINT32 open_ranging_discarded_with_URNM_MFPR_set_for_pasn_peer;
  7531. /** unassoc_non_pasn_ranging_not_supported_with_URNM_MFPR:
  7532. * Failure in case non-assoc/non-PASN sta is sending open FTMR and
  7533. * RSTA does not support un-secured ranging.
  7534. */
  7535. A_UINT32 unassoc_non_pasn_ranging_not_supported_with_URNM_MFPR;
  7536. /** num_req_bw_20_MHz:
  7537. * Number of requests with BW 20 MHz.
  7538. */
  7539. A_UINT32 num_req_bw_20_MHz;
  7540. /** num_req_bw_40_MHz:
  7541. * Number of requests with BW 40 MHz.
  7542. */
  7543. A_UINT32 num_req_bw_40_MHz;
  7544. /** num_req_bw_80_MHz:
  7545. * Number of requests with BW 80 MHz.
  7546. */
  7547. A_UINT32 num_req_bw_80_MHz;
  7548. /** num_req_bw_160_MHz:
  7549. * Number of requests with BW 160 MHz.
  7550. */
  7551. A_UINT32 num_req_bw_160_MHz;
  7552. /** tx_11az_ftm_successful:
  7553. * Number of 11AZ FTM frames transmitted successfully.
  7554. */
  7555. A_UINT32 tx_11az_ftm_successful;
  7556. /** tx_11az_ftm_failed:
  7557. * Number of 11AZ FTM frames for which Tx failed.
  7558. */
  7559. A_UINT32 tx_11az_ftm_failed;
  7560. /** rx_11az_ftmr_cnt:
  7561. * Number of 11AZ FTM frames received.
  7562. */
  7563. A_UINT32 rx_11az_ftmr_cnt;
  7564. /** rx_11az_ftmr_dup_cnt:
  7565. * Number of duplicate 11az ftmr frames dropped.
  7566. */
  7567. A_UINT32 rx_11az_ftmr_dup_cnt;
  7568. /** rx_11az_iftmr_dup_cnt:
  7569. * Number of duplicate 11az iftmr frames dropped.
  7570. */
  7571. A_UINT32 rx_11az_iftmr_dup_cnt;
  7572. /** malformed_ftmr:
  7573. * Number of malformed FTMR frames received from client leading to
  7574. * frame parse error.
  7575. */
  7576. A_UINT32 malformed_ftmr;
  7577. /** ftmr_drop_ntb_resp_role_not_enabled_cnt:
  7578. * Number of FTMR frames dropped as NTB is not supported for this VAP.
  7579. */
  7580. A_UINT32 ftmr_drop_ntb_resp_role_not_enabled_cnt;
  7581. /** ftmr_drop_tb_resp_role_not_enabled_cnt:
  7582. * Number of FTMR frames dropped as TB is not supported for this VAP.
  7583. */
  7584. A_UINT32 ftmr_drop_tb_resp_role_not_enabled_cnt;
  7585. /** invalid_ftm_request_params:
  7586. * Number of FTMR frames received with invalid params.
  7587. */
  7588. A_UINT32 invalid_ftm_request_params;
  7589. /** requested_bw_format_not_supported:
  7590. * FTMR rejected as requested format is lower or higher than AP's
  7591. * capability, or unknown.
  7592. */
  7593. A_UINT32 requested_bw_format_not_supported;
  7594. /** ntb_unsec_unassoc_mode_ranging_peer_alloc_failed:
  7595. * AST entry creation failed for NTB unsecured mode.
  7596. */
  7597. A_UINT32 ntb_unsec_unassoc_mode_ranging_peer_alloc_failed;
  7598. /** tb_unassoc_unsec_mode_pasn_peer_creation_failed:
  7599. * PASN peer creation failed for unsecured mode TBR.
  7600. */
  7601. A_UINT32 tb_unassoc_unsec_mode_pasn_peer_creation_failed;
  7602. /** num_ranging_sequences_processed:
  7603. * Number of ranging sequences processed for NTB and TB.
  7604. */
  7605. A_UINT32 num_ranging_sequences_processed;
  7606. /** Number of NDPs transmitted for NTBR */
  7607. A_UINT32 ntb_tx_ndp;
  7608. A_UINT32 ndp_rx_cnt;
  7609. /** Number of NDPAs received for 11AZ NTB ranging */
  7610. A_UINT32 num_ntb_ranging_NDPAs_recv;
  7611. /** Number of LMR frames received */
  7612. A_UINT32 recv_lmr;
  7613. /** invalid_ftmr_cnt:
  7614. * Number of invalid FTMR frames received
  7615. * iftmr with null ie element is invalid
  7616. * The Frame is valid if any of the following combination is present:
  7617. * a. LCI sub ie + parameter ie
  7618. * b. LCR sub ie + parameter ie
  7619. * c. parameter ie
  7620. * d. LCI sub ie + LCR sub ie + parameter ie
  7621. */
  7622. A_UINT32 invalid_ftmr_cnt;
  7623. /** Number of times the 'max time b/w measurement' timer got expired */
  7624. A_UINT32 max_time_bw_meas_exp_cnt;
  7625. } htt_stats_pdev_rtt_resp_stats_tlv;
  7626. /* STATS_TYPE: HTT_DBG_EXT_PDEV_RTT_RESP_STATS
  7627. * TLV_TAGS:
  7628. * HTT_STATS_PDEV_RTT_RESP_STATS_TAG
  7629. * HTT_STATS_PDEV_RTT_HW_STATS_TAG
  7630. * HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG
  7631. * HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG
  7632. */
  7633. #ifdef ATH_TARGET
  7634. typedef struct {
  7635. htt_stats_pdev_rtt_resp_stats_tlv pdev_rtt_resp_stats;
  7636. htt_stats_pdev_rtt_hw_stats_tlv pdev_rtt_hw_stats;
  7637. htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv pdev_rtt_tbr_selfgen_queued_stats;
  7638. htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv pdev_rtt_tbr_cmd_result_stats;
  7639. } htt_pdev_rtt_resp_stats_t;
  7640. #endif /* ATH_TARGET */
  7641. typedef struct {
  7642. htt_tlv_hdr_t tlv_hdr;
  7643. A_UINT32 pdev_id;
  7644. /** tx_11mc_ftmr_cnt:
  7645. * Number of 11mc Fine Timing Measurement request frames transmitted
  7646. * successfully.
  7647. */
  7648. A_UINT32 tx_11mc_ftmr_cnt;
  7649. /** tx_11mc_ftmr_fail:
  7650. * Number of 11mc Fine Timing Measurement request frames not transmitted
  7651. * successfully.
  7652. */
  7653. A_UINT32 tx_11mc_ftmr_fail;
  7654. /** tx_11mc_ftmr_suc_retry:
  7655. * Number of 11mc Fine Timing Measurement request frames transmitted
  7656. * successfully after retrying.
  7657. */
  7658. A_UINT32 tx_11mc_ftmr_suc_retry;
  7659. /** rx_11mc_ftm_cnt:
  7660. * Number of 11mc Fine Timing Measurement frames received, including
  7661. * initial, non-initial, and duplicates.
  7662. */
  7663. A_UINT32 rx_11mc_ftm_cnt;
  7664. /** Count of Ranging Measurement requests received from host */
  7665. A_UINT32 tx_meas_req_count;
  7666. /** Initiator role not supported on the vdev */
  7667. A_UINT32 init_role_not_enabled;
  7668. /** Number of times Initiator context got terminated */
  7669. A_UINT32 initiator_terminate_cnt;
  7670. /** Number of times Tx of FTMR failed */
  7671. A_UINT32 tx_11az_ftmr_fail;
  7672. /** tx_11az_ftmr_start:
  7673. * Number of Fine Timing Measurement start requests transmitted
  7674. * successfully.
  7675. */
  7676. A_UINT32 tx_11az_ftmr_start;
  7677. /** tx_11az_ftmr_stop:
  7678. * Number of Fine Timing Measurement stop requests transmitted
  7679. * successfully.
  7680. */
  7681. A_UINT32 tx_11az_ftmr_stop;
  7682. /** Number of FTM frames received successfully */
  7683. A_UINT32 rx_11az_ftm_cnt;
  7684. /** Number of active ISTA sessions */
  7685. A_UINT32 active_ista;
  7686. /** HE preamble not enabled on Initiator side */
  7687. A_UINT32 invalid_preamble;
  7688. /** Initiator invalid channel bw format */
  7689. A_UINT32 invalid_chan_bw_format;
  7690. /* mgmt_buff_alloc_fail_cnt Management Buffer allocation failure count */
  7691. A_UINT32 mgmt_buff_alloc_fail_cnt;
  7692. /** ftm_parse_failure:
  7693. * Count of FTM frame IE parse failure or RSTA sending measurement
  7694. * negotiation failure.
  7695. */
  7696. A_UINT32 ftm_parse_failure;
  7697. /** Count of NTB/TB ranging negotiation completed successfully */
  7698. A_UINT32 ranging_negotiation_successful_cnt;
  7699. /** incompatible_ftm_params:
  7700. * Number of occurrences of failure due to incompatible parameters
  7701. * suggested by rSTA during negotiation.
  7702. */
  7703. A_UINT32 incompatible_ftm_params;
  7704. /** sec_ranging_req_in_open_mode:
  7705. * Number of occurrences of failure if BSS peer exists in open mode and
  7706. * secured mode RTT ranging is requested.
  7707. */
  7708. A_UINT32 sec_ranging_req_in_open_mode;
  7709. /** ftmr_tx_failed_null_11az_peer:
  7710. * Number of occurrences where FTMR was not transmitted as there was
  7711. * no 11AZ peer.
  7712. */
  7713. A_UINT32 ftmr_tx_failed_null_11az_peer;
  7714. /** Number of times ftmr retry timed out */
  7715. A_UINT32 ftmr_retry_timeout;
  7716. /** Number of times the 'max time b/w measurement' timer got expired */
  7717. A_UINT32 max_time_bw_meas_exp_cnt;
  7718. /** tb_meas_duration_expiry_cnt:
  7719. * Number of times TBR measurement duration expired.
  7720. */
  7721. A_UINT32 tb_meas_duration_expiry_cnt;
  7722. /** num_tb_ranging_requests:
  7723. * Number of TB ranging requests ready for negotiation.
  7724. */
  7725. A_UINT32 num_tb_ranging_requests;
  7726. /** Number of times NTB ranging was triggered successfully */
  7727. A_UINT32 ntbr_triggered_successfully;
  7728. /** Number of times NTB ranging failed to be triggered */
  7729. A_UINT32 ntbr_trigger_failed;
  7730. /** No valid index found for programming vreg settings */
  7731. A_UINT32 invalid_or_no_vreg_idx;
  7732. /** Number of times VREG setting failed */
  7733. A_UINT32 set_vreg_params_failed;
  7734. /** Number of occurrences of SAC mismatch */
  7735. A_UINT32 sac_mismatch;
  7736. /** pasn_m1_auth_recv_cnt:
  7737. * Number of M1 auth frames received for PASN from Host.
  7738. */
  7739. A_UINT32 pasn_m1_auth_recv_cnt;
  7740. /** pasn_m1_auth_tx_fail_cnt:
  7741. * Number of M1 auth frames received in FW but Tx failed.
  7742. */
  7743. A_UINT32 pasn_m1_auth_tx_fail_cnt;
  7744. /** pasn_m2_auth_recv_cnt:
  7745. * Number of M2 auth frames received in FW for PASN over the air from rSTA.
  7746. */
  7747. A_UINT32 pasn_m2_auth_recv_cnt;
  7748. /** pasn_m2_auth_drop_cnt:
  7749. * Number of M2 auth frames received in FW but dropped due to any reason.
  7750. */
  7751. A_UINT32 pasn_m2_auth_drop_cnt;
  7752. /** pasn_m3_auth_recv_cnt:
  7753. * Number of M3 auth frames received for PASN from Host.
  7754. */
  7755. A_UINT32 pasn_m3_auth_recv_cnt;
  7756. /** pasn_m3_auth_tx_fail_cnt:
  7757. * Number of M3 auth frames received in FW but Tx failed.
  7758. */
  7759. A_UINT32 pasn_m3_auth_tx_fail_cnt;
  7760. /** pasn_peer_create_request_cnt:
  7761. * Number of times FW requested PASN peer create request to Host.
  7762. */
  7763. A_UINT32 pasn_peer_create_request_cnt;
  7764. /** pasn_peer_create_timeout_cnt:
  7765. * Number of times PASN peer was not created within timeout period.
  7766. */
  7767. A_UINT32 pasn_peer_create_timeout_cnt;
  7768. /** pasn_peer_created_cnt:
  7769. * Number of times Host sent PASN peer create request to FW.
  7770. */
  7771. A_UINT32 pasn_peer_created_cnt;
  7772. /** Number of occurrences of Tx of NDPA failing */
  7773. A_UINT32 ntbr_ndpa_failed;
  7774. /** ntbr_sequence_successful:
  7775. * The NDPA, NDP and LMR exchanges are successful and sched cmd status
  7776. * is 0.
  7777. */
  7778. A_UINT32 ntbr_sequence_successful;
  7779. /** ntbr_ndp_failed:
  7780. * Number of occurrences of NDPA being transmitted successfully
  7781. * but NDP failing for NTB ranging.
  7782. */
  7783. A_UINT32 ntbr_ndp_failed;
  7784. /** sch_cmd_status_cnts:
  7785. * Elements 0-7 count the number of times the sch_cmd_status was equal to
  7786. * the corresponding value of the index of the array sch_cmd_status_cnts[],
  7787. * and element 8 counts the numbers of times the status was some other
  7788. * value >=8.
  7789. */
  7790. A_UINT32 sch_cmd_status_cnts[9];
  7791. /** Number of times LMR reception timed out */
  7792. A_UINT32 lmr_timeout;
  7793. /** Number of LMR frames received */
  7794. A_UINT32 lmr_recv;
  7795. /** Number of trigger frames received */
  7796. A_UINT32 num_trigger_frames_received;
  7797. /** Number of NDPAs received for TBR */
  7798. A_UINT32 num_tb_ranging_NDPAs_recv;
  7799. /** Number of ranging NDPs received for NTBR/TB */
  7800. A_UINT32 ndp_rx_cnt;
  7801. } htt_stats_pdev_rtt_init_stats_tlv;
  7802. /* STATS_TYPE: HTT_DBG_EXT_PDEV_RTT_INITIATOR_STATS
  7803. * TLV_TAGS:
  7804. * HTT_STATS_PDEV_RTT_INIT_STATS_TAG
  7805. * HTT_STATS_PDEV_RTT_HW_STATS_TAG
  7806. */
  7807. #ifdef ATH_TARGET
  7808. typedef struct {
  7809. htt_stats_pdev_rtt_init_stats_tlv pdev_rtt_init_stats;
  7810. htt_stats_pdev_rtt_hw_stats_tlv pdev_rtt_hw_stats;
  7811. } htt_pdev_rtt_init_stats_t;
  7812. #endif /* ATH_TARGET */
  7813. enum {
  7814. HTT_STATS_WIFI_RADAR_CAL_TYPE_NONE = 0,
  7815. HTT_STATS_WIFI_RADAR_CAL_TYPE_GAIN_BINARY_SEARCH = 1,
  7816. HTT_STATS_WIFI_RADAR_CAL_TYPE_TX_GAIN_BINARY_SEARCH = 2,
  7817. HTT_STATS_WIFI_RADAR_CAL_TYPE_RECAL_GAIN_VALIDATION = 3,
  7818. HTT_STATS_WIFI_RADAR_CAL_TYPE_RECAL_GAIN_BINARY_SEARCH = 4,
  7819. /* the value 5 is reserved for future use */
  7820. HTT_STATS_NUM_WIFI_RADAR_CAL_TYPES = 6
  7821. };
  7822. enum {
  7823. HTT_STATS_WIFI_RADAR_CAL_FAILURE_NONE = 0,
  7824. HTT_STATS_WIFI_RADAR_CAL_FAILURE_DPD_ABORT = 1,
  7825. HTT_STATS_WIFI_RADAR_CAL_FAILURE_CONVERGENCE = 2,
  7826. HTT_STATS_WIFI_RADAR_CAL_FAILURE_TX_EXCEEDS_RETRY = 3,
  7827. HTT_STATS_WIFI_RADAR_CAL_FAILURE_CAPTURE = 4,
  7828. HTT_STATS_WIFI_RADAR_CAL_FAILURE_NEW_CHANNEL_CHANGE = 5,
  7829. HTT_STATS_WIFI_RADAR_CAL_FAILURE_NEW_CAL_REQ = 6,
  7830. /* the values 7-9 are reserved for future use */
  7831. HTT_STATS_NUM_WIFI_RADAR_CAL_FAILURE_REASONS = 10
  7832. };
  7833. typedef struct {
  7834. htt_tlv_hdr_t tlv_hdr;
  7835. A_UINT32 capture_in_progress;
  7836. A_UINT32 calibration_in_progress;
  7837. /* Capture time interval, in ms */
  7838. A_UINT32 periodicity;
  7839. /* Last user request timestamp, in ms */
  7840. A_UINT32 latest_req_timestamp;
  7841. /* Last target res timestamp, in ms */
  7842. A_UINT32 latest_resp_timestamp;
  7843. /* Time taken by last calibration to end, in ms */
  7844. A_UINT32 latest_calibration_timing;
  7845. /* Time taken by last calibration to end, in ms for each chain */
  7846. A_UINT32 calibration_timing_per_chain[HTT_STATS_MAX_CHAINS];
  7847. /* To log user request count */
  7848. A_UINT32 wifi_radar_req_count;
  7849. /* Total packet success count */
  7850. A_UINT32 num_wifi_radar_pkt_success;
  7851. /* Total packet queued count */
  7852. A_UINT32 num_wifi_radar_pkt_queued;
  7853. /* Total packet success count during latest calibration alone */
  7854. A_UINT32 num_wifi_radar_cal_pkt_success;
  7855. /* Tx Gain Calibration Output - Initial Tx Gain index*/
  7856. A_UINT32 wifi_radar_cal_init_tx_gain;
  7857. /* Last Calibration Type, refer to HTT_STATS_WIFI_RADAR_CAL_TYPE_ consts */
  7858. A_UINT32 latest_wifi_radar_cal_type;
  7859. /* Calibration Type counters */
  7860. A_UINT32 wifi_radar_cal_type_counts[HTT_STATS_NUM_WIFI_RADAR_CAL_TYPES];
  7861. /*
  7862. * Last Calibration Fail Reason,
  7863. * refer to HTT_STATS_WIFI_RADAR_CAL_FAILURE_ consts
  7864. */
  7865. A_UINT32 latest_wifi_radar_cal_fail_reason;
  7866. /* Calibration Fail Reason counters */
  7867. A_UINT32 wifi_radar_cal_fail_reason_counts[HTT_STATS_NUM_WIFI_RADAR_CAL_FAILURE_REASONS];
  7868. /* WiFi Radar Licensed for SKU: 0 - No; 1 - Yes */
  7869. A_UINT32 wifi_radar_licensed;
  7870. /*
  7871. * cmd result to show failure count of CTS2SELF across MAX_CMD_RESULT
  7872. * reasons
  7873. */
  7874. A_UINT32 cmd_results_cts2self[HTT_STATS_MAX_SCH_CMD_RESULT];
  7875. /*
  7876. * cmd result to show failure count of wifi radar across MAX_CMD_RESULT
  7877. * reasons
  7878. */
  7879. A_UINT32 cmd_results_wifi_radar[HTT_STATS_MAX_SCH_CMD_RESULT];
  7880. /* Tx gain index from gain table obtained/used for calibration */
  7881. A_UINT32 wifi_radar_tx_gains[HTT_STATS_MAX_CHAINS];
  7882. /* Rx gain index from gain table obtained/used from calibration */
  7883. A_UINT32 wifi_radar_rx_gains[HTT_STATS_MAX_CHAINS][HTT_STATS_MAX_CHAINS];
  7884. } htt_stats_tx_pdev_wifi_radar_tlv;
  7885. /* STATS_TYPE : HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS
  7886. * TLV_TAGS:
  7887. * - HTT_STATS_PKTLOG_AND_HTT_RING_STATS_TAG
  7888. */
  7889. /* NOTE:
  7890. * This structure is for documentation, and cannot be safely used directly.
  7891. * Instead, use the constituent TLV structures to fill/parse.
  7892. */
  7893. typedef struct {
  7894. htt_tlv_hdr_t tlv_hdr;
  7895. /** No of pktlog payloads that were dropped in htt_ppdu_stats path */
  7896. A_UINT32 pktlog_lite_drop_cnt;
  7897. /** No of pktlog payloads that were dropped in TQM path */
  7898. A_UINT32 pktlog_tqm_drop_cnt;
  7899. /** No of pktlog ppdu stats payloads that were dropped */
  7900. A_UINT32 pktlog_ppdu_stats_drop_cnt;
  7901. /** No of pktlog ppdu ctrl payloads that were dropped */
  7902. A_UINT32 pktlog_ppdu_ctrl_drop_cnt;
  7903. /** No of pktlog sw events payloads that were dropped */
  7904. A_UINT32 pktlog_sw_events_drop_cnt;
  7905. } htt_stats_pktlog_and_htt_ring_stats_tlv;
  7906. /* preserve old name alias for new name consistent with the tag name */
  7907. typedef htt_stats_pktlog_and_htt_ring_stats_tlv
  7908. htt_pktlog_and_htt_ring_stats_tlv;
  7909. #define HTT_DLPAGER_STATS_MAX_HIST 10
  7910. #define HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_M 0x000000FF
  7911. #define HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_S 0
  7912. #define HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_M 0x0000FF00
  7913. #define HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_S 8
  7914. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_M 0x0000FFFF
  7915. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_S 0
  7916. #define HTT_DLPAGER_TOTAL_FREE_PAGES_M 0xFFFF0000
  7917. #define HTT_DLPAGER_TOTAL_FREE_PAGES_S 16
  7918. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_M 0x0000FFFF
  7919. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_S 0
  7920. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_M 0xFFFF0000
  7921. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_S 16
  7922. #define HTT_DLPAGER_ASYNC_LOCK_PAGE_COUNT_GET(_var) \
  7923. (((_var) & HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_M) >> \
  7924. HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_S)
  7925. #define HTT_STATS_DLPAGER_STATS_DL_PAGER_STATS_ASYNC_LOCK_GET(_var) \
  7926. HTT_DLPAGER_ASYNC_LOCK_PAGE_COUNT_GET(_var)
  7927. #define HTT_DLPAGER_ASYNC_LOCK_PAGE_COUNT_SET(_var, _val) \
  7928. do { \
  7929. HTT_CHECK_SET_VAL(HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT, _val); \
  7930. ((_var) &= ~(HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_M));\
  7931. ((_var) |= ((_val) << HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_S)); \
  7932. } while (0)
  7933. #define HTT_DLPAGER_SYNC_LOCK_PAGE_COUNT_GET(_var) \
  7934. (((_var) & HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_M) >> \
  7935. HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_S)
  7936. #define HTT_STATS_DLPAGER_STATS_DL_PAGER_STATS_SYNC_LOCK_GET(_var) \
  7937. HTT_DLPAGER_SYNC_LOCK_PAGE_COUNT_GET(_var)
  7938. #define HTT_DLPAGER_SYNC_LOCK_PAGE_COUNT_SET(_var, _val) \
  7939. do { \
  7940. HTT_CHECK_SET_VAL(HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT, _val); \
  7941. ((_var) &= ~(HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_M));\
  7942. ((_var) |= ((_val) << HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_S)); \
  7943. } while (0)
  7944. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_GET(_var) \
  7945. (((_var) & HTT_DLPAGER_TOTAL_LOCKED_PAGES_M) >> \
  7946. HTT_DLPAGER_TOTAL_LOCKED_PAGES_S)
  7947. #define HTT_STATS_DLPAGER_STATS_DL_PAGER_STATS_TOTAL_LOCKED_PAGES_GET(_var) \
  7948. HTT_DLPAGER_TOTAL_LOCKED_PAGES_GET(_var)
  7949. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_SET(_var, _val) \
  7950. do { \
  7951. HTT_CHECK_SET_VAL(HTT_DLPAGER_TOTAL_LOCKED_PAGES, _val); \
  7952. ((_var) &= ~(HTT_DLPAGER_TOTAL_LOCKED_PAGES_M)); \
  7953. ((_var) |= ((_val) << HTT_DLPAGER_TOTAL_LOCKED_PAGES_S)); \
  7954. } while (0)
  7955. #define HTT_DLPAGER_TOTAL_FREE_PAGES_GET(_var) \
  7956. (((_var) & HTT_DLPAGER_TOTAL_FREE_PAGES_M) >> \
  7957. HTT_DLPAGER_TOTAL_FREE_PAGES_S)
  7958. #define HTT_STATS_DLPAGER_STATS_DL_PAGER_STATS_TOTAL_FREE_PAGES_GET(_var) \
  7959. HTT_DLPAGER_TOTAL_FREE_PAGES_GET(_var)
  7960. #define HTT_DLPAGER_TOTAL_FREE_PAGES_SET(_var, _val) \
  7961. do { \
  7962. HTT_CHECK_SET_VAL(HTT_DLPAGER_TOTAL_FREE_PAGES, _val); \
  7963. ((_var) &= ~(HTT_DLPAGER_TOTAL_FREE_PAGES_M)); \
  7964. ((_var) |= ((_val) << HTT_DLPAGER_TOTAL_FREE_PAGES_S)); \
  7965. } while (0)
  7966. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_GET(_var) \
  7967. (((_var) & HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_M) >> \
  7968. HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_S)
  7969. #define HTT_STATS_DLPAGER_STATS_DL_PAGER_STATS_LAST_LOCKED_PAGE_IDX_GET(_var) \
  7970. HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_GET(_var)
  7971. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_SET(_var, _val) \
  7972. do { \
  7973. HTT_CHECK_SET_VAL(HTT_DLPAGER_LAST_LOCKED_PAGE_IDX, _val); \
  7974. ((_var) &= ~(HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_M)); \
  7975. ((_var) |= ((_val) << HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_S)); \
  7976. } while (0)
  7977. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_GET(_var) \
  7978. (((_var) & HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_M) >> \
  7979. HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_S)
  7980. #define HTT_STATS_DLPAGER_STATS_DL_PAGER_STATS_LAST_UNLOCKED_PAGE_IDX_GET(_var) \
  7981. HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_GET(_var)
  7982. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_SET(_var, _val) \
  7983. do { \
  7984. HTT_CHECK_SET_VAL(HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX, _val); \
  7985. ((_var) &= ~(HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_M)); \
  7986. ((_var) |= ((_val) << HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_S)); \
  7987. } while (0)
  7988. enum {
  7989. HTT_STATS_PAGE_LOCKED = 0,
  7990. HTT_STATS_PAGE_UNLOCKED = 1,
  7991. HTT_STATS_NUM_PAGE_LOCK_STATES
  7992. };
  7993. /* dlPagerStats structure
  7994. * Number of lock/unlock pages with last 10 lock/unlock occurrences are recorded */
  7995. typedef struct{
  7996. /** msg_dword_1 bitfields:
  7997. * async_lock : 8,
  7998. * sync_lock : 8,
  7999. * reserved : 16;
  8000. */
  8001. union {
  8002. struct {
  8003. A_UINT32 async_lock: 8,
  8004. sync_lock: 8,
  8005. reserved1: 16;
  8006. };
  8007. A_UINT32 msg_dword_1;
  8008. };
  8009. /** mst_dword_2 bitfields:
  8010. * total_locked_pages : 16,
  8011. * total_free_pages : 16;
  8012. */
  8013. union {
  8014. struct {
  8015. A_UINT32 total_locked_pages: 16,
  8016. total_free_pages: 16;
  8017. };
  8018. A_UINT32 msg_dword_2;
  8019. };
  8020. /** msg_dword_3 bitfields:
  8021. * last_locked_page_idx : 16,
  8022. * last_unlocked_page_idx : 16;
  8023. */
  8024. union {
  8025. struct {
  8026. A_UINT32 last_locked_page_idx: 16,
  8027. last_unlocked_page_idx: 16;
  8028. };
  8029. A_UINT32 msg_dword_3;
  8030. };
  8031. struct {
  8032. A_UINT32 page_num;
  8033. A_UINT32 num_of_pages;
  8034. /** timestamp is in microsecond units, from SoC timer clock */
  8035. A_UINT32 timestamp_lsbs;
  8036. A_UINT32 timestamp_msbs;
  8037. } last_pages_info[HTT_STATS_NUM_PAGE_LOCK_STATES][HTT_DLPAGER_STATS_MAX_HIST];
  8038. } htt_dl_pager_stats_tlv;
  8039. /* NOTE:
  8040. * This structure is for documentation, and cannot be safely used directly.
  8041. * Instead, use the constituent TLV structures to fill/parse.
  8042. * STATS_TYPE : HTT_DBG_EXT_STATS_DLPAGER_STATS
  8043. * TLV_TAGS:
  8044. * - HTT_STATS_DLPAGER_STATS_TAG
  8045. */
  8046. typedef struct {
  8047. htt_tlv_hdr_t tlv_hdr;
  8048. htt_dl_pager_stats_tlv dl_pager_stats;
  8049. } htt_stats_dlpager_stats_tlv;
  8050. /* preserve old name alias for new name consistent with the tag name */
  8051. typedef htt_stats_dlpager_stats_tlv htt_dlpager_stats_t;
  8052. /*======= PHY STATS ====================*/
  8053. /*
  8054. * STATS TYPE : HTT_DBG_EXT_PHY_COUNTERS_AND_PHY_STATS
  8055. * TLV_TAGS:
  8056. * - HTT_STATS_PHY_COUNTERS_TAG
  8057. * - HTT_STATS_PHY_STATS_TAG
  8058. */
  8059. #define HTT_MAX_RX_PKT_CNT 8
  8060. #define HTT_MAX_RX_PKT_CRC_PASS_CNT 8
  8061. #define HTT_MAX_PER_BLK_ERR_CNT 20
  8062. #define HTT_MAX_RX_OTA_ERR_CNT 14
  8063. #define HTT_MAX_RX_PKT_CNT_EXT 4
  8064. #define HTT_MAX_RX_PKT_CRC_PASS_CNT_EXT 4
  8065. #define HTT_MAX_RX_PKT_MU_CNT 14
  8066. #define HTT_MAX_TX_PKT_CNT 10
  8067. #define HTT_MAX_PHY_TX_ABORT_CNT 10
  8068. typedef enum {
  8069. HTT_STATS_CHANNEL_HALF_RATE = 0x0001, /* Half rate */
  8070. HTT_STATS_CHANNEL_QUARTER_RATE = 0x0002, /* Quarter rate */
  8071. HTT_STATS_CHANNEL_DFS = 0x0004, /* Enable radar event reporting */
  8072. HTT_STATS_CHANNEL_HOME = 0x0008, /* Home channel */
  8073. HTT_STATS_CHANNEL_PASSIVE_SCAN = 0x0010, /*Passive Scan */
  8074. HTT_STATS_CHANNEL_DFS_SAP_NOT_UP = 0x0020, /* set when VDEV_START_REQUEST, clear when VDEV_UP */
  8075. HTT_STATS_CHANNEL_PASSIVE_SCAN_CAL = 0x0040, /* need to do passive scan calibration to avoid "spikes" */
  8076. HTT_STATS_CHANNEL_DFS_SAP_UP = 0x0080, /* DFS master */
  8077. HTT_STATS_CHANNEL_DFS_CFREQ2 = 0x0100, /* Enable radar event reporting for sec80 in VHT80p80 */
  8078. HTT_STATS_CHANNEL_DTIM_SYNTH = 0x0200, /* Enable DTIM */
  8079. HTT_STATS_CHANNEL_FORCE_GAIN = 0x0400, /* Force gain mmode (only used for FTM) */
  8080. HTT_STATS_CHANNEL_PERFORM_NF_CAL = 0x0800, /* Perform NF cal in channel change (only used for FTM) */
  8081. HTT_STATS_CHANNEL_165_MODE_0 = 0x1000, /* 165 MHz mode 0 */
  8082. HTT_STATS_CHANNEL_165_MODE_1 = 0x2000, /* 165 MHz mode 1 */
  8083. HTT_STATS_CHANNEL_165_MODE_2 = 0x3000, /* 165 MHz mode 2 */
  8084. HTT_STATS_CHANNEL_165_MODE_MASK = 0x3000, /* 165 MHz 2-bit mode mask */
  8085. } HTT_STATS_CHANNEL_FLAGS;
  8086. typedef enum {
  8087. HTT_STATS_RF_MODE_MIN = 0,
  8088. HTT_STATS_RF_MODE_PHYA_ONLY = 0, // only PHYA is active
  8089. HTT_STATS_RF_MODE_DBS = 1, // PHYA/5G and PHYB/2G
  8090. HTT_STATS_RF_MODE_SBS = 2, // PHYA/5G and PHYB/5G in HL/NPR; PHYA0/5G and PHYA1/5G in HK
  8091. HTT_STATS_RF_MODE_PHYB_ONLY = 3, // only PHYB is active
  8092. HTT_STATS_RF_MODE_DBS_SBS = 4, // PHYA0/5G, PHYA1/5G and PHYB/2G in HK (the 2 5G are in different channel)
  8093. HTT_STATS_RF_MODE_DBS_OR_SBS = 5, // PHYA0/5G, PHYA1/5G and PHYB/5G or 2G in HK
  8094. HTT_STATS_RF_MODE_INVALID = 0xff,
  8095. } HTT_STATS_RF_MODE;
  8096. typedef enum {
  8097. HTT_STATS_RESET_CAUSE_FIRST_RESET = 0x00000001, /* First reset by application */
  8098. HTT_STATS_RESET_CAUSE_ERROR = 0x00000002, /* Triggered due to error */
  8099. HTT_STATS_RESET_CAUSE_DEEP_SLEEP = 0x00000004, /* Reset after deep sleep */
  8100. HTT_STATS_RESET_CAUSE_FULL_RESET = 0x00000008, /* Full reset without any optimizations */
  8101. HTT_STATS_RESET_CAUSE_CHANNEL_CHANGE = 0x00000010, /* For normal channel change */
  8102. HTT_STATS_RESET_CAUSE_BAND_CHANGE = 0x00000020, /* Triggered due to band change */
  8103. HTT_STATS_RESET_CAUSE_DO_CAL = 0x00000040, /* Triggered due to calibrations */
  8104. HTT_STATS_RESET_CAUSE_MCI_ERROR = 0x00000080, /* Triggered due to MCI ERROR */
  8105. HTT_STATS_RESET_CAUSE_CHWIDTH_CHANGE = 0x00000100, /* Triggered due to channel width change */
  8106. HTT_STATS_RESET_CAUSE_WARM_RESTORE_CAL = 0x00000200, /* Triggered due to warm reset we want to just restore calibrations */
  8107. HTT_STATS_RESET_CAUSE_COLD_RESTORE_CAL = 0x00000400, /* Triggered due to cold reset we want to just restore calibrations */
  8108. HTT_STATS_RESET_CAUSE_PHY_WARM_RESET = 0x00000800, /* Triggered due to phy warm reset we want to just restore calibrations */
  8109. HTT_STATS_RESET_CAUSE_M3_SSR = 0x00001000, /* Triggered due to SSR Restart */
  8110. HTT_STATS_RESET_CAUSE_FORCE_CAL = 0x00002000, /* Reset to force the calibration */
  8111. /* 0x00004000, 0x00008000 reserved */
  8112. HTT_STATS_NO_RESET_CHANNEL_CHANGE = 0x00010000, /* No reset, normal channel change */
  8113. HTT_STATS_NO_RESET_BAND_CHANGE = 0x00020000, /* No reset, channel change across band */
  8114. HTT_STATS_NO_RESET_CHWIDTH_CHANGE = 0x00040000, /* No reset, channel change across channel width */
  8115. HTT_STATS_NO_RESET_CHAINMASK_CHANGE = 0x00080000, /* No reset, chainmask change */
  8116. HTT_STATS_RESET_CAUSE_PHY_WARM_RESET_UCODE_TRIG = 0x00100000, /* Triggered due to phy warm reset we want to just restore calibrations */
  8117. HTT_STATS_RESET_CAUSE_PHY_OFF_TIMEOUT_RESET = 0x00200000, /* Reset ucode because phy off ack timeout*/
  8118. HTT_STATS_RESET_CAUSE_LMAC_RESET_UMAC_NOC_ERR = 0x00400000, /* LMAC reset triggered due to NOC Address/Slave error originating at LMAC */
  8119. HTT_STATS_NO_RESET_SCAN_BACK_TO_SAME_HOME_CHANNEL_CHANGE = 0x00800000, /* No reset, scan to home channel change */
  8120. } HTT_STATS_RESET_CAUSE;
  8121. typedef enum {
  8122. HTT_CHANNEL_RATE_FULL,
  8123. HTT_CHANNEL_RATE_HALF,
  8124. HTT_CHANNEL_RATE_QUARTER,
  8125. HTT_CHANNEL_RATE_COUNT
  8126. } HTT_CHANNEL_RATE;
  8127. typedef enum {
  8128. HTT_PHY_BW_IDX_20MHz = 0,
  8129. HTT_PHY_BW_IDX_40MHz = 1,
  8130. HTT_PHY_BW_IDX_80MHz = 2,
  8131. HTT_PHY_BW_IDX_80Plus80 = 3,
  8132. HTT_PHY_BW_IDX_160MHz = 4,
  8133. HTT_PHY_BW_IDX_10MHz = 5,
  8134. HTT_PHY_BW_IDX_5MHz = 6,
  8135. HTT_PHY_BW_IDX_165MHz = 7,
  8136. } HTT_PHY_BW_IDX;
  8137. typedef enum {
  8138. HTT_WHAL_CONFIG_NONE = 0x00000000,
  8139. HTT_WHAL_CONFIG_NF_WAR = 0x00000001,
  8140. HTT_WHAL_CONFIG_CAL_WAR = 0x00000002,
  8141. HTT_WHAL_CONFIG_DO_NF_CAL = 0x00000004,
  8142. HTT_WHAL_CONFIG_SET_WAIT_FOR_NF_CAL = 0x00000008,
  8143. HTT_WHAL_CONFIG_FORCED_TX_PWR = 0x00000010,
  8144. HTT_WHAL_CONFIG_FORCED_GAIN_IDX = 0x00000020,
  8145. HTT_WHAL_CONFIG_FORCED_PER_CHAIN = 0x00000040,
  8146. } HTT_WHAL_CONFIG;
  8147. typedef struct {
  8148. htt_tlv_hdr_t tlv_hdr;
  8149. /** number of RXTD OFDMA OTA error counts except power surge and drop */
  8150. A_UINT32 rx_ofdma_timing_err_cnt;
  8151. /** rx_cck_fail_cnt:
  8152. * number of cck error counts due to rx reception failure because of
  8153. * timing error in cck
  8154. */
  8155. A_UINT32 rx_cck_fail_cnt;
  8156. /** number of times tx abort initiated by mac */
  8157. A_UINT32 mactx_abort_cnt;
  8158. /** number of times rx abort initiated by mac */
  8159. A_UINT32 macrx_abort_cnt;
  8160. /** number of times tx abort initiated by phy */
  8161. A_UINT32 phytx_abort_cnt;
  8162. /** number of times rx abort initiated by phy */
  8163. A_UINT32 phyrx_abort_cnt;
  8164. /** number of rx deferred count initiated by phy */
  8165. A_UINT32 phyrx_defer_abort_cnt;
  8166. /** number of sizing events generated at LSTF */
  8167. A_UINT32 rx_gain_adj_lstf_event_cnt; /* a.k.a sizing1 */
  8168. /** number of sizing events generated at non-legacy LTF */
  8169. A_UINT32 rx_gain_adj_non_legacy_cnt; /* a.k.a sizing2 */
  8170. /** rx_pkt_cnt -
  8171. * Received EOP (end-of-packet) count per packet type;
  8172. * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF
  8173. * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE
  8174. */
  8175. A_UINT32 rx_pkt_cnt[HTT_MAX_RX_PKT_CNT];
  8176. /** rx_pkt_crc_pass_cnt -
  8177. * Received EOP (end-of-packet) count per packet type;
  8178. * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF
  8179. * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE
  8180. */
  8181. A_UINT32 rx_pkt_crc_pass_cnt[HTT_MAX_RX_PKT_CRC_PASS_CNT];
  8182. /** per_blk_err_cnt -
  8183. * Error count per error source;
  8184. * [0] = unknown; [1] = LSIG; [2] = HTSIG; [3] = VHTSIG; [4] = HESIG;
  8185. * [5] = RXTD_OTA; [6] = RXTD_FATAL; [7] = DEMF; [8] = ROBE;
  8186. * [9] = PMI; [10] = TXFD; [11] = TXTD; [12] = PHYRF
  8187. * [13-19]=RSVD
  8188. */
  8189. A_UINT32 per_blk_err_cnt[HTT_MAX_PER_BLK_ERR_CNT];
  8190. /** rx_ota_err_cnt -
  8191. * RXTD OTA (over-the-air) error count per error reason;
  8192. * [0] = voting fail; [1] = weak det fail; [2] = strong sig fail;
  8193. * [3] = cck fail; [4] = power surge; [5] = power drop;
  8194. * [6] = btcf timing timeout error; [7] = btcf packet detect error;
  8195. * [8] = coarse timing timeout error
  8196. * [9-13]=RSVD
  8197. */
  8198. A_UINT32 rx_ota_err_cnt[HTT_MAX_RX_OTA_ERR_CNT];
  8199. /** rx_pkt_cnt_ext -
  8200. * Received EOP (end-of-packet) count per packet type for BE;
  8201. * [0] = WUR; [1] = AZ; [2-3]=RVSD
  8202. */
  8203. A_UINT32 rx_pkt_cnt_ext[HTT_MAX_RX_PKT_CNT_EXT];
  8204. /** rx_pkt_crc_pass_cnt_ext -
  8205. * Received EOP (end-of-packet) count per packet type for BE;
  8206. * [0] = WUR; [1] = AZ; [2-3]=RVSD
  8207. */
  8208. A_UINT32 rx_pkt_crc_pass_cnt_ext[HTT_MAX_RX_PKT_CRC_PASS_CNT_EXT];
  8209. /** rx_pkt_mu_cnt -
  8210. * RX MU MIMO+OFDMA packet count per packet type for BE;
  8211. * [0] = 11ax OFDMA; [1] = 11ax OFDMA+MUMIMO; [2] = 11be OFDMA;
  8212. * [3] = 11be OFDMA+MUMIMO; [4] = 11ax MIMO; [5] = 11be MIMO;
  8213. * [6] = 11ax OFDMA; [7] = 11ax OFDMA+MUMIMO; [8] = 11be OFDMA;
  8214. * [9] = 11be OFDMA+MUMIMO; [10] = 11ax MIMO; [11] = 11be MIMO;
  8215. * [12-13]=RSVD
  8216. */
  8217. A_UINT32 rx_pkt_mu_cnt[HTT_MAX_RX_PKT_MU_CNT];
  8218. /** tx_pkt_cnt -
  8219. * num of transfered packet count per packet type;
  8220. * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF;
  8221. * [6]= EHT; [7] = WUR; [8] = AZ; [9]=RSVD; [6-8] = Applicable only for BE
  8222. */
  8223. A_UINT32 tx_pkt_cnt[HTT_MAX_TX_PKT_CNT];
  8224. /** phy_tx_abort_cnt -
  8225. * phy tx abort after each tlv;
  8226. * [0] = PRE-PHY desc tlv; [1] = PHY desc tlv; [2] = LSIGA tlv;
  8227. * [3] = LSIGB tlv; [4] = Per User tlv; [5] = HESIGB tlv;
  8228. * [6] = Service tlv; [7] = Tx Packet End tlv; [8-9]=RSVD;
  8229. */
  8230. A_UINT32 phy_tx_abort_cnt[HTT_MAX_PHY_TX_ABORT_CNT];
  8231. } htt_stats_phy_counters_tlv;
  8232. /* preserve old name alias for new name consistent with the tag name */
  8233. typedef htt_stats_phy_counters_tlv htt_phy_counters_tlv;
  8234. typedef struct {
  8235. htt_tlv_hdr_t tlv_hdr;
  8236. /** per chain hw noise floor values in dBm */
  8237. A_INT32 nf_chain[HTT_STATS_MAX_CHAINS];
  8238. /** number of false radars detected */
  8239. A_UINT32 false_radar_cnt;
  8240. /** number of channel switches happened due to radar detection */
  8241. A_UINT32 radar_cs_cnt;
  8242. /** ani_level -
  8243. * ANI level (noise interference) corresponds to the channel
  8244. * the desense levels range from -5 to 15 in dB units,
  8245. * higher values indicating more noise interference.
  8246. */
  8247. A_INT32 ani_level;
  8248. /** running time in minutes since FW boot */
  8249. A_UINT32 fw_run_time;
  8250. /** per chain runtime noise floor values in dBm */
  8251. A_INT32 runTime_nf_chain[HTT_STATS_MAX_CHAINS];
  8252. /** DFS SW based progressive stats - start **/
  8253. /* current AP operating bandwidth (refer to WLAN_PHY_MODE) */
  8254. A_UINT32 current_OBW;
  8255. /* current AP device bandwidth (refer to WLAN_PHY_MODE) */
  8256. A_UINT32 current_DBW;
  8257. /* last_radar_type: last detected radar type
  8258. * This last_radar_type field contains a value whose meaning is not
  8259. * exposed to the host; this field is only provided for debug purposes.
  8260. */
  8261. A_UINT32 last_radar_type;
  8262. /* dfs_reg_domain: curent DFS regulatory domain
  8263. * This dfs_reg_domain field contains a value whose meaning is not
  8264. * exposed to the host; this field is only provided for debug purposes.
  8265. */
  8266. A_UINT32 dfs_reg_domain;
  8267. /* radar_mask_bit: Radar mask setting programmed in HW registers.
  8268. * Each bit represents a 20 MHz portion of the channel.
  8269. * Bit 0 represents the highest 20 MHz portion within the channel.
  8270. * For example...
  8271. * For a 80 MHz channel, bit0 = highest 20 MHz, bit3 = lowest 20 MHz
  8272. * For a 320 MHz channel, bit0 = highest 20 MHz, bit15 = lowest 20 MHz
  8273. */
  8274. A_UINT32 radar_mask_bit;
  8275. /* DFS radar rssi threshold (units = dBm) */
  8276. A_INT32 radar_rssi;
  8277. /* DFS global flags (refer to IEEE80211_CHAN_* defines) */
  8278. A_UINT32 radar_dfs_flags;
  8279. /* band center frequency of operating bandwidth (units = MHz) */
  8280. A_UINT32 band_center_frequency_OBW;
  8281. /* band center frequency of device bandwidth (units = MHz) */
  8282. A_UINT32 band_center_frequency_DBW;
  8283. /** DFS SW based progressive stats - end **/
  8284. } htt_stats_phy_stats_tlv;
  8285. /* preserve old name alias for new name consistent with the tag name */
  8286. typedef htt_stats_phy_stats_tlv htt_phy_stats_tlv;
  8287. typedef struct {
  8288. htt_tlv_hdr_t tlv_hdr;
  8289. /** current pdev_id */
  8290. A_UINT32 pdev_id;
  8291. /** current channel information */
  8292. A_UINT32 chan_mhz;
  8293. /** center_freq1, center_freq2 in mhz */
  8294. A_UINT32 chan_band_center_freq1;
  8295. A_UINT32 chan_band_center_freq2;
  8296. /** chan_phy_mode - WLAN_PHY_MODE enum type */
  8297. A_UINT32 chan_phy_mode;
  8298. /** chan_flags follows HTT_STATS_CHANNEL_FLAGS enum */
  8299. A_UINT32 chan_flags;
  8300. /** channel Num updated to virtual phybase */
  8301. A_UINT32 chan_num;
  8302. /** Cause for the phy reset - HTT_STATS_RESET_CAUSE */
  8303. A_UINT32 reset_cause;
  8304. /** Cause for the previous phy reset */
  8305. A_UINT32 prev_reset_cause;
  8306. /** source for the phywarm reset - HTT_STATS_RESET_CAUSE */
  8307. A_UINT32 phy_warm_reset_src;
  8308. /** rxGain Table selection mode - register settings
  8309. * 0 - Auto, 1/2 - Forced with and without BT override respectively
  8310. */
  8311. A_UINT32 rx_gain_tbl_mode;
  8312. /** current xbar value - perchain analog to digital idx mapping */
  8313. A_UINT32 xbar_val;
  8314. /** Flag to indicate forced calibration */
  8315. A_UINT32 force_calibration;
  8316. /** current RF mode (e.g. SBS/DBS) - follows HTT_STATS_RF_MODE enum */
  8317. A_UINT32 phyrf_mode;
  8318. /* PDL phyInput stats */
  8319. /** homechannel flag
  8320. * 1- Homechan, 0 - scan channel
  8321. */
  8322. A_UINT32 phy_homechan;
  8323. /** Tx and Rx chainmask */
  8324. A_UINT32 phy_tx_ch_mask;
  8325. A_UINT32 phy_rx_ch_mask;
  8326. /** INI masks - to decide the INI registers to be loaded on a reset */
  8327. A_UINT32 phybb_ini_mask;
  8328. A_UINT32 phyrf_ini_mask;
  8329. /** DFS,ADFS/Spectral scan enable masks */
  8330. A_UINT32 phy_dfs_en_mask;
  8331. A_UINT32 phy_sscan_en_mask;
  8332. A_UINT32 phy_synth_sel_mask;
  8333. A_UINT32 phy_adfs_freq;
  8334. /** CCK FIR settings
  8335. * register settings - filter coefficients for Iqs conversion
  8336. * [31:24] = FIR_COEFF_3_0
  8337. * [23:16] = FIR_COEFF_2_0
  8338. * [15:8] = FIR_COEFF_1_0
  8339. * [7:0] = FIR_COEFF_0_0
  8340. */
  8341. A_UINT32 cck_fir_settings;
  8342. /** dynamic primary channel index
  8343. * primary 20MHz channel index on the current channel BW
  8344. */
  8345. A_UINT32 phy_dyn_pri_chan;
  8346. /**
  8347. * Current CCA detection threshold
  8348. * dB above noisefloor req for CCA
  8349. * Register settings for all subbands
  8350. */
  8351. A_UINT32 cca_thresh;
  8352. /**
  8353. * status for dynamic CCA adjustment
  8354. * 0-disabled, 1-enabled
  8355. */
  8356. A_UINT32 dyn_cca_status;
  8357. /** RXDEAF Register value
  8358. * rxdesense_thresh_sw - VREG Register
  8359. * rxdesense_thresh_hw - PHY Register
  8360. */
  8361. A_UINT32 rxdesense_thresh_sw;
  8362. A_UINT32 rxdesense_thresh_hw;
  8363. /** Current PHY Bandwidth -
  8364. * values are specified by the HTT_PHY_BW_IDX enum type
  8365. */
  8366. A_UINT32 phy_bw_code;
  8367. /** Current channel operating rate -
  8368. * values are specified by the HTT_CHANNEL_RATE enum type
  8369. */
  8370. A_UINT32 phy_rate_mode;
  8371. /** current channel operating band
  8372. * 0 - 5G; 1 - 2G; 2 -6G
  8373. */
  8374. A_UINT32 phy_band_code;
  8375. /** microcode processor virtual phy base address -
  8376. * provided only for debug
  8377. */
  8378. A_UINT32 phy_vreg_base;
  8379. /** microcode processor virtual phy base ext address -
  8380. * provided only for debug
  8381. */
  8382. A_UINT32 phy_vreg_base_ext;
  8383. /** HW LUT table configuration for home/scan channel -
  8384. * provided only for debug
  8385. */
  8386. A_UINT32 cur_table_index;
  8387. /** SW configuration flag for PHY reset and Calibrations -
  8388. * values are specified by the HTT_WHAL_CONFIG enum type
  8389. */
  8390. A_UINT32 whal_config_flag;
  8391. /** nfcal_iteration_counts:
  8392. * iteration count for Home/Scan/Periodic Noise Floor calibrations
  8393. * nfcal_iteration_counts[0] - home NF iteration counter
  8394. * nfcal_iteration_counts[1] - scan NF iteration counter
  8395. * nfcal_iteration_counts[2] - periodic NF iteration counter
  8396. * These counters are not reset automatically; they are only reset
  8397. * when explicitly requested by the host.
  8398. */
  8399. A_UINT32 nfcal_iteration_counts[3];
  8400. } htt_stats_phy_reset_stats_tlv;
  8401. /* preserve old name alias for new name consistent with the tag name */
  8402. typedef htt_stats_phy_reset_stats_tlv htt_phy_reset_stats_tlv;
  8403. typedef struct {
  8404. htt_tlv_hdr_t tlv_hdr;
  8405. /** current pdev_id */
  8406. A_UINT32 pdev_id;
  8407. /** ucode PHYOFF pass/failure count */
  8408. A_UINT32 cf_active_low_fail_cnt;
  8409. A_UINT32 cf_active_low_pass_cnt;
  8410. /** PHYOFF count attempted through ucode VREG */
  8411. A_UINT32 phy_off_through_vreg_cnt;
  8412. /** Force calibration count */
  8413. A_UINT32 force_calibration_cnt;
  8414. /** phyoff count during rfmode switch */
  8415. A_UINT32 rf_mode_switch_phy_off_cnt;
  8416. /** Temperature based recalibration count */
  8417. A_UINT32 temperature_recal_cnt;
  8418. } htt_stats_phy_reset_counters_tlv;
  8419. /* preserve old name alias for new name consistent with the tag name */
  8420. typedef htt_stats_phy_reset_counters_tlv htt_phy_reset_counters_tlv;
  8421. /* Considering 320 MHz maximum 16 power levels */
  8422. #define HTT_MAX_CH_PWR_INFO_SIZE 16
  8423. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_M 0x000000ff
  8424. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_S 0
  8425. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_GET(_var) \
  8426. (((_var) & HTT_PHY_TPC_STATS_CTL_REGION_GRP_M) >> \
  8427. HTT_PHY_TPC_STATS_CTL_REGION_GRP_S)
  8428. /* provide properly-named macro */
  8429. #define HTT_STATS_PHY_TPC_STATS_CTL_REGION_GRP_GET(_var) \
  8430. HTT_PHY_TPC_STATS_CTL_REGION_GRP_GET(_var)
  8431. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_SET(_var, _val) \
  8432. do { \
  8433. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_CTL_REGION_GRP, _val); \
  8434. ((_var) &= ~(HTT_PHY_TPC_STATS_CTL_REGION_GRP_M)); \
  8435. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_CTL_REGION_GRP_S)); \
  8436. } while (0)
  8437. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_M 0x0000ff00
  8438. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_S 8
  8439. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_GET(_var) \
  8440. (((_var) & HTT_PHY_TPC_STATS_SUB_BAND_INDEX_M) >> \
  8441. HTT_PHY_TPC_STATS_SUB_BAND_INDEX_S)
  8442. /* provide properly-named macro */
  8443. #define HTT_STATS_PHY_TPC_STATS_SUB_BAND_INDEX_GET(_var) \
  8444. HTT_PHY_TPC_STATS_SUB_BAND_INDEX_GET(_var)
  8445. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_SET(_var, _val) \
  8446. do { \
  8447. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_SUB_BAND_INDEX, _val); \
  8448. ((_var) &= ~(HTT_PHY_TPC_STATS_SUB_BAND_INDEX_M)); \
  8449. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_SUB_BAND_INDEX_S)); \
  8450. } while (0)
  8451. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_M 0x00ff0000
  8452. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_S 16
  8453. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_GET(_var) \
  8454. (((_var) & HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_M) >> \
  8455. HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_S)
  8456. /* provide properly-named macro */
  8457. #define HTT_STATS_PHY_TPC_STATS_ARRAY_GAIN_CAP_EXT2_ENABLED_GET(_var) \
  8458. HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_GET(_var)
  8459. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_SET(_var, _val) \
  8460. do { \
  8461. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED, _val); \
  8462. ((_var) &= ~(HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_M)); \
  8463. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_S)); \
  8464. } while (0)
  8465. #define HTT_PHY_TPC_STATS_CTL_FLAG_M 0xff000000
  8466. #define HTT_PHY_TPC_STATS_CTL_FLAG_S 24
  8467. #define HTT_PHY_TPC_STATS_CTL_FLAG_GET(_var) \
  8468. (((_var) & HTT_PHY_TPC_STATS_CTL_FLAG_M) >> \
  8469. HTT_PHY_TPC_STATS_CTL_FLAG_S)
  8470. /* provide properly-named macro */
  8471. #define HTT_STATS_PHY_TPC_STATS_CTL_FLAG_GET(_var) \
  8472. HTT_PHY_TPC_STATS_CTL_FLAG_GET(_var)
  8473. #define HTT_PHY_TPC_STATS_CTL_FLAG_SET(_var, _val) \
  8474. do { \
  8475. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_CTL_FLAG, _val); \
  8476. ((_var) &= ~(HTT_PHY_TPC_STATS_CTL_FLAG_M)); \
  8477. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_CTL_FLAG_S)); \
  8478. } while (0)
  8479. typedef struct {
  8480. htt_tlv_hdr_t tlv_hdr;
  8481. /** current pdev_id */
  8482. A_UINT32 pdev_id;
  8483. /** Tranmsit power control scaling related configurations */
  8484. A_UINT32 tx_power_scale;
  8485. A_UINT32 tx_power_scale_db;
  8486. /** Minimum negative tx power supported by the target */
  8487. A_INT32 min_negative_tx_power;
  8488. /** current configured CTL domain */
  8489. A_UINT32 reg_ctl_domain;
  8490. /** Regulatory power information for the current channel */
  8491. A_INT32 max_reg_allowed_power[HTT_STATS_MAX_CHAINS];
  8492. A_INT32 max_reg_allowed_power_6g[HTT_STATS_MAX_CHAINS];
  8493. /** channel max regulatory power in 0.5dB */
  8494. A_UINT32 twice_max_rd_power;
  8495. /** current channel and home channel's maximum possible tx power */
  8496. A_INT32 max_tx_power;
  8497. A_INT32 home_max_tx_power;
  8498. /** channel's Power Spectral Density */
  8499. A_UINT32 psd_power;
  8500. /** channel's EIRP power */
  8501. A_UINT32 eirp_power;
  8502. /** 6G channel power mode
  8503. * 0-LPI, 1-SP, 2-VLPI and 3-SP_CLIENT power mode
  8504. */
  8505. A_UINT32 power_type_6ghz;
  8506. /** sub-band channels and corresponding Tx-power */
  8507. A_UINT32 sub_band_cfreq[HTT_MAX_CH_PWR_INFO_SIZE];
  8508. A_UINT32 sub_band_txpower[HTT_MAX_CH_PWR_INFO_SIZE];
  8509. /** array_gain_cap:
  8510. * CTL Array Gain cap, units are dB
  8511. * The lower-triangular portion of this square matrix is stored, i.e.
  8512. * array element 0 stores matrix element (0,0)
  8513. * array element 1 stores matrix element (1,0)
  8514. * array element 2 stores matrix element (1,1)
  8515. * array element 3 stores matrix element (2,0)
  8516. * ...
  8517. * array element 35 stores matrix element (7,7)
  8518. */
  8519. A_INT32 array_gain_cap[HTT_STATS_MAX_CHAINS * ((HTT_STATS_MAX_CHAINS/2)+1)];
  8520. union {
  8521. struct {
  8522. A_UINT32
  8523. ctl_region_grp:8, /** Group to which the ctl region belongs */
  8524. sub_band_index:8, /** Frequency subband index */
  8525. /** Array Gain Cap Ext2 feature enablement status */
  8526. array_gain_cap_ext2_enabled:8,
  8527. /** ctl_flag:
  8528. * 1st bit ULOFDMA supported
  8529. * 2nd bit DLOFDMA shared Exception supported
  8530. */
  8531. ctl_flag:8;
  8532. };
  8533. A_UINT32 ctl_args;
  8534. };
  8535. /** max_reg_only_allowed_power:
  8536. * units = 0.25dBm
  8537. */
  8538. A_INT32 max_reg_only_allowed_power[HTT_STATS_MAX_CHAINS];
  8539. } htt_stats_phy_tpc_stats_tlv;
  8540. /* preserve old name alias for new name consistent with the tag name */
  8541. typedef htt_stats_phy_tpc_stats_tlv htt_phy_tpc_stats_tlv;
  8542. /* NOTE:
  8543. * This structure is for documentation, and cannot be safely used directly.
  8544. * Instead, use the constituent TLV structures to fill/parse.
  8545. */
  8546. #ifdef ATH_TARGET
  8547. typedef struct {
  8548. htt_stats_phy_counters_tlv phy_counters;
  8549. htt_stats_phy_stats_tlv phy_stats;
  8550. htt_stats_phy_reset_counters_tlv phy_reset_counters;
  8551. htt_stats_phy_reset_stats_tlv phy_reset_stats;
  8552. htt_stats_phy_tpc_stats_tlv phy_tpc_stats;
  8553. } htt_phy_counters_and_phy_stats_t;
  8554. #endif /* ATH_TARGET */
  8555. /* NOTE:
  8556. * This structure is for documentation, and cannot be safely used directly.
  8557. * Instead, use the constituent TLV structures to fill/parse.
  8558. */
  8559. #ifdef ATH_TARGET
  8560. typedef struct {
  8561. htt_stats_soc_txrx_stats_common_tlv soc_common_stats;
  8562. htt_stats_vdev_txrx_stats_hw_stats_tlv vdev_hw_stats[1/*or more*/];
  8563. } htt_vdevs_txrx_stats_t;
  8564. #endif /* ATH_TARGET */
  8565. typedef struct {
  8566. union {
  8567. A_UINT32 word32;
  8568. struct {
  8569. A_UINT32
  8570. success: 16,
  8571. fail: 16;
  8572. };
  8573. };
  8574. } htt_stats_strm_gen_mpdus_cntr_t;
  8575. typedef struct {
  8576. /* MSDU queue identification */
  8577. union {
  8578. A_UINT32 word32;
  8579. struct {
  8580. A_UINT32
  8581. peer_id: 16,
  8582. tid: 4, /* only TIDs 0-7 actually expected to be used */
  8583. htt_qtype: 4, /* refer to HTT_MSDUQ_INDEX */
  8584. reserved: 8;
  8585. };
  8586. };
  8587. } htt_stats_strm_msdu_queue_id;
  8588. #define HTT_STATS_STRM_GEN_MPDUS_QUEUE_ID_PEER_ID_GET(word) \
  8589. ((word >> 0) & 0xffff)
  8590. #define HTT_STATS_STRM_GEN_MPDUS_QUEUE_ID_TID_GET(word) \
  8591. ((word >> 16) & 0xf)
  8592. #define HTT_STATS_STRM_GEN_MPDUS_QUEUE_ID_HTT_QTYPE_GET(word) \
  8593. ((word >> 20) & 0xf)
  8594. #define HTT_STATS_STRM_GEN_MPDUS_SVC_INTERVAL_SUCCESS_GET(word) \
  8595. ((word >> 0) & 0xffff)
  8596. #define HTT_STATS_STRM_GEN_MPDUS_SVC_INTERVAL_FAIL_GET(word) \
  8597. ((word >> 16) & 0xffff)
  8598. #define HTT_STATS_STRM_GEN_MPDUS_BURST_SIZE_SUCCESS_GET(word) \
  8599. ((word >> 0) & 0xffff)
  8600. #define HTT_STATS_STRM_GEN_MPDUS_BURST_SIZE_FAIL_GET(word) \
  8601. ((word >> 16) & 0xffff)
  8602. typedef struct {
  8603. htt_tlv_hdr_t tlv_hdr;
  8604. htt_stats_strm_msdu_queue_id queue_id;
  8605. htt_stats_strm_gen_mpdus_cntr_t svc_interval;
  8606. htt_stats_strm_gen_mpdus_cntr_t burst_size;
  8607. } htt_stats_strm_gen_mpdus_tlv;
  8608. /* preserve old name alias for new name consistent with the tag name */
  8609. typedef htt_stats_strm_gen_mpdus_tlv htt_stats_strm_gen_mpdus_tlv_t;
  8610. typedef struct {
  8611. htt_tlv_hdr_t tlv_hdr;
  8612. htt_stats_strm_msdu_queue_id queue_id;
  8613. struct {
  8614. union {
  8615. A_UINT32 timestamp_prior__timestamp_now__word;
  8616. struct {
  8617. A_UINT32
  8618. timestamp_prior_ms: 16,
  8619. timestamp_now_ms: 16;
  8620. };
  8621. };
  8622. union {
  8623. A_UINT32 interval_spec__margin__word;
  8624. struct {
  8625. A_UINT32
  8626. interval_spec_ms: 16,
  8627. margin_ms: 16;
  8628. };
  8629. };
  8630. } svc_interval;
  8631. struct {
  8632. union {
  8633. A_UINT32 consumed_bytes_orig__consumed_bytes_final__word;
  8634. struct {
  8635. A_UINT32
  8636. /* consumed_bytes_orig:
  8637. * Raw count (actually estimate) of how many bytes were
  8638. * removed from the MSDU queue by the GEN_MPDUS operation.
  8639. */
  8640. consumed_bytes_orig: 16,
  8641. /* consumed_bytes_final:
  8642. * Adjusted count of removed bytes that incorporates
  8643. * normalizing by the actual service interval compared to
  8644. * the expected service interval.
  8645. * This allows the burst size computation to be independent
  8646. * of whether the target is doing GEN_MPDUS at only the
  8647. * service interval, or substantially more often than the
  8648. * service interval.
  8649. * consumed_bytes_final = consumed_bytes_orig /
  8650. * (svc_interval / ref_svc_interval)
  8651. */
  8652. consumed_bytes_final: 16;
  8653. };
  8654. };
  8655. union {
  8656. A_UINT32 remaining_bytes__word;
  8657. struct {
  8658. A_UINT32
  8659. remaining_bytes: 16,
  8660. reserved: 16;
  8661. };
  8662. };
  8663. union {
  8664. A_UINT32 burst_size_spec__margin_bytes__word;
  8665. struct {
  8666. A_UINT32
  8667. burst_size_spec: 16,
  8668. margin_bytes: 16;
  8669. };
  8670. };
  8671. } burst_size;
  8672. } htt_stats_strm_gen_mpdus_details_tlv;
  8673. /* preserve old name alias for new name consistent with the tag name */
  8674. typedef htt_stats_strm_gen_mpdus_details_tlv
  8675. htt_stats_strm_gen_mpdus_details_tlv_t;
  8676. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_QUEUE_ID_PEER_ID_GET(word) \
  8677. ((word >> 0) & 0xffff)
  8678. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_QUEUE_ID_TID_GET(word) \
  8679. ((word >> 16) & 0xf)
  8680. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_QUEUE_ID_HTT_QTYPE_GET(word) \
  8681. ((word >> 20) & 0xf)
  8682. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_SVC_INTERVAL_TIMESTAMP_PRIOR_MS_GET(word) \
  8683. ((word >> 0) & 0xffff)
  8684. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_SVC_INTERVAL_TIMESTAMP_NOW_MS_GET(word) \
  8685. ((word >> 16) & 0xffff)
  8686. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_SVC_INTERVAL_INTERVAL_SPEC_MS_GET(word) \
  8687. ((word >> 0) & 0xffff)
  8688. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_SVC_INTERVAL_MARGIN_MS_GET(word) \
  8689. ((word >> 16) & 0xffff)
  8690. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_BURST_SIZE_CONSUMED_BYTES_ORIG_GET(word) \
  8691. ((word >> 0) & 0xffff)
  8692. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_BURST_SIZE_CONSUMED_BYTES_FINAL_GET(word) \
  8693. ((word >> 16) & 0xffff)
  8694. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_BURST_SIZE_REMAINING_BYTES_GET(word) \
  8695. ((word >> 0) & 0xffff)
  8696. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_BURST_SIZE_BURST_SIZE_SPEC_GET(word) \
  8697. ((word >> 0) & 0xffff)
  8698. #define HTT_STATS_STRM_GEN_MPDUS_DETAILS_BURST_SIZE_MARGIN_BYTES_GET(word) \
  8699. ((word >> 16) & 0xffff)
  8700. typedef struct {
  8701. htt_tlv_hdr_t tlv_hdr;
  8702. A_UINT32 reset_count;
  8703. /** lower portion (bits 31:0) of reset time, in milliseconds */
  8704. A_UINT32 reset_time_lo_ms;
  8705. /** upper portion (bits 63:32) of reset time, in milliseconds */
  8706. A_UINT32 reset_time_hi_ms;
  8707. /** lower portion (bits 31:0) of disengage time, in milliseconds */
  8708. A_UINT32 disengage_time_lo_ms;
  8709. /** upper portion (bits 63:32) of disengage time, in milliseconds */
  8710. A_UINT32 disengage_time_hi_ms;
  8711. /** lower portion (bits 31:0) of engage time, in milliseconds */
  8712. A_UINT32 engage_time_lo_ms;
  8713. /** upper portion (bits 63:32) of engage time, in milliseconds */
  8714. A_UINT32 engage_time_hi_ms;
  8715. A_UINT32 disengage_count;
  8716. A_UINT32 engage_count;
  8717. A_UINT32 drain_dest_ring_mask;
  8718. } htt_stats_dmac_reset_stats_tlv;
  8719. /* preserve old name alias for new name consistent with the tag name */
  8720. typedef htt_stats_dmac_reset_stats_tlv htt_dmac_reset_stats_tlv;
  8721. /* Support up to 640 MHz mode for future expansion */
  8722. #define HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT 32
  8723. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_M 0x000000ff
  8724. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_S 0
  8725. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_GET(_var) \
  8726. (((_var) & HTT_PDEV_PUNCTURE_STATS_MAC_ID_M) >> \
  8727. HTT_PDEV_PUNCTURE_STATS_MAC_ID_S)
  8728. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_SET(_var, _val) \
  8729. do { \
  8730. HTT_CHECK_SET_VAL(HTT_PDEV_PUNCTURE_STATS_MAC_ID, _val); \
  8731. ((_var) |= ((_val) << HTT_PDEV_PUNCTURE_STATS_MAC_ID_S)); \
  8732. } while (0)
  8733. /*
  8734. * TLV used to provide puncturing related stats for TX/RX and each PPDU type.
  8735. */
  8736. typedef struct {
  8737. htt_tlv_hdr_t tlv_hdr;
  8738. /**
  8739. * BIT [ 7 : 0] :- mac_id
  8740. * BIT [31 : 8] :- reserved
  8741. */
  8742. union {
  8743. struct {
  8744. A_UINT32 mac_id: 8,
  8745. reserved: 24;
  8746. };
  8747. A_UINT32 mac_id__word;
  8748. };
  8749. /*
  8750. * Stats direction (TX/RX). Enum value from HTT_STATS_DIRECTION.
  8751. */
  8752. A_UINT32 direction;
  8753. /*
  8754. * Preamble type. Enum value from HTT_STATS_PREAM_TYPE.
  8755. *
  8756. * Note that for although OFDM rates don't technically support
  8757. * "puncturing", this TLV can be used to indicate the 20 MHz sub-bands
  8758. * utilized for OFDM legacy duplicate packets, which are also used during
  8759. * puncturing sequences.
  8760. */
  8761. A_UINT32 preamble;
  8762. /*
  8763. * Stats PPDU type. Enum value from HTT_STATS_PPDU_TYPE.
  8764. */
  8765. A_UINT32 ppdu_type;
  8766. /*
  8767. * Indicates the number of valid elements in the
  8768. * "num_subbands_used_cnt" array, and must be <=
  8769. * HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT.
  8770. *
  8771. * Also indicates how many bits in the last_used_pattern_mask may be
  8772. * non-zero.
  8773. */
  8774. A_UINT32 subband_count;
  8775. /*
  8776. * The last used transmit 20 MHz subband mask. Bit 0 represents the lowest
  8777. * 20 MHz subband mask, bit 1 the second lowest, and so on.
  8778. *
  8779. * All 32 bits are valid and will be used for expansion to higher BW modes.
  8780. */
  8781. A_UINT32 last_used_pattern_mask;
  8782. /*
  8783. * Number of array elements with valid values is equal to "subband_count".
  8784. * If subband_count is < HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT, the
  8785. * remaining elements will be implicitly set to 0x0.
  8786. *
  8787. * The array index is the number of 20 MHz subbands utilized during TX/RX,
  8788. * and the counter value at that index is the number of times that subband
  8789. * count was used.
  8790. *
  8791. * The count is incremented once for each OTA PPDU transmitted / received.
  8792. */
  8793. A_UINT32 num_subbands_used_cnt[HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT];
  8794. } htt_stats_pdev_puncture_stats_tlv;
  8795. /* preserve old name alias for new name consistent with the tag name */
  8796. typedef htt_stats_pdev_puncture_stats_tlv htt_pdev_puncture_stats_tlv;
  8797. #define HTT_STATS_PDEV_PUNCTURE_STATS_MAC_ID_GET(word) ((word >> 0) & 0xff)
  8798. enum {
  8799. HTT_STATS_CAL_PROF_COLD_BOOT = 0,
  8800. HTT_STATS_CAL_PROF_FULL_CHAN_SWITCH = 1,
  8801. HTT_STATS_CAL_PROF_SCAN_CHAN_SWITCH = 2,
  8802. HTT_STATS_CAL_PROF_DPD_SPLIT_CAL = 3,
  8803. HTT_STATS_MAX_PROF_CAL = 4,
  8804. };
  8805. #define HTT_STATS_MAX_CAL_IDX_CNT 8
  8806. typedef struct { /* DEPRECATED */
  8807. htt_tlv_hdr_t tlv_hdr;
  8808. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  8809. /** To verify whether prof cal is enabled or not */
  8810. A_UINT32 enable;
  8811. /** current pdev_id */
  8812. A_UINT32 pdev_id;
  8813. /** The cnt is incremented when each time the calindex takes place */
  8814. A_UINT32 cnt[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8815. /** Minimum time taken to complete the calibration - in us */
  8816. A_UINT32 min[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8817. /** Maximum time taken to complete the calibration -in us */
  8818. A_UINT32 max[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8819. /** Time taken by the cal for its final time execution - in us */
  8820. A_UINT32 last[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8821. /** Total time taken - in us */
  8822. A_UINT32 tot[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8823. /** hist_intvl - by default will be set to 2000 us */
  8824. A_UINT32 hist_intvl[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8825. /**
  8826. * If last is less than hist_intvl, then hist[0]++,
  8827. * If last is less than hist_intvl << 1, then hist[1]++,
  8828. * otherwise hist[2]++.
  8829. */
  8830. A_UINT32 hist[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT][HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST];
  8831. /** Pf_last will log the current no of page faults */
  8832. A_UINT32 pf_last[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8833. /** Sum of all page faults happened */
  8834. A_UINT32 pf_tot[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8835. /** If pf_last > pf_max then pf_max = pf_last */
  8836. A_UINT32 pf_max[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8837. /**
  8838. * For each cal profile, only certain no of cal indices were invoked,
  8839. * this member will store what all the indices got invoked per each
  8840. * cal profile
  8841. */
  8842. A_UINT32 enabledCalIdx[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8843. /** No of indices invoked per each cal profile */
  8844. A_UINT32 CalCnt[HTT_STATS_MAX_PROF_CAL];
  8845. } htt_stats_latency_prof_cal_stats_tlv; /* DEPRECATED */
  8846. /* preserve old name alias for new name consistent with the tag name */
  8847. typedef htt_stats_latency_prof_cal_stats_tlv htt_latency_prof_cal_stats_tlv; /* DEPRECATED */
  8848. typedef struct {
  8849. /** The cnt is incremented when each time the calindex takes place */
  8850. A_UINT32 cnt;
  8851. /** Minimum time taken to complete the calibration - in us */
  8852. A_UINT32 min;
  8853. /** Maximum time taken to complete the calibration -in us */
  8854. A_UINT32 max;
  8855. /** Time taken by the cal for its final time execution - in us */
  8856. A_UINT32 last;
  8857. /** Total time taken - in us */
  8858. A_UINT32 tot;
  8859. /** hist_intvl - in us, by default will be set to 2000 us */
  8860. A_UINT32 hist_intvl;
  8861. /**
  8862. * If last is less than hist_intvl, then hist[0]++,
  8863. * If last is less than hist_intvl << 1, then hist[1]++,
  8864. * otherwise hist[2]++.
  8865. */
  8866. A_UINT32 hist[HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST];
  8867. /** pf_last will log the current no of page faults */
  8868. A_UINT32 pf_last;
  8869. /** Sum of all page faults happened */
  8870. A_UINT32 pf_tot;
  8871. /** If pf_last > pf_max then pf_max = pf_last */
  8872. A_UINT32 pf_max;
  8873. /**
  8874. * For each cal profile, only certain no of cal indices were invoked,
  8875. * this member will store what all the indices got invoked per each
  8876. * cal profile
  8877. */
  8878. A_UINT32 enabled_cal_idx;
  8879. /*
  8880. * NOTE: due to backwards-compatibility requirements,
  8881. * no fields can be added to this struct.
  8882. */
  8883. } htt_stats_latency_prof_cal_data;
  8884. typedef struct {
  8885. htt_tlv_hdr_t tlv_hdr;
  8886. /** To verify whether prof cal is enabled or not */
  8887. A_UINT32 enable;
  8888. /** current pdev_id */
  8889. A_UINT32 pdev_id;
  8890. /** No of indices invoked per each cal profile */
  8891. A_UINT32 cal_cnt[HTT_STATS_MAX_PROF_CAL];
  8892. /** Latency Cal Profile name */
  8893. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  8894. /** Latency Cal data */
  8895. htt_stats_latency_prof_cal_data latency_data[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8896. } htt_stats_latency_prof_cal_data_tlv;
  8897. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M 0x0000003F
  8898. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S 0
  8899. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M 0x00000FC0
  8900. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S 6
  8901. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M 0x0FFFF000
  8902. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S 12
  8903. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_GET(_var) \
  8904. (((_var) & HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M) >> \
  8905. HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S)
  8906. /* provide properly-named macro */
  8907. #define HTT_STATS_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_GET(_var) \
  8908. HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_GET(_var)
  8909. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_SET(_var, _val) \
  8910. do { \
  8911. HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD, _val); \
  8912. ((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M)); \
  8913. ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S)); \
  8914. } while (0)
  8915. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_GET(_var) \
  8916. (((_var) & HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M) >> \
  8917. HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S)
  8918. /* provide properly-named macro */
  8919. #define HTT_STATS_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_GET(_var) \
  8920. HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_GET(_var)
  8921. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_SET(_var, _val) \
  8922. do { \
  8923. HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD, _val); \
  8924. ((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M)); \
  8925. ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S)); \
  8926. } while (0)
  8927. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_GET(_var) \
  8928. (((_var) & HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M) >> \
  8929. HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)
  8930. /* provide properly-named macro */
  8931. #define HTT_STATS_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_GET(_var) \
  8932. HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_GET(_var)
  8933. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_SET(_var, _val) \
  8934. do { \
  8935. HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX, _val); \
  8936. ((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M)); \
  8937. ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)); \
  8938. } while (0)
  8939. typedef struct {
  8940. htt_tlv_hdr_t tlv_hdr;
  8941. union {
  8942. struct {
  8943. A_UINT32 peer_assoc_ipc_recvd : 6,
  8944. sched_peer_delete_recvd : 6,
  8945. mld_ast_index : 16,
  8946. reserved : 4;
  8947. };
  8948. A_UINT32 msg_dword_1;
  8949. };
  8950. } htt_stats_ml_peer_ext_details_tlv;
  8951. /* preserve old name alias for new name consistent with the tag name */
  8952. typedef htt_stats_ml_peer_ext_details_tlv htt_ml_peer_ext_details_tlv;
  8953. #define HTT_ML_LINK_INFO_VALID_M 0x00000001
  8954. #define HTT_ML_LINK_INFO_VALID_S 0
  8955. #define HTT_ML_LINK_INFO_ACTIVE_M 0x00000002
  8956. #define HTT_ML_LINK_INFO_ACTIVE_S 1
  8957. #define HTT_ML_LINK_INFO_PRIMARY_M 0x00000004
  8958. #define HTT_ML_LINK_INFO_PRIMARY_S 2
  8959. #define HTT_ML_LINK_INFO_ASSOC_LINK_M 0x00000008
  8960. #define HTT_ML_LINK_INFO_ASSOC_LINK_S 3
  8961. #define HTT_ML_LINK_INFO_CHIP_ID_M 0x00000070
  8962. #define HTT_ML_LINK_INFO_CHIP_ID_S 4
  8963. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_M 0x00007F80
  8964. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_S 7
  8965. #define HTT_ML_LINK_INFO_HW_LINK_ID_M 0x00038000
  8966. #define HTT_ML_LINK_INFO_HW_LINK_ID_S 15
  8967. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M 0x000C0000
  8968. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S 18
  8969. #define HTT_ML_LINK_INFO_MASTER_LINK_M 0x00100000
  8970. #define HTT_ML_LINK_INFO_MASTER_LINK_S 20
  8971. #define HTT_ML_LINK_INFO_ANCHOR_LINK_M 0x00200000
  8972. #define HTT_ML_LINK_INFO_ANCHOR_LINK_S 21
  8973. #define HTT_ML_LINK_INFO_INITIALIZED_M 0x00400000
  8974. #define HTT_ML_LINK_INFO_INITIALIZED_S 22
  8975. #define HTT_ML_LINK_INFO_SW_PEER_ID_M 0x0000ffff
  8976. #define HTT_ML_LINK_INFO_SW_PEER_ID_S 0
  8977. #define HTT_ML_LINK_INFO_VDEV_ID_M 0x00ff0000
  8978. #define HTT_ML_LINK_INFO_VDEV_ID_S 16
  8979. #define HTT_ML_LINK_INFO_VALID_GET(_var) \
  8980. (((_var) & HTT_ML_LINK_INFO_VALID_M) >> \
  8981. HTT_ML_LINK_INFO_VALID_S)
  8982. /* provide properly-named macro */
  8983. #define HTT_STATS_ML_LINK_INFO_DETAILS_VALID_GET(_var) \
  8984. HTT_ML_LINK_INFO_VALID_GET(_var)
  8985. #define HTT_ML_LINK_INFO_VALID_SET(_var, _val) \
  8986. do { \
  8987. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_VALID, _val); \
  8988. ((_var) &= ~(HTT_ML_LINK_INFO_VALID_M)); \
  8989. ((_var) |= ((_val) << HTT_ML_LINK_INFO_VALID_S)); \
  8990. } while (0)
  8991. #define HTT_ML_LINK_INFO_ACTIVE_GET(_var) \
  8992. (((_var) & HTT_ML_LINK_INFO_ACTIVE_M) >> \
  8993. HTT_ML_LINK_INFO_ACTIVE_S)
  8994. /* provide properly-named macro */
  8995. #define HTT_STATS_ML_LINK_INFO_DETAILS_ACTIVE_GET(_var) \
  8996. HTT_ML_LINK_INFO_ACTIVE_GET(_var)
  8997. #define HTT_ML_LINK_INFO_ACTIVE_SET(_var, _val) \
  8998. do { \
  8999. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ACTIVE, _val); \
  9000. ((_var) &= ~(HTT_ML_LINK_INFO_ACTIVE_M)); \
  9001. ((_var) |= ((_val) << HTT_ML_LINK_INFO_ACTIVE_S)); \
  9002. } while (0)
  9003. #define HTT_ML_LINK_INFO_PRIMARY_GET(_var) \
  9004. (((_var) & HTT_ML_LINK_INFO_PRIMARY_M) >> \
  9005. HTT_ML_LINK_INFO_PRIMARY_S)
  9006. /* provide properly-named macro */
  9007. #define HTT_STATS_ML_LINK_INFO_DETAILS_PRIMARY_GET(_var) \
  9008. HTT_ML_LINK_INFO_PRIMARY_GET(_var)
  9009. #define HTT_ML_LINK_INFO_PRIMARY_SET(_var, _val) \
  9010. do { \
  9011. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_PRIMARY, _val); \
  9012. ((_var) &= ~(HTT_ML_LINK_INFO_PRIMARY_M)); \
  9013. ((_var) |= ((_val) << HTT_ML_LINK_INFO_PRIMARY_S)); \
  9014. } while (0)
  9015. #define HTT_ML_LINK_INFO_ASSOC_LINK_GET(_var) \
  9016. (((_var) & HTT_ML_LINK_INFO_ASSOC_LINK_M) >> \
  9017. HTT_ML_LINK_INFO_ASSOC_LINK_S)
  9018. /* provide properly-named macro */
  9019. #define HTT_STATS_ML_LINK_INFO_DETAILS_ASSOC_LINK_GET(_var) \
  9020. HTT_ML_LINK_INFO_ASSOC_LINK_GET(_var)
  9021. #define HTT_ML_LINK_INFO_ASSOC_LINK_SET(_var, _val) \
  9022. do { \
  9023. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ASSOC_LINK, _val); \
  9024. ((_var) &= ~(HTT_ML_LINK_INFO_ASSOC_LINK_M)); \
  9025. ((_var) |= ((_val) << HTT_ML_LINK_INFO_ASSOC_LINK_S)); \
  9026. } while (0)
  9027. #define HTT_ML_LINK_INFO_CHIP_ID_GET(_var) \
  9028. (((_var) & HTT_ML_LINK_INFO_CHIP_ID_M) >> \
  9029. HTT_ML_LINK_INFO_CHIP_ID_S)
  9030. /* provide properly-named macro */
  9031. #define HTT_STATS_ML_LINK_INFO_DETAILS_CHIP_ID_GET(_var) \
  9032. HTT_ML_LINK_INFO_CHIP_ID_GET(_var)
  9033. #define HTT_ML_LINK_INFO_CHIP_ID_SET(_var, _val) \
  9034. do { \
  9035. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_CHIP_ID, _val); \
  9036. ((_var) &= ~(HTT_ML_LINK_INFO_CHIP_ID_M)); \
  9037. ((_var) |= ((_val) << HTT_ML_LINK_INFO_CHIP_ID_S)); \
  9038. } while (0)
  9039. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_GET(_var) \
  9040. (((_var) & HTT_ML_LINK_INFO_IEEE_LINK_ID_M) >> \
  9041. HTT_ML_LINK_INFO_IEEE_LINK_ID_S)
  9042. /* provide properly-named macro */
  9043. #define HTT_STATS_ML_LINK_INFO_DETAILS_IEEE_LINK_ID_GET(_var) \
  9044. HTT_ML_LINK_INFO_IEEE_LINK_ID_GET(_var)
  9045. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_SET(_var, _val) \
  9046. do { \
  9047. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_IEEE_LINK_ID, _val); \
  9048. ((_var) &= ~(HTT_ML_LINK_INFO_IEEE_LINK_ID_M)); \
  9049. ((_var) |= ((_val) << HTT_ML_LINK_INFO_IEEE_LINK_ID_S)); \
  9050. } while (0)
  9051. #define HTT_ML_LINK_INFO_HW_LINK_ID_GET(_var) \
  9052. (((_var) & HTT_ML_LINK_INFO_HW_LINK_ID_M) >> \
  9053. HTT_ML_LINK_INFO_HW_LINK_ID_S)
  9054. /* provide properly-named macro */
  9055. #define HTT_STATS_ML_LINK_INFO_DETAILS_HW_LINK_ID_GET(_var) \
  9056. HTT_ML_LINK_INFO_HW_LINK_ID_GET(_var)
  9057. #define HTT_ML_LINK_INFO_HW_LINK_ID_SET(_var, _val) \
  9058. do { \
  9059. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_HW_LINK_ID, _val); \
  9060. ((_var) &= ~(HTT_ML_LINK_INFO_HW_LINK_ID_M)); \
  9061. ((_var) |= ((_val) << HTT_ML_LINK_INFO_HW_LINK_ID_S)); \
  9062. } while (0)
  9063. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_GET(_var) \
  9064. (((_var) & HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M) >> \
  9065. HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S)
  9066. /* provide properly-named macro */
  9067. #define HTT_STATS_ML_LINK_INFO_DETAILS_LOGICAL_LINK_ID_GET(_var) \
  9068. HTT_ML_LINK_INFO_LOGICAL_LINK_ID_GET(_var)
  9069. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_SET(_var, _val) \
  9070. do { \
  9071. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_LOGICAL_LINK_ID, _val); \
  9072. ((_var) &= ~(HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M)); \
  9073. ((_var) |= ((_val) << HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S)); \
  9074. } while (0)
  9075. #define HTT_ML_LINK_INFO_MASTER_LINK_GET(_var) \
  9076. (((_var) & HTT_ML_LINK_INFO_MASTER_LINK_M) >> \
  9077. HTT_ML_LINK_INFO_MASTER_LINK_S)
  9078. /* provide properly-named macro */
  9079. #define HTT_STATS_ML_LINK_INFO_DETAILS_MASTER_LINK_GET(_var) \
  9080. HTT_ML_LINK_INFO_MASTER_LINK_GET(_var)
  9081. #define HTT_ML_LINK_INFO_MASTER_LINK_SET(_var, _val) \
  9082. do { \
  9083. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_MASTER_LINK, _val); \
  9084. ((_var) &= ~(HTT_ML_LINK_INFO_MASTER_LINK_M)); \
  9085. ((_var) |= ((_val) << HTT_ML_LINK_INFO_MASTER_LINK_S)); \
  9086. } while (0)
  9087. #define HTT_ML_LINK_INFO_ANCHOR_LINK_GET(_var) \
  9088. (((_var) & HTT_ML_LINK_INFO_ANCHOR_LINK_M) >> \
  9089. HTT_ML_LINK_INFO_ANCHOR_LINK_S)
  9090. /* provide properly-named macro */
  9091. #define HTT_STATS_ML_LINK_INFO_DETAILS_ANCHOR_LINK_GET(_var) \
  9092. HTT_ML_LINK_INFO_ANCHOR_LINK_GET(_var)
  9093. #define HTT_ML_LINK_INFO_ANCHOR_LINK_SET(_var, _val) \
  9094. do { \
  9095. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ANCHOR_LINK, _val); \
  9096. ((_var) &= ~(HTT_ML_LINK_INFO_ANCHOR_LINK_M)); \
  9097. ((_var) |= ((_val) << HTT_ML_LINK_INFO_ANCHOR_LINK_S)); \
  9098. } while (0)
  9099. #define HTT_ML_LINK_INFO_INITIALIZED_GET(_var) \
  9100. (((_var) & HTT_ML_LINK_INFO_INITIALIZED_M) >> \
  9101. HTT_ML_LINK_INFO_INITIALIZED_S)
  9102. /* provide properly-named macro */
  9103. #define HTT_STATS_ML_LINK_INFO_DETAILS_INITIALIZED_GET(_var) \
  9104. HTT_ML_LINK_INFO_INITIALIZED_GET(_var)
  9105. #define HTT_ML_LINK_INFO_INITIALIZED_SET(_var, _val) \
  9106. do { \
  9107. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_INITIALIZED, _val); \
  9108. ((_var) &= ~(HTT_ML_LINK_INFO_INITIALIZED_M)); \
  9109. ((_var) |= ((_val) << HTT_ML_LINK_INFO_INITIALIZED_S)); \
  9110. } while (0)
  9111. #define HTT_ML_LINK_INFO_SW_PEER_ID_GET(_var) \
  9112. (((_var) & HTT_ML_LINK_INFO_SW_PEER_ID_M) >> \
  9113. HTT_ML_LINK_INFO_SW_PEER_ID_S)
  9114. /* provide properly-named macro */
  9115. #define HTT_STATS_ML_LINK_INFO_DETAILS_SW_PEER_ID_GET(_var) \
  9116. HTT_ML_LINK_INFO_SW_PEER_ID_GET(_var)
  9117. #define HTT_ML_LINK_INFO_SW_PEER_ID_SET(_var, _val) \
  9118. do { \
  9119. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_SW_PEER_ID, _val); \
  9120. ((_var) &= ~(HTT_ML_LINK_INFO_SW_PEER_ID_M)); \
  9121. ((_var) |= ((_val) << HTT_ML_LINK_INFO_SW_PEER_ID_S)); \
  9122. } while (0)
  9123. #define HTT_ML_LINK_INFO_VDEV_ID_GET(_var) \
  9124. (((_var) & HTT_ML_LINK_INFO_VDEV_ID_M) >> \
  9125. HTT_ML_LINK_INFO_VDEV_ID_S)
  9126. /* provide properly-named macro */
  9127. #define HTT_STATS_ML_LINK_INFO_DETAILS_VDEV_ID_GET(_var) \
  9128. HTT_ML_LINK_INFO_VDEV_ID_GET(_var)
  9129. #define HTT_ML_LINK_INFO_VDEV_ID_SET(_var, _val) \
  9130. do { \
  9131. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_VDEV_ID, _val); \
  9132. ((_var) &= ~(HTT_ML_LINK_INFO_VDEV_ID_M)); \
  9133. ((_var) |= ((_val) << HTT_ML_LINK_INFO_VDEV_ID_S)); \
  9134. } while (0)
  9135. typedef struct {
  9136. htt_tlv_hdr_t tlv_hdr;
  9137. union {
  9138. struct {
  9139. A_UINT32 valid : 1,
  9140. active : 1,
  9141. primary : 1,
  9142. assoc_link : 1,
  9143. chip_id : 3,
  9144. ieee_link_id : 8,
  9145. hw_link_id : 3,
  9146. logical_link_id : 2,
  9147. master_link : 1,
  9148. anchor_link : 1,
  9149. initialized : 1,
  9150. reserved : 9;
  9151. };
  9152. A_UINT32 msg_dword_1;
  9153. };
  9154. union {
  9155. struct {
  9156. A_UINT32 sw_peer_id : 16,
  9157. vdev_id : 8,
  9158. reserved1 : 8;
  9159. };
  9160. A_UINT32 msg_dword_2;
  9161. };
  9162. A_UINT32 primary_tid_mask;
  9163. } htt_stats_ml_link_info_details_tlv;
  9164. /* preserve old name alias for new name consistent with the tag name */
  9165. typedef htt_stats_ml_link_info_details_tlv htt_ml_link_info_tlv;
  9166. #define HTT_ML_PEER_DETAILS_NUM_LINKS_M 0x00000003
  9167. #define HTT_ML_PEER_DETAILS_NUM_LINKS_S 0
  9168. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_M 0x00003FFC
  9169. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_S 2
  9170. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M 0x0001C000
  9171. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S 14
  9172. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M 0x00060000
  9173. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S 17
  9174. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M 0x00380000
  9175. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S 19
  9176. #define HTT_ML_PEER_DETAILS_NON_STR_M 0x00400000
  9177. #define HTT_ML_PEER_DETAILS_NON_STR_S 22
  9178. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M 0x00800000
  9179. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S 23
  9180. /* for backwards compatibility, retain the old EMLSR name of the bitfield */
  9181. #define HTT_ML_PEER_DETAILS_EMLSR_M HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M
  9182. #define HTT_ML_PEER_DETAILS_EMLSR_S HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S
  9183. #define HTT_ML_PEER_DETAILS_IS_STA_KO_M 0x01000000
  9184. #define HTT_ML_PEER_DETAILS_IS_STA_KO_S 24
  9185. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M 0x06000000
  9186. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S 25
  9187. #define HTT_ML_PEER_DETAILS_ALLOCATED_M 0x08000000
  9188. #define HTT_ML_PEER_DETAILS_ALLOCATED_S 27
  9189. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_M 0x10000000
  9190. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_S 28
  9191. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M 0x000000ff
  9192. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S 0
  9193. #define HTT_ML_PEER_DETAILS_NUM_LINKS_GET(_var) \
  9194. (((_var) & HTT_ML_PEER_DETAILS_NUM_LINKS_M) >> \
  9195. HTT_ML_PEER_DETAILS_NUM_LINKS_S)
  9196. /* provide properly-named macro */
  9197. #define HTT_STATS_ML_PEER_DETAILS_NUM_LINKS_GET(_var) \
  9198. HTT_ML_PEER_DETAILS_NUM_LINKS_GET(_var)
  9199. #define HTT_ML_PEER_DETAILS_NUM_LINKS_SET(_var, _val) \
  9200. do { \
  9201. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NUM_LINKS, _val); \
  9202. ((_var) &= ~(HTT_ML_PEER_DETAILS_NUM_LINKS_M)); \
  9203. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NUM_LINKS_S)); \
  9204. } while (0)
  9205. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_GET(_var) \
  9206. (((_var) & HTT_ML_PEER_DETAILS_ML_PEER_ID_M) >> \
  9207. HTT_ML_PEER_DETAILS_ML_PEER_ID_S)
  9208. /* provide properly-named macro */
  9209. #define HTT_STATS_ML_PEER_DETAILS_ML_PEER_ID_GET(_var) \
  9210. HTT_ML_PEER_DETAILS_ML_PEER_ID_GET(_var)
  9211. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_SET(_var, _val) \
  9212. do { \
  9213. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_ML_PEER_ID, _val); \
  9214. ((_var) &= ~(HTT_ML_PEER_DETAILS_ML_PEER_ID_M)); \
  9215. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_ML_PEER_ID_S)); \
  9216. } while (0)
  9217. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_GET(_var) \
  9218. (((_var) & HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M) >> \
  9219. HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S)
  9220. /* provide properly-named macro */
  9221. #define HTT_STATS_ML_PEER_DETAILS_PRIMARY_LINK_IDX_GET(_var) \
  9222. HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_GET(_var)
  9223. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_SET(_var, _val) \
  9224. do { \
  9225. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX, _val); \
  9226. ((_var) &= ~(HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M)); \
  9227. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S)); \
  9228. } while (0)
  9229. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_GET(_var) \
  9230. (((_var) & HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M) >> \
  9231. HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S)
  9232. /* provide properly-named macro */
  9233. #define HTT_STATS_ML_PEER_DETAILS_PRIMARY_CHIP_ID_GET(_var) \
  9234. HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_GET(_var)
  9235. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_SET(_var, _val) \
  9236. do { \
  9237. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID, _val); \
  9238. ((_var) &= ~(HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M)); \
  9239. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S)); \
  9240. } while (0)
  9241. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_GET(_var) \
  9242. (((_var) & HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M) >> \
  9243. HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S)
  9244. /* provide properly-named macro */
  9245. #define HTT_STATS_ML_PEER_DETAILS_LINK_INIT_COUNT_GET(_var) \
  9246. HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_GET(_var)
  9247. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_SET(_var, _val) \
  9248. do { \
  9249. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_LINK_INIT_COUNT, _val); \
  9250. ((_var) &= ~(HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M)); \
  9251. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S)); \
  9252. } while (0)
  9253. #define HTT_ML_PEER_DETAILS_NON_STR_GET(_var) \
  9254. (((_var) & HTT_ML_PEER_DETAILS_NON_STR_M) >> \
  9255. HTT_ML_PEER_DETAILS_NON_STR_S)
  9256. /* provide properly-named macro */
  9257. #define HTT_STATS_ML_PEER_DETAILS_NON_STR_GET(_var) \
  9258. HTT_ML_PEER_DETAILS_NON_STR_GET(_var)
  9259. #define HTT_ML_PEER_DETAILS_NON_STR_SET(_var, _val) \
  9260. do { \
  9261. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NON_STR, _val); \
  9262. ((_var) &= ~(HTT_ML_PEER_DETAILS_NON_STR_M)); \
  9263. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NON_STR_S)); \
  9264. } while (0)
  9265. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_GET(_var) \
  9266. (((_var) & HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M) >> \
  9267. HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S)
  9268. /* provide properly-named macro */
  9269. #define HTT_STATS_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_GET(_var) \
  9270. HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_GET(_var)
  9271. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_SET(_var, _val) \
  9272. do { \
  9273. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE, _val); \
  9274. ((_var) &= ~(HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M)); \
  9275. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S)); \
  9276. } while (0)
  9277. /* start deprecated:
  9278. * For backwards compatibility, retain a macro definition that uses
  9279. * the old EMLSR name of the bitfield
  9280. */
  9281. #define HTT_ML_PEER_DETAILS_EMLSR_GET(_var) \
  9282. (((_var) & HTT_ML_PEER_DETAILS_EMLSR_M) >> \
  9283. HTT_ML_PEER_DETAILS_EMLSR_S)
  9284. #define HTT_ML_PEER_DETAILS_EMLSR_SET(_var, _val) \
  9285. do { \
  9286. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_EMLSR, _val); \
  9287. ((_var) &= ~(HTT_ML_PEER_DETAILS_EMLSR_M)); \
  9288. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_EMLSR_S)); \
  9289. } while (0)
  9290. /* end deprecated */
  9291. #define HTT_ML_PEER_DETAILS_IS_STA_KO_GET(_var) \
  9292. (((_var) & HTT_ML_PEER_DETAILS_IS_STA_KO_M) >> \
  9293. HTT_ML_PEER_DETAILS_IS_STA_KO_S)
  9294. /* provide properly-named macro */
  9295. #define HTT_STATS_ML_PEER_DETAILS_IS_STA_KO_GET(_var) \
  9296. HTT_ML_PEER_DETAILS_IS_STA_KO_GET(_var)
  9297. #define HTT_ML_PEER_DETAILS_IS_STA_KO_SET(_var, _val) \
  9298. do { \
  9299. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_IS_STA_KO, _val); \
  9300. ((_var) &= ~(HTT_ML_PEER_DETAILS_IS_STA_KO_M)); \
  9301. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_IS_STA_KO_S)); \
  9302. } while (0)
  9303. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_GET(_var) \
  9304. (((_var) & HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M) >> \
  9305. HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S)
  9306. /* provide properly-named macro */
  9307. #define HTT_STATS_ML_PEER_DETAILS_NUM_LOCAL_LINKS_GET(_var) \
  9308. HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_GET(_var)
  9309. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_SET(_var, _val) \
  9310. do { \
  9311. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS, _val); \
  9312. ((_var) &= ~(HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M)); \
  9313. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S)); \
  9314. } while (0)
  9315. #define HTT_ML_PEER_DETAILS_ALLOCATED_GET(_var) \
  9316. (((_var) & HTT_ML_PEER_DETAILS_ALLOCATED_M) >> \
  9317. HTT_ML_PEER_DETAILS_ALLOCATED_S)
  9318. /* provide properly-named macro */
  9319. #define HTT_STATS_ML_PEER_DETAILS_ALLOCATED_GET(_var) \
  9320. HTT_ML_PEER_DETAILS_ALLOCATED_GET(_var)
  9321. #define HTT_ML_PEER_DETAILS_ALLOCATED_SET(_var, _val) \
  9322. do { \
  9323. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_ALLOCATED, _val); \
  9324. ((_var) &= ~(HTT_ML_PEER_DETAILS_ALLOCATED_M)); \
  9325. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_ALLOCATED_S)); \
  9326. } while (0)
  9327. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_GET(_var) \
  9328. (((_var) & HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_M) >> \
  9329. HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_S)
  9330. /* provide properly-named macro */
  9331. #define HTT_STATS_ML_PEER_DETAILS_EMLSR_SUPPORT_GET(_var) \
  9332. HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_GET(_var)
  9333. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_SET(_var, _val) \
  9334. do { \
  9335. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_EMLSR_SUPPORT, _val); \
  9336. ((_var) &= ~(HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_M)); \
  9337. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_S)); \
  9338. } while (0)
  9339. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_GET(_var) \
  9340. (((_var) & HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M) >> \
  9341. HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)
  9342. /* provide properly-named macro */
  9343. #define HTT_STATS_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_GET(_var) \
  9344. HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_GET(_var)
  9345. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_SET(_var, _val) \
  9346. do { \
  9347. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP, _val); \
  9348. ((_var) &= ~(HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M)); \
  9349. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)); \
  9350. } while (0)
  9351. typedef struct {
  9352. htt_tlv_hdr_t tlv_hdr;
  9353. htt_mac_addr remote_mld_mac_addr;
  9354. union {
  9355. struct {
  9356. A_UINT32 num_links : 2,
  9357. ml_peer_id : 12,
  9358. primary_link_idx : 3,
  9359. primary_chip_id : 2,
  9360. link_init_count : 3,
  9361. non_str : 1,
  9362. is_emlsr_active : 1,
  9363. is_sta_ko : 1,
  9364. num_local_links : 2,
  9365. allocated : 1,
  9366. emlsr_support : 1,
  9367. reserved : 3;
  9368. };
  9369. struct {
  9370. /*
  9371. * For backwards compatibility, use a dummy union element to
  9372. * retain the old "emlsr" name for the "is_emlsr_active" bitfield.
  9373. */
  9374. A_UINT32 dummy1 : 23,
  9375. emlsr : 1,
  9376. dummy2 : 8;
  9377. };
  9378. A_UINT32 msg_dword_1;
  9379. };
  9380. union {
  9381. struct {
  9382. A_UINT32 participating_chips_bitmap : 8,
  9383. reserved1 : 24;
  9384. };
  9385. A_UINT32 msg_dword_2;
  9386. };
  9387. /*
  9388. * ml_peer_flags is an opaque field that cannot be interpreted by
  9389. * the host; it is only for off-line debug.
  9390. */
  9391. A_UINT32 ml_peer_flags;
  9392. } htt_stats_ml_peer_details_tlv;
  9393. /* preserve old name alias for new name consistent with the tag name */
  9394. typedef htt_stats_ml_peer_details_tlv htt_ml_peer_details_tlv;
  9395. /* STATS_TYPE : HTT_DBG_EXT_STATS_ML_PEERS_INFO
  9396. * TLV_TAGS:
  9397. * - HTT_STATS_ML_PEER_DETAILS_TAG
  9398. * - HTT_STATS_ML_LINK_INFO_DETAILS_TAG
  9399. * - HTT_STATS_ML_PEER_EXT_DETAILS_TAG (multiple)
  9400. */
  9401. /* NOTE:
  9402. * This structure is for documentation, and cannot be safely used directly.
  9403. * Instead, use the constituent TLV structures to fill/parse.
  9404. */
  9405. #ifdef ATH_TARGET
  9406. typedef struct _htt_ml_peer_stats {
  9407. htt_stats_ml_peer_details_tlv ml_peer_details;
  9408. htt_stats_ml_peer_ext_details_tlv ml_peer_ext_details;
  9409. htt_stats_ml_link_info_details_tlv ml_link_info[1];
  9410. } htt_ml_peer_stats_t;
  9411. #endif /* ATH_TARGET */
  9412. /*
  9413. * ODD Mandatory Stats are grouped together from all the existing different
  9414. * stats, to form a set of stats that will be used by the ODD application to
  9415. * post the stats to the cloud instead of polling for the individual stats.
  9416. * This is done to avoid non-mandatory stats to be polled as the data will not
  9417. * be required in the recipes derivation.
  9418. * Rather than the host simply printing the ODD stats, the ODD application
  9419. * will take the buffer and map it to the odd_mandatory_stats data structure.
  9420. */
  9421. typedef struct {
  9422. htt_tlv_hdr_t tlv_hdr;
  9423. A_UINT32 hw_queued;
  9424. A_UINT32 hw_reaped;
  9425. A_UINT32 hw_paused;
  9426. A_UINT32 hw_filt;
  9427. A_UINT32 seq_posted;
  9428. A_UINT32 seq_completed;
  9429. A_UINT32 underrun;
  9430. A_UINT32 hw_flush;
  9431. A_UINT32 next_seq_posted_dsr;
  9432. A_UINT32 seq_posted_isr;
  9433. A_UINT32 mpdu_cnt_fcs_ok;
  9434. A_UINT32 mpdu_cnt_fcs_err;
  9435. A_UINT32 msdu_count_tqm;
  9436. A_UINT32 mpdu_count_tqm;
  9437. A_UINT32 mpdus_ack_failed;
  9438. A_UINT32 num_data_ppdus_tried_ota;
  9439. A_UINT32 ppdu_ok;
  9440. A_UINT32 num_total_ppdus_tried_ota;
  9441. A_UINT32 thermal_suspend_cnt;
  9442. A_UINT32 dfs_suspend_cnt;
  9443. A_UINT32 tx_abort_suspend_cnt;
  9444. A_UINT32 suspended_txq_mask;
  9445. A_UINT32 last_suspend_reason;
  9446. A_UINT32 seq_failed_queueing;
  9447. A_UINT32 seq_restarted;
  9448. A_UINT32 seq_txop_repost_stop;
  9449. A_UINT32 next_seq_cancel;
  9450. A_UINT32 seq_min_msdu_repost_stop;
  9451. A_UINT32 total_phy_err_cnt;
  9452. A_UINT32 ppdu_recvd;
  9453. A_UINT32 tcp_msdu_cnt;
  9454. A_UINT32 tcp_ack_msdu_cnt;
  9455. A_UINT32 udp_msdu_cnt;
  9456. A_UINT32 fw_tx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  9457. A_UINT32 fw_rx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  9458. A_UINT32 fw_ring_mpdu_err[HTT_RX_STATS_RXDMA_MAX_ERR];
  9459. A_UINT32 urrn_stats[HTT_TX_PDEV_MAX_URRN_STATS];
  9460. A_UINT32 sifs_status[HTT_TX_PDEV_MAX_SIFS_BURST_STATS];
  9461. A_UINT32 sifs_hist_status[HTT_TX_PDEV_SIFS_BURST_HIST_STATS];
  9462. A_UINT32 rx_suspend_cnt;
  9463. A_UINT32 rx_suspend_fail_cnt;
  9464. A_UINT32 rx_resume_cnt;
  9465. A_UINT32 rx_resume_fail_cnt;
  9466. A_UINT32 hwq_beacon_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  9467. A_UINT32 hwq_voice_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  9468. A_UINT32 hwq_video_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  9469. A_UINT32 hwq_best_effort_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  9470. A_UINT32 hwq_beacon_mpdu_tried_cnt;
  9471. A_UINT32 hwq_voice_mpdu_tried_cnt;
  9472. A_UINT32 hwq_video_mpdu_tried_cnt;
  9473. A_UINT32 hwq_best_effort_mpdu_tried_cnt;
  9474. A_UINT32 hwq_beacon_mpdu_queued_cnt;
  9475. A_UINT32 hwq_voice_mpdu_queued_cnt;
  9476. A_UINT32 hwq_video_mpdu_queued_cnt;
  9477. A_UINT32 hwq_best_effort_mpdu_queued_cnt;
  9478. A_UINT32 hwq_beacon_mpdu_ack_fail_cnt;
  9479. A_UINT32 hwq_voice_mpdu_ack_fail_cnt;
  9480. A_UINT32 hwq_video_mpdu_ack_fail_cnt;
  9481. A_UINT32 hwq_best_effort_mpdu_ack_fail_cnt;
  9482. A_UINT32 pdev_resets;
  9483. A_UINT32 phy_warm_reset;
  9484. A_UINT32 hwsch_reset_count;
  9485. A_UINT32 phy_warm_reset_ucode_trig;
  9486. A_UINT32 mac_cold_reset;
  9487. A_UINT32 mac_warm_reset;
  9488. A_UINT32 mac_warm_reset_restore_cal;
  9489. A_UINT32 phy_warm_reset_m3_ssr;
  9490. A_UINT32 fw_rx_rings_reset;
  9491. A_UINT32 tx_flush;
  9492. A_UINT32 hwsch_dev_reset_war;
  9493. A_UINT32 mac_cold_reset_restore_cal;
  9494. A_UINT32 mac_only_reset;
  9495. A_UINT32 mac_sfm_reset;
  9496. A_UINT32 tx_ldpc; /* Number of tx PPDUs with LDPC coding */
  9497. A_UINT32 rx_ldpc; /* Number of rx PPDUs with LDPC coding */
  9498. A_UINT32 gen_mpdu_end_reason[HTT_TX_TQM_MAX_GEN_MPDU_END_REASON];
  9499. A_UINT32 list_mpdu_end_reason[HTT_TX_TQM_MAX_LIST_MPDU_END_REASON];
  9500. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9501. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9502. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9503. A_UINT32 half_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9504. A_UINT32 quarter_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9505. A_UINT32 tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  9506. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9507. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9508. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  9509. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9510. A_UINT32 rts_cnt;
  9511. A_UINT32 rts_success;
  9512. } htt_stats_odd_pdev_mandatory_tlv;
  9513. /* preserve old name alias for new name consistent with the tag name */
  9514. typedef htt_stats_odd_pdev_mandatory_tlv htt_odd_mandatory_pdev_stats_tlv;
  9515. typedef struct _htt_odd_mandatory_mumimo_pdev_stats_tlv {
  9516. htt_tlv_hdr_t tlv_hdr;
  9517. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9518. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9519. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9520. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9521. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  9522. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  9523. A_UINT32 ul_mumimo_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  9524. A_UINT32 ul_mumimo_rx_nss[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  9525. A_UINT32 ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  9526. A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9527. A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9528. A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9529. } htt_dbg_odd_mandatory_mumimo_tlv;
  9530. /* preserve old name alias for new name consistent with the tag name */
  9531. typedef htt_dbg_odd_mandatory_mumimo_tlv
  9532. htt_odd_mandatory_mumimo_pdev_stats_tlv;
  9533. typedef struct _htt_odd_mandatory_muofdma_pdev_stats_tlv {
  9534. htt_tlv_hdr_t tlv_hdr;
  9535. A_UINT32 mu_ofdma_seq_posted;
  9536. A_UINT32 ul_mu_ofdma_seq_posted;
  9537. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9538. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9539. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9540. A_UINT32 ofdma_tx_ldpc;
  9541. A_UINT32 ul_ofdma_rx_ldpc;
  9542. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9543. A_UINT32 ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9544. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9545. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9546. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9547. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9548. A_UINT32 ax_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  9549. A_UINT32 be_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  9550. A_UINT32 ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS];
  9551. A_UINT32 ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS];
  9552. } htt_dbg_odd_mandatory_muofdma_tlv;
  9553. /* preserve old name alias for new name consistent with the tag name */
  9554. typedef htt_dbg_odd_mandatory_muofdma_tlv
  9555. htt_odd_mandatory_muofdma_pdev_stats_tlv;
  9556. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_M 0x000000ff
  9557. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_S 0
  9558. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_GET(_var) \
  9559. (((_var) & HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_M) >> \
  9560. HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_S)
  9561. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_SET(_var, _val) \
  9562. do { \
  9563. HTT_CHECK_SET_VAL(HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID, _val); \
  9564. ((_var) |= ((_val) << HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_S)); \
  9565. } while (0)
  9566. typedef enum {
  9567. HTT_STATS_SCHED_OFDMA_TXBF = 0, /* 0 */
  9568. HTT_STATS_SCHED_OFDMA_TXBF_IS_SANITY_FAILED, /* 1 */
  9569. HTT_STATS_SCHED_OFDMA_TXBF_IS_EBF_ALLOWED_FAILIED, /* 2 */
  9570. HTT_STATS_SCHED_OFDMA_TXBF_RU_ALLOC_BW_DROP_COUNT, /* 3 */
  9571. HTT_STATS_SCHED_OFDMA_TXBF_INVALID_CV_QUERY_COUNT, /* 4 */
  9572. HTT_STATS_SCHED_OFDMA_TXBF_AVG_TXTIME_LESS_THAN_TXBF_SND_THERHOLD, /* 5 */
  9573. HTT_STATS_SCHED_OFDMA_TXBF_IS_CANDIDATE_KICKED_OUT, /* 6 */
  9574. HTT_STATS_SCHED_OFDMA_TXBF_CV_IMAGE_BUF_INVALID, /* 7 */
  9575. HTT_STATS_SCHED_OFDMA_TXBF_INELIGIBILITY_MAX,
  9576. } htt_stats_sched_ofdma_txbf_ineligibility_t;
  9577. #define HTT_MAX_NUM_CHAN_ACC_LAT_INTR 9
  9578. typedef struct {
  9579. htt_tlv_hdr_t tlv_hdr;
  9580. /**
  9581. * BIT [ 7 : 0] :- mac_id
  9582. * BIT [31 : 8] :- reserved
  9583. */
  9584. union {
  9585. struct {
  9586. A_UINT32 mac_id: 8,
  9587. reserved: 24;
  9588. };
  9589. A_UINT32 mac_id__word;
  9590. };
  9591. /** Num of instances where rate based DL OFDMA status = ENABLED */
  9592. A_UINT32 rate_based_dlofdma_enabled_count[HTT_NUM_AC_WMM];
  9593. /** Num of instances where rate based DL OFDMA status = DISABLED */
  9594. A_UINT32 rate_based_dlofdma_disabled_count[HTT_NUM_AC_WMM];
  9595. /** Num of instances where rate based DL OFDMA status = PROBING */
  9596. A_UINT32 rate_based_dlofdma_probing_count[HTT_NUM_AC_WMM];
  9597. /** Num of instances where rate based DL OFDMA status = MONITORING */
  9598. A_UINT32 rate_based_dlofdma_monitoring_count[HTT_NUM_AC_WMM];
  9599. /** Num of instances where avg. channel access latency based DL OFDMA status = ENABLED */
  9600. A_UINT32 chan_acc_lat_based_dlofdma_enabled_count[HTT_NUM_AC_WMM];
  9601. /** Num of instances where avg. channel access latency based DL OFDMA status = DISABLED */
  9602. A_UINT32 chan_acc_lat_based_dlofdma_disabled_count[HTT_NUM_AC_WMM];
  9603. /** Num of instances where avg. channel access latency based DL OFDMA status = MONITORING */
  9604. A_UINT32 chan_acc_lat_based_dlofdma_monitoring_count[HTT_NUM_AC_WMM];
  9605. /** Num of instances where dl ofdma is disabled due to ru allocation failure */
  9606. A_UINT32 downgrade_to_dl_su_ru_alloc_fail[HTT_NUM_AC_WMM];
  9607. /** Num of instances where dl ofdma is disabled because we have only one user in candidate list */
  9608. A_UINT32 candidate_list_single_user_disable_ofdma[HTT_NUM_AC_WMM];
  9609. /** Num of instances where ul is chosen over dl based on qos weight not specific to OFDMA */
  9610. A_UINT32 dl_cand_list_dropped_high_ul_qos_weight[HTT_NUM_AC_WMM];
  9611. /** Num of instances where dl ofdma is disabled due to pipelining */
  9612. A_UINT32 ax_dlofdma_disabled_due_to_pipelining[HTT_NUM_AC_WMM];
  9613. /** Num of instances where dl ofdma is disabled as the tid is su only eligible */
  9614. A_UINT32 dlofdma_disabled_su_only_eligible[HTT_NUM_AC_WMM];
  9615. /** Num of instances where dl ofdma is disabled because there are no mpdus tried consecutively */
  9616. A_UINT32 dlofdma_disabled_consec_no_mpdus_tried[HTT_NUM_AC_WMM];
  9617. /** Num of instances where dl ofdma is disabled because there are consecutive mpdu failure */
  9618. A_UINT32 dlofdma_disabled_consec_no_mpdus_success[HTT_NUM_AC_WMM];
  9619. A_UINT32 txbf_ofdma_ineligibility_stat[HTT_STATS_SCHED_OFDMA_TXBF_INELIGIBILITY_MAX];
  9620. /** Average channel access latency histogram stats
  9621. *
  9622. * avg_chan_acc_lat_hist[0]: channel access latency is < 100 us
  9623. * avg_chan_acc_lat_hist[1]: 100 us <= channel access latency < 200 us
  9624. * avg_chan_acc_lat_hist[2]: 200 us <= channel access latency < 300 us
  9625. * avg_chan_acc_lat_hist[3]: 300 us <= channel access latency < 400 us
  9626. * avg_chan_acc_lat_hist[4]: 400 us <= channel access latency < 500 us
  9627. * avg_chan_acc_lat_hist[5]: 500 us <= channel access latency < 1000 us
  9628. * avg_chan_acc_lat_hist[6]: 1000 us <= channel access latency < 1500 us
  9629. * avg_chan_acc_lat_hist[7]: 1500 us <= channel access latency < 2000 us
  9630. * avg_chan_acc_lat_hist[8]: channel access latency is >= 2000 us
  9631. */
  9632. A_UINT32 avg_chan_acc_lat_hist[HTT_MAX_NUM_CHAN_ACC_LAT_INTR];
  9633. } htt_stats_pdev_sched_algo_ofdma_stats_tlv;
  9634. /* preserve old name alias for new name consistent with the tag name */
  9635. typedef htt_stats_pdev_sched_algo_ofdma_stats_tlv
  9636. htt_pdev_sched_algo_ofdma_stats_tlv;
  9637. #define HTT_STATS_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_GET(word) ((word >> 0) & 0xff)
  9638. typedef struct {
  9639. htt_tlv_hdr_t tlv_hdr;
  9640. /** mac_id__word:
  9641. * BIT [ 7 : 0] :- mac_id
  9642. * Use the HTT_STATS_CMN_MAC_ID_GET,_SET macros to
  9643. * read/write this bitfield.
  9644. * BIT [31 : 8] :- reserved
  9645. */
  9646. A_UINT32 mac_id__word;
  9647. A_UINT32 basic_trigger_across_bss;
  9648. A_UINT32 basic_trigger_within_bss;
  9649. A_UINT32 bsr_trigger_across_bss;
  9650. A_UINT32 bsr_trigger_within_bss;
  9651. A_UINT32 mu_rts_across_bss;
  9652. A_UINT32 mu_rts_within_bss;
  9653. A_UINT32 ul_mumimo_trigger_across_bss;
  9654. A_UINT32 ul_mumimo_trigger_within_bss;
  9655. } htt_stats_pdev_mbssid_ctrl_frame_stats_tlv;
  9656. /* preserve old name alias for new name consistent with the tag name */
  9657. typedef htt_stats_pdev_mbssid_ctrl_frame_stats_tlv
  9658. htt_pdev_mbssid_ctrl_frame_stats_tlv;
  9659. typedef struct {
  9660. htt_tlv_hdr_t tlv_hdr;
  9661. /**
  9662. * BIT [ 7 : 0] :- mac_id
  9663. * Use the HTT_STATS_TDMA_MAC_ID_GET macro to extract
  9664. * this bitfield.
  9665. * BIT [31 : 8] :- reserved
  9666. */
  9667. union {
  9668. struct {
  9669. A_UINT32 mac_id: 8,
  9670. reserved: 24;
  9671. };
  9672. A_UINT32 mac_id__word;
  9673. };
  9674. /** Num of Active TDMA schedules */
  9675. A_UINT32 num_tdma_active_schedules;
  9676. /** Num of Reserved TDMA schedules */
  9677. A_UINT32 num_tdma_reserved_schedules;
  9678. /** Num of Restricted TDMA schedules */
  9679. A_UINT32 num_tdma_restricted_schedules;
  9680. /** Num of Unconfigured TDMA schedules */
  9681. A_UINT32 num_tdma_unconfigured_schedules;
  9682. /** Num of TDMA slot switches */
  9683. A_UINT32 num_tdma_slot_switches;
  9684. /** Num of TDMA EDCA switches */
  9685. A_UINT32 num_tdma_edca_switches;
  9686. } htt_stats_pdev_tdma_tlv;
  9687. /* preserve old name alias for new name consistent with the tag name */
  9688. typedef htt_stats_pdev_tdma_tlv htt_pdev_tdma_stats_tlv;
  9689. #define HTT_STATS_TDMA_MAC_ID_M 0x000000ff
  9690. #define HTT_STATS_TDMA_MAC_ID_S 0
  9691. #define HTT_STATS_TDMA_MAC_ID_GET(_var) \
  9692. (((_var) & HTT_STATS_TDMA_MAC_ID_M) >> \
  9693. HTT_STATS_TDMA_MAC_ID_S)
  9694. /* provide properly-named macro */
  9695. #define HTT_STATS_PDEV_TDMA_MAC_ID_GET(_var) \
  9696. HTT_STATS_TDMA_MAC_ID_GET(_var)
  9697. /*======= Bandwidth Manager stats ====================*/
  9698. #define HTT_BW_MGR_STATS_MAC_ID_M 0x000000ff
  9699. #define HTT_BW_MGR_STATS_MAC_ID_S 0
  9700. #define HTT_BW_MGR_STATS_PRI20_IDX_M 0x0000ff00
  9701. #define HTT_BW_MGR_STATS_PRI20_IDX_S 8
  9702. #define HTT_BW_MGR_STATS_PRI20_FREQ_M 0xffff0000
  9703. #define HTT_BW_MGR_STATS_PRI20_FREQ_S 16
  9704. #define HTT_BW_MGR_STATS_CENTER_FREQ1_M 0x0000ffff
  9705. #define HTT_BW_MGR_STATS_CENTER_FREQ1_S 0
  9706. #define HTT_BW_MGR_STATS_CENTER_FREQ2_M 0xffff0000
  9707. #define HTT_BW_MGR_STATS_CENTER_FREQ2_S 16
  9708. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_M 0x000000ff
  9709. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_S 0
  9710. #define HTT_BW_MGR_STATS_STATIC_PATTERN_M 0x00ffff00
  9711. #define HTT_BW_MGR_STATS_STATIC_PATTERN_S 8
  9712. #define HTT_BW_MGR_STATS_MAC_ID_GET(_var) \
  9713. (((_var) & HTT_BW_MGR_STATS_MAC_ID_M) >> \
  9714. HTT_BW_MGR_STATS_MAC_ID_S)
  9715. #define HTT_BW_MGR_STATS_MAC_ID_SET(_var, _val) \
  9716. do { \
  9717. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_MAC_ID, _val); \
  9718. ((_var) |= ((_val) << HTT_BW_MGR_STATS_MAC_ID_S)); \
  9719. } while (0)
  9720. #define HTT_BW_MGR_STATS_PRI20_IDX_GET(_var) \
  9721. (((_var) & HTT_BW_MGR_STATS_PRI20_IDX_M) >> \
  9722. HTT_BW_MGR_STATS_PRI20_IDX_S)
  9723. #define HTT_BW_MGR_STATS_PRI20_IDX_SET(_var, _val) \
  9724. do { \
  9725. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_IDX, _val); \
  9726. ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_IDX_S)); \
  9727. } while (0)
  9728. #define HTT_BW_MGR_STATS_PRI20_FREQ_GET(_var) \
  9729. (((_var) & HTT_BW_MGR_STATS_PRI20_FREQ_M) >> \
  9730. HTT_BW_MGR_STATS_PRI20_FREQ_S)
  9731. #define HTT_BW_MGR_STATS_PRI20_FREQ_SET(_var, _val) \
  9732. do { \
  9733. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_FREQ, _val); \
  9734. ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_FREQ_S)); \
  9735. } while (0)
  9736. #define HTT_BW_MGR_STATS_CENTER_FREQ1_GET(_var) \
  9737. (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ1_M) >> \
  9738. HTT_BW_MGR_STATS_CENTER_FREQ1_S)
  9739. #define HTT_BW_MGR_STATS_CENTER_FREQ1_SET(_var, _val) \
  9740. do { \
  9741. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ1, _val); \
  9742. ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ1_S)); \
  9743. } while (0)
  9744. #define HTT_BW_MGR_STATS_CENTER_FREQ2_GET(_var) \
  9745. (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ2_M) >> \
  9746. HTT_BW_MGR_STATS_CENTER_FREQ2_S)
  9747. #define HTT_BW_MGR_STATS_CENTER_FREQ2_SET(_var, _val) \
  9748. do { \
  9749. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ2, _val); \
  9750. ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ2_S)); \
  9751. } while (0)
  9752. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_GET(_var) \
  9753. (((_var) & HTT_BW_MGR_STATS_CHAN_PHY_MODE_M) >> \
  9754. HTT_BW_MGR_STATS_CHAN_PHY_MODE_S)
  9755. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_SET(_var, _val) \
  9756. do { \
  9757. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CHAN_PHY_MODE, _val); \
  9758. ((_var) |= ((_val) << HTT_BW_MGR_STATS_CHAN_PHY_MODE_S)); \
  9759. } while (0)
  9760. #define HTT_BW_MGR_STATS_STATIC_PATTERN_GET(_var) \
  9761. (((_var) & HTT_BW_MGR_STATS_STATIC_PATTERN_M) >> \
  9762. HTT_BW_MGR_STATS_STATIC_PATTERN_S)
  9763. #define HTT_BW_MGR_STATS_STATIC_PATTERN_SET(_var, _val) \
  9764. do { \
  9765. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_STATIC_PATTERN, _val); \
  9766. ((_var) |= ((_val) << HTT_BW_MGR_STATS_STATIC_PATTERN_S)); \
  9767. } while (0)
  9768. typedef struct {
  9769. htt_tlv_hdr_t tlv_hdr;
  9770. /* BIT [ 7 : 0] :- mac_id
  9771. * BIT [ 15 : 8] :- pri20_index
  9772. * BIT [ 31 : 16] :- pri20_freq in Mhz
  9773. */
  9774. A_UINT32 mac_id__pri20_idx__freq;
  9775. /* BIT [ 15 : 0] :- centre_freq1
  9776. * BIT [ 31 : 16] :- centre_freq2
  9777. */
  9778. A_UINT32 centre_freq1__freq2;
  9779. /* BIT [ 7 : 0] :- channel_phy_mode
  9780. * BIT [ 23 : 8] :- static_pattern
  9781. */
  9782. A_UINT32 phy_mode__static_pattern;
  9783. } htt_stats_pdev_bw_mgr_stats_tlv;
  9784. /* preserve old name alias for new name consistent with the tag name */
  9785. typedef htt_stats_pdev_bw_mgr_stats_tlv htt_pdev_bw_mgr_stats_tlv;
  9786. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_BW_MGR
  9787. * TLV_TAGS:
  9788. * - HTT_STATS_PDEV_BW_MGR_STATS_TAG
  9789. */
  9790. /* NOTE:
  9791. * This structure is for documentation, and cannot be safely used directly.
  9792. * Instead, use the constituent TLV structures to fill/parse.
  9793. */
  9794. #ifdef ATH_TARGET
  9795. typedef struct {
  9796. htt_stats_pdev_bw_mgr_stats_tlv bw_mgr_tlv;
  9797. } htt_pdev_bw_mgr_stats_t;
  9798. #endif /* ATH_TARGET */
  9799. /*============= start MLO UMAC SSR stats ============= { */
  9800. typedef enum {
  9801. HTT_MLO_UMAC_SSR_DBG_POINT_INVALID = 0,
  9802. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_DISABLE_RXDMA_PREFETCH,
  9803. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_PMACS_HWMLOS,
  9804. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_GLOBAL_WSI,
  9805. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_PMACS_DMAC,
  9806. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_TCL,
  9807. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_TQM,
  9808. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_WBM,
  9809. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_REO,
  9810. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_HOST,
  9811. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_PREREQUISITES,
  9812. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_PRE_RING_RESET,
  9813. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_APPLY_SOFT_RESET,
  9814. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_POST_RING_RESET,
  9815. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_FW_TQM_CMDQS,
  9816. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_HOST,
  9817. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_UMAC_INTERRUPTS,
  9818. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_WBM,
  9819. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_REO,
  9820. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_TQM,
  9821. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_PMACS_DMAC,
  9822. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_TQM_SYNC_CMD,
  9823. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_GLOBAL_WSI,
  9824. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_PMACS_HWMLOS,
  9825. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_ENABLE_RXDMA_PREFETCH,
  9826. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_TCL,
  9827. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_HOST_ENQ,
  9828. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_VERIFY_UMAC_RECOVERED,
  9829. /* The below debug point values are reserved for future expansion. */
  9830. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED28,
  9831. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED29,
  9832. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED30,
  9833. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED31,
  9834. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED32,
  9835. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED33,
  9836. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED34,
  9837. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED35,
  9838. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED36,
  9839. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED37,
  9840. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED38,
  9841. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED39,
  9842. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED40,
  9843. /*
  9844. * Due to backwards compatibility requirements, no futher DBG_POINT values
  9845. * can be added (but the above reserved values can be repurposed).
  9846. */
  9847. HTT_MLO_UMAC_SSR_DBG_POINT_MAX,
  9848. } HTT_MLO_UMAC_SSR_DBG_POINTS;
  9849. typedef enum {
  9850. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_INVALID = 0,
  9851. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_DO_PRE_RESET,
  9852. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_DO_POST_RESET_START,
  9853. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_DO_POST_RESET_COMPLETE,
  9854. /* The below recovery handshake values are reserved for future expansion. */
  9855. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED4,
  9856. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED5,
  9857. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED6,
  9858. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED7,
  9859. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED8,
  9860. /*
  9861. * Due to backwards compatibility requirements, no futher
  9862. * RECOVERY_HANDSHAKE values can be added (but the above
  9863. * reserved values can be repurposed).
  9864. */
  9865. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_COUNT,
  9866. } HTT_MLO_UMAC_RECOVERY_HANDSHAKES;
  9867. typedef struct {
  9868. htt_tlv_hdr_t tlv_hdr;
  9869. A_UINT32 start_ms;
  9870. A_UINT32 end_ms;
  9871. A_UINT32 delta_ms;
  9872. A_UINT32 reserved;
  9873. A_UINT32 footprint; /* holds a HTT_MLO_UMAC_SSR_DBG_POINTS value */
  9874. A_UINT32 tqm_hw_tstamp;
  9875. } htt_stats_mlo_umac_ssr_dbg_tlv;
  9876. /* preserve old name alias for new name consistent with the tag name */
  9877. typedef htt_stats_mlo_umac_ssr_dbg_tlv htt_mlo_umac_ssr_dbg_tlv;
  9878. typedef struct {
  9879. A_UINT32 last_mlo_htt_handshake_delta_ms;
  9880. A_UINT32 max_mlo_htt_handshake_delta_ms;
  9881. union {
  9882. A_UINT32 umac_recovery_done_mask;
  9883. struct {
  9884. A_UINT32 pre_reset_disable_rxdma_prefetch : 1,
  9885. pre_reset_pmacs_hwmlos : 1,
  9886. pre_reset_global_wsi : 1,
  9887. pre_reset_pmacs_dmac : 1,
  9888. pre_reset_tcl : 1,
  9889. pre_reset_tqm : 1,
  9890. pre_reset_wbm : 1,
  9891. pre_reset_reo : 1,
  9892. pre_reset_host : 1,
  9893. reset_prerequisites : 1,
  9894. reset_pre_ring_reset : 1,
  9895. reset_apply_soft_reset : 1,
  9896. reset_post_ring_reset : 1,
  9897. reset_fw_tqm_cmdqs : 1,
  9898. post_reset_host : 1,
  9899. post_reset_umac_interrupts : 1,
  9900. post_reset_wbm : 1,
  9901. post_reset_reo : 1,
  9902. post_reset_tqm : 1,
  9903. post_reset_pmacs_dmac : 1,
  9904. post_reset_tqm_sync_cmd : 1,
  9905. post_reset_global_wsi : 1,
  9906. post_reset_pmacs_hwmlos : 1,
  9907. post_reset_enable_rxdma_prefetch : 1,
  9908. post_reset_tcl : 1,
  9909. post_reset_host_enq : 1,
  9910. post_reset_verify_umac_recovered : 1,
  9911. reserved : 5;
  9912. } done_mask;
  9913. };
  9914. } htt_mlo_umac_ssr_mlo_stats_t;
  9915. typedef struct {
  9916. htt_tlv_hdr_t tlv_hdr;
  9917. htt_mlo_umac_ssr_mlo_stats_t mlo;
  9918. } htt_stats_mlo_umac_ssr_mlo_tlv;
  9919. /* preserve old name alias for new name consistent with the tag name */
  9920. typedef htt_stats_mlo_umac_ssr_mlo_tlv htt_mlo_umac_ssr_mlo_stats_tlv;
  9921. /* dword0 - b'0 - PRE_RESET_DISABLE_RXDMA_PREFETCH */
  9922. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_M 0x1
  9923. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_S 0
  9924. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_GET(word0) \
  9925. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_M) >> \
  9926. HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_S)
  9927. /* provide properly-named macro */
  9928. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_DISABLE_RXDMA_PREFETCH_GET(word) \
  9929. HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_GET(word)
  9930. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_SET(word0, _val) \
  9931. do { \
  9932. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH, _val); \
  9933. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_S));\
  9934. } while (0)
  9935. /* dword0 - b'1 - PRE_RESET_PMACS_HWMLOS */
  9936. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_M 0x2
  9937. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_S 1
  9938. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_GET(word0) \
  9939. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_M) >> \
  9940. HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_S)
  9941. /* provide properly-named macro */
  9942. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_PMACS_HWMLOS_GET(word) \
  9943. HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_GET(word)
  9944. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_SET(word0, _val) \
  9945. do { \
  9946. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS, _val); \
  9947. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_S));\
  9948. } while (0)
  9949. /* dword0 - b'2 - PRE_RESET_GLOBAL_WSI */
  9950. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_M 0x4
  9951. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_S 2
  9952. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_GET(word0) \
  9953. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_M) >> \
  9954. HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_S)
  9955. /* provide properly-named macro */
  9956. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_GLOBAL_WSI_GET(word) \
  9957. HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_GET(word)
  9958. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_SET(word0, _val) \
  9959. do { \
  9960. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI, _val); \
  9961. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_S));\
  9962. } while (0)
  9963. /* dword0 - b'3 - PRE_RESET_PMACS_DMAC */
  9964. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_M 0x8
  9965. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_S 3
  9966. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_GET(word0) \
  9967. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_M) >> \
  9968. HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_S)
  9969. /* provide properly-named macro */
  9970. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_PMACS_DMAC_GET(word) \
  9971. HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_GET(word)
  9972. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_SET(word0, _val) \
  9973. do { \
  9974. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC, _val); \
  9975. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_S));\
  9976. } while (0)
  9977. /* dword0 - b'4 - PRE_RESET_TCL */
  9978. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_M 0x10
  9979. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_S 4
  9980. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_GET(word0) \
  9981. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_M) >> \
  9982. HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_S)
  9983. /* provide properly-named macro */
  9984. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_TCL_GET(word) \
  9985. HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_GET(word)
  9986. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_SET(word0, _val) \
  9987. do { \
  9988. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL, _val); \
  9989. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_S));\
  9990. } while (0)
  9991. /* dword0 - b'5 - PRE_RESET_TQM */
  9992. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_M 0x20
  9993. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_S 5
  9994. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_GET(word0) \
  9995. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_M) >> \
  9996. HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_S)
  9997. /* provide properly-named macro */
  9998. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_TQM_GET(word) \
  9999. HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_GET(word)
  10000. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_SET(word0, _val) \
  10001. do { \
  10002. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM, _val); \
  10003. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_S));\
  10004. } while (0)
  10005. /* dword0 - b'6 - PRE_RESET_WBM */
  10006. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_M 0x40
  10007. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_S 6
  10008. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_GET(word0) \
  10009. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_M) >> \
  10010. HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_S)
  10011. /* provide properly-named macro */
  10012. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_WBM_GET(word) \
  10013. HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_GET(word)
  10014. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_SET(word0, _val) \
  10015. do { \
  10016. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM, _val); \
  10017. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_S));\
  10018. } while (0)
  10019. /* dword0 - b'7 - PRE_RESET_REO */
  10020. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_M 0x80
  10021. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_S 7
  10022. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_GET(word0) \
  10023. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_M) >> \
  10024. HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_S)
  10025. /* provide properly-named macro */
  10026. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_REO_GET(word) \
  10027. HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_GET(word)
  10028. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_SET(word0, _val) \
  10029. do { \
  10030. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO, _val); \
  10031. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_S));\
  10032. } while (0)
  10033. /* dword0 - b'8 - PRE_RESET_HOST */
  10034. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_M 0x100
  10035. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_S 8
  10036. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_GET(word0) \
  10037. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_M) >> \
  10038. HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_S)
  10039. /* provide properly-named macro */
  10040. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_PRE_RESET_HOST_GET(word) \
  10041. HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_GET(word)
  10042. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_SET(word0, _val) \
  10043. do { \
  10044. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST, _val); \
  10045. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_S));\
  10046. } while (0)
  10047. /* dword0 - b'9 - RESET_PREREQUISITES */
  10048. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_M 0x200
  10049. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_S 9
  10050. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_GET(word0) \
  10051. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_M) >> \
  10052. HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_S)
  10053. /* provide properly-named macro */
  10054. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_RESET_PREREQUISITES_GET(word) \
  10055. HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_GET(word)
  10056. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_SET(word0, _val) \
  10057. do { \
  10058. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES, _val); \
  10059. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_S));\
  10060. } while (0)
  10061. /* dword0 - b'10 - RESET_PRE_RING_RESET */
  10062. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_M 0x400
  10063. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_S 10
  10064. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_GET(word0) \
  10065. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_M) >> \
  10066. HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_S)
  10067. /* provide properly-named macro */
  10068. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_RESET_PRE_RING_RESET_GET(word) \
  10069. HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_GET(word)
  10070. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_SET(word0, _val) \
  10071. do { \
  10072. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET, _val); \
  10073. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_S));\
  10074. } while (0)
  10075. /* dword0 - b'11 - RESET_APPLY_SOFT_RESET */
  10076. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_M 0x800
  10077. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_S 11
  10078. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_GET(word0) \
  10079. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_M) >> \
  10080. HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_S)
  10081. /* provide properly-named macro */
  10082. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_RESET_APPLY_SOFT_RESET_GET(word) \
  10083. HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_GET(word)
  10084. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_SET(word0, _val) \
  10085. do { \
  10086. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET, _val); \
  10087. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_S));\
  10088. } while (0)
  10089. /* dword0 - b'12 - RESET_POST_RING_RESET */
  10090. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_M 0x1000
  10091. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_S 12
  10092. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_GET(word0) \
  10093. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_M) >> \
  10094. HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_S)
  10095. /* provide properly-named macro */
  10096. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_RESET_POST_RING_RESET_GET(word) \
  10097. HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_GET(word)
  10098. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_SET(word0, _val) \
  10099. do { \
  10100. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET, _val); \
  10101. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_S));\
  10102. } while (0)
  10103. /* dword0 - b'13 - RESET_FW_TQM_CMDQS */
  10104. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_M 0x2000
  10105. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_S 13
  10106. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_GET(word0) \
  10107. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_M) >> \
  10108. HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_S)
  10109. /* provide properly-named macro */
  10110. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_RESET_FW_TQM_CMDQS_GET(word) \
  10111. HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_GET(word)
  10112. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_SET(word0, _val) \
  10113. do { \
  10114. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS, _val); \
  10115. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_S));\
  10116. } while (0)
  10117. /* dword0 - b'14 - POST_RESET_HOST */
  10118. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_M 0x4000
  10119. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_S 14
  10120. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_GET(word0) \
  10121. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_M) >> \
  10122. HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_S)
  10123. /* provide properly-named macro */
  10124. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_HOST_GET(word) \
  10125. HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_GET(word)
  10126. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_SET(word0, _val) \
  10127. do { \
  10128. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST, _val); \
  10129. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_S));\
  10130. } while (0)
  10131. /* dword0 - b'15 - POST_RESET_UMAC_INTERRUPTS */
  10132. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_M 0x8000
  10133. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_S 15
  10134. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_GET(word0) \
  10135. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_M) >> \
  10136. HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_S)
  10137. /* provide properly-named macro */
  10138. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_UMAC_INTERRUPTS_GET(word) \
  10139. HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_GET(word)
  10140. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_SET(word0, _val) \
  10141. do { \
  10142. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS, _val); \
  10143. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_S));\
  10144. } while (0)
  10145. /* dword0 - b'16 - POST_RESET_WBM */
  10146. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_M 0x10000
  10147. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_S 16
  10148. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_GET(word0) \
  10149. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_M) >> \
  10150. HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_S)
  10151. /* provide properly-named macro */
  10152. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_WBM_GET(word) \
  10153. HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_GET(word)
  10154. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_SET(word0, _val) \
  10155. do { \
  10156. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM, _val); \
  10157. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_S));\
  10158. } while (0)
  10159. /* dword0 - b'17 - POST_RESET_REO */
  10160. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_M 0x20000
  10161. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_S 17
  10162. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_GET(word0) \
  10163. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_M) >> \
  10164. HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_S)
  10165. /* provide properly-named macro */
  10166. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_REO_GET(word) \
  10167. HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_GET(word)
  10168. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_SET(word0, _val) \
  10169. do { \
  10170. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_REO, _val); \
  10171. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_S));\
  10172. } while (0)
  10173. /* dword0 - b'18 - POST_RESET_TQM */
  10174. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_M 0x40000
  10175. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_S 18
  10176. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_GET(word0) \
  10177. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_M) >> \
  10178. HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_S)
  10179. /* provide properly-named macro */
  10180. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_TQM_GET(word) \
  10181. HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_GET(word)
  10182. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SET(word0, _val) \
  10183. do { \
  10184. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM, _val); \
  10185. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_S));\
  10186. } while (0)
  10187. /* dword0 - b'19 - POST_RESET_PMACS_DMAC */
  10188. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_M 0x80000
  10189. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_S 19
  10190. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_GET(word0) \
  10191. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_M) >> \
  10192. HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_S)
  10193. /* provide properly-named macro */
  10194. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_PMACS_DMAC_GET(word) \
  10195. HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_GET(word)
  10196. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_SET(word0, _val) \
  10197. do { \
  10198. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC, _val); \
  10199. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_S));\
  10200. } while (0)
  10201. /* dword0 - b'20 - POST_RESET_TQM_SYNC_CMD */
  10202. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_M 0x100000
  10203. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_S 20
  10204. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_GET(word0) \
  10205. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_M) >> \
  10206. HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_S)
  10207. /* provide properly-named macro */
  10208. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_TQM_SYNC_CMD_GET(word) \
  10209. HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_GET(word)
  10210. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_SET(word0, _val) \
  10211. do { \
  10212. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD, _val); \
  10213. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_S));\
  10214. } while (0)
  10215. /* dword0 - b'21 - POST_RESET_GLOBAL_WSI */
  10216. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_M 0x200000
  10217. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_S 21
  10218. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_GET(word0) \
  10219. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_M) >> \
  10220. HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_S)
  10221. /* provide properly-named macro */
  10222. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_GLOBAL_WSI_GET(word) \
  10223. HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_GET(word)
  10224. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_SET(word0, _val) \
  10225. do { \
  10226. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI, _val); \
  10227. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_S));\
  10228. } while (0)
  10229. /* dword0 - b'22 - POST_RESET_PMACS_HWMLOS */
  10230. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_M 0x400000
  10231. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_S 22
  10232. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_GET(word0) \
  10233. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_M) >> \
  10234. HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_S)
  10235. /* provide properly-named macro */
  10236. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_PMACS_HWMLOS_GET(word) \
  10237. HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_GET(word)
  10238. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_SET(word0, _val) \
  10239. do { \
  10240. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS, _val); \
  10241. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_S));\
  10242. } while (0)
  10243. /* dword0 - b'23 - POST_RESET_ENABLE_RXDMA_PREFETCH */
  10244. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_M 0x800000
  10245. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_S 23
  10246. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_GET(word0) \
  10247. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_M) >> \
  10248. HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_S)
  10249. /* provide properly-named macro */
  10250. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_ENABLE_RXDMA_PREFETCH_GET(word) \
  10251. HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_GET(word)
  10252. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_SET(word0, _val) \
  10253. do { \
  10254. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH, _val); \
  10255. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_S));\
  10256. } while (0)
  10257. /* dword0 - b'24 - POST_RESET_TCL */
  10258. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_M 0x1000000
  10259. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_S 24
  10260. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_GET(word0) \
  10261. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_M) >> \
  10262. HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_S)
  10263. /* provide properly-named macro */
  10264. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_TCL_GET(word) \
  10265. HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_GET(word)
  10266. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_SET(word0, _val) \
  10267. do { \
  10268. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL, _val); \
  10269. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_S));\
  10270. } while (0)
  10271. /* dword0 - b'25 - POST_RESET_HOST_ENQ */
  10272. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_M 0x2000000
  10273. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_S 25
  10274. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_GET(word0) \
  10275. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_M) >> \
  10276. HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_S)
  10277. /* provide properly-named macro */
  10278. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_HOST_ENQ_GET(word) \
  10279. HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_GET(word)
  10280. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_SET(word0, _val) \
  10281. do { \
  10282. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ, _val); \
  10283. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_S));\
  10284. } while (0)
  10285. /* dword0 - b'26 - POST_RESET_VERIFY_UMAC_RECOVERED */
  10286. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_M 0x4000000
  10287. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_S 26
  10288. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_GET(word0) \
  10289. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_M) >> \
  10290. HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_S)
  10291. /* provide properly-named macro */
  10292. #define HTT_STATS_MLO_UMAC_SSR_MLO_MLO_POST_RESET_VERIFY_UMAC_RECOVERED_GET(word) \
  10293. HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_GET(word)
  10294. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_SET(word0, _val) \
  10295. do { \
  10296. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED, _val); \
  10297. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_S));\
  10298. } while (0)
  10299. typedef struct {
  10300. htt_tlv_hdr_t tlv_hdr;
  10301. A_UINT32 last_trigger_request_ms;
  10302. A_UINT32 last_start_ms;
  10303. A_UINT32 last_start_disengage_umac_ms;
  10304. A_UINT32 last_enter_ssr_platform_thread_ms;
  10305. A_UINT32 last_exit_ssr_platform_thread_ms;
  10306. A_UINT32 last_start_engage_umac_ms;
  10307. A_UINT32 last_done_successful_ms;
  10308. A_UINT32 post_reset_tqm_sync_cmd_completion_ms;
  10309. A_UINT32 htt_sync_mlo_initiate_umac_recovery_ms;
  10310. A_UINT32 htt_sync_do_pre_reset_ms;
  10311. A_UINT32 htt_sync_do_post_reset_start_ms;
  10312. A_UINT32 htt_sync_do_post_reset_complete_ms;
  10313. } htt_stats_mlo_umac_ssr_kpi_tstmp_tlv;
  10314. /* preserve old name alias for new name consistent with the tag name */
  10315. typedef htt_stats_mlo_umac_ssr_kpi_tstmp_tlv
  10316. htt_mlo_umac_ssr_kpi_tstamp_stats_tlv;
  10317. typedef struct {
  10318. htt_tlv_hdr_t tlv_hdr;
  10319. A_UINT32 htt_sync_start_ms;
  10320. A_UINT32 htt_sync_delta_ms;
  10321. A_UINT32 post_t2h_start_ms;
  10322. A_UINT32 post_t2h_delta_ms;
  10323. A_UINT32 post_t2h_msg_read_shmem_ms;
  10324. A_UINT32 post_t2h_msg_write_shmem_ms;
  10325. A_UINT32 post_t2h_msg_send_msg_to_host_ms;
  10326. } htt_stats_mlo_umac_ssr_handshake_tlv;
  10327. /* preserve old name alias for new name consistent with the tag name */
  10328. typedef htt_stats_mlo_umac_ssr_handshake_tlv
  10329. htt_mlo_umac_htt_handshake_stats_tlv;
  10330. #ifdef ATH_TARGET
  10331. typedef struct {
  10332. /*
  10333. * Note that the host cannot use this struct directly, but instead needs
  10334. * to use the TLV header within each element of each of the arrays in
  10335. * this struct to determine where the subsequent item resides.
  10336. */
  10337. htt_stats_mlo_umac_ssr_dbg_tlv dbg_point[HTT_MLO_UMAC_SSR_DBG_POINT_MAX];
  10338. htt_stats_mlo_umac_ssr_handshake_tlv htt_handshakes[HTT_MLO_UMAC_RECOVERY_HANDSHAKE_COUNT];
  10339. } htt_mlo_umac_ssr_kpi_delta_stats_t;
  10340. #endif /* ATH_TARGET */
  10341. #ifdef ATH_TARGET
  10342. typedef struct {
  10343. /*
  10344. * Since each item within htt_mlo_umac_ssr_kpi_delta_stats_t has its own
  10345. * TLV header, and since no additional fields are added in this struct
  10346. * beyond the htt_mlo_umac_ssr_kpi_delta_stats_t info, no additional
  10347. * TLV header is needed.
  10348. *
  10349. * Note that the host cannot use this struct directly, but instead needs
  10350. * to use the TLV header within each item inside the
  10351. * htt_mlo_umac_ssr_kpi_delta_stats_t to determine where the subsequent
  10352. * item resides.
  10353. */
  10354. htt_mlo_umac_ssr_kpi_delta_stats_t kpi_delta;
  10355. } htt_mlo_umac_ssr_kpi_delta_stats_tlv;
  10356. #endif /* ATH_TARGET */
  10357. typedef struct {
  10358. A_UINT32 last_e2e_delta_ms;
  10359. A_UINT32 max_e2e_delta_ms;
  10360. A_UINT32 per_handshake_max_allowed_delta_ms;
  10361. /* Total done count */
  10362. A_UINT32 total_success_runs_cnt;
  10363. A_UINT32 umac_recovery_in_progress;
  10364. /* Count of Disengaged in Pre reset */
  10365. A_UINT32 umac_disengaged_count;
  10366. /* Count of UMAC Soft/Control Reset */
  10367. A_UINT32 umac_soft_reset_count;
  10368. /* Count of Engaged in Post reset */
  10369. A_UINT32 umac_engaged_count;
  10370. } htt_mlo_umac_ssr_common_stats_t;
  10371. typedef struct {
  10372. htt_tlv_hdr_t tlv_hdr;
  10373. htt_mlo_umac_ssr_common_stats_t cmn;
  10374. } htt_stats_mlo_umac_ssr_cmn_tlv;
  10375. /* preserve old name alias for new name consistent with the tag name */
  10376. typedef htt_stats_mlo_umac_ssr_cmn_tlv htt_mlo_umac_ssr_common_stats_tlv;
  10377. typedef struct {
  10378. A_UINT32 trigger_requests_count;
  10379. A_UINT32 trigger_count_for_umac_hang;
  10380. A_UINT32 trigger_count_for_mlo_target_recovery_mode1;
  10381. A_UINT32 trigger_count_for_unknown_signature;
  10382. A_UINT32 total_trig_dropped;
  10383. A_UINT32 trigger_count_for_unit_test_direct_trigger;
  10384. A_UINT32 trigger_count_for_tx_de_wdg_dummy_frame_tout;
  10385. A_UINT32 trigger_count_for_peer_delete_wdg_dummy_frame_tout;
  10386. A_UINT32 trigger_count_for_reo_hang;
  10387. A_UINT32 trigger_count_for_tqm_hang;
  10388. A_UINT32 trigger_count_for_tcl_hang;
  10389. A_UINT32 trigger_count_for_wbm_hang;
  10390. } htt_mlo_umac_ssr_trigger_stats_t;
  10391. typedef struct {
  10392. htt_tlv_hdr_t tlv_hdr;
  10393. htt_mlo_umac_ssr_trigger_stats_t trigger;
  10394. } htt_stats_mlo_umac_ssr_trigger_tlv;
  10395. /* preserve old name alias for new name consistent with the tag name */
  10396. typedef htt_stats_mlo_umac_ssr_trigger_tlv htt_mlo_umac_ssr_trigger_stats_tlv;
  10397. #ifdef ATH_TARGET
  10398. typedef struct {
  10399. /*
  10400. * Note that the host cannot use this struct directly, but instead needs
  10401. * to use the TLV header within each element to determine where the
  10402. * subsequent element resides.
  10403. */
  10404. htt_mlo_umac_ssr_kpi_delta_stats_tlv kpi_delta_tlv;
  10405. htt_stats_mlo_umac_ssr_kpi_tstmp_tlv kpi_tstamp_tlv;
  10406. } htt_mlo_umac_ssr_kpi_stats_t;
  10407. #endif /* ATH_TARGET */
  10408. #ifdef ATH_TARGET
  10409. typedef struct {
  10410. /*
  10411. * Since the embedded sub-struct within htt_mlo_umac_ssr_kpi_stats_tlv
  10412. * has its own TLV header, and since no additional fields are added in
  10413. * this struct beyond the htt_mlo_umac_ssr_kpi_stats_t info, no additional
  10414. * TLV header is needed.
  10415. *
  10416. * Note that the host cannot use this struct directly, but instead needs
  10417. * to use the TLV header within the htt_mlo_umac_ssr_kpi_stats_t sub-struct
  10418. * to determine how much data is present for this struct.
  10419. */
  10420. htt_mlo_umac_ssr_kpi_stats_t kpi;
  10421. } htt_mlo_umac_ssr_kpi_stats_tlv;
  10422. #endif /* ATH_TARGET */
  10423. #ifdef ATH_TARGET
  10424. typedef struct {
  10425. /*
  10426. * Note that the host cannot use this struct directly, but instead needs
  10427. * to use the TLV header within each element to determine where the
  10428. * subsequent element resides.
  10429. */
  10430. htt_stats_mlo_umac_ssr_trigger_tlv trigger_tlv;
  10431. htt_mlo_umac_ssr_kpi_stats_tlv kpi_tlv;
  10432. htt_stats_mlo_umac_ssr_mlo_tlv mlo_tlv;
  10433. htt_stats_mlo_umac_ssr_cmn_tlv cmn_tlv;
  10434. } htt_mlo_umac_ssr_stats_tlv;
  10435. #endif /* ATH_TARGET */
  10436. /*============= end MLO UMAC SSR stats ============= } */
  10437. typedef struct {
  10438. A_UINT32 total_done;
  10439. A_UINT32 trigger_requests_count;
  10440. A_UINT32 total_trig_dropped;
  10441. A_UINT32 umac_disengaged_count;
  10442. A_UINT32 umac_soft_reset_count;
  10443. A_UINT32 umac_engaged_count;
  10444. A_UINT32 last_trigger_request_ms;
  10445. A_UINT32 last_start_ms;
  10446. A_UINT32 last_start_disengage_umac_ms;
  10447. A_UINT32 last_enter_ssr_platform_thread_ms;
  10448. A_UINT32 last_exit_ssr_platform_thread_ms;
  10449. A_UINT32 last_start_engage_umac_ms;
  10450. A_UINT32 last_done_successful_ms;
  10451. A_UINT32 last_e2e_delta_ms;
  10452. A_UINT32 max_e2e_delta_ms;
  10453. A_UINT32 trigger_count_for_umac_hang;
  10454. A_UINT32 trigger_count_for_mlo_quick_ssr;
  10455. A_UINT32 trigger_count_for_unknown_signature;
  10456. A_UINT32 post_reset_tqm_sync_cmd_completion_ms;
  10457. A_UINT32 htt_sync_mlo_initiate_umac_recovery_ms;
  10458. A_UINT32 htt_sync_do_pre_reset_ms;
  10459. A_UINT32 htt_sync_do_post_reset_start_ms;
  10460. A_UINT32 htt_sync_do_post_reset_complete_ms;
  10461. } htt_umac_ssr_stats_t;
  10462. typedef struct {
  10463. htt_tlv_hdr_t tlv_hdr;
  10464. htt_umac_ssr_stats_t stats;
  10465. } htt_stats_umac_ssr_tlv;
  10466. /* preserve old name alias for new name consistent with the tag name */
  10467. typedef htt_stats_umac_ssr_tlv htt_umac_ssr_stats_tlv;
  10468. typedef struct {
  10469. htt_tlv_hdr_t tlv_hdr;
  10470. A_UINT32 svc_class_id;
  10471. /* codel_drops:
  10472. * How many times have MSDU queues belonging to this service class
  10473. * dropped their head MSDU due to the queue's latency being above
  10474. * the CoDel latency limit specified for the service class throughout
  10475. * the full CoDel latency statistics collection window.
  10476. */
  10477. A_UINT32 codel_drops;
  10478. /* codel_no_drops:
  10479. * How many times have MSDU queues belonging to this service class
  10480. * completed a CoDel latency statistics collection window and
  10481. * concluded that no head MSDU drop is needed, due to the MSDU queue's
  10482. * latency being under the limit specified for the service class at
  10483. * some point during the window.
  10484. */
  10485. A_UINT32 codel_no_drops;
  10486. } htt_stats_codel_svc_class_tlv;
  10487. /* preserve old name alias for new name consistent with the tag name */
  10488. typedef htt_stats_codel_svc_class_tlv htt_codel_svc_class_stats_tlv;
  10489. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_M 0x0000FFFF
  10490. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_S 0
  10491. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_GET(_var) \
  10492. (((_var) & HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_M) >> \
  10493. HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_S)
  10494. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_SET(_var, _val) \
  10495. do { \
  10496. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM, _val); \
  10497. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_S)); \
  10498. } while (0)
  10499. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_M 0x00FF0000
  10500. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_S 16
  10501. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_GET(_var) \
  10502. (((_var) & HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_M) >> \
  10503. HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_S)
  10504. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_SET(_var, _val) \
  10505. do { \
  10506. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID, _val); \
  10507. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_S)); \
  10508. } while (0)
  10509. #define HTT_CODEL_MSDUQ_STATS_DROPS_M 0x0000FFFF
  10510. #define HTT_CODEL_MSDUQ_STATS_DROPS_S 0
  10511. #define HTT_CODEL_MSDUQ_STATS_DROPS_GET(_var) \
  10512. (((_var) & HTT_CODEL_MSDUQ_STATS_DROPS_M) >> \
  10513. HTT_CODEL_MSDUQ_STATS_DROPS_S)
  10514. #define HTT_CODEL_MSDUQ_STATS_DROPS_SET(_var, _val) \
  10515. do { \
  10516. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_DROPS, _val); \
  10517. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_DROPS_S)); \
  10518. } while (0)
  10519. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_M 0xFFFF0000
  10520. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_S 16
  10521. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_GET(_var) \
  10522. (((_var) & HTT_CODEL_MSDUQ_STATS_NO_DROPS_M) >> \
  10523. HTT_CODEL_MSDUQ_STATS_NO_DROPS_S)
  10524. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_SET(_var, _val) \
  10525. do { \
  10526. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_NO_DROPS, _val); \
  10527. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_NO_DROPS_S)); \
  10528. } while (0)
  10529. typedef struct {
  10530. htt_tlv_hdr_t tlv_hdr;
  10531. union {
  10532. A_UINT32 id__word;
  10533. struct {
  10534. A_UINT32 tx_flow_num: 16, /* FW's MSDU queue ID */
  10535. svc_class_id: 8,
  10536. reserved: 8;
  10537. };
  10538. };
  10539. union {
  10540. A_UINT32 stats__word;
  10541. struct {
  10542. A_UINT32
  10543. codel_drops: 16,
  10544. codel_no_drops: 16;
  10545. };
  10546. };
  10547. } htt_stats_codel_msduq_tlv;
  10548. /* preserve old name alias for new name consistent with the tag name */
  10549. typedef htt_stats_codel_msduq_tlv htt_codel_msduq_stats_tlv;
  10550. /*===================== start MLO stats ====================*/
  10551. typedef struct {
  10552. htt_tlv_hdr_t tlv_hdr;
  10553. A_UINT32 pref_link_num_sec_link_sched;
  10554. A_UINT32 pref_link_num_pref_link_timeout;
  10555. A_UINT32 pref_link_num_pref_link_sch_delay_ipc;
  10556. A_UINT32 pref_link_num_pref_link_timeout_ipc;
  10557. } htt_stats_mlo_sched_stats_tlv;
  10558. /* preserve old name alias for new name consistent with the tag name */
  10559. typedef htt_stats_mlo_sched_stats_tlv htt_mlo_sched_stats_tlv;
  10560. /* STATS_TYPE : HTT_DBG_MLO_SCHED_STATS
  10561. * TLV_TAGS:
  10562. * - HTT_STATS_MLO_SCHED_STATS_TAG
  10563. */
  10564. /* NOTE:
  10565. * This structure is for documentation, and cannot be safely used directly.
  10566. * Instead, use the constituent TLV structures to fill/parse.
  10567. */
  10568. #ifdef ATH_TARGET
  10569. typedef struct _htt_mlo_sched_stats {
  10570. htt_stats_mlo_sched_stats_tlv preferred_link_stats;
  10571. } htt_mlo_sched_stats_t;
  10572. #endif /* ATH_TARGET */
  10573. #define HTT_STATS_HWMLO_MAX_LINKS 6
  10574. #define HTT_STATS_MLO_MAX_IPC_RINGS 7
  10575. typedef struct {
  10576. htt_tlv_hdr_t tlv_hdr;
  10577. A_UINT32 mlo_ipc_ring_full_cnt[HTT_STATS_HWMLO_MAX_LINKS][HTT_STATS_MLO_MAX_IPC_RINGS];
  10578. } htt_stats_pdev_mlo_ipc_stats_tlv;
  10579. /* preserve old name alias for new name consistent with the tag name */
  10580. typedef htt_stats_pdev_mlo_ipc_stats_tlv htt_pdev_mlo_ipc_stats_tlv;
  10581. /* STATS_TYPE : HTT_DBG_MLO_IPC_STATS
  10582. * TLV_TAGS:
  10583. * - HTT_STATS_PDEV_MLO_IPC_STATS_TAG
  10584. */
  10585. /* NOTE:
  10586. * This structure is for documentation, and cannot be safely used directly.
  10587. * Instead, use the constituent TLV structures to fill/parse.
  10588. */
  10589. #ifdef ATH_TARGET
  10590. typedef struct _htt_mlo_ipc_stats {
  10591. htt_stats_pdev_mlo_ipc_stats_tlv mlo_ipc_stats;
  10592. } htt_pdev_mlo_ipc_stats_t;
  10593. #endif /* ATH_TARGET */
  10594. /*===================== end MLO stats ======================*/
  10595. typedef enum {
  10596. HTT_CTRL_PATH_STATS_CAL_TYPE_ADC = 0x0,
  10597. HTT_CTRL_PATH_STATS_CAL_TYPE_DAC = 0x1,
  10598. HTT_CTRL_PATH_STATS_CAL_TYPE_PROCESS = 0x2,
  10599. HTT_CTRL_PATH_STATS_CAL_TYPE_NOISE_FLOOR = 0x3,
  10600. HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO = 0x4,
  10601. HTT_CTRL_PATH_STATS_CAL_TYPE_COMB_TXLO_TXIQ_RXIQ = 0x5,
  10602. HTT_CTRL_PATH_STATS_CAL_TYPE_TXLO = 0x6,
  10603. HTT_CTRL_PATH_STATS_CAL_TYPE_TXIQ = 0x7,
  10604. HTT_CTRL_PATH_STATS_CAL_TYPE_RXIQ = 0x8,
  10605. HTT_CTRL_PATH_STATS_CAL_TYPE_IM2 = 0x9,
  10606. HTT_CTRL_PATH_STATS_CAL_TYPE_LNA = 0xa,
  10607. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXDCO = 0xb,
  10608. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXIQ = 0xc,
  10609. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORYLESS = 0xd,
  10610. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORY = 0xe,
  10611. HTT_CTRL_PATH_STATS_CAL_TYPE_IBF = 0xf,
  10612. HTT_CTRL_PATH_STATS_CAL_TYPE_PDET_AND_PAL = 0x10,
  10613. HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_IQ = 0x11,
  10614. HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_DTIM = 0x12,
  10615. HTT_CTRL_PATH_STATS_CAL_TYPE_TPC_CAL = 0x13,
  10616. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_TIMEREQ = 0x14,
  10617. HTT_CTRL_PATH_STATS_CAL_TYPE_BWFILTER = 0x15,
  10618. HTT_CTRL_PATH_STATS_CAL_TYPE_PEF = 0x16,
  10619. HTT_CTRL_PATH_STATS_CAL_TYPE_PADROOP = 0x17,
  10620. HTT_CTRL_PATH_STATS_CAL_TYPE_SELFCALTPC = 0x18,
  10621. HTT_CTRL_PATH_STATS_CAL_TYPE_RXSPUR = 0x19,
  10622. /* add new cal types above this line */
  10623. HTT_CTRL_PATH_STATS_CAL_TYPE_INVALID = 0xFF
  10624. } htt_ctrl_path_stats_cal_type_ids;
  10625. #define HTT_RETURN_STRING(str) case ((str)): return (A_UINT8 *)(# str);
  10626. #define HTT_GET_BITS(_val, _index, _num_bits) \
  10627. (((_val) >> (_index)) & ((1 << (_num_bits)) - 1))
  10628. #define HTT_CTRL_PATH_CALIBRATION_STATS_CAL_TYPE_GET(cal_info) \
  10629. HTT_GET_BITS(cal_info, 0, 8)
  10630. /*
  10631. * Used by some hosts to print names of cal type, based on
  10632. * htt_ctrl_path_cal_type_ids values specified in
  10633. * htt_ctrl_path_calibration_stats_struct in ctrl_path_stats event msg.
  10634. */
  10635. #ifdef HTT_CTRL_PATH_STATS_CAL_TYPE_STRINGS
  10636. static INLINE A_UINT8 *htt_ctrl_path_cal_type_id_to_name(A_UINT32 cal_type_id)
  10637. {
  10638. switch (cal_type_id)
  10639. {
  10640. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_ADC);
  10641. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DAC);
  10642. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PROCESS);
  10643. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_NOISE_FLOOR);
  10644. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO);
  10645. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_COMB_TXLO_TXIQ_RXIQ);
  10646. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_TXLO);
  10647. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_TXIQ);
  10648. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXIQ);
  10649. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_IM2);
  10650. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_LNA);
  10651. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXDCO);
  10652. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXIQ);
  10653. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORYLESS);
  10654. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORY);
  10655. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_IBF);
  10656. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PDET_AND_PAL);
  10657. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_IQ);
  10658. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_DTIM);
  10659. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_TPC_CAL);
  10660. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_TIMEREQ);
  10661. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_BWFILTER);
  10662. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PEF);
  10663. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PADROOP);
  10664. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_SELFCALTPC);
  10665. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXSPUR);
  10666. }
  10667. return (A_UINT8 *) "HTT_CTRL_PATH_STATS_CAL_TYPE_UNKNOWN";
  10668. }
  10669. #endif /* HTT_CTRL_PATH_STATS_CAL_TYPE_STRINGS */
  10670. /*===================== Start GTX stats ====================*/
  10671. #define HTT_NUM_MCS_PER_NSS 16
  10672. typedef struct {
  10673. htt_tlv_hdr_t tlv_hdr;
  10674. A_UINT32 gtx_enabled; /* shows whether Green Tx feature is enabled */
  10675. A_INT32 mcs_tpc_min[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's minimum TPC in 0.25dBm units */
  10676. A_INT32 mcs_tpc_max[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's maximum TPC in 0.25dBm units */
  10677. A_UINT32 mcs_tpc_diff[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's difference between maximum and minimum TPC in 0.25dB unit*/
  10678. } htt_stats_gtx_tlv;
  10679. /*===================== End GTX stats ====================*/
  10680. #endif /* __HTT_STATS_H__ */