dp_rx_mon_dest.c 29 KB

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  1. /*
  2. * Copyright (c) 2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "ieee80211.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. /**
  30. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  31. * (WBM), following error handling
  32. *
  33. * @dp_pdev: core txrx pdev context
  34. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  35. * Return: QDF_STATUS
  36. */
  37. static QDF_STATUS
  38. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  39. void *buf_addr_info)
  40. {
  41. struct dp_srng *dp_srng;
  42. void *hal_srng;
  43. void *hal_soc;
  44. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  45. void *src_srng_desc;
  46. hal_soc = dp_pdev->soc->hal_soc;
  47. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  48. hal_srng = dp_srng->hal_srng;
  49. qdf_assert(hal_srng);
  50. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  51. /* TODO */
  52. /*
  53. * Need API to convert from hal_ring pointer to
  54. * Ring Type / Ring Id combo
  55. */
  56. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  57. "%s %d : \
  58. HAL RING Access For WBM Release SRNG Failed -- %p\n",
  59. __func__, __LINE__, hal_srng);
  60. goto done;
  61. }
  62. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  63. if (qdf_likely(src_srng_desc)) {
  64. /* Return link descriptor through WBM ring (SW2WBM)*/
  65. hal_rx_mon_msdu_link_desc_set(hal_soc,
  66. src_srng_desc, buf_addr_info);
  67. status = QDF_STATUS_SUCCESS;
  68. } else {
  69. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  70. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  71. __func__, __LINE__);
  72. }
  73. done:
  74. hal_srng_access_end(hal_soc, hal_srng);
  75. return status;
  76. }
  77. /**
  78. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  79. * (WBM), following error handling
  80. *
  81. * @soc: core DP main context
  82. * @mac_id: mac id which is one of 3 mac_ids
  83. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  84. * @head_msdu: head of msdu to be popped
  85. * @tail_msdu: tail of msdu to be popped
  86. * @npackets: number of packet to be popped
  87. * @ppdu_id: ppdu id of processing ppdu
  88. * @head: head of descs list to be freed
  89. * @tail: tail of decs list to be freed
  90. * Return: number of msdu in MPDU to be popped
  91. */
  92. static inline uint32_t
  93. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  94. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  95. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  96. union dp_rx_desc_list_elem_t **head,
  97. union dp_rx_desc_list_elem_t **tail)
  98. {
  99. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  100. void *rx_desc_tlv;
  101. void *rx_msdu_link_desc;
  102. qdf_nbuf_t msdu;
  103. qdf_nbuf_t last;
  104. struct hal_rx_msdu_list msdu_list;
  105. uint8_t num_msdus;
  106. uint32_t rx_buf_size, rx_pkt_offset;
  107. struct hal_buf_info buf_info;
  108. void *p_buf_addr_info;
  109. void *p_last_buf_addr_info;
  110. uint32_t rx_bufs_used = 0;
  111. uint32_t msdu_ppdu_id, msdu_cnt;
  112. uint8_t *data;
  113. uint32_t i;
  114. bool mpdu_fcs_err;
  115. msdu = 0;
  116. last = NULL;
  117. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  118. &p_last_buf_addr_info, &msdu_cnt, &mpdu_fcs_err);
  119. do {
  120. rx_msdu_link_desc =
  121. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info);
  122. qdf_assert(rx_msdu_link_desc);
  123. num_msdus = msdu_cnt;
  124. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, num_msdus);
  125. msdu_cnt -= num_msdus;
  126. for (i = 0; i < num_msdus; i++) {
  127. uint32_t l2_hdr_offset;
  128. struct dp_rx_desc *rx_desc =
  129. dp_rx_cookie_2_va_mon_buf(soc,
  130. msdu_list.sw_cookie[i]);
  131. qdf_assert(rx_desc);
  132. msdu = rx_desc->nbuf;
  133. qdf_nbuf_unmap_single(soc->osdev, msdu,
  134. QDF_DMA_FROM_DEVICE);
  135. data = qdf_nbuf_data(msdu);
  136. QDF_TRACE(QDF_MODULE_ID_DP,
  137. QDF_TRACE_LEVEL_DEBUG,
  138. "[%s][%d] msdu_nbuf=%p, data=%p\n",
  139. __func__, __LINE__, msdu, data);
  140. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  141. msdu_ppdu_id =
  142. HAL_RX_MON_HW_DESC_GET_PPDUID_GET(rx_desc_tlv);
  143. QDF_TRACE(QDF_MODULE_ID_DP,
  144. QDF_TRACE_LEVEL_DEBUG,
  145. "[%s][%d] i=%d, ppdu_id=%x, msdu_ppdu_id=%x\n",
  146. __func__, __LINE__, i, *ppdu_id, msdu_ppdu_id);
  147. if (*ppdu_id > msdu_ppdu_id)
  148. QDF_TRACE(QDF_MODULE_ID_DP,
  149. QDF_TRACE_LEVEL_WARN,
  150. "[%s][%d] ppdu_id=%id \
  151. msdu_ppdu_id=%d\n",
  152. __func__, __LINE__, *ppdu_id,
  153. msdu_ppdu_id);
  154. if (*ppdu_id != msdu_ppdu_id) {
  155. *ppdu_id = msdu_ppdu_id;
  156. return rx_bufs_used;
  157. }
  158. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  159. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  160. &(dp_pdev->ppdu_info.rx_status));
  161. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  162. /*
  163. * HW structures call this L3 header padding
  164. * -- even though this is actually the offset
  165. * from the buffer beginning where the L2
  166. * header begins.
  167. */
  168. l2_hdr_offset =
  169. hal_rx_msdu_end_l3_hdr_padding_get(data);
  170. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  171. + msdu_list.msdu_info[i].msdu_len;
  172. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  173. #if 0
  174. /* Disble it.see packet on msdu done set to 0 */
  175. /*
  176. * Check if DMA completed -- msdu_done is the
  177. * last bit to be written
  178. */
  179. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  180. QDF_TRACE(QDF_MODULE_ID_DP,
  181. QDF_TRACE_LEVEL_ERROR,
  182. "%s %d\n",
  183. __func__, __LINE__);
  184. print_hex_dump(KERN_ERR,
  185. "\t Pkt Desc:",
  186. DUMP_PREFIX_NONE, 32, 4,
  187. rx_desc_tlv, 128, false);
  188. qdf_assert(0);
  189. }
  190. #endif
  191. rx_bufs_used++;
  192. QDF_TRACE(QDF_MODULE_ID_DP,
  193. QDF_TRACE_LEVEL_DEBUG,
  194. "rx_pkt_offset=%d, \
  195. l2_hdr_offset=%d, msdu_len=%d, \
  196. addr=%p\n",
  197. rx_pkt_offset,
  198. l2_hdr_offset,
  199. msdu_list.msdu_info[i].msdu_len,
  200. qdf_nbuf_data(msdu));
  201. if (*head_msdu == NULL)
  202. *head_msdu = msdu;
  203. else
  204. qdf_nbuf_set_next(last, msdu);
  205. last = msdu;
  206. dp_rx_add_to_free_desc_list(head,
  207. tail, rx_desc);
  208. }
  209. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  210. &p_buf_addr_info);
  211. dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info);
  212. p_last_buf_addr_info = p_buf_addr_info;
  213. } while (buf_info.paddr && msdu_cnt);
  214. qdf_nbuf_set_next(last, NULL);
  215. *tail_msdu = msdu;
  216. return rx_bufs_used;
  217. }
  218. static inline
  219. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  220. {
  221. uint8_t *data;
  222. uint32_t rx_pkt_offset, l2_hdr_offset;
  223. data = qdf_nbuf_data(msdu);
  224. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  225. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  226. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  227. data = qdf_nbuf_data(msdu);
  228. /* hexdump(data, 32); */
  229. }
  230. static inline
  231. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  232. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  233. struct cdp_mon_status *rx_status)
  234. {
  235. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  236. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  237. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  238. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  239. is_amsdu, is_first_frag, amsdu_pad;
  240. void *rx_desc;
  241. char *hdr_desc;
  242. unsigned char *dest;
  243. struct ieee80211_frame *wh;
  244. struct ieee80211_qoscntl *qos;
  245. qdf_nbuf_t amsdu_llc_buf;
  246. head_frag_list = NULL;
  247. /* The nbuf has been pulled just beyond the status and points to the
  248. * payload
  249. */
  250. msdu_orig = head_msdu;
  251. rx_desc = qdf_nbuf_data(msdu_orig);
  252. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  253. /* It looks like there is some issue on MPDU len err */
  254. /* Need further investigate if drop the packet */
  255. /* return NULL; */
  256. }
  257. rx_desc = qdf_nbuf_data(last_msdu);
  258. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  259. /* Fill out the rx_status from the PPDU start and end fields */
  260. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  261. rx_desc = qdf_nbuf_data(head_msdu);
  262. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  263. /* Easy case - The MSDU status indicates that this is a non-decapped
  264. * packet in RAW mode.
  265. */
  266. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  267. /* Note that this path might suffer from headroom unavailabilty
  268. * - but the RX status is usually enough
  269. */
  270. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  271. "[%s][%d] decap format raw\n", __func__, __LINE__);
  272. dp_rx_msdus_set_payload(head_msdu);
  273. mpdu_buf = head_msdu;
  274. if (!mpdu_buf)
  275. goto mpdu_stitch_fail;
  276. prev_buf = mpdu_buf;
  277. frag_list_sum_len = 0;
  278. msdu_orig = qdf_nbuf_next(head_msdu);
  279. is_first_frag = 1;
  280. while (msdu_orig) {
  281. dp_rx_msdus_set_payload(head_msdu);
  282. msdu = msdu_orig;
  283. if (!msdu)
  284. goto mpdu_stitch_fail;
  285. if (is_first_frag) {
  286. is_first_frag = 0;
  287. head_frag_list = msdu;
  288. }
  289. frag_list_sum_len += qdf_nbuf_len(msdu);
  290. /* Maintain the linking of the cloned MSDUS */
  291. qdf_nbuf_set_next_ext(prev_buf, msdu);
  292. /* Move to the next */
  293. prev_buf = msdu;
  294. msdu_orig = qdf_nbuf_next(msdu_orig);
  295. }
  296. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  297. /* If there were more fragments to this RAW frame */
  298. if (head_frag_list) {
  299. frag_list_sum_len -= HAL_RX_FCS_LEN;
  300. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  301. frag_list_sum_len);
  302. }
  303. goto mpdu_stitch_done;
  304. }
  305. /* Decap mode:
  306. * Calculate the amount of header in decapped packet to knock off based
  307. * on the decap type and the corresponding number of raw bytes to copy
  308. * status header
  309. */
  310. rx_desc = qdf_nbuf_data(head_msdu);
  311. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  312. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  313. "[%s][%d] decap format not raw\n", __func__, __LINE__);
  314. /* Base size */
  315. wifi_hdr_len = sizeof(struct ieee80211_frame);
  316. wh = (struct ieee80211_frame *)hdr_desc;
  317. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  318. if (dir == IEEE80211_FC1_DIR_DSTODS)
  319. wifi_hdr_len += 6;
  320. is_amsdu = 0;
  321. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  322. qos = (struct ieee80211_qoscntl *)
  323. (hdr_desc + wifi_hdr_len);
  324. wifi_hdr_len += 2;
  325. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  326. }
  327. /*Calculate security header length based on 'Protected'
  328. * and 'EXT_IV' flag
  329. * */
  330. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  331. char *iv = (char *)wh + wifi_hdr_len;
  332. if (iv[3] & KEY_EXTIV)
  333. sec_hdr_len = 8;
  334. else
  335. sec_hdr_len = 4;
  336. } else {
  337. sec_hdr_len = 0;
  338. }
  339. wifi_hdr_len += sec_hdr_len;
  340. /* MSDU related stuff LLC - AMSDU subframe header etc */
  341. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  342. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  343. /* "Decap" header to remove from MSDU buffer */
  344. decap_hdr_pull_bytes = 14;
  345. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  346. * status of the now decapped first msdu. Leave enough headroom for
  347. * accomodating any radio-tap /prism like PHY header
  348. */
  349. #define MAX_MONITOR_HEADER (512)
  350. mpdu_buf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  351. MAX_MONITOR_HEADER + mpdu_buf_len,
  352. MAX_MONITOR_HEADER, 4, FALSE);
  353. if (!mpdu_buf)
  354. goto mpdu_stitch_done;
  355. /* Copy the MPDU related header and enc headers into the first buffer
  356. * - Note that there can be a 2 byte pad between heaader and enc header
  357. */
  358. prev_buf = mpdu_buf;
  359. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  360. if (!dest) {
  361. prev_buf = mpdu_buf = NULL;
  362. goto mpdu_stitch_done;
  363. }
  364. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  365. hdr_desc += wifi_hdr_len;
  366. #if 0
  367. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  368. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  369. hdr_desc += sec_hdr_len;
  370. #endif
  371. /* The first LLC len is copied into the MPDU buffer */
  372. frag_list_sum_len = 0;
  373. frag_list_sum_len -= msdu_llc_len;
  374. msdu_orig = head_msdu;
  375. is_first_frag = 1;
  376. amsdu_pad = 0;
  377. while (msdu_orig) {
  378. /* TODO: intra AMSDU padding - do we need it ??? */
  379. msdu = msdu_orig;
  380. if (!msdu)
  381. goto mpdu_stitch_fail;
  382. if (is_first_frag) {
  383. head_frag_list = msdu;
  384. } else {
  385. /* Reload the hdr ptr only on non-first MSDUs */
  386. rx_desc = qdf_nbuf_data(msdu_orig);
  387. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  388. }
  389. /* Copy this buffers MSDU related status into the prev buffer */
  390. if (is_first_frag) {
  391. is_first_frag = 0;
  392. dest = qdf_nbuf_put_tail(prev_buf,
  393. msdu_llc_len + amsdu_pad);
  394. if (!dest) {
  395. mpdu_buf = NULL;
  396. qdf_nbuf_free(msdu);
  397. goto mpdu_stitch_done;
  398. }
  399. dest += amsdu_pad;
  400. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  401. } else {
  402. amsdu_llc_buf = qdf_nbuf_alloc(
  403. dp_pdev->osif_pdev,
  404. 32 + 32,
  405. 32, 4, FALSE);
  406. if (!amsdu_llc_buf)
  407. goto mpdu_stitch_fail;
  408. dest = qdf_nbuf_put_tail(amsdu_llc_buf,
  409. msdu_llc_len + amsdu_pad);
  410. if (!dest)
  411. goto mpdu_stitch_fail;
  412. dest += amsdu_pad;
  413. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  414. /* Maintain the linking of the MSDU header
  415. * and cloned MSDUS */
  416. qdf_nbuf_set_next_ext(prev_buf, amsdu_llc_buf);
  417. prev_buf = amsdu_llc_buf;
  418. qdf_nbuf_set_next_ext(prev_buf, msdu);
  419. }
  420. dp_rx_msdus_set_payload(msdu);
  421. /* Push the MSDU buffer beyond the decap header */
  422. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  423. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  424. + amsdu_pad;
  425. /* Set up intra-AMSDU pad to be added to start of next buffer -
  426. * AMSDU pad is 4 byte pad on AMSDU subframe */
  427. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  428. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  429. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  430. * probably iterate all the frags cloning them along the way and
  431. * and also updating the prev_buf pointer
  432. */
  433. /* Move to the next */
  434. prev_buf = msdu;
  435. msdu_orig = qdf_nbuf_next(msdu_orig);
  436. }
  437. #if 0
  438. /* Add in the trailer section - encryption trailer + FCS */
  439. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  440. frag_list_sum_len += HAL_RX_FCS_LEN;
  441. #endif
  442. /* TODO: Convert this to suitable adf routines */
  443. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  444. frag_list_sum_len);
  445. mpdu_stitch_done:
  446. /* Check if this buffer contains the PPDU end status for TSF */
  447. /* Need revist this code to see where we can get tsf timestamp */
  448. #if 0
  449. /* PPDU end TLV will be retrived from monitor status ring */
  450. last_mpdu =
  451. (*(((u_int32_t *)&rx_desc->attention)) &
  452. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  453. RX_ATTENTION_0_LAST_MPDU_LSB;
  454. if (last_mpdu)
  455. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  456. #endif
  457. return mpdu_buf;
  458. mpdu_stitch_fail:
  459. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  460. /* Free the head buffer */
  461. qdf_nbuf_free(mpdu_buf);
  462. }
  463. return NULL;
  464. }
  465. /**
  466. * dp_rx_extract_radiotap_info(): Extract and populate information in
  467. * struct mon_rx_status type
  468. * @rx_status: Receive status
  469. * @mon_rx_status: Monitor mode status
  470. *
  471. * Returns: None
  472. */
  473. static inline
  474. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  475. struct mon_rx_status *rx_mon_status)
  476. {
  477. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  478. rx_mon_status->chan_freq = rx_status->rs_freq;
  479. rx_mon_status->chan_num = rx_status->rs_channel;
  480. rx_mon_status->chan_flags = rx_status->rs_flags;
  481. rx_mon_status->rate = rx_status->rs_datarate;
  482. /* TODO: rx_mon_status->ant_signal_db */
  483. /* TODO: rx_mon_status->nr_ant */
  484. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  485. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  486. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  487. /* TODO: rx_mon_status->ldpc */
  488. /* TODO: rx_mon_status->beamformed */
  489. /* TODO: rx_mon_status->vht_flags */
  490. /* TODO: rx_mon_status->vht_flag_values1 */
  491. }
  492. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  493. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  494. {
  495. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  496. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  497. qdf_nbuf_t mon_skb, skb_next;
  498. qdf_nbuf_t mon_mpdu = NULL;
  499. if ((pdev->monitor_vdev == NULL) ||
  500. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  501. goto mon_deliver_fail;
  502. }
  503. /* restitch mon MPDU for delivery via monitor interface */
  504. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  505. tail_msdu, rs);
  506. if (mon_mpdu) {
  507. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  508. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  509. pdev->monitor_vdev->osif_rx_mon(
  510. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  511. } else {
  512. goto mon_deliver_fail;
  513. }
  514. return QDF_STATUS_SUCCESS;
  515. mon_deliver_fail:
  516. mon_skb = head_msdu;
  517. while (mon_skb) {
  518. skb_next = qdf_nbuf_next(mon_skb);
  519. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  520. "[%s][%d] mon_skb=%p\n", __func__, __LINE__, mon_skb);
  521. qdf_nbuf_free(mon_skb);
  522. mon_skb = skb_next;
  523. }
  524. return QDF_STATUS_E_INVAL;
  525. }
  526. /**
  527. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  528. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  529. * @soc: core txrx main contex
  530. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  531. * @quota: No. of units (packets) that can be serviced in one shot.
  532. *
  533. * This function implements the core of Rx functionality. This is
  534. * expected to handle only non-error frames.
  535. *
  536. * Return: none
  537. */
  538. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  539. {
  540. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  541. uint8_t pdev_id = pdev->pdev_id;
  542. void *hal_soc;
  543. void *rxdma_dst_ring_desc;
  544. void *mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  545. union dp_rx_desc_list_elem_t *head = NULL;
  546. union dp_rx_desc_list_elem_t *tail = NULL;
  547. uint32_t ppdu_id;
  548. uint32_t rx_bufs_used;
  549. #ifdef DP_INTR_POLL_BASED
  550. if (!pdev)
  551. return;
  552. #endif
  553. pdev_id = pdev->pdev_id;
  554. mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  555. if (!mon_dst_srng) {
  556. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  557. "%s %d : HAL Monitor Destination Ring Init \
  558. Failed -- %p\n",
  559. __func__, __LINE__, mon_dst_srng);
  560. return;
  561. }
  562. hal_soc = soc->hal_soc;
  563. qdf_assert(hal_soc);
  564. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  565. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  566. "%s %d : HAL Monitor Destination Ring Init \
  567. Failed -- %p\n",
  568. __func__, __LINE__, mon_dst_srng);
  569. return;
  570. }
  571. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  572. rx_bufs_used = 0;
  573. while (qdf_likely((rxdma_dst_ring_desc =
  574. hal_srng_dst_peek(hal_soc, mon_dst_srng)) && quota--)) {
  575. qdf_nbuf_t head_msdu, tail_msdu;
  576. uint32_t npackets;
  577. head_msdu = (qdf_nbuf_t) NULL;
  578. tail_msdu = (qdf_nbuf_t) NULL;
  579. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  580. rxdma_dst_ring_desc,
  581. &head_msdu, &tail_msdu,
  582. &npackets, &ppdu_id,
  583. &head, &tail);
  584. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  585. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  586. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  587. sizeof(pdev->ppdu_info.rx_status));
  588. break;
  589. }
  590. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  591. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  592. mon_dst_srng);
  593. }
  594. hal_srng_access_end(hal_soc, mon_dst_srng);
  595. if (rx_bufs_used) {
  596. dp_rx_buffers_replenish(soc, pdev_id,
  597. &pdev->rxdma_mon_buf_ring, &soc->rx_desc_mon[pdev_id],
  598. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  599. }
  600. }
  601. static QDF_STATUS
  602. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev) {
  603. uint8_t pdev_id = pdev->pdev_id;
  604. struct dp_soc *soc = pdev->soc;
  605. union dp_rx_desc_list_elem_t *desc_list = NULL;
  606. union dp_rx_desc_list_elem_t *tail = NULL;
  607. struct dp_srng *rxdma_srng;
  608. uint32_t rxdma_entries;
  609. struct rx_desc_pool *rx_desc_pool;
  610. QDF_STATUS status;
  611. rxdma_srng = &pdev->rxdma_mon_buf_ring;
  612. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  613. soc->hal_soc,
  614. RXDMA_MONITOR_BUF);
  615. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  616. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  617. "%s: Mon RX Desc Pool[%d] allocation size=%d\n"
  618. , __func__, pdev_id, rxdma_entries*3);
  619. status = dp_rx_desc_pool_alloc(soc, pdev_id,
  620. rxdma_entries*3, rx_desc_pool);
  621. if (!QDF_IS_STATUS_SUCCESS(status)) {
  622. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  623. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  624. return status;
  625. }
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  627. "%s: Mon RX Buffers Replenish pdev_id=%d\n",
  628. __func__, pdev_id);
  629. status = dp_rx_buffers_replenish(soc, pdev_id, rxdma_srng, rx_desc_pool,
  630. rxdma_entries, &desc_list, &tail,
  631. HAL_RX_BUF_RBM_SW3_BM);
  632. if (!QDF_IS_STATUS_SUCCESS(status)) {
  633. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  634. "%s: dp_rx_buffers_replenish() failed \n", __func__);
  635. return status;
  636. }
  637. return QDF_STATUS_SUCCESS;
  638. }
  639. static QDF_STATUS
  640. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev) {
  641. uint8_t pdev_id = pdev->pdev_id;
  642. struct dp_soc *soc = pdev->soc;
  643. struct rx_desc_pool *rx_desc_pool;
  644. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  645. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  646. return QDF_STATUS_SUCCESS;
  647. }
  648. /*
  649. * Allocate and setup link descriptor pool that will be used by HW for
  650. * various link and queue descriptors and managed by WBM
  651. */
  652. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  653. {
  654. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  655. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  656. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  657. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  658. uint32_t total_link_descs, total_mem_size;
  659. uint32_t num_link_desc_banks;
  660. uint32_t last_bank_size = 0;
  661. uint32_t entry_size, num_entries;
  662. void *mon_desc_srng;
  663. uint32_t num_replenish_buf;
  664. struct dp_srng *dp_srng;
  665. int i;
  666. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  667. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  668. soc->hal_soc, RXDMA_MONITOR_DESC);
  669. /* Round up to power of 2 */
  670. total_link_descs = 1;
  671. while (total_link_descs < num_entries)
  672. total_link_descs <<= 1;
  673. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  674. "%s: total_link_descs: %u, link_desc_size: %d\n",
  675. __func__, total_link_descs, link_desc_size);
  676. total_mem_size = total_link_descs * link_desc_size;
  677. total_mem_size += link_desc_align;
  678. if (total_mem_size <= max_alloc_size) {
  679. num_link_desc_banks = 0;
  680. last_bank_size = total_mem_size;
  681. } else {
  682. num_link_desc_banks = (total_mem_size) /
  683. (max_alloc_size - link_desc_align);
  684. last_bank_size = total_mem_size %
  685. (max_alloc_size - link_desc_align);
  686. }
  687. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  688. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  689. max_alloc_size: %d last_bank_size: %d\n",
  690. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  691. last_bank_size);
  692. for (i = 0; i < num_link_desc_banks; i++) {
  693. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  694. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  695. max_alloc_size,
  696. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  697. if (!dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  698. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  699. "%s: Link desc memory allocation failed\n",
  700. __func__);
  701. goto fail;
  702. }
  703. dp_pdev->link_desc_banks[i].size = max_alloc_size;
  704. dp_pdev->link_desc_banks[i].base_vaddr =
  705. (void *)((unsigned long)
  706. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  707. ((unsigned long)
  708. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  709. link_desc_align));
  710. dp_pdev->link_desc_banks[i].base_paddr =
  711. (unsigned long)
  712. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  713. ((unsigned long)
  714. (dp_pdev->link_desc_banks[i].base_vaddr) -
  715. (unsigned long)
  716. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  717. }
  718. if (last_bank_size) {
  719. /* Allocate last bank in case total memory required is not exact
  720. * multiple of max_alloc_size
  721. */
  722. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  723. qdf_mem_alloc_consistent(soc->osdev,
  724. soc->osdev->dev, last_bank_size,
  725. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  726. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned == NULL) {
  727. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  728. "%s: allocation failed for mon link desc pool\n",
  729. __func__);
  730. goto fail;
  731. }
  732. dp_pdev->link_desc_banks[i].size = last_bank_size;
  733. dp_pdev->link_desc_banks[i].base_vaddr =
  734. (void *)((unsigned long)
  735. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  736. ((unsigned long)
  737. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  738. link_desc_align));
  739. dp_pdev->link_desc_banks[i].base_paddr =
  740. (unsigned long)
  741. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  742. ((unsigned long)
  743. (dp_pdev->link_desc_banks[i].base_vaddr) -
  744. (unsigned long)
  745. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  746. }
  747. /* Allocate and setup link descriptor idle list for HW internal use */
  748. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  749. total_mem_size = entry_size * total_link_descs;
  750. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring.hal_srng;
  751. num_replenish_buf = 0;
  752. if (total_mem_size <= max_alloc_size) {
  753. void *desc;
  754. hal_srng_access_start_unlocked(soc->hal_soc, mon_desc_srng);
  755. for (i = 0; i < MAX_MON_LINK_DESC_BANKS &&
  756. dp_pdev->link_desc_banks[i].base_paddr; i++) {
  757. uint32_t num_entries =
  758. (dp_pdev->link_desc_banks[i].size -
  759. (unsigned long)
  760. (dp_pdev->link_desc_banks[i].base_vaddr) -
  761. (unsigned long)
  762. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned))
  763. / link_desc_size;
  764. unsigned long paddr =
  765. (unsigned long)
  766. (dp_pdev->link_desc_banks[i].base_paddr);
  767. unsigned long vaddr =
  768. (unsigned long)
  769. (dp_pdev->link_desc_banks[i].base_vaddr);
  770. while (num_entries && (desc =
  771. hal_srng_src_get_next(soc->hal_soc,
  772. mon_desc_srng))) {
  773. hal_set_link_desc_addr(desc, i, paddr);
  774. num_entries--;
  775. num_replenish_buf++;
  776. paddr += link_desc_size;
  777. vaddr += link_desc_size;
  778. }
  779. }
  780. hal_srng_access_end_unlocked(soc->hal_soc, mon_desc_srng);
  781. } else {
  782. qdf_assert(0);
  783. }
  784. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  785. "%s: successfully replenished %d buffer\n",
  786. __func__, num_replenish_buf);
  787. return 0;
  788. fail:
  789. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  790. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  791. qdf_mem_free_consistent(soc->osdev, NULL,
  792. dp_pdev->link_desc_banks[i].size,
  793. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  794. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  795. }
  796. }
  797. return QDF_STATUS_E_FAILURE;
  798. }
  799. /*
  800. * Free link descriptor pool that was setup HW
  801. */
  802. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  803. {
  804. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  805. int i;
  806. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  807. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  808. qdf_mem_free_consistent(soc->osdev, NULL,
  809. dp_pdev->link_desc_banks[i].size,
  810. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  811. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  812. }
  813. }
  814. }
  815. /**
  816. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  817. * @pdev: core txrx pdev context
  818. *
  819. * This function will attach a DP RX for monitor mode instance into
  820. * the main device (SOC) context. Will allocate dp rx resource and
  821. * initialize resources.
  822. *
  823. * Return: QDF_STATUS_SUCCESS: success
  824. * QDF_STATUS_E_RESOURCES: Error return
  825. */
  826. QDF_STATUS
  827. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  828. uint8_t pdev_id = pdev->pdev_id;
  829. struct dp_soc *soc = pdev->soc;
  830. QDF_STATUS status;
  831. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  832. "%s: pdev attach id=%d\n", __func__, pdev_id);
  833. status = dp_rx_pdev_mon_buf_attach(pdev);
  834. if (!QDF_IS_STATUS_SUCCESS(status)) {
  835. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  836. "%s: dp_rx_pdev_mon_buf_attach() failed \n", __func__);
  837. return status;
  838. }
  839. status = dp_rx_pdev_mon_status_attach(pdev);
  840. if (!QDF_IS_STATUS_SUCCESS(status)) {
  841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  842. "%s: dp_rx_pdev_mon_status_attach() failed \n",
  843. __func__);
  844. return status;
  845. }
  846. status = dp_mon_link_desc_pool_setup(soc, pdev_id);
  847. if (!QDF_IS_STATUS_SUCCESS(status)) {
  848. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  849. "%s: dp_mon_link_desc_pool_setup() failed \n",
  850. __func__);
  851. return status;
  852. }
  853. return QDF_STATUS_SUCCESS;
  854. }
  855. /**
  856. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  857. * @pdev: core txrx pdev context
  858. *
  859. * This function will detach DP RX for monitor mode from
  860. * main device context. will free DP Rx resources for
  861. * monitor mode
  862. *
  863. * Return: QDF_STATUS_SUCCESS: success
  864. * QDF_STATUS_E_RESOURCES: Error return
  865. */
  866. QDF_STATUS
  867. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  868. uint8_t pdev_id = pdev->pdev_id;
  869. struct dp_soc *soc = pdev->soc;
  870. dp_mon_link_desc_pool_cleanup(soc, pdev_id);
  871. dp_rx_pdev_mon_status_detach(pdev);
  872. dp_rx_pdev_mon_buf_detach(pdev);
  873. return QDF_STATUS_SUCCESS;
  874. }