dp_rx_err.c 33 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <linux/ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  49. *
  50. * @soc: core txrx main context
  51. * @ring_desc: opaque pointer to the REO error ring descriptor
  52. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  53. * @head: head of the local descriptor free-list
  54. * @tail: tail of the local descriptor free-list
  55. * @quota: No. of units (packets) that can be serviced in one shot.
  56. *
  57. * This function is used to drop all MSDU in an MPDU
  58. *
  59. * Return: uint32_t: No. of elements processed
  60. */
  61. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  62. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  63. union dp_rx_desc_list_elem_t **head,
  64. union dp_rx_desc_list_elem_t **tail,
  65. uint32_t quota)
  66. {
  67. uint32_t rx_bufs_used = 0;
  68. void *link_desc_va;
  69. struct hal_buf_info buf_info;
  70. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  71. int i;
  72. uint8_t *rx_tlv_hdr;
  73. uint32_t tid;
  74. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  75. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  76. /* No UNMAP required -- this is "malloc_consistent" memory */
  77. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  78. &mpdu_desc_info->msdu_count);
  79. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  80. struct dp_rx_desc *rx_desc =
  81. dp_rx_cookie_2_va_rxdma_buf(soc,
  82. msdu_list.sw_cookie[i]);
  83. qdf_assert(rx_desc);
  84. if (!dp_rx_desc_check_magic(rx_desc)) {
  85. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  86. FL("Invalid rx_desc cookie=%d"),
  87. msdu_list.sw_cookie[i]);
  88. return rx_bufs_used;
  89. }
  90. rx_bufs_used++;
  91. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  93. "Packet received with PN error for tid :%d", tid);
  94. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  95. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  96. hal_rx_print_pn(rx_tlv_hdr);
  97. /* Just free the buffers */
  98. qdf_nbuf_free(rx_desc->nbuf);
  99. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  100. }
  101. return rx_bufs_used;
  102. }
  103. /**
  104. * dp_rx_pn_error_handle() - Handles PN check errors
  105. *
  106. * @soc: core txrx main context
  107. * @ring_desc: opaque pointer to the REO error ring descriptor
  108. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  109. * @head: head of the local descriptor free-list
  110. * @tail: tail of the local descriptor free-list
  111. * @quota: No. of units (packets) that can be serviced in one shot.
  112. *
  113. * This function implements PN error handling
  114. * If the peer is configured to ignore the PN check errors
  115. * or if DP feels, that this frame is still OK, the frame can be
  116. * re-injected back to REO to use some of the other features
  117. * of REO e.g. duplicate detection/routing to other cores
  118. *
  119. * Return: uint32_t: No. of elements processed
  120. */
  121. static uint32_t
  122. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  123. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  124. union dp_rx_desc_list_elem_t **head,
  125. union dp_rx_desc_list_elem_t **tail,
  126. uint32_t quota)
  127. {
  128. uint16_t peer_id;
  129. uint32_t rx_bufs_used = 0;
  130. struct dp_peer *peer;
  131. bool peer_pn_policy = false;
  132. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  133. mpdu_desc_info->peer_meta_data);
  134. peer = dp_peer_find_by_id(soc, peer_id);
  135. if (qdf_likely(peer)) {
  136. /*
  137. * TODO: Check for peer specific policies & set peer_pn_policy
  138. */
  139. }
  140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  141. "Packet received with PN error");
  142. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  143. "discard rx due to PN error for peer %pK "
  144. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  145. peer,
  146. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  147. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  148. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  149. /* No peer PN policy -- definitely drop */
  150. if (!peer_pn_policy)
  151. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  152. mpdu_desc_info,
  153. head, tail, quota);
  154. return rx_bufs_used;
  155. }
  156. /**
  157. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  158. *
  159. * @soc: core txrx main context
  160. * @ring_desc: opaque pointer to the REO error ring descriptor
  161. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  162. * @head: head of the local descriptor free-list
  163. * @tail: tail of the local descriptor free-list
  164. * @quota: No. of units (packets) that can be serviced in one shot.
  165. *
  166. * This function implements the error handling when sequence number
  167. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  168. * need to be handled:
  169. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  170. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  171. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  172. * For case B), the frame is normally dropped, no more action is taken
  173. *
  174. * Return: uint32_t: No. of elements processed
  175. */
  176. static uint32_t
  177. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  178. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  179. union dp_rx_desc_list_elem_t **head,
  180. union dp_rx_desc_list_elem_t **tail,
  181. uint32_t quota)
  182. {
  183. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  184. head, tail, quota);
  185. }
  186. static bool
  187. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  188. struct dp_rx_desc *rx_desc, uint8_t mac_id)
  189. {
  190. bool mpdu_done = false;
  191. /* TODO: Currently only single radio is supported, hence
  192. * pdev hard coded to '0' index
  193. */
  194. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  195. if (hal_rx_msdu_end_first_msdu_get(rx_desc->rx_buf_start)) {
  196. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  197. dp_pdev->invalid_peer_head_msdu = NULL;
  198. dp_pdev->invalid_peer_tail_msdu = NULL;
  199. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc->rx_buf_start,
  200. &(dp_pdev->ppdu_info.rx_status));
  201. }
  202. if (hal_rx_msdu_end_last_msdu_get(rx_desc->rx_buf_start)) {
  203. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  204. mpdu_done = true;
  205. }
  206. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  207. dp_pdev->invalid_peer_tail_msdu,
  208. nbuf);
  209. return mpdu_done;
  210. }
  211. /**
  212. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  213. * descriptor violation on either a
  214. * REO or WBM ring
  215. *
  216. * @soc: core DP main context
  217. * @rx_desc : pointer to the sw rx descriptor
  218. * @head: pointer to head of rx descriptors to be added to free list
  219. * @tail: pointer to tail of rx descriptors to be added to free list
  220. * quota: upper limit of descriptors that can be reaped
  221. *
  222. * This function handles NULL queue descriptor violations arising out
  223. * a missing REO queue for a given peer or a given TID. This typically
  224. * may happen if a packet is received on a QOS enabled TID before the
  225. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  226. * it may also happen for MC/BC frames if they are not routed to the
  227. * non-QOS TID queue, in the absence of any other default TID queue.
  228. * This error can show up both in a REO destination or WBM release ring.
  229. *
  230. * Return: uint32_t: No. of Rx buffers reaped
  231. */
  232. static uint32_t
  233. dp_rx_null_q_desc_handle(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  234. union dp_rx_desc_list_elem_t **head,
  235. union dp_rx_desc_list_elem_t **tail,
  236. uint32_t quota)
  237. {
  238. uint32_t rx_bufs_used = 0;
  239. uint32_t pkt_len, l2_hdr_offset;
  240. uint16_t msdu_len;
  241. qdf_nbuf_t nbuf;
  242. struct dp_vdev *vdev;
  243. uint16_t peer_id = 0xFFFF;
  244. struct dp_peer *peer = NULL;
  245. uint32_t sgi, rate_mcs, tid;
  246. struct dp_ast_entry *ase;
  247. uint16_t sa_idx;
  248. uint8_t *data;
  249. uint8_t pool_id;
  250. rx_bufs_used++;
  251. nbuf = rx_desc->nbuf;
  252. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  253. QDF_DMA_BIDIRECTIONAL);
  254. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  255. pool_id = rx_desc->pool_id;
  256. l2_hdr_offset =
  257. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  258. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  259. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  260. /* Set length in nbuf */
  261. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  262. /*
  263. * Check if DMA completed -- msdu_done is the last bit
  264. * to be written
  265. */
  266. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  267. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  268. FL("MSDU DONE failure"));
  269. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  270. QDF_TRACE_LEVEL_INFO);
  271. qdf_assert(0);
  272. }
  273. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  274. peer = dp_peer_find_by_id(soc, peer_id);
  275. if (!peer) {
  276. bool mpdu_done = false;
  277. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  278. FL("peer is NULL"));
  279. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_desc, pool_id);
  280. if (mpdu_done)
  281. dp_rx_process_invalid_peer(soc, nbuf);
  282. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  283. return rx_bufs_used;
  284. }
  285. vdev = peer->vdev;
  286. if (!vdev) {
  287. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  288. FL("INVALID vdev %pK OR osif_rx"), vdev);
  289. /* Drop & free packet */
  290. qdf_nbuf_free(nbuf);
  291. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  292. goto fail;
  293. }
  294. sgi = hal_rx_msdu_start_sgi_get(rx_desc->rx_buf_start);
  295. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_desc->rx_buf_start);
  296. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  297. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  298. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  299. __func__, __LINE__, sgi, rate_mcs, tid);
  300. /*
  301. * Advance the packet start pointer by total size of
  302. * pre-header TLV's
  303. */
  304. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  305. /*
  306. * Multicast Echo Check is required only if vdev is STA and
  307. * received pkt is a multicast/broadcast pkt. otherwise
  308. * skip the MEC check.
  309. */
  310. if (vdev->opmode != wlan_op_mode_sta)
  311. goto skip_mec_check;
  312. if (!hal_rx_msdu_end_da_is_mcbc_get(rx_desc->rx_buf_start))
  313. goto skip_mec_check;
  314. data = qdf_nbuf_data(nbuf);
  315. /*
  316. * if the received pkts src mac addr matches with vdev
  317. * mac address then drop the pkt as it is looped back
  318. */
  319. if (!(memcmp(&data[DP_MAC_ADDR_LEN],
  320. vdev->mac_addr.raw,
  321. DP_MAC_ADDR_LEN))) {
  322. qdf_nbuf_free(nbuf);
  323. goto fail;
  324. }
  325. /* if the received pkts src mac addr matches with the
  326. * wired PCs MAC addr which is behind the STA or with
  327. * wireless STAs MAC addr which are behind the Repeater,
  328. * then drop the pkt as it is looped back
  329. */
  330. qdf_spin_lock_bh(&soc->ast_lock);
  331. if (hal_rx_msdu_end_sa_is_valid_get(rx_desc->rx_buf_start)) {
  332. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_desc->rx_buf_start);
  333. if ((sa_idx < 0) || (sa_idx > (WLAN_UMAC_PSOC_MAX_PEERS * 2))) {
  334. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  335. "invalid sa_idx: %d", sa_idx);
  336. qdf_assert_always(0);
  337. }
  338. ase = soc->ast_table[sa_idx];
  339. } else
  340. ase = dp_peer_ast_hash_find(soc, &data[DP_MAC_ADDR_LEN], 0);
  341. if (ase) {
  342. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  343. (ase->peer != peer)) {
  344. qdf_spin_unlock_bh(&soc->ast_lock);
  345. QDF_TRACE(QDF_MODULE_ID_DP,
  346. QDF_TRACE_LEVEL_INFO,
  347. "received pkt with same src mac %pM",
  348. &data[DP_MAC_ADDR_LEN]);
  349. qdf_nbuf_free(nbuf);
  350. goto fail;
  351. }
  352. }
  353. qdf_spin_unlock_bh(&soc->ast_lock);
  354. skip_mec_check:
  355. /* WDS Source Port Learning */
  356. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))
  357. dp_rx_wds_srcport_learn(soc, rx_desc->rx_buf_start, peer, nbuf);
  358. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(
  359. rx_desc->rx_buf_start)) {
  360. /* TODO: Assuming that qos_control_valid also indicates
  361. * unicast. Should we check this?
  362. */
  363. if (peer &&
  364. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  365. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  366. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  367. }
  368. }
  369. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  370. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  371. "%s: p_id %d msdu_len %d hdr_off %d",
  372. __func__, peer_id, msdu_len, l2_hdr_offset);
  373. print_hex_dump(KERN_ERR,
  374. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  375. qdf_nbuf_data(nbuf), 128, false);
  376. #endif /* NAPIER_EMULATION */
  377. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  378. qdf_nbuf_set_next(nbuf, NULL);
  379. dp_rx_deliver_raw(vdev, nbuf, peer);
  380. } else {
  381. if (qdf_unlikely(peer->bss_peer)) {
  382. QDF_TRACE(QDF_MODULE_ID_DP,
  383. QDF_TRACE_LEVEL_INFO,
  384. FL("received pkt with same src MAC"));
  385. /* Drop & free packet */
  386. qdf_nbuf_free(nbuf);
  387. goto fail;
  388. }
  389. if (vdev->osif_rx) {
  390. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  391. FL("vdev %pK osif_rx %pK"), vdev,
  392. vdev->osif_rx);
  393. qdf_nbuf_set_next(nbuf, NULL);
  394. vdev->osif_rx(vdev->osif_vdev, nbuf);
  395. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  396. } else {
  397. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  398. FL("INVALID vdev %pK OR osif_rx"), vdev);
  399. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  400. }
  401. }
  402. fail:
  403. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  404. return rx_bufs_used;
  405. }
  406. /**
  407. * dp_rx_err_deliver() - Function to deliver error frames to OS
  408. *
  409. * @soc: core DP main context
  410. * @rx_desc : pointer to the sw rx descriptor
  411. * @head: pointer to head of rx descriptors to be added to free list
  412. * @tail: pointer to tail of rx descriptors to be added to free list
  413. * quota: upper limit of descriptors that can be reaped
  414. *
  415. * Return: uint32_t: No. of Rx buffers reaped
  416. */
  417. static uint32_t
  418. dp_rx_err_deliver(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  419. union dp_rx_desc_list_elem_t **head,
  420. union dp_rx_desc_list_elem_t **tail,
  421. uint32_t quota)
  422. {
  423. uint32_t rx_bufs_used = 0;
  424. uint32_t pkt_len, l2_hdr_offset;
  425. uint16_t msdu_len;
  426. qdf_nbuf_t nbuf;
  427. struct dp_vdev *vdev;
  428. uint16_t peer_id = 0xFFFF;
  429. struct dp_peer *peer = NULL;
  430. rx_bufs_used++;
  431. nbuf = rx_desc->nbuf;
  432. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  433. QDF_DMA_BIDIRECTIONAL);
  434. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  435. /*
  436. * Check if DMA completed -- msdu_done is the last bit
  437. * to be written
  438. */
  439. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  440. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  441. FL("MSDU DONE failure"));
  442. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  443. QDF_TRACE_LEVEL_INFO);
  444. qdf_assert(0);
  445. }
  446. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  447. peer = dp_peer_find_by_id(soc, peer_id);
  448. if (!peer) {
  449. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  450. FL("peer is NULL"));
  451. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  452. qdf_nbuf_len(nbuf));
  453. /* Drop & free packet */
  454. qdf_nbuf_free(nbuf);
  455. goto fail;
  456. }
  457. vdev = peer->vdev;
  458. if (!vdev) {
  459. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  460. FL("INVALID vdev %pK OR osif_rx"), vdev);
  461. /* Drop & free packet */
  462. qdf_nbuf_free(nbuf);
  463. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  464. goto fail;
  465. }
  466. /* Drop & free packet if mesh mode not enabled */
  467. if (!vdev->mesh_vdev) {
  468. qdf_nbuf_free(nbuf);
  469. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  470. goto fail;
  471. }
  472. l2_hdr_offset =
  473. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  474. msdu_len =
  475. hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  476. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  477. /* Set length in nbuf */
  478. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  479. qdf_nbuf_set_next(nbuf, NULL);
  480. /*
  481. * Advance the packet start pointer by total size of
  482. * pre-header TLV's
  483. */
  484. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  485. qdf_nbuf_set_chfrag_start(nbuf, 1);
  486. qdf_nbuf_set_chfrag_end(nbuf, 1);
  487. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  488. rx_desc->rx_buf_start)
  489. == QDF_STATUS_SUCCESS) {
  490. QDF_TRACE(QDF_MODULE_ID_DP,
  491. QDF_TRACE_LEVEL_INFO_MED,
  492. FL("mesh pkt filtered"));
  493. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  494. 1);
  495. qdf_nbuf_free(nbuf);
  496. goto fail;
  497. }
  498. dp_rx_fill_mesh_stats(vdev, nbuf, rx_desc->rx_buf_start, peer);
  499. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  500. dp_rx_deliver_raw(vdev, nbuf, peer);
  501. } else {
  502. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  503. vdev->osif_rx(vdev->osif_vdev, nbuf);
  504. }
  505. fail:
  506. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  507. return rx_bufs_used;
  508. }
  509. /**
  510. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  511. * @soc: DP SOC handle
  512. * @rx_desc : pointer to the sw rx descriptor
  513. * @head: pointer to head of rx descriptors to be added to free list
  514. * @tail: pointer to tail of rx descriptors to be added to free list
  515. *
  516. * return: void
  517. */
  518. static void
  519. dp_rx_process_mic_error(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  520. union dp_rx_desc_list_elem_t **head,
  521. union dp_rx_desc_list_elem_t **tail)
  522. {
  523. struct dp_vdev *vdev = NULL;
  524. struct dp_pdev *pdev = NULL;
  525. struct ol_if_ops *tops = NULL;
  526. qdf_nbuf_t nbuf;
  527. struct ieee80211_frame *wh;
  528. uint8_t *rx_pkt_hdr;
  529. uint8_t *rx_tlv_hdr;
  530. uint8_t i;
  531. nbuf = rx_desc->nbuf;
  532. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_BIDIRECTIONAL);
  533. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  534. if (!hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr))
  535. goto fail;
  536. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(nbuf));
  537. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  538. for (i = 0; i < MAX_PDEV_CNT; i++) {
  539. pdev = soc->pdev_list[i];
  540. if (!pdev) {
  541. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  542. "PDEV not found");
  543. continue;
  544. }
  545. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  546. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  547. DP_MAC_ADDR_LEN) == 0) {
  548. goto out;
  549. }
  550. }
  551. }
  552. if (!vdev) {
  553. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  554. "VDEV not found");
  555. goto fail;
  556. }
  557. out:
  558. tops = pdev->soc->cdp_soc.ol_ops;
  559. if (tops->rx_mic_error)
  560. tops->rx_mic_error(pdev->osif_pdev, vdev->vdev_id, wh);
  561. fail:
  562. qdf_nbuf_free(rx_desc->nbuf);
  563. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  564. &tail[rx_desc->pool_id], rx_desc);
  565. return;
  566. }
  567. /**
  568. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  569. * (WBM), following error handling
  570. *
  571. * @soc: core DP main context
  572. * @ring_desc: opaque pointer to the REO error ring descriptor
  573. *
  574. * Return: QDF_STATUS
  575. */
  576. static QDF_STATUS
  577. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc)
  578. {
  579. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  580. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  581. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  582. void *hal_soc = soc->hal_soc;
  583. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  584. void *src_srng_desc;
  585. if (!wbm_rel_srng) {
  586. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  587. "WBM RELEASE RING not initialized");
  588. return status;
  589. }
  590. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  591. /* TODO */
  592. /*
  593. * Need API to convert from hal_ring pointer to
  594. * Ring Type / Ring Id combo
  595. */
  596. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  597. FL("HAL RING Access For WBM Release SRNG Failed - %pK"),
  598. wbm_rel_srng);
  599. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  600. goto done;
  601. }
  602. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  603. if (qdf_likely(src_srng_desc)) {
  604. /* Return link descriptor through WBM ring (SW2WBM)*/
  605. hal_rx_msdu_link_desc_set(hal_soc,
  606. src_srng_desc, buf_addr_info);
  607. status = QDF_STATUS_SUCCESS;
  608. } else {
  609. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  610. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  611. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  612. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  613. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  614. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  615. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  616. }
  617. done:
  618. hal_srng_access_end(hal_soc, wbm_rel_srng);
  619. return status;
  620. }
  621. /**
  622. * dp_rx_err_process() - Processes error frames routed to REO error ring
  623. *
  624. * @soc: core txrx main context
  625. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  626. * @quota: No. of units (packets) that can be serviced in one shot.
  627. *
  628. * This function implements error processing and top level demultiplexer
  629. * for all the frames routed to REO error ring.
  630. *
  631. * Return: uint32_t: No. of elements processed
  632. */
  633. uint32_t
  634. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  635. {
  636. void *hal_soc;
  637. void *ring_desc;
  638. union dp_rx_desc_list_elem_t *head = NULL;
  639. union dp_rx_desc_list_elem_t *tail = NULL;
  640. uint32_t rx_bufs_used = 0;
  641. uint8_t buf_type;
  642. uint8_t error, rbm;
  643. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  644. struct hal_buf_info hbi;
  645. struct dp_pdev *dp_pdev;
  646. struct dp_srng *dp_rxdma_srng;
  647. struct rx_desc_pool *rx_desc_pool;
  648. /* Debug -- Remove later */
  649. qdf_assert(soc && hal_ring);
  650. hal_soc = soc->hal_soc;
  651. /* Debug -- Remove later */
  652. qdf_assert(hal_soc);
  653. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  654. /* TODO */
  655. /*
  656. * Need API to convert from hal_ring pointer to
  657. * Ring Type / Ring Id combo
  658. */
  659. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  660. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  661. FL("HAL RING Access Failed -- %pK"), hal_ring);
  662. goto done;
  663. }
  664. while (qdf_likely((ring_desc =
  665. hal_srng_dst_get_next(hal_soc, hal_ring))
  666. && quota--)) {
  667. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  668. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  669. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  670. /*
  671. * Check if the buffer is to be processed on this processor
  672. */
  673. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  674. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  675. /* TODO */
  676. /* Call appropriate handler */
  677. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  679. FL("Invalid RBM %d"), rbm);
  680. continue;
  681. }
  682. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  683. /*
  684. * For REO error ring, expect only MSDU LINK DESC
  685. */
  686. qdf_assert(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  687. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  688. /* Get the MPDU DESC info */
  689. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  690. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  691. /* TODO */
  692. rx_bufs_used += dp_rx_frag_handle(soc,
  693. ring_desc, &mpdu_desc_info,
  694. &head, &tail, quota);
  695. DP_STATS_INC(soc, rx.rx_frags, 1);
  696. continue;
  697. }
  698. if (hal_rx_reo_is_pn_error(ring_desc)) {
  699. /* TOD0 */
  700. DP_STATS_INC(soc,
  701. rx.err.
  702. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  703. 1);
  704. rx_bufs_used += dp_rx_pn_error_handle(soc,
  705. ring_desc, &mpdu_desc_info,
  706. &head, &tail, quota);
  707. continue;
  708. }
  709. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  710. /* TOD0 */
  711. DP_STATS_INC(soc,
  712. rx.err.
  713. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  714. 1);
  715. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  716. ring_desc, &mpdu_desc_info,
  717. &head, &tail, quota);
  718. continue;
  719. }
  720. /* Return link descriptor through WBM ring (SW2WBM)*/
  721. dp_rx_link_desc_return(soc, ring_desc);
  722. }
  723. done:
  724. hal_srng_access_end(hal_soc, hal_ring);
  725. /* Assume MAC id = 0, owner = 0 */
  726. if (rx_bufs_used) {
  727. dp_pdev = soc->pdev_list[0];
  728. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  729. rx_desc_pool = &soc->rx_desc_buf[0];
  730. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  731. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  732. }
  733. return rx_bufs_used; /* Assume no scale factor for now */
  734. }
  735. /**
  736. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  737. *
  738. * @soc: core txrx main context
  739. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  740. * @quota: No. of units (packets) that can be serviced in one shot.
  741. *
  742. * This function implements error processing and top level demultiplexer
  743. * for all the frames routed to WBM2HOST sw release ring.
  744. *
  745. * Return: uint32_t: No. of elements processed
  746. */
  747. uint32_t
  748. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  749. {
  750. void *hal_soc;
  751. void *ring_desc;
  752. struct dp_rx_desc *rx_desc;
  753. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  754. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  755. uint32_t rx_bufs_used[MAX_PDEV_CNT] = { 0 };
  756. uint32_t rx_bufs_reaped = 0;
  757. uint8_t buf_type, rbm;
  758. uint8_t wbm_err_src;
  759. uint32_t rx_buf_cookie;
  760. uint8_t mac_id;
  761. struct dp_pdev *dp_pdev;
  762. struct dp_srng *dp_rxdma_srng;
  763. struct rx_desc_pool *rx_desc_pool;
  764. uint8_t pool_id;
  765. /* Debug -- Remove later */
  766. qdf_assert(soc && hal_ring);
  767. hal_soc = soc->hal_soc;
  768. /* Debug -- Remove later */
  769. qdf_assert(hal_soc);
  770. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  771. /* TODO */
  772. /*
  773. * Need API to convert from hal_ring pointer to
  774. * Ring Type / Ring Id combo
  775. */
  776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  777. FL("HAL RING Access Failed -- %pK"), hal_ring);
  778. goto done;
  779. }
  780. while (qdf_likely((ring_desc =
  781. hal_srng_dst_get_next(hal_soc, hal_ring))
  782. && quota--)) {
  783. /* XXX */
  784. wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(ring_desc);
  785. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  786. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  787. /*
  788. * Check if the buffer is to be processed on this processor
  789. */
  790. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  791. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  792. /* TODO */
  793. /* Call appropriate handler */
  794. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  795. FL("Invalid RBM %d"), rbm);
  796. continue;
  797. }
  798. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  799. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  800. qdf_assert(rx_desc);
  801. if (!dp_rx_desc_check_magic(rx_desc)) {
  802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  803. FL("Invalid rx_desc cookie=%d"),
  804. rx_buf_cookie);
  805. continue;
  806. }
  807. pool_id = rx_desc->pool_id;
  808. /* XXX */
  809. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  810. /*
  811. * For WBM ring, expect only MSDU buffers
  812. */
  813. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  814. if (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  815. uint8_t push_reason =
  816. HAL_RX_WBM_REO_PUSH_REASON_GET(ring_desc);
  817. if (push_reason == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  818. uint8_t reo_error_code =
  819. HAL_RX_WBM_REO_ERROR_CODE_GET(ring_desc);
  820. DP_STATS_INC(soc, rx.err.reo_error[
  821. reo_error_code], 1);
  822. switch (reo_error_code) {
  823. /*
  824. * Handling for packets which have NULL REO
  825. * queue descriptor
  826. */
  827. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  828. QDF_TRACE(QDF_MODULE_ID_DP,
  829. QDF_TRACE_LEVEL_WARN,
  830. "Got pkt with REO ERROR: %d",
  831. reo_error_code);
  832. rx_bufs_used[pool_id] +=
  833. dp_rx_null_q_desc_handle(soc,
  834. rx_desc,
  835. &head[pool_id],
  836. &tail[pool_id], quota);
  837. continue;
  838. /* TODO */
  839. /* Add per error code accounting */
  840. default:
  841. QDF_TRACE(QDF_MODULE_ID_DP,
  842. QDF_TRACE_LEVEL_ERROR,
  843. "REO error %d detected",
  844. reo_error_code);
  845. }
  846. }
  847. } else if (wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) {
  848. uint8_t push_reason =
  849. HAL_RX_WBM_RXDMA_PUSH_REASON_GET(ring_desc);
  850. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  851. uint8_t rxdma_error_code =
  852. HAL_RX_WBM_RXDMA_ERROR_CODE_GET(ring_desc);
  853. DP_STATS_INC(soc, rx.err.rxdma_error[
  854. rxdma_error_code], 1);
  855. switch (rxdma_error_code) {
  856. case HAL_RXDMA_ERR_UNENCRYPTED:
  857. rx_bufs_used[pool_id] +=
  858. dp_rx_err_deliver(soc,
  859. rx_desc,
  860. &head[pool_id],
  861. &tail[pool_id],
  862. quota);
  863. continue;
  864. case HAL_RXDMA_ERR_TKIP_MIC:
  865. dp_rx_process_mic_error(soc,
  866. rx_desc,
  867. &head[pool_id],
  868. &tail[pool_id]);
  869. rx_bufs_used[pool_id]++;
  870. continue;
  871. case HAL_RXDMA_ERR_DECRYPT:
  872. QDF_TRACE(QDF_MODULE_ID_DP,
  873. QDF_TRACE_LEVEL_ERROR,
  874. "Packet received with Decrypt error");
  875. break;
  876. default:
  877. QDF_TRACE(QDF_MODULE_ID_DP,
  878. QDF_TRACE_LEVEL_ERROR,
  879. "RXDMA error %d",
  880. rxdma_error_code);
  881. }
  882. }
  883. } else {
  884. /* Should not come here */
  885. qdf_assert(0);
  886. }
  887. rx_bufs_used[rx_desc->pool_id]++;
  888. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  889. QDF_DMA_BIDIRECTIONAL);
  890. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  891. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  892. QDF_TRACE_LEVEL_INFO);
  893. qdf_nbuf_free(rx_desc->nbuf);
  894. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  895. &tail[rx_desc->pool_id], rx_desc);
  896. }
  897. done:
  898. hal_srng_access_end(hal_soc, hal_ring);
  899. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  900. if (rx_bufs_used[mac_id]) {
  901. dp_pdev = soc->pdev_list[mac_id];
  902. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  903. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  904. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  905. rx_desc_pool, rx_bufs_used[mac_id],
  906. &head[mac_id], &tail[mac_id],
  907. HAL_RX_BUF_RBM_SW3_BM);
  908. rx_bufs_reaped += rx_bufs_used[mac_id];
  909. }
  910. }
  911. return rx_bufs_reaped; /* Assume no scale factor for now */
  912. }
  913. /**
  914. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  915. *
  916. * @soc: core DP main context
  917. * @mac_id: mac id which is one of 3 mac_ids
  918. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  919. * @head: head of descs list to be freed
  920. * @tail: tail of decs list to be freed
  921. * Return: number of msdu in MPDU to be popped
  922. */
  923. static inline uint32_t
  924. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  925. void *rxdma_dst_ring_desc,
  926. union dp_rx_desc_list_elem_t **head,
  927. union dp_rx_desc_list_elem_t **tail)
  928. {
  929. void *rx_msdu_link_desc;
  930. qdf_nbuf_t msdu;
  931. qdf_nbuf_t last;
  932. struct hal_rx_msdu_list msdu_list;
  933. uint16_t num_msdus;
  934. struct hal_buf_info buf_info;
  935. void *p_buf_addr_info;
  936. void *p_last_buf_addr_info;
  937. uint32_t rx_bufs_used = 0;
  938. uint32_t msdu_cnt;
  939. uint32_t i;
  940. uint8_t push_reason;
  941. uint8_t rxdma_error_code = 0;
  942. msdu = 0;
  943. last = NULL;
  944. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  945. &p_last_buf_addr_info, &msdu_cnt);
  946. push_reason =
  947. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  948. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  949. rxdma_error_code =
  950. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  951. }
  952. do {
  953. rx_msdu_link_desc =
  954. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  955. qdf_assert(rx_msdu_link_desc);
  956. num_msdus = (msdu_cnt > HAL_RX_NUM_MSDU_DESC)?
  957. HAL_RX_NUM_MSDU_DESC:msdu_cnt;
  958. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  959. msdu_cnt -= num_msdus;
  960. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  961. for (i = 0; i < num_msdus; i++) {
  962. struct dp_rx_desc *rx_desc =
  963. dp_rx_cookie_2_va_rxdma_buf(soc,
  964. msdu_list.sw_cookie[i]);
  965. qdf_assert(rx_desc);
  966. msdu = rx_desc->nbuf;
  967. qdf_nbuf_unmap_single(soc->osdev, msdu,
  968. QDF_DMA_FROM_DEVICE);
  969. QDF_TRACE(QDF_MODULE_ID_DP,
  970. QDF_TRACE_LEVEL_DEBUG,
  971. "[%s][%d] msdu_nbuf=%pK \n",
  972. __func__, __LINE__, msdu);
  973. qdf_nbuf_free(msdu);
  974. rx_bufs_used++;
  975. dp_rx_add_to_free_desc_list(head,
  976. tail, rx_desc);
  977. }
  978. } else {
  979. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  980. }
  981. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  982. &p_buf_addr_info);
  983. dp_rx_link_desc_return(soc, p_last_buf_addr_info);
  984. p_last_buf_addr_info = p_buf_addr_info;
  985. } while (buf_info.paddr && msdu_cnt);
  986. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  987. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  988. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  989. "Packet received with Decrypt error");
  990. }
  991. return rx_bufs_used;
  992. }
  993. /**
  994. * dp_rxdma_err_process() - RxDMA error processing functionality
  995. *
  996. * @soc: core txrx main contex
  997. * @mac_id: mac id which is one of 3 mac_ids
  998. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  999. * @quota: No. of units (packets) that can be serviced in one shot.
  1000. * Return: num of buffers processed
  1001. */
  1002. uint32_t
  1003. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  1004. {
  1005. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  1006. uint8_t pdev_id;
  1007. void *hal_soc;
  1008. void *rxdma_dst_ring_desc;
  1009. void *err_dst_srng;
  1010. union dp_rx_desc_list_elem_t *head = NULL;
  1011. union dp_rx_desc_list_elem_t *tail = NULL;
  1012. struct dp_srng *dp_rxdma_srng;
  1013. struct rx_desc_pool *rx_desc_pool;
  1014. uint32_t work_done = 0;
  1015. uint32_t rx_bufs_used = 0;
  1016. #ifdef DP_INTR_POLL_BASED
  1017. if (!pdev)
  1018. return 0;
  1019. #endif
  1020. pdev_id = pdev->pdev_id;
  1021. err_dst_srng = pdev->rxdma_err_dst_ring.hal_srng;
  1022. if (!err_dst_srng) {
  1023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1024. "%s %d : HAL Monitor Destination Ring Init \
  1025. Failed -- %pK\n",
  1026. __func__, __LINE__, err_dst_srng);
  1027. return 0;
  1028. }
  1029. hal_soc = soc->hal_soc;
  1030. qdf_assert(hal_soc);
  1031. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  1032. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1033. "%s %d : HAL Monitor Destination Ring Init \
  1034. Failed -- %pK\n",
  1035. __func__, __LINE__, err_dst_srng);
  1036. return 0;
  1037. }
  1038. while (qdf_likely((rxdma_dst_ring_desc =
  1039. hal_srng_dst_get_next(hal_soc, err_dst_srng)) && quota--)) {
  1040. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  1041. rxdma_dst_ring_desc,
  1042. &head, &tail);
  1043. }
  1044. hal_srng_access_end(hal_soc, err_dst_srng);
  1045. if (rx_bufs_used) {
  1046. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1047. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1048. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng,
  1049. rx_desc_pool, rx_bufs_used, &head, &tail,
  1050. HAL_RX_BUF_RBM_SW3_BM);
  1051. work_done += rx_bufs_used;
  1052. }
  1053. return work_done;
  1054. }