dp_main.c 112 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <hal_api.h>
  23. #include <hif.h>
  24. #include <htt.h>
  25. #include <wdi_event.h>
  26. #include <queue.h>
  27. #include "dp_htt.h"
  28. #include "dp_types.h"
  29. #include "dp_internal.h"
  30. #include "dp_tx.h"
  31. #include "dp_rx.h"
  32. #include <cdp_txrx_handle.h>
  33. #include <wlan_cfg.h>
  34. #include "cdp_txrx_cmn_struct.h"
  35. #include <qdf_util.h>
  36. #include "dp_peer.h"
  37. #include "dp_rx_mon.h"
  38. #define DP_INTR_POLL_TIMER_MS 10
  39. #define DP_MCS_LENGTH (6*MAX_MCS)
  40. #define DP_NSS_LENGTH (6*SS_COUNT)
  41. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  42. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  43. /**
  44. * default_dscp_tid_map - Default DSCP-TID mapping
  45. *
  46. * DSCP TID AC
  47. * 000000 0 WME_AC_BE
  48. * 001000 1 WME_AC_BK
  49. * 010000 1 WME_AC_BK
  50. * 011000 0 WME_AC_BE
  51. * 100000 5 WME_AC_VI
  52. * 101000 5 WME_AC_VI
  53. * 110000 6 WME_AC_VO
  54. * 111000 6 WME_AC_VO
  55. */
  56. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  57. 0, 0, 0, 0, 0, 0, 0, 0,
  58. 1, 1, 1, 1, 1, 1, 1, 1,
  59. 1, 1, 1, 1, 1, 1, 1, 1,
  60. 0, 0, 0, 0, 0, 0, 0, 0,
  61. 5, 5, 5, 5, 5, 5, 5, 5,
  62. 5, 5, 5, 5, 5, 5, 5, 5,
  63. 6, 6, 6, 6, 6, 6, 6, 6,
  64. 6, 6, 6, 6, 6, 6, 6, 6,
  65. };
  66. /**
  67. * @brief Select the type of statistics
  68. */
  69. enum dp_stats_type {
  70. STATS_FW = 0,
  71. STATS_HOST = 1,
  72. STATS_TYPE_MAX = 2,
  73. };
  74. /**
  75. * @brief General Firmware statistics options
  76. *
  77. */
  78. enum dp_fw_stats {
  79. TXRX_FW_STATS_INVALID = -1,
  80. };
  81. /**
  82. * @brief Firmware and Host statistics
  83. * currently supported
  84. */
  85. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  86. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  87. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  88. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  89. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  90. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  91. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  92. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  93. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  94. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  95. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  96. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  97. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  98. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  99. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  100. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  101. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  102. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  103. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  104. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  105. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  106. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  107. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  108. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  109. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  110. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  111. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  112. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  113. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  114. };
  115. /**
  116. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  117. */
  118. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  119. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  120. {
  121. void *hal_soc = soc->hal_soc;
  122. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  123. /* TODO: See if we should get align size from hal */
  124. uint32_t ring_base_align = 8;
  125. struct hal_srng_params ring_params;
  126. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  127. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  128. srng->hal_srng = NULL;
  129. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  130. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  131. soc->osdev, soc->osdev->dev, srng->alloc_size,
  132. &(srng->base_paddr_unaligned));
  133. if (!srng->base_vaddr_unaligned) {
  134. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  135. FL("alloc failed - ring_type: %d, ring_num %d"),
  136. ring_type, ring_num);
  137. return QDF_STATUS_E_NOMEM;
  138. }
  139. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  140. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  141. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  142. ((unsigned long)(ring_params.ring_base_vaddr) -
  143. (unsigned long)srng->base_vaddr_unaligned);
  144. ring_params.num_entries = num_entries;
  145. /* TODO: Check MSI support and get MSI settings from HIF layer */
  146. ring_params.msi_data = 0;
  147. ring_params.msi_addr = 0;
  148. /* TODO: Setup interrupt timer and batch counter thresholds for
  149. * interrupt mitigation based on ring type
  150. */
  151. ring_params.intr_timer_thres_us = 8;
  152. ring_params.intr_batch_cntr_thres_entries = 1;
  153. /* TODO: Currently hal layer takes care of endianness related settings.
  154. * See if these settings need to passed from DP layer
  155. */
  156. ring_params.flags = 0;
  157. /* Enable low threshold interrupts for rx buffer rings (regular and
  158. * monitor buffer rings.
  159. * TODO: See if this is required for any other ring
  160. */
  161. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  162. /* TODO: Setting low threshold to 1/8th of ring size
  163. * see if this needs to be configurable
  164. */
  165. ring_params.low_threshold = num_entries >> 3;
  166. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  167. }
  168. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  169. mac_id, &ring_params);
  170. return 0;
  171. }
  172. /**
  173. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  174. * Any buffers allocated and attached to ring entries are expected to be freed
  175. * before calling this function.
  176. */
  177. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  178. int ring_type, int ring_num)
  179. {
  180. if (!srng->hal_srng) {
  181. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  182. FL("Ring type: %d, num:%d not setup"),
  183. ring_type, ring_num);
  184. return;
  185. }
  186. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  187. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  188. srng->alloc_size,
  189. srng->base_vaddr_unaligned,
  190. srng->base_paddr_unaligned, 0);
  191. }
  192. /* TODO: Need this interface from HIF */
  193. void *hif_get_hal_handle(void *hif_handle);
  194. /*
  195. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  196. * @dp_ctx: DP SOC handle
  197. * @budget: Number of frames/descriptors that can be processed in one shot
  198. *
  199. * Return: remaining budget/quota for the soc device
  200. */
  201. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  202. {
  203. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  204. struct dp_soc *soc = int_ctx->soc;
  205. int ring = 0;
  206. uint32_t work_done = 0;
  207. uint32_t budget = dp_budget;
  208. uint8_t tx_mask = int_ctx->tx_ring_mask;
  209. uint8_t rx_mask = int_ctx->rx_ring_mask;
  210. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  211. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  212. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  213. /* Process Tx completion interrupts first to return back buffers */
  214. if (tx_mask) {
  215. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  216. if (tx_mask & (1 << ring)) {
  217. work_done =
  218. dp_tx_comp_handler(soc, ring, budget);
  219. budget -= work_done;
  220. if (work_done)
  221. QDF_TRACE(QDF_MODULE_ID_DP,
  222. QDF_TRACE_LEVEL_INFO,
  223. "tx mask 0x%x ring %d,"
  224. "budget %d",
  225. tx_mask, ring, budget);
  226. if (budget <= 0)
  227. goto budget_done;
  228. }
  229. }
  230. }
  231. /* Process REO Exception ring interrupt */
  232. if (rx_err_mask) {
  233. work_done = dp_rx_err_process(soc,
  234. soc->reo_exception_ring.hal_srng, budget);
  235. budget -= work_done;
  236. if (work_done)
  237. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  238. "REO Exception Ring: work_done %d budget %d",
  239. work_done, budget);
  240. if (budget <= 0) {
  241. goto budget_done;
  242. }
  243. }
  244. /* Process Rx WBM release ring interrupt */
  245. if (rx_wbm_rel_mask) {
  246. work_done = dp_rx_wbm_err_process(soc,
  247. soc->rx_rel_ring.hal_srng, budget);
  248. budget -= work_done;
  249. if (work_done)
  250. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  251. "WBM Release Ring: work_done %d budget %d",
  252. work_done, budget);
  253. if (budget <= 0) {
  254. goto budget_done;
  255. }
  256. }
  257. /* Process Rx interrupts */
  258. if (rx_mask) {
  259. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  260. if (rx_mask & (1 << ring)) {
  261. work_done =
  262. dp_rx_process(int_ctx,
  263. soc->reo_dest_ring[ring].hal_srng,
  264. budget);
  265. budget -= work_done;
  266. if (work_done)
  267. QDF_TRACE(QDF_MODULE_ID_DP,
  268. QDF_TRACE_LEVEL_INFO,
  269. "rx mask 0x%x ring %d,"
  270. "budget %d",
  271. tx_mask, ring, budget);
  272. if (budget <= 0)
  273. goto budget_done;
  274. }
  275. }
  276. }
  277. if (reo_status_mask)
  278. dp_reo_status_ring_handler(soc);
  279. /* Process Rx monitor interrupts */
  280. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  281. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  282. work_done =
  283. dp_mon_process(soc, ring, budget);
  284. budget -= work_done;
  285. }
  286. }
  287. qdf_lro_flush(int_ctx->lro_ctx);
  288. budget_done:
  289. return dp_budget - budget;
  290. }
  291. /* dp_interrupt_timer()- timer poll for interrupts
  292. *
  293. * @arg: SoC Handle
  294. *
  295. * Return:
  296. *
  297. */
  298. #ifdef DP_INTR_POLL_BASED
  299. static void dp_interrupt_timer(void *arg)
  300. {
  301. struct dp_soc *soc = (struct dp_soc *) arg;
  302. int i;
  303. if (qdf_atomic_read(&soc->cmn_init_done)) {
  304. for (i = 0;
  305. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  306. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  307. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  308. }
  309. }
  310. /*
  311. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  312. * @txrx_soc: DP SOC handle
  313. *
  314. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  315. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  316. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  317. *
  318. * Return: 0 for success. nonzero for failure.
  319. */
  320. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  321. {
  322. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  323. int i;
  324. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  325. soc->intr_ctx[i].tx_ring_mask = 0xF;
  326. soc->intr_ctx[i].rx_ring_mask = 0xF;
  327. soc->intr_ctx[i].rx_mon_ring_mask = 0x1;
  328. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  329. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  330. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  331. soc->intr_ctx[i].soc = soc;
  332. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  333. }
  334. qdf_timer_init(soc->osdev, &soc->int_timer,
  335. dp_interrupt_timer, (void *)soc,
  336. QDF_TIMER_TYPE_WAKE_APPS);
  337. return QDF_STATUS_SUCCESS;
  338. }
  339. /*
  340. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  341. * @txrx_soc: DP SOC handle
  342. *
  343. * Return: void
  344. */
  345. static void dp_soc_interrupt_detach(void *txrx_soc)
  346. {
  347. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  348. qdf_timer_stop(&soc->int_timer);
  349. qdf_timer_free(&soc->int_timer);
  350. }
  351. #else
  352. /*
  353. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  354. * @txrx_soc: DP SOC handle
  355. *
  356. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  357. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  358. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  359. *
  360. * Return: 0 for success. nonzero for failure.
  361. */
  362. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  363. {
  364. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  365. int i = 0;
  366. int num_irq = 0;
  367. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  368. int j = 0;
  369. int ret = 0;
  370. /* Map of IRQ ids registered with one interrupt context */
  371. int irq_id_map[HIF_MAX_GRP_IRQ];
  372. int tx_mask =
  373. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  374. int rx_mask =
  375. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  376. int rx_mon_mask =
  377. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  378. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  379. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  380. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  381. soc->intr_ctx[i].soc = soc;
  382. num_irq = 0;
  383. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  384. if (tx_mask & (1 << j)) {
  385. irq_id_map[num_irq++] =
  386. (wbm2host_tx_completions_ring1 - j);
  387. }
  388. if (rx_mask & (1 << j)) {
  389. irq_id_map[num_irq++] =
  390. (reo2host_destination_ring1 - j);
  391. }
  392. if (rx_mon_mask & (1 << j)) {
  393. irq_id_map[num_irq++] =
  394. (rxdma2host_monitor_destination_mac1
  395. - j);
  396. }
  397. }
  398. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  399. num_irq, irq_id_map,
  400. dp_service_srngs,
  401. &soc->intr_ctx[i]);
  402. if (ret) {
  403. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  404. FL("failed, ret = %d"), ret);
  405. return QDF_STATUS_E_FAILURE;
  406. }
  407. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  408. }
  409. hif_configure_ext_group_interrupts(soc->hif_handle);
  410. return QDF_STATUS_SUCCESS;
  411. }
  412. /*
  413. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  414. * @txrx_soc: DP SOC handle
  415. *
  416. * Return: void
  417. */
  418. static void dp_soc_interrupt_detach(void *txrx_soc)
  419. {
  420. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  421. int i;
  422. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  423. soc->intr_ctx[i].tx_ring_mask = 0;
  424. soc->intr_ctx[i].rx_ring_mask = 0;
  425. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  426. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  427. }
  428. }
  429. #endif
  430. #define AVG_MAX_MPDUS_PER_TID 128
  431. #define AVG_TIDS_PER_CLIENT 2
  432. #define AVG_FLOWS_PER_TID 2
  433. #define AVG_MSDUS_PER_FLOW 128
  434. #define AVG_MSDUS_PER_MPDU 4
  435. /*
  436. * Allocate and setup link descriptor pool that will be used by HW for
  437. * various link and queue descriptors and managed by WBM
  438. */
  439. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  440. {
  441. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  442. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  443. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  444. uint32_t num_mpdus_per_link_desc =
  445. hal_num_mpdus_per_link_desc(soc->hal_soc);
  446. uint32_t num_msdus_per_link_desc =
  447. hal_num_msdus_per_link_desc(soc->hal_soc);
  448. uint32_t num_mpdu_links_per_queue_desc =
  449. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  450. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  451. uint32_t total_link_descs, total_mem_size;
  452. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  453. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  454. uint32_t num_link_desc_banks;
  455. uint32_t last_bank_size = 0;
  456. uint32_t entry_size, num_entries;
  457. int i;
  458. /* Only Tx queue descriptors are allocated from common link descriptor
  459. * pool Rx queue descriptors are not included in this because (REO queue
  460. * extension descriptors) they are expected to be allocated contiguously
  461. * with REO queue descriptors
  462. */
  463. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  464. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  465. num_mpdu_queue_descs = num_mpdu_link_descs /
  466. num_mpdu_links_per_queue_desc;
  467. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  468. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  469. num_msdus_per_link_desc;
  470. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  471. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  472. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  473. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  474. /* Round up to power of 2 */
  475. total_link_descs = 1;
  476. while (total_link_descs < num_entries)
  477. total_link_descs <<= 1;
  478. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  479. FL("total_link_descs: %u, link_desc_size: %d"),
  480. total_link_descs, link_desc_size);
  481. total_mem_size = total_link_descs * link_desc_size;
  482. total_mem_size += link_desc_align;
  483. if (total_mem_size <= max_alloc_size) {
  484. num_link_desc_banks = 0;
  485. last_bank_size = total_mem_size;
  486. } else {
  487. num_link_desc_banks = (total_mem_size) /
  488. (max_alloc_size - link_desc_align);
  489. last_bank_size = total_mem_size %
  490. (max_alloc_size - link_desc_align);
  491. }
  492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  493. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  494. total_mem_size, num_link_desc_banks);
  495. for (i = 0; i < num_link_desc_banks; i++) {
  496. soc->link_desc_banks[i].base_vaddr_unaligned =
  497. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  498. max_alloc_size,
  499. &(soc->link_desc_banks[i].base_paddr_unaligned));
  500. soc->link_desc_banks[i].size = max_alloc_size;
  501. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  502. soc->link_desc_banks[i].base_vaddr_unaligned) +
  503. ((unsigned long)(
  504. soc->link_desc_banks[i].base_vaddr_unaligned) %
  505. link_desc_align));
  506. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  507. soc->link_desc_banks[i].base_paddr_unaligned) +
  508. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  509. (unsigned long)(
  510. soc->link_desc_banks[i].base_vaddr_unaligned));
  511. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  512. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  513. FL("Link descriptor memory alloc failed"));
  514. goto fail;
  515. }
  516. }
  517. if (last_bank_size) {
  518. /* Allocate last bank in case total memory required is not exact
  519. * multiple of max_alloc_size
  520. */
  521. soc->link_desc_banks[i].base_vaddr_unaligned =
  522. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  523. last_bank_size,
  524. &(soc->link_desc_banks[i].base_paddr_unaligned));
  525. soc->link_desc_banks[i].size = last_bank_size;
  526. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  527. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  528. ((unsigned long)(
  529. soc->link_desc_banks[i].base_vaddr_unaligned) %
  530. link_desc_align));
  531. soc->link_desc_banks[i].base_paddr =
  532. (unsigned long)(
  533. soc->link_desc_banks[i].base_paddr_unaligned) +
  534. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  535. (unsigned long)(
  536. soc->link_desc_banks[i].base_vaddr_unaligned));
  537. }
  538. /* Allocate and setup link descriptor idle list for HW internal use */
  539. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  540. total_mem_size = entry_size * total_link_descs;
  541. if (total_mem_size <= max_alloc_size) {
  542. void *desc;
  543. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  544. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  546. FL("Link desc idle ring setup failed"));
  547. goto fail;
  548. }
  549. hal_srng_access_start_unlocked(soc->hal_soc,
  550. soc->wbm_idle_link_ring.hal_srng);
  551. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  552. soc->link_desc_banks[i].base_paddr; i++) {
  553. uint32_t num_entries = (soc->link_desc_banks[i].size -
  554. (unsigned long)(
  555. soc->link_desc_banks[i].base_vaddr) -
  556. (unsigned long)(
  557. soc->link_desc_banks[i].base_vaddr_unaligned))
  558. / link_desc_size;
  559. unsigned long paddr = (unsigned long)(
  560. soc->link_desc_banks[i].base_paddr);
  561. while (num_entries && (desc = hal_srng_src_get_next(
  562. soc->hal_soc,
  563. soc->wbm_idle_link_ring.hal_srng))) {
  564. hal_set_link_desc_addr(desc, i, paddr);
  565. num_entries--;
  566. paddr += link_desc_size;
  567. }
  568. }
  569. hal_srng_access_end_unlocked(soc->hal_soc,
  570. soc->wbm_idle_link_ring.hal_srng);
  571. } else {
  572. uint32_t num_scatter_bufs;
  573. uint32_t num_entries_per_buf;
  574. uint32_t rem_entries;
  575. uint8_t *scatter_buf_ptr;
  576. uint16_t scatter_buf_num;
  577. soc->wbm_idle_scatter_buf_size =
  578. hal_idle_list_scatter_buf_size(soc->hal_soc);
  579. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  580. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  581. num_scatter_bufs = (total_mem_size /
  582. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  583. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  584. for (i = 0; i < num_scatter_bufs; i++) {
  585. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  586. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  587. soc->wbm_idle_scatter_buf_size,
  588. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  589. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  590. QDF_TRACE(QDF_MODULE_ID_DP,
  591. QDF_TRACE_LEVEL_ERROR,
  592. FL("Scatter list memory alloc failed"));
  593. goto fail;
  594. }
  595. }
  596. /* Populate idle list scatter buffers with link descriptor
  597. * pointers
  598. */
  599. scatter_buf_num = 0;
  600. scatter_buf_ptr = (uint8_t *)(
  601. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  602. rem_entries = num_entries_per_buf;
  603. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  604. soc->link_desc_banks[i].base_paddr; i++) {
  605. uint32_t num_link_descs =
  606. (soc->link_desc_banks[i].size -
  607. (unsigned long)(
  608. soc->link_desc_banks[i].base_vaddr) -
  609. (unsigned long)(
  610. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  611. link_desc_size;
  612. unsigned long paddr = (unsigned long)(
  613. soc->link_desc_banks[i].base_paddr);
  614. void *desc = NULL;
  615. while (num_link_descs && (desc =
  616. hal_srng_src_get_next(soc->hal_soc,
  617. soc->wbm_idle_link_ring.hal_srng))) {
  618. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  619. i, paddr);
  620. num_link_descs--;
  621. paddr += link_desc_size;
  622. if (rem_entries) {
  623. rem_entries--;
  624. scatter_buf_ptr += link_desc_size;
  625. } else {
  626. rem_entries = num_entries_per_buf;
  627. scatter_buf_num++;
  628. scatter_buf_ptr = (uint8_t *)(
  629. soc->wbm_idle_scatter_buf_base_vaddr[
  630. scatter_buf_num]);
  631. }
  632. }
  633. }
  634. /* Setup link descriptor idle list in HW */
  635. hal_setup_link_idle_list(soc->hal_soc,
  636. soc->wbm_idle_scatter_buf_base_paddr,
  637. soc->wbm_idle_scatter_buf_base_vaddr,
  638. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  639. (uint32_t)(scatter_buf_ptr -
  640. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  641. scatter_buf_num])));
  642. }
  643. return 0;
  644. fail:
  645. if (soc->wbm_idle_link_ring.hal_srng) {
  646. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  647. WBM_IDLE_LINK, 0);
  648. }
  649. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  650. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  651. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  652. soc->wbm_idle_scatter_buf_size,
  653. soc->wbm_idle_scatter_buf_base_vaddr[i],
  654. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  655. }
  656. }
  657. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  658. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  659. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  660. soc->link_desc_banks[i].size,
  661. soc->link_desc_banks[i].base_vaddr_unaligned,
  662. soc->link_desc_banks[i].base_paddr_unaligned,
  663. 0);
  664. }
  665. }
  666. return QDF_STATUS_E_FAILURE;
  667. }
  668. #ifdef notused
  669. /*
  670. * Free link descriptor pool that was setup HW
  671. */
  672. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  673. {
  674. int i;
  675. if (soc->wbm_idle_link_ring.hal_srng) {
  676. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  677. WBM_IDLE_LINK, 0);
  678. }
  679. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  680. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  681. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  682. soc->wbm_idle_scatter_buf_size,
  683. soc->wbm_idle_scatter_buf_base_vaddr[i],
  684. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  685. }
  686. }
  687. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  688. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  689. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  690. soc->link_desc_banks[i].size,
  691. soc->link_desc_banks[i].base_vaddr_unaligned,
  692. soc->link_desc_banks[i].base_paddr_unaligned,
  693. 0);
  694. }
  695. }
  696. }
  697. #endif /* notused */
  698. /* TODO: Following should be configurable */
  699. #define WBM_RELEASE_RING_SIZE 64
  700. #define TCL_DATA_RING_SIZE 512
  701. #define TX_COMP_RING_SIZE 1024
  702. #define TCL_CMD_RING_SIZE 32
  703. #define TCL_STATUS_RING_SIZE 32
  704. #define REO_DST_RING_SIZE 2048
  705. #define REO_REINJECT_RING_SIZE 32
  706. #define RX_RELEASE_RING_SIZE 1024
  707. #define REO_EXCEPTION_RING_SIZE 128
  708. #define REO_CMD_RING_SIZE 32
  709. #define REO_STATUS_RING_SIZE 32
  710. #define RXDMA_BUF_RING_SIZE 1024
  711. #define RXDMA_REFILL_RING_SIZE 2048
  712. #define RXDMA_MONITOR_BUF_RING_SIZE 1024
  713. #define RXDMA_MONITOR_DST_RING_SIZE 1024
  714. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  715. #define RXDMA_MONITOR_DESC_RING_SIZE 1024
  716. /*
  717. * dp_soc_cmn_setup() - Common SoC level initializion
  718. * @soc: Datapath SOC handle
  719. *
  720. * This is an internal function used to setup common SOC data structures,
  721. * to be called from PDEV attach after receiving HW mode capabilities from FW
  722. */
  723. static int dp_soc_cmn_setup(struct dp_soc *soc)
  724. {
  725. int i;
  726. struct hal_reo_params reo_params;
  727. if (qdf_atomic_read(&soc->cmn_init_done))
  728. return 0;
  729. if (dp_peer_find_attach(soc))
  730. goto fail0;
  731. if (dp_hw_link_desc_pool_setup(soc))
  732. goto fail1;
  733. /* Setup SRNG rings */
  734. /* Common rings */
  735. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  736. WBM_RELEASE_RING_SIZE)) {
  737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  738. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  739. goto fail1;
  740. }
  741. soc->num_tcl_data_rings = 0;
  742. /* Tx data rings */
  743. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  744. soc->num_tcl_data_rings =
  745. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  746. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  747. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  748. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  749. QDF_TRACE(QDF_MODULE_ID_DP,
  750. QDF_TRACE_LEVEL_ERROR,
  751. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  752. goto fail1;
  753. }
  754. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  755. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  756. QDF_TRACE(QDF_MODULE_ID_DP,
  757. QDF_TRACE_LEVEL_ERROR,
  758. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  759. goto fail1;
  760. }
  761. }
  762. } else {
  763. /* This will be incremented during per pdev ring setup */
  764. soc->num_tcl_data_rings = 0;
  765. }
  766. if (dp_tx_soc_attach(soc)) {
  767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  768. FL("dp_tx_soc_attach failed"));
  769. goto fail1;
  770. }
  771. /* TCL command and status rings */
  772. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  773. TCL_CMD_RING_SIZE)) {
  774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  775. FL("dp_srng_setup failed for tcl_cmd_ring"));
  776. goto fail1;
  777. }
  778. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  779. TCL_STATUS_RING_SIZE)) {
  780. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  781. FL("dp_srng_setup failed for tcl_status_ring"));
  782. goto fail1;
  783. }
  784. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  785. * descriptors
  786. */
  787. /* Rx data rings */
  788. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  789. soc->num_reo_dest_rings =
  790. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  791. QDF_TRACE(QDF_MODULE_ID_DP,
  792. QDF_TRACE_LEVEL_ERROR,
  793. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  794. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  795. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  796. i, 0, REO_DST_RING_SIZE)) {
  797. QDF_TRACE(QDF_MODULE_ID_DP,
  798. QDF_TRACE_LEVEL_ERROR,
  799. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  800. goto fail1;
  801. }
  802. }
  803. } else {
  804. /* This will be incremented during per pdev ring setup */
  805. soc->num_reo_dest_rings = 0;
  806. }
  807. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  808. /* REO reinjection ring */
  809. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  810. REO_REINJECT_RING_SIZE)) {
  811. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  812. FL("dp_srng_setup failed for reo_reinject_ring"));
  813. goto fail1;
  814. }
  815. /* Rx release ring */
  816. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  817. RX_RELEASE_RING_SIZE)) {
  818. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  819. FL("dp_srng_setup failed for rx_rel_ring"));
  820. goto fail1;
  821. }
  822. /* Rx exception ring */
  823. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  824. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  826. FL("dp_srng_setup failed for reo_exception_ring"));
  827. goto fail1;
  828. }
  829. /* REO command and status rings */
  830. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  831. REO_CMD_RING_SIZE)) {
  832. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  833. FL("dp_srng_setup failed for reo_cmd_ring"));
  834. goto fail1;
  835. }
  836. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  837. TAILQ_INIT(&soc->rx.reo_cmd_list);
  838. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  839. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  840. REO_STATUS_RING_SIZE)) {
  841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  842. FL("dp_srng_setup failed for reo_status_ring"));
  843. goto fail1;
  844. }
  845. dp_soc_interrupt_attach(soc);
  846. /* Setup HW REO */
  847. qdf_mem_zero(&reo_params, sizeof(reo_params));
  848. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  849. reo_params.rx_hash_enabled = true;
  850. hal_reo_setup(soc->hal_soc, &reo_params);
  851. qdf_atomic_set(&soc->cmn_init_done, 1);
  852. return 0;
  853. fail1:
  854. /*
  855. * Cleanup will be done as part of soc_detach, which will
  856. * be called on pdev attach failure
  857. */
  858. fail0:
  859. return QDF_STATUS_E_FAILURE;
  860. }
  861. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  862. static void dp_lro_hash_setup(struct dp_soc *soc)
  863. {
  864. struct cdp_lro_hash_config lro_hash;
  865. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  866. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  867. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  868. FL("LRO disabled RX hash disabled"));
  869. return;
  870. }
  871. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  872. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  873. lro_hash.lro_enable = 1;
  874. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  875. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  876. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  877. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  878. }
  879. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  880. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  881. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  882. LRO_IPV4_SEED_ARR_SZ));
  883. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  884. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  885. LRO_IPV6_SEED_ARR_SZ));
  886. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  887. "lro_hash: lro_enable: 0x%x"
  888. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  889. lro_hash.lro_enable, lro_hash.tcp_flag,
  890. lro_hash.tcp_flag_mask);
  891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  892. FL("lro_hash: toeplitz_hash_ipv4:"));
  893. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  894. QDF_TRACE_LEVEL_ERROR,
  895. (void *)lro_hash.toeplitz_hash_ipv4,
  896. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  897. LRO_IPV4_SEED_ARR_SZ));
  898. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  899. FL("lro_hash: toeplitz_hash_ipv6:"));
  900. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  901. QDF_TRACE_LEVEL_ERROR,
  902. (void *)lro_hash.toeplitz_hash_ipv6,
  903. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  904. LRO_IPV6_SEED_ARR_SZ));
  905. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  906. if (soc->cdp_soc.ol_ops->lro_hash_config)
  907. (void)soc->cdp_soc.ol_ops->lro_hash_config
  908. (soc->osif_soc, &lro_hash);
  909. }
  910. /*
  911. * dp_rxdma_ring_setup() - configure the RX DMA rings
  912. * @soc: data path SoC handle
  913. * @pdev: Physical device handle
  914. *
  915. * Return: 0 - success, > 0 - failure
  916. */
  917. #ifdef QCA_HOST2FW_RXBUF_RING
  918. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  919. struct dp_pdev *pdev)
  920. {
  921. int max_mac_rings =
  922. wlan_cfg_get_num_mac_rings
  923. (pdev->wlan_cfg_ctx);
  924. int i;
  925. for (i = 0; i < max_mac_rings; i++) {
  926. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  927. "%s: pdev_id %d mac_id %d\n",
  928. __func__, pdev->pdev_id, i);
  929. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  930. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  931. QDF_TRACE(QDF_MODULE_ID_DP,
  932. QDF_TRACE_LEVEL_ERROR,
  933. FL("failed rx mac ring setup"));
  934. return QDF_STATUS_E_FAILURE;
  935. }
  936. }
  937. return QDF_STATUS_SUCCESS;
  938. }
  939. #else
  940. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  941. struct dp_pdev *pdev)
  942. {
  943. return QDF_STATUS_SUCCESS;
  944. }
  945. #endif
  946. /**
  947. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  948. * @pdev - DP_PDEV handle
  949. *
  950. * Return: void
  951. */
  952. static inline void
  953. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  954. {
  955. uint8_t map_id;
  956. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  957. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  958. sizeof(default_dscp_tid_map));
  959. }
  960. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  961. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  962. pdev->dscp_tid_map[map_id],
  963. map_id);
  964. }
  965. }
  966. /*
  967. * dp_pdev_attach_wifi3() - attach txrx pdev
  968. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  969. * @txrx_soc: Datapath SOC handle
  970. * @htc_handle: HTC handle for host-target interface
  971. * @qdf_osdev: QDF OS device
  972. * @pdev_id: PDEV ID
  973. *
  974. * Return: DP PDEV handle on success, NULL on failure
  975. */
  976. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  977. struct cdp_cfg *ctrl_pdev,
  978. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  979. {
  980. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  981. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  982. if (!pdev) {
  983. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  984. FL("DP PDEV memory allocation failed"));
  985. goto fail0;
  986. }
  987. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  988. if (!pdev->wlan_cfg_ctx) {
  989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  990. FL("pdev cfg_attach failed"));
  991. qdf_mem_free(pdev);
  992. goto fail0;
  993. }
  994. /*
  995. * set nss pdev config based on soc config
  996. */
  997. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  998. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev->pdev_id)));
  999. pdev->soc = soc;
  1000. pdev->osif_pdev = ctrl_pdev;
  1001. pdev->pdev_id = pdev_id;
  1002. soc->pdev_list[pdev_id] = pdev;
  1003. soc->pdev_count++;
  1004. TAILQ_INIT(&pdev->vdev_list);
  1005. pdev->vdev_count = 0;
  1006. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  1007. TAILQ_INIT(&pdev->neighbour_peers_list);
  1008. if (dp_soc_cmn_setup(soc)) {
  1009. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1010. FL("dp_soc_cmn_setup failed"));
  1011. goto fail1;
  1012. }
  1013. /* Setup per PDEV TCL rings if configured */
  1014. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1015. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1016. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1018. FL("dp_srng_setup failed for tcl_data_ring"));
  1019. goto fail1;
  1020. }
  1021. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1022. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1024. FL("dp_srng_setup failed for tx_comp_ring"));
  1025. goto fail1;
  1026. }
  1027. soc->num_tcl_data_rings++;
  1028. }
  1029. /* Tx specific init */
  1030. if (dp_tx_pdev_attach(pdev)) {
  1031. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1032. FL("dp_tx_pdev_attach failed"));
  1033. goto fail1;
  1034. }
  1035. /* Setup per PDEV REO rings if configured */
  1036. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1037. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1038. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1039. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1040. FL("dp_srng_setup failed for reo_dest_ringn"));
  1041. goto fail1;
  1042. }
  1043. soc->num_reo_dest_rings++;
  1044. }
  1045. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  1046. RXDMA_REFILL_RING_SIZE)) {
  1047. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1048. FL("dp_srng_setup failed rx refill ring"));
  1049. goto fail1;
  1050. }
  1051. if (dp_rxdma_ring_setup(soc, pdev)) {
  1052. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1053. FL("RXDMA ring config failed"));
  1054. goto fail1;
  1055. }
  1056. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  1057. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  1058. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1059. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  1060. goto fail1;
  1061. }
  1062. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  1063. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  1064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1065. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1066. goto fail1;
  1067. }
  1068. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  1069. RXDMA_MONITOR_STATUS, 0, pdev_id,
  1070. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  1071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1072. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  1073. goto fail1;
  1074. }
  1075. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  1076. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  1077. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1078. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  1079. goto fail1;
  1080. }
  1081. /* Rx specific init */
  1082. if (dp_rx_pdev_attach(pdev)) {
  1083. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1084. FL("dp_rx_pdev_attach failed "));
  1085. goto fail0;
  1086. }
  1087. DP_STATS_INIT(pdev);
  1088. #ifndef CONFIG_WIN
  1089. /* MCL */
  1090. dp_local_peer_id_pool_init(pdev);
  1091. #endif
  1092. dp_dscp_tid_map_setup(pdev);
  1093. /* Rx monitor mode specific init */
  1094. if (dp_rx_pdev_mon_attach(pdev)) {
  1095. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1096. "dp_rx_pdev_attach failed\n");
  1097. goto fail0;
  1098. }
  1099. /* set the reo destination to 1 during initialization */
  1100. pdev->reo_dest = 1;
  1101. return (struct cdp_pdev *)pdev;
  1102. fail1:
  1103. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  1104. fail0:
  1105. return NULL;
  1106. }
  1107. /*
  1108. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  1109. * @soc: data path SoC handle
  1110. * @pdev: Physical device handle
  1111. *
  1112. * Return: void
  1113. */
  1114. #ifdef QCA_HOST2FW_RXBUF_RING
  1115. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1116. struct dp_pdev *pdev)
  1117. {
  1118. int max_mac_rings =
  1119. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  1120. int i;
  1121. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  1122. max_mac_rings : MAX_RX_MAC_RINGS;
  1123. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  1124. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  1125. RXDMA_BUF, 1);
  1126. }
  1127. #else
  1128. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1129. struct dp_pdev *pdev)
  1130. {
  1131. }
  1132. #endif
  1133. /*
  1134. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  1135. * @pdev: device object
  1136. *
  1137. * Return: void
  1138. */
  1139. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  1140. {
  1141. struct dp_neighbour_peer *peer = NULL;
  1142. struct dp_neighbour_peer *temp_peer = NULL;
  1143. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  1144. neighbour_peer_list_elem, temp_peer) {
  1145. /* delete this peer from the list */
  1146. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1147. peer, neighbour_peer_list_elem);
  1148. qdf_mem_free(peer);
  1149. }
  1150. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  1151. }
  1152. /*
  1153. * dp_pdev_detach_wifi3() - detach txrx pdev
  1154. * @txrx_pdev: Datapath PDEV handle
  1155. * @force: Force detach
  1156. *
  1157. */
  1158. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1159. {
  1160. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1161. struct dp_soc *soc = pdev->soc;
  1162. dp_tx_pdev_detach(pdev);
  1163. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1164. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1165. TCL_DATA, pdev->pdev_id);
  1166. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1167. WBM2SW_RELEASE, pdev->pdev_id);
  1168. }
  1169. dp_rx_pdev_detach(pdev);
  1170. dp_rx_pdev_mon_detach(pdev);
  1171. dp_neighbour_peers_detach(pdev);
  1172. /* Setup per PDEV REO rings if configured */
  1173. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1174. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1175. REO_DST, pdev->pdev_id);
  1176. }
  1177. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1178. dp_rxdma_ring_cleanup(soc, pdev);
  1179. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1180. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1181. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1182. RXDMA_MONITOR_STATUS, 0);
  1183. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  1184. RXDMA_MONITOR_DESC, 0);
  1185. soc->pdev_list[pdev->pdev_id] = NULL;
  1186. soc->pdev_count--;
  1187. qdf_mem_free(pdev);
  1188. }
  1189. /*
  1190. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1191. * @soc: DP SOC handle
  1192. */
  1193. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1194. {
  1195. struct reo_desc_list_node *desc;
  1196. struct dp_rx_tid *rx_tid;
  1197. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1198. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1199. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1200. rx_tid = &desc->rx_tid;
  1201. qdf_mem_unmap_nbytes_single(soc->osdev,
  1202. rx_tid->hw_qdesc_paddr,
  1203. QDF_DMA_BIDIRECTIONAL,
  1204. rx_tid->hw_qdesc_alloc_size);
  1205. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1206. qdf_mem_free(desc);
  1207. }
  1208. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1209. qdf_list_destroy(&soc->reo_desc_freelist);
  1210. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1211. }
  1212. /*
  1213. * dp_soc_detach_wifi3() - Detach txrx SOC
  1214. * @txrx_soc: DP SOC handle
  1215. *
  1216. */
  1217. static void dp_soc_detach_wifi3(void *txrx_soc)
  1218. {
  1219. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1220. int i;
  1221. qdf_atomic_set(&soc->cmn_init_done, 0);
  1222. dp_soc_interrupt_detach(soc);
  1223. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1224. if (soc->pdev_list[i])
  1225. dp_pdev_detach_wifi3(
  1226. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1227. }
  1228. dp_peer_find_detach(soc);
  1229. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1230. * SW descriptors
  1231. */
  1232. /* Free the ring memories */
  1233. /* Common rings */
  1234. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1235. /* Tx data rings */
  1236. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1237. dp_tx_soc_detach(soc);
  1238. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1239. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1240. TCL_DATA, i);
  1241. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1242. WBM2SW_RELEASE, i);
  1243. }
  1244. }
  1245. /* TCL command and status rings */
  1246. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1247. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1248. /* Rx data rings */
  1249. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1250. soc->num_reo_dest_rings =
  1251. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1252. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1253. /* TODO: Get number of rings and ring sizes
  1254. * from wlan_cfg
  1255. */
  1256. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1257. REO_DST, i);
  1258. }
  1259. }
  1260. /* REO reinjection ring */
  1261. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1262. /* Rx release ring */
  1263. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1264. /* Rx exception ring */
  1265. /* TODO: Better to store ring_type and ring_num in
  1266. * dp_srng during setup
  1267. */
  1268. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1269. /* REO command and status rings */
  1270. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1271. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1272. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1273. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1274. htt_soc_detach(soc->htt_handle);
  1275. dp_reo_desc_freelist_destroy(soc);
  1276. qdf_mem_free(soc);
  1277. }
  1278. /*
  1279. * dp_rxdma_ring_config() - configure the RX DMA rings
  1280. *
  1281. * This function is used to configure the MAC rings.
  1282. * On MCL host provides buffers in Host2FW ring
  1283. * FW refills (copies) buffers to the ring and updates
  1284. * ring_idx in register
  1285. *
  1286. * @soc: data path SoC handle
  1287. * @pdev: Physical device handle
  1288. *
  1289. * Return: void
  1290. */
  1291. #ifdef QCA_HOST2FW_RXBUF_RING
  1292. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1293. {
  1294. int i;
  1295. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1296. struct dp_pdev *pdev = soc->pdev_list[i];
  1297. if (pdev) {
  1298. int mac_id = 0;
  1299. int j;
  1300. bool dbs_enable = 0;
  1301. int max_mac_rings =
  1302. wlan_cfg_get_num_mac_rings
  1303. (pdev->wlan_cfg_ctx);
  1304. htt_srng_setup(soc->htt_handle, 0,
  1305. pdev->rx_refill_buf_ring.hal_srng,
  1306. RXDMA_BUF);
  1307. if (soc->cdp_soc.ol_ops->
  1308. is_hw_dbs_2x2_capable) {
  1309. dbs_enable = soc->cdp_soc.ol_ops->
  1310. is_hw_dbs_2x2_capable(soc->psoc);
  1311. }
  1312. if (dbs_enable) {
  1313. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1314. QDF_TRACE_LEVEL_ERROR,
  1315. FL("DBS enabled max_mac_rings %d\n"),
  1316. max_mac_rings);
  1317. } else {
  1318. max_mac_rings = 1;
  1319. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1320. QDF_TRACE_LEVEL_ERROR,
  1321. FL("DBS disabled, max_mac_rings %d\n"),
  1322. max_mac_rings);
  1323. }
  1324. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1325. FL("pdev_id %d max_mac_rings %d\n"),
  1326. pdev->pdev_id, max_mac_rings);
  1327. for (j = 0; j < max_mac_rings; j++) {
  1328. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1329. QDF_TRACE_LEVEL_ERROR,
  1330. FL("mac_id %d\n"), mac_id);
  1331. htt_srng_setup(soc->htt_handle, mac_id,
  1332. pdev->rx_mac_buf_ring[j]
  1333. .hal_srng,
  1334. RXDMA_BUF);
  1335. mac_id++;
  1336. }
  1337. }
  1338. }
  1339. }
  1340. #else
  1341. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1342. {
  1343. int i;
  1344. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1345. struct dp_pdev *pdev = soc->pdev_list[i];
  1346. if (pdev) {
  1347. htt_srng_setup(soc->htt_handle, i,
  1348. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1349. htt_srng_setup(soc->htt_handle, i,
  1350. pdev->rxdma_mon_buf_ring.hal_srng,
  1351. RXDMA_MONITOR_BUF);
  1352. htt_srng_setup(soc->htt_handle, i,
  1353. pdev->rxdma_mon_dst_ring.hal_srng,
  1354. RXDMA_MONITOR_DST);
  1355. htt_srng_setup(soc->htt_handle, i,
  1356. pdev->rxdma_mon_status_ring.hal_srng,
  1357. RXDMA_MONITOR_STATUS);
  1358. htt_srng_setup(soc->htt_handle, i,
  1359. pdev->rxdma_mon_desc_ring.hal_srng,
  1360. RXDMA_MONITOR_DESC);
  1361. }
  1362. }
  1363. }
  1364. #endif
  1365. /*
  1366. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1367. * @txrx_soc: Datapath SOC handle
  1368. */
  1369. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1370. {
  1371. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1372. htt_soc_attach_target(soc->htt_handle);
  1373. dp_rxdma_ring_config(soc);
  1374. DP_STATS_INIT(soc);
  1375. return 0;
  1376. }
  1377. /*
  1378. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  1379. * @txrx_soc: Datapath SOC handle
  1380. */
  1381. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  1382. {
  1383. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1384. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  1385. }
  1386. /*
  1387. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  1388. * @txrx_soc: Datapath SOC handle
  1389. * @nss_cfg: nss config
  1390. */
  1391. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  1392. {
  1393. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1394. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  1395. if (config) {
  1396. /*
  1397. * disable dp interrupt if nss enabled
  1398. */
  1399. wlan_cfg_set_num_contexts(dsoc->wlan_cfg_ctx, 0);
  1400. }
  1401. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1402. FL("nss-wifi<0> nss config is enabled"));
  1403. }
  1404. /*
  1405. * dp_vdev_attach_wifi3() - attach txrx vdev
  1406. * @txrx_pdev: Datapath PDEV handle
  1407. * @vdev_mac_addr: MAC address of the virtual interface
  1408. * @vdev_id: VDEV Id
  1409. * @wlan_op_mode: VDEV operating mode
  1410. *
  1411. * Return: DP VDEV handle on success, NULL on failure
  1412. */
  1413. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1414. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1415. {
  1416. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1417. struct dp_soc *soc = pdev->soc;
  1418. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1419. if (!vdev) {
  1420. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1421. FL("DP VDEV memory allocation failed"));
  1422. goto fail0;
  1423. }
  1424. vdev->pdev = pdev;
  1425. vdev->vdev_id = vdev_id;
  1426. vdev->opmode = op_mode;
  1427. vdev->osdev = soc->osdev;
  1428. vdev->osif_rx = NULL;
  1429. vdev->osif_rsim_rx_decap = NULL;
  1430. vdev->osif_rx_mon = NULL;
  1431. vdev->osif_tx_free_ext = NULL;
  1432. vdev->osif_vdev = NULL;
  1433. vdev->delete.pending = 0;
  1434. vdev->safemode = 0;
  1435. vdev->drop_unenc = 1;
  1436. #ifdef notyet
  1437. vdev->filters_num = 0;
  1438. #endif
  1439. qdf_mem_copy(
  1440. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1441. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1442. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1443. vdev->dscp_tid_map_id = 0;
  1444. vdev->mcast_enhancement_en = 0;
  1445. /* TODO: Initialize default HTT meta data that will be used in
  1446. * TCL descriptors for packets transmitted from this VDEV
  1447. */
  1448. TAILQ_INIT(&vdev->peer_list);
  1449. /* add this vdev into the pdev's list */
  1450. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1451. pdev->vdev_count++;
  1452. dp_tx_vdev_attach(vdev);
  1453. #ifdef DP_INTR_POLL_BASED
  1454. if (wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  1455. if (pdev->vdev_count == 1)
  1456. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1457. }
  1458. #endif
  1459. dp_lro_hash_setup(soc);
  1460. /* LRO */
  1461. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1462. wlan_op_mode_sta == vdev->opmode)
  1463. vdev->lro_enable = true;
  1464. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1465. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  1466. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1467. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1468. DP_STATS_INIT(vdev);
  1469. return (struct cdp_vdev *)vdev;
  1470. fail0:
  1471. return NULL;
  1472. }
  1473. /**
  1474. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1475. * @vdev: Datapath VDEV handle
  1476. * @osif_vdev: OSIF vdev handle
  1477. * @txrx_ops: Tx and Rx operations
  1478. *
  1479. * Return: DP VDEV handle on success, NULL on failure
  1480. */
  1481. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1482. void *osif_vdev,
  1483. struct ol_txrx_ops *txrx_ops)
  1484. {
  1485. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1486. vdev->osif_vdev = osif_vdev;
  1487. vdev->osif_rx = txrx_ops->rx.rx;
  1488. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1489. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1490. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1491. #ifdef notyet
  1492. #if ATH_SUPPORT_WAPI
  1493. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1494. #endif
  1495. #endif
  1496. #ifdef UMAC_SUPPORT_PROXY_ARP
  1497. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1498. #endif
  1499. vdev->me_convert = txrx_ops->me_convert;
  1500. /* TODO: Enable the following once Tx code is integrated */
  1501. txrx_ops->tx.tx = dp_tx_send;
  1502. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1503. "DP Vdev Register success");
  1504. }
  1505. /*
  1506. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1507. * @txrx_vdev: Datapath VDEV handle
  1508. * @callback: Callback OL_IF on completion of detach
  1509. * @cb_context: Callback context
  1510. *
  1511. */
  1512. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1513. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1514. {
  1515. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1516. struct dp_pdev *pdev = vdev->pdev;
  1517. struct dp_soc *soc = pdev->soc;
  1518. /* preconditions */
  1519. qdf_assert(vdev);
  1520. /* remove the vdev from its parent pdev's list */
  1521. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1522. /*
  1523. * Use peer_ref_mutex while accessing peer_list, in case
  1524. * a peer is in the process of being removed from the list.
  1525. */
  1526. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1527. /* check that the vdev has no peers allocated */
  1528. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1529. /* debug print - will be removed later */
  1530. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1531. FL("not deleting vdev object %p (%pM)"
  1532. "until deletion finishes for all its peers"),
  1533. vdev, vdev->mac_addr.raw);
  1534. /* indicate that the vdev needs to be deleted */
  1535. vdev->delete.pending = 1;
  1536. vdev->delete.callback = callback;
  1537. vdev->delete.context = cb_context;
  1538. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1539. return;
  1540. }
  1541. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1542. dp_tx_vdev_detach(vdev);
  1543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1544. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1545. qdf_mem_free(vdev);
  1546. if (callback)
  1547. callback(cb_context);
  1548. }
  1549. /*
  1550. * dp_peer_create_wifi3() - attach txrx peer
  1551. * @txrx_vdev: Datapath VDEV handle
  1552. * @peer_mac_addr: Peer MAC address
  1553. *
  1554. * Return: DP peeer handle on success, NULL on failure
  1555. */
  1556. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1557. uint8_t *peer_mac_addr)
  1558. {
  1559. struct dp_peer *peer;
  1560. int i;
  1561. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1562. struct dp_pdev *pdev;
  1563. struct dp_soc *soc;
  1564. /* preconditions */
  1565. qdf_assert(vdev);
  1566. qdf_assert(peer_mac_addr);
  1567. pdev = vdev->pdev;
  1568. soc = pdev->soc;
  1569. #ifdef notyet
  1570. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1571. soc->mempool_ol_ath_peer);
  1572. #else
  1573. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1574. #endif
  1575. if (!peer)
  1576. return NULL; /* failure */
  1577. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1578. TAILQ_INIT(&peer->ast_entry_list);
  1579. qdf_mem_copy(&peer->self_ast_entry.mac_addr, peer_mac_addr,
  1580. DP_MAC_ADDR_LEN);
  1581. peer->self_ast_entry.peer = peer;
  1582. TAILQ_INSERT_TAIL(&peer->ast_entry_list, &peer->self_ast_entry,
  1583. ast_entry_elem);
  1584. qdf_spinlock_create(&peer->peer_info_lock);
  1585. /* store provided params */
  1586. peer->vdev = vdev;
  1587. qdf_mem_copy(
  1588. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1589. /* TODO: See of rx_opt_proc is really required */
  1590. peer->rx_opt_proc = soc->rx_opt_proc;
  1591. /* initialize the peer_id */
  1592. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1593. peer->peer_ids[i] = HTT_INVALID_PEER;
  1594. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1595. qdf_atomic_init(&peer->ref_cnt);
  1596. /* keep one reference for attach */
  1597. qdf_atomic_inc(&peer->ref_cnt);
  1598. /* add this peer into the vdev's list */
  1599. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1600. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1601. /* TODO: See if hash based search is required */
  1602. dp_peer_find_hash_add(soc, peer);
  1603. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1604. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1605. vdev, peer, peer->mac_addr.raw,
  1606. qdf_atomic_read(&peer->ref_cnt));
  1607. /*
  1608. * For every peer MAp message search and set if bss_peer
  1609. */
  1610. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1611. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1612. "vdev bss_peer!!!!");
  1613. peer->bss_peer = 1;
  1614. vdev->vap_bss_peer = peer;
  1615. }
  1616. #ifndef CONFIG_WIN
  1617. dp_local_peer_id_alloc(pdev, peer);
  1618. #endif
  1619. DP_STATS_INIT(peer);
  1620. return (void *)peer;
  1621. }
  1622. /*
  1623. * dp_peer_setup_wifi3() - initialize the peer
  1624. * @vdev_hdl: virtual device object
  1625. * @peer: Peer object
  1626. *
  1627. * Return: void
  1628. */
  1629. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1630. {
  1631. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1632. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1633. struct dp_pdev *pdev;
  1634. struct dp_soc *soc;
  1635. bool hash_based = 0;
  1636. enum cdp_host_reo_dest_ring reo_dest;
  1637. /* preconditions */
  1638. qdf_assert(vdev);
  1639. qdf_assert(peer);
  1640. pdev = vdev->pdev;
  1641. soc = pdev->soc;
  1642. dp_peer_rx_init(pdev, peer);
  1643. peer->last_assoc_rcvd = 0;
  1644. peer->last_disassoc_rcvd = 0;
  1645. peer->last_deauth_rcvd = 0;
  1646. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1648. FL("hash based steering %d\n"), hash_based);
  1649. if (!hash_based)
  1650. reo_dest = pdev->reo_dest;
  1651. else
  1652. reo_dest = 1;
  1653. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1654. /* TODO: Check the destination ring number to be passed to FW */
  1655. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1656. pdev->osif_pdev, peer->mac_addr.raw,
  1657. peer->vdev->vdev_id, hash_based, reo_dest);
  1658. }
  1659. return;
  1660. }
  1661. /*
  1662. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1663. * @vdev_handle: virtual device object
  1664. * @htt_pkt_type: type of pkt
  1665. *
  1666. * Return: void
  1667. */
  1668. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1669. enum htt_cmn_pkt_type val)
  1670. {
  1671. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1672. vdev->tx_encap_type = val;
  1673. }
  1674. /*
  1675. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1676. * @vdev_handle: virtual device object
  1677. * @htt_pkt_type: type of pkt
  1678. *
  1679. * Return: void
  1680. */
  1681. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1682. enum htt_cmn_pkt_type val)
  1683. {
  1684. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1685. vdev->rx_decap_type = val;
  1686. }
  1687. /*
  1688. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  1689. * @pdev_handle: physical device object
  1690. * @val: reo destination ring index (1 - 4)
  1691. *
  1692. * Return: void
  1693. */
  1694. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  1695. enum cdp_host_reo_dest_ring val)
  1696. {
  1697. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1698. if (pdev)
  1699. pdev->reo_dest = val;
  1700. }
  1701. /*
  1702. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  1703. * @pdev_handle: physical device object
  1704. *
  1705. * Return: reo destination ring index
  1706. */
  1707. static enum cdp_host_reo_dest_ring
  1708. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  1709. {
  1710. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1711. if (pdev)
  1712. return pdev->reo_dest;
  1713. else
  1714. return cdp_host_reo_dest_ring_unknown;
  1715. }
  1716. #ifdef QCA_SUPPORT_SON
  1717. static void dp_son_peer_authorize(struct dp_peer *peer)
  1718. {
  1719. struct dp_soc *soc;
  1720. soc = peer->vdev->pdev->soc;
  1721. peer->peer_bs_inact_flag = 0;
  1722. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1723. return;
  1724. }
  1725. #else
  1726. static void dp_son_peer_authorize(struct dp_peer *peer)
  1727. {
  1728. return;
  1729. }
  1730. #endif
  1731. /*
  1732. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  1733. * @pdev_handle: device object
  1734. * @val: value to be set
  1735. *
  1736. * Return: void
  1737. */
  1738. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1739. uint32_t val)
  1740. {
  1741. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1742. /* Enable/Disable smart mesh filtering. This flag will be checked
  1743. * during rx processing to check if packets are from NAC clients.
  1744. */
  1745. pdev->filter_neighbour_peers = val;
  1746. return 0;
  1747. }
  1748. /*
  1749. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  1750. * address for smart mesh filtering
  1751. * @pdev_handle: device object
  1752. * @cmd: Add/Del command
  1753. * @macaddr: nac client mac address
  1754. *
  1755. * Return: void
  1756. */
  1757. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1758. uint32_t cmd, uint8_t *macaddr)
  1759. {
  1760. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1761. struct dp_neighbour_peer *peer = NULL;
  1762. if (!macaddr)
  1763. goto fail0;
  1764. /* Store address of NAC (neighbour peer) which will be checked
  1765. * against TA of received packets.
  1766. */
  1767. if (cmd == DP_NAC_PARAM_ADD) {
  1768. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  1769. sizeof(*peer));
  1770. if (!peer) {
  1771. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1772. FL("DP neighbour peer node memory allocation failed"));
  1773. goto fail0;
  1774. }
  1775. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  1776. macaddr, DP_MAC_ADDR_LEN);
  1777. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1778. /* add this neighbour peer into the list */
  1779. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  1780. neighbour_peer_list_elem);
  1781. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1782. return 1;
  1783. } else if (cmd == DP_NAC_PARAM_DEL) {
  1784. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1785. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1786. neighbour_peer_list_elem) {
  1787. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  1788. macaddr, DP_MAC_ADDR_LEN)) {
  1789. /* delete this peer from the list */
  1790. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1791. peer, neighbour_peer_list_elem);
  1792. qdf_mem_free(peer);
  1793. break;
  1794. }
  1795. }
  1796. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1797. return 1;
  1798. }
  1799. fail0:
  1800. return 0;
  1801. }
  1802. /*
  1803. * dp_peer_authorize() - authorize txrx peer
  1804. * @peer_handle: Datapath peer handle
  1805. * @authorize
  1806. *
  1807. */
  1808. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1809. {
  1810. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1811. struct dp_soc *soc;
  1812. if (peer != NULL) {
  1813. soc = peer->vdev->pdev->soc;
  1814. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1815. dp_son_peer_authorize(peer);
  1816. peer->authorize = authorize ? 1 : 0;
  1817. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1818. }
  1819. }
  1820. /*
  1821. * dp_peer_unref_delete() - unref and delete peer
  1822. * @peer_handle: Datapath peer handle
  1823. *
  1824. */
  1825. void dp_peer_unref_delete(void *peer_handle)
  1826. {
  1827. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1828. struct dp_vdev *vdev = peer->vdev;
  1829. struct dp_pdev *pdev = vdev->pdev;
  1830. struct dp_soc *soc = pdev->soc;
  1831. struct dp_peer *tmppeer;
  1832. int found = 0;
  1833. uint16_t peer_id;
  1834. uint16_t hw_peer_id;
  1835. struct dp_ast_entry *ast_entry;
  1836. /*
  1837. * Hold the lock all the way from checking if the peer ref count
  1838. * is zero until the peer references are removed from the hash
  1839. * table and vdev list (if the peer ref count is zero).
  1840. * This protects against a new HL tx operation starting to use the
  1841. * peer object just after this function concludes it's done being used.
  1842. * Furthermore, the lock needs to be held while checking whether the
  1843. * vdev's list of peers is empty, to make sure that list is not modified
  1844. * concurrently with the empty check.
  1845. */
  1846. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1847. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1848. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1849. peer, qdf_atomic_read(&peer->ref_cnt));
  1850. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1851. peer_id = peer->peer_ids[0];
  1852. /*
  1853. * Make sure that the reference to the peer in
  1854. * peer object map is removed
  1855. */
  1856. if (peer_id != HTT_INVALID_PEER)
  1857. soc->peer_id_to_obj_map[peer_id] = NULL;
  1858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1859. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1860. /* remove the reference to the peer from the hash table */
  1861. dp_peer_find_hash_remove(soc, peer);
  1862. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1863. if (tmppeer == peer) {
  1864. found = 1;
  1865. break;
  1866. }
  1867. }
  1868. if (found) {
  1869. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1870. peer_list_elem);
  1871. } else {
  1872. /*Ignoring the remove operation as peer not found*/
  1873. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1874. "peer %p not found in vdev (%p)->peer_list:%p",
  1875. peer, vdev, &peer->vdev->peer_list);
  1876. }
  1877. /* cleanup the peer data */
  1878. dp_peer_cleanup(vdev, peer);
  1879. /* check whether the parent vdev has no peers left */
  1880. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1881. /*
  1882. * Now that there are no references to the peer, we can
  1883. * release the peer reference lock.
  1884. */
  1885. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1886. /*
  1887. * Check if the parent vdev was waiting for its peers
  1888. * to be deleted, in order for it to be deleted too.
  1889. */
  1890. if (vdev->delete.pending) {
  1891. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1892. vdev->delete.callback;
  1893. void *vdev_delete_context =
  1894. vdev->delete.context;
  1895. QDF_TRACE(QDF_MODULE_ID_DP,
  1896. QDF_TRACE_LEVEL_INFO_HIGH,
  1897. FL("deleting vdev object %p (%pM)"
  1898. " - its last peer is done"),
  1899. vdev, vdev->mac_addr.raw);
  1900. /* all peers are gone, go ahead and delete it */
  1901. qdf_mem_free(vdev);
  1902. if (vdev_delete_cb)
  1903. vdev_delete_cb(vdev_delete_context);
  1904. }
  1905. } else {
  1906. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1907. }
  1908. #ifdef notyet
  1909. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1910. #else
  1911. TAILQ_FOREACH(ast_entry, &peer->ast_entry_list,
  1912. ast_entry_elem) {
  1913. hw_peer_id = ast_entry->ast_idx;
  1914. if (peer->self_ast_entry.ast_idx != hw_peer_id)
  1915. qdf_mem_free(ast_entry);
  1916. else
  1917. peer->self_ast_entry.ast_idx =
  1918. HTT_INVALID_PEER;
  1919. soc->ast_table[hw_peer_id] = NULL;
  1920. }
  1921. qdf_mem_free(peer);
  1922. #endif
  1923. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1924. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  1925. vdev->vdev_id, peer->mac_addr.raw);
  1926. }
  1927. } else {
  1928. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1929. }
  1930. }
  1931. /*
  1932. * dp_peer_detach_wifi3() – Detach txrx peer
  1933. * @peer_handle: Datapath peer handle
  1934. *
  1935. */
  1936. static void dp_peer_delete_wifi3(void *peer_handle)
  1937. {
  1938. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1939. /* redirect the peer's rx delivery function to point to a
  1940. * discard func
  1941. */
  1942. peer->rx_opt_proc = dp_rx_discard;
  1943. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1944. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1945. #ifndef CONFIG_WIN
  1946. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1947. #endif
  1948. qdf_spinlock_destroy(&peer->peer_info_lock);
  1949. /*
  1950. * Remove the reference added during peer_attach.
  1951. * The peer will still be left allocated until the
  1952. * PEER_UNMAP message arrives to remove the other
  1953. * reference, added by the PEER_MAP message.
  1954. */
  1955. dp_peer_unref_delete(peer_handle);
  1956. }
  1957. /*
  1958. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1959. * @peer_handle: Datapath peer handle
  1960. *
  1961. */
  1962. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1963. {
  1964. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1965. return vdev->mac_addr.raw;
  1966. }
  1967. /*
  1968. * dp_vdev_set_wds() - Enable per packet stats
  1969. * @vdev_handle: DP VDEV handle
  1970. * @val: value
  1971. *
  1972. * Return: none
  1973. */
  1974. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  1975. {
  1976. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1977. vdev->wds_enabled = val;
  1978. return 0;
  1979. }
  1980. /*
  1981. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1982. * @peer_handle: Datapath peer handle
  1983. *
  1984. */
  1985. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1986. uint8_t vdev_id)
  1987. {
  1988. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1989. struct dp_vdev *vdev = NULL;
  1990. if (qdf_unlikely(!pdev))
  1991. return NULL;
  1992. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1993. if (vdev->vdev_id == vdev_id)
  1994. break;
  1995. }
  1996. return (struct cdp_vdev *)vdev;
  1997. }
  1998. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1999. {
  2000. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2001. return vdev->opmode;
  2002. }
  2003. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  2004. {
  2005. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  2006. struct dp_pdev *pdev = vdev->pdev;
  2007. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  2008. }
  2009. /**
  2010. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  2011. * @vdev_handle: Datapath VDEV handle
  2012. * @smart_monitor: Flag to denote if its smart monitor mode
  2013. *
  2014. * Return: 0 on success, not 0 on failure
  2015. */
  2016. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  2017. uint8_t smart_monitor)
  2018. {
  2019. /* Many monitor VAPs can exists in a system but only one can be up at
  2020. * anytime
  2021. */
  2022. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2023. struct dp_pdev *pdev;
  2024. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  2025. struct dp_soc *soc;
  2026. uint8_t pdev_id;
  2027. qdf_assert(vdev);
  2028. pdev = vdev->pdev;
  2029. pdev_id = pdev->pdev_id;
  2030. soc = pdev->soc;
  2031. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  2032. "pdev=%p, pdev_id=%d, soc=%p vdev=%p\n",
  2033. pdev, pdev_id, soc, vdev);
  2034. /*Check if current pdev's monitor_vdev exists */
  2035. if (pdev->monitor_vdev) {
  2036. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2037. "vdev=%p\n", vdev);
  2038. qdf_assert(vdev);
  2039. }
  2040. pdev->monitor_vdev = vdev;
  2041. /* If smart monitor mode, do not configure monitor ring */
  2042. if (smart_monitor)
  2043. return QDF_STATUS_SUCCESS;
  2044. htt_tlv_filter.mpdu_start = 1;
  2045. htt_tlv_filter.msdu_start = 1;
  2046. htt_tlv_filter.packet = 1;
  2047. htt_tlv_filter.msdu_end = 1;
  2048. htt_tlv_filter.mpdu_end = 1;
  2049. htt_tlv_filter.packet_header = 1;
  2050. htt_tlv_filter.attention = 1;
  2051. htt_tlv_filter.ppdu_start = 0;
  2052. htt_tlv_filter.ppdu_end = 0;
  2053. htt_tlv_filter.ppdu_end_user_stats = 0;
  2054. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  2055. htt_tlv_filter.ppdu_end_status_done = 0;
  2056. htt_tlv_filter.enable_fp = 1;
  2057. htt_tlv_filter.enable_md = 0;
  2058. htt_tlv_filter.enable_mo = 1;
  2059. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2060. pdev->rxdma_mon_dst_ring.hal_srng,
  2061. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  2062. htt_tlv_filter.mpdu_start = 1;
  2063. htt_tlv_filter.msdu_start = 1;
  2064. htt_tlv_filter.packet = 0;
  2065. htt_tlv_filter.msdu_end = 1;
  2066. htt_tlv_filter.mpdu_end = 1;
  2067. htt_tlv_filter.packet_header = 1;
  2068. htt_tlv_filter.attention = 1;
  2069. htt_tlv_filter.ppdu_start = 1;
  2070. htt_tlv_filter.ppdu_end = 1;
  2071. htt_tlv_filter.ppdu_end_user_stats = 1;
  2072. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  2073. htt_tlv_filter.ppdu_end_status_done = 1;
  2074. htt_tlv_filter.enable_fp = 1;
  2075. htt_tlv_filter.enable_md = 1;
  2076. htt_tlv_filter.enable_mo = 1;
  2077. /*
  2078. * htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2079. * pdev->rxdma_mon_status_ring.hal_srng,
  2080. * RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  2081. */
  2082. return QDF_STATUS_SUCCESS;
  2083. }
  2084. #ifdef MESH_MODE_SUPPORT
  2085. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  2086. {
  2087. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2088. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2089. FL("val %d"), val);
  2090. vdev->mesh_vdev = val;
  2091. }
  2092. /*
  2093. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  2094. * @vdev_hdl: virtual device object
  2095. * @val: value to be set
  2096. *
  2097. * Return: void
  2098. */
  2099. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  2100. {
  2101. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2102. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2103. FL("val %d"), val);
  2104. vdev->mesh_rx_filter = val;
  2105. }
  2106. #endif
  2107. /**
  2108. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  2109. * @vdev: DP VDEV handle
  2110. *
  2111. * return: void
  2112. */
  2113. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  2114. {
  2115. struct dp_peer *peer = NULL;
  2116. int i;
  2117. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  2118. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  2119. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2120. if (!peer)
  2121. return;
  2122. for (i = 0; i <= MAX_MCS; i++) {
  2123. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  2124. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  2125. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  2126. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  2127. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  2128. DP_STATS_AGGR(vdev, peer, rx.pkt_type[0].mcs_count[i]);
  2129. DP_STATS_AGGR(vdev, peer, rx.pkt_type[1].mcs_count[i]);
  2130. DP_STATS_AGGR(vdev, peer, rx.pkt_type[2].mcs_count[i]);
  2131. DP_STATS_AGGR(vdev, peer, rx.pkt_type[3].mcs_count[i]);
  2132. DP_STATS_AGGR(vdev, peer, rx.pkt_type[4].mcs_count[i]);
  2133. }
  2134. for (i = 0; i < SUPPORTED_BW; i++) {
  2135. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  2136. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  2137. }
  2138. for (i = 0; i < SS_COUNT; i++)
  2139. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  2140. for (i = 0; i < WME_AC_MAX; i++) {
  2141. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  2142. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  2143. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  2144. }
  2145. for (i = 0; i < MAX_MCS + 1; i++) {
  2146. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  2147. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  2148. }
  2149. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  2150. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  2151. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  2152. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  2153. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  2154. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  2155. DP_STATS_AGGR(vdev, peer, tx.stbc);
  2156. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  2157. DP_STATS_AGGR(vdev, peer, tx.retries);
  2158. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  2159. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  2160. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  2161. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  2162. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  2163. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  2164. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  2165. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  2166. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  2167. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  2168. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  2169. DP_STATS_AGGR(vdev, peer, rx.ampdu_cnt);
  2170. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  2171. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  2172. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  2173. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  2174. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo[i]);
  2175. peer->stats.rx.unicast.num = peer->stats.rx.to_stack.num -
  2176. peer->stats.rx.multicast.num;
  2177. peer->stats.rx.unicast.bytes = peer->stats.rx.to_stack.bytes -
  2178. peer->stats.rx.multicast.bytes;
  2179. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  2180. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  2181. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  2182. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  2183. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.pkts);
  2184. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.fail);
  2185. vdev->stats.tx.last_ack_rssi =
  2186. peer->stats.tx.last_ack_rssi;
  2187. }
  2188. }
  2189. /**
  2190. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  2191. * @pdev: DP PDEV handle
  2192. *
  2193. * return: void
  2194. */
  2195. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  2196. {
  2197. struct dp_vdev *vdev = NULL;
  2198. uint8_t i;
  2199. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  2200. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  2201. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  2202. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2203. if (!vdev)
  2204. return;
  2205. dp_aggregate_vdev_stats(vdev);
  2206. for (i = 0; i <= MAX_MCS; i++) {
  2207. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  2208. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  2209. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  2210. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  2211. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  2212. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[0].mcs_count[i]);
  2213. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[1].mcs_count[i]);
  2214. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[2].mcs_count[i]);
  2215. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[3].mcs_count[i]);
  2216. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[4].mcs_count[i]);
  2217. }
  2218. for (i = 0; i < SUPPORTED_BW; i++) {
  2219. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  2220. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  2221. }
  2222. for (i = 0; i < SS_COUNT; i++)
  2223. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  2224. for (i = 0; i < WME_AC_MAX; i++) {
  2225. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  2226. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  2227. DP_STATS_AGGR(pdev, vdev,
  2228. tx.excess_retries_ac[i]);
  2229. }
  2230. for (i = 0; i < MAX_MCS + 1; i++) {
  2231. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  2232. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  2233. }
  2234. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  2235. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  2236. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  2237. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  2238. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  2239. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  2240. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  2241. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  2242. DP_STATS_AGGR(pdev, vdev, tx.retries);
  2243. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  2244. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  2245. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  2246. DP_STATS_AGGR(pdev, vdev,
  2247. tx.dropped.fw_discard_retired);
  2248. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  2249. DP_STATS_AGGR(pdev, vdev,
  2250. tx.dropped.fw_discard_reason1);
  2251. DP_STATS_AGGR(pdev, vdev,
  2252. tx.dropped.fw_discard_reason2);
  2253. DP_STATS_AGGR(pdev, vdev,
  2254. tx.dropped.fw_discard_reason3);
  2255. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  2256. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  2257. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  2258. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  2259. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  2260. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  2261. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  2262. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[0]);
  2263. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[1]);
  2264. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[2]);
  2265. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[3]);
  2266. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  2267. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  2268. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  2269. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.pkts);
  2270. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.fail);
  2271. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  2272. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  2273. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  2274. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  2275. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  2276. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  2277. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  2278. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  2279. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  2280. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  2281. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  2282. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  2283. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  2284. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  2285. DP_STATS_AGGR(pdev, vdev,
  2286. tx_i.mcast_en.dropped_map_error);
  2287. DP_STATS_AGGR(pdev, vdev,
  2288. tx_i.mcast_en.dropped_self_mac);
  2289. DP_STATS_AGGR(pdev, vdev,
  2290. tx_i.mcast_en.dropped_send_fail);
  2291. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  2292. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  2293. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  2294. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  2295. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  2296. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  2297. pdev->stats.tx_i.dropped.dropped_pkt.num =
  2298. pdev->stats.tx_i.dropped.dma_error +
  2299. pdev->stats.tx_i.dropped.ring_full +
  2300. pdev->stats.tx_i.dropped.enqueue_fail +
  2301. pdev->stats.tx_i.dropped.desc_na +
  2302. pdev->stats.tx_i.dropped.res_full;
  2303. pdev->stats.tx.last_ack_rssi =
  2304. vdev->stats.tx.last_ack_rssi;
  2305. pdev->stats.tx_i.tso.num_seg =
  2306. vdev->stats.tx_i.tso.num_seg;
  2307. }
  2308. }
  2309. /**
  2310. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  2311. * @pdev: DP_PDEV Handle
  2312. *
  2313. * Return:void
  2314. */
  2315. static inline void
  2316. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  2317. {
  2318. DP_TRACE_STATS(NONE, "WLAN Tx Stats:\n");
  2319. DP_TRACE_STATS(NONE, "Received From Stack:\n");
  2320. DP_TRACE_STATS(NONE, "Packets = %d",
  2321. pdev->stats.tx_i.rcvd.num);
  2322. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2323. pdev->stats.tx_i.rcvd.bytes);
  2324. DP_TRACE_STATS(NONE, "Processed:\n");
  2325. DP_TRACE_STATS(NONE, "Packets = %d",
  2326. pdev->stats.tx_i.processed.num);
  2327. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2328. pdev->stats.tx_i.processed.bytes);
  2329. DP_TRACE_STATS(NONE, "Completions:\n");
  2330. DP_TRACE_STATS(NONE, "Packets = %d",
  2331. pdev->stats.tx.comp_pkt.num);
  2332. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2333. pdev->stats.tx.comp_pkt.bytes);
  2334. DP_TRACE_STATS(NONE, "Dropped:\n");
  2335. DP_TRACE_STATS(NONE, "Packets = %d",
  2336. pdev->stats.tx_i.dropped.dropped_pkt.num);
  2337. DP_TRACE_STATS(NONE, "Dma_map_error = %d",
  2338. pdev->stats.tx_i.dropped.dma_error);
  2339. DP_TRACE_STATS(NONE, "Ring Full = %d",
  2340. pdev->stats.tx_i.dropped.ring_full);
  2341. DP_TRACE_STATS(NONE, "Descriptor Not available = %d",
  2342. pdev->stats.tx_i.dropped.desc_na);
  2343. DP_TRACE_STATS(NONE, "HW enqueue failed= %d",
  2344. pdev->stats.tx_i.dropped.enqueue_fail);
  2345. DP_TRACE_STATS(NONE, "Resources Full = %d",
  2346. pdev->stats.tx_i.dropped.res_full);
  2347. DP_TRACE_STATS(NONE, "Fw Discard = %d",
  2348. pdev->stats.tx.dropped.fw_discard);
  2349. DP_TRACE_STATS(NONE, "Fw Discard Retired = %d",
  2350. pdev->stats.tx.dropped.fw_discard_retired);
  2351. DP_TRACE_STATS(NONE, "Firmware Discard Untransmitted = %d",
  2352. pdev->stats.tx.dropped.fw_discard_untransmitted);
  2353. DP_TRACE_STATS(NONE, "Mpdu Age Out = %d",
  2354. pdev->stats.tx.dropped.mpdu_age_out);
  2355. DP_TRACE_STATS(NONE, "Firmware Discard Reason1 = %d",
  2356. pdev->stats.tx.dropped.fw_discard_reason1);
  2357. DP_TRACE_STATS(NONE, "Firmware Discard Reason2 = %d",
  2358. pdev->stats.tx.dropped.fw_discard_reason2);
  2359. DP_TRACE_STATS(NONE, "Firmware Discard Reason3 = %d\n",
  2360. pdev->stats.tx.dropped.fw_discard_reason3);
  2361. DP_TRACE_STATS(NONE, "Scatter Gather:\n");
  2362. DP_TRACE_STATS(NONE, "Packets = %d",
  2363. pdev->stats.tx_i.sg.sg_pkt.num);
  2364. DP_TRACE_STATS(NONE, "Bytes = %d",
  2365. pdev->stats.tx_i.sg.sg_pkt.bytes);
  2366. DP_TRACE_STATS(NONE, "Dropped By Host = %d",
  2367. pdev->stats.tx_i.sg.dropped_host);
  2368. DP_TRACE_STATS(NONE, "Dropped By Target = %d\n",
  2369. pdev->stats.tx_i.sg.dropped_target);
  2370. DP_TRACE_STATS(NONE, "Tso:\n");
  2371. DP_TRACE_STATS(NONE, "Number of Segments = %d",
  2372. pdev->stats.tx_i.tso.num_seg);
  2373. DP_TRACE_STATS(NONE, "Packets = %d",
  2374. pdev->stats.tx_i.tso.tso_pkt.num);
  2375. DP_TRACE_STATS(NONE, "Bytes = %d",
  2376. pdev->stats.tx_i.tso.tso_pkt.bytes);
  2377. DP_TRACE_STATS(NONE, "Dropped By Host = %d\n",
  2378. pdev->stats.tx_i.tso.dropped_host);
  2379. DP_TRACE_STATS(NONE, "Mcast Enhancement:\n");
  2380. DP_TRACE_STATS(NONE, "Packets = %d",
  2381. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  2382. DP_TRACE_STATS(NONE, "Bytes = %d",
  2383. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  2384. DP_TRACE_STATS(NONE, "Dropped: Map Errors = %d",
  2385. pdev->stats.tx_i.mcast_en.dropped_map_error);
  2386. DP_TRACE_STATS(NONE, "Dropped: Self Mac = %d",
  2387. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  2388. DP_TRACE_STATS(NONE, "Dropped: Send Fail = %d",
  2389. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  2390. DP_TRACE_STATS(NONE, "Unicast sent = %d\n",
  2391. pdev->stats.tx_i.mcast_en.ucast);
  2392. DP_TRACE_STATS(NONE, "Raw:\n");
  2393. DP_TRACE_STATS(NONE, "Packets = %d",
  2394. pdev->stats.tx_i.raw.raw_pkt.num);
  2395. DP_TRACE_STATS(NONE, "Bytes = %d",
  2396. pdev->stats.tx_i.raw.raw_pkt.bytes);
  2397. DP_TRACE_STATS(NONE, "DMA map error = %d\n",
  2398. pdev->stats.tx_i.raw.dma_map_error);
  2399. DP_TRACE_STATS(NONE, "Reinjected:\n");
  2400. DP_TRACE_STATS(NONE, "Packets = %d",
  2401. pdev->stats.tx_i.reinject_pkts.num);
  2402. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2403. pdev->stats.tx_i.reinject_pkts.bytes);
  2404. DP_TRACE_STATS(NONE, "Inspected:\n");
  2405. DP_TRACE_STATS(NONE, "Packets = %d",
  2406. pdev->stats.tx_i.inspect_pkts.num);
  2407. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2408. pdev->stats.tx_i.inspect_pkts.bytes);
  2409. }
  2410. /**
  2411. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2412. * @pdev: DP_PDEV Handle
  2413. *
  2414. * Return: void
  2415. */
  2416. static inline void
  2417. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2418. {
  2419. DP_TRACE_STATS(NONE, "WLAN Rx Stats:\n");
  2420. DP_TRACE_STATS(NONE, "Received From HW (Per Rx Ring):\n");
  2421. DP_TRACE_STATS(NONE, "Packets = %d %d %d %d",
  2422. pdev->stats.rx.rcvd_reo[0].num,
  2423. pdev->stats.rx.rcvd_reo[1].num,
  2424. pdev->stats.rx.rcvd_reo[2].num,
  2425. pdev->stats.rx.rcvd_reo[3].num);
  2426. DP_TRACE_STATS(NONE, "Bytes = %d %d %d %d\n",
  2427. pdev->stats.rx.rcvd_reo[0].bytes,
  2428. pdev->stats.rx.rcvd_reo[1].bytes,
  2429. pdev->stats.rx.rcvd_reo[2].bytes,
  2430. pdev->stats.rx.rcvd_reo[3].bytes);
  2431. DP_TRACE_STATS(NONE, "Replenished:\n");
  2432. DP_TRACE_STATS(NONE, "Packets = %d",
  2433. pdev->stats.replenish.pkts.num);
  2434. DP_TRACE_STATS(NONE, "Bytes = %d",
  2435. pdev->stats.replenish.pkts.bytes);
  2436. DP_TRACE_STATS(NONE, "Buffers Added To Freelist = %d\n",
  2437. pdev->stats.buf_freelist);
  2438. DP_TRACE_STATS(NONE, "Dropped:\n");
  2439. DP_TRACE_STATS(NONE, "Total Packets With Msdu Not Done = %d\n",
  2440. pdev->stats.dropped.msdu_not_done);
  2441. DP_TRACE_STATS(NONE, "Sent To Stack:\n");
  2442. DP_TRACE_STATS(NONE, "Packets = %d",
  2443. pdev->stats.rx.to_stack.num);
  2444. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2445. pdev->stats.rx.to_stack.bytes);
  2446. DP_TRACE_STATS(NONE, "Multicast/Broadcast:\n");
  2447. DP_TRACE_STATS(NONE, "Packets = %d",
  2448. pdev->stats.rx.multicast.num);
  2449. DP_TRACE_STATS(NONE, "Bytes = %d\n",
  2450. pdev->stats.rx.multicast.bytes);
  2451. DP_TRACE_STATS(NONE, "Errors:\n");
  2452. DP_TRACE_STATS(NONE, "Rxdma Ring Un-inititalized = %d",
  2453. pdev->stats.replenish.rxdma_err);
  2454. DP_TRACE_STATS(NONE, "Desc Alloc Failed: = %d",
  2455. pdev->stats.err.desc_alloc_fail);
  2456. }
  2457. /**
  2458. * dp_print_soc_tx_stats(): Print SOC level stats
  2459. * @soc DP_SOC Handle
  2460. *
  2461. * Return: void
  2462. */
  2463. static inline void
  2464. dp_print_soc_tx_stats(struct dp_soc *soc)
  2465. {
  2466. DP_TRACE_STATS(NONE, "SOC Tx Stats:\n");
  2467. DP_TRACE_STATS(NONE, "Tx Descriptors In Use = %d",
  2468. soc->stats.tx.desc_in_use);
  2469. DP_TRACE_STATS(NONE, "Invalid peer:\n");
  2470. DP_TRACE_STATS(NONE, "Packets = %d",
  2471. soc->stats.tx.tx_invalid_peer.num);
  2472. DP_TRACE_STATS(NONE, "Bytes = %d",
  2473. soc->stats.tx.tx_invalid_peer.bytes);
  2474. DP_TRACE_STATS(NONE, "Packets dropped due to TCL ring full = %d %d %d",
  2475. soc->stats.tx.tcl_ring_full[0],
  2476. soc->stats.tx.tcl_ring_full[1],
  2477. soc->stats.tx.tcl_ring_full[2]);
  2478. }
  2479. /**
  2480. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2481. * @soc: DP_SOC Handle
  2482. *
  2483. * Return:void
  2484. */
  2485. static inline void
  2486. dp_print_soc_rx_stats(struct dp_soc *soc)
  2487. {
  2488. uint32_t i;
  2489. char reo_error[DP_REO_ERR_LENGTH];
  2490. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2491. uint8_t index = 0;
  2492. DP_TRACE_STATS(NONE, "SOC Rx Stats:\n");
  2493. DP_TRACE_STATS(NONE, "Errors:\n");
  2494. DP_TRACE_STATS(NONE, "Invalid RBM = %d",
  2495. soc->stats.rx.err.invalid_rbm);
  2496. DP_TRACE_STATS(NONE, "Invalid Vdev = %d",
  2497. soc->stats.rx.err.invalid_vdev);
  2498. DP_TRACE_STATS(NONE, "Invalid Pdev = %d",
  2499. soc->stats.rx.err.invalid_pdev);
  2500. DP_TRACE_STATS(NONE, "Invalid Peer = %d",
  2501. soc->stats.rx.err.rx_invalid_peer.num);
  2502. DP_TRACE_STATS(NONE, "HAL Ring Access Fail = %d",
  2503. soc->stats.rx.err.hal_ring_access_fail);
  2504. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2505. index += qdf_snprint(&rxdma_error[index],
  2506. DP_RXDMA_ERR_LENGTH - index,
  2507. " %d", soc->stats.rx.err.rxdma_error[i]);
  2508. }
  2509. DP_TRACE_STATS(NONE, "RXDMA Error (0-31):%s",
  2510. rxdma_error);
  2511. index = 0;
  2512. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2513. index += qdf_snprint(&reo_error[index],
  2514. DP_REO_ERR_LENGTH - index,
  2515. " %d", soc->stats.rx.err.reo_error[i]);
  2516. }
  2517. DP_TRACE_STATS(NONE, "REO Error(0-14):%s",
  2518. reo_error);
  2519. }
  2520. /**
  2521. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2522. * @vdev: DP_VDEV handle
  2523. *
  2524. * Return:void
  2525. */
  2526. static inline void
  2527. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2528. {
  2529. struct dp_peer *peer = NULL;
  2530. DP_STATS_CLR(vdev->pdev);
  2531. DP_STATS_CLR(vdev->pdev->soc);
  2532. DP_STATS_CLR(vdev);
  2533. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2534. if (!peer)
  2535. return;
  2536. DP_STATS_CLR(peer);
  2537. }
  2538. }
  2539. /**
  2540. * dp_print_rx_rates(): Print Rx rate stats
  2541. * @vdev: DP_VDEV handle
  2542. *
  2543. * Return:void
  2544. */
  2545. static inline void
  2546. dp_print_rx_rates(struct dp_vdev *vdev)
  2547. {
  2548. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2549. uint8_t i, pkt_type;
  2550. uint8_t index = 0;
  2551. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2552. char nss[DP_NSS_LENGTH];
  2553. DP_TRACE_STATS(NONE, "Rx Rate Info:\n");
  2554. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2555. index = 0;
  2556. for (i = 0; i < MAX_MCS; i++) {
  2557. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2558. DP_MCS_LENGTH - index,
  2559. " %d ",
  2560. pdev->stats.rx.pkt_type[pkt_type].
  2561. mcs_count[i]);
  2562. }
  2563. }
  2564. DP_TRACE_STATS(NONE, "11A MCS(0-7) = %s",
  2565. rx_mcs[0]);
  2566. DP_TRACE_STATS(NONE, "11A MCS Invalid = %d",
  2567. pdev->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2568. DP_TRACE_STATS(NONE, "11B MCS(0-6) = %s",
  2569. rx_mcs[1]);
  2570. DP_TRACE_STATS(NONE, "11B MCS Invalid = %d",
  2571. pdev->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2572. DP_TRACE_STATS(NONE, "11N MCS(0-7) = %s",
  2573. rx_mcs[2]);
  2574. DP_TRACE_STATS(NONE, "11N MCS Invalid = %d",
  2575. pdev->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2576. DP_TRACE_STATS(NONE, "Type 11AC MCS(0-9) = %s",
  2577. rx_mcs[3]);
  2578. DP_TRACE_STATS(NONE, "11AC MCS Invalid = %d",
  2579. pdev->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2580. DP_TRACE_STATS(NONE, "11AX MCS(0-11) = %s",
  2581. rx_mcs[4]);
  2582. DP_TRACE_STATS(NONE, "11AX MCS Invalid = %d",
  2583. pdev->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2584. index = 0;
  2585. for (i = 0; i < SS_COUNT; i++) {
  2586. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2587. " %d", pdev->stats.rx.nss[i]);
  2588. }
  2589. DP_TRACE_STATS(NONE, "NSS(0-7) = %s",
  2590. nss);
  2591. DP_TRACE_STATS(NONE, "SGI ="
  2592. " 0.8us %d,"
  2593. " 0.4us %d,"
  2594. " 1.6us %d,"
  2595. " 3.2us %d,",
  2596. pdev->stats.rx.sgi_count[0],
  2597. pdev->stats.rx.sgi_count[1],
  2598. pdev->stats.rx.sgi_count[2],
  2599. pdev->stats.rx.sgi_count[3]);
  2600. DP_TRACE_STATS(NONE, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2601. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2602. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2603. DP_TRACE_STATS(NONE, "Reception Type ="
  2604. " SU: %d,"
  2605. " MU_MIMO:%d,"
  2606. " MU_OFDMA:%d,"
  2607. " MU_OFDMA_MIMO:%d\n",
  2608. pdev->stats.rx.reception_type[0],
  2609. pdev->stats.rx.reception_type[1],
  2610. pdev->stats.rx.reception_type[2],
  2611. pdev->stats.rx.reception_type[3]);
  2612. DP_TRACE_STATS(NONE, "Aggregation:\n");
  2613. DP_TRACE_STATS(NONE, "Number of Msdu's Part of Ampdus = %d",
  2614. pdev->stats.rx.ampdu_cnt);
  2615. DP_TRACE_STATS(NONE, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2616. pdev->stats.rx.non_ampdu_cnt);
  2617. DP_TRACE_STATS(NONE, "Number of Msdu's Part of Amsdu: %d",
  2618. pdev->stats.rx.amsdu_cnt);
  2619. DP_TRACE_STATS(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2620. pdev->stats.rx.non_amsdu_cnt);
  2621. }
  2622. /**
  2623. * dp_print_tx_rates(): Print tx rates
  2624. * @vdev: DP_VDEV handle
  2625. *
  2626. * Return:void
  2627. */
  2628. static inline void
  2629. dp_print_tx_rates(struct dp_vdev *vdev)
  2630. {
  2631. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2632. uint8_t i, pkt_type;
  2633. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2634. uint32_t index;
  2635. DP_TRACE_STATS(NONE, "Tx Rate Info:\n");
  2636. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2637. index = 0;
  2638. for (i = 0; i < MAX_MCS; i++) {
  2639. index += qdf_snprint(&mcs[pkt_type][index],
  2640. DP_MCS_LENGTH - index,
  2641. " %d ",
  2642. pdev->stats.tx.pkt_type[pkt_type].
  2643. mcs_count[i]);
  2644. }
  2645. }
  2646. DP_TRACE_STATS(NONE, "11A MCS(0-7) = %s",
  2647. mcs[0]);
  2648. DP_TRACE_STATS(NONE, "11A MCS Invalid = %d",
  2649. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2650. DP_TRACE_STATS(NONE, "11B MCS(0-6) = %s",
  2651. mcs[1]);
  2652. DP_TRACE_STATS(NONE, "11B MCS Invalid = %d",
  2653. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2654. DP_TRACE_STATS(NONE, "11N MCS(0-7) = %s",
  2655. mcs[2]);
  2656. DP_TRACE_STATS(NONE, "11N MCS Invalid = %d",
  2657. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2658. DP_TRACE_STATS(NONE, "Type 11AC MCS(0-9) = %s",
  2659. mcs[3]);
  2660. DP_TRACE_STATS(NONE, "11AC MCS Invalid = %d",
  2661. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2662. DP_TRACE_STATS(NONE, "11AX MCS(0-11) = %s",
  2663. mcs[4]);
  2664. DP_TRACE_STATS(NONE, "11AX MCS Invalid = %d",
  2665. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2666. DP_TRACE_STATS(NONE, "SGI ="
  2667. " 0.8us %d"
  2668. " 0.4us %d"
  2669. " 1.6us %d"
  2670. " 3.2us %d",
  2671. pdev->stats.tx.sgi_count[0],
  2672. pdev->stats.tx.sgi_count[1],
  2673. pdev->stats.tx.sgi_count[2],
  2674. pdev->stats.tx.sgi_count[3]);
  2675. DP_TRACE_STATS(NONE, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2676. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  2677. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  2678. DP_TRACE_STATS(NONE, "OFDMA = %d", pdev->stats.tx.ofdma);
  2679. DP_TRACE_STATS(NONE, "STBC = %d", pdev->stats.tx.stbc);
  2680. DP_TRACE_STATS(NONE, "LDPC = %d", pdev->stats.tx.ldpc);
  2681. DP_TRACE_STATS(NONE, "Retries = %d", pdev->stats.tx.retries);
  2682. DP_TRACE_STATS(NONE, "Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  2683. DP_TRACE_STATS(NONE, "Aggregation:\n");
  2684. DP_TRACE_STATS(NONE, "Number of Msdu's Part of Amsdu = %d",
  2685. pdev->stats.tx.amsdu_cnt);
  2686. DP_TRACE_STATS(NONE, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2687. pdev->stats.tx.non_amsdu_cnt);
  2688. }
  2689. /**
  2690. * dp_print_peer_stats():print peer stats
  2691. * @peer: DP_PEER handle
  2692. *
  2693. * return void
  2694. */
  2695. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2696. {
  2697. uint8_t i, pkt_type;
  2698. char tx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2699. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2700. uint32_t index;
  2701. char nss[DP_NSS_LENGTH];
  2702. DP_TRACE_STATS(NONE, "Node Tx Stats:\n");
  2703. DP_TRACE_STATS(NONE, "Total Packet Completions = %d",
  2704. peer->stats.tx.comp_pkt.num);
  2705. DP_TRACE_STATS(NONE, "Total Bytes Completions = %d",
  2706. peer->stats.tx.comp_pkt.bytes);
  2707. DP_TRACE_STATS(NONE, "Success Packets = %d",
  2708. peer->stats.tx.tx_success.num);
  2709. DP_TRACE_STATS(NONE, "Success Bytes = %d",
  2710. peer->stats.tx.tx_success.bytes);
  2711. DP_TRACE_STATS(NONE, "Packets Failed = %d",
  2712. peer->stats.tx.tx_failed);
  2713. DP_TRACE_STATS(NONE, "Packets In OFDMA = %d",
  2714. peer->stats.tx.ofdma);
  2715. DP_TRACE_STATS(NONE, "Packets In STBC = %d",
  2716. peer->stats.tx.stbc);
  2717. DP_TRACE_STATS(NONE, "Packets In LDPC = %d",
  2718. peer->stats.tx.ldpc);
  2719. DP_TRACE_STATS(NONE, "Packet Retries = %d",
  2720. peer->stats.tx.retries);
  2721. DP_TRACE_STATS(NONE, "Msdu's Not Part of Ampdu = %d",
  2722. peer->stats.tx.non_amsdu_cnt);
  2723. DP_TRACE_STATS(NONE, "Mpdu's Part of Ampdu = %d",
  2724. peer->stats.tx.amsdu_cnt);
  2725. DP_TRACE_STATS(NONE, "Last Packet RSSI = %d",
  2726. peer->stats.tx.last_ack_rssi);
  2727. DP_TRACE_STATS(NONE, "Dropped At FW: FW Discard = %d",
  2728. peer->stats.tx.dropped.fw_discard);
  2729. DP_TRACE_STATS(NONE, "Dropped At FW: FW Discard Retired = %d",
  2730. peer->stats.tx.dropped.fw_discard_retired);
  2731. DP_TRACE_STATS(NONE, "Dropped At FW: FW Discard Untransmitted = %d",
  2732. peer->stats.tx.dropped.fw_discard_untransmitted);
  2733. DP_TRACE_STATS(NONE, "Dropped : Mpdu Age Out = %d",
  2734. peer->stats.tx.dropped.mpdu_age_out);
  2735. DP_TRACE_STATS(NONE, "Dropped : FW Discard Reason1 = %d",
  2736. peer->stats.tx.dropped.fw_discard_reason1);
  2737. DP_TRACE_STATS(NONE, "Dropped : FW Discard Reason2 = %d",
  2738. peer->stats.tx.dropped.fw_discard_reason2);
  2739. DP_TRACE_STATS(NONE, "Dropped : FW Discard Reason3 = %d",
  2740. peer->stats.tx.dropped.fw_discard_reason3);
  2741. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2742. index = 0;
  2743. for (i = 0; i < MAX_MCS; i++) {
  2744. index += qdf_snprint(&tx_mcs[pkt_type][index],
  2745. DP_MCS_LENGTH - index,
  2746. " %d ",
  2747. peer->stats.tx.pkt_type[pkt_type].
  2748. mcs_count[i]);
  2749. }
  2750. }
  2751. DP_TRACE_STATS(NONE, "11A MCS(0-7) = %s",
  2752. tx_mcs[0]);
  2753. DP_TRACE_STATS(NONE, "11A MCS Invalid = %d",
  2754. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2755. DP_TRACE_STATS(NONE, "11B MCS(0-6) = %s",
  2756. tx_mcs[1]);
  2757. DP_TRACE_STATS(NONE, "11B MCS Invalid = %d",
  2758. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2759. DP_TRACE_STATS(NONE, "11N MCS(0-7) = %s",
  2760. tx_mcs[2]);
  2761. DP_TRACE_STATS(NONE, "11N MCS Invalid = %d",
  2762. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2763. DP_TRACE_STATS(NONE, "11AC MCS(0-9) = %s",
  2764. tx_mcs[3]);
  2765. DP_TRACE_STATS(NONE, "11AC MCS Invalid = %d",
  2766. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2767. DP_TRACE_STATS(NONE, "11AX MCS(0-11) = %s",
  2768. tx_mcs[4]);
  2769. DP_TRACE_STATS(NONE, "11AX MCS Invalid = %d",
  2770. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2771. DP_TRACE_STATS(NONE, "SGI = "
  2772. " 0.8us %d"
  2773. " 0.4us %d"
  2774. " 1.6us %d"
  2775. " 3.2us %d",
  2776. peer->stats.tx.sgi_count[0],
  2777. peer->stats.tx.sgi_count[1],
  2778. peer->stats.tx.sgi_count[2],
  2779. peer->stats.tx.sgi_count[3]);
  2780. DP_TRACE_STATS(NONE, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  2781. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2782. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2783. DP_TRACE_STATS(NONE, "Aggregation:\n");
  2784. DP_TRACE_STATS(NONE, "Number of Msdu's Part of Amsdu = %d",
  2785. peer->stats.tx.amsdu_cnt);
  2786. DP_TRACE_STATS(NONE, "Number of Msdu's With No Msdu Level Aggregation = %d\n",
  2787. peer->stats.tx.non_amsdu_cnt);
  2788. DP_TRACE_STATS(NONE, "Node Rx Stats:\n");
  2789. DP_TRACE_STATS(NONE, "Packets Sent To Stack = %d",
  2790. peer->stats.rx.to_stack.num);
  2791. DP_TRACE_STATS(NONE, "Bytes Sent To Stack = %d",
  2792. peer->stats.rx.to_stack.bytes);
  2793. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  2794. DP_TRACE_STATS(NONE, "Packets Received = %d",
  2795. peer->stats.rx.rcvd_reo[i].num);
  2796. DP_TRACE_STATS(NONE, "Bytes Received = %d",
  2797. peer->stats.rx.rcvd_reo[i].bytes);
  2798. }
  2799. DP_TRACE_STATS(NONE, "Multicast Packets Received = %d",
  2800. peer->stats.rx.multicast.num);
  2801. DP_TRACE_STATS(NONE, "Multicast Bytes Received = %d",
  2802. peer->stats.rx.multicast.bytes);
  2803. DP_TRACE_STATS(NONE, "WDS Packets Received = %d",
  2804. peer->stats.rx.wds.num);
  2805. DP_TRACE_STATS(NONE, "WDS Bytes Received = %d",
  2806. peer->stats.rx.wds.bytes);
  2807. DP_TRACE_STATS(NONE, "Intra BSS Packets Received = %d",
  2808. peer->stats.rx.intra_bss.pkts.num);
  2809. DP_TRACE_STATS(NONE, "Intra BSS Bytes Received = %d",
  2810. peer->stats.rx.intra_bss.pkts.bytes);
  2811. DP_TRACE_STATS(NONE, "Raw Packets Received = %d",
  2812. peer->stats.rx.raw.num);
  2813. DP_TRACE_STATS(NONE, "Raw Bytes Received = %d",
  2814. peer->stats.rx.raw.bytes);
  2815. DP_TRACE_STATS(NONE, "Errors: MIC Errors = %d",
  2816. peer->stats.rx.err.mic_err);
  2817. DP_TRACE_STATS(NONE, "Erros: Decryption Errors = %d",
  2818. peer->stats.rx.err.decrypt_err);
  2819. DP_TRACE_STATS(NONE, "Msdu's Received As Part of Ampdu = %d",
  2820. peer->stats.rx.non_ampdu_cnt);
  2821. DP_TRACE_STATS(NONE, "Msdu's Recived As Ampdu = %d",
  2822. peer->stats.rx.ampdu_cnt);
  2823. DP_TRACE_STATS(NONE, "Msdu's Received Not Part of Amsdu's = %d",
  2824. peer->stats.rx.non_amsdu_cnt);
  2825. DP_TRACE_STATS(NONE, "MSDUs Received As Part of Amsdu = %d",
  2826. peer->stats.rx.amsdu_cnt);
  2827. DP_TRACE_STATS(NONE, "SGI ="
  2828. " 0.8us %d"
  2829. " 0.4us %d"
  2830. " 1.6us %d"
  2831. " 3.2us %d",
  2832. peer->stats.rx.sgi_count[0],
  2833. peer->stats.rx.sgi_count[1],
  2834. peer->stats.rx.sgi_count[2],
  2835. peer->stats.rx.sgi_count[3]);
  2836. DP_TRACE_STATS(NONE, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  2837. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  2838. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  2839. DP_TRACE_STATS(NONE, "Reception Type ="
  2840. " SU %d,"
  2841. " MU_MIMO %d,"
  2842. " MU_OFDMA %d,"
  2843. " MU_OFDMA_MIMO %d",
  2844. peer->stats.rx.reception_type[0],
  2845. peer->stats.rx.reception_type[1],
  2846. peer->stats.rx.reception_type[2],
  2847. peer->stats.rx.reception_type[3]);
  2848. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2849. index = 0;
  2850. for (i = 0; i < MAX_MCS; i++) {
  2851. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2852. DP_MCS_LENGTH - index,
  2853. " %d ",
  2854. peer->stats.rx.pkt_type[pkt_type].
  2855. mcs_count[i]);
  2856. }
  2857. }
  2858. DP_TRACE_STATS(NONE, "11A MCS(0-7) = %s",
  2859. rx_mcs[0]);
  2860. DP_TRACE_STATS(NONE, "11A MCS Invalid = %d",
  2861. peer->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2862. DP_TRACE_STATS(NONE, "11B MCS(0-6) = %s",
  2863. rx_mcs[1]);
  2864. DP_TRACE_STATS(NONE, "11B MCS Invalid = %d",
  2865. peer->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2866. DP_TRACE_STATS(NONE, "11N MCS(0-7) = %s",
  2867. rx_mcs[2]);
  2868. DP_TRACE_STATS(NONE, "11N MCS Invalid = %d",
  2869. peer->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2870. DP_TRACE_STATS(NONE, "11AC MCS(0-9) = %s",
  2871. rx_mcs[3]);
  2872. DP_TRACE_STATS(NONE, "11AC MCS Invalid = %d",
  2873. peer->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2874. DP_TRACE_STATS(NONE, "11AX MCS(0-11) = %s",
  2875. rx_mcs[4]);
  2876. DP_TRACE_STATS(NONE, "11AX MCS Invalid = %d",
  2877. peer->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2878. index = 0;
  2879. for (i = 0; i < SS_COUNT; i++) {
  2880. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2881. " %d", peer->stats.rx.nss[i]);
  2882. }
  2883. DP_TRACE_STATS(NONE, "NSS(0-7) = %s\n",
  2884. nss);
  2885. DP_TRACE_STATS(NONE, "Aggregation:\n");
  2886. DP_TRACE_STATS(NONE, "Number of Msdu's Part of Ampdu = %d",
  2887. peer->stats.rx.ampdu_cnt);
  2888. DP_TRACE_STATS(NONE, "Number of Msdu's With No Mpdu Level Aggregation = %d",
  2889. peer->stats.rx.non_ampdu_cnt);
  2890. DP_TRACE_STATS(NONE, "Number of Msdu's Part of Amsdu = %d",
  2891. peer->stats.rx.amsdu_cnt);
  2892. DP_TRACE_STATS(NONE, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2893. peer->stats.rx.non_amsdu_cnt);
  2894. }
  2895. /**
  2896. * dp_print_host_stats()- Function to print the stats aggregated at host
  2897. * @vdev_handle: DP_VDEV handle
  2898. * @req: ol_txrx_stats_req
  2899. * @type: host stats type
  2900. *
  2901. * Available Stat types
  2902. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  2903. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  2904. * TXRX_TX_HOST_STATS: Print Tx Stats
  2905. * TXRX_RX_HOST_STATS: Print Rx Stats
  2906. * TXRX_CLEAR_STATS : Clear the stats
  2907. *
  2908. * Return: 0 on success, print error message in case of failure
  2909. */
  2910. static int
  2911. dp_print_host_stats(struct cdp_vdev *vdev_handle, struct ol_txrx_stats_req *req,
  2912. enum cdp_host_txrx_stats type)
  2913. {
  2914. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2915. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2916. dp_aggregate_pdev_stats(pdev);
  2917. switch (type) {
  2918. case TXRX_RX_RATE_STATS:
  2919. dp_print_rx_rates(vdev);
  2920. break;
  2921. case TXRX_TX_RATE_STATS:
  2922. dp_print_tx_rates(vdev);
  2923. break;
  2924. case TXRX_TX_HOST_STATS:
  2925. dp_print_pdev_tx_stats(pdev);
  2926. dp_print_soc_tx_stats(pdev->soc);
  2927. break;
  2928. case TXRX_RX_HOST_STATS:
  2929. dp_print_pdev_rx_stats(pdev);
  2930. dp_print_soc_rx_stats(pdev->soc);
  2931. break;
  2932. case TXRX_CLEAR_STATS:
  2933. dp_txrx_host_stats_clr(vdev);
  2934. break;
  2935. default:
  2936. DP_TRACE(NONE, "Wrong Input For TxRx Host Stats");
  2937. break;
  2938. }
  2939. return 0;
  2940. }
  2941. /*
  2942. * dp_get_peer_stats()- function to print peer stats
  2943. * @pdev_handle: DP_PDEV handle
  2944. * @mac_addr: mac address of the peer
  2945. *
  2946. * Return: void
  2947. */
  2948. static void
  2949. dp_get_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  2950. {
  2951. struct dp_peer *peer;
  2952. uint8_t local_id;
  2953. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  2954. &local_id);
  2955. dp_print_peer_stats(peer);
  2956. return;
  2957. }
  2958. /*
  2959. * dp_set_vdev_param: function to set parameters in vdev
  2960. * @param: parameter type to be set
  2961. * @val: value of parameter to be set
  2962. *
  2963. * return: void
  2964. */
  2965. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  2966. enum cdp_vdev_param_type param, uint32_t val)
  2967. {
  2968. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2969. switch (param) {
  2970. case CDP_ENABLE_WDS:
  2971. vdev->wds_enabled = val;
  2972. break;
  2973. case CDP_ENABLE_NAWDS:
  2974. vdev->nawds_enabled = val;
  2975. break;
  2976. case CDP_ENABLE_MCAST_EN:
  2977. vdev->mcast_enhancement_en = val;
  2978. break;
  2979. case CDP_ENABLE_PROXYSTA:
  2980. vdev->proxysta_vdev = val;
  2981. break;
  2982. case CDP_UPDATE_TDLS_FLAGS:
  2983. vdev->tdls_link_connected = val;
  2984. break;
  2985. default:
  2986. break;
  2987. }
  2988. dp_tx_vdev_update_search_flags(vdev);
  2989. }
  2990. /**
  2991. * dp_peer_set_nawds: set nawds bit in peer
  2992. * @peer_handle: pointer to peer
  2993. * @value: enable/disable nawds
  2994. *
  2995. * return: void
  2996. */
  2997. static void dp_peer_set_nawds(void *peer_handle, uint8_t value)
  2998. {
  2999. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3000. peer->nawds_enabled = value;
  3001. }
  3002. /*
  3003. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  3004. * @vdev_handle: DP_VDEV handle
  3005. * @map_id:ID of map that needs to be updated
  3006. *
  3007. * Return: void
  3008. */
  3009. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  3010. uint8_t map_id)
  3011. {
  3012. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3013. vdev->dscp_tid_map_id = map_id;
  3014. return;
  3015. }
  3016. /**
  3017. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  3018. * @pdev: DP_PDEV handle
  3019. * @map_id: ID of map that needs to be updated
  3020. * @tos: index value in map
  3021. * @tid: tid value passed by the user
  3022. *
  3023. * Return: void
  3024. */
  3025. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  3026. uint8_t map_id, uint8_t tos, uint8_t tid)
  3027. {
  3028. uint8_t dscp;
  3029. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  3030. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  3031. pdev->dscp_tid_map[map_id][dscp] = tid;
  3032. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  3033. map_id, dscp);
  3034. return;
  3035. }
  3036. /*
  3037. * dp_txrx_stats() - function to map to firmware and host stats
  3038. * @vdev: virtual handle
  3039. * @req: statistics request handle
  3040. * @stats: type of statistics requested
  3041. *
  3042. * Return: integer
  3043. */
  3044. static int dp_txrx_stats(struct cdp_vdev *vdev,
  3045. struct ol_txrx_stats_req *req, enum cdp_stats stats)
  3046. {
  3047. int host_stats;
  3048. int fw_stats;
  3049. if (stats >= CDP_TXRX_MAX_STATS)
  3050. return 0;
  3051. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  3052. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  3053. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3054. "stats: %u fw_stats_type: %d host_stats_type: %d",
  3055. stats, fw_stats, host_stats);
  3056. /* TODO: Firmware Mapping not implemented */
  3057. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  3058. (host_stats <= TXRX_HOST_STATS_MAX))
  3059. return dp_print_host_stats(vdev, req, host_stats);
  3060. else
  3061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3062. "Wrong Input for TxRx Stats");
  3063. return 0;
  3064. }
  3065. /*
  3066. * dp_print_per_ring_stats(): Packet count per ring
  3067. * @soc - soc handle
  3068. */
  3069. static void dp_print_per_ring_stats(struct dp_soc *soc)
  3070. {
  3071. uint8_t core, ring;
  3072. uint64_t total_packets;
  3073. DP_TRACE(NONE, "Reo packets per ring:");
  3074. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  3075. total_packets = 0;
  3076. DP_TRACE(NONE, "Packets on ring %u:", ring);
  3077. for (core = 0; core < NR_CPUS; core++) {
  3078. DP_TRACE(NONE, "Packets arriving on core %u: %llu",
  3079. core, soc->stats.rx.ring_packets[core][ring]);
  3080. total_packets += soc->stats.rx.ring_packets[core][ring];
  3081. }
  3082. DP_TRACE(NONE, "Total packets on ring %u: %llu",
  3083. ring, total_packets);
  3084. }
  3085. }
  3086. /*
  3087. * dp_txrx_path_stats() - Function to display dump stats
  3088. * @soc - soc handle
  3089. *
  3090. * return: none
  3091. */
  3092. static void dp_txrx_path_stats(struct dp_soc *soc)
  3093. {
  3094. uint8_t error_code;
  3095. uint8_t loop_pdev;
  3096. struct dp_pdev *pdev;
  3097. uint8_t i;
  3098. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  3099. pdev = soc->pdev_list[loop_pdev];
  3100. dp_aggregate_pdev_stats(pdev);
  3101. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3102. "Tx path Statistics:");
  3103. DP_TRACE(NONE, "from stack: %u msdus (%u bytes)",
  3104. pdev->stats.tx_i.rcvd.num,
  3105. pdev->stats.tx_i.rcvd.bytes);
  3106. DP_TRACE(NONE, "processed from host: %u msdus (%u bytes)",
  3107. pdev->stats.tx_i.processed.num,
  3108. pdev->stats.tx_i.processed.bytes);
  3109. DP_TRACE(NONE, "successfully transmitted: %u msdus (%u bytes)",
  3110. pdev->stats.tx.tx_success.num,
  3111. pdev->stats.tx.tx_success.bytes);
  3112. DP_TRACE(NONE, "Dropped in host:");
  3113. DP_TRACE(NONE, "Total packets dropped: %u,",
  3114. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3115. DP_TRACE(NONE, "Descriptor not available: %u",
  3116. pdev->stats.tx_i.dropped.desc_na);
  3117. DP_TRACE(NONE, "Ring full: %u",
  3118. pdev->stats.tx_i.dropped.ring_full);
  3119. DP_TRACE(NONE, "Enqueue fail: %u",
  3120. pdev->stats.tx_i.dropped.enqueue_fail);
  3121. DP_TRACE(NONE, "DMA Error: %u",
  3122. pdev->stats.tx_i.dropped.dma_error);
  3123. DP_TRACE(NONE, "Dropped in hardware:");
  3124. DP_TRACE(NONE, "total packets dropped: %u",
  3125. pdev->stats.tx.tx_failed);
  3126. DP_TRACE(NONE, "mpdu age out: %u",
  3127. pdev->stats.tx.dropped.mpdu_age_out);
  3128. DP_TRACE(NONE, "firmware discard reason1: %u",
  3129. pdev->stats.tx.dropped.fw_discard_reason1);
  3130. DP_TRACE(NONE, "firmware discard reason2: %u",
  3131. pdev->stats.tx.dropped.fw_discard_reason2);
  3132. DP_TRACE(NONE, "firmware discard reason3: %u",
  3133. pdev->stats.tx.dropped.fw_discard_reason3);
  3134. DP_TRACE(NONE, "peer_invalid: %u",
  3135. pdev->soc->stats.tx.tx_invalid_peer.num);
  3136. DP_TRACE(NONE, "Tx packets sent per interrupt:");
  3137. DP_TRACE(NONE, "Single Packet: %u",
  3138. pdev->stats.tx_comp_histogram.pkts_1);
  3139. DP_TRACE(NONE, "2-20 Packets: %u",
  3140. pdev->stats.tx_comp_histogram.pkts_2_20);
  3141. DP_TRACE(NONE, "21-40 Packets: %u",
  3142. pdev->stats.tx_comp_histogram.pkts_21_40);
  3143. DP_TRACE(NONE, "41-60 Packets: %u",
  3144. pdev->stats.tx_comp_histogram.pkts_41_60);
  3145. DP_TRACE(NONE, "61-80 Packets: %u",
  3146. pdev->stats.tx_comp_histogram.pkts_61_80);
  3147. DP_TRACE(NONE, "81-100 Packets: %u",
  3148. pdev->stats.tx_comp_histogram.pkts_81_100);
  3149. DP_TRACE(NONE, "101-200 Packets: %u",
  3150. pdev->stats.tx_comp_histogram.pkts_101_200);
  3151. DP_TRACE(NONE, " 201+ Packets: %u",
  3152. pdev->stats.tx_comp_histogram.pkts_201_plus);
  3153. DP_TRACE(NONE, "Rx path statistics");
  3154. DP_TRACE(NONE, "delivered %u msdus ( %u bytes),",
  3155. pdev->stats.rx.to_stack.num,
  3156. pdev->stats.rx.to_stack.bytes);
  3157. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  3158. DP_TRACE(NONE, "received on reo[%d] %u msdus ( %u bytes),",
  3159. i, pdev->stats.rx.rcvd_reo[i].num,
  3160. pdev->stats.rx.rcvd_reo[i].bytes);
  3161. DP_TRACE(NONE, "intra-bss packets %u msdus ( %u bytes),",
  3162. pdev->stats.rx.intra_bss.pkts.num,
  3163. pdev->stats.rx.intra_bss.pkts.bytes);
  3164. DP_TRACE(NONE, "raw packets %u msdus ( %u bytes),",
  3165. pdev->stats.rx.raw.num,
  3166. pdev->stats.rx.raw.bytes);
  3167. DP_TRACE(NONE, "dropped: error %u msdus",
  3168. pdev->stats.rx.err.mic_err);
  3169. DP_TRACE(NONE, "peer invalid %u",
  3170. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  3171. DP_TRACE(NONE, "Reo Statistics");
  3172. DP_TRACE(NONE, "rbm error: %u msdus",
  3173. pdev->soc->stats.rx.err.invalid_rbm);
  3174. DP_TRACE(NONE, "hal ring access fail: %u msdus",
  3175. pdev->soc->stats.rx.err.hal_ring_access_fail);
  3176. DP_TRACE(NONE, "Reo errors");
  3177. for (error_code = 0; error_code < REO_ERROR_TYPE_MAX;
  3178. error_code++) {
  3179. DP_TRACE(NONE, "Reo error number (%u): %u msdus",
  3180. error_code,
  3181. pdev->soc->stats.rx.err.reo_error[error_code]);
  3182. }
  3183. for (error_code = 0; error_code < MAX_RXDMA_ERRORS;
  3184. error_code++) {
  3185. DP_TRACE(NONE, "Rxdma error number (%u): %u msdus",
  3186. error_code,
  3187. pdev->soc->stats.rx.err
  3188. .rxdma_error[error_code]);
  3189. }
  3190. DP_TRACE(NONE, "Rx packets reaped per interrupt:");
  3191. DP_TRACE(NONE, "Single Packet: %u",
  3192. pdev->stats.rx_ind_histogram.pkts_1);
  3193. DP_TRACE(NONE, "2-20 Packets: %u",
  3194. pdev->stats.rx_ind_histogram.pkts_2_20);
  3195. DP_TRACE(NONE, "21-40 Packets: %u",
  3196. pdev->stats.rx_ind_histogram.pkts_21_40);
  3197. DP_TRACE(NONE, "41-60 Packets: %u",
  3198. pdev->stats.rx_ind_histogram.pkts_41_60);
  3199. DP_TRACE(NONE, "61-80 Packets: %u",
  3200. pdev->stats.rx_ind_histogram.pkts_61_80);
  3201. DP_TRACE(NONE, "81-100 Packets: %u",
  3202. pdev->stats.rx_ind_histogram.pkts_81_100);
  3203. DP_TRACE(NONE, "101-200 Packets: %u",
  3204. pdev->stats.rx_ind_histogram.pkts_101_200);
  3205. DP_TRACE(NONE, " 201+ Packets: %u",
  3206. pdev->stats.rx_ind_histogram.pkts_201_plus);
  3207. }
  3208. }
  3209. /*
  3210. * dp_txrx_dump_stats() - Dump statistics
  3211. * @value - Statistics option
  3212. */
  3213. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value)
  3214. {
  3215. struct dp_soc *soc =
  3216. (struct dp_soc *)psoc;
  3217. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3218. if (!soc) {
  3219. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3220. "%s: soc is NULL", __func__);
  3221. return QDF_STATUS_E_INVAL;
  3222. }
  3223. switch (value) {
  3224. case CDP_TXRX_PATH_STATS:
  3225. dp_txrx_path_stats(soc);
  3226. break;
  3227. case CDP_RX_RING_STATS:
  3228. dp_print_per_ring_stats(soc);
  3229. break;
  3230. case CDP_TXRX_TSO_STATS:
  3231. /* TODO: NOT IMPLEMENTED */
  3232. break;
  3233. case CDP_DUMP_TX_FLOW_POOL_INFO:
  3234. /* TODO: NOT IMPLEMENTED */
  3235. break;
  3236. case CDP_TXRX_DESC_STATS:
  3237. /* TODO: NOT IMPLEMENTED */
  3238. break;
  3239. default:
  3240. status = QDF_STATUS_E_INVAL;
  3241. break;
  3242. }
  3243. return status;
  3244. }
  3245. static struct cdp_wds_ops dp_ops_wds = {
  3246. .vdev_set_wds = dp_vdev_set_wds,
  3247. };
  3248. static struct cdp_cmn_ops dp_ops_cmn = {
  3249. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  3250. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  3251. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  3252. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  3253. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  3254. .txrx_peer_create = dp_peer_create_wifi3,
  3255. .txrx_peer_setup = dp_peer_setup_wifi3,
  3256. .txrx_peer_teardown = NULL,
  3257. .txrx_peer_delete = dp_peer_delete_wifi3,
  3258. .txrx_vdev_register = dp_vdev_register_wifi3,
  3259. .txrx_soc_detach = dp_soc_detach_wifi3,
  3260. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  3261. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  3262. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  3263. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  3264. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  3265. .delba_process = dp_delba_process_wifi3,
  3266. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  3267. .flush_cache_rx_queue = NULL,
  3268. /* TODO: get API's for dscp-tid need to be added*/
  3269. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  3270. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  3271. .txrx_stats = dp_txrx_stats,
  3272. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  3273. .display_stats = dp_txrx_dump_stats,
  3274. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  3275. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  3276. /* TODO: Add other functions */
  3277. };
  3278. static struct cdp_ctrl_ops dp_ops_ctrl = {
  3279. .txrx_peer_authorize = dp_peer_authorize,
  3280. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  3281. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  3282. #ifdef MESH_MODE_SUPPORT
  3283. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  3284. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  3285. #endif
  3286. .txrx_set_vdev_param = dp_set_vdev_param,
  3287. .txrx_peer_set_nawds = dp_peer_set_nawds,
  3288. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  3289. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  3290. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  3291. .txrx_update_filter_neighbour_peers =
  3292. dp_update_filter_neighbour_peers,
  3293. /* TODO: Add other functions */
  3294. };
  3295. static struct cdp_me_ops dp_ops_me = {
  3296. #ifdef ATH_SUPPORT_IQUE
  3297. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  3298. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  3299. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  3300. #endif
  3301. };
  3302. static struct cdp_mon_ops dp_ops_mon = {
  3303. .txrx_monitor_set_filter_ucast_data = NULL,
  3304. .txrx_monitor_set_filter_mcast_data = NULL,
  3305. .txrx_monitor_set_filter_non_data = NULL,
  3306. .txrx_monitor_get_filter_ucast_data = NULL,
  3307. .txrx_monitor_get_filter_mcast_data = NULL,
  3308. .txrx_monitor_get_filter_non_data = NULL,
  3309. .txrx_reset_monitor_mode = NULL,
  3310. };
  3311. static struct cdp_host_stats_ops dp_ops_host_stats = {
  3312. .txrx_host_stats_get = dp_print_host_stats,
  3313. .txrx_per_peer_stats = dp_get_peer_stats,
  3314. /* TODO */
  3315. };
  3316. static struct cdp_raw_ops dp_ops_raw = {
  3317. /* TODO */
  3318. };
  3319. #ifdef CONFIG_WIN
  3320. static struct cdp_pflow_ops dp_ops_pflow = {
  3321. /* TODO */
  3322. };
  3323. #endif /* CONFIG_WIN */
  3324. #ifndef CONFIG_WIN
  3325. static struct cdp_misc_ops dp_ops_misc = {
  3326. .get_opmode = dp_get_opmode,
  3327. };
  3328. static struct cdp_flowctl_ops dp_ops_flowctl = {
  3329. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3330. };
  3331. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  3332. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3333. };
  3334. static struct cdp_ipa_ops dp_ops_ipa = {
  3335. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3336. };
  3337. static struct cdp_lro_ops dp_ops_lro = {
  3338. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3339. };
  3340. /**
  3341. * dp_dummy_bus_suspend() - dummy bus suspend op
  3342. *
  3343. * FIXME - This is a placeholder for the actual logic!
  3344. *
  3345. * Return: QDF_STATUS_SUCCESS
  3346. */
  3347. inline QDF_STATUS dp_dummy_bus_suspend(void)
  3348. {
  3349. return QDF_STATUS_SUCCESS;
  3350. }
  3351. /**
  3352. * dp_dummy_bus_resume() - dummy bus resume
  3353. *
  3354. * FIXME - This is a placeholder for the actual logic!
  3355. *
  3356. * Return: QDF_STATUS_SUCCESS
  3357. */
  3358. inline QDF_STATUS dp_dummy_bus_resume(void)
  3359. {
  3360. return QDF_STATUS_SUCCESS;
  3361. }
  3362. static struct cdp_bus_ops dp_ops_bus = {
  3363. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3364. .bus_suspend = dp_dummy_bus_suspend,
  3365. .bus_resume = dp_dummy_bus_resume
  3366. };
  3367. static struct cdp_ocb_ops dp_ops_ocb = {
  3368. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3369. };
  3370. static struct cdp_throttle_ops dp_ops_throttle = {
  3371. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3372. };
  3373. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  3374. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3375. };
  3376. static struct cdp_cfg_ops dp_ops_cfg = {
  3377. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3378. };
  3379. static struct cdp_peer_ops dp_ops_peer = {
  3380. .register_peer = dp_register_peer,
  3381. .clear_peer = dp_clear_peer,
  3382. .find_peer_by_addr = dp_find_peer_by_addr,
  3383. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  3384. .local_peer_id = dp_local_peer_id,
  3385. .peer_find_by_local_id = dp_peer_find_by_local_id,
  3386. .peer_state_update = dp_peer_state_update,
  3387. .get_vdevid = dp_get_vdevid,
  3388. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  3389. .get_vdev_for_peer = dp_get_vdev_for_peer,
  3390. .get_peer_state = dp_get_peer_state,
  3391. .last_assoc_received = dp_get_last_assoc_received,
  3392. .last_disassoc_received = dp_get_last_disassoc_received,
  3393. .last_deauth_received = dp_get_last_deauth_received,
  3394. };
  3395. #endif
  3396. static struct cdp_ops dp_txrx_ops = {
  3397. .cmn_drv_ops = &dp_ops_cmn,
  3398. .ctrl_ops = &dp_ops_ctrl,
  3399. .me_ops = &dp_ops_me,
  3400. .mon_ops = &dp_ops_mon,
  3401. .host_stats_ops = &dp_ops_host_stats,
  3402. .wds_ops = &dp_ops_wds,
  3403. .raw_ops = &dp_ops_raw,
  3404. #ifdef CONFIG_WIN
  3405. .pflow_ops = &dp_ops_pflow,
  3406. #endif /* CONFIG_WIN */
  3407. #ifndef CONFIG_WIN
  3408. .misc_ops = &dp_ops_misc,
  3409. .cfg_ops = &dp_ops_cfg,
  3410. .flowctl_ops = &dp_ops_flowctl,
  3411. .l_flowctl_ops = &dp_ops_l_flowctl,
  3412. .ipa_ops = &dp_ops_ipa,
  3413. .lro_ops = &dp_ops_lro,
  3414. .bus_ops = &dp_ops_bus,
  3415. .ocb_ops = &dp_ops_ocb,
  3416. .peer_ops = &dp_ops_peer,
  3417. .throttle_ops = &dp_ops_throttle,
  3418. .mob_stats_ops = &dp_ops_mob_stats,
  3419. #endif
  3420. };
  3421. /*
  3422. * dp_soc_attach_wifi3() - Attach txrx SOC
  3423. * @osif_soc: Opaque SOC handle from OSIF/HDD
  3424. * @htc_handle: Opaque HTC handle
  3425. * @hif_handle: Opaque HIF handle
  3426. * @qdf_osdev: QDF device
  3427. *
  3428. * Return: DP SOC handle on success, NULL on failure
  3429. */
  3430. /*
  3431. * Local prototype added to temporarily address warning caused by
  3432. * -Wmissing-prototypes. A more correct solution, namely to expose
  3433. * a prototype in an appropriate header file, will come later.
  3434. */
  3435. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3436. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3437. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  3438. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3439. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3440. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  3441. {
  3442. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  3443. if (!soc) {
  3444. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3445. FL("DP SOC memory allocation failed"));
  3446. goto fail0;
  3447. }
  3448. soc->cdp_soc.ops = &dp_txrx_ops;
  3449. soc->cdp_soc.ol_ops = ol_ops;
  3450. soc->osif_soc = osif_soc;
  3451. soc->osdev = qdf_osdev;
  3452. soc->hif_handle = hif_handle;
  3453. soc->psoc = psoc;
  3454. soc->hal_soc = hif_get_hal_handle(hif_handle);
  3455. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  3456. soc->hal_soc, qdf_osdev);
  3457. if (!soc->htt_handle) {
  3458. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3459. FL("HTT attach failed"));
  3460. goto fail1;
  3461. }
  3462. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  3463. if (!soc->wlan_cfg_ctx) {
  3464. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3465. FL("wlan_cfg_soc_attach failed"));
  3466. goto fail2;
  3467. }
  3468. qdf_spinlock_create(&soc->peer_ref_mutex);
  3469. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3470. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3471. return (void *)soc;
  3472. fail2:
  3473. htt_soc_detach(soc->htt_handle);
  3474. fail1:
  3475. qdf_mem_free(soc);
  3476. fail0:
  3477. return NULL;
  3478. }