rouleur.c 67 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. };
  43. /* TODO: Check on the step values */
  44. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  45. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  46. static int rouleur_handle_post_irq(void *data);
  47. static int rouleur_reset(struct device *dev, int val);
  48. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  49. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  66. };
  67. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  68. .name = "rouleur",
  69. .irqs = ROULEUR_IRQs,
  70. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  71. .num_regs = 3,
  72. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  73. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  74. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  75. .use_ack = 1,
  76. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  77. .runtime_pm = false,
  78. .handle_post_irq = rouleur_handle_post_irq,
  79. .irq_drv_data = NULL,
  80. };
  81. static int rouleur_handle_post_irq(void *data)
  82. {
  83. struct rouleur_priv *rouleur = data;
  84. u32 status1 = 0, status2 = 0, status3 = 0;
  85. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  88. rouleur->tx_swr_dev->slave_irq_pending =
  89. ((status1 || status2 || status3) ? true : false);
  90. return IRQ_HANDLED;
  91. }
  92. static int rouleur_init_reg(struct snd_soc_component *component)
  93. {
  94. /* Enable surge protection */
  95. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  96. 0xC0, 0xC0);
  97. /* Disable mic bias pull down */
  98. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  99. 0x01, 0x00);
  100. return 0;
  101. }
  102. static int rouleur_set_port_params(struct snd_soc_component *component,
  103. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  104. u8 *ch_mask, u32 *ch_rate,
  105. u8 *port_type, u8 path)
  106. {
  107. int i, j;
  108. u8 num_ports = 0;
  109. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  110. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  111. switch (path) {
  112. case CODEC_RX:
  113. map = &rouleur->rx_port_mapping;
  114. num_ports = rouleur->num_rx_ports;
  115. break;
  116. case CODEC_TX:
  117. map = &rouleur->tx_port_mapping;
  118. num_ports = rouleur->num_tx_ports;
  119. break;
  120. default:
  121. dev_err(component->dev, "%s Invalid path: %d\n",
  122. __func__, path);
  123. return -EINVAL;
  124. }
  125. for (i = 0; i <= num_ports; i++) {
  126. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  127. if ((*map)[i][j].slave_port_type == slv_prt_type)
  128. goto found;
  129. }
  130. }
  131. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  132. __func__, slv_prt_type);
  133. return -EINVAL;
  134. found:
  135. *port_id = i;
  136. *num_ch = (*map)[i][j].num_ch;
  137. *ch_mask = (*map)[i][j].ch_mask;
  138. *ch_rate = (*map)[i][j].ch_rate;
  139. *port_type = (*map)[i][j].master_port_type;
  140. return 0;
  141. }
  142. static int rouleur_parse_port_mapping(struct device *dev,
  143. char *prop, u8 path)
  144. {
  145. u32 *dt_array, map_size, map_length;
  146. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  147. u32 slave_port_type, master_port_type;
  148. u32 i, ch_iter = 0;
  149. int ret = 0;
  150. u8 *num_ports = NULL;
  151. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  152. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  153. switch (path) {
  154. case CODEC_RX:
  155. map = &rouleur->rx_port_mapping;
  156. num_ports = &rouleur->num_rx_ports;
  157. break;
  158. case CODEC_TX:
  159. map = &rouleur->tx_port_mapping;
  160. num_ports = &rouleur->num_tx_ports;
  161. break;
  162. default:
  163. dev_err(dev, "%s Invalid path: %d\n",
  164. __func__, path);
  165. return -EINVAL;
  166. }
  167. if (!of_find_property(dev->of_node, prop,
  168. &map_size)) {
  169. dev_err(dev, "missing port mapping prop %s\n", prop);
  170. ret = -EINVAL;
  171. goto err;
  172. }
  173. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  174. dt_array = kzalloc(map_size, GFP_KERNEL);
  175. if (!dt_array) {
  176. ret = -ENOMEM;
  177. goto err;
  178. }
  179. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  180. NUM_SWRS_DT_PARAMS * map_length);
  181. if (ret) {
  182. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  183. __func__, prop);
  184. ret = -EINVAL;
  185. goto err_pdata_fail;
  186. }
  187. for (i = 0; i < map_length; i++) {
  188. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  189. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  190. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  191. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  192. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  193. if (port_num != old_port_num)
  194. ch_iter = 0;
  195. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  196. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  197. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  198. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  199. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  200. old_port_num = port_num;
  201. }
  202. *num_ports = port_num;
  203. err_pdata_fail:
  204. kfree(dt_array);
  205. err:
  206. return ret;
  207. }
  208. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  209. u8 slv_port_type, u8 enable)
  210. {
  211. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  212. u8 port_id;
  213. u8 num_ch;
  214. u8 ch_mask;
  215. u32 ch_rate;
  216. u8 port_type;
  217. u8 num_port = 1;
  218. int ret = 0;
  219. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  220. &num_ch, &ch_mask, &ch_rate,
  221. &port_type, CODEC_TX);
  222. if (ret) {
  223. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  224. __func__, ret);
  225. return ret;
  226. }
  227. if (enable)
  228. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  229. num_port, &ch_mask, &ch_rate,
  230. &num_ch, &port_type);
  231. else
  232. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  233. num_port, &ch_mask, &port_type);
  234. return ret;
  235. }
  236. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  237. u8 slv_port_type, u8 enable)
  238. {
  239. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  240. u8 port_id;
  241. u8 num_ch;
  242. u8 ch_mask;
  243. u32 ch_rate;
  244. u8 port_type;
  245. u8 num_port = 1;
  246. int ret = 0;
  247. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  248. &num_ch, &ch_mask, &ch_rate,
  249. &port_type, CODEC_RX);
  250. if (ret) {
  251. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  252. __func__, ret);
  253. return ret;
  254. }
  255. if (enable)
  256. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  257. num_port, &ch_mask, &ch_rate,
  258. &num_ch, &port_type);
  259. else
  260. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  261. num_port, &ch_mask, &port_type);
  262. return ret;
  263. }
  264. static int rouleur_global_mbias_enable(struct snd_soc_component *component)
  265. {
  266. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  267. mutex_lock(&rouleur->main_bias_lock);
  268. if (rouleur->mbias_cnt == 0) {
  269. snd_soc_component_update_bits(component,
  270. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  271. snd_soc_component_update_bits(component,
  272. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  273. usleep_range(1000, 1100);
  274. }
  275. rouleur->mbias_cnt++;
  276. mutex_unlock(&rouleur->main_bias_lock);
  277. return 0;
  278. }
  279. static int rouleur_global_mbias_disable(struct snd_soc_component *component)
  280. {
  281. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  282. mutex_lock(&rouleur->main_bias_lock);
  283. if (rouleur->mbias_cnt == 0) {
  284. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  285. mutex_unlock(&rouleur->main_bias_lock);
  286. return 0;
  287. }
  288. rouleur->mbias_cnt--;
  289. if (rouleur->mbias_cnt == 0) {
  290. snd_soc_component_update_bits(component,
  291. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  292. snd_soc_component_update_bits(component,
  293. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  294. }
  295. mutex_unlock(&rouleur->main_bias_lock);
  296. return 0;
  297. }
  298. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  299. {
  300. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  301. mutex_lock(&rouleur->rx_clk_lock);
  302. if (rouleur->rx_clk_cnt == 0) {
  303. snd_soc_component_update_bits(component,
  304. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  305. snd_soc_component_update_bits(component,
  306. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  307. usleep_range(5000, 5100);
  308. rouleur_global_mbias_enable(component);
  309. snd_soc_component_update_bits(component,
  310. ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x11);
  311. snd_soc_component_update_bits(component,
  312. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  313. snd_soc_component_update_bits(component,
  314. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  315. usleep_range(500, 510);
  316. }
  317. rouleur->rx_clk_cnt++;
  318. mutex_unlock(&rouleur->rx_clk_lock);
  319. return 0;
  320. }
  321. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  322. {
  323. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  324. mutex_lock(&rouleur->rx_clk_lock);
  325. if (rouleur->rx_clk_cnt == 0) {
  326. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  327. mutex_unlock(&rouleur->rx_clk_lock);
  328. return 0;
  329. }
  330. rouleur->rx_clk_cnt--;
  331. if (rouleur->rx_clk_cnt == 0) {
  332. snd_soc_component_update_bits(component,
  333. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  334. snd_soc_component_update_bits(component,
  335. ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x00);
  336. snd_soc_component_update_bits(component,
  337. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  338. rouleur_global_mbias_disable(component);
  339. snd_soc_component_update_bits(component,
  340. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  341. snd_soc_component_update_bits(component,
  342. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  343. }
  344. mutex_unlock(&rouleur->rx_clk_lock);
  345. return 0;
  346. }
  347. /*
  348. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  349. * @component: handle to snd_soc_component *
  350. *
  351. * return rouleur_mbhc handle or error code in case of failure
  352. */
  353. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  354. {
  355. struct rouleur_priv *rouleur;
  356. if (!component) {
  357. pr_err("%s: Invalid params, NULL component\n", __func__);
  358. return NULL;
  359. }
  360. rouleur = snd_soc_component_get_drvdata(component);
  361. if (!rouleur) {
  362. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  363. return NULL;
  364. }
  365. return rouleur->mbhc;
  366. }
  367. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  368. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  369. struct snd_kcontrol *kcontrol,
  370. int event)
  371. {
  372. struct snd_soc_component *component =
  373. snd_soc_dapm_to_component(w->dapm);
  374. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  375. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  376. w->name, event);
  377. switch (event) {
  378. case SND_SOC_DAPM_PRE_PMU:
  379. rouleur_rx_clk_enable(component);
  380. snd_soc_component_update_bits(component,
  381. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  382. 0x02, 0x02);
  383. snd_soc_component_update_bits(component,
  384. ROULEUR_SWR_HPHPA_HD2,
  385. 0x38, 0x38);
  386. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  387. break;
  388. case SND_SOC_DAPM_POST_PMU:
  389. if (rouleur->comp1_enable) {
  390. snd_soc_component_update_bits(component,
  391. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  392. 0x02, 0x02);
  393. if (rouleur->comp2_enable)
  394. snd_soc_component_update_bits(component,
  395. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  396. 0x01, 0x01);
  397. /*
  398. * 5ms sleep is required after COMP is enabled as per
  399. * HW requirement
  400. */
  401. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  402. usleep_range(5000, 5100);
  403. clear_bit(HPH_COMP_DELAY,
  404. &rouleur->status_mask);
  405. }
  406. } else {
  407. snd_soc_component_update_bits(component,
  408. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  409. 0x02, 0x00);
  410. }
  411. snd_soc_component_update_bits(component,
  412. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  413. 0x7C, 0x7C);
  414. snd_soc_component_update_bits(component,
  415. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  416. 0x04, 0x04);
  417. snd_soc_component_update_bits(component,
  418. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  419. break;
  420. case SND_SOC_DAPM_POST_PMD:
  421. snd_soc_component_update_bits(component,
  422. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  423. 0x01, 0x00);
  424. break;
  425. }
  426. return 0;
  427. }
  428. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  429. struct snd_kcontrol *kcontrol,
  430. int event)
  431. {
  432. struct snd_soc_component *component =
  433. snd_soc_dapm_to_component(w->dapm);
  434. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  435. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  436. w->name, event);
  437. switch (event) {
  438. case SND_SOC_DAPM_PRE_PMU:
  439. rouleur_rx_clk_enable(component);
  440. snd_soc_component_update_bits(component,
  441. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  442. 0x02, 0x02);
  443. snd_soc_component_update_bits(component,
  444. ROULEUR_SWR_HPHPA_HD2,
  445. 0x07, 0x07);
  446. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  447. break;
  448. case SND_SOC_DAPM_POST_PMU:
  449. if (rouleur->comp2_enable) {
  450. snd_soc_component_update_bits(component,
  451. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  452. 0x01, 0x01);
  453. if (rouleur->comp1_enable)
  454. snd_soc_component_update_bits(component,
  455. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  456. 0x02, 0x02);
  457. /*
  458. * 5ms sleep is required after COMP is enabled as per
  459. * HW requirement
  460. */
  461. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  462. usleep_range(5000, 5100);
  463. clear_bit(HPH_COMP_DELAY,
  464. &rouleur->status_mask);
  465. }
  466. } else {
  467. snd_soc_component_update_bits(component,
  468. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  469. 0x01, 0x00);
  470. }
  471. snd_soc_component_update_bits(component,
  472. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  473. 0x7C, 0x7C);
  474. snd_soc_component_update_bits(component,
  475. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  476. 0x08, 0x08);
  477. snd_soc_component_update_bits(component,
  478. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  479. break;
  480. case SND_SOC_DAPM_POST_PMD:
  481. snd_soc_component_update_bits(component,
  482. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  483. break;
  484. }
  485. return 0;
  486. }
  487. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  488. struct snd_kcontrol *kcontrol,
  489. int event)
  490. {
  491. struct snd_soc_component *component =
  492. snd_soc_dapm_to_component(w->dapm);
  493. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  494. w->name, event);
  495. switch (event) {
  496. case SND_SOC_DAPM_PRE_PMU:
  497. rouleur_rx_clk_enable(component);
  498. snd_soc_component_update_bits(component,
  499. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  500. 0x7C, 0x7C);
  501. snd_soc_component_update_bits(component,
  502. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  503. 0x01, 0x01);
  504. snd_soc_component_update_bits(component,
  505. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  506. 0x04, 0x04);
  507. break;
  508. case SND_SOC_DAPM_POST_PMD:
  509. snd_soc_component_update_bits(component,
  510. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  511. 0x01, 0x00);
  512. break;
  513. };
  514. return 0;
  515. }
  516. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  517. struct snd_kcontrol *kcontrol,
  518. int event)
  519. {
  520. struct snd_soc_component *component =
  521. snd_soc_dapm_to_component(w->dapm);
  522. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  523. int ret = 0;
  524. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  525. w->name, event);
  526. switch (event) {
  527. case SND_SOC_DAPM_PRE_PMU:
  528. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  529. rouleur->rx_swr_dev->dev_num,
  530. true);
  531. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  532. usleep_range(5000, 5100);
  533. snd_soc_component_update_bits(component,
  534. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  535. 0x03, 0x03);
  536. break;
  537. case SND_SOC_DAPM_POST_PMU:
  538. /*
  539. * 5ms sleep is required after PA is enabled as per
  540. * HW requirement.
  541. */
  542. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  543. usleep_range(5000, 5100);
  544. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  545. }
  546. if (rouleur->update_wcd_event)
  547. rouleur->update_wcd_event(rouleur->handle,
  548. WCD_BOLERO_EVT_RX_MUTE,
  549. (WCD_RX2 << 0x10));
  550. wcd_enable_irq(&rouleur->irq_info,
  551. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  552. break;
  553. case SND_SOC_DAPM_PRE_PMD:
  554. wcd_disable_irq(&rouleur->irq_info,
  555. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  556. if (rouleur->update_wcd_event)
  557. rouleur->update_wcd_event(rouleur->handle,
  558. WCD_BOLERO_EVT_RX_MUTE,
  559. (WCD_RX2 << 0x10 | 0x1));
  560. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  561. WCD_EVENT_PRE_HPHR_PA_OFF,
  562. &rouleur->mbhc->wcd_mbhc);
  563. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  564. break;
  565. case SND_SOC_DAPM_POST_PMD:
  566. /*
  567. * 7ms sleep is required after PA is disabled as per
  568. * HW requirement. If compander is disabled, then
  569. * 20ms delay is required.
  570. */
  571. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  572. usleep_range(5000, 5100);
  573. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  574. }
  575. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  576. WCD_EVENT_POST_HPHR_PA_OFF,
  577. &rouleur->mbhc->wcd_mbhc);
  578. snd_soc_component_update_bits(component,
  579. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  580. 0x03, 0x00);
  581. break;
  582. };
  583. return ret;
  584. }
  585. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  586. struct snd_kcontrol *kcontrol,
  587. int event)
  588. {
  589. struct snd_soc_component *component =
  590. snd_soc_dapm_to_component(w->dapm);
  591. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  592. int ret = 0;
  593. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  594. w->name, event);
  595. switch (event) {
  596. case SND_SOC_DAPM_PRE_PMU:
  597. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  598. rouleur->rx_swr_dev->dev_num,
  599. true);
  600. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  601. usleep_range(5000, 5100);
  602. snd_soc_component_update_bits(component,
  603. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  604. 0x03, 0x03);
  605. break;
  606. case SND_SOC_DAPM_POST_PMU:
  607. /*
  608. * 5ms sleep is required after PA is enabled as per
  609. * HW requirement.
  610. */
  611. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  612. usleep_range(5000, 5100);
  613. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  614. }
  615. if (rouleur->update_wcd_event)
  616. rouleur->update_wcd_event(rouleur->handle,
  617. WCD_BOLERO_EVT_RX_MUTE,
  618. (WCD_RX1 << 0x10));
  619. wcd_enable_irq(&rouleur->irq_info,
  620. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  621. break;
  622. case SND_SOC_DAPM_PRE_PMD:
  623. wcd_disable_irq(&rouleur->irq_info,
  624. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  625. if (rouleur->update_wcd_event)
  626. rouleur->update_wcd_event(rouleur->handle,
  627. WCD_BOLERO_EVT_RX_MUTE,
  628. (WCD_RX1 << 0x10 | 0x1));
  629. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  630. WCD_EVENT_PRE_HPHL_PA_OFF,
  631. &rouleur->mbhc->wcd_mbhc);
  632. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  633. break;
  634. case SND_SOC_DAPM_POST_PMD:
  635. /*
  636. * 5ms sleep is required after PA is disabled as per
  637. * HW requirement.
  638. */
  639. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  640. usleep_range(5000, 5100);
  641. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  642. }
  643. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  644. WCD_EVENT_POST_HPHL_PA_OFF,
  645. &rouleur->mbhc->wcd_mbhc);
  646. snd_soc_component_update_bits(component,
  647. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  648. 0x03, 0x00);
  649. break;
  650. };
  651. return ret;
  652. }
  653. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  654. struct snd_kcontrol *kcontrol,
  655. int event)
  656. {
  657. struct snd_soc_component *component =
  658. snd_soc_dapm_to_component(w->dapm);
  659. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  660. int ret = 0;
  661. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  662. w->name, event);
  663. switch (event) {
  664. case SND_SOC_DAPM_PRE_PMU:
  665. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  666. rouleur->rx_swr_dev->dev_num,
  667. true);
  668. usleep_range(5000, 5100);
  669. snd_soc_component_update_bits(component,
  670. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  671. 0x03, 0x03);
  672. break;
  673. case SND_SOC_DAPM_POST_PMU:
  674. if (rouleur->update_wcd_event)
  675. rouleur->update_wcd_event(rouleur->handle,
  676. WCD_BOLERO_EVT_RX_MUTE,
  677. (WCD_RX1 << 0x10));
  678. wcd_enable_irq(&rouleur->irq_info,
  679. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  680. break;
  681. case SND_SOC_DAPM_PRE_PMD:
  682. wcd_disable_irq(&rouleur->irq_info,
  683. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  684. if (rouleur->update_wcd_event)
  685. rouleur->update_wcd_event(rouleur->handle,
  686. WCD_BOLERO_EVT_RX_MUTE,
  687. (WCD_RX1 << 0x10 | 0x1));
  688. break;
  689. case SND_SOC_DAPM_POST_PMD:
  690. usleep_range(5000, 5100);
  691. snd_soc_component_update_bits(component,
  692. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  693. 0x03, 0x00);
  694. };
  695. return ret;
  696. }
  697. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  698. struct snd_kcontrol *kcontrol,
  699. int event)
  700. {
  701. struct snd_soc_component *component =
  702. snd_soc_dapm_to_component(w->dapm);
  703. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  704. int ret = 0;
  705. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  706. w->name, event);
  707. switch (event) {
  708. case SND_SOC_DAPM_PRE_PMU:
  709. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  710. rouleur->rx_swr_dev->dev_num,
  711. true);
  712. snd_soc_component_update_bits(component,
  713. ROULEUR_ANA_COMBOPA_CTL,
  714. 0x40, 0x40);
  715. usleep_range(5000, 5100);
  716. snd_soc_component_update_bits(component,
  717. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  718. 0x03, 0x03);
  719. break;
  720. case SND_SOC_DAPM_POST_PMU:
  721. if (rouleur->update_wcd_event)
  722. rouleur->update_wcd_event(rouleur->handle,
  723. WCD_BOLERO_EVT_RX_MUTE,
  724. (WCD_RX1 << 0x10));
  725. wcd_enable_irq(&rouleur->irq_info,
  726. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  727. break;
  728. case SND_SOC_DAPM_PRE_PMD:
  729. wcd_disable_irq(&rouleur->irq_info,
  730. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  731. if (rouleur->update_wcd_event)
  732. rouleur->update_wcd_event(rouleur->handle,
  733. WCD_BOLERO_EVT_RX_MUTE,
  734. (WCD_RX1 << 0x10 | 0x1));
  735. break;
  736. case SND_SOC_DAPM_POST_PMD:
  737. snd_soc_component_update_bits(component,
  738. ROULEUR_ANA_COMBOPA_CTL,
  739. 0x40, 0x00);
  740. usleep_range(5000, 5100);
  741. snd_soc_component_update_bits(component,
  742. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  743. 0x03, 0x00);
  744. };
  745. return ret;
  746. }
  747. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  748. struct snd_kcontrol *kcontrol,
  749. int event)
  750. {
  751. struct snd_soc_component *component =
  752. snd_soc_dapm_to_component(w->dapm);
  753. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  754. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  755. w->name, event);
  756. switch (event) {
  757. case SND_SOC_DAPM_PRE_PMU:
  758. rouleur_rx_connect_port(component, HPH_L, true);
  759. if (rouleur->comp1_enable)
  760. rouleur_rx_connect_port(component, COMP_L, true);
  761. break;
  762. case SND_SOC_DAPM_POST_PMD:
  763. rouleur_rx_connect_port(component, HPH_L, false);
  764. if (rouleur->comp1_enable)
  765. rouleur_rx_connect_port(component, COMP_L, false);
  766. rouleur_rx_clk_disable(component);
  767. break;
  768. };
  769. return 0;
  770. }
  771. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  772. struct snd_kcontrol *kcontrol, int event)
  773. {
  774. struct snd_soc_component *component =
  775. snd_soc_dapm_to_component(w->dapm);
  776. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  777. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  778. w->name, event);
  779. switch (event) {
  780. case SND_SOC_DAPM_PRE_PMU:
  781. rouleur_rx_connect_port(component, HPH_R, true);
  782. if (rouleur->comp2_enable)
  783. rouleur_rx_connect_port(component, COMP_R, true);
  784. break;
  785. case SND_SOC_DAPM_POST_PMD:
  786. rouleur_rx_connect_port(component, HPH_R, false);
  787. if (rouleur->comp2_enable)
  788. rouleur_rx_connect_port(component, COMP_R, false);
  789. rouleur_rx_clk_disable(component);
  790. break;
  791. };
  792. return 0;
  793. }
  794. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  795. struct snd_kcontrol *kcontrol,
  796. int event)
  797. {
  798. struct snd_soc_component *component =
  799. snd_soc_dapm_to_component(w->dapm);
  800. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  801. u16 dmic_clk_reg;
  802. s32 *dmic_clk_cnt;
  803. unsigned int dmic;
  804. char *wname;
  805. int ret = 0;
  806. wname = strpbrk(w->name, "01");
  807. if (!wname) {
  808. dev_err(component->dev, "%s: widget not found\n", __func__);
  809. return -EINVAL;
  810. }
  811. ret = kstrtouint(wname, 10, &dmic);
  812. if (ret < 0) {
  813. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  814. __func__);
  815. return -EINVAL;
  816. }
  817. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  818. w->name, event);
  819. switch (dmic) {
  820. case 0:
  821. case 1:
  822. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  823. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  824. break;
  825. default:
  826. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  827. __func__);
  828. return -EINVAL;
  829. };
  830. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  831. __func__, event, dmic, *dmic_clk_cnt);
  832. switch (event) {
  833. case SND_SOC_DAPM_PRE_PMU:
  834. snd_soc_component_update_bits(component,
  835. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  836. snd_soc_component_update_bits(component,
  837. dmic_clk_reg, 0x08, 0x08);
  838. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  839. break;
  840. case SND_SOC_DAPM_POST_PMD:
  841. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  842. snd_soc_component_update_bits(component,
  843. dmic_clk_reg, 0x08, 0x00);
  844. snd_soc_component_update_bits(component,
  845. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  846. break;
  847. };
  848. return 0;
  849. }
  850. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  851. struct snd_kcontrol *kcontrol,
  852. int event)
  853. {
  854. struct snd_soc_component *component =
  855. snd_soc_dapm_to_component(w->dapm);
  856. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  857. int ret = 0;
  858. switch (event) {
  859. case SND_SOC_DAPM_PRE_PMU:
  860. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  861. rouleur->tx_swr_dev->dev_num,
  862. true);
  863. break;
  864. case SND_SOC_DAPM_POST_PMD:
  865. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  866. rouleur->tx_swr_dev->dev_num,
  867. false);
  868. break;
  869. };
  870. return ret;
  871. }
  872. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  873. struct snd_kcontrol *kcontrol,
  874. int event)
  875. {
  876. struct snd_soc_component *component =
  877. snd_soc_dapm_to_component(w->dapm);
  878. struct rouleur_priv *rouleur =
  879. snd_soc_component_get_drvdata(component);
  880. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  881. w->name, event);
  882. switch (event) {
  883. case SND_SOC_DAPM_PRE_PMU:
  884. /* Enable BCS for Headset mic */
  885. if (w->shift == 1 && !(snd_soc_component_read32(component,
  886. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  887. rouleur_tx_connect_port(component, MBHC, true);
  888. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  889. }
  890. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  891. rouleur_global_mbias_enable(component);
  892. if (w->shift)
  893. snd_soc_component_update_bits(component,
  894. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  895. 0x30, 0x30);
  896. else
  897. snd_soc_component_update_bits(component,
  898. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  899. 0x03, 0x03);
  900. break;
  901. case SND_SOC_DAPM_POST_PMD:
  902. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  903. if (w->shift == 1 &&
  904. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  905. rouleur_tx_connect_port(component, MBHC, false);
  906. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  907. }
  908. if (w->shift)
  909. snd_soc_component_update_bits(component,
  910. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  911. 0x30, 0x00);
  912. else
  913. snd_soc_component_update_bits(component,
  914. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  915. 0x03, 0x00);
  916. rouleur_global_mbias_disable(component);
  917. break;
  918. };
  919. return 0;
  920. }
  921. /*
  922. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  923. * @micb_mv: micbias in mv
  924. *
  925. * return register value converted
  926. */
  927. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  928. {
  929. /* min micbias voltage is 1.6V and maximum is 2.85V */
  930. if (micb_mv < 1600 || micb_mv > 2850) {
  931. pr_err("%s: unsupported micbias voltage\n", __func__);
  932. return -EINVAL;
  933. }
  934. return (micb_mv - 1600) / 50;
  935. }
  936. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  937. /*
  938. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  939. * @component: handle to snd_soc_component *
  940. * @req_volt: micbias voltage to be set
  941. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  942. *
  943. * return 0 if adjustment is success or error code in case of failure
  944. */
  945. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  946. int req_volt, int micb_num)
  947. {
  948. struct rouleur_priv *rouleur =
  949. snd_soc_component_get_drvdata(component);
  950. int cur_vout_ctl, req_vout_ctl;
  951. int micb_reg, micb_val, micb_en;
  952. int ret = 0;
  953. int pullup_mask;
  954. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  955. switch (micb_num) {
  956. case MIC_BIAS_1:
  957. micb_val = snd_soc_component_read32(component, micb_reg);
  958. micb_en = (micb_val & 0x40) >> 6;
  959. pullup_mask = 0x20;
  960. break;
  961. case MIC_BIAS_2:
  962. micb_val = snd_soc_component_read32(component, micb_reg);
  963. micb_en = (micb_val & 0x04) >> 2;
  964. pullup_mask = 0x02;
  965. break;
  966. case MIC_BIAS_3:
  967. default:
  968. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  969. __func__, micb_num);
  970. return -EINVAL;
  971. }
  972. mutex_lock(&rouleur->micb_lock);
  973. /*
  974. * If requested micbias voltage is same as current micbias
  975. * voltage, then just return. Otherwise, adjust voltage as
  976. * per requested value. If micbias is already enabled, then
  977. * to avoid slow micbias ramp-up or down enable pull-up
  978. * momentarily, change the micbias value and then re-enable
  979. * micbias.
  980. */
  981. cur_vout_ctl = (snd_soc_component_read32(component,
  982. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  983. cur_vout_ctl = cur_vout_ctl >> 3;
  984. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  985. if (req_vout_ctl < 0) {
  986. ret = -EINVAL;
  987. goto exit;
  988. }
  989. if (cur_vout_ctl == req_vout_ctl) {
  990. ret = 0;
  991. goto exit;
  992. }
  993. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  994. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  995. req_volt, micb_en);
  996. if (micb_en == 0x1)
  997. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  998. pullup_mask);
  999. snd_soc_component_update_bits(component,
  1000. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1001. if (micb_en == 0x1) {
  1002. snd_soc_component_update_bits(component, micb_reg,
  1003. pullup_mask, 0x00);
  1004. /*
  1005. * Add 2ms delay as per HW requirement after enabling
  1006. * micbias
  1007. */
  1008. usleep_range(2000, 2100);
  1009. }
  1010. exit:
  1011. mutex_unlock(&rouleur->micb_lock);
  1012. return ret;
  1013. }
  1014. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1015. int rouleur_micbias_control(struct snd_soc_component *component,
  1016. int micb_num, int req, bool is_dapm)
  1017. {
  1018. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1019. int micb_index = micb_num - 1;
  1020. u16 micb_reg;
  1021. int pre_off_event = 0, post_off_event = 0;
  1022. int post_on_event = 0, post_dapm_off = 0;
  1023. int post_dapm_on = 0;
  1024. u8 pullup_mask = 0, enable_mask = 0;
  1025. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1026. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1027. __func__, micb_index);
  1028. return -EINVAL;
  1029. }
  1030. switch (micb_num) {
  1031. case MIC_BIAS_1:
  1032. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1033. pullup_mask = 0x20;
  1034. enable_mask = 0x40;
  1035. break;
  1036. case MIC_BIAS_2:
  1037. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1038. pullup_mask = 0x02;
  1039. enable_mask = 0x04;
  1040. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1041. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1042. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1043. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1044. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1045. break;
  1046. case MIC_BIAS_3:
  1047. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1048. pullup_mask = 0x02;
  1049. break;
  1050. default:
  1051. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1052. __func__, micb_num);
  1053. return -EINVAL;
  1054. };
  1055. mutex_lock(&rouleur->micb_lock);
  1056. switch (req) {
  1057. case MICB_PULLUP_ENABLE:
  1058. rouleur->pullup_ref[micb_index]++;
  1059. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1060. (rouleur->micb_ref[micb_index] == 0))
  1061. snd_soc_component_update_bits(component, micb_reg,
  1062. pullup_mask, pullup_mask);
  1063. break;
  1064. case MICB_PULLUP_DISABLE:
  1065. if (rouleur->pullup_ref[micb_index] > 0)
  1066. rouleur->pullup_ref[micb_index]--;
  1067. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1068. (rouleur->micb_ref[micb_index] == 0))
  1069. snd_soc_component_update_bits(component, micb_reg,
  1070. pullup_mask, 0x00);
  1071. break;
  1072. case MICB_ENABLE:
  1073. rouleur->micb_ref[micb_index]++;
  1074. if (rouleur->micb_ref[micb_index] == 1) {
  1075. rouleur_global_mbias_enable(component);
  1076. snd_soc_component_update_bits(component, micb_reg,
  1077. 0x80, 0x80);
  1078. snd_soc_component_update_bits(component,
  1079. micb_reg, enable_mask, enable_mask);
  1080. if (post_on_event)
  1081. blocking_notifier_call_chain(
  1082. &rouleur->mbhc->notifier, post_on_event,
  1083. &rouleur->mbhc->wcd_mbhc);
  1084. }
  1085. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1086. blocking_notifier_call_chain(
  1087. &rouleur->mbhc->notifier, post_dapm_on,
  1088. &rouleur->mbhc->wcd_mbhc);
  1089. break;
  1090. case MICB_DISABLE:
  1091. if (rouleur->micb_ref[micb_index] > 0)
  1092. rouleur->micb_ref[micb_index]--;
  1093. if ((rouleur->micb_ref[micb_index] == 0) &&
  1094. (rouleur->pullup_ref[micb_index] == 0)) {
  1095. if (pre_off_event && rouleur->mbhc)
  1096. blocking_notifier_call_chain(
  1097. &rouleur->mbhc->notifier, pre_off_event,
  1098. &rouleur->mbhc->wcd_mbhc);
  1099. snd_soc_component_update_bits(component, micb_reg,
  1100. enable_mask, 0x00);
  1101. snd_soc_component_update_bits(component, micb_reg,
  1102. 0x80, 0x00);
  1103. rouleur_global_mbias_disable(component);
  1104. if (post_off_event && rouleur->mbhc)
  1105. blocking_notifier_call_chain(
  1106. &rouleur->mbhc->notifier,
  1107. post_off_event,
  1108. &rouleur->mbhc->wcd_mbhc);
  1109. }
  1110. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1111. blocking_notifier_call_chain(
  1112. &rouleur->mbhc->notifier, post_dapm_off,
  1113. &rouleur->mbhc->wcd_mbhc);
  1114. break;
  1115. };
  1116. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1117. __func__, micb_num, rouleur->micb_ref[micb_index],
  1118. rouleur->pullup_ref[micb_index]);
  1119. mutex_unlock(&rouleur->micb_lock);
  1120. return 0;
  1121. }
  1122. EXPORT_SYMBOL(rouleur_micbias_control);
  1123. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1124. bool bcs_disable)
  1125. {
  1126. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1127. if (rouleur->update_wcd_event) {
  1128. if (bcs_disable)
  1129. rouleur->update_wcd_event(rouleur->handle,
  1130. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1131. else
  1132. rouleur->update_wcd_event(rouleur->handle,
  1133. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1134. }
  1135. }
  1136. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1137. {
  1138. int ret = 0;
  1139. uint8_t devnum = 0;
  1140. int num_retry = NUM_ATTEMPTS;
  1141. do {
  1142. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1143. if (ret) {
  1144. dev_err(&swr_dev->dev,
  1145. "%s get devnum %d for dev addr %lx failed\n",
  1146. __func__, devnum, swr_dev->addr);
  1147. /* retry after 1ms */
  1148. usleep_range(1000, 1010);
  1149. }
  1150. } while (ret && --num_retry);
  1151. swr_dev->dev_num = devnum;
  1152. return 0;
  1153. }
  1154. static int rouleur_event_notify(struct notifier_block *block,
  1155. unsigned long val,
  1156. void *data)
  1157. {
  1158. u16 event = (val & 0xffff);
  1159. int ret = 0;
  1160. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1161. struct snd_soc_component *component = rouleur->component;
  1162. struct wcd_mbhc *mbhc;
  1163. switch (event) {
  1164. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1165. snd_soc_component_update_bits(component,
  1166. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1167. 0xC0, 0x00);
  1168. snd_soc_component_update_bits(component,
  1169. ROULEUR_ANA_COMBOPA_CTL,
  1170. 0x40, 0x00);
  1171. snd_soc_component_update_bits(component,
  1172. ROULEUR_ANA_COMBOPA_CTL,
  1173. 0x80, 0x00);
  1174. snd_soc_component_update_bits(component,
  1175. ROULEUR_ANA_COMBOPA_CTL,
  1176. 0x40, 0x40);
  1177. snd_soc_component_update_bits(component,
  1178. ROULEUR_ANA_COMBOPA_CTL,
  1179. 0x80, 0x00);
  1180. break;
  1181. case BOLERO_WCD_EVT_SSR_DOWN:
  1182. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1183. mbhc = &rouleur->mbhc->wcd_mbhc;
  1184. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1185. rouleur_reset(rouleur->dev, 0x01);
  1186. break;
  1187. case BOLERO_WCD_EVT_SSR_UP:
  1188. rouleur_reset(rouleur->dev, 0x00);
  1189. /* allow reset to take effect */
  1190. usleep_range(10000, 10010);
  1191. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1192. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1193. rouleur_init_reg(component);
  1194. regcache_mark_dirty(rouleur->regmap);
  1195. regcache_sync(rouleur->regmap);
  1196. /* Initialize MBHC module */
  1197. mbhc = &rouleur->mbhc->wcd_mbhc;
  1198. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1199. if (ret) {
  1200. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1201. __func__);
  1202. } else {
  1203. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1204. }
  1205. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1206. break;
  1207. default:
  1208. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1209. event);
  1210. break;
  1211. }
  1212. return 0;
  1213. }
  1214. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1215. int event)
  1216. {
  1217. struct snd_soc_component *component =
  1218. snd_soc_dapm_to_component(w->dapm);
  1219. int micb_num;
  1220. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1221. __func__, w->name, event);
  1222. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1223. micb_num = MIC_BIAS_1;
  1224. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1225. micb_num = MIC_BIAS_2;
  1226. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1227. micb_num = MIC_BIAS_3;
  1228. else
  1229. return -EINVAL;
  1230. switch (event) {
  1231. case SND_SOC_DAPM_PRE_PMU:
  1232. /* Micbias LD0 enable not supported for MicBias 3*/
  1233. if (micb_num == MIC_BIAS_3)
  1234. rouleur_micbias_control(component, micb_num,
  1235. MICB_PULLUP_ENABLE, true);
  1236. else
  1237. rouleur_micbias_control(component, micb_num,
  1238. MICB_ENABLE, true);
  1239. break;
  1240. case SND_SOC_DAPM_POST_PMU:
  1241. usleep_range(1000, 1100);
  1242. break;
  1243. case SND_SOC_DAPM_POST_PMD:
  1244. if (micb_num == MIC_BIAS_3)
  1245. rouleur_micbias_control(component, micb_num,
  1246. MICB_PULLUP_DISABLE, true);
  1247. else
  1248. rouleur_micbias_control(component, micb_num,
  1249. MICB_DISABLE, true);
  1250. break;
  1251. };
  1252. return 0;
  1253. }
  1254. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1255. struct snd_kcontrol *kcontrol,
  1256. int event)
  1257. {
  1258. return __rouleur_codec_enable_micbias(w, event);
  1259. }
  1260. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1261. int event)
  1262. {
  1263. struct snd_soc_component *component =
  1264. snd_soc_dapm_to_component(w->dapm);
  1265. int micb_num;
  1266. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1267. __func__, w->name, event);
  1268. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1269. micb_num = MIC_BIAS_1;
  1270. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1271. micb_num = MIC_BIAS_2;
  1272. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1273. micb_num = MIC_BIAS_3;
  1274. else
  1275. return -EINVAL;
  1276. switch (event) {
  1277. case SND_SOC_DAPM_PRE_PMU:
  1278. rouleur_micbias_control(component, micb_num,
  1279. MICB_PULLUP_ENABLE, true);
  1280. break;
  1281. case SND_SOC_DAPM_POST_PMU:
  1282. /* 1 msec delay as per HW requirement */
  1283. usleep_range(1000, 1100);
  1284. break;
  1285. case SND_SOC_DAPM_POST_PMD:
  1286. rouleur_micbias_control(component, micb_num,
  1287. MICB_PULLUP_DISABLE, true);
  1288. break;
  1289. };
  1290. return 0;
  1291. }
  1292. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1293. struct snd_kcontrol *kcontrol,
  1294. int event)
  1295. {
  1296. return __rouleur_codec_enable_micbias_pullup(w, event);
  1297. }
  1298. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1299. struct snd_ctl_elem_value *ucontrol)
  1300. {
  1301. struct snd_soc_component *component =
  1302. snd_soc_kcontrol_component(kcontrol);
  1303. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1304. bool hphr;
  1305. struct soc_multi_mixer_control *mc;
  1306. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1307. hphr = mc->shift;
  1308. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1309. rouleur->comp1_enable;
  1310. return 0;
  1311. }
  1312. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1313. struct snd_ctl_elem_value *ucontrol)
  1314. {
  1315. struct snd_soc_component *component =
  1316. snd_soc_kcontrol_component(kcontrol);
  1317. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1318. int value = ucontrol->value.integer.value[0];
  1319. bool hphr;
  1320. struct soc_multi_mixer_control *mc;
  1321. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1322. hphr = mc->shift;
  1323. if (hphr)
  1324. rouleur->comp2_enable = value;
  1325. else
  1326. rouleur->comp1_enable = value;
  1327. return 0;
  1328. }
  1329. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1330. struct snd_kcontrol *kcontrol,
  1331. int event)
  1332. {
  1333. struct snd_soc_component *component =
  1334. snd_soc_dapm_to_component(w->dapm);
  1335. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1336. struct rouleur_pdata *pdata = NULL;
  1337. int ret = 0;
  1338. pdata = dev_get_platdata(rouleur->dev);
  1339. if (!pdata) {
  1340. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1341. return -EINVAL;
  1342. }
  1343. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1344. w->name, event);
  1345. switch (event) {
  1346. case SND_SOC_DAPM_PRE_PMU:
  1347. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1348. dev_dbg(component->dev,
  1349. "%s: vpos already in enabled state\n",
  1350. __func__);
  1351. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1352. return 0;
  1353. }
  1354. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1355. rouleur->supplies,
  1356. pdata->regulator,
  1357. pdata->num_supplies,
  1358. "cdc-pa-vpos");
  1359. if (ret == -EINVAL) {
  1360. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1361. __func__);
  1362. return ret;
  1363. }
  1364. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1365. /*
  1366. * 200us sleep is required after LDO15 is enabled as per
  1367. * HW requirement
  1368. */
  1369. usleep_range(200, 250);
  1370. break;
  1371. case SND_SOC_DAPM_POST_PMD:
  1372. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1373. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1374. rouleur->rx_swr_dev->dev_num,
  1375. false);
  1376. break;
  1377. }
  1378. return 0;
  1379. }
  1380. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1381. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1382. rouleur_get_compander, rouleur_set_compander),
  1383. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1384. rouleur_get_compander, rouleur_set_compander),
  1385. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1386. line_gain),
  1387. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1388. line_gain),
  1389. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1390. analog_gain),
  1391. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1392. analog_gain),
  1393. };
  1394. static const struct snd_kcontrol_new adc1_switch[] = {
  1395. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1396. };
  1397. static const struct snd_kcontrol_new adc2_switch[] = {
  1398. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1399. };
  1400. static const struct snd_kcontrol_new dmic1_switch[] = {
  1401. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1402. };
  1403. static const struct snd_kcontrol_new dmic2_switch[] = {
  1404. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1405. };
  1406. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1407. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1408. };
  1409. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1410. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1411. };
  1412. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1413. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1414. };
  1415. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1416. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1417. };
  1418. static const char * const adc2_mux_text[] = {
  1419. "INP2", "INP3"
  1420. };
  1421. static const struct soc_enum adc2_enum =
  1422. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1423. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1424. static const struct snd_kcontrol_new tx_adc2_mux =
  1425. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1426. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1427. /*input widgets*/
  1428. SND_SOC_DAPM_INPUT("AMIC1"),
  1429. SND_SOC_DAPM_INPUT("AMIC2"),
  1430. SND_SOC_DAPM_INPUT("AMIC3"),
  1431. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1432. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1433. /*tx widgets*/
  1434. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1435. rouleur_codec_enable_adc,
  1436. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1437. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1438. rouleur_codec_enable_adc,
  1439. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1440. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1441. &tx_adc2_mux),
  1442. /*tx mixers*/
  1443. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1444. adc1_switch, ARRAY_SIZE(adc1_switch),
  1445. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1446. SND_SOC_DAPM_POST_PMD),
  1447. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1448. adc2_switch, ARRAY_SIZE(adc2_switch),
  1449. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1450. SND_SOC_DAPM_POST_PMD),
  1451. /* micbias widgets*/
  1452. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1453. rouleur_codec_enable_micbias,
  1454. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1455. SND_SOC_DAPM_POST_PMD),
  1456. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1457. rouleur_codec_enable_micbias,
  1458. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1459. SND_SOC_DAPM_POST_PMD),
  1460. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1461. rouleur_codec_enable_micbias,
  1462. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1463. SND_SOC_DAPM_POST_PMD),
  1464. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1465. rouleur_codec_enable_pa_vpos,
  1466. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1467. /*rx widgets*/
  1468. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1469. rouleur_codec_enable_ear_pa,
  1470. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1471. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1472. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1473. rouleur_codec_enable_lo_pa,
  1474. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1475. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1476. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1477. 0, rouleur_codec_enable_hphl_pa,
  1478. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1479. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1480. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1481. 0, rouleur_codec_enable_hphr_pa,
  1482. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1483. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1484. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1485. rouleur_codec_hphl_dac_event,
  1486. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1487. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1488. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1489. rouleur_codec_hphr_dac_event,
  1490. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1491. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1492. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1493. rouleur_codec_ear_lo_dac_event,
  1494. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1495. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1496. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1497. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1498. SND_SOC_DAPM_POST_PMD),
  1499. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1500. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1501. SND_SOC_DAPM_POST_PMD),
  1502. /* rx mixer widgets*/
  1503. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1504. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1505. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1506. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1507. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1508. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1509. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1510. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1511. /*output widgets tx*/
  1512. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1513. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1514. /*output widgets rx*/
  1515. SND_SOC_DAPM_OUTPUT("EAR"),
  1516. SND_SOC_DAPM_OUTPUT("LO"),
  1517. SND_SOC_DAPM_OUTPUT("HPHL"),
  1518. SND_SOC_DAPM_OUTPUT("HPHR"),
  1519. /* micbias pull up widgets*/
  1520. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1521. rouleur_codec_enable_micbias_pullup,
  1522. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1523. SND_SOC_DAPM_POST_PMD),
  1524. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1525. rouleur_codec_enable_micbias_pullup,
  1526. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1527. SND_SOC_DAPM_POST_PMD),
  1528. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1529. rouleur_codec_enable_micbias_pullup,
  1530. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1531. SND_SOC_DAPM_POST_PMD),
  1532. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1533. rouleur_codec_enable_dmic,
  1534. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1535. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1536. rouleur_codec_enable_dmic,
  1537. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1538. /*tx mixer widgets*/
  1539. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1540. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1541. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1542. SND_SOC_DAPM_POST_PMD),
  1543. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1544. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1545. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1546. SND_SOC_DAPM_POST_PMD),
  1547. /*output widgets*/
  1548. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1549. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1550. };
  1551. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1552. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1553. {"ADC1_MIXER", "Switch", "ADC1"},
  1554. {"ADC1", NULL, "AMIC1"},
  1555. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1556. {"ADC2_MIXER", "Switch", "ADC2"},
  1557. {"ADC2", NULL, "ADC2 MUX"},
  1558. {"ADC2 MUX", "INP3", "AMIC3"},
  1559. {"ADC2 MUX", "INP2", "AMIC2"},
  1560. {"IN1_HPHL", NULL, "PA_VPOS"},
  1561. {"RX1", NULL, "IN1_HPHL"},
  1562. {"RDAC1", NULL, "RX1"},
  1563. {"HPHL_RDAC", "Switch", "RDAC1"},
  1564. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1565. {"HPHL", NULL, "HPHL PGA"},
  1566. {"IN2_HPHR", NULL, "PA_VPOS"},
  1567. {"RX2", NULL, "IN2_HPHR"},
  1568. {"RDAC2", NULL, "RX2"},
  1569. {"HPHR_RDAC", "Switch", "RDAC2"},
  1570. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1571. {"HPHR", NULL, "HPHR PGA"},
  1572. {"RDAC3", NULL, "RX1"},
  1573. {"EAR_RDAC", "Switch", "RDAC3"},
  1574. {"EAR PGA", NULL, "EAR_RDAC"},
  1575. {"EAR", NULL, "EAR PGA"},
  1576. {"RDAC3", NULL, "RX1"},
  1577. {"LO_RDAC", "Switch", "RDAC3"},
  1578. {"LO PGA", NULL, "LO_RDAC"},
  1579. {"LO", NULL, "LO PGA"},
  1580. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1581. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1582. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1583. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1584. };
  1585. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1586. void *file_private_data,
  1587. struct file *file,
  1588. char __user *buf, size_t count,
  1589. loff_t pos)
  1590. {
  1591. struct rouleur_priv *priv;
  1592. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1593. int len = 0;
  1594. priv = (struct rouleur_priv *) entry->private_data;
  1595. if (!priv) {
  1596. pr_err("%s: rouleur priv is null\n", __func__);
  1597. return -EINVAL;
  1598. }
  1599. switch (priv->version) {
  1600. case ROULEUR_VERSION_1_0:
  1601. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1602. break;
  1603. default:
  1604. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1605. }
  1606. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1607. }
  1608. static struct snd_info_entry_ops rouleur_info_ops = {
  1609. .read = rouleur_version_read,
  1610. };
  1611. /*
  1612. * rouleur_info_create_codec_entry - creates rouleur module
  1613. * @codec_root: The parent directory
  1614. * @component: component instance
  1615. *
  1616. * Creates rouleur module and version entry under the given
  1617. * parent directory.
  1618. *
  1619. * Return: 0 on success or negative error code on failure.
  1620. */
  1621. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1622. struct snd_soc_component *component)
  1623. {
  1624. struct snd_info_entry *version_entry;
  1625. struct rouleur_priv *priv;
  1626. struct snd_soc_card *card;
  1627. if (!codec_root || !component)
  1628. return -EINVAL;
  1629. priv = snd_soc_component_get_drvdata(component);
  1630. if (priv->entry) {
  1631. dev_dbg(priv->dev,
  1632. "%s:rouleur module already created\n", __func__);
  1633. return 0;
  1634. }
  1635. card = component->card;
  1636. priv->entry = snd_info_create_subdir(codec_root->module,
  1637. "rouleur", codec_root);
  1638. if (!priv->entry) {
  1639. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1640. __func__);
  1641. return -ENOMEM;
  1642. }
  1643. version_entry = snd_info_create_card_entry(card->snd_card,
  1644. "version",
  1645. priv->entry);
  1646. if (!version_entry) {
  1647. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1648. __func__);
  1649. return -ENOMEM;
  1650. }
  1651. version_entry->private_data = priv;
  1652. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1653. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1654. version_entry->c.ops = &rouleur_info_ops;
  1655. if (snd_info_register(version_entry) < 0) {
  1656. snd_info_free_entry(version_entry);
  1657. return -ENOMEM;
  1658. }
  1659. priv->version_entry = version_entry;
  1660. return 0;
  1661. }
  1662. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1663. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1664. struct rouleur_pdata *pdata)
  1665. {
  1666. int vout_ctl = 0;
  1667. int rc = 0;
  1668. if (!pdata) {
  1669. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1670. return -ENODEV;
  1671. }
  1672. /* set micbias voltage */
  1673. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1674. if (vout_ctl < 0) {
  1675. rc = -EINVAL;
  1676. goto done;
  1677. }
  1678. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1679. 0xF8, vout_ctl << 3);
  1680. done:
  1681. return rc;
  1682. }
  1683. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1684. {
  1685. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1686. struct snd_soc_dapm_context *dapm =
  1687. snd_soc_component_get_dapm(component);
  1688. int ret = -EINVAL;
  1689. dev_info(component->dev, "%s()\n", __func__);
  1690. rouleur = snd_soc_component_get_drvdata(component);
  1691. if (!rouleur)
  1692. return -EINVAL;
  1693. rouleur->component = component;
  1694. snd_soc_component_init_regmap(component, rouleur->regmap);
  1695. rouleur->fw_data = devm_kzalloc(component->dev,
  1696. sizeof(*(rouleur->fw_data)),
  1697. GFP_KERNEL);
  1698. if (!rouleur->fw_data) {
  1699. dev_err(component->dev, "Failed to allocate fw_data\n");
  1700. ret = -ENOMEM;
  1701. goto done;
  1702. }
  1703. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1704. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1705. WCD9XXX_CODEC_HWDEP_NODE, component);
  1706. if (ret < 0) {
  1707. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1708. goto done;
  1709. }
  1710. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1711. if (ret) {
  1712. pr_err("%s: mbhc initialization failed\n", __func__);
  1713. goto done;
  1714. }
  1715. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1716. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1717. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1718. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1719. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1720. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1721. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1722. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1723. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1724. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1725. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1726. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1727. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1728. snd_soc_dapm_sync(dapm);
  1729. rouleur_init_reg(component);
  1730. rouleur->version = ROULEUR_VERSION_1_0;
  1731. /* Register event notifier */
  1732. rouleur->nblock.notifier_call = rouleur_event_notify;
  1733. if (rouleur->register_notifier) {
  1734. ret = rouleur->register_notifier(rouleur->handle,
  1735. &rouleur->nblock,
  1736. true);
  1737. if (ret) {
  1738. dev_err(component->dev,
  1739. "%s: Failed to register notifier %d\n",
  1740. __func__, ret);
  1741. return ret;
  1742. }
  1743. }
  1744. done:
  1745. return ret;
  1746. }
  1747. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1748. {
  1749. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1750. if (!rouleur)
  1751. return;
  1752. if (rouleur->register_notifier)
  1753. rouleur->register_notifier(rouleur->handle,
  1754. &rouleur->nblock,
  1755. false);
  1756. }
  1757. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1758. .name = DRV_NAME,
  1759. .probe = rouleur_soc_codec_probe,
  1760. .remove = rouleur_soc_codec_remove,
  1761. .controls = rouleur_snd_controls,
  1762. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1763. .dapm_widgets = rouleur_dapm_widgets,
  1764. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1765. .dapm_routes = rouleur_audio_map,
  1766. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1767. };
  1768. #ifdef CONFIG_PM_SLEEP
  1769. static int rouleur_suspend(struct device *dev)
  1770. {
  1771. struct rouleur_priv *rouleur = NULL;
  1772. int ret = 0;
  1773. struct rouleur_pdata *pdata = NULL;
  1774. if (!dev)
  1775. return -ENODEV;
  1776. rouleur = dev_get_drvdata(dev);
  1777. if (!rouleur)
  1778. return -EINVAL;
  1779. pdata = dev_get_platdata(rouleur->dev);
  1780. if (!pdata) {
  1781. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1782. return -EINVAL;
  1783. }
  1784. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1785. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1786. rouleur->supplies,
  1787. pdata->regulator,
  1788. pdata->num_supplies,
  1789. "cdc-pa-vpos");
  1790. if (ret == -EINVAL) {
  1791. dev_err(dev, "%s: pa vpos is not disabled\n",
  1792. __func__);
  1793. return 0;
  1794. }
  1795. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1796. }
  1797. return 0;
  1798. }
  1799. static int rouleur_resume(struct device *dev)
  1800. {
  1801. return 0;
  1802. }
  1803. #endif
  1804. static int rouleur_reset(struct device *dev, int reset_val)
  1805. {
  1806. struct rouleur_priv *rouleur = NULL;
  1807. if (!dev)
  1808. return -ENODEV;
  1809. rouleur = dev_get_drvdata(dev);
  1810. if (!rouleur)
  1811. return -EINVAL;
  1812. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1813. return 0;
  1814. }
  1815. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1816. u32 *val)
  1817. {
  1818. int rc = 0;
  1819. rc = of_property_read_u32(dev->of_node, name, val);
  1820. if (rc)
  1821. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1822. __func__, name, dev->of_node->full_name);
  1823. return rc;
  1824. }
  1825. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1826. struct rouleur_micbias_setting *mb)
  1827. {
  1828. u32 prop_val = 0;
  1829. int rc = 0;
  1830. /* MB1 */
  1831. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1832. NULL)) {
  1833. rc = rouleur_read_of_property_u32(dev,
  1834. "qcom,cdc-micbias1-mv",
  1835. &prop_val);
  1836. if (!rc)
  1837. mb->micb1_mv = prop_val;
  1838. } else {
  1839. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1840. __func__);
  1841. }
  1842. /* MB2 */
  1843. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1844. NULL)) {
  1845. rc = rouleur_read_of_property_u32(dev,
  1846. "qcom,cdc-micbias2-mv",
  1847. &prop_val);
  1848. if (!rc)
  1849. mb->micb2_mv = prop_val;
  1850. } else {
  1851. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1852. __func__);
  1853. }
  1854. /* MB3 */
  1855. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1856. NULL)) {
  1857. rc = rouleur_read_of_property_u32(dev,
  1858. "qcom,cdc-micbias3-mv",
  1859. &prop_val);
  1860. if (!rc)
  1861. mb->micb3_mv = prop_val;
  1862. } else {
  1863. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1864. __func__);
  1865. }
  1866. }
  1867. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  1868. {
  1869. struct rouleur_pdata *pdata = NULL;
  1870. u32 reg;
  1871. int ret = 0;
  1872. pdata = kzalloc(sizeof(struct rouleur_pdata),
  1873. GFP_KERNEL);
  1874. if (!pdata)
  1875. return NULL;
  1876. pdata->spmi_np = of_parse_phandle(dev->of_node,
  1877. "qcom,pmic-spmi-node", 0);
  1878. if (!pdata->spmi_np) {
  1879. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1880. __func__, "qcom,pmic-spmi-node",
  1881. dev->of_node->full_name);
  1882. kfree(pdata);
  1883. return NULL;
  1884. }
  1885. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  1886. if (ret) {
  1887. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  1888. __func__, ret);
  1889. kfree(pdata);
  1890. return NULL;
  1891. }
  1892. pdata->reset_reg = reg;
  1893. /* Parse power supplies */
  1894. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1895. &pdata->num_supplies);
  1896. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1897. dev_err(dev, "%s: no power supplies defined for codec\n",
  1898. __func__);
  1899. kfree(pdata);
  1900. return NULL;
  1901. }
  1902. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1903. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1904. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  1905. return pdata;
  1906. }
  1907. static int rouleur_wakeup(void *handle, bool enable)
  1908. {
  1909. struct rouleur_priv *priv;
  1910. if (!handle) {
  1911. pr_err("%s: NULL handle\n", __func__);
  1912. return -EINVAL;
  1913. }
  1914. priv = (struct rouleur_priv *)handle;
  1915. if (!priv->tx_swr_dev) {
  1916. pr_err("%s: tx swr dev is NULL\n", __func__);
  1917. return -EINVAL;
  1918. }
  1919. if (enable)
  1920. return swr_device_wakeup_vote(priv->tx_swr_dev);
  1921. else
  1922. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  1923. }
  1924. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  1925. {
  1926. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  1927. __func__, irq);
  1928. return IRQ_HANDLED;
  1929. }
  1930. static int rouleur_bind(struct device *dev)
  1931. {
  1932. int ret = 0, i = 0;
  1933. struct rouleur_priv *rouleur = NULL;
  1934. struct rouleur_pdata *pdata = NULL;
  1935. struct wcd_ctrl_platform_data *plat_data = NULL;
  1936. struct platform_device *pdev = NULL;
  1937. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  1938. if (!rouleur)
  1939. return -ENOMEM;
  1940. dev_set_drvdata(dev, rouleur);
  1941. pdata = rouleur_populate_dt_data(dev);
  1942. if (!pdata) {
  1943. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1944. kfree(rouleur);
  1945. return -EINVAL;
  1946. }
  1947. rouleur->dev = dev;
  1948. rouleur->dev->platform_data = pdata;
  1949. pdev = of_find_device_by_node(pdata->spmi_np);
  1950. if (!pdev) {
  1951. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  1952. __func__);
  1953. ret = -EINVAL;
  1954. goto err_bind_all;
  1955. }
  1956. rouleur->spmi_dev = &pdev->dev;
  1957. rouleur->reset_reg = pdata->reset_reg;
  1958. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  1959. pdata->regulator, pdata->num_supplies);
  1960. if (!rouleur->supplies) {
  1961. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1962. __func__);
  1963. goto err_bind_all;
  1964. }
  1965. plat_data = dev_get_platdata(dev->parent);
  1966. if (!plat_data) {
  1967. dev_err(dev, "%s: platform data from parent is NULL\n",
  1968. __func__);
  1969. ret = -EINVAL;
  1970. goto err_bind_all;
  1971. }
  1972. rouleur->handle = (void *)plat_data->handle;
  1973. if (!rouleur->handle) {
  1974. dev_err(dev, "%s: handle is NULL\n", __func__);
  1975. ret = -EINVAL;
  1976. goto err_bind_all;
  1977. }
  1978. rouleur->update_wcd_event = plat_data->update_wcd_event;
  1979. if (!rouleur->update_wcd_event) {
  1980. dev_err(dev, "%s: update_wcd_event api is null!\n",
  1981. __func__);
  1982. ret = -EINVAL;
  1983. goto err_bind_all;
  1984. }
  1985. rouleur->register_notifier = plat_data->register_notifier;
  1986. if (!rouleur->register_notifier) {
  1987. dev_err(dev, "%s: register_notifier api is null!\n",
  1988. __func__);
  1989. ret = -EINVAL;
  1990. goto err_bind_all;
  1991. }
  1992. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  1993. pdata->regulator,
  1994. pdata->num_supplies);
  1995. if (ret) {
  1996. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1997. __func__);
  1998. goto err_bind_all;
  1999. }
  2000. rouleur_reset(dev, 0x01);
  2001. usleep_range(20, 30);
  2002. rouleur_reset(dev, 0x00);
  2003. /*
  2004. * Add 5msec delay to provide sufficient time for
  2005. * soundwire auto enumeration of slave devices as
  2006. * as per HW requirement.
  2007. */
  2008. usleep_range(5000, 5010);
  2009. rouleur->wakeup = rouleur_wakeup;
  2010. ret = component_bind_all(dev, rouleur);
  2011. if (ret) {
  2012. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2013. __func__, ret);
  2014. goto err_bind_all;
  2015. }
  2016. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2017. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2018. if (ret) {
  2019. dev_err(dev, "Failed to read port mapping\n");
  2020. goto err;
  2021. }
  2022. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2023. if (!rouleur->rx_swr_dev) {
  2024. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2025. __func__);
  2026. ret = -ENODEV;
  2027. goto err;
  2028. }
  2029. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2030. if (!rouleur->tx_swr_dev) {
  2031. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2032. __func__);
  2033. ret = -ENODEV;
  2034. goto err;
  2035. }
  2036. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2037. &rouleur_regmap_config);
  2038. if (!rouleur->regmap) {
  2039. dev_err(dev, "%s: Regmap init failed\n",
  2040. __func__);
  2041. goto err;
  2042. }
  2043. /* Set all interupts as edge triggered */
  2044. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2045. regmap_write(rouleur->regmap,
  2046. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2047. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2048. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2049. rouleur->irq_info.codec_name = "rouleur";
  2050. rouleur->irq_info.regmap = rouleur->regmap;
  2051. rouleur->irq_info.dev = dev;
  2052. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2053. if (ret) {
  2054. dev_err(dev, "%s: IRQ init failed: %d\n",
  2055. __func__, ret);
  2056. goto err;
  2057. }
  2058. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2059. mutex_init(&rouleur->micb_lock);
  2060. mutex_init(&rouleur->main_bias_lock);
  2061. mutex_init(&rouleur->rx_clk_lock);
  2062. ret = rouleur_set_micbias_data(rouleur, pdata);
  2063. if (ret < 0) {
  2064. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2065. goto err_irq;
  2066. }
  2067. /* Request for watchdog interrupt */
  2068. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2069. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2070. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2071. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2072. /* Disable watchdog interrupt for HPH */
  2073. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2074. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2075. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2076. NULL, 0);
  2077. if (ret) {
  2078. dev_err(dev, "%s: Codec registration failed\n",
  2079. __func__);
  2080. goto err_irq;
  2081. }
  2082. return ret;
  2083. err_irq:
  2084. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2085. mutex_destroy(&rouleur->micb_lock);
  2086. mutex_destroy(&rouleur->main_bias_lock);
  2087. mutex_destroy(&rouleur->rx_clk_lock);
  2088. err:
  2089. component_unbind_all(dev, rouleur);
  2090. err_bind_all:
  2091. dev_set_drvdata(dev, NULL);
  2092. kfree(pdata);
  2093. kfree(rouleur);
  2094. return ret;
  2095. }
  2096. static void rouleur_unbind(struct device *dev)
  2097. {
  2098. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2099. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2100. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2101. snd_soc_unregister_component(dev);
  2102. component_unbind_all(dev, rouleur);
  2103. mutex_destroy(&rouleur->micb_lock);
  2104. mutex_destroy(&rouleur->main_bias_lock);
  2105. mutex_destroy(&rouleur->rx_clk_lock);
  2106. dev_set_drvdata(dev, NULL);
  2107. kfree(pdata);
  2108. kfree(rouleur);
  2109. }
  2110. static const struct of_device_id rouleur_dt_match[] = {
  2111. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2112. {}
  2113. };
  2114. static const struct component_master_ops rouleur_comp_ops = {
  2115. .bind = rouleur_bind,
  2116. .unbind = rouleur_unbind,
  2117. };
  2118. static int rouleur_compare_of(struct device *dev, void *data)
  2119. {
  2120. return dev->of_node == data;
  2121. }
  2122. static void rouleur_release_of(struct device *dev, void *data)
  2123. {
  2124. of_node_put(data);
  2125. }
  2126. static int rouleur_add_slave_components(struct device *dev,
  2127. struct component_match **matchptr)
  2128. {
  2129. struct device_node *np, *rx_node, *tx_node;
  2130. np = dev->of_node;
  2131. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2132. if (!rx_node) {
  2133. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2134. return -ENODEV;
  2135. }
  2136. of_node_get(rx_node);
  2137. component_match_add_release(dev, matchptr,
  2138. rouleur_release_of,
  2139. rouleur_compare_of,
  2140. rx_node);
  2141. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2142. if (!tx_node) {
  2143. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2144. return -ENODEV;
  2145. }
  2146. of_node_get(tx_node);
  2147. component_match_add_release(dev, matchptr,
  2148. rouleur_release_of,
  2149. rouleur_compare_of,
  2150. tx_node);
  2151. return 0;
  2152. }
  2153. static int rouleur_probe(struct platform_device *pdev)
  2154. {
  2155. struct component_match *match = NULL;
  2156. int ret;
  2157. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2158. if (ret)
  2159. return ret;
  2160. return component_master_add_with_match(&pdev->dev,
  2161. &rouleur_comp_ops, match);
  2162. }
  2163. static int rouleur_remove(struct platform_device *pdev)
  2164. {
  2165. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2166. dev_set_drvdata(&pdev->dev, NULL);
  2167. return 0;
  2168. }
  2169. #ifdef CONFIG_PM_SLEEP
  2170. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2171. SET_SYSTEM_SLEEP_PM_OPS(
  2172. rouleur_suspend,
  2173. rouleur_resume
  2174. )
  2175. };
  2176. #endif
  2177. static struct platform_driver rouleur_codec_driver = {
  2178. .probe = rouleur_probe,
  2179. .remove = rouleur_remove,
  2180. .driver = {
  2181. .name = "rouleur_codec",
  2182. .owner = THIS_MODULE,
  2183. .of_match_table = of_match_ptr(rouleur_dt_match),
  2184. #ifdef CONFIG_PM_SLEEP
  2185. .pm = &rouleur_dev_pm_ops,
  2186. #endif
  2187. .suppress_bind_attrs = true,
  2188. },
  2189. };
  2190. module_platform_driver(rouleur_codec_driver);
  2191. MODULE_DESCRIPTION("Rouleur Codec driver");
  2192. MODULE_LICENSE("GPL v2");