dsi_panel.c 123 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. /**
  19. * topology is currently defined by a set of following 3 values:
  20. * 1. num of layer mixers
  21. * 2. num of compression encoders
  22. * 3. num of interfaces
  23. */
  24. #define TOPOLOGY_SET_LEN 3
  25. #define MAX_TOPOLOGY 5
  26. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  27. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  28. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  29. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  30. #define MAX_PANEL_JITTER 10
  31. #define DEFAULT_PANEL_PREFILL_LINES 25
  32. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  33. #define MIN_PREFILL_LINES 40
  34. #define RSCC_MODE_THRESHOLD_TIME_US 40
  35. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  36. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  37. {
  38. char *bp;
  39. bp = buf;
  40. /* First 7 bytes are cmd header */
  41. *bp++ = 0x0A;
  42. *bp++ = 1;
  43. *bp++ = 0;
  44. *bp++ = 0;
  45. *bp++ = pps_delay_ms;
  46. *bp++ = 0;
  47. *bp++ = 128;
  48. }
  49. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  50. char *buf, int pps_id, u32 size)
  51. {
  52. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  53. buf += DSI_CMD_PPS_HDR_SIZE;
  54. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  55. size);
  56. }
  57. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  58. char *buf, int pps_id, u32 size)
  59. {
  60. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  61. buf += DSI_CMD_PPS_HDR_SIZE;
  62. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  63. size);
  64. }
  65. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  66. {
  67. int rc = 0;
  68. int i;
  69. struct regulator *vreg = NULL;
  70. for (i = 0; i < panel->power_info.count; i++) {
  71. vreg = devm_regulator_get(panel->parent,
  72. panel->power_info.vregs[i].vreg_name);
  73. rc = PTR_ERR_OR_ZERO(vreg);
  74. if (rc) {
  75. DSI_ERR("failed to get %s regulator\n",
  76. panel->power_info.vregs[i].vreg_name);
  77. goto error_put;
  78. }
  79. panel->power_info.vregs[i].vreg = vreg;
  80. }
  81. return rc;
  82. error_put:
  83. for (i = i - 1; i >= 0; i--) {
  84. devm_regulator_put(panel->power_info.vregs[i].vreg);
  85. panel->power_info.vregs[i].vreg = NULL;
  86. }
  87. return rc;
  88. }
  89. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  90. {
  91. int rc = 0;
  92. int i;
  93. for (i = panel->power_info.count - 1; i >= 0; i--)
  94. devm_regulator_put(panel->power_info.vregs[i].vreg);
  95. return rc;
  96. }
  97. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  98. {
  99. int rc = 0;
  100. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  101. if (gpio_is_valid(r_config->reset_gpio)) {
  102. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  103. if (rc) {
  104. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  105. goto error;
  106. }
  107. }
  108. if (gpio_is_valid(r_config->disp_en_gpio)) {
  109. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  110. if (rc) {
  111. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  112. goto error_release_reset;
  113. }
  114. }
  115. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  116. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  117. if (rc) {
  118. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  119. goto error_release_disp_en;
  120. }
  121. }
  122. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  123. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  124. if (rc) {
  125. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  126. goto error_release_mode_sel;
  127. }
  128. }
  129. if (gpio_is_valid(panel->panel_test_gpio)) {
  130. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  131. if (rc) {
  132. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  133. rc);
  134. panel->panel_test_gpio = -1;
  135. rc = 0;
  136. }
  137. }
  138. goto error;
  139. error_release_mode_sel:
  140. if (gpio_is_valid(panel->bl_config.en_gpio))
  141. gpio_free(panel->bl_config.en_gpio);
  142. error_release_disp_en:
  143. if (gpio_is_valid(r_config->disp_en_gpio))
  144. gpio_free(r_config->disp_en_gpio);
  145. error_release_reset:
  146. if (gpio_is_valid(r_config->reset_gpio))
  147. gpio_free(r_config->reset_gpio);
  148. error:
  149. return rc;
  150. }
  151. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  152. {
  153. int rc = 0;
  154. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  155. if (gpio_is_valid(r_config->reset_gpio))
  156. gpio_free(r_config->reset_gpio);
  157. if (gpio_is_valid(r_config->disp_en_gpio))
  158. gpio_free(r_config->disp_en_gpio);
  159. if (gpio_is_valid(panel->bl_config.en_gpio))
  160. gpio_free(panel->bl_config.en_gpio);
  161. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  162. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  163. if (gpio_is_valid(panel->panel_test_gpio))
  164. gpio_free(panel->panel_test_gpio);
  165. return rc;
  166. }
  167. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  168. {
  169. if (!gpio_is_valid(reset_gpio)) {
  170. DSI_INFO("failed to pull down the reset gpio\n");
  171. return -EINVAL;
  172. }
  173. gpio_set_value(reset_gpio, 0);
  174. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  175. DSI_INFO("GPIO pulled low to simulate ESD\n");
  176. return 0;
  177. }
  178. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  179. {
  180. struct dsi_parser_utils *utils = &panel->utils;
  181. int reset_gpio;
  182. int rc = 0;
  183. reset_gpio = utils->get_named_gpio(utils->data,
  184. "qcom,platform-reset-gpio", 0);
  185. if (!gpio_is_valid(reset_gpio)) {
  186. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  187. return -EINVAL;
  188. }
  189. rc = gpio_request(reset_gpio, "reset_gpio");
  190. if (rc) {
  191. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  192. return rc;
  193. }
  194. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  195. gpio_free(reset_gpio);
  196. return rc;
  197. }
  198. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  199. {
  200. struct dsi_panel_reset_config *r_config;
  201. if (!panel) {
  202. DSI_ERR("Invalid panel param\n");
  203. return -EINVAL;
  204. }
  205. r_config = &panel->reset_config;
  206. if (!r_config) {
  207. DSI_ERR("Invalid panel reset configuration\n");
  208. return -EINVAL;
  209. }
  210. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  211. }
  212. static int dsi_panel_reset(struct dsi_panel *panel)
  213. {
  214. int rc = 0;
  215. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  216. int i;
  217. if (!gpio_is_valid(r_config->reset_gpio))
  218. goto skip_reset_gpio;
  219. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  220. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. if (r_config->count) {
  227. rc = gpio_direction_output(r_config->reset_gpio,
  228. r_config->sequence[0].level);
  229. if (rc) {
  230. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  231. goto exit;
  232. }
  233. }
  234. for (i = 0; i < r_config->count; i++) {
  235. gpio_set_value(r_config->reset_gpio,
  236. r_config->sequence[i].level);
  237. if (r_config->sequence[i].sleep_ms)
  238. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  239. (r_config->sequence[i].sleep_ms * 1000) + 100);
  240. }
  241. skip_reset_gpio:
  242. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  243. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  244. if (rc)
  245. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  246. }
  247. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  248. bool out = true;
  249. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  250. || (panel->reset_config.mode_sel_state
  251. == MODE_GPIO_LOW))
  252. out = false;
  253. else if ((panel->reset_config.mode_sel_state
  254. == MODE_SEL_SINGLE_PORT) ||
  255. (panel->reset_config.mode_sel_state
  256. == MODE_GPIO_HIGH))
  257. out = true;
  258. rc = gpio_direction_output(
  259. panel->reset_config.lcd_mode_sel_gpio, out);
  260. if (rc)
  261. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  262. }
  263. if (gpio_is_valid(panel->panel_test_gpio)) {
  264. rc = gpio_direction_input(panel->panel_test_gpio);
  265. if (rc)
  266. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  267. rc);
  268. }
  269. exit:
  270. return rc;
  271. }
  272. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  273. {
  274. int rc = 0;
  275. struct pinctrl_state *state;
  276. if (panel->host_config.ext_bridge_mode)
  277. return 0;
  278. if (!panel->pinctrl.pinctrl)
  279. return 0;
  280. if (enable)
  281. state = panel->pinctrl.active;
  282. else
  283. state = panel->pinctrl.suspend;
  284. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  285. if (rc)
  286. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  287. panel->name, rc);
  288. return rc;
  289. }
  290. static int dsi_panel_power_on(struct dsi_panel *panel)
  291. {
  292. int rc = 0;
  293. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  296. panel->name, rc);
  297. goto exit;
  298. }
  299. rc = dsi_panel_set_pinctrl_state(panel, true);
  300. if (rc) {
  301. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  302. goto error_disable_vregs;
  303. }
  304. rc = dsi_panel_reset(panel);
  305. if (rc) {
  306. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  307. goto error_disable_gpio;
  308. }
  309. goto exit;
  310. error_disable_gpio:
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->bl_config.en_gpio))
  314. gpio_set_value(panel->bl_config.en_gpio, 0);
  315. (void)dsi_panel_set_pinctrl_state(panel, false);
  316. error_disable_vregs:
  317. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  318. exit:
  319. return rc;
  320. }
  321. static int dsi_panel_power_off(struct dsi_panel *panel)
  322. {
  323. int rc = 0;
  324. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  325. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  326. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  327. !panel->reset_gpio_always_on)
  328. gpio_set_value(panel->reset_config.reset_gpio, 0);
  329. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  330. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  331. if (gpio_is_valid(panel->panel_test_gpio)) {
  332. rc = gpio_direction_input(panel->panel_test_gpio);
  333. if (rc)
  334. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  335. rc);
  336. }
  337. rc = dsi_panel_set_pinctrl_state(panel, false);
  338. if (rc) {
  339. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  340. rc);
  341. }
  342. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  343. if (rc)
  344. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  345. panel->name, rc);
  346. return rc;
  347. }
  348. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  349. enum dsi_cmd_set_type type)
  350. {
  351. int rc = 0, i = 0;
  352. ssize_t len;
  353. struct dsi_cmd_desc *cmds;
  354. u32 count;
  355. enum dsi_cmd_set_state state;
  356. struct dsi_display_mode *mode;
  357. if (!panel || !panel->cur_mode)
  358. return -EINVAL;
  359. mode = panel->cur_mode;
  360. cmds = mode->priv_info->cmd_sets[type].cmds;
  361. count = mode->priv_info->cmd_sets[type].count;
  362. state = mode->priv_info->cmd_sets[type].state;
  363. SDE_EVT32(type, state, count);
  364. if (count == 0) {
  365. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  366. panel->name, type);
  367. goto error;
  368. }
  369. for (i = 0; i < count; i++) {
  370. cmds->ctrl_flags = 0;
  371. if (state == DSI_CMD_SET_STATE_LP)
  372. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  373. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  374. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  375. len = dsi_host_transfer_sub(panel->host, cmds);
  376. if (len < 0) {
  377. rc = len;
  378. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  379. goto error;
  380. }
  381. if (cmds->post_wait_ms)
  382. usleep_range(cmds->post_wait_ms*1000,
  383. ((cmds->post_wait_ms*1000)+10));
  384. cmds++;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  390. {
  391. int rc = 0;
  392. if (panel->host_config.ext_bridge_mode)
  393. return 0;
  394. devm_pinctrl_put(panel->pinctrl.pinctrl);
  395. return rc;
  396. }
  397. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (panel->host_config.ext_bridge_mode)
  401. return 0;
  402. /* TODO: pinctrl is defined in dsi dt node */
  403. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  404. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  405. rc = PTR_ERR(panel->pinctrl.pinctrl);
  406. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  410. "panel_active");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  412. rc = PTR_ERR(panel->pinctrl.active);
  413. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  414. goto error;
  415. }
  416. panel->pinctrl.suspend =
  417. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  418. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  419. rc = PTR_ERR(panel->pinctrl.suspend);
  420. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  421. goto error;
  422. }
  423. panel->pinctrl.pwm_pin =
  424. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  425. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  426. panel->pinctrl.pwm_pin = NULL;
  427. DSI_DEBUG("failed to get pinctrl pwm_pin");
  428. }
  429. error:
  430. return rc;
  431. }
  432. static int dsi_panel_wled_register(struct dsi_panel *panel,
  433. struct dsi_backlight_config *bl)
  434. {
  435. struct backlight_device *bd;
  436. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  437. if (!bd) {
  438. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  439. panel->name, -EPROBE_DEFER);
  440. return -EPROBE_DEFER;
  441. }
  442. bl->raw_bd = bd;
  443. return 0;
  444. }
  445. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  446. u32 bl_lvl)
  447. {
  448. int rc = 0;
  449. unsigned long mode_flags = 0;
  450. struct mipi_dsi_device *dsi = NULL;
  451. if (!panel || (bl_lvl > 0xffff)) {
  452. DSI_ERR("invalid params\n");
  453. return -EINVAL;
  454. }
  455. dsi = &panel->mipi_device;
  456. if (unlikely(panel->bl_config.lp_mode)) {
  457. mode_flags = dsi->mode_flags;
  458. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  459. }
  460. if (panel->bl_config.bl_inverted_dbv)
  461. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  462. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  463. if (rc < 0)
  464. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  465. if (unlikely(panel->bl_config.lp_mode))
  466. dsi->mode_flags = mode_flags;
  467. return rc;
  468. }
  469. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  470. u32 bl_lvl)
  471. {
  472. int rc = 0;
  473. u32 duty = 0;
  474. u32 period_ns = 0;
  475. struct dsi_backlight_config *bl;
  476. if (!panel) {
  477. DSI_ERR("Invalid Params\n");
  478. return -EINVAL;
  479. }
  480. bl = &panel->bl_config;
  481. if (!bl->pwm_bl) {
  482. DSI_ERR("pwm device not found\n");
  483. return -EINVAL;
  484. }
  485. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  486. duty = bl_lvl * period_ns;
  487. duty /= bl->bl_max_level;
  488. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  489. if (rc) {
  490. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  491. rc);
  492. goto error;
  493. }
  494. if (bl_lvl == 0 && bl->pwm_enabled) {
  495. pwm_disable(bl->pwm_bl);
  496. bl->pwm_enabled = false;
  497. return 0;
  498. }
  499. if (bl_lvl != 0 && !bl->pwm_enabled) {
  500. rc = pwm_enable(bl->pwm_bl);
  501. if (rc) {
  502. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  503. rc);
  504. goto error;
  505. }
  506. bl->pwm_enabled = true;
  507. }
  508. error:
  509. return rc;
  510. }
  511. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  512. {
  513. int rc = 0;
  514. struct dsi_backlight_config *bl = &panel->bl_config;
  515. if (panel->host_config.ext_bridge_mode)
  516. return 0;
  517. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  518. switch (bl->type) {
  519. case DSI_BACKLIGHT_WLED:
  520. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  521. break;
  522. case DSI_BACKLIGHT_DCS:
  523. rc = dsi_panel_update_backlight(panel, bl_lvl);
  524. break;
  525. case DSI_BACKLIGHT_EXTERNAL:
  526. break;
  527. case DSI_BACKLIGHT_PWM:
  528. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  529. break;
  530. default:
  531. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  532. rc = -ENOTSUPP;
  533. }
  534. return rc;
  535. }
  536. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  537. {
  538. u32 cur_bl_level;
  539. struct backlight_device *bd = bl->raw_bd;
  540. /* default the brightness level to 50% */
  541. cur_bl_level = bl->bl_max_level >> 1;
  542. switch (bl->type) {
  543. case DSI_BACKLIGHT_WLED:
  544. /* Try to query the backlight level from the backlight device */
  545. if (bd->ops && bd->ops->get_brightness)
  546. cur_bl_level = bd->ops->get_brightness(bd);
  547. break;
  548. case DSI_BACKLIGHT_DCS:
  549. case DSI_BACKLIGHT_EXTERNAL:
  550. case DSI_BACKLIGHT_PWM:
  551. default:
  552. /*
  553. * Ideally, we should read the backlight level from the
  554. * panel. For now, just set it default value.
  555. */
  556. break;
  557. }
  558. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  559. return cur_bl_level;
  560. }
  561. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  562. {
  563. struct dsi_backlight_config *bl = &panel->bl_config;
  564. bl->bl_level = dsi_panel_get_brightness(bl);
  565. }
  566. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  567. {
  568. int rc = 0;
  569. struct dsi_backlight_config *bl = &panel->bl_config;
  570. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  571. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  572. rc = PTR_ERR(bl->pwm_bl);
  573. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  574. rc);
  575. return rc;
  576. }
  577. if (panel->pinctrl.pwm_pin) {
  578. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  579. panel->pinctrl.pwm_pin);
  580. if (rc)
  581. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  582. panel->name, rc);
  583. }
  584. return 0;
  585. }
  586. static int dsi_panel_bl_register(struct dsi_panel *panel)
  587. {
  588. int rc = 0;
  589. struct dsi_backlight_config *bl = &panel->bl_config;
  590. if (panel->host_config.ext_bridge_mode)
  591. return 0;
  592. switch (bl->type) {
  593. case DSI_BACKLIGHT_WLED:
  594. rc = dsi_panel_wled_register(panel, bl);
  595. break;
  596. case DSI_BACKLIGHT_DCS:
  597. break;
  598. case DSI_BACKLIGHT_EXTERNAL:
  599. break;
  600. case DSI_BACKLIGHT_PWM:
  601. rc = dsi_panel_pwm_register(panel);
  602. break;
  603. default:
  604. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  605. rc = -ENOTSUPP;
  606. goto error;
  607. }
  608. error:
  609. return rc;
  610. }
  611. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  612. {
  613. int rc = 0;
  614. struct dsi_backlight_config *bl = &panel->bl_config;
  615. if (panel->host_config.ext_bridge_mode)
  616. return 0;
  617. switch (bl->type) {
  618. case DSI_BACKLIGHT_WLED:
  619. break;
  620. case DSI_BACKLIGHT_DCS:
  621. break;
  622. case DSI_BACKLIGHT_EXTERNAL:
  623. break;
  624. case DSI_BACKLIGHT_PWM:
  625. break;
  626. default:
  627. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  628. rc = -ENOTSUPP;
  629. goto error;
  630. }
  631. error:
  632. return rc;
  633. }
  634. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  635. struct dsi_parser_utils *utils)
  636. {
  637. int rc = 0;
  638. u64 tmp64 = 0;
  639. struct dsi_display_mode *display_mode;
  640. struct dsi_display_mode_priv_info *priv_info;
  641. display_mode = container_of(mode, struct dsi_display_mode, timing);
  642. priv_info = display_mode->priv_info;
  643. rc = utils->read_u64(utils->data,
  644. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  645. if (rc == -EOVERFLOW) {
  646. tmp64 = 0;
  647. rc = utils->read_u32(utils->data,
  648. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  649. }
  650. mode->clk_rate_hz = !rc ? tmp64 : 0;
  651. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  652. mode->pclk_scale.numer = 1;
  653. mode->pclk_scale.denom = 1;
  654. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  655. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  656. &mode->mdp_transfer_time_us);
  657. if (!rc)
  658. display_mode->priv_info->mdp_transfer_time_us =
  659. mode->mdp_transfer_time_us;
  660. else
  661. display_mode->priv_info->mdp_transfer_time_us = 0;
  662. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  663. rc = utils->read_u32(utils->data,
  664. "qcom,mdss-dsi-panel-framerate",
  665. &mode->refresh_rate);
  666. if (rc) {
  667. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  668. rc);
  669. goto error;
  670. }
  671. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  672. &mode->h_active);
  673. if (rc) {
  674. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  675. rc);
  676. goto error;
  677. }
  678. rc = utils->read_u32(utils->data,
  679. "qcom,mdss-dsi-h-front-porch",
  680. &mode->h_front_porch);
  681. if (rc) {
  682. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  683. rc);
  684. goto error;
  685. }
  686. rc = utils->read_u32(utils->data,
  687. "qcom,mdss-dsi-h-back-porch",
  688. &mode->h_back_porch);
  689. if (rc) {
  690. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  691. rc);
  692. goto error;
  693. }
  694. rc = utils->read_u32(utils->data,
  695. "qcom,mdss-dsi-h-pulse-width",
  696. &mode->h_sync_width);
  697. if (rc) {
  698. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  699. rc);
  700. goto error;
  701. }
  702. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  703. &mode->h_skew);
  704. if (rc)
  705. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  706. rc);
  707. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  708. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  709. mode->h_sync_width);
  710. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  711. &mode->v_active);
  712. if (rc) {
  713. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  714. rc);
  715. goto error;
  716. }
  717. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  718. &mode->v_back_porch);
  719. if (rc) {
  720. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  721. rc);
  722. goto error;
  723. }
  724. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  725. &mode->v_front_porch);
  726. if (rc) {
  727. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  728. rc);
  729. goto error;
  730. }
  731. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  732. &mode->v_sync_width);
  733. if (rc) {
  734. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  735. rc);
  736. goto error;
  737. }
  738. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  739. if (rc) {
  740. DSI_DEBUG("qsync min fps not defined in timing node\n");
  741. rc = 0;
  742. }
  743. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  744. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  745. mode->v_sync_width);
  746. error:
  747. return rc;
  748. }
  749. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  750. struct dsi_parser_utils *utils,
  751. const char *name)
  752. {
  753. int rc = 0;
  754. u32 bpp = 0;
  755. enum dsi_pixel_format fmt;
  756. const char *packing;
  757. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  758. if (rc) {
  759. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  760. name, rc);
  761. return rc;
  762. }
  763. host->bpp = bpp;
  764. switch (bpp) {
  765. case 3:
  766. fmt = DSI_PIXEL_FORMAT_RGB111;
  767. break;
  768. case 8:
  769. fmt = DSI_PIXEL_FORMAT_RGB332;
  770. break;
  771. case 12:
  772. fmt = DSI_PIXEL_FORMAT_RGB444;
  773. break;
  774. case 16:
  775. fmt = DSI_PIXEL_FORMAT_RGB565;
  776. break;
  777. case 18:
  778. fmt = DSI_PIXEL_FORMAT_RGB666;
  779. break;
  780. case 30:
  781. fmt = DSI_PIXEL_FORMAT_RGB101010;
  782. break;
  783. case 24:
  784. default:
  785. fmt = DSI_PIXEL_FORMAT_RGB888;
  786. break;
  787. }
  788. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  789. packing = utils->get_property(utils->data,
  790. "qcom,mdss-dsi-pixel-packing",
  791. NULL);
  792. if (packing && !strcmp(packing, "loose"))
  793. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  794. }
  795. host->dst_format = fmt;
  796. return rc;
  797. }
  798. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  799. struct dsi_parser_utils *utils,
  800. const char *name)
  801. {
  802. int rc = 0;
  803. bool lane_enabled;
  804. u32 num_of_lanes = 0;
  805. lane_enabled = utils->read_bool(utils->data,
  806. "qcom,mdss-dsi-lane-0-state");
  807. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  808. lane_enabled = utils->read_bool(utils->data,
  809. "qcom,mdss-dsi-lane-1-state");
  810. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  811. lane_enabled = utils->read_bool(utils->data,
  812. "qcom,mdss-dsi-lane-2-state");
  813. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  814. lane_enabled = utils->read_bool(utils->data,
  815. "qcom,mdss-dsi-lane-3-state");
  816. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  817. if (host->data_lanes & DSI_DATA_LANE_0)
  818. num_of_lanes++;
  819. if (host->data_lanes & DSI_DATA_LANE_1)
  820. num_of_lanes++;
  821. if (host->data_lanes & DSI_DATA_LANE_2)
  822. num_of_lanes++;
  823. if (host->data_lanes & DSI_DATA_LANE_3)
  824. num_of_lanes++;
  825. host->num_data_lanes = num_of_lanes;
  826. if (host->data_lanes == 0) {
  827. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  828. rc = -EINVAL;
  829. }
  830. return rc;
  831. }
  832. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  833. struct dsi_parser_utils *utils,
  834. const char *name)
  835. {
  836. int rc = 0;
  837. const char *swap_mode;
  838. swap_mode = utils->get_property(utils->data,
  839. "qcom,mdss-dsi-color-order", NULL);
  840. if (swap_mode) {
  841. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  842. host->swap_mode = DSI_COLOR_SWAP_RGB;
  843. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  844. host->swap_mode = DSI_COLOR_SWAP_RBG;
  845. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  846. host->swap_mode = DSI_COLOR_SWAP_BRG;
  847. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  848. host->swap_mode = DSI_COLOR_SWAP_GRB;
  849. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  850. host->swap_mode = DSI_COLOR_SWAP_GBR;
  851. } else {
  852. DSI_ERR("[%s] Unrecognized color order-%s\n",
  853. name, swap_mode);
  854. rc = -EINVAL;
  855. }
  856. } else {
  857. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  858. host->swap_mode = DSI_COLOR_SWAP_RGB;
  859. }
  860. /* bit swap on color channel is not defined in dt */
  861. host->bit_swap_red = false;
  862. host->bit_swap_green = false;
  863. host->bit_swap_blue = false;
  864. return rc;
  865. }
  866. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  867. struct dsi_parser_utils *utils,
  868. const char *name)
  869. {
  870. const char *trig;
  871. int rc = 0;
  872. trig = utils->get_property(utils->data,
  873. "qcom,mdss-dsi-mdp-trigger", NULL);
  874. if (trig) {
  875. if (!strcmp(trig, "none")) {
  876. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  877. } else if (!strcmp(trig, "trigger_te")) {
  878. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  879. } else if (!strcmp(trig, "trigger_sw")) {
  880. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  881. } else if (!strcmp(trig, "trigger_sw_te")) {
  882. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  883. } else {
  884. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  885. name, trig);
  886. rc = -EINVAL;
  887. }
  888. } else {
  889. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  890. name);
  891. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  892. }
  893. trig = utils->get_property(utils->data,
  894. "qcom,mdss-dsi-dma-trigger", NULL);
  895. if (trig) {
  896. if (!strcmp(trig, "none")) {
  897. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  898. } else if (!strcmp(trig, "trigger_te")) {
  899. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  900. } else if (!strcmp(trig, "trigger_sw")) {
  901. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  902. } else if (!strcmp(trig, "trigger_sw_seof")) {
  903. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  904. } else if (!strcmp(trig, "trigger_sw_te")) {
  905. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  906. } else {
  907. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  908. name, trig);
  909. rc = -EINVAL;
  910. }
  911. } else {
  912. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  913. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  914. }
  915. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  916. &host->te_mode);
  917. if (rc) {
  918. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  919. host->te_mode = 1;
  920. rc = 0;
  921. }
  922. return rc;
  923. }
  924. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  925. struct dsi_parser_utils *utils,
  926. const char *name)
  927. {
  928. u32 val = 0, line_no = 0, window = 0;
  929. int rc = 0;
  930. bool panel_cphy_mode = false;
  931. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  932. if (!rc) {
  933. host->t_clk_post = val;
  934. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  935. }
  936. val = 0;
  937. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  938. if (!rc) {
  939. host->t_clk_pre = val;
  940. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  941. }
  942. host->ignore_rx_eot = utils->read_bool(utils->data,
  943. "qcom,mdss-dsi-rx-eot-ignore");
  944. host->append_tx_eot = utils->read_bool(utils->data,
  945. "qcom,mdss-dsi-tx-eot-append");
  946. host->ext_bridge_mode = utils->read_bool(utils->data,
  947. "qcom,mdss-dsi-ext-bridge-mode");
  948. host->force_hs_clk_lane = utils->read_bool(utils->data,
  949. "qcom,mdss-dsi-force-clock-lane-hs");
  950. panel_cphy_mode = utils->read_bool(utils->data,
  951. "qcom,panel-cphy-mode");
  952. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  953. : DSI_PHY_TYPE_DPHY;
  954. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  955. &line_no);
  956. if (rc)
  957. host->dma_sched_line = 0;
  958. else
  959. host->dma_sched_line = line_no;
  960. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  961. &window);
  962. if (rc)
  963. host->dma_sched_window = 0;
  964. else
  965. host->dma_sched_window = window;
  966. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  967. host->dma_sched_line, host->dma_sched_window);
  968. return 0;
  969. }
  970. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  971. struct dsi_parser_utils *utils,
  972. const char *name)
  973. {
  974. int rc = 0;
  975. u32 val = 0;
  976. bool supported = false;
  977. struct dsi_split_link_config *split_link = &host->split_link;
  978. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  979. if (!supported) {
  980. DSI_DEBUG("[%s] Split link is not supported\n", name);
  981. split_link->enabled = false;
  982. return;
  983. }
  984. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  985. if (rc || val < 1) {
  986. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  987. split_link->num_sublinks = 2;
  988. } else {
  989. split_link->num_sublinks = val;
  990. }
  991. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  992. if (rc || val < 1) {
  993. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  994. split_link->lanes_per_sublink = 2;
  995. } else {
  996. split_link->lanes_per_sublink = val;
  997. }
  998. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  999. if (!supported)
  1000. split_link->sublink_swap = false;
  1001. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1002. split_link->num_sublinks, split_link->lanes_per_sublink);
  1003. split_link->enabled = true;
  1004. }
  1005. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1006. {
  1007. int rc = 0;
  1008. struct dsi_parser_utils *utils = &panel->utils;
  1009. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1010. panel->name);
  1011. if (rc) {
  1012. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1013. panel->name, rc);
  1014. goto error;
  1015. }
  1016. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1017. panel->name);
  1018. if (rc) {
  1019. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1020. panel->name, rc);
  1021. goto error;
  1022. }
  1023. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1024. panel->name);
  1025. if (rc) {
  1026. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1027. panel->name, rc);
  1028. goto error;
  1029. }
  1030. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1031. panel->name);
  1032. if (rc) {
  1033. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1034. panel->name, rc);
  1035. goto error;
  1036. }
  1037. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1038. panel->name);
  1039. if (rc) {
  1040. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1041. panel->name, rc);
  1042. goto error;
  1043. }
  1044. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1045. panel->name);
  1046. error:
  1047. return rc;
  1048. }
  1049. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1050. struct device_node *of_node)
  1051. {
  1052. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1053. struct dsi_parser_utils *utils = &panel->utils;
  1054. int val, rc = 0;
  1055. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1056. if (val <= 0) {
  1057. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1058. return rc;
  1059. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1060. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1061. val, panel->dfps_caps.dfps_list_len);
  1062. return -EINVAL;
  1063. }
  1064. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1065. if (!avr_caps->avr_step_fps_list)
  1066. return -ENOMEM;
  1067. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1068. avr_caps->avr_step_fps_list, val);
  1069. if (rc) {
  1070. kfree(avr_caps->avr_step_fps_list);
  1071. return rc;
  1072. }
  1073. avr_caps->avr_step_fps_list_len = val;
  1074. return rc;
  1075. }
  1076. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1077. struct device_node *of_node)
  1078. {
  1079. int rc = 0;
  1080. u32 val = 0, i;
  1081. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1082. struct dsi_parser_utils *utils = &panel->utils;
  1083. const char *name = panel->name;
  1084. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1085. if (!qsync_caps->qsync_support) {
  1086. DSI_DEBUG("qsync feature not enabled\n");
  1087. goto error;
  1088. }
  1089. /**
  1090. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1091. * video mode when there is only one qsync min fps present.
  1092. */
  1093. rc = of_property_read_u32(of_node,
  1094. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1095. &val);
  1096. if (rc)
  1097. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1098. panel->name, rc);
  1099. qsync_caps->qsync_min_fps = val;
  1100. /**
  1101. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1102. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1103. * is defined.
  1104. */
  1105. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1106. "qcom,dsi-supported-qsync-min-fps-list");
  1107. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1108. qsync_caps->qsync_min_fps_list_len = 0;
  1109. goto qsync_support;
  1110. }
  1111. /**
  1112. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1113. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1114. */
  1115. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1116. qsync_caps->qsync_min_fps) {
  1117. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1118. name);
  1119. rc = -EINVAL;
  1120. goto error;
  1121. }
  1122. if (panel->dfps_caps.dfps_list_len !=
  1123. qsync_caps->qsync_min_fps_list_len) {
  1124. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1125. rc = -EINVAL;
  1126. goto error;
  1127. }
  1128. qsync_caps->qsync_min_fps_list =
  1129. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1130. GFP_KERNEL);
  1131. if (!qsync_caps->qsync_min_fps_list) {
  1132. rc = -ENOMEM;
  1133. goto error;
  1134. }
  1135. rc = utils->read_u32_array(utils->data,
  1136. "qcom,dsi-supported-qsync-min-fps-list",
  1137. qsync_caps->qsync_min_fps_list,
  1138. qsync_caps->qsync_min_fps_list_len);
  1139. if (rc) {
  1140. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1141. rc = -EINVAL;
  1142. goto error;
  1143. }
  1144. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1145. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1146. if (qsync_caps->qsync_min_fps_list[i] <
  1147. qsync_caps->qsync_min_fps)
  1148. qsync_caps->qsync_min_fps =
  1149. qsync_caps->qsync_min_fps_list[i];
  1150. }
  1151. qsync_support:
  1152. /* allow qsync support only if DFPS is with VFP approach */
  1153. if ((panel->dfps_caps.dfps_support) &&
  1154. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1155. qsync_caps->qsync_support = false;
  1156. qsync_caps->qsync_min_fps = 0;
  1157. }
  1158. error:
  1159. if (rc < 0) {
  1160. qsync_caps->qsync_min_fps = 0;
  1161. qsync_caps->qsync_min_fps_list_len = 0;
  1162. }
  1163. return rc;
  1164. }
  1165. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1166. struct dsi_parser_utils *utils)
  1167. {
  1168. int i, rc = 0;
  1169. struct msm_dyn_clk_list *bit_clk_list;
  1170. if (!mode || !mode->priv_info) {
  1171. DSI_ERR("invalid arguments\n");
  1172. return -EINVAL;
  1173. }
  1174. bit_clk_list = &mode->priv_info->bit_clk_list;
  1175. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1176. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1177. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1178. return -EINVAL;
  1179. }
  1180. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1181. if (!bit_clk_list->rates) {
  1182. DSI_ERR("failed to allocate space for bit clock list\n");
  1183. rc = -ENOMEM;
  1184. goto error;
  1185. }
  1186. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1187. if (!bit_clk_list->front_porches) {
  1188. DSI_ERR("failed to allocate space for front porch list\n");
  1189. rc = -ENOMEM;
  1190. goto error;
  1191. }
  1192. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1193. if (!bit_clk_list->pixel_clks_khz) {
  1194. DSI_ERR("failed to allocate space for pclk list\n");
  1195. rc = -ENOMEM;
  1196. goto error;
  1197. }
  1198. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1199. bit_clk_list->rates, bit_clk_list->count);
  1200. if (rc) {
  1201. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1202. goto error;
  1203. }
  1204. for (i = 0; i < bit_clk_list->count; i++)
  1205. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1206. return 0;
  1207. error:
  1208. bit_clk_list->count = 0;
  1209. kfree(bit_clk_list->rates);
  1210. kfree(bit_clk_list->front_porches);
  1211. kfree(bit_clk_list->pixel_clks_khz);
  1212. return rc;
  1213. }
  1214. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1215. {
  1216. int rc = 0;
  1217. bool supported = false;
  1218. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1219. struct dsi_parser_utils *utils = &panel->utils;
  1220. const char *type;
  1221. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1222. if (!supported) {
  1223. dyn_clk_caps->dyn_clk_support = false;
  1224. return rc;
  1225. }
  1226. dyn_clk_caps->dyn_clk_support = true;
  1227. type = utils->get_property(utils->data,
  1228. "qcom,dsi-dyn-clk-type", NULL);
  1229. if (!type) {
  1230. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1231. dyn_clk_caps->maintain_const_fps = false;
  1232. return 0;
  1233. }
  1234. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1235. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1236. dyn_clk_caps->maintain_const_fps = true;
  1237. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1238. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1239. dyn_clk_caps->maintain_const_fps = true;
  1240. } else {
  1241. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1242. dyn_clk_caps->maintain_const_fps = false;
  1243. }
  1244. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1245. return 0;
  1246. }
  1247. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1248. {
  1249. int rc = 0;
  1250. bool supported = false;
  1251. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1252. struct dsi_parser_utils *utils = &panel->utils;
  1253. const char *name = panel->name;
  1254. const char *type;
  1255. u32 i;
  1256. supported = utils->read_bool(utils->data,
  1257. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1258. if (!supported) {
  1259. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1260. dfps_caps->dfps_support = false;
  1261. return rc;
  1262. }
  1263. type = utils->get_property(utils->data,
  1264. "qcom,mdss-dsi-pan-fps-update", NULL);
  1265. if (!type) {
  1266. DSI_ERR("[%s] dfps type not defined\n", name);
  1267. rc = -EINVAL;
  1268. goto error;
  1269. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1270. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1271. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1272. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1273. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1274. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1275. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1276. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1277. } else {
  1278. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1279. rc = -EINVAL;
  1280. goto error;
  1281. }
  1282. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1283. "qcom,dsi-supported-dfps-list");
  1284. if (dfps_caps->dfps_list_len < 1) {
  1285. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1286. rc = -EINVAL;
  1287. goto error;
  1288. }
  1289. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1290. GFP_KERNEL);
  1291. if (!dfps_caps->dfps_list) {
  1292. rc = -ENOMEM;
  1293. goto error;
  1294. }
  1295. rc = utils->read_u32_array(utils->data,
  1296. "qcom,dsi-supported-dfps-list",
  1297. dfps_caps->dfps_list,
  1298. dfps_caps->dfps_list_len);
  1299. if (rc) {
  1300. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1301. rc = -EINVAL;
  1302. goto error;
  1303. }
  1304. dfps_caps->dfps_support = true;
  1305. /* calculate max and min fps */
  1306. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1307. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1308. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1309. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1310. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1311. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1312. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1313. }
  1314. error:
  1315. return rc;
  1316. }
  1317. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1318. struct dsi_parser_utils *utils,
  1319. const char *name)
  1320. {
  1321. int rc = 0;
  1322. const char *traffic_mode;
  1323. u32 vc_id = 0;
  1324. u32 val = 0;
  1325. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1326. if (rc) {
  1327. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1328. cfg->pulse_mode_hsa_he = false;
  1329. } else if (val == 1) {
  1330. cfg->pulse_mode_hsa_he = true;
  1331. } else if (val == 0) {
  1332. cfg->pulse_mode_hsa_he = false;
  1333. } else {
  1334. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1335. name);
  1336. rc = -EINVAL;
  1337. goto error;
  1338. }
  1339. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1340. "qcom,mdss-dsi-hfp-power-mode");
  1341. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1342. "qcom,mdss-dsi-hbp-power-mode");
  1343. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1344. "qcom,mdss-dsi-hsa-power-mode");
  1345. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1346. "qcom,mdss-dsi-last-line-interleave");
  1347. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1348. "qcom,mdss-dsi-bllp-eof-power-mode");
  1349. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1350. "qcom,mdss-dsi-bllp-power-mode");
  1351. traffic_mode = utils->get_property(utils->data,
  1352. "qcom,mdss-dsi-traffic-mode",
  1353. NULL);
  1354. if (!traffic_mode) {
  1355. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1356. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1357. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1358. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1359. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1360. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1361. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1362. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1363. } else {
  1364. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1365. traffic_mode);
  1366. rc = -EINVAL;
  1367. goto error;
  1368. }
  1369. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1370. &vc_id);
  1371. if (rc) {
  1372. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1373. cfg->vc_id = 0;
  1374. } else {
  1375. cfg->vc_id = vc_id;
  1376. }
  1377. error:
  1378. return rc;
  1379. }
  1380. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1381. struct dsi_parser_utils *utils,
  1382. const char *name)
  1383. {
  1384. u32 val = 0;
  1385. int rc = 0;
  1386. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1387. if (rc) {
  1388. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1389. cfg->wr_mem_start = 0x2C;
  1390. } else {
  1391. cfg->wr_mem_start = val;
  1392. }
  1393. val = 0;
  1394. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1395. &val);
  1396. if (rc) {
  1397. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1398. cfg->wr_mem_continue = 0x3C;
  1399. } else {
  1400. cfg->wr_mem_continue = val;
  1401. }
  1402. /* TODO: fix following */
  1403. cfg->max_cmd_packets_interleave = 0;
  1404. val = 0;
  1405. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1406. &val);
  1407. if (rc) {
  1408. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1409. cfg->insert_dcs_command = true;
  1410. } else if (val == 1) {
  1411. cfg->insert_dcs_command = true;
  1412. } else if (val == 0) {
  1413. cfg->insert_dcs_command = false;
  1414. } else {
  1415. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1416. name);
  1417. rc = -EINVAL;
  1418. goto error;
  1419. }
  1420. cfg->mdp_idle_ctrl_en =
  1421. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1422. if (cfg->mdp_idle_ctrl_en) {
  1423. val = 0;
  1424. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1425. if (rc) {
  1426. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1427. cfg->mdp_idle_ctrl_len = 0;
  1428. cfg->mdp_idle_ctrl_en = false;
  1429. rc = 0;
  1430. } else {
  1431. cfg->mdp_idle_ctrl_len = val;
  1432. }
  1433. }
  1434. error:
  1435. return rc;
  1436. }
  1437. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1438. {
  1439. int rc = 0;
  1440. struct dsi_parser_utils *utils = &panel->utils;
  1441. bool panel_mode_switch_enabled;
  1442. enum dsi_op_mode panel_mode;
  1443. const char *mode;
  1444. mode = utils->get_property(utils->data,
  1445. "qcom,mdss-dsi-panel-type", NULL);
  1446. if (!mode) {
  1447. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1448. panel_mode = DSI_OP_VIDEO_MODE;
  1449. } else if (!strcmp(mode, "dsi_video_mode")) {
  1450. panel_mode = DSI_OP_VIDEO_MODE;
  1451. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1452. panel_mode = DSI_OP_CMD_MODE;
  1453. } else {
  1454. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1455. rc = -EINVAL;
  1456. goto error;
  1457. }
  1458. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1459. "qcom,mdss-dsi-panel-mode-switch");
  1460. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1461. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1462. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1463. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1464. utils,
  1465. panel->name);
  1466. if (rc) {
  1467. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1468. panel->name, rc);
  1469. goto error;
  1470. }
  1471. }
  1472. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1473. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1474. utils,
  1475. panel->name);
  1476. if (rc) {
  1477. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1478. panel->name, rc);
  1479. goto error;
  1480. }
  1481. }
  1482. panel->poms_align_vsync = utils->read_bool(utils->data,
  1483. "qcom,poms-align-panel-vsync");
  1484. panel->panel_mode = panel_mode;
  1485. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1486. error:
  1487. return rc;
  1488. }
  1489. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1490. {
  1491. int rc = 0;
  1492. u32 val = 0;
  1493. const char *str;
  1494. struct dsi_panel_phy_props *props = &panel->phy_props;
  1495. struct dsi_parser_utils *utils = &panel->utils;
  1496. const char *name = panel->name;
  1497. rc = utils->read_u32(utils->data,
  1498. "qcom,mdss-pan-physical-width-dimension", &val);
  1499. if (rc) {
  1500. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1501. props->panel_width_mm = 0;
  1502. rc = 0;
  1503. } else {
  1504. props->panel_width_mm = val;
  1505. }
  1506. rc = utils->read_u32(utils->data,
  1507. "qcom,mdss-pan-physical-height-dimension",
  1508. &val);
  1509. if (rc) {
  1510. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1511. props->panel_height_mm = 0;
  1512. rc = 0;
  1513. } else {
  1514. props->panel_height_mm = val;
  1515. }
  1516. str = utils->get_property(utils->data,
  1517. "qcom,mdss-dsi-panel-orientation", NULL);
  1518. if (!str) {
  1519. props->rotation = DSI_PANEL_ROTATE_NONE;
  1520. } else if (!strcmp(str, "180")) {
  1521. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1522. } else if (!strcmp(str, "hflip")) {
  1523. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1524. } else if (!strcmp(str, "vflip")) {
  1525. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1526. } else {
  1527. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1528. rc = -EINVAL;
  1529. goto error;
  1530. }
  1531. error:
  1532. return rc;
  1533. }
  1534. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1535. "qcom,mdss-dsi-pre-on-command",
  1536. "qcom,mdss-dsi-on-command",
  1537. "qcom,vid-on-commands",
  1538. "qcom,cmd-on-commands",
  1539. "qcom,mdss-dsi-post-panel-on-command",
  1540. "qcom,mdss-dsi-pre-off-command",
  1541. "qcom,mdss-dsi-off-command",
  1542. "qcom,mdss-dsi-post-off-command",
  1543. "qcom,mdss-dsi-pre-res-switch",
  1544. "qcom,mdss-dsi-res-switch",
  1545. "qcom,mdss-dsi-post-res-switch",
  1546. "qcom,video-mode-switch-in-commands",
  1547. "qcom,video-mode-switch-out-commands",
  1548. "qcom,cmd-mode-switch-in-commands",
  1549. "qcom,cmd-mode-switch-out-commands",
  1550. "qcom,mdss-dsi-panel-status-command",
  1551. "qcom,mdss-dsi-lp1-command",
  1552. "qcom,mdss-dsi-lp2-command",
  1553. "qcom,mdss-dsi-nolp-command",
  1554. "PPS not parsed from DTSI, generated dynamically",
  1555. "ROI not parsed from DTSI, generated dynamically",
  1556. "qcom,mdss-dsi-timing-switch-command",
  1557. "qcom,mdss-dsi-post-mode-switch-on-command",
  1558. "qcom,mdss-dsi-qsync-on-commands",
  1559. "qcom,mdss-dsi-qsync-off-commands",
  1560. };
  1561. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1562. "qcom,mdss-dsi-pre-on-command-state",
  1563. "qcom,mdss-dsi-on-command-state",
  1564. "qcom,vid-on-commands-state",
  1565. "qcom,cmd-on-commands-state",
  1566. "qcom,mdss-dsi-post-on-command-state",
  1567. "qcom,mdss-dsi-pre-off-command-state",
  1568. "qcom,mdss-dsi-off-command-state",
  1569. "qcom,mdss-dsi-post-off-command-state",
  1570. "qcom,mdss-dsi-pre-res-switch-state",
  1571. "qcom,mdss-dsi-res-switch-state",
  1572. "qcom,mdss-dsi-post-res-switch-state",
  1573. "qcom,video-mode-switch-in-commands-state",
  1574. "qcom,video-mode-switch-out-commands-state",
  1575. "qcom,cmd-mode-switch-in-commands-state",
  1576. "qcom,cmd-mode-switch-out-commands-state",
  1577. "qcom,mdss-dsi-panel-status-command-state",
  1578. "qcom,mdss-dsi-lp1-command-state",
  1579. "qcom,mdss-dsi-lp2-command-state",
  1580. "qcom,mdss-dsi-nolp-command-state",
  1581. "PPS not parsed from DTSI, generated dynamically",
  1582. "ROI not parsed from DTSI, generated dynamically",
  1583. "qcom,mdss-dsi-timing-switch-command-state",
  1584. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1585. "qcom,mdss-dsi-qsync-on-commands-state",
  1586. "qcom,mdss-dsi-qsync-off-commands-state",
  1587. };
  1588. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1589. {
  1590. const u32 cmd_set_min_size = 7;
  1591. u32 count = 0;
  1592. u32 packet_length;
  1593. u32 tmp;
  1594. while (length >= cmd_set_min_size) {
  1595. packet_length = cmd_set_min_size;
  1596. tmp = ((data[5] << 8) | (data[6]));
  1597. packet_length += tmp;
  1598. if (packet_length > length) {
  1599. DSI_ERR("format error\n");
  1600. return -EINVAL;
  1601. }
  1602. length -= packet_length;
  1603. data += packet_length;
  1604. count++;
  1605. }
  1606. *cnt = count;
  1607. return 0;
  1608. }
  1609. int dsi_panel_create_cmd_packets(const char *data,
  1610. u32 length,
  1611. u32 count,
  1612. struct dsi_cmd_desc *cmd)
  1613. {
  1614. int rc = 0;
  1615. int i, j;
  1616. u8 *payload;
  1617. for (i = 0; i < count; i++) {
  1618. u32 size;
  1619. cmd[i].msg.type = data[0];
  1620. cmd[i].msg.channel = data[2];
  1621. cmd[i].msg.flags |= data[3];
  1622. cmd[i].ctrl = 0;
  1623. cmd[i].post_wait_ms = data[4];
  1624. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1625. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1626. cmd[i].last_command = false;
  1627. else
  1628. cmd[i].last_command = true;
  1629. size = cmd[i].msg.tx_len * sizeof(u8);
  1630. payload = kzalloc(size, GFP_KERNEL);
  1631. if (!payload) {
  1632. rc = -ENOMEM;
  1633. goto error_free_payloads;
  1634. }
  1635. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1636. payload[j] = data[7 + j];
  1637. cmd[i].msg.tx_buf = payload;
  1638. data += (7 + cmd[i].msg.tx_len);
  1639. }
  1640. return rc;
  1641. error_free_payloads:
  1642. for (i = i - 1; i >= 0; i--) {
  1643. cmd--;
  1644. kfree(cmd->msg.tx_buf);
  1645. }
  1646. return rc;
  1647. }
  1648. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1649. {
  1650. u32 i = 0;
  1651. struct dsi_cmd_desc *cmd;
  1652. for (i = 0; i < set->count; i++) {
  1653. cmd = &set->cmds[i];
  1654. kfree(cmd->msg.tx_buf);
  1655. }
  1656. }
  1657. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1658. {
  1659. kfree(set->cmds);
  1660. }
  1661. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1662. u32 packet_count)
  1663. {
  1664. u32 size;
  1665. size = packet_count * sizeof(*cmd->cmds);
  1666. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1667. if (!cmd->cmds)
  1668. return -ENOMEM;
  1669. cmd->count = packet_count;
  1670. return 0;
  1671. }
  1672. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1673. enum dsi_cmd_set_type type,
  1674. struct dsi_parser_utils *utils)
  1675. {
  1676. int rc = 0;
  1677. u32 length = 0;
  1678. const char *data;
  1679. const char *state;
  1680. u32 packet_count = 0;
  1681. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1682. &length);
  1683. if (!data) {
  1684. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1685. rc = -ENOTSUPP;
  1686. goto error;
  1687. }
  1688. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1689. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1690. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1691. if (rc) {
  1692. DSI_ERR("commands failed, rc=%d\n", rc);
  1693. goto error;
  1694. }
  1695. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1696. packet_count, length);
  1697. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1698. if (rc) {
  1699. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1700. goto error;
  1701. }
  1702. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1703. cmd->cmds);
  1704. if (rc) {
  1705. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1706. goto error_free_mem;
  1707. }
  1708. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1709. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1710. cmd->state = DSI_CMD_SET_STATE_LP;
  1711. } else if (!strcmp(state, "dsi_hs_mode")) {
  1712. cmd->state = DSI_CMD_SET_STATE_HS;
  1713. } else {
  1714. DSI_ERR("[%s] command state unrecognized-%s\n",
  1715. cmd_set_state_map[type], state);
  1716. goto error_free_mem;
  1717. }
  1718. return rc;
  1719. error_free_mem:
  1720. kfree(cmd->cmds);
  1721. cmd->cmds = NULL;
  1722. error:
  1723. return rc;
  1724. }
  1725. static int dsi_panel_parse_cmd_sets(
  1726. struct dsi_display_mode_priv_info *priv_info,
  1727. struct dsi_parser_utils *utils)
  1728. {
  1729. int rc = 0;
  1730. struct dsi_panel_cmd_set *set;
  1731. u32 i;
  1732. if (!priv_info) {
  1733. DSI_ERR("invalid mode priv info\n");
  1734. return -EINVAL;
  1735. }
  1736. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1737. set = &priv_info->cmd_sets[i];
  1738. set->type = i;
  1739. set->count = 0;
  1740. if (i == DSI_CMD_SET_PPS) {
  1741. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1742. if (rc)
  1743. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1744. i, rc);
  1745. set->state = DSI_CMD_SET_STATE_LP;
  1746. } else {
  1747. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1748. if (rc)
  1749. DSI_DEBUG("failed to parse set %d\n", i);
  1750. }
  1751. }
  1752. rc = 0;
  1753. return rc;
  1754. }
  1755. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1756. {
  1757. int rc = 0;
  1758. int i;
  1759. u32 length = 0;
  1760. u32 count = 0;
  1761. u32 size = 0;
  1762. u32 *arr_32 = NULL;
  1763. const u32 *arr;
  1764. struct dsi_parser_utils *utils = &panel->utils;
  1765. struct dsi_reset_seq *seq;
  1766. if (panel->host_config.ext_bridge_mode)
  1767. return 0;
  1768. arr = utils->get_property(utils->data,
  1769. "qcom,mdss-dsi-reset-sequence", &length);
  1770. if (!arr) {
  1771. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1772. rc = -EINVAL;
  1773. goto error;
  1774. }
  1775. if (length & 0x1) {
  1776. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1777. panel->name);
  1778. rc = -EINVAL;
  1779. goto error;
  1780. }
  1781. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1782. length = length / sizeof(u32);
  1783. size = length * sizeof(u32);
  1784. arr_32 = kzalloc(size, GFP_KERNEL);
  1785. if (!arr_32) {
  1786. rc = -ENOMEM;
  1787. goto error;
  1788. }
  1789. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1790. arr_32, length);
  1791. if (rc) {
  1792. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1793. goto error_free_arr_32;
  1794. }
  1795. count = length / 2;
  1796. size = count * sizeof(*seq);
  1797. seq = kzalloc(size, GFP_KERNEL);
  1798. if (!seq) {
  1799. rc = -ENOMEM;
  1800. goto error_free_arr_32;
  1801. }
  1802. panel->reset_config.sequence = seq;
  1803. panel->reset_config.count = count;
  1804. for (i = 0; i < length; i += 2) {
  1805. seq->level = arr_32[i];
  1806. seq->sleep_ms = arr_32[i + 1];
  1807. seq++;
  1808. }
  1809. error_free_arr_32:
  1810. kfree(arr_32);
  1811. error:
  1812. return rc;
  1813. }
  1814. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1815. {
  1816. struct dsi_parser_utils *utils = &panel->utils;
  1817. const char *string;
  1818. int i, rc = 0;
  1819. panel->ulps_feature_enabled =
  1820. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1821. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1822. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1823. panel->ulps_suspend_enabled =
  1824. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1825. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1826. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1827. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1828. "qcom,mdss-dsi-te-using-wd");
  1829. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1830. "qcom,cmd-sync-wait-broadcast");
  1831. panel->lp11_init = utils->read_bool(utils->data,
  1832. "qcom,mdss-dsi-lp11-init");
  1833. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1834. "qcom,platform-reset-gpio-always-on");
  1835. panel->spr_info.enable = false;
  1836. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1837. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1838. if (!rc) {
  1839. // find match for pack-type string
  1840. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1841. if (msm_spr_pack_type_str[i] &&
  1842. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1843. panel->spr_info.enable = true;
  1844. panel->spr_info.pack_type = i;
  1845. break;
  1846. }
  1847. }
  1848. }
  1849. pr_debug("%s source side spr packing, pack-type %s\n",
  1850. panel->spr_info.enable ? "enable" : "disable",
  1851. panel->spr_info.enable ?
  1852. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1853. return 0;
  1854. }
  1855. static int dsi_panel_parse_wd_jitter_config(struct dsi_display_mode_priv_info *priv_info,
  1856. struct dsi_parser_utils *utils, u32 *jitter)
  1857. {
  1858. int rc = 0;
  1859. struct msm_display_wd_jitter_config *wd_jitter = &priv_info->wd_jitter;
  1860. u32 ltj[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 1};
  1861. u32 ltj_time = 0;
  1862. const u32 max_ltj = 10;
  1863. if (!(utils->read_bool(utils->data, "qcom,dsi-wd-jitter-enable"))) {
  1864. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1865. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1866. return 0;
  1867. }
  1868. rc = utils->read_u32_array(utils->data, "qcom,dsi-wd-ltj-max-jitter", ltj,
  1869. DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1870. rc |= utils->read_u32(utils->data, "qcom,dsi-wd-ltj-time-sec", &ltj_time);
  1871. if (rc || !ltj[1] || !ltj_time || (ltj[0] / ltj[1] >= max_ltj)) {
  1872. DSI_DEBUG("No valid long term jitter defined\n");
  1873. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1874. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1875. rc = -EINVAL;
  1876. } else {
  1877. wd_jitter->ltj_max_numer = ltj[0];
  1878. wd_jitter->ltj_max_denom = ltj[1];
  1879. wd_jitter->ltj_time_sec = ltj_time;
  1880. wd_jitter->jitter_type = MSM_DISPLAY_WD_LTJ_JITTER;
  1881. }
  1882. if (jitter[0] && jitter[1]) {
  1883. if (jitter[0] / jitter[1] > MAX_PANEL_JITTER) {
  1884. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1885. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1886. } else {
  1887. wd_jitter->inst_jitter_numer = jitter[0];
  1888. wd_jitter->inst_jitter_denom = jitter[1];
  1889. }
  1890. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1891. } else if (rc) {
  1892. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1893. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1894. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1895. }
  1896. priv_info->panel_jitter_numer = rc ?
  1897. wd_jitter->inst_jitter_numer : wd_jitter->ltj_max_numer;
  1898. priv_info->panel_jitter_denom = rc ?
  1899. wd_jitter->inst_jitter_denom : wd_jitter->ltj_max_denom;
  1900. return 0;
  1901. }
  1902. static int dsi_panel_parse_jitter_config(
  1903. struct dsi_display_mode *mode,
  1904. struct dsi_parser_utils *utils)
  1905. {
  1906. int rc;
  1907. struct dsi_display_mode_priv_info *priv_info;
  1908. struct dsi_panel *panel;
  1909. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1910. u64 jitter_val = 0;
  1911. priv_info = mode->priv_info;
  1912. panel = container_of(utils, struct dsi_panel, utils);
  1913. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1914. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1915. if (rc) {
  1916. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1917. } else {
  1918. jitter_val = jitter[0];
  1919. jitter_val = div_u64(jitter_val, jitter[1]);
  1920. }
  1921. if (panel->te_using_watchdog_timer) {
  1922. dsi_panel_parse_wd_jitter_config(priv_info, utils, jitter);
  1923. } else if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1924. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1925. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1926. } else {
  1927. priv_info->panel_jitter_numer = jitter[0];
  1928. priv_info->panel_jitter_denom = jitter[1];
  1929. }
  1930. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1931. &priv_info->panel_prefill_lines);
  1932. if (rc) {
  1933. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1934. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1935. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1936. } else if (priv_info->panel_prefill_lines >=
  1937. DSI_V_TOTAL(&mode->timing)) {
  1938. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1939. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1940. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1941. }
  1942. return 0;
  1943. }
  1944. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1945. {
  1946. int rc = 0;
  1947. char *supply_name;
  1948. if (panel->host_config.ext_bridge_mode)
  1949. return 0;
  1950. if (!strcmp(panel->type, "primary"))
  1951. supply_name = "qcom,panel-supply-entries";
  1952. else
  1953. supply_name = "qcom,panel-sec-supply-entries";
  1954. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1955. &panel->power_info, supply_name);
  1956. if (rc) {
  1957. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1958. goto error;
  1959. }
  1960. error:
  1961. return rc;
  1962. }
  1963. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1964. struct msm_io_res *io_res)
  1965. {
  1966. struct dsi_parser_utils *utils = &panel->utils;
  1967. struct list_head *mem_list = &io_res->mem;
  1968. int reset_gpio;
  1969. int rc = 0;
  1970. reset_gpio = utils->get_named_gpio(utils->data,
  1971. "qcom,platform-reset-gpio", 0);
  1972. if (gpio_is_valid(reset_gpio)) {
  1973. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1974. if (rc) {
  1975. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1976. goto end;
  1977. }
  1978. }
  1979. end:
  1980. return rc;
  1981. }
  1982. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1983. {
  1984. int rc = 0;
  1985. const char *data;
  1986. struct dsi_parser_utils *utils = &panel->utils;
  1987. char *reset_gpio_name, *mode_set_gpio_name;
  1988. if (!strcmp(panel->type, "primary")) {
  1989. reset_gpio_name = "qcom,platform-reset-gpio";
  1990. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1991. } else {
  1992. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1993. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1994. }
  1995. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1996. reset_gpio_name, 0);
  1997. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1998. !panel->host_config.ext_bridge_mode) {
  1999. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  2000. panel->reset_config.reset_gpio);
  2001. }
  2002. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  2003. "qcom,5v-boost-gpio",
  2004. 0);
  2005. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2006. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  2007. panel->name, rc);
  2008. panel->reset_config.disp_en_gpio =
  2009. utils->get_named_gpio(utils->data,
  2010. "qcom,platform-en-gpio", 0);
  2011. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2012. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  2013. panel->name, rc);
  2014. }
  2015. }
  2016. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  2017. utils->data, mode_set_gpio_name, 0);
  2018. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  2019. DSI_DEBUG("mode gpio not specified\n");
  2020. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  2021. data = utils->get_property(utils->data,
  2022. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  2023. if (data) {
  2024. if (!strcmp(data, "single_port"))
  2025. panel->reset_config.mode_sel_state =
  2026. MODE_SEL_SINGLE_PORT;
  2027. else if (!strcmp(data, "dual_port"))
  2028. panel->reset_config.mode_sel_state =
  2029. MODE_SEL_DUAL_PORT;
  2030. else if (!strcmp(data, "high"))
  2031. panel->reset_config.mode_sel_state =
  2032. MODE_GPIO_HIGH;
  2033. else if (!strcmp(data, "low"))
  2034. panel->reset_config.mode_sel_state =
  2035. MODE_GPIO_LOW;
  2036. } else {
  2037. /* Set default mode as SPLIT mode */
  2038. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  2039. }
  2040. /* TODO: release memory */
  2041. rc = dsi_panel_parse_reset_sequence(panel);
  2042. if (rc) {
  2043. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2044. panel->name, rc);
  2045. goto error;
  2046. }
  2047. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2048. "qcom,mdss-dsi-panel-test-pin",
  2049. 0);
  2050. if (!gpio_is_valid(panel->panel_test_gpio))
  2051. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2052. __LINE__);
  2053. error:
  2054. return rc;
  2055. }
  2056. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2057. {
  2058. int rc = 0;
  2059. u32 val;
  2060. struct dsi_backlight_config *config = &panel->bl_config;
  2061. struct dsi_parser_utils *utils = &panel->utils;
  2062. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2063. &val);
  2064. if (rc) {
  2065. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2066. goto error;
  2067. }
  2068. config->pwm_period_usecs = val;
  2069. error:
  2070. return rc;
  2071. }
  2072. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2073. {
  2074. int rc = 0;
  2075. u32 val = 0;
  2076. const char *bl_type = NULL;
  2077. const char *data = NULL;
  2078. const char *state = NULL;
  2079. struct dsi_parser_utils *utils = &panel->utils;
  2080. char *bl_name = NULL;
  2081. if (!strcmp(panel->type, "primary"))
  2082. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2083. else
  2084. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2085. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2086. if (!bl_type) {
  2087. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2088. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2089. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2090. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2091. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2092. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2093. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2094. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2095. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2096. } else {
  2097. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2098. panel->name, bl_type);
  2099. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2100. }
  2101. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2102. if (!data) {
  2103. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2104. } else if (!strcmp(data, "delay_until_first_frame")) {
  2105. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2106. } else {
  2107. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2108. panel->name, data);
  2109. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2110. }
  2111. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2112. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2113. panel->bl_config.dimming_min_bl = 0;
  2114. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2115. panel->bl_config.user_disable_notification = false;
  2116. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2117. if (rc) {
  2118. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2119. panel->name);
  2120. panel->bl_config.bl_min_level = 0;
  2121. } else {
  2122. panel->bl_config.bl_min_level = val;
  2123. }
  2124. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2125. if (rc) {
  2126. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2127. panel->name);
  2128. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2129. } else {
  2130. panel->bl_config.bl_max_level = val;
  2131. }
  2132. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2133. &val);
  2134. if (rc) {
  2135. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2136. panel->name);
  2137. panel->bl_config.brightness_max_level = 255;
  2138. rc = 0;
  2139. } else {
  2140. panel->bl_config.brightness_max_level = val;
  2141. }
  2142. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2143. "qcom,mdss-dsi-bl-inverted-dbv");
  2144. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2145. if (!state || !strcmp(state, "dsi_hs_mode"))
  2146. panel->bl_config.lp_mode = false;
  2147. else if (!strcmp(state, "dsi_lp_mode"))
  2148. panel->bl_config.lp_mode = true;
  2149. else
  2150. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2151. state);
  2152. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2153. rc = dsi_panel_parse_bl_pwm_config(panel);
  2154. if (rc) {
  2155. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2156. panel->name, rc);
  2157. goto error;
  2158. }
  2159. }
  2160. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2161. "qcom,platform-bklight-en-gpio",
  2162. 0);
  2163. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2164. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2165. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2166. panel->name, rc);
  2167. rc = -EPROBE_DEFER;
  2168. goto error;
  2169. } else {
  2170. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2171. panel->name, rc);
  2172. rc = 0;
  2173. goto error;
  2174. }
  2175. }
  2176. error:
  2177. return rc;
  2178. }
  2179. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2180. struct dsi_parser_utils *utils)
  2181. {
  2182. const char *data;
  2183. u32 len, i;
  2184. int rc = 0;
  2185. struct dsi_display_mode_priv_info *priv_info;
  2186. u64 pixel_clk_khz;
  2187. if (!mode || !mode->priv_info)
  2188. return -EINVAL;
  2189. priv_info = mode->priv_info;
  2190. data = utils->get_property(utils->data,
  2191. "qcom,mdss-dsi-panel-phy-timings", &len);
  2192. if (!data) {
  2193. DSI_DEBUG("Unable to read Phy timing settings\n");
  2194. } else {
  2195. priv_info->phy_timing_val =
  2196. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2197. if (!priv_info->phy_timing_val)
  2198. return -EINVAL;
  2199. for (i = 0; i < len; i++)
  2200. priv_info->phy_timing_val[i] = data[i];
  2201. priv_info->phy_timing_len = len;
  2202. }
  2203. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2204. /*
  2205. * For command mode we update the pclk as part of
  2206. * function dsi_panel_calc_dsi_transfer_time( )
  2207. * as we set it based on dsi clock or mdp transfer time.
  2208. */
  2209. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2210. DSI_V_TOTAL(&mode->timing) *
  2211. mode->timing.refresh_rate);
  2212. do_div(pixel_clk_khz, 1000);
  2213. mode->pixel_clk_khz = pixel_clk_khz;
  2214. }
  2215. return rc;
  2216. }
  2217. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2218. struct dsi_parser_utils *utils)
  2219. {
  2220. u32 data;
  2221. int rc = -EINVAL;
  2222. int intf_width;
  2223. const char *compression;
  2224. struct dsi_display_mode_priv_info *priv_info;
  2225. if (!mode || !mode->priv_info)
  2226. return -EINVAL;
  2227. priv_info = mode->priv_info;
  2228. priv_info->dsc_enabled = false;
  2229. compression = utils->get_property(utils->data,
  2230. "qcom,compression-mode", NULL);
  2231. if (compression && !strcmp(compression, "dsc"))
  2232. priv_info->dsc_enabled = true;
  2233. if (!priv_info->dsc_enabled) {
  2234. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2235. return 0;
  2236. }
  2237. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2238. if (rc) {
  2239. priv_info->dsc.config.dsc_version_major = 0x1;
  2240. priv_info->dsc.config.dsc_version_minor = 0x1;
  2241. rc = 0;
  2242. } else {
  2243. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2244. * major version information
  2245. */
  2246. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2247. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2248. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2249. ((priv_info->dsc.config.dsc_version_minor
  2250. != 0x1) &&
  2251. (priv_info->dsc.config.dsc_version_minor
  2252. != 0x2))) {
  2253. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2254. __func__,
  2255. priv_info->dsc.config.dsc_version_major,
  2256. priv_info->dsc.config.dsc_version_minor
  2257. );
  2258. rc = -EINVAL;
  2259. goto error;
  2260. }
  2261. }
  2262. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2263. if (rc) {
  2264. priv_info->dsc.scr_rev = 0x0;
  2265. rc = 0;
  2266. } else {
  2267. priv_info->dsc.scr_rev = data & 0xff;
  2268. /* only one scr rev supported */
  2269. if (priv_info->dsc.scr_rev > 0x1) {
  2270. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2271. __func__, priv_info->dsc.scr_rev);
  2272. rc = -EINVAL;
  2273. goto error;
  2274. }
  2275. }
  2276. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2277. if (rc) {
  2278. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2279. goto error;
  2280. }
  2281. priv_info->dsc.config.slice_height = data;
  2282. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2283. if (rc) {
  2284. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2285. goto error;
  2286. }
  2287. priv_info->dsc.config.slice_width = data;
  2288. intf_width = mode->timing.h_active;
  2289. if (intf_width % priv_info->dsc.config.slice_width) {
  2290. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2291. intf_width, priv_info->dsc.config.slice_width);
  2292. rc = -EINVAL;
  2293. goto error;
  2294. }
  2295. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2296. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2297. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2298. if (rc) {
  2299. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2300. goto error;
  2301. } else if (!data || (data > 2)) {
  2302. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2303. goto error;
  2304. }
  2305. priv_info->dsc.slice_per_pkt = data;
  2306. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2307. &data);
  2308. if (rc) {
  2309. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2310. goto error;
  2311. }
  2312. priv_info->dsc.config.bits_per_component = data;
  2313. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2314. if (rc) {
  2315. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2316. data = 0;
  2317. }
  2318. priv_info->dsc.pps_delay_ms = data;
  2319. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2320. &data);
  2321. if (rc) {
  2322. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2323. goto error;
  2324. }
  2325. priv_info->dsc.config.bits_per_pixel = data << 4;
  2326. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2327. &data);
  2328. if (rc) {
  2329. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2330. rc = 0;
  2331. data = MSM_CHROMA_444;
  2332. } else if (data == MSM_CHROMA_422) {
  2333. priv_info->dsc.config.native_422 = 1;
  2334. } else if (data == MSM_CHROMA_420) {
  2335. priv_info->dsc.config.native_420 = 1;
  2336. }
  2337. priv_info->dsc.chroma_format = data;
  2338. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2339. &data);
  2340. if (rc) {
  2341. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2342. rc = 0;
  2343. data = MSM_RGB;
  2344. }
  2345. priv_info->dsc.source_color_space = data;
  2346. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2347. "qcom,mdss-dsc-block-prediction-enable");
  2348. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2349. priv_info->dsc.config.slice_width);
  2350. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2351. priv_info->dsc.scr_rev);
  2352. if (rc) {
  2353. DSI_DEBUG("failed populating dsc params\n");
  2354. rc = -EINVAL;
  2355. goto error;
  2356. }
  2357. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2358. if (rc) {
  2359. DSI_DEBUG("failed populating other dsc params\n");
  2360. rc = -EINVAL;
  2361. goto error;
  2362. }
  2363. priv_info->pclk_scale.numer =
  2364. priv_info->dsc.config.bits_per_pixel >> 4;
  2365. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2366. priv_info->dsc.chroma_format,
  2367. priv_info->dsc.config.bits_per_component);
  2368. mode->timing.dsc_enabled = true;
  2369. mode->timing.dsc = &priv_info->dsc;
  2370. mode->timing.pclk_scale = priv_info->pclk_scale;
  2371. error:
  2372. return rc;
  2373. }
  2374. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2375. struct dsi_parser_utils *utils, int traffic_mode)
  2376. {
  2377. u32 data;
  2378. int rc = -EINVAL;
  2379. const char *compression;
  2380. struct dsi_display_mode_priv_info *priv_info;
  2381. int intf_width;
  2382. if (!mode || !mode->priv_info)
  2383. return -EINVAL;
  2384. priv_info = mode->priv_info;
  2385. priv_info->vdc_enabled = false;
  2386. compression = utils->get_property(utils->data,
  2387. "qcom,compression-mode", NULL);
  2388. if (compression && !strcmp(compression, "vdc"))
  2389. priv_info->vdc_enabled = true;
  2390. if (!priv_info->vdc_enabled) {
  2391. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2392. return 0;
  2393. }
  2394. priv_info->vdc.traffic_mode = traffic_mode;
  2395. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2396. if (rc) {
  2397. priv_info->vdc.version_major = 0x1;
  2398. priv_info->vdc.version_minor = 0x2;
  2399. priv_info->vdc.version_release = 0x0;
  2400. rc = 0;
  2401. } else {
  2402. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2403. * major version information
  2404. */
  2405. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2406. priv_info->vdc.version_minor = data & 0x0F;
  2407. if ((priv_info->vdc.version_major != 0x1) &&
  2408. ((priv_info->vdc.version_minor
  2409. != 0x2))) {
  2410. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2411. __func__,
  2412. priv_info->vdc.version_major,
  2413. priv_info->vdc.version_minor
  2414. );
  2415. rc = -EINVAL;
  2416. goto error;
  2417. }
  2418. }
  2419. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2420. if (rc) {
  2421. priv_info->vdc.version_release = 0x0;
  2422. rc = 0;
  2423. } else {
  2424. priv_info->vdc.version_release = data & 0xff;
  2425. /* only one release version is supported */
  2426. if (priv_info->vdc.version_release != 0x0) {
  2427. DSI_ERR("unsupported vdc release version %d\n",
  2428. priv_info->vdc.version_release);
  2429. rc = -EINVAL;
  2430. goto error;
  2431. }
  2432. }
  2433. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2434. priv_info->vdc.version_major,
  2435. priv_info->vdc.version_minor,
  2436. priv_info->vdc.version_release);
  2437. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2438. if (rc) {
  2439. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2440. goto error;
  2441. }
  2442. priv_info->vdc.slice_height = data;
  2443. /* slice height should be atleast 16 lines */
  2444. if (priv_info->vdc.slice_height < 16) {
  2445. DSI_ERR("invalid slice height %d\n",
  2446. priv_info->vdc.slice_height);
  2447. rc = -EINVAL;
  2448. goto error;
  2449. }
  2450. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2451. if (rc) {
  2452. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2453. goto error;
  2454. }
  2455. priv_info->vdc.slice_width = data;
  2456. /*
  2457. * slide-width should be multiple of 8
  2458. * slice-width should be atlease 64 pixels
  2459. */
  2460. if ((priv_info->vdc.slice_width & 7) ||
  2461. (priv_info->vdc.slice_width < 64)) {
  2462. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2463. rc = -EINVAL;
  2464. goto error;
  2465. }
  2466. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2467. if (rc) {
  2468. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2469. goto error;
  2470. } else if (!data || (data > 2)) {
  2471. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2472. rc = -EINVAL;
  2473. goto error;
  2474. }
  2475. intf_width = mode->timing.h_active;
  2476. priv_info->vdc.slice_per_pkt = data;
  2477. priv_info->vdc.frame_width = mode->timing.h_active;
  2478. priv_info->vdc.frame_height = mode->timing.v_active;
  2479. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2480. &data);
  2481. if (rc) {
  2482. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2483. goto error;
  2484. }
  2485. priv_info->vdc.bits_per_component = data;
  2486. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2487. if (rc) {
  2488. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2489. data = 0;
  2490. }
  2491. priv_info->vdc.pps_delay_ms = data;
  2492. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2493. &data);
  2494. if (rc) {
  2495. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2496. goto error;
  2497. }
  2498. priv_info->vdc.bits_per_pixel = data << 4;
  2499. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2500. &data);
  2501. if (rc) {
  2502. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2503. rc = 0;
  2504. data = MSM_CHROMA_444;
  2505. }
  2506. priv_info->vdc.chroma_format = data;
  2507. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2508. &data);
  2509. if (rc) {
  2510. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2511. rc = 0;
  2512. data = MSM_RGB;
  2513. }
  2514. priv_info->vdc.source_color_space = data;
  2515. rc = sde_vdc_populate_config(&priv_info->vdc,
  2516. intf_width, traffic_mode);
  2517. if (rc) {
  2518. DSI_DEBUG("failed populating vdc config\n");
  2519. rc = -EINVAL;
  2520. goto error;
  2521. }
  2522. priv_info->pclk_scale.numer =
  2523. priv_info->vdc.bits_per_pixel >> 4;
  2524. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2525. priv_info->vdc.chroma_format,
  2526. priv_info->vdc.bits_per_component);
  2527. mode->timing.vdc_enabled = true;
  2528. mode->timing.vdc = &priv_info->vdc;
  2529. mode->timing.pclk_scale = priv_info->pclk_scale;
  2530. error:
  2531. return rc;
  2532. }
  2533. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2534. {
  2535. int rc = 0;
  2536. struct drm_panel_hdr_properties *hdr_prop;
  2537. struct dsi_parser_utils *utils = &panel->utils;
  2538. hdr_prop = &panel->hdr_props;
  2539. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2540. "qcom,mdss-dsi-panel-hdr-enabled");
  2541. if (hdr_prop->hdr_enabled) {
  2542. rc = utils->read_u32_array(utils->data,
  2543. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2544. hdr_prop->display_primaries,
  2545. DISPLAY_PRIMARIES_MAX);
  2546. if (rc) {
  2547. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2548. __func__, __LINE__, rc);
  2549. hdr_prop->hdr_enabled = false;
  2550. return rc;
  2551. }
  2552. rc = utils->read_u32(utils->data,
  2553. "qcom,mdss-dsi-panel-peak-brightness",
  2554. &(hdr_prop->peak_brightness));
  2555. if (rc) {
  2556. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2557. __func__, __LINE__, rc);
  2558. hdr_prop->hdr_enabled = false;
  2559. return rc;
  2560. }
  2561. rc = utils->read_u32(utils->data,
  2562. "qcom,mdss-dsi-panel-blackness-level",
  2563. &(hdr_prop->blackness_level));
  2564. if (rc) {
  2565. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2566. __func__, __LINE__, rc);
  2567. hdr_prop->hdr_enabled = false;
  2568. return rc;
  2569. }
  2570. }
  2571. return 0;
  2572. }
  2573. static int dsi_panel_parse_topology(
  2574. struct dsi_display_mode_priv_info *priv_info,
  2575. struct dsi_parser_utils *utils,
  2576. int topology_override)
  2577. {
  2578. struct msm_display_topology *topology;
  2579. u32 top_count, top_sel, *array = NULL;
  2580. int i, len = 0;
  2581. int rc = -EINVAL;
  2582. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2583. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2584. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2585. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2586. return rc;
  2587. }
  2588. top_count = len / TOPOLOGY_SET_LEN;
  2589. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2590. if (!array)
  2591. return -ENOMEM;
  2592. rc = utils->read_u32_array(utils->data,
  2593. "qcom,display-topology", array, len);
  2594. if (rc) {
  2595. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2596. goto read_fail;
  2597. }
  2598. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2599. if (!topology) {
  2600. rc = -ENOMEM;
  2601. goto read_fail;
  2602. }
  2603. for (i = 0; i < top_count; i++) {
  2604. struct msm_display_topology *top = &topology[i];
  2605. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2606. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2607. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2608. }
  2609. if (topology_override >= 0 && topology_override < top_count) {
  2610. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2611. topology_override,
  2612. topology[topology_override].num_lm,
  2613. topology[topology_override].num_enc,
  2614. topology[topology_override].num_intf);
  2615. top_sel = topology_override;
  2616. goto parse_done;
  2617. }
  2618. rc = utils->read_u32(utils->data,
  2619. "qcom,default-topology-index", &top_sel);
  2620. if (rc) {
  2621. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2622. goto parse_fail;
  2623. }
  2624. if (top_sel >= top_count) {
  2625. rc = -EINVAL;
  2626. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2627. rc);
  2628. goto parse_fail;
  2629. }
  2630. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2631. !topology[top_sel].num_enc) {
  2632. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2633. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2634. topology[top_sel].num_enc);
  2635. goto parse_fail;
  2636. }
  2637. if (priv_info->dsc_enabled)
  2638. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2639. else if (priv_info->vdc_enabled)
  2640. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2641. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2642. topology[top_sel].num_lm,
  2643. topology[top_sel].num_enc,
  2644. topology[top_sel].num_intf);
  2645. parse_done:
  2646. memcpy(&priv_info->topology, &topology[top_sel],
  2647. sizeof(struct msm_display_topology));
  2648. parse_fail:
  2649. kfree(topology);
  2650. read_fail:
  2651. kfree(array);
  2652. return rc;
  2653. }
  2654. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2655. struct msm_roi_alignment *align)
  2656. {
  2657. int len = 0, rc = 0;
  2658. u32 value[6];
  2659. struct property *data;
  2660. if (!align)
  2661. return -EINVAL;
  2662. memset(align, 0, sizeof(*align));
  2663. data = utils->find_property(utils->data,
  2664. "qcom,panel-roi-alignment", &len);
  2665. len /= sizeof(u32);
  2666. if (!data) {
  2667. DSI_ERR("panel roi alignment not found\n");
  2668. rc = -EINVAL;
  2669. } else if (len != 6) {
  2670. DSI_ERR("incorrect roi alignment len %d\n", len);
  2671. rc = -EINVAL;
  2672. } else {
  2673. rc = utils->read_u32_array(utils->data,
  2674. "qcom,panel-roi-alignment", value, len);
  2675. if (rc)
  2676. DSI_DEBUG("error reading panel roi alignment values\n");
  2677. else {
  2678. align->xstart_pix_align = value[0];
  2679. align->ystart_pix_align = value[1];
  2680. align->width_pix_align = value[2];
  2681. align->height_pix_align = value[3];
  2682. align->min_width = value[4];
  2683. align->min_height = value[5];
  2684. }
  2685. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2686. align->xstart_pix_align,
  2687. align->width_pix_align,
  2688. align->ystart_pix_align,
  2689. align->height_pix_align,
  2690. align->min_width,
  2691. align->min_height);
  2692. }
  2693. return rc;
  2694. }
  2695. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2696. struct dsi_parser_utils *utils)
  2697. {
  2698. struct msm_roi_caps *roi_caps = NULL;
  2699. const char *data;
  2700. int rc = 0;
  2701. if (!mode || !mode->priv_info) {
  2702. DSI_ERR("invalid arguments\n");
  2703. return -EINVAL;
  2704. }
  2705. roi_caps = &mode->priv_info->roi_caps;
  2706. memset(roi_caps, 0, sizeof(*roi_caps));
  2707. data = utils->get_property(utils->data,
  2708. "qcom,partial-update-enabled", NULL);
  2709. if (data) {
  2710. if (!strcmp(data, "dual_roi"))
  2711. roi_caps->num_roi = 2;
  2712. else if (!strcmp(data, "single_roi"))
  2713. roi_caps->num_roi = 1;
  2714. else {
  2715. DSI_INFO(
  2716. "invalid value for qcom,partial-update-enabled: %s\n",
  2717. data);
  2718. return 0;
  2719. }
  2720. } else {
  2721. DSI_DEBUG("partial update disabled as the property is not set\n");
  2722. return 0;
  2723. }
  2724. roi_caps->merge_rois = utils->read_bool(utils->data,
  2725. "qcom,partial-update-roi-merge");
  2726. roi_caps->enabled = roi_caps->num_roi > 0;
  2727. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2728. roi_caps->enabled);
  2729. if (roi_caps->enabled)
  2730. rc = dsi_panel_parse_roi_alignment(utils,
  2731. &roi_caps->align);
  2732. if (rc)
  2733. memset(roi_caps, 0, sizeof(*roi_caps));
  2734. return rc;
  2735. }
  2736. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2737. struct dsi_parser_utils *utils)
  2738. {
  2739. if (!mode || !mode->priv_info) {
  2740. DSI_ERR("invalid arguments\n");
  2741. return false;
  2742. }
  2743. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2744. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2745. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2746. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2747. if (!mode->panel_mode_caps)
  2748. return false;
  2749. return true;
  2750. };
  2751. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2752. {
  2753. int dms_enabled;
  2754. const char *data;
  2755. struct dsi_parser_utils *utils = &panel->utils;
  2756. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2757. dms_enabled = utils->read_bool(utils->data,
  2758. "qcom,dynamic-mode-switch-enabled");
  2759. if (!dms_enabled)
  2760. return 0;
  2761. data = utils->get_property(utils->data,
  2762. "qcom,dynamic-mode-switch-type", NULL);
  2763. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2764. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2765. } else {
  2766. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2767. panel->name, data);
  2768. return -EINVAL;
  2769. }
  2770. return 0;
  2771. };
  2772. /*
  2773. * The length of all the valid values to be checked should not be greater
  2774. * than the length of returned data from read command.
  2775. */
  2776. static bool
  2777. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2778. {
  2779. int i;
  2780. struct drm_panel_esd_config *config = &panel->esd_config;
  2781. for (i = 0; i < count; ++i) {
  2782. if (config->status_valid_params[i] >
  2783. config->status_cmds_rlen[i]) {
  2784. DSI_DEBUG("ignore valid params\n");
  2785. return false;
  2786. }
  2787. }
  2788. return true;
  2789. }
  2790. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2791. char *prop_key, u32 **target, u32 cmd_cnt)
  2792. {
  2793. int tmp;
  2794. if (!utils->find_property(utils->data, prop_key, &tmp))
  2795. return false;
  2796. tmp /= sizeof(u32);
  2797. if (tmp != cmd_cnt) {
  2798. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2799. tmp, cmd_cnt);
  2800. return false;
  2801. }
  2802. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2803. if (IS_ERR_OR_NULL(*target)) {
  2804. DSI_ERR("Error allocating memory for property\n");
  2805. return false;
  2806. }
  2807. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2808. DSI_ERR("cannot get values from dts\n");
  2809. kfree(*target);
  2810. *target = NULL;
  2811. return false;
  2812. }
  2813. return true;
  2814. }
  2815. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2816. {
  2817. kfree(esd_config->status_buf);
  2818. kfree(esd_config->return_buf);
  2819. kfree(esd_config->status_value);
  2820. kfree(esd_config->status_valid_params);
  2821. kfree(esd_config->status_cmds_rlen);
  2822. kfree(esd_config->status_cmd.cmds);
  2823. }
  2824. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2825. {
  2826. struct drm_panel_esd_config *esd_config;
  2827. int rc = 0;
  2828. u32 tmp;
  2829. u32 i, status_len, *lenp;
  2830. struct property *data;
  2831. struct dsi_parser_utils *utils = &panel->utils;
  2832. if (!panel) {
  2833. DSI_ERR("Invalid Params\n");
  2834. return -EINVAL;
  2835. }
  2836. esd_config = &panel->esd_config;
  2837. if (!esd_config)
  2838. return -EINVAL;
  2839. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2840. DSI_CMD_SET_PANEL_STATUS, utils);
  2841. if (!esd_config->status_cmd.count) {
  2842. DSI_ERR("panel status command parsing failed\n");
  2843. rc = -EINVAL;
  2844. goto error;
  2845. }
  2846. if (!dsi_panel_parse_esd_status_len(utils,
  2847. "qcom,mdss-dsi-panel-status-read-length",
  2848. &panel->esd_config.status_cmds_rlen,
  2849. esd_config->status_cmd.count)) {
  2850. DSI_ERR("Invalid status read length\n");
  2851. rc = -EINVAL;
  2852. goto error1;
  2853. }
  2854. if (dsi_panel_parse_esd_status_len(utils,
  2855. "qcom,mdss-dsi-panel-status-valid-params",
  2856. &panel->esd_config.status_valid_params,
  2857. esd_config->status_cmd.count)) {
  2858. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2859. esd_config->status_cmd.count)) {
  2860. rc = -EINVAL;
  2861. goto error2;
  2862. }
  2863. }
  2864. status_len = 0;
  2865. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2866. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2867. status_len += lenp[i];
  2868. if (!status_len) {
  2869. rc = -EINVAL;
  2870. goto error2;
  2871. }
  2872. /*
  2873. * Some panel may need multiple read commands to properly
  2874. * check panel status. Do a sanity check for proper status
  2875. * value which will be compared with the value read by dsi
  2876. * controller during ESD check. Also check if multiple read
  2877. * commands are there then, there should be corresponding
  2878. * status check values for each read command.
  2879. */
  2880. data = utils->find_property(utils->data,
  2881. "qcom,mdss-dsi-panel-status-value", &tmp);
  2882. tmp /= sizeof(u32);
  2883. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2884. esd_config->groups = tmp / status_len;
  2885. } else {
  2886. DSI_ERR("error parse panel-status-value\n");
  2887. rc = -EINVAL;
  2888. goto error2;
  2889. }
  2890. esd_config->status_value =
  2891. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2892. GFP_KERNEL);
  2893. if (!esd_config->status_value) {
  2894. rc = -ENOMEM;
  2895. goto error2;
  2896. }
  2897. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2898. sizeof(unsigned char), GFP_KERNEL);
  2899. if (!esd_config->return_buf) {
  2900. rc = -ENOMEM;
  2901. goto error3;
  2902. }
  2903. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2904. if (!esd_config->status_buf) {
  2905. rc = -ENOMEM;
  2906. goto error4;
  2907. }
  2908. rc = utils->read_u32_array(utils->data,
  2909. "qcom,mdss-dsi-panel-status-value",
  2910. esd_config->status_value, esd_config->groups * status_len);
  2911. if (rc) {
  2912. DSI_DEBUG("error reading panel status values\n");
  2913. memset(esd_config->status_value, 0,
  2914. esd_config->groups * status_len);
  2915. }
  2916. return 0;
  2917. error4:
  2918. kfree(esd_config->return_buf);
  2919. error3:
  2920. kfree(esd_config->status_value);
  2921. error2:
  2922. kfree(esd_config->status_valid_params);
  2923. kfree(esd_config->status_cmds_rlen);
  2924. error1:
  2925. kfree(esd_config->status_cmd.cmds);
  2926. error:
  2927. return rc;
  2928. }
  2929. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2930. {
  2931. int rc = 0;
  2932. const char *string;
  2933. struct drm_panel_esd_config *esd_config;
  2934. struct dsi_parser_utils *utils = &panel->utils;
  2935. u8 *esd_mode = NULL;
  2936. esd_config = &panel->esd_config;
  2937. esd_config->status_mode = ESD_MODE_MAX;
  2938. esd_config->esd_enabled = utils->read_bool(utils->data,
  2939. "qcom,esd-check-enabled");
  2940. if (!esd_config->esd_enabled)
  2941. return 0;
  2942. rc = utils->read_string(utils->data,
  2943. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2944. if (!rc) {
  2945. if (!strcmp(string, "bta_check")) {
  2946. esd_config->status_mode = ESD_MODE_SW_BTA;
  2947. } else if (!strcmp(string, "reg_read")) {
  2948. esd_config->status_mode = ESD_MODE_REG_READ;
  2949. } else if (!strcmp(string, "te_signal_check")) {
  2950. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2951. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2952. } else {
  2953. DSI_ERR("TE-ESD not valid for video mode\n");
  2954. rc = -EINVAL;
  2955. goto error;
  2956. }
  2957. } else {
  2958. DSI_ERR("No valid panel-status-check-mode string\n");
  2959. rc = -EINVAL;
  2960. goto error;
  2961. }
  2962. } else {
  2963. DSI_DEBUG("status check method not defined!\n");
  2964. rc = -EINVAL;
  2965. goto error;
  2966. }
  2967. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2968. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2969. if (rc) {
  2970. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2971. rc);
  2972. goto error;
  2973. }
  2974. esd_mode = "register_read";
  2975. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2976. esd_mode = "bta_trigger";
  2977. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2978. esd_mode = "te_check";
  2979. }
  2980. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2981. return 0;
  2982. error:
  2983. panel->esd_config.esd_enabled = false;
  2984. return rc;
  2985. }
  2986. static void dsi_panel_update_util(struct dsi_panel *panel,
  2987. struct device_node *parser_node)
  2988. {
  2989. struct dsi_parser_utils *utils = &panel->utils;
  2990. if (parser_node) {
  2991. *utils = *dsi_parser_get_parser_utils();
  2992. utils->data = parser_node;
  2993. DSI_DEBUG("switching to parser APIs\n");
  2994. goto end;
  2995. }
  2996. *utils = *dsi_parser_get_of_utils();
  2997. utils->data = panel->panel_of_node;
  2998. end:
  2999. utils->node = panel->panel_of_node;
  3000. }
  3001. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  3002. {
  3003. return 0;
  3004. }
  3005. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  3006. {
  3007. if (trusted_vm_env) {
  3008. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  3009. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  3010. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  3011. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  3012. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  3013. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  3014. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  3015. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  3016. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  3017. } else {
  3018. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  3019. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  3020. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  3021. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  3022. panel->panel_ops.bl_register = dsi_panel_bl_register;
  3023. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  3024. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  3025. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  3026. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  3027. }
  3028. }
  3029. struct dsi_panel *dsi_panel_get(struct device *parent,
  3030. struct device_node *of_node,
  3031. struct device_node *parser_node,
  3032. const char *type,
  3033. int topology_override,
  3034. bool trusted_vm_env)
  3035. {
  3036. struct dsi_panel *panel;
  3037. struct dsi_parser_utils *utils;
  3038. const char *panel_physical_type;
  3039. int rc = 0;
  3040. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  3041. if (!panel)
  3042. return ERR_PTR(-ENOMEM);
  3043. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3044. panel->panel_of_node = of_node;
  3045. panel->parent = parent;
  3046. panel->type = type;
  3047. dsi_panel_update_util(panel, parser_node);
  3048. utils = &panel->utils;
  3049. panel->name = utils->get_property(utils->data,
  3050. "qcom,mdss-dsi-panel-name", NULL);
  3051. if (!panel->name)
  3052. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3053. /*
  3054. * Set panel type to LCD as default.
  3055. */
  3056. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3057. panel_physical_type = utils->get_property(utils->data,
  3058. "qcom,mdss-dsi-panel-physical-type", NULL);
  3059. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3060. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3061. rc = dsi_panel_parse_host_config(panel);
  3062. if (rc) {
  3063. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3064. rc);
  3065. goto error;
  3066. }
  3067. rc = dsi_panel_parse_panel_mode(panel);
  3068. if (rc) {
  3069. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3070. rc);
  3071. goto error;
  3072. }
  3073. rc = dsi_panel_parse_dfps_caps(panel);
  3074. if (rc)
  3075. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3076. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3077. if (rc)
  3078. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3079. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3080. if (rc)
  3081. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3082. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3083. if (rc)
  3084. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3085. rc = dsi_panel_parse_phy_props(panel);
  3086. if (rc) {
  3087. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3088. rc);
  3089. goto error;
  3090. }
  3091. rc = panel->panel_ops.parse_gpios(panel);
  3092. if (rc) {
  3093. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3094. goto error;
  3095. }
  3096. rc = panel->panel_ops.parse_power_cfg(panel);
  3097. if (rc)
  3098. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3099. rc = dsi_panel_parse_bl_config(panel);
  3100. if (rc) {
  3101. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3102. if (rc == -EPROBE_DEFER)
  3103. goto error;
  3104. }
  3105. rc = dsi_panel_parse_misc_features(panel);
  3106. if (rc)
  3107. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3108. rc = dsi_panel_parse_hdr_config(panel);
  3109. if (rc)
  3110. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3111. rc = dsi_panel_get_mode_count(panel);
  3112. if (rc) {
  3113. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3114. goto error;
  3115. }
  3116. rc = dsi_panel_parse_dms_info(panel);
  3117. if (rc)
  3118. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3119. rc = dsi_panel_parse_esd_config(panel);
  3120. if (rc)
  3121. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3122. rc = dsi_panel_vreg_get(panel);
  3123. if (rc) {
  3124. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3125. panel->name, rc);
  3126. goto error;
  3127. }
  3128. panel->power_mode = SDE_MODE_DPMS_OFF;
  3129. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3130. NULL, DRM_MODE_CONNECTOR_DSI);
  3131. panel->mipi_device.dev.of_node = of_node;
  3132. drm_panel_add(&panel->drm_panel);
  3133. mutex_init(&panel->panel_lock);
  3134. return panel;
  3135. error:
  3136. kfree(panel);
  3137. return ERR_PTR(rc);
  3138. }
  3139. void dsi_panel_put(struct dsi_panel *panel)
  3140. {
  3141. drm_panel_remove(&panel->drm_panel);
  3142. /* free resources allocated for ESD check */
  3143. dsi_panel_esd_config_deinit(&panel->esd_config);
  3144. kfree(panel->avr_caps.avr_step_fps_list);
  3145. kfree(panel);
  3146. }
  3147. int dsi_panel_drv_init(struct dsi_panel *panel,
  3148. struct mipi_dsi_host *host)
  3149. {
  3150. int rc = 0;
  3151. struct mipi_dsi_device *dev;
  3152. if (!panel || !host) {
  3153. DSI_ERR("invalid params\n");
  3154. return -EINVAL;
  3155. }
  3156. mutex_lock(&panel->panel_lock);
  3157. dev = &panel->mipi_device;
  3158. dev->host = host;
  3159. /*
  3160. * We dont have device structure since panel is not a device node.
  3161. * When using drm panel framework, the device is probed when the host is
  3162. * create.
  3163. */
  3164. dev->channel = 0;
  3165. dev->lanes = 4;
  3166. panel->host = host;
  3167. rc = panel->panel_ops.pinctrl_init(panel);
  3168. if (rc) {
  3169. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3170. panel->name, rc);
  3171. goto exit;
  3172. }
  3173. rc = panel->panel_ops.gpio_request(panel);
  3174. if (rc) {
  3175. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3176. rc);
  3177. goto error_pinctrl_deinit;
  3178. }
  3179. rc = panel->panel_ops.bl_register(panel);
  3180. if (rc) {
  3181. if (rc != -EPROBE_DEFER)
  3182. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3183. panel->name, rc);
  3184. goto error_gpio_release;
  3185. }
  3186. goto exit;
  3187. error_gpio_release:
  3188. (void)dsi_panel_gpio_release(panel);
  3189. error_pinctrl_deinit:
  3190. (void)dsi_panel_pinctrl_deinit(panel);
  3191. exit:
  3192. mutex_unlock(&panel->panel_lock);
  3193. return rc;
  3194. }
  3195. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3196. {
  3197. int rc = 0;
  3198. if (!panel) {
  3199. DSI_ERR("invalid params\n");
  3200. return -EINVAL;
  3201. }
  3202. mutex_lock(&panel->panel_lock);
  3203. rc = panel->panel_ops.bl_unregister(panel);
  3204. if (rc)
  3205. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3206. panel->name, rc);
  3207. rc = panel->panel_ops.gpio_release(panel);
  3208. if (rc)
  3209. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3210. rc);
  3211. rc = panel->panel_ops.pinctrl_deinit(panel);
  3212. if (rc)
  3213. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3214. rc);
  3215. rc = dsi_panel_vreg_put(panel);
  3216. if (rc)
  3217. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3218. panel->host = NULL;
  3219. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3220. mutex_unlock(&panel->panel_lock);
  3221. return rc;
  3222. }
  3223. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3224. struct dsi_display_mode *mode)
  3225. {
  3226. return 0;
  3227. }
  3228. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3229. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3230. {
  3231. const char *compression;
  3232. u32 *array = NULL, top_count, len, i;
  3233. int rc = -EINVAL;
  3234. bool dsc_enable = false;
  3235. *dsc_count = 0;
  3236. *lm_count = 0;
  3237. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3238. if (compression && !strcmp(compression, "dsc"))
  3239. dsc_enable = true;
  3240. len = utils->count_u32_elems(node, "qcom,display-topology");
  3241. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3242. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3243. return rc;
  3244. top_count = len / TOPOLOGY_SET_LEN;
  3245. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3246. if (!array)
  3247. return -ENOMEM;
  3248. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3249. if (rc) {
  3250. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3251. goto read_fail;
  3252. }
  3253. for (i = 0; i < top_count; i++) {
  3254. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3255. if (dsc_enable)
  3256. *dsc_count = max(*dsc_count,
  3257. array[i * TOPOLOGY_SET_LEN + 1]);
  3258. }
  3259. read_fail:
  3260. kfree(array);
  3261. return 0;
  3262. }
  3263. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3264. {
  3265. const u32 SINGLE_MODE_SUPPORT = 1;
  3266. struct dsi_parser_utils *utils;
  3267. struct device_node *timings_np, *child_np;
  3268. int num_dfps_rates;
  3269. int num_video_modes = 0, num_cmd_modes = 0;
  3270. int count, rc = 0;
  3271. u32 dsc_count = 0, lm_count = 0;
  3272. if (!panel) {
  3273. DSI_ERR("invalid params\n");
  3274. return -EINVAL;
  3275. }
  3276. utils = &panel->utils;
  3277. panel->num_timing_nodes = 0;
  3278. timings_np = utils->get_child_by_name(utils->data,
  3279. "qcom,mdss-dsi-display-timings");
  3280. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3281. DSI_ERR("no display timing nodes defined\n");
  3282. rc = -EINVAL;
  3283. goto error;
  3284. }
  3285. count = utils->get_child_count(timings_np);
  3286. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3287. count > DSI_MODE_MAX) {
  3288. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3289. rc = -EINVAL;
  3290. goto error;
  3291. }
  3292. /* No multiresolution support is available for video mode panels.
  3293. * Multi-mode is supported for video mode during POMS is enabled.
  3294. */
  3295. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3296. !panel->host_config.ext_bridge_mode &&
  3297. !panel->panel_mode_switch_enabled)
  3298. count = SINGLE_MODE_SUPPORT;
  3299. panel->num_timing_nodes = count;
  3300. dsi_for_each_child_node(timings_np, child_np) {
  3301. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3302. num_video_modes++;
  3303. else if (utils->read_bool(child_np,
  3304. "qcom,mdss-dsi-cmd-mode"))
  3305. num_cmd_modes++;
  3306. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3307. num_video_modes++;
  3308. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3309. num_cmd_modes++;
  3310. dsi_panel_get_max_res_count(utils, child_np,
  3311. &dsc_count, &lm_count);
  3312. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3313. panel->lm_count = max(lm_count, panel->lm_count);
  3314. }
  3315. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3316. panel->dfps_caps.dfps_list_len;
  3317. /*
  3318. * Inflate num_of_modes by fps in dfps.
  3319. * Single command mode for video mode panels supporting
  3320. * panel operating mode switch.
  3321. */
  3322. num_video_modes = num_video_modes * num_dfps_rates;
  3323. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3324. (panel->panel_mode_switch_enabled))
  3325. num_cmd_modes = 1;
  3326. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3327. error:
  3328. return rc;
  3329. }
  3330. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3331. struct dsi_panel_phy_props *phy_props)
  3332. {
  3333. int rc = 0;
  3334. if (!panel || !phy_props) {
  3335. DSI_ERR("invalid params\n");
  3336. return -EINVAL;
  3337. }
  3338. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3339. return rc;
  3340. }
  3341. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3342. struct dsi_dfps_capabilities *dfps_caps)
  3343. {
  3344. int rc = 0;
  3345. if (!panel || !dfps_caps) {
  3346. DSI_ERR("invalid params\n");
  3347. return -EINVAL;
  3348. }
  3349. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3350. return rc;
  3351. }
  3352. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3353. {
  3354. int i;
  3355. if (!mode->priv_info)
  3356. return;
  3357. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3358. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3359. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3360. }
  3361. kfree(mode->priv_info);
  3362. }
  3363. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3364. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3365. {
  3366. u32 frame_time_us, nslices;
  3367. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3368. dsi_transfer_time_us, pixel_clk_khz;
  3369. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3370. struct dsi_mode_info *timing = &mode->timing;
  3371. struct dsi_display_mode *display_mode;
  3372. u32 jitter_numer, jitter_denom, prefill_lines;
  3373. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3374. u16 bpp;
  3375. /* Packet overhead in bits,
  3376. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3377. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3378. * 1 byte dcs data command.
  3379. */
  3380. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3381. packet_overhead = 120;
  3382. else
  3383. packet_overhead = 56;
  3384. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3385. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3386. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3387. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3388. if (timing->refresh_rate >= 120)
  3389. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3390. if (timing->dsc_enabled) {
  3391. nslices = (timing->h_active)/(dsc->config.slice_width);
  3392. /* (slice width x bit-per-pixel + packet overhead) x
  3393. * number of slices x height x fps / lane
  3394. */
  3395. bpp = DSC_BPP(dsc->config);
  3396. bits_per_line = ((dsc->config.slice_width * bpp) +
  3397. packet_overhead) * nslices;
  3398. bits_per_line = bits_per_line / (config->num_data_lanes);
  3399. min_bitclk_hz = (bits_per_line * timing->v_active *
  3400. timing->refresh_rate);
  3401. } else {
  3402. total_active_pixels = ((dsi_h_active_dce(timing)
  3403. * timing->v_active));
  3404. /* calculate the actual bitclk needed to transfer the frame */
  3405. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3406. (config->bpp));
  3407. do_div(min_bitclk_hz, config->num_data_lanes);
  3408. }
  3409. timing->min_dsi_clk_hz = min_bitclk_hz;
  3410. /*
  3411. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3412. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3413. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3414. * threshold time are configured to 40us.
  3415. */
  3416. if (mode->priv_info->disable_rsc_solver) {
  3417. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3418. } else {
  3419. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3420. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3421. }
  3422. /*
  3423. * Increase the prefill_lines proportionately as recommended
  3424. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3425. */
  3426. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3427. timing->refresh_rate, 60);
  3428. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3429. (timing->v_active));
  3430. min_threshold_us = min_threshold_us + prefill_time_us;
  3431. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3432. if (timing->clk_rate_hz) {
  3433. /* adjust the transfer time proportionately for bit clk*/
  3434. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3435. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3436. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3437. } else if (mode->priv_info->mdp_transfer_time_us) {
  3438. max_transfer_us = frame_time_us - min_threshold_us;
  3439. mode->priv_info->mdp_transfer_time_us = min(
  3440. mode->priv_info->mdp_transfer_time_us,
  3441. max_transfer_us);
  3442. timing->dsi_transfer_time_us =
  3443. mode->priv_info->mdp_transfer_time_us;
  3444. } else {
  3445. if ((min_threshold_us > frame_threshold_us) ||
  3446. (mode->priv_info->disable_rsc_solver))
  3447. frame_threshold_us = min_threshold_us;
  3448. timing->dsi_transfer_time_us = frame_time_us -
  3449. frame_threshold_us;
  3450. }
  3451. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3452. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3453. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3454. timing->mdp_transfer_time_us =
  3455. mode->priv_info->mdp_transfer_time_us;
  3456. }
  3457. /* Calculate pclk_khz to update modeinfo */
  3458. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3459. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3460. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3461. do_div(pixel_clk_khz, config->bpp);
  3462. display_mode->pixel_clk_khz = pixel_clk_khz;
  3463. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3464. }
  3465. int dsi_panel_get_mode(struct dsi_panel *panel,
  3466. u32 index, struct dsi_display_mode *mode,
  3467. int topology_override)
  3468. {
  3469. struct device_node *timings_np, *child_np;
  3470. struct dsi_parser_utils *utils;
  3471. struct dsi_display_mode_priv_info *prv_info;
  3472. u32 child_idx = 0;
  3473. int rc = 0, num_timings;
  3474. int traffic_mode;
  3475. void *utils_data = NULL;
  3476. if (!panel || !mode) {
  3477. DSI_ERR("invalid params\n");
  3478. return -EINVAL;
  3479. }
  3480. mutex_lock(&panel->panel_lock);
  3481. utils = &panel->utils;
  3482. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3483. if (!mode->priv_info) {
  3484. rc = -ENOMEM;
  3485. goto done;
  3486. }
  3487. prv_info = mode->priv_info;
  3488. timings_np = utils->get_child_by_name(utils->data,
  3489. "qcom,mdss-dsi-display-timings");
  3490. if (!timings_np) {
  3491. DSI_ERR("no display timing nodes defined\n");
  3492. rc = -EINVAL;
  3493. goto parse_fail;
  3494. }
  3495. num_timings = utils->get_child_count(timings_np);
  3496. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3497. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3498. rc = -EINVAL;
  3499. goto parse_fail;
  3500. }
  3501. utils_data = utils->data;
  3502. traffic_mode = panel->video_config.traffic_mode;
  3503. dsi_for_each_child_node(timings_np, child_np) {
  3504. if (index != child_idx++)
  3505. continue;
  3506. utils->data = child_np;
  3507. if (panel->panel_mode_switch_enabled) {
  3508. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3509. mode->panel_mode_caps = panel->panel_mode;
  3510. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3511. child_idx);
  3512. }
  3513. } else {
  3514. mode->panel_mode_caps = panel->panel_mode;
  3515. }
  3516. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3517. if (rc)
  3518. mode->mode_idx = index;
  3519. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3520. if (rc) {
  3521. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3522. goto parse_fail;
  3523. }
  3524. if (panel->dyn_clk_caps.dyn_clk_support) {
  3525. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3526. if (rc)
  3527. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3528. }
  3529. rc = dsi_panel_parse_dsc_params(mode, utils);
  3530. if (rc) {
  3531. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3532. goto parse_fail;
  3533. }
  3534. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3535. if (rc) {
  3536. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3537. goto parse_fail;
  3538. }
  3539. rc = dsi_panel_parse_topology(prv_info, utils,
  3540. topology_override);
  3541. if (rc) {
  3542. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3543. goto parse_fail;
  3544. }
  3545. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3546. if (rc) {
  3547. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3548. goto parse_fail;
  3549. }
  3550. rc = dsi_panel_parse_jitter_config(mode, utils);
  3551. if (rc)
  3552. DSI_ERR(
  3553. "failed to parse panel jitter config, rc=%d\n", rc);
  3554. rc = dsi_panel_parse_phy_timing(mode, utils);
  3555. if (rc) {
  3556. DSI_ERR(
  3557. "failed to parse panel phy timings, rc=%d\n", rc);
  3558. goto parse_fail;
  3559. }
  3560. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3561. if (rc)
  3562. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3563. }
  3564. goto done;
  3565. parse_fail:
  3566. kfree(mode->priv_info);
  3567. mode->priv_info = NULL;
  3568. done:
  3569. utils->data = utils_data;
  3570. mutex_unlock(&panel->panel_lock);
  3571. return rc;
  3572. }
  3573. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3574. struct dsi_display_mode *mode,
  3575. struct dsi_host_config *config)
  3576. {
  3577. int rc = 0;
  3578. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3579. if (!panel || !mode || !config) {
  3580. DSI_ERR("invalid params\n");
  3581. return -EINVAL;
  3582. }
  3583. mutex_lock(&panel->panel_lock);
  3584. config->panel_mode = panel->panel_mode;
  3585. memcpy(&config->common_config, &panel->host_config,
  3586. sizeof(config->common_config));
  3587. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3588. memcpy(&config->u.video_engine, &panel->video_config,
  3589. sizeof(config->u.video_engine));
  3590. } else {
  3591. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3592. sizeof(config->u.cmd_engine));
  3593. }
  3594. memcpy(&config->video_timing, &mode->timing,
  3595. sizeof(config->video_timing));
  3596. config->video_timing.mdp_transfer_time_us =
  3597. mode->priv_info->mdp_transfer_time_us;
  3598. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3599. config->video_timing.dsc = &mode->priv_info->dsc;
  3600. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3601. config->video_timing.vdc = &mode->priv_info->vdc;
  3602. if (dyn_clk_caps->dyn_clk_support)
  3603. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3604. else
  3605. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3606. config->esc_clk_rate_hz = 19200000;
  3607. mutex_unlock(&panel->panel_lock);
  3608. return rc;
  3609. }
  3610. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3611. {
  3612. int rc = 0;
  3613. if (!panel) {
  3614. DSI_ERR("invalid params\n");
  3615. return -EINVAL;
  3616. }
  3617. mutex_lock(&panel->panel_lock);
  3618. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3619. if (panel->lp11_init)
  3620. goto error;
  3621. rc = dsi_panel_power_on(panel);
  3622. if (rc) {
  3623. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3624. goto error;
  3625. }
  3626. error:
  3627. mutex_unlock(&panel->panel_lock);
  3628. return rc;
  3629. }
  3630. int dsi_panel_update_pps(struct dsi_panel *panel)
  3631. {
  3632. int rc = 0;
  3633. struct dsi_panel_cmd_set *set = NULL;
  3634. struct dsi_display_mode_priv_info *priv_info = NULL;
  3635. if (!panel || !panel->cur_mode) {
  3636. DSI_ERR("invalid params\n");
  3637. return -EINVAL;
  3638. }
  3639. mutex_lock(&panel->panel_lock);
  3640. priv_info = panel->cur_mode->priv_info;
  3641. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3642. if (priv_info->dsc_enabled)
  3643. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3644. panel->dce_pps_cmd, 0,
  3645. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3646. else if (priv_info->vdc_enabled)
  3647. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3648. panel->dce_pps_cmd, 0,
  3649. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3650. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3651. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3652. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3653. if (rc) {
  3654. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3655. goto error;
  3656. }
  3657. }
  3658. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3659. if (rc) {
  3660. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3661. panel->name, rc);
  3662. }
  3663. dsi_panel_destroy_cmd_packets(set);
  3664. error:
  3665. mutex_unlock(&panel->panel_lock);
  3666. return rc;
  3667. }
  3668. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3669. {
  3670. int rc = 0;
  3671. if (!panel) {
  3672. DSI_ERR("invalid params\n");
  3673. return -EINVAL;
  3674. }
  3675. mutex_lock(&panel->panel_lock);
  3676. if (!panel->panel_initialized)
  3677. goto exit;
  3678. /*
  3679. * Consider LP1->LP2->LP1.
  3680. * If the panel is already in LP mode, do not need to
  3681. * set the regulator.
  3682. * IBB and AB power mode would be set at the same time
  3683. * in PMIC driver, so we only call ibb setting that is enough.
  3684. */
  3685. if (dsi_panel_is_type_oled(panel) &&
  3686. panel->power_mode != SDE_MODE_DPMS_LP2)
  3687. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3688. "ibb", REGULATOR_MODE_IDLE);
  3689. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3690. if (rc)
  3691. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3692. panel->name, rc);
  3693. exit:
  3694. mutex_unlock(&panel->panel_lock);
  3695. return rc;
  3696. }
  3697. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3698. {
  3699. int rc = 0;
  3700. if (!panel) {
  3701. DSI_ERR("invalid params\n");
  3702. return -EINVAL;
  3703. }
  3704. mutex_lock(&panel->panel_lock);
  3705. if (!panel->panel_initialized)
  3706. goto exit;
  3707. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3708. if (rc)
  3709. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3710. panel->name, rc);
  3711. exit:
  3712. mutex_unlock(&panel->panel_lock);
  3713. return rc;
  3714. }
  3715. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3716. {
  3717. int rc = 0;
  3718. if (!panel) {
  3719. DSI_ERR("invalid params\n");
  3720. return -EINVAL;
  3721. }
  3722. mutex_lock(&panel->panel_lock);
  3723. if (!panel->panel_initialized)
  3724. goto exit;
  3725. /*
  3726. * Consider about LP1->LP2->NOLP.
  3727. */
  3728. if (dsi_panel_is_type_oled(panel) &&
  3729. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3730. panel->power_mode == SDE_MODE_DPMS_LP2))
  3731. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3732. "ibb", REGULATOR_MODE_NORMAL);
  3733. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3734. if (rc)
  3735. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3736. panel->name, rc);
  3737. exit:
  3738. mutex_unlock(&panel->panel_lock);
  3739. return rc;
  3740. }
  3741. int dsi_panel_prepare(struct dsi_panel *panel)
  3742. {
  3743. int rc = 0;
  3744. if (!panel) {
  3745. DSI_ERR("invalid params\n");
  3746. return -EINVAL;
  3747. }
  3748. mutex_lock(&panel->panel_lock);
  3749. if (panel->lp11_init) {
  3750. rc = dsi_panel_power_on(panel);
  3751. if (rc) {
  3752. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3753. panel->name, rc);
  3754. goto error;
  3755. }
  3756. }
  3757. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3758. if (rc) {
  3759. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3760. panel->name, rc);
  3761. goto error;
  3762. }
  3763. error:
  3764. mutex_unlock(&panel->panel_lock);
  3765. return rc;
  3766. }
  3767. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3768. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3769. {
  3770. static const int ROI_CMD_LEN = 5;
  3771. int rc = 0;
  3772. /* DTYPE_DCS_LWRITE */
  3773. char *caset, *paset;
  3774. set->cmds = NULL;
  3775. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3776. if (!caset) {
  3777. rc = -ENOMEM;
  3778. goto exit;
  3779. }
  3780. caset[0] = 0x2a;
  3781. caset[1] = (roi->x & 0xFF00) >> 8;
  3782. caset[2] = roi->x & 0xFF;
  3783. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3784. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3785. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3786. if (!paset) {
  3787. rc = -ENOMEM;
  3788. goto error_free_mem;
  3789. }
  3790. paset[0] = 0x2b;
  3791. paset[1] = (roi->y & 0xFF00) >> 8;
  3792. paset[2] = roi->y & 0xFF;
  3793. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3794. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3795. set->type = DSI_CMD_SET_ROI;
  3796. set->state = DSI_CMD_SET_STATE_LP;
  3797. set->count = 2; /* send caset + paset together */
  3798. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3799. if (!set->cmds) {
  3800. rc = -ENOMEM;
  3801. goto error_free_mem;
  3802. }
  3803. set->cmds[0].msg.channel = 0;
  3804. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3805. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3806. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3807. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3808. set->cmds[0].msg.tx_buf = caset;
  3809. set->cmds[0].msg.rx_len = 0;
  3810. set->cmds[0].msg.rx_buf = 0;
  3811. set->cmds[0].last_command = 0;
  3812. set->cmds[0].post_wait_ms = 0;
  3813. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3814. set->cmds[1].msg.channel = 0;
  3815. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3816. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3817. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3818. set->cmds[1].msg.tx_buf = paset;
  3819. set->cmds[1].msg.rx_len = 0;
  3820. set->cmds[1].msg.rx_buf = 0;
  3821. set->cmds[1].last_command = 1;
  3822. set->cmds[1].post_wait_ms = 0;
  3823. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3824. goto exit;
  3825. error_free_mem:
  3826. kfree(caset);
  3827. kfree(paset);
  3828. kfree(set->cmds);
  3829. exit:
  3830. return rc;
  3831. }
  3832. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3833. int ctrl_idx)
  3834. {
  3835. int rc = 0;
  3836. if (!panel) {
  3837. DSI_ERR("invalid params\n");
  3838. return -EINVAL;
  3839. }
  3840. mutex_lock(&panel->panel_lock);
  3841. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3842. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3843. if (rc)
  3844. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3845. panel->name, rc);
  3846. mutex_unlock(&panel->panel_lock);
  3847. return rc;
  3848. }
  3849. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3850. int ctrl_idx)
  3851. {
  3852. int rc = 0;
  3853. if (!panel) {
  3854. DSI_ERR("invalid params\n");
  3855. return -EINVAL;
  3856. }
  3857. mutex_lock(&panel->panel_lock);
  3858. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3859. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3860. if (rc)
  3861. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3862. panel->name, rc);
  3863. mutex_unlock(&panel->panel_lock);
  3864. return rc;
  3865. }
  3866. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3867. struct dsi_rect *roi)
  3868. {
  3869. int rc = 0;
  3870. struct dsi_panel_cmd_set *set;
  3871. struct dsi_display_mode_priv_info *priv_info;
  3872. if (!panel || !panel->cur_mode) {
  3873. DSI_ERR("Invalid params\n");
  3874. return -EINVAL;
  3875. }
  3876. priv_info = panel->cur_mode->priv_info;
  3877. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3878. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3879. if (rc) {
  3880. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3881. panel->name, rc);
  3882. return rc;
  3883. }
  3884. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3885. roi->x, roi->y, roi->w, roi->h);
  3886. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3887. mutex_lock(&panel->panel_lock);
  3888. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3889. if (rc)
  3890. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3891. panel->name, rc);
  3892. mutex_unlock(&panel->panel_lock);
  3893. dsi_panel_destroy_cmd_packets(set);
  3894. dsi_panel_dealloc_cmd_packets(set);
  3895. return rc;
  3896. }
  3897. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3898. {
  3899. int rc = 0;
  3900. if (!panel) {
  3901. DSI_ERR("Invalid params\n");
  3902. return -EINVAL;
  3903. }
  3904. mutex_lock(&panel->panel_lock);
  3905. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3906. if (rc)
  3907. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3908. panel->name, rc);
  3909. mutex_unlock(&panel->panel_lock);
  3910. return rc;
  3911. }
  3912. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3913. {
  3914. int rc = 0;
  3915. if (!panel) {
  3916. DSI_ERR("Invalid params\n");
  3917. return -EINVAL;
  3918. }
  3919. mutex_lock(&panel->panel_lock);
  3920. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3921. if (rc)
  3922. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3923. panel->name, rc);
  3924. mutex_unlock(&panel->panel_lock);
  3925. return rc;
  3926. }
  3927. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3928. {
  3929. int rc = 0;
  3930. if (!panel) {
  3931. DSI_ERR("Invalid params\n");
  3932. return -EINVAL;
  3933. }
  3934. mutex_lock(&panel->panel_lock);
  3935. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3936. if (rc)
  3937. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3938. panel->name, rc);
  3939. mutex_unlock(&panel->panel_lock);
  3940. return rc;
  3941. }
  3942. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3943. {
  3944. int rc = 0;
  3945. if (!panel) {
  3946. DSI_ERR("Invalid params\n");
  3947. return -EINVAL;
  3948. }
  3949. mutex_lock(&panel->panel_lock);
  3950. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3951. if (rc)
  3952. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3953. panel->name, rc);
  3954. mutex_unlock(&panel->panel_lock);
  3955. return rc;
  3956. }
  3957. int dsi_panel_switch(struct dsi_panel *panel)
  3958. {
  3959. int rc = 0;
  3960. if (!panel) {
  3961. DSI_ERR("Invalid params\n");
  3962. return -EINVAL;
  3963. }
  3964. mutex_lock(&panel->panel_lock);
  3965. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3966. if (rc)
  3967. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3968. panel->name, rc);
  3969. mutex_unlock(&panel->panel_lock);
  3970. return rc;
  3971. }
  3972. int dsi_panel_post_switch(struct dsi_panel *panel)
  3973. {
  3974. int rc = 0;
  3975. if (!panel) {
  3976. DSI_ERR("Invalid params\n");
  3977. return -EINVAL;
  3978. }
  3979. mutex_lock(&panel->panel_lock);
  3980. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3981. if (rc)
  3982. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3983. panel->name, rc);
  3984. mutex_unlock(&panel->panel_lock);
  3985. return rc;
  3986. }
  3987. int dsi_panel_enable(struct dsi_panel *panel)
  3988. {
  3989. int rc = 0;
  3990. if (!panel) {
  3991. DSI_ERR("Invalid params\n");
  3992. return -EINVAL;
  3993. }
  3994. mutex_lock(&panel->panel_lock);
  3995. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3996. if (rc) {
  3997. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3998. panel->name, rc);
  3999. goto error;
  4000. }
  4001. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  4002. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  4003. if (rc) {
  4004. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  4005. panel->name, rc);
  4006. goto error;
  4007. }
  4008. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  4009. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  4010. if (rc) {
  4011. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  4012. panel->name, rc);
  4013. goto error;
  4014. }
  4015. }
  4016. panel->panel_initialized = true;
  4017. error:
  4018. mutex_unlock(&panel->panel_lock);
  4019. return rc;
  4020. }
  4021. int dsi_panel_post_enable(struct dsi_panel *panel)
  4022. {
  4023. int rc = 0;
  4024. if (!panel) {
  4025. DSI_ERR("invalid params\n");
  4026. return -EINVAL;
  4027. }
  4028. mutex_lock(&panel->panel_lock);
  4029. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  4030. if (rc) {
  4031. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  4032. panel->name, rc);
  4033. goto error;
  4034. }
  4035. error:
  4036. mutex_unlock(&panel->panel_lock);
  4037. return rc;
  4038. }
  4039. int dsi_panel_pre_disable(struct dsi_panel *panel)
  4040. {
  4041. int rc = 0;
  4042. if (!panel) {
  4043. DSI_ERR("invalid params\n");
  4044. return -EINVAL;
  4045. }
  4046. mutex_lock(&panel->panel_lock);
  4047. if (gpio_is_valid(panel->bl_config.en_gpio))
  4048. gpio_set_value(panel->bl_config.en_gpio, 0);
  4049. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4050. if (rc) {
  4051. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4052. panel->name, rc);
  4053. goto error;
  4054. }
  4055. error:
  4056. mutex_unlock(&panel->panel_lock);
  4057. return rc;
  4058. }
  4059. int dsi_panel_disable(struct dsi_panel *panel)
  4060. {
  4061. int rc = 0;
  4062. if (!panel) {
  4063. DSI_ERR("invalid params\n");
  4064. return -EINVAL;
  4065. }
  4066. mutex_lock(&panel->panel_lock);
  4067. /* Avoid sending panel off commands when ESD recovery is underway */
  4068. if (!atomic_read(&panel->esd_recovery_pending)) {
  4069. /*
  4070. * Need to set IBB/AB regulator mode to STANDBY,
  4071. * if panel is going off from AOD mode.
  4072. */
  4073. if (dsi_panel_is_type_oled(panel) &&
  4074. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4075. panel->power_mode == SDE_MODE_DPMS_LP2))
  4076. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4077. "ibb", REGULATOR_MODE_STANDBY);
  4078. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4079. if (rc) {
  4080. /*
  4081. * Sending panel off commands may fail when DSI
  4082. * controller is in a bad state. These failures can be
  4083. * ignored since controller will go for full reset on
  4084. * subsequent display enable anyway.
  4085. */
  4086. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4087. panel->name, rc);
  4088. rc = 0;
  4089. }
  4090. }
  4091. panel->panel_initialized = false;
  4092. panel->power_mode = SDE_MODE_DPMS_OFF;
  4093. mutex_unlock(&panel->panel_lock);
  4094. return rc;
  4095. }
  4096. int dsi_panel_unprepare(struct dsi_panel *panel)
  4097. {
  4098. int rc = 0;
  4099. if (!panel) {
  4100. DSI_ERR("invalid params\n");
  4101. return -EINVAL;
  4102. }
  4103. mutex_lock(&panel->panel_lock);
  4104. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4105. if (rc) {
  4106. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4107. panel->name, rc);
  4108. goto error;
  4109. }
  4110. error:
  4111. mutex_unlock(&panel->panel_lock);
  4112. return rc;
  4113. }
  4114. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4115. {
  4116. int rc = 0;
  4117. if (!panel) {
  4118. DSI_ERR("invalid params\n");
  4119. return -EINVAL;
  4120. }
  4121. mutex_lock(&panel->panel_lock);
  4122. rc = dsi_panel_power_off(panel);
  4123. if (rc) {
  4124. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4125. panel->name, rc);
  4126. goto error;
  4127. }
  4128. error:
  4129. mutex_unlock(&panel->panel_lock);
  4130. return rc;
  4131. }