adreno_cp_parser.h 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2013-2014, 2017, 2019, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef __ADRENO_IB_PARSER__
  6. #define __ADRENO_IB_PARSER__
  7. #include "adreno.h"
  8. extern const unsigned int a3xx_cp_addr_regs[];
  9. extern const unsigned int a4xx_cp_addr_regs[];
  10. /*
  11. * struct adreno_ib_object - Structure containing information about an
  12. * address range found in an IB
  13. * @gpuaddr: The starting gpuaddress of the range
  14. * @size: Size of the range
  15. * @snapshot_obj_type - Type of range used in snapshot
  16. * @entry: The memory entry in which this range is found
  17. */
  18. struct adreno_ib_object {
  19. uint64_t gpuaddr;
  20. uint64_t size;
  21. int snapshot_obj_type;
  22. struct kgsl_mem_entry *entry;
  23. };
  24. /*
  25. * struct adreno_ib_object_list - List of address ranges found in IB
  26. * @obj_list: The address range list
  27. * @num_objs: Number of objects in list
  28. */
  29. struct adreno_ib_object_list {
  30. struct adreno_ib_object *obj_list;
  31. int num_objs;
  32. };
  33. /*
  34. * adreno registers used during IB parsing, there contain addresses
  35. * and sizes of the addresses that present in an IB
  36. */
  37. enum adreno_cp_addr_regs {
  38. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_0 = 0,
  39. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_0,
  40. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_1,
  41. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_1,
  42. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_2,
  43. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_2,
  44. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_3,
  45. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_3,
  46. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_4,
  47. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_4,
  48. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_5,
  49. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_5,
  50. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_6,
  51. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_6,
  52. ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_7,
  53. ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_7,
  54. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_0,
  55. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_1,
  56. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_2,
  57. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_3,
  58. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_4,
  59. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_5,
  60. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_6,
  61. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_7,
  62. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_8,
  63. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_9,
  64. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_10,
  65. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_11,
  66. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_12,
  67. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_13,
  68. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_14,
  69. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_15,
  70. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_16,
  71. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_17,
  72. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_18,
  73. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_19,
  74. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_20,
  75. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_21,
  76. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_22,
  77. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_23,
  78. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_24,
  79. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_25,
  80. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_26,
  81. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_27,
  82. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_28,
  83. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_29,
  84. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_30,
  85. ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_31,
  86. ADRENO_CP_ADDR_VSC_SIZE_ADDRESS,
  87. ADRENO_CP_ADDR_SP_VS_PVT_MEM_ADDR,
  88. ADRENO_CP_ADDR_SP_FS_PVT_MEM_ADDR,
  89. ADRENO_CP_ADDR_SP_VS_OBJ_START_REG,
  90. ADRENO_CP_ADDR_SP_FS_OBJ_START_REG,
  91. ADRENO_CP_UCHE_INVALIDATE0,
  92. ADRENO_CP_UCHE_INVALIDATE1,
  93. ADRENO_CP_ADDR_MAX,
  94. };
  95. /*
  96. * adreno_ib_init_ib_obj() - Create an ib object structure and initialize it
  97. * with gpuaddress and size
  98. * @gpuaddr: gpuaddr with which to initialize the object with
  99. * @size: Size in bytes with which the object is initialized
  100. * @ib_type: The IB type used by snapshot
  101. *
  102. * Returns the object pointer on success else error code in the pointer
  103. */
  104. static inline void adreno_ib_init_ib_obj(uint64_t gpuaddr,
  105. uint64_t size, int obj_type,
  106. struct kgsl_mem_entry *entry,
  107. struct adreno_ib_object *ib_obj)
  108. {
  109. ib_obj->gpuaddr = gpuaddr;
  110. ib_obj->size = size;
  111. ib_obj->snapshot_obj_type = obj_type;
  112. ib_obj->entry = entry;
  113. }
  114. /*
  115. * adreno_cp_parser_getreg() - Returns the value of register offset
  116. * @adreno_dev: The adreno device being operated upon
  117. * @reg_enum: Enum index of the register whose offset is returned
  118. */
  119. static inline int adreno_cp_parser_getreg(struct adreno_device *adreno_dev,
  120. enum adreno_cp_addr_regs reg_enum)
  121. {
  122. if (reg_enum == ADRENO_CP_ADDR_MAX)
  123. return -EEXIST;
  124. if (!adreno_is_a3xx(adreno_dev))
  125. return -EEXIST;
  126. return a3xx_cp_addr_regs[reg_enum];
  127. }
  128. /*
  129. * adreno_cp_parser_regindex() - Returns enum index for a given register offset
  130. * @adreno_dev: The adreno device being operated upon
  131. * @offset: Register offset
  132. * @start: The start index to search from
  133. * @end: The last index to search
  134. *
  135. * Checks the list of registers defined for the device and returns the index
  136. * whose offset value matches offset parameter.
  137. */
  138. static inline int adreno_cp_parser_regindex(struct adreno_device *adreno_dev,
  139. unsigned int offset,
  140. enum adreno_cp_addr_regs start,
  141. enum adreno_cp_addr_regs end)
  142. {
  143. int i;
  144. const unsigned int *regs;
  145. if (!adreno_is_a3xx(adreno_dev))
  146. return -EEXIST;
  147. regs = a3xx_cp_addr_regs;
  148. for (i = start; i <= end && i < ADRENO_CP_ADDR_MAX; i++)
  149. if (regs[i] == offset)
  150. return i;
  151. return -EEXIST;
  152. }
  153. int adreno_ib_create_object_list(
  154. struct kgsl_device *device,
  155. struct kgsl_process_private *process,
  156. uint64_t gpuaddr, uint64_t dwords, uint64_t ib2base,
  157. struct adreno_ib_object_list **out_ib_obj_list);
  158. void adreno_ib_destroy_obj_list(struct adreno_ib_object_list *ib_obj_list);
  159. #endif