dp_main.c 206 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /**
  92. * default_dscp_tid_map - Default DSCP-TID mapping
  93. *
  94. * DSCP TID
  95. * 000000 0
  96. * 001000 1
  97. * 010000 2
  98. * 011000 3
  99. * 100000 4
  100. * 101000 5
  101. * 110000 6
  102. * 111000 7
  103. */
  104. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  105. 0, 0, 0, 0, 0, 0, 0, 0,
  106. 1, 1, 1, 1, 1, 1, 1, 1,
  107. 2, 2, 2, 2, 2, 2, 2, 2,
  108. 3, 3, 3, 3, 3, 3, 3, 3,
  109. 4, 4, 4, 4, 4, 4, 4, 4,
  110. 5, 5, 5, 5, 5, 5, 5, 5,
  111. 6, 6, 6, 6, 6, 6, 6, 6,
  112. 7, 7, 7, 7, 7, 7, 7, 7,
  113. };
  114. /*
  115. * struct dp_rate_debug
  116. *
  117. * @mcs_type: print string for a given mcs
  118. * @valid: valid mcs rate?
  119. */
  120. struct dp_rate_debug {
  121. char mcs_type[DP_MAX_MCS_STRING_LEN];
  122. uint8_t valid;
  123. };
  124. #define MCS_VALID 1
  125. #define MCS_INVALID 0
  126. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  127. {
  128. {"OFDM 48 Mbps", MCS_VALID},
  129. {"OFDM 24 Mbps", MCS_VALID},
  130. {"OFDM 12 Mbps", MCS_VALID},
  131. {"OFDM 6 Mbps ", MCS_VALID},
  132. {"OFDM 54 Mbps", MCS_VALID},
  133. {"OFDM 36 Mbps", MCS_VALID},
  134. {"OFDM 18 Mbps", MCS_VALID},
  135. {"OFDM 9 Mbps ", MCS_VALID},
  136. {"INVALID ", MCS_INVALID},
  137. {"INVALID ", MCS_INVALID},
  138. {"INVALID ", MCS_INVALID},
  139. {"INVALID ", MCS_INVALID},
  140. {"INVALID ", MCS_VALID},
  141. },
  142. {
  143. {"CCK 11 Mbps Long ", MCS_VALID},
  144. {"CCK 5.5 Mbps Long ", MCS_VALID},
  145. {"CCK 2 Mbps Long ", MCS_VALID},
  146. {"CCK 1 Mbps Long ", MCS_VALID},
  147. {"CCK 11 Mbps Short ", MCS_VALID},
  148. {"CCK 5.5 Mbps Short", MCS_VALID},
  149. {"CCK 2 Mbps Short ", MCS_VALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_INVALID},
  153. {"INVALID ", MCS_INVALID},
  154. {"INVALID ", MCS_INVALID},
  155. {"INVALID ", MCS_VALID},
  156. },
  157. {
  158. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  159. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  160. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  161. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  162. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  163. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  164. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  165. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_INVALID},
  170. {"INVALID ", MCS_VALID},
  171. },
  172. {
  173. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  174. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  175. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  176. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  177. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  178. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  179. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  180. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  181. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  182. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  183. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  184. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  185. {"INVALID ", MCS_VALID},
  186. },
  187. {
  188. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  189. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  190. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  191. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  192. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  193. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  194. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  195. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  196. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  197. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  198. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  199. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  200. {"INVALID ", MCS_VALID},
  201. }
  202. };
  203. /**
  204. * @brief Cpu ring map types
  205. */
  206. enum dp_cpu_ring_map_types {
  207. DP_DEFAULT_MAP,
  208. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  209. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  210. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  211. DP_CPU_RING_MAP_MAX
  212. };
  213. /**
  214. * @brief Cpu to tx ring map
  215. */
  216. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  217. {0x0, 0x1, 0x2, 0x0},
  218. {0x1, 0x2, 0x1, 0x2},
  219. {0x0, 0x2, 0x0, 0x2},
  220. {0x2, 0x2, 0x2, 0x2}
  221. };
  222. /**
  223. * @brief Select the type of statistics
  224. */
  225. enum dp_stats_type {
  226. STATS_FW = 0,
  227. STATS_HOST = 1,
  228. STATS_TYPE_MAX = 2,
  229. };
  230. /**
  231. * @brief General Firmware statistics options
  232. *
  233. */
  234. enum dp_fw_stats {
  235. TXRX_FW_STATS_INVALID = -1,
  236. };
  237. /**
  238. * dp_stats_mapping_table - Firmware and Host statistics
  239. * currently supported
  240. */
  241. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  242. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  253. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  261. /* Last ENUM for HTT FW STATS */
  262. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  263. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  264. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  265. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  266. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  267. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  268. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  269. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  270. };
  271. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  272. struct cdp_peer *peer_hdl,
  273. uint8_t *mac_addr,
  274. enum cdp_txrx_ast_entry_type type,
  275. uint32_t flags)
  276. {
  277. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  278. (struct dp_peer *)peer_hdl,
  279. mac_addr,
  280. type,
  281. flags);
  282. }
  283. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  284. void *ast_entry_hdl)
  285. {
  286. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  287. qdf_spin_lock_bh(&soc->ast_lock);
  288. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  289. (struct dp_ast_entry *)ast_entry_hdl);
  290. qdf_spin_unlock_bh(&soc->ast_lock);
  291. }
  292. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  293. struct cdp_peer *peer_hdl,
  294. uint8_t *wds_macaddr,
  295. uint32_t flags)
  296. {
  297. int status;
  298. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  299. struct dp_ast_entry *ast_entry = NULL;
  300. qdf_spin_lock_bh(&soc->ast_lock);
  301. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  302. status = dp_peer_update_ast(soc,
  303. (struct dp_peer *)peer_hdl,
  304. ast_entry,
  305. flags);
  306. qdf_spin_unlock_bh(&soc->ast_lock);
  307. return status;
  308. }
  309. /*
  310. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  311. * @soc_handle: Datapath SOC handle
  312. * @ast_entry_hdl: AST Entry handle
  313. * Return: None
  314. */
  315. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  316. uint8_t *wds_macaddr)
  317. {
  318. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  319. struct dp_ast_entry *ast_entry = NULL;
  320. qdf_spin_lock_bh(&soc->ast_lock);
  321. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  322. if (ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) {
  323. ast_entry->is_active = TRUE;
  324. }
  325. qdf_spin_unlock_bh(&soc->ast_lock);
  326. }
  327. /*
  328. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  329. * @soc: Datapath SOC handle
  330. *
  331. * Return: None
  332. */
  333. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  334. {
  335. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  336. struct dp_pdev *pdev;
  337. struct dp_vdev *vdev;
  338. struct dp_peer *peer;
  339. struct dp_ast_entry *ase, *temp_ase;
  340. int i;
  341. qdf_spin_lock_bh(&soc->ast_lock);
  342. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  343. pdev = soc->pdev_list[i];
  344. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  345. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  346. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  347. if (ase->type ==
  348. CDP_TXRX_AST_TYPE_STATIC)
  349. continue;
  350. ase->is_active = TRUE;
  351. }
  352. }
  353. }
  354. }
  355. qdf_spin_unlock_bh(&soc->ast_lock);
  356. }
  357. /*
  358. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  359. * @soc: Datapath SOC handle
  360. *
  361. * Return: None
  362. */
  363. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  364. {
  365. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  366. struct dp_pdev *pdev;
  367. struct dp_vdev *vdev;
  368. struct dp_peer *peer;
  369. struct dp_ast_entry *ase, *temp_ase;
  370. int i;
  371. qdf_spin_lock_bh(&soc->ast_lock);
  372. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  373. pdev = soc->pdev_list[i];
  374. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  375. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  376. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  377. if (ase->type ==
  378. CDP_TXRX_AST_TYPE_STATIC)
  379. continue;
  380. dp_peer_del_ast(soc, ase);
  381. }
  382. }
  383. }
  384. }
  385. qdf_spin_unlock_bh(&soc->ast_lock);
  386. }
  387. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  388. uint8_t *ast_mac_addr)
  389. {
  390. struct dp_ast_entry *ast_entry;
  391. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  392. qdf_spin_lock_bh(&soc->ast_lock);
  393. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  394. qdf_spin_unlock_bh(&soc->ast_lock);
  395. return (void *)ast_entry;
  396. }
  397. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  398. void *ast_entry_hdl)
  399. {
  400. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  401. (struct dp_ast_entry *)ast_entry_hdl);
  402. }
  403. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  404. void *ast_entry_hdl)
  405. {
  406. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  407. (struct dp_ast_entry *)ast_entry_hdl);
  408. }
  409. static void dp_peer_ast_set_type_wifi3(
  410. struct cdp_soc_t *soc_hdl,
  411. void *ast_entry_hdl,
  412. enum cdp_txrx_ast_entry_type type)
  413. {
  414. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  415. (struct dp_ast_entry *)ast_entry_hdl,
  416. type);
  417. }
  418. /**
  419. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  420. * @ring_num: ring num of the ring being queried
  421. * @grp_mask: the grp_mask array for the ring type in question.
  422. *
  423. * The grp_mask array is indexed by group number and the bit fields correspond
  424. * to ring numbers. We are finding which interrupt group a ring belongs to.
  425. *
  426. * Return: the index in the grp_mask array with the ring number.
  427. * -QDF_STATUS_E_NOENT if no entry is found
  428. */
  429. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  430. {
  431. int ext_group_num;
  432. int mask = 1 << ring_num;
  433. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  434. ext_group_num++) {
  435. if (mask & grp_mask[ext_group_num])
  436. return ext_group_num;
  437. }
  438. return -QDF_STATUS_E_NOENT;
  439. }
  440. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  441. enum hal_ring_type ring_type,
  442. int ring_num)
  443. {
  444. int *grp_mask;
  445. switch (ring_type) {
  446. case WBM2SW_RELEASE:
  447. /* dp_tx_comp_handler - soc->tx_comp_ring */
  448. if (ring_num < 3)
  449. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  450. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  451. else if (ring_num == 3) {
  452. /* sw treats this as a separate ring type */
  453. grp_mask = &soc->wlan_cfg_ctx->
  454. int_rx_wbm_rel_ring_mask[0];
  455. ring_num = 0;
  456. } else {
  457. qdf_assert(0);
  458. return -QDF_STATUS_E_NOENT;
  459. }
  460. break;
  461. case REO_EXCEPTION:
  462. /* dp_rx_err_process - &soc->reo_exception_ring */
  463. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  464. break;
  465. case REO_DST:
  466. /* dp_rx_process - soc->reo_dest_ring */
  467. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  468. break;
  469. case REO_STATUS:
  470. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  471. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  472. break;
  473. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  474. case RXDMA_MONITOR_STATUS:
  475. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  476. case RXDMA_MONITOR_DST:
  477. /* dp_mon_process */
  478. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  479. break;
  480. case RXDMA_DST:
  481. /* dp_rxdma_err_process */
  482. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  483. break;
  484. case RXDMA_BUF:
  485. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  486. break;
  487. case RXDMA_MONITOR_BUF:
  488. /* TODO: support low_thresh interrupt */
  489. return -QDF_STATUS_E_NOENT;
  490. break;
  491. case TCL_DATA:
  492. case TCL_CMD:
  493. case REO_CMD:
  494. case SW2WBM_RELEASE:
  495. case WBM_IDLE_LINK:
  496. /* normally empty SW_TO_HW rings */
  497. return -QDF_STATUS_E_NOENT;
  498. break;
  499. case TCL_STATUS:
  500. case REO_REINJECT:
  501. /* misc unused rings */
  502. return -QDF_STATUS_E_NOENT;
  503. break;
  504. case CE_SRC:
  505. case CE_DST:
  506. case CE_DST_STATUS:
  507. /* CE_rings - currently handled by hif */
  508. default:
  509. return -QDF_STATUS_E_NOENT;
  510. break;
  511. }
  512. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  513. }
  514. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  515. *ring_params, int ring_type, int ring_num)
  516. {
  517. int msi_group_number;
  518. int msi_data_count;
  519. int ret;
  520. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  521. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  522. &msi_data_count, &msi_data_start,
  523. &msi_irq_start);
  524. if (ret)
  525. return;
  526. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  527. ring_num);
  528. if (msi_group_number < 0) {
  529. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  530. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  531. ring_type, ring_num);
  532. ring_params->msi_addr = 0;
  533. ring_params->msi_data = 0;
  534. return;
  535. }
  536. if (msi_group_number > msi_data_count) {
  537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  538. FL("2 msi_groups will share an msi; msi_group_num %d"),
  539. msi_group_number);
  540. QDF_ASSERT(0);
  541. }
  542. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  543. ring_params->msi_addr = addr_low;
  544. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  545. ring_params->msi_data = (msi_group_number % msi_data_count)
  546. + msi_data_start;
  547. ring_params->flags |= HAL_SRNG_MSI_INTR;
  548. }
  549. /**
  550. * dp_print_ast_stats() - Dump AST table contents
  551. * @soc: Datapath soc handle
  552. *
  553. * return void
  554. */
  555. #ifdef FEATURE_AST
  556. static void dp_print_ast_stats(struct dp_soc *soc)
  557. {
  558. uint8_t i;
  559. uint8_t num_entries = 0;
  560. struct dp_vdev *vdev;
  561. struct dp_pdev *pdev;
  562. struct dp_peer *peer;
  563. struct dp_ast_entry *ase, *tmp_ase;
  564. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  565. DP_PRINT_STATS("AST Stats:");
  566. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  567. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  568. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  569. DP_PRINT_STATS("AST Table:");
  570. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  571. pdev = soc->pdev_list[i];
  572. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  573. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  574. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  575. DP_PRINT_STATS("%6d mac_addr = %pM"
  576. " peer_mac_addr = %pM"
  577. " type = %s"
  578. " next_hop = %d"
  579. " is_active = %d"
  580. " is_bss = %d"
  581. " ast_idx = %d"
  582. " pdev_id = %d"
  583. " vdev_id = %d",
  584. ++num_entries,
  585. ase->mac_addr.raw,
  586. ase->peer->mac_addr.raw,
  587. type[ase->type],
  588. ase->next_hop,
  589. ase->is_active,
  590. ase->is_bss,
  591. ase->ast_idx,
  592. ase->pdev_id,
  593. ase->vdev_id);
  594. }
  595. }
  596. }
  597. }
  598. }
  599. #else
  600. static void dp_print_ast_stats(struct dp_soc *soc)
  601. {
  602. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  603. return;
  604. }
  605. #endif
  606. static void dp_print_peer_table(struct dp_vdev *vdev)
  607. {
  608. struct dp_peer *peer = NULL;
  609. DP_PRINT_STATS("Dumping Peer Table Stats:");
  610. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  611. if (!peer) {
  612. DP_PRINT_STATS("Invalid Peer");
  613. return;
  614. }
  615. DP_PRINT_STATS(" peer_mac_addr = %pM"
  616. " nawds_enabled = %d"
  617. " bss_peer = %d"
  618. " wapi = %d"
  619. " wds_enabled = %d"
  620. " delete in progress = %d",
  621. peer->mac_addr.raw,
  622. peer->nawds_enabled,
  623. peer->bss_peer,
  624. peer->wapi,
  625. peer->wds_enabled,
  626. peer->delete_in_progress);
  627. }
  628. }
  629. /*
  630. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  631. */
  632. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  633. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  634. {
  635. void *hal_soc = soc->hal_soc;
  636. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  637. /* TODO: See if we should get align size from hal */
  638. uint32_t ring_base_align = 8;
  639. struct hal_srng_params ring_params;
  640. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  641. /* TODO: Currently hal layer takes care of endianness related settings.
  642. * See if these settings need to passed from DP layer
  643. */
  644. ring_params.flags = 0;
  645. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  646. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  647. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  648. srng->hal_srng = NULL;
  649. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  650. srng->num_entries = num_entries;
  651. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  652. soc->osdev, soc->osdev->dev, srng->alloc_size,
  653. &(srng->base_paddr_unaligned));
  654. if (!srng->base_vaddr_unaligned) {
  655. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  656. FL("alloc failed - ring_type: %d, ring_num %d"),
  657. ring_type, ring_num);
  658. return QDF_STATUS_E_NOMEM;
  659. }
  660. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  661. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  662. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  663. ((unsigned long)(ring_params.ring_base_vaddr) -
  664. (unsigned long)srng->base_vaddr_unaligned);
  665. ring_params.num_entries = num_entries;
  666. if (soc->intr_mode == DP_INTR_MSI) {
  667. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  668. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  669. FL("Using MSI for ring_type: %d, ring_num %d"),
  670. ring_type, ring_num);
  671. } else {
  672. ring_params.msi_data = 0;
  673. ring_params.msi_addr = 0;
  674. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  675. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  676. ring_type, ring_num);
  677. }
  678. /*
  679. * Setup interrupt timer and batch counter thresholds for
  680. * interrupt mitigation based on ring type
  681. */
  682. if (ring_type == REO_DST) {
  683. ring_params.intr_timer_thres_us =
  684. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  685. ring_params.intr_batch_cntr_thres_entries =
  686. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  687. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  688. ring_params.intr_timer_thres_us =
  689. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  690. ring_params.intr_batch_cntr_thres_entries =
  691. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  692. } else {
  693. ring_params.intr_timer_thres_us =
  694. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  695. ring_params.intr_batch_cntr_thres_entries =
  696. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  697. }
  698. /* Enable low threshold interrupts for rx buffer rings (regular and
  699. * monitor buffer rings.
  700. * TODO: See if this is required for any other ring
  701. */
  702. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  703. (ring_type == RXDMA_MONITOR_STATUS)) {
  704. /* TODO: Setting low threshold to 1/8th of ring size
  705. * see if this needs to be configurable
  706. */
  707. ring_params.low_threshold = num_entries >> 3;
  708. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  709. ring_params.intr_timer_thres_us =
  710. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  711. ring_params.intr_batch_cntr_thres_entries = 0;
  712. }
  713. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  714. mac_id, &ring_params);
  715. if (!srng->hal_srng) {
  716. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  717. srng->alloc_size,
  718. srng->base_vaddr_unaligned,
  719. srng->base_paddr_unaligned, 0);
  720. }
  721. return 0;
  722. }
  723. /**
  724. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  725. * Any buffers allocated and attached to ring entries are expected to be freed
  726. * before calling this function.
  727. */
  728. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  729. int ring_type, int ring_num)
  730. {
  731. if (!srng->hal_srng) {
  732. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  733. FL("Ring type: %d, num:%d not setup"),
  734. ring_type, ring_num);
  735. return;
  736. }
  737. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  738. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  739. srng->alloc_size,
  740. srng->base_vaddr_unaligned,
  741. srng->base_paddr_unaligned, 0);
  742. srng->hal_srng = NULL;
  743. }
  744. /* TODO: Need this interface from HIF */
  745. void *hif_get_hal_handle(void *hif_handle);
  746. /*
  747. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  748. * @dp_ctx: DP SOC handle
  749. * @budget: Number of frames/descriptors that can be processed in one shot
  750. *
  751. * Return: remaining budget/quota for the soc device
  752. */
  753. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  754. {
  755. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  756. struct dp_soc *soc = int_ctx->soc;
  757. int ring = 0;
  758. uint32_t work_done = 0;
  759. int budget = dp_budget;
  760. uint8_t tx_mask = int_ctx->tx_ring_mask;
  761. uint8_t rx_mask = int_ctx->rx_ring_mask;
  762. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  763. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  764. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  765. uint32_t remaining_quota = dp_budget;
  766. struct dp_pdev *pdev = NULL;
  767. int mac_id;
  768. /* Process Tx completion interrupts first to return back buffers */
  769. while (tx_mask) {
  770. if (tx_mask & 0x1) {
  771. work_done = dp_tx_comp_handler(soc,
  772. soc->tx_comp_ring[ring].hal_srng,
  773. remaining_quota);
  774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  775. "tx mask 0x%x ring %d, budget %d, work_done %d",
  776. tx_mask, ring, budget, work_done);
  777. budget -= work_done;
  778. if (budget <= 0)
  779. goto budget_done;
  780. remaining_quota = budget;
  781. }
  782. tx_mask = tx_mask >> 1;
  783. ring++;
  784. }
  785. /* Process REO Exception ring interrupt */
  786. if (rx_err_mask) {
  787. work_done = dp_rx_err_process(soc,
  788. soc->reo_exception_ring.hal_srng,
  789. remaining_quota);
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  791. "REO Exception Ring: work_done %d budget %d",
  792. work_done, budget);
  793. budget -= work_done;
  794. if (budget <= 0) {
  795. goto budget_done;
  796. }
  797. remaining_quota = budget;
  798. }
  799. /* Process Rx WBM release ring interrupt */
  800. if (rx_wbm_rel_mask) {
  801. work_done = dp_rx_wbm_err_process(soc,
  802. soc->rx_rel_ring.hal_srng, remaining_quota);
  803. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  804. "WBM Release Ring: work_done %d budget %d",
  805. work_done, budget);
  806. budget -= work_done;
  807. if (budget <= 0) {
  808. goto budget_done;
  809. }
  810. remaining_quota = budget;
  811. }
  812. /* Process Rx interrupts */
  813. if (rx_mask) {
  814. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  815. if (rx_mask & (1 << ring)) {
  816. work_done = dp_rx_process(int_ctx,
  817. soc->reo_dest_ring[ring].hal_srng,
  818. remaining_quota);
  819. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  820. "rx mask 0x%x ring %d, work_done %d budget %d",
  821. rx_mask, ring, work_done, budget);
  822. budget -= work_done;
  823. if (budget <= 0)
  824. goto budget_done;
  825. remaining_quota = budget;
  826. }
  827. }
  828. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  829. work_done = dp_rxdma_err_process(soc, ring,
  830. remaining_quota);
  831. budget -= work_done;
  832. }
  833. }
  834. if (reo_status_mask)
  835. dp_reo_status_ring_handler(soc);
  836. /* Process LMAC interrupts */
  837. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  838. pdev = soc->pdev_list[ring];
  839. if (pdev == NULL)
  840. continue;
  841. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  842. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  843. pdev->pdev_id);
  844. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  845. work_done = dp_mon_process(soc, mac_for_pdev,
  846. remaining_quota);
  847. budget -= work_done;
  848. if (budget <= 0)
  849. goto budget_done;
  850. remaining_quota = budget;
  851. }
  852. if (int_ctx->rxdma2host_ring_mask &
  853. (1 << mac_for_pdev)) {
  854. work_done = dp_rxdma_err_process(soc,
  855. mac_for_pdev,
  856. remaining_quota);
  857. budget -= work_done;
  858. if (budget <= 0)
  859. goto budget_done;
  860. remaining_quota = budget;
  861. }
  862. if (int_ctx->host2rxdma_ring_mask &
  863. (1 << mac_for_pdev)) {
  864. union dp_rx_desc_list_elem_t *desc_list = NULL;
  865. union dp_rx_desc_list_elem_t *tail = NULL;
  866. struct dp_srng *rx_refill_buf_ring =
  867. &pdev->rx_refill_buf_ring;
  868. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  869. 1);
  870. dp_rx_buffers_replenish(soc, mac_for_pdev,
  871. rx_refill_buf_ring,
  872. &soc->rx_desc_buf[mac_for_pdev], 0,
  873. &desc_list, &tail,
  874. HAL_RX_BUF_RBM_SW3_BM);
  875. }
  876. }
  877. }
  878. qdf_lro_flush(int_ctx->lro_ctx);
  879. budget_done:
  880. return dp_budget - budget;
  881. }
  882. #ifdef DP_INTR_POLL_BASED
  883. /* dp_interrupt_timer()- timer poll for interrupts
  884. *
  885. * @arg: SoC Handle
  886. *
  887. * Return:
  888. *
  889. */
  890. static void dp_interrupt_timer(void *arg)
  891. {
  892. struct dp_soc *soc = (struct dp_soc *) arg;
  893. int i;
  894. if (qdf_atomic_read(&soc->cmn_init_done)) {
  895. for (i = 0;
  896. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  897. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  898. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  899. }
  900. }
  901. /*
  902. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  903. * @txrx_soc: DP SOC handle
  904. *
  905. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  906. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  907. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  908. *
  909. * Return: 0 for success. nonzero for failure.
  910. */
  911. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  912. {
  913. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  914. int i;
  915. soc->intr_mode = DP_INTR_POLL;
  916. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  917. soc->intr_ctx[i].dp_intr_id = i;
  918. soc->intr_ctx[i].tx_ring_mask =
  919. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  920. soc->intr_ctx[i].rx_ring_mask =
  921. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  922. soc->intr_ctx[i].rx_mon_ring_mask =
  923. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  924. soc->intr_ctx[i].rx_err_ring_mask =
  925. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  926. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  927. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  928. soc->intr_ctx[i].reo_status_ring_mask =
  929. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  930. soc->intr_ctx[i].rxdma2host_ring_mask =
  931. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  932. soc->intr_ctx[i].soc = soc;
  933. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  934. }
  935. qdf_timer_init(soc->osdev, &soc->int_timer,
  936. dp_interrupt_timer, (void *)soc,
  937. QDF_TIMER_TYPE_WAKE_APPS);
  938. return QDF_STATUS_SUCCESS;
  939. }
  940. #if defined(CONFIG_MCL)
  941. extern int con_mode_monitor;
  942. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  943. /*
  944. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  945. * @txrx_soc: DP SOC handle
  946. *
  947. * Call the appropriate attach function based on the mode of operation.
  948. * This is a WAR for enabling monitor mode.
  949. *
  950. * Return: 0 for success. nonzero for failure.
  951. */
  952. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  953. {
  954. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  955. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  956. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  958. "%s: Poll mode", __func__);
  959. return dp_soc_interrupt_attach_poll(txrx_soc);
  960. } else {
  961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  962. "%s: Interrupt mode", __func__);
  963. return dp_soc_interrupt_attach(txrx_soc);
  964. }
  965. }
  966. #else
  967. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  968. {
  969. return dp_soc_interrupt_attach_poll(txrx_soc);
  970. }
  971. #endif
  972. #endif
  973. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  974. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  975. {
  976. int j;
  977. int num_irq = 0;
  978. int tx_mask =
  979. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  980. int rx_mask =
  981. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  982. int rx_mon_mask =
  983. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  984. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  985. soc->wlan_cfg_ctx, intr_ctx_num);
  986. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  987. soc->wlan_cfg_ctx, intr_ctx_num);
  988. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  989. soc->wlan_cfg_ctx, intr_ctx_num);
  990. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  991. soc->wlan_cfg_ctx, intr_ctx_num);
  992. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  993. soc->wlan_cfg_ctx, intr_ctx_num);
  994. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  995. if (tx_mask & (1 << j)) {
  996. irq_id_map[num_irq++] =
  997. (wbm2host_tx_completions_ring1 - j);
  998. }
  999. if (rx_mask & (1 << j)) {
  1000. irq_id_map[num_irq++] =
  1001. (reo2host_destination_ring1 - j);
  1002. }
  1003. if (rxdma2host_ring_mask & (1 << j)) {
  1004. irq_id_map[num_irq++] =
  1005. rxdma2host_destination_ring_mac1 -
  1006. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1007. }
  1008. if (host2rxdma_ring_mask & (1 << j)) {
  1009. irq_id_map[num_irq++] =
  1010. host2rxdma_host_buf_ring_mac1 -
  1011. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1012. }
  1013. if (rx_mon_mask & (1 << j)) {
  1014. irq_id_map[num_irq++] =
  1015. ppdu_end_interrupts_mac1 -
  1016. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1017. irq_id_map[num_irq++] =
  1018. rxdma2host_monitor_status_ring_mac1 -
  1019. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1020. }
  1021. if (rx_wbm_rel_ring_mask & (1 << j))
  1022. irq_id_map[num_irq++] = wbm2host_rx_release;
  1023. if (rx_err_ring_mask & (1 << j))
  1024. irq_id_map[num_irq++] = reo2host_exception;
  1025. if (reo_status_ring_mask & (1 << j))
  1026. irq_id_map[num_irq++] = reo2host_status;
  1027. }
  1028. *num_irq_r = num_irq;
  1029. }
  1030. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1031. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1032. int msi_vector_count, int msi_vector_start)
  1033. {
  1034. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1035. soc->wlan_cfg_ctx, intr_ctx_num);
  1036. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1037. soc->wlan_cfg_ctx, intr_ctx_num);
  1038. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1039. soc->wlan_cfg_ctx, intr_ctx_num);
  1040. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1041. soc->wlan_cfg_ctx, intr_ctx_num);
  1042. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1043. soc->wlan_cfg_ctx, intr_ctx_num);
  1044. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1045. soc->wlan_cfg_ctx, intr_ctx_num);
  1046. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1047. soc->wlan_cfg_ctx, intr_ctx_num);
  1048. unsigned int vector =
  1049. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1050. int num_irq = 0;
  1051. soc->intr_mode = DP_INTR_MSI;
  1052. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1053. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1054. irq_id_map[num_irq++] =
  1055. pld_get_msi_irq(soc->osdev->dev, vector);
  1056. *num_irq_r = num_irq;
  1057. }
  1058. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1059. int *irq_id_map, int *num_irq)
  1060. {
  1061. int msi_vector_count, ret;
  1062. uint32_t msi_base_data, msi_vector_start;
  1063. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1064. &msi_vector_count,
  1065. &msi_base_data,
  1066. &msi_vector_start);
  1067. if (ret)
  1068. return dp_soc_interrupt_map_calculate_integrated(soc,
  1069. intr_ctx_num, irq_id_map, num_irq);
  1070. else
  1071. dp_soc_interrupt_map_calculate_msi(soc,
  1072. intr_ctx_num, irq_id_map, num_irq,
  1073. msi_vector_count, msi_vector_start);
  1074. }
  1075. /*
  1076. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1077. * @txrx_soc: DP SOC handle
  1078. *
  1079. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1080. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1081. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1082. *
  1083. * Return: 0 for success. nonzero for failure.
  1084. */
  1085. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1086. {
  1087. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1088. int i = 0;
  1089. int num_irq = 0;
  1090. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1091. int ret = 0;
  1092. /* Map of IRQ ids registered with one interrupt context */
  1093. int irq_id_map[HIF_MAX_GRP_IRQ];
  1094. int tx_mask =
  1095. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1096. int rx_mask =
  1097. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1098. int rx_mon_mask =
  1099. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1100. int rx_err_ring_mask =
  1101. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1102. int rx_wbm_rel_ring_mask =
  1103. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1104. int reo_status_ring_mask =
  1105. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1106. int rxdma2host_ring_mask =
  1107. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1108. int host2rxdma_ring_mask =
  1109. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1110. soc->intr_ctx[i].dp_intr_id = i;
  1111. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1112. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1113. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1114. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1115. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1116. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1117. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1118. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1119. soc->intr_ctx[i].soc = soc;
  1120. num_irq = 0;
  1121. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1122. &num_irq);
  1123. ret = hif_register_ext_group(soc->hif_handle,
  1124. num_irq, irq_id_map, dp_service_srngs,
  1125. &soc->intr_ctx[i], "dp_intr",
  1126. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1127. if (ret) {
  1128. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1129. FL("failed, ret = %d"), ret);
  1130. return QDF_STATUS_E_FAILURE;
  1131. }
  1132. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1133. }
  1134. hif_configure_ext_group_interrupts(soc->hif_handle);
  1135. return QDF_STATUS_SUCCESS;
  1136. }
  1137. /*
  1138. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1139. * @txrx_soc: DP SOC handle
  1140. *
  1141. * Return: void
  1142. */
  1143. static void dp_soc_interrupt_detach(void *txrx_soc)
  1144. {
  1145. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1146. int i;
  1147. if (soc->intr_mode == DP_INTR_POLL) {
  1148. qdf_timer_stop(&soc->int_timer);
  1149. qdf_timer_free(&soc->int_timer);
  1150. } else {
  1151. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1152. }
  1153. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1154. soc->intr_ctx[i].tx_ring_mask = 0;
  1155. soc->intr_ctx[i].rx_ring_mask = 0;
  1156. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1157. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1158. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1159. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1160. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1161. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1162. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1163. }
  1164. }
  1165. #define AVG_MAX_MPDUS_PER_TID 128
  1166. #define AVG_TIDS_PER_CLIENT 2
  1167. #define AVG_FLOWS_PER_TID 2
  1168. #define AVG_MSDUS_PER_FLOW 128
  1169. #define AVG_MSDUS_PER_MPDU 4
  1170. /*
  1171. * Allocate and setup link descriptor pool that will be used by HW for
  1172. * various link and queue descriptors and managed by WBM
  1173. */
  1174. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1175. {
  1176. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1177. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1178. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1179. uint32_t num_mpdus_per_link_desc =
  1180. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1181. uint32_t num_msdus_per_link_desc =
  1182. hal_num_msdus_per_link_desc(soc->hal_soc);
  1183. uint32_t num_mpdu_links_per_queue_desc =
  1184. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1185. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1186. uint32_t total_link_descs, total_mem_size;
  1187. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1188. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1189. uint32_t num_link_desc_banks;
  1190. uint32_t last_bank_size = 0;
  1191. uint32_t entry_size, num_entries;
  1192. int i;
  1193. uint32_t desc_id = 0;
  1194. /* Only Tx queue descriptors are allocated from common link descriptor
  1195. * pool Rx queue descriptors are not included in this because (REO queue
  1196. * extension descriptors) they are expected to be allocated contiguously
  1197. * with REO queue descriptors
  1198. */
  1199. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1200. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1201. num_mpdu_queue_descs = num_mpdu_link_descs /
  1202. num_mpdu_links_per_queue_desc;
  1203. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1204. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1205. num_msdus_per_link_desc;
  1206. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1207. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1208. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1209. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1210. /* Round up to power of 2 */
  1211. total_link_descs = 1;
  1212. while (total_link_descs < num_entries)
  1213. total_link_descs <<= 1;
  1214. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1215. FL("total_link_descs: %u, link_desc_size: %d"),
  1216. total_link_descs, link_desc_size);
  1217. total_mem_size = total_link_descs * link_desc_size;
  1218. total_mem_size += link_desc_align;
  1219. if (total_mem_size <= max_alloc_size) {
  1220. num_link_desc_banks = 0;
  1221. last_bank_size = total_mem_size;
  1222. } else {
  1223. num_link_desc_banks = (total_mem_size) /
  1224. (max_alloc_size - link_desc_align);
  1225. last_bank_size = total_mem_size %
  1226. (max_alloc_size - link_desc_align);
  1227. }
  1228. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1229. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1230. total_mem_size, num_link_desc_banks);
  1231. for (i = 0; i < num_link_desc_banks; i++) {
  1232. soc->link_desc_banks[i].base_vaddr_unaligned =
  1233. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1234. max_alloc_size,
  1235. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1236. soc->link_desc_banks[i].size = max_alloc_size;
  1237. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1238. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1239. ((unsigned long)(
  1240. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1241. link_desc_align));
  1242. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1243. soc->link_desc_banks[i].base_paddr_unaligned) +
  1244. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1245. (unsigned long)(
  1246. soc->link_desc_banks[i].base_vaddr_unaligned));
  1247. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1248. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1249. FL("Link descriptor memory alloc failed"));
  1250. goto fail;
  1251. }
  1252. }
  1253. if (last_bank_size) {
  1254. /* Allocate last bank in case total memory required is not exact
  1255. * multiple of max_alloc_size
  1256. */
  1257. soc->link_desc_banks[i].base_vaddr_unaligned =
  1258. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1259. last_bank_size,
  1260. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1261. soc->link_desc_banks[i].size = last_bank_size;
  1262. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1263. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1264. ((unsigned long)(
  1265. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1266. link_desc_align));
  1267. soc->link_desc_banks[i].base_paddr =
  1268. (unsigned long)(
  1269. soc->link_desc_banks[i].base_paddr_unaligned) +
  1270. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1271. (unsigned long)(
  1272. soc->link_desc_banks[i].base_vaddr_unaligned));
  1273. }
  1274. /* Allocate and setup link descriptor idle list for HW internal use */
  1275. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1276. total_mem_size = entry_size * total_link_descs;
  1277. if (total_mem_size <= max_alloc_size) {
  1278. void *desc;
  1279. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1280. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1281. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1282. FL("Link desc idle ring setup failed"));
  1283. goto fail;
  1284. }
  1285. hal_srng_access_start_unlocked(soc->hal_soc,
  1286. soc->wbm_idle_link_ring.hal_srng);
  1287. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1288. soc->link_desc_banks[i].base_paddr; i++) {
  1289. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1290. ((unsigned long)(
  1291. soc->link_desc_banks[i].base_vaddr) -
  1292. (unsigned long)(
  1293. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1294. / link_desc_size;
  1295. unsigned long paddr = (unsigned long)(
  1296. soc->link_desc_banks[i].base_paddr);
  1297. while (num_entries && (desc = hal_srng_src_get_next(
  1298. soc->hal_soc,
  1299. soc->wbm_idle_link_ring.hal_srng))) {
  1300. hal_set_link_desc_addr(desc,
  1301. LINK_DESC_COOKIE(desc_id, i), paddr);
  1302. num_entries--;
  1303. desc_id++;
  1304. paddr += link_desc_size;
  1305. }
  1306. }
  1307. hal_srng_access_end_unlocked(soc->hal_soc,
  1308. soc->wbm_idle_link_ring.hal_srng);
  1309. } else {
  1310. uint32_t num_scatter_bufs;
  1311. uint32_t num_entries_per_buf;
  1312. uint32_t rem_entries;
  1313. uint8_t *scatter_buf_ptr;
  1314. uint16_t scatter_buf_num;
  1315. soc->wbm_idle_scatter_buf_size =
  1316. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1317. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1318. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1319. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1320. soc->hal_soc, total_mem_size,
  1321. soc->wbm_idle_scatter_buf_size);
  1322. for (i = 0; i < num_scatter_bufs; i++) {
  1323. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1324. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1325. soc->wbm_idle_scatter_buf_size,
  1326. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1327. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1328. QDF_TRACE(QDF_MODULE_ID_DP,
  1329. QDF_TRACE_LEVEL_ERROR,
  1330. FL("Scatter list memory alloc failed"));
  1331. goto fail;
  1332. }
  1333. }
  1334. /* Populate idle list scatter buffers with link descriptor
  1335. * pointers
  1336. */
  1337. scatter_buf_num = 0;
  1338. scatter_buf_ptr = (uint8_t *)(
  1339. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1340. rem_entries = num_entries_per_buf;
  1341. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1342. soc->link_desc_banks[i].base_paddr; i++) {
  1343. uint32_t num_link_descs =
  1344. (soc->link_desc_banks[i].size -
  1345. ((unsigned long)(
  1346. soc->link_desc_banks[i].base_vaddr) -
  1347. (unsigned long)(
  1348. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1349. / link_desc_size;
  1350. unsigned long paddr = (unsigned long)(
  1351. soc->link_desc_banks[i].base_paddr);
  1352. while (num_link_descs) {
  1353. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1354. LINK_DESC_COOKIE(desc_id, i), paddr);
  1355. num_link_descs--;
  1356. desc_id++;
  1357. paddr += link_desc_size;
  1358. rem_entries--;
  1359. if (rem_entries) {
  1360. scatter_buf_ptr += entry_size;
  1361. } else {
  1362. rem_entries = num_entries_per_buf;
  1363. scatter_buf_num++;
  1364. if (scatter_buf_num >= num_scatter_bufs)
  1365. break;
  1366. scatter_buf_ptr = (uint8_t *)(
  1367. soc->wbm_idle_scatter_buf_base_vaddr[
  1368. scatter_buf_num]);
  1369. }
  1370. }
  1371. }
  1372. /* Setup link descriptor idle list in HW */
  1373. hal_setup_link_idle_list(soc->hal_soc,
  1374. soc->wbm_idle_scatter_buf_base_paddr,
  1375. soc->wbm_idle_scatter_buf_base_vaddr,
  1376. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1377. (uint32_t)(scatter_buf_ptr -
  1378. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1379. scatter_buf_num-1])), total_link_descs);
  1380. }
  1381. return 0;
  1382. fail:
  1383. if (soc->wbm_idle_link_ring.hal_srng) {
  1384. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1385. WBM_IDLE_LINK, 0);
  1386. }
  1387. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1388. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1389. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1390. soc->wbm_idle_scatter_buf_size,
  1391. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1392. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1393. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1394. }
  1395. }
  1396. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1397. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1398. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1399. soc->link_desc_banks[i].size,
  1400. soc->link_desc_banks[i].base_vaddr_unaligned,
  1401. soc->link_desc_banks[i].base_paddr_unaligned,
  1402. 0);
  1403. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1404. }
  1405. }
  1406. return QDF_STATUS_E_FAILURE;
  1407. }
  1408. /*
  1409. * Free link descriptor pool that was setup HW
  1410. */
  1411. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1412. {
  1413. int i;
  1414. if (soc->wbm_idle_link_ring.hal_srng) {
  1415. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1416. WBM_IDLE_LINK, 0);
  1417. }
  1418. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1419. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1420. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1421. soc->wbm_idle_scatter_buf_size,
  1422. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1423. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1424. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1425. }
  1426. }
  1427. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1428. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1429. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1430. soc->link_desc_banks[i].size,
  1431. soc->link_desc_banks[i].base_vaddr_unaligned,
  1432. soc->link_desc_banks[i].base_paddr_unaligned,
  1433. 0);
  1434. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1435. }
  1436. }
  1437. }
  1438. /* TODO: Following should be configurable */
  1439. #define WBM_RELEASE_RING_SIZE 64
  1440. #define TCL_CMD_RING_SIZE 32
  1441. #define TCL_STATUS_RING_SIZE 32
  1442. #if defined(QCA_WIFI_QCA6290)
  1443. #define REO_DST_RING_SIZE 1024
  1444. #else
  1445. #define REO_DST_RING_SIZE 2048
  1446. #endif
  1447. #define REO_REINJECT_RING_SIZE 32
  1448. #define RX_RELEASE_RING_SIZE 1024
  1449. #define REO_EXCEPTION_RING_SIZE 128
  1450. #define REO_CMD_RING_SIZE 64
  1451. #define REO_STATUS_RING_SIZE 128
  1452. #define RXDMA_BUF_RING_SIZE 1024
  1453. #define RXDMA_REFILL_RING_SIZE 4096
  1454. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1455. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1456. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1457. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1458. #define RXDMA_ERR_DST_RING_SIZE 1024
  1459. /*
  1460. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1461. * @soc: Datapath SOC handle
  1462. *
  1463. * This is a timer function used to age out stale AST nodes from
  1464. * AST table
  1465. */
  1466. #ifdef FEATURE_WDS
  1467. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1468. {
  1469. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1470. struct dp_pdev *pdev;
  1471. struct dp_vdev *vdev;
  1472. struct dp_peer *peer;
  1473. struct dp_ast_entry *ase, *temp_ase;
  1474. int i;
  1475. qdf_spin_lock_bh(&soc->ast_lock);
  1476. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1477. pdev = soc->pdev_list[i];
  1478. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1479. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1480. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1481. /*
  1482. * Do not expire static ast entries
  1483. * and HM WDS entries
  1484. */
  1485. if (ase->type ==
  1486. CDP_TXRX_AST_TYPE_STATIC ||
  1487. ase->type ==
  1488. CDP_TXRX_AST_TYPE_WDS_HM)
  1489. continue;
  1490. if (ase->is_active) {
  1491. ase->is_active = FALSE;
  1492. continue;
  1493. }
  1494. DP_STATS_INC(soc, ast.aged_out, 1);
  1495. dp_peer_del_ast(soc, ase);
  1496. }
  1497. }
  1498. }
  1499. }
  1500. qdf_spin_unlock_bh(&soc->ast_lock);
  1501. if (qdf_atomic_read(&soc->cmn_init_done))
  1502. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1503. }
  1504. /*
  1505. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1506. * @soc: Datapath SOC handle
  1507. *
  1508. * Return: None
  1509. */
  1510. static void dp_soc_wds_attach(struct dp_soc *soc)
  1511. {
  1512. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1513. dp_wds_aging_timer_fn, (void *)soc,
  1514. QDF_TIMER_TYPE_WAKE_APPS);
  1515. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1516. }
  1517. /*
  1518. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1519. * @txrx_soc: DP SOC handle
  1520. *
  1521. * Return: None
  1522. */
  1523. static void dp_soc_wds_detach(struct dp_soc *soc)
  1524. {
  1525. qdf_timer_stop(&soc->wds_aging_timer);
  1526. qdf_timer_free(&soc->wds_aging_timer);
  1527. }
  1528. #else
  1529. static void dp_soc_wds_attach(struct dp_soc *soc)
  1530. {
  1531. }
  1532. static void dp_soc_wds_detach(struct dp_soc *soc)
  1533. {
  1534. }
  1535. #endif
  1536. /*
  1537. * dp_soc_reset_ring_map() - Reset cpu ring map
  1538. * @soc: Datapath soc handler
  1539. *
  1540. * This api resets the default cpu ring map
  1541. */
  1542. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1543. {
  1544. uint8_t i;
  1545. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1546. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1547. if (nss_config == 1) {
  1548. /*
  1549. * Setting Tx ring map for one nss offloaded radio
  1550. */
  1551. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1552. } else if (nss_config == 2) {
  1553. /*
  1554. * Setting Tx ring for two nss offloaded radios
  1555. */
  1556. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1557. } else {
  1558. /*
  1559. * Setting Tx ring map for all nss offloaded radios
  1560. */
  1561. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1562. }
  1563. }
  1564. }
  1565. /*
  1566. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1567. * @dp_soc - DP soc handle
  1568. * @ring_type - ring type
  1569. * @ring_num - ring_num
  1570. *
  1571. * return 0 or 1
  1572. */
  1573. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1574. {
  1575. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1576. uint8_t status = 0;
  1577. switch (ring_type) {
  1578. case WBM2SW_RELEASE:
  1579. case REO_DST:
  1580. case RXDMA_BUF:
  1581. status = ((nss_config) & (1 << ring_num));
  1582. break;
  1583. default:
  1584. break;
  1585. }
  1586. return status;
  1587. }
  1588. /*
  1589. * dp_soc_reset_intr_mask() - reset interrupt mask
  1590. * @dp_soc - DP Soc handle
  1591. *
  1592. * Return: Return void
  1593. */
  1594. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1595. {
  1596. uint8_t j;
  1597. int *grp_mask = NULL;
  1598. int group_number, mask, num_ring;
  1599. /* number of tx ring */
  1600. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1601. /*
  1602. * group mask for tx completion ring.
  1603. */
  1604. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1605. /* loop and reset the mask for only offloaded ring */
  1606. for (j = 0; j < num_ring; j++) {
  1607. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1608. continue;
  1609. }
  1610. /*
  1611. * Group number corresponding to tx offloaded ring.
  1612. */
  1613. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1614. if (group_number < 0) {
  1615. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1616. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1617. WBM2SW_RELEASE, j);
  1618. return;
  1619. }
  1620. /* reset the tx mask for offloaded ring */
  1621. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1622. mask &= (~(1 << j));
  1623. /*
  1624. * reset the interrupt mask for offloaded ring.
  1625. */
  1626. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1627. }
  1628. /* number of rx rings */
  1629. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1630. /*
  1631. * group mask for reo destination ring.
  1632. */
  1633. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1634. /* loop and reset the mask for only offloaded ring */
  1635. for (j = 0; j < num_ring; j++) {
  1636. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1637. continue;
  1638. }
  1639. /*
  1640. * Group number corresponding to rx offloaded ring.
  1641. */
  1642. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1643. if (group_number < 0) {
  1644. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1645. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1646. REO_DST, j);
  1647. return;
  1648. }
  1649. /* set the interrupt mask for offloaded ring */
  1650. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1651. mask &= (~(1 << j));
  1652. /*
  1653. * set the interrupt mask to zero for rx offloaded radio.
  1654. */
  1655. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1656. }
  1657. /*
  1658. * group mask for Rx buffer refill ring
  1659. */
  1660. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1661. /* loop and reset the mask for only offloaded ring */
  1662. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1663. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1664. continue;
  1665. }
  1666. /*
  1667. * Group number corresponding to rx offloaded ring.
  1668. */
  1669. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1670. if (group_number < 0) {
  1671. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1672. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1673. REO_DST, j);
  1674. return;
  1675. }
  1676. /* set the interrupt mask for offloaded ring */
  1677. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1678. group_number);
  1679. mask &= (~(1 << j));
  1680. /*
  1681. * set the interrupt mask to zero for rx offloaded radio.
  1682. */
  1683. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1684. group_number, mask);
  1685. }
  1686. }
  1687. #ifdef IPA_OFFLOAD
  1688. /**
  1689. * dp_reo_remap_config() - configure reo remap register value based
  1690. * nss configuration.
  1691. * based on offload_radio value below remap configuration
  1692. * get applied.
  1693. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1694. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1695. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1696. * 3 - both Radios handled by NSS (remap not required)
  1697. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1698. *
  1699. * @remap1: output parameter indicates reo remap 1 register value
  1700. * @remap2: output parameter indicates reo remap 2 register value
  1701. * Return: bool type, true if remap is configured else false.
  1702. */
  1703. static bool dp_reo_remap_config(struct dp_soc *soc,
  1704. uint32_t *remap1,
  1705. uint32_t *remap2)
  1706. {
  1707. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1708. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1709. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1710. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1711. return true;
  1712. }
  1713. #else
  1714. static bool dp_reo_remap_config(struct dp_soc *soc,
  1715. uint32_t *remap1,
  1716. uint32_t *remap2)
  1717. {
  1718. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1719. switch (offload_radio) {
  1720. case 0:
  1721. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1722. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1723. (0x3 << 18) | (0x4 << 21)) << 8;
  1724. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1725. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1726. (0x3 << 18) | (0x4 << 21)) << 8;
  1727. break;
  1728. case 1:
  1729. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1730. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1731. (0x2 << 18) | (0x3 << 21)) << 8;
  1732. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1733. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1734. (0x4 << 18) | (0x2 << 21)) << 8;
  1735. break;
  1736. case 2:
  1737. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1738. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1739. (0x1 << 18) | (0x3 << 21)) << 8;
  1740. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1741. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1742. (0x4 << 18) | (0x1 << 21)) << 8;
  1743. break;
  1744. case 3:
  1745. /* return false if both radios are offloaded to NSS */
  1746. return false;
  1747. }
  1748. return true;
  1749. }
  1750. #endif
  1751. /*
  1752. * dp_reo_frag_dst_set() - configure reo register to set the
  1753. * fragment destination ring
  1754. * @soc : Datapath soc
  1755. * @frag_dst_ring : output parameter to set fragment destination ring
  1756. *
  1757. * Based on offload_radio below fragment destination rings is selected
  1758. * 0 - TCL
  1759. * 1 - SW1
  1760. * 2 - SW2
  1761. * 3 - SW3
  1762. * 4 - SW4
  1763. * 5 - Release
  1764. * 6 - FW
  1765. * 7 - alternate select
  1766. *
  1767. * return: void
  1768. */
  1769. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1770. {
  1771. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1772. switch (offload_radio) {
  1773. case 0:
  1774. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1775. break;
  1776. case 3:
  1777. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1778. break;
  1779. default:
  1780. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1781. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1782. break;
  1783. }
  1784. }
  1785. /*
  1786. * dp_soc_cmn_setup() - Common SoC level initializion
  1787. * @soc: Datapath SOC handle
  1788. *
  1789. * This is an internal function used to setup common SOC data structures,
  1790. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1791. */
  1792. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1793. {
  1794. int i;
  1795. struct hal_reo_params reo_params;
  1796. int tx_ring_size;
  1797. int tx_comp_ring_size;
  1798. if (qdf_atomic_read(&soc->cmn_init_done))
  1799. return 0;
  1800. if (dp_peer_find_attach(soc))
  1801. goto fail0;
  1802. if (dp_hw_link_desc_pool_setup(soc))
  1803. goto fail1;
  1804. /* Setup SRNG rings */
  1805. /* Common rings */
  1806. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1807. WBM_RELEASE_RING_SIZE)) {
  1808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1809. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1810. goto fail1;
  1811. }
  1812. soc->num_tcl_data_rings = 0;
  1813. /* Tx data rings */
  1814. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1815. soc->num_tcl_data_rings =
  1816. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1817. tx_comp_ring_size =
  1818. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1819. tx_ring_size =
  1820. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1821. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1822. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1823. TCL_DATA, i, 0, tx_ring_size)) {
  1824. QDF_TRACE(QDF_MODULE_ID_DP,
  1825. QDF_TRACE_LEVEL_ERROR,
  1826. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1827. goto fail1;
  1828. }
  1829. /*
  1830. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1831. * count
  1832. */
  1833. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1834. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1835. QDF_TRACE(QDF_MODULE_ID_DP,
  1836. QDF_TRACE_LEVEL_ERROR,
  1837. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1838. goto fail1;
  1839. }
  1840. }
  1841. } else {
  1842. /* This will be incremented during per pdev ring setup */
  1843. soc->num_tcl_data_rings = 0;
  1844. }
  1845. if (dp_tx_soc_attach(soc)) {
  1846. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1847. FL("dp_tx_soc_attach failed"));
  1848. goto fail1;
  1849. }
  1850. /* TCL command and status rings */
  1851. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1852. TCL_CMD_RING_SIZE)) {
  1853. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1854. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1855. goto fail1;
  1856. }
  1857. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1858. TCL_STATUS_RING_SIZE)) {
  1859. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1860. FL("dp_srng_setup failed for tcl_status_ring"));
  1861. goto fail1;
  1862. }
  1863. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1864. * descriptors
  1865. */
  1866. /* Rx data rings */
  1867. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1868. soc->num_reo_dest_rings =
  1869. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1870. QDF_TRACE(QDF_MODULE_ID_DP,
  1871. QDF_TRACE_LEVEL_ERROR,
  1872. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1873. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1874. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1875. i, 0, REO_DST_RING_SIZE)) {
  1876. QDF_TRACE(QDF_MODULE_ID_DP,
  1877. QDF_TRACE_LEVEL_ERROR,
  1878. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1879. goto fail1;
  1880. }
  1881. }
  1882. } else {
  1883. /* This will be incremented during per pdev ring setup */
  1884. soc->num_reo_dest_rings = 0;
  1885. }
  1886. /* LMAC RxDMA to SW Rings configuration */
  1887. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1888. /* Only valid for MCL */
  1889. struct dp_pdev *pdev = soc->pdev_list[0];
  1890. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1891. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1892. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1893. QDF_TRACE(QDF_MODULE_ID_DP,
  1894. QDF_TRACE_LEVEL_ERROR,
  1895. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1896. goto fail1;
  1897. }
  1898. }
  1899. }
  1900. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1901. /* REO reinjection ring */
  1902. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1903. REO_REINJECT_RING_SIZE)) {
  1904. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1905. FL("dp_srng_setup failed for reo_reinject_ring"));
  1906. goto fail1;
  1907. }
  1908. /* Rx release ring */
  1909. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1910. RX_RELEASE_RING_SIZE)) {
  1911. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1912. FL("dp_srng_setup failed for rx_rel_ring"));
  1913. goto fail1;
  1914. }
  1915. /* Rx exception ring */
  1916. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1917. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1918. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1919. FL("dp_srng_setup failed for reo_exception_ring"));
  1920. goto fail1;
  1921. }
  1922. /* REO command and status rings */
  1923. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1924. REO_CMD_RING_SIZE)) {
  1925. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1926. FL("dp_srng_setup failed for reo_cmd_ring"));
  1927. goto fail1;
  1928. }
  1929. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1930. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1931. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1932. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1933. REO_STATUS_RING_SIZE)) {
  1934. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1935. FL("dp_srng_setup failed for reo_status_ring"));
  1936. goto fail1;
  1937. }
  1938. qdf_spinlock_create(&soc->ast_lock);
  1939. dp_soc_wds_attach(soc);
  1940. /* Reset the cpu ring map if radio is NSS offloaded */
  1941. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1942. dp_soc_reset_cpu_ring_map(soc);
  1943. dp_soc_reset_intr_mask(soc);
  1944. }
  1945. /* Setup HW REO */
  1946. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1947. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1948. /*
  1949. * Reo ring remap is not required if both radios
  1950. * are offloaded to NSS
  1951. */
  1952. if (!dp_reo_remap_config(soc,
  1953. &reo_params.remap1,
  1954. &reo_params.remap2))
  1955. goto out;
  1956. reo_params.rx_hash_enabled = true;
  1957. }
  1958. /* setup the global rx defrag waitlist */
  1959. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1960. soc->rx.defrag.timeout_ms =
  1961. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1962. soc->rx.flags.defrag_timeout_check =
  1963. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1964. out:
  1965. /*
  1966. * set the fragment destination ring
  1967. */
  1968. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1969. hal_reo_setup(soc->hal_soc, &reo_params);
  1970. qdf_atomic_set(&soc->cmn_init_done, 1);
  1971. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1972. return 0;
  1973. fail1:
  1974. /*
  1975. * Cleanup will be done as part of soc_detach, which will
  1976. * be called on pdev attach failure
  1977. */
  1978. fail0:
  1979. return QDF_STATUS_E_FAILURE;
  1980. }
  1981. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1982. static void dp_lro_hash_setup(struct dp_soc *soc)
  1983. {
  1984. struct cdp_lro_hash_config lro_hash;
  1985. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1986. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1987. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1988. FL("LRO disabled RX hash disabled"));
  1989. return;
  1990. }
  1991. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1992. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1993. lro_hash.lro_enable = 1;
  1994. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1995. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1996. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1997. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1998. }
  1999. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2000. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2001. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2002. LRO_IPV4_SEED_ARR_SZ));
  2003. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2004. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2005. LRO_IPV6_SEED_ARR_SZ));
  2006. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2007. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2008. lro_hash.lro_enable, lro_hash.tcp_flag,
  2009. lro_hash.tcp_flag_mask);
  2010. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2011. QDF_TRACE_LEVEL_ERROR,
  2012. (void *)lro_hash.toeplitz_hash_ipv4,
  2013. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2014. LRO_IPV4_SEED_ARR_SZ));
  2015. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2016. QDF_TRACE_LEVEL_ERROR,
  2017. (void *)lro_hash.toeplitz_hash_ipv6,
  2018. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2019. LRO_IPV6_SEED_ARR_SZ));
  2020. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2021. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2022. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2023. (soc->ctrl_psoc, &lro_hash);
  2024. }
  2025. /*
  2026. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2027. * @soc: data path SoC handle
  2028. * @pdev: Physical device handle
  2029. *
  2030. * Return: 0 - success, > 0 - failure
  2031. */
  2032. #ifdef QCA_HOST2FW_RXBUF_RING
  2033. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2034. struct dp_pdev *pdev)
  2035. {
  2036. int max_mac_rings =
  2037. wlan_cfg_get_num_mac_rings
  2038. (pdev->wlan_cfg_ctx);
  2039. int i;
  2040. for (i = 0; i < max_mac_rings; i++) {
  2041. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2042. "%s: pdev_id %d mac_id %d\n",
  2043. __func__, pdev->pdev_id, i);
  2044. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2045. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  2046. QDF_TRACE(QDF_MODULE_ID_DP,
  2047. QDF_TRACE_LEVEL_ERROR,
  2048. FL("failed rx mac ring setup"));
  2049. return QDF_STATUS_E_FAILURE;
  2050. }
  2051. }
  2052. return QDF_STATUS_SUCCESS;
  2053. }
  2054. #else
  2055. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2056. struct dp_pdev *pdev)
  2057. {
  2058. return QDF_STATUS_SUCCESS;
  2059. }
  2060. #endif
  2061. /**
  2062. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2063. * @pdev - DP_PDEV handle
  2064. *
  2065. * Return: void
  2066. */
  2067. static inline void
  2068. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2069. {
  2070. uint8_t map_id;
  2071. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2072. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2073. sizeof(default_dscp_tid_map));
  2074. }
  2075. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2076. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2077. pdev->dscp_tid_map[map_id],
  2078. map_id);
  2079. }
  2080. }
  2081. #ifdef QCA_SUPPORT_SON
  2082. /**
  2083. * dp_mark_peer_inact(): Update peer inactivity status
  2084. * @peer_handle - datapath peer handle
  2085. *
  2086. * Return: void
  2087. */
  2088. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2089. {
  2090. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2091. struct dp_pdev *pdev;
  2092. struct dp_soc *soc;
  2093. bool inactive_old;
  2094. if (!peer)
  2095. return;
  2096. pdev = peer->vdev->pdev;
  2097. soc = pdev->soc;
  2098. inactive_old = peer->peer_bs_inact_flag == 1;
  2099. if (!inactive)
  2100. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2101. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2102. if (inactive_old != inactive) {
  2103. /**
  2104. * Note: a node lookup can happen in RX datapath context
  2105. * when a node changes from inactive to active (at most once
  2106. * per inactivity timeout threshold)
  2107. */
  2108. if (soc->cdp_soc.ol_ops->record_act_change) {
  2109. soc->cdp_soc.ol_ops->record_act_change(pdev->osif_pdev,
  2110. peer->mac_addr.raw, !inactive);
  2111. }
  2112. }
  2113. }
  2114. /**
  2115. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2116. *
  2117. * Periodically checks the inactivity status
  2118. */
  2119. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2120. {
  2121. struct dp_pdev *pdev;
  2122. struct dp_vdev *vdev;
  2123. struct dp_peer *peer;
  2124. struct dp_soc *soc;
  2125. int i;
  2126. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2127. qdf_spin_lock(&soc->peer_ref_mutex);
  2128. for (i = 0; i < soc->pdev_count; i++) {
  2129. pdev = soc->pdev_list[i];
  2130. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2131. if (vdev->opmode != wlan_op_mode_ap)
  2132. continue;
  2133. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2134. if (!peer->authorize) {
  2135. /**
  2136. * Inactivity check only interested in
  2137. * connected node
  2138. */
  2139. continue;
  2140. }
  2141. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2142. /**
  2143. * This check ensures we do not wait extra long
  2144. * due to the potential race condition
  2145. */
  2146. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2147. }
  2148. if (peer->peer_bs_inact > 0) {
  2149. /* Do not let it wrap around */
  2150. peer->peer_bs_inact--;
  2151. }
  2152. if (peer->peer_bs_inact == 0)
  2153. dp_mark_peer_inact(peer, true);
  2154. }
  2155. }
  2156. }
  2157. qdf_spin_unlock(&soc->peer_ref_mutex);
  2158. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2159. soc->pdev_bs_inact_interval * 1000);
  2160. }
  2161. /**
  2162. * dp_free_inact_timer(): free inact timer
  2163. * @timer - inact timer handle
  2164. *
  2165. * Return: bool
  2166. */
  2167. void dp_free_inact_timer(struct dp_soc *soc)
  2168. {
  2169. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2170. }
  2171. #else
  2172. void dp_mark_peer_inact(void *peer, bool inactive)
  2173. {
  2174. return;
  2175. }
  2176. void dp_free_inact_timer(struct dp_soc *soc)
  2177. {
  2178. return;
  2179. }
  2180. #endif
  2181. #ifdef IPA_OFFLOAD
  2182. /**
  2183. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2184. * @soc: data path instance
  2185. * @pdev: core txrx pdev context
  2186. *
  2187. * Return: QDF_STATUS_SUCCESS: success
  2188. * QDF_STATUS_E_RESOURCES: Error return
  2189. */
  2190. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2191. struct dp_pdev *pdev)
  2192. {
  2193. /* Setup second Rx refill buffer ring */
  2194. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2195. IPA_RX_REFILL_BUF_RING_IDX,
  2196. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2197. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2198. FL("dp_srng_setup failed second rx refill ring"));
  2199. return QDF_STATUS_E_FAILURE;
  2200. }
  2201. return QDF_STATUS_SUCCESS;
  2202. }
  2203. /**
  2204. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2205. * @soc: data path instance
  2206. * @pdev: core txrx pdev context
  2207. *
  2208. * Return: void
  2209. */
  2210. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2211. struct dp_pdev *pdev)
  2212. {
  2213. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2214. IPA_RX_REFILL_BUF_RING_IDX);
  2215. }
  2216. #else
  2217. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2218. struct dp_pdev *pdev)
  2219. {
  2220. return QDF_STATUS_SUCCESS;
  2221. }
  2222. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2223. struct dp_pdev *pdev)
  2224. {
  2225. }
  2226. #endif
  2227. /*
  2228. * dp_pdev_attach_wifi3() - attach txrx pdev
  2229. * @ctrl_pdev: Opaque PDEV object
  2230. * @txrx_soc: Datapath SOC handle
  2231. * @htc_handle: HTC handle for host-target interface
  2232. * @qdf_osdev: QDF OS device
  2233. * @pdev_id: PDEV ID
  2234. *
  2235. * Return: DP PDEV handle on success, NULL on failure
  2236. */
  2237. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2238. struct cdp_cfg *ctrl_pdev,
  2239. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2240. {
  2241. int tx_ring_size;
  2242. int tx_comp_ring_size;
  2243. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2244. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2245. int mac_id;
  2246. if (!pdev) {
  2247. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2248. FL("DP PDEV memory allocation failed"));
  2249. goto fail0;
  2250. }
  2251. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2252. if (!pdev->wlan_cfg_ctx) {
  2253. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2254. FL("pdev cfg_attach failed"));
  2255. qdf_mem_free(pdev);
  2256. goto fail0;
  2257. }
  2258. /*
  2259. * set nss pdev config based on soc config
  2260. */
  2261. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2262. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2263. pdev->soc = soc;
  2264. pdev->osif_pdev = ctrl_pdev;
  2265. pdev->pdev_id = pdev_id;
  2266. soc->pdev_list[pdev_id] = pdev;
  2267. soc->pdev_count++;
  2268. TAILQ_INIT(&pdev->vdev_list);
  2269. pdev->vdev_count = 0;
  2270. qdf_spinlock_create(&pdev->tx_mutex);
  2271. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2272. TAILQ_INIT(&pdev->neighbour_peers_list);
  2273. if (dp_soc_cmn_setup(soc)) {
  2274. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2275. FL("dp_soc_cmn_setup failed"));
  2276. goto fail1;
  2277. }
  2278. /* Setup per PDEV TCL rings if configured */
  2279. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2280. tx_ring_size =
  2281. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2282. tx_comp_ring_size =
  2283. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2284. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2285. pdev_id, pdev_id, tx_ring_size)) {
  2286. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2287. FL("dp_srng_setup failed for tcl_data_ring"));
  2288. goto fail1;
  2289. }
  2290. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2291. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2292. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2293. FL("dp_srng_setup failed for tx_comp_ring"));
  2294. goto fail1;
  2295. }
  2296. soc->num_tcl_data_rings++;
  2297. }
  2298. /* Tx specific init */
  2299. if (dp_tx_pdev_attach(pdev)) {
  2300. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2301. FL("dp_tx_pdev_attach failed"));
  2302. goto fail1;
  2303. }
  2304. /* Setup per PDEV REO rings if configured */
  2305. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2306. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2307. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2308. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2309. FL("dp_srng_setup failed for reo_dest_ringn"));
  2310. goto fail1;
  2311. }
  2312. soc->num_reo_dest_rings++;
  2313. }
  2314. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2315. RXDMA_REFILL_RING_SIZE)) {
  2316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2317. FL("dp_srng_setup failed rx refill ring"));
  2318. goto fail1;
  2319. }
  2320. if (dp_rxdma_ring_setup(soc, pdev)) {
  2321. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2322. FL("RXDMA ring config failed"));
  2323. goto fail1;
  2324. }
  2325. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2326. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2327. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2328. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2329. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2330. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2331. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2332. goto fail1;
  2333. }
  2334. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2335. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2336. RXDMA_MONITOR_DST_RING_SIZE)) {
  2337. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2338. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2339. goto fail1;
  2340. }
  2341. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2342. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2343. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2344. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2345. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2346. goto fail1;
  2347. }
  2348. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2349. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2350. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2351. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2352. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2353. goto fail1;
  2354. }
  2355. }
  2356. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2357. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2358. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2359. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2360. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2361. goto fail1;
  2362. }
  2363. }
  2364. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2365. goto fail1;
  2366. if (dp_ipa_ring_resource_setup(soc, pdev))
  2367. goto fail1;
  2368. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2369. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2370. FL("dp_ipa_uc_attach failed"));
  2371. goto fail1;
  2372. }
  2373. /* Rx specific init */
  2374. if (dp_rx_pdev_attach(pdev)) {
  2375. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2376. FL("dp_rx_pdev_attach failed"));
  2377. goto fail0;
  2378. }
  2379. DP_STATS_INIT(pdev);
  2380. /* Monitor filter init */
  2381. pdev->mon_filter_mode = MON_FILTER_ALL;
  2382. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2383. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2384. pdev->fp_data_filter = FILTER_DATA_ALL;
  2385. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2386. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2387. pdev->mo_data_filter = FILTER_DATA_ALL;
  2388. #ifndef CONFIG_WIN
  2389. /* MCL */
  2390. dp_local_peer_id_pool_init(pdev);
  2391. #endif
  2392. dp_dscp_tid_map_setup(pdev);
  2393. /* Rx monitor mode specific init */
  2394. if (dp_rx_pdev_mon_attach(pdev)) {
  2395. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2396. "dp_rx_pdev_attach failed\n");
  2397. goto fail1;
  2398. }
  2399. if (dp_wdi_event_attach(pdev)) {
  2400. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2401. "dp_wdi_evet_attach failed\n");
  2402. goto fail1;
  2403. }
  2404. /* set the reo destination during initialization */
  2405. pdev->reo_dest = pdev->pdev_id + 1;
  2406. /*
  2407. * initialize ppdu tlv list
  2408. */
  2409. TAILQ_INIT(&pdev->ppdu_info_list);
  2410. pdev->tlv_count = 0;
  2411. pdev->list_depth = 0;
  2412. return (struct cdp_pdev *)pdev;
  2413. fail1:
  2414. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2415. fail0:
  2416. return NULL;
  2417. }
  2418. /*
  2419. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2420. * @soc: data path SoC handle
  2421. * @pdev: Physical device handle
  2422. *
  2423. * Return: void
  2424. */
  2425. #ifdef QCA_HOST2FW_RXBUF_RING
  2426. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2427. struct dp_pdev *pdev)
  2428. {
  2429. int max_mac_rings =
  2430. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2431. int i;
  2432. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2433. max_mac_rings : MAX_RX_MAC_RINGS;
  2434. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2435. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2436. RXDMA_BUF, 1);
  2437. qdf_timer_free(&soc->mon_reap_timer);
  2438. }
  2439. #else
  2440. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2441. struct dp_pdev *pdev)
  2442. {
  2443. }
  2444. #endif
  2445. /*
  2446. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2447. * @pdev: device object
  2448. *
  2449. * Return: void
  2450. */
  2451. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2452. {
  2453. struct dp_neighbour_peer *peer = NULL;
  2454. struct dp_neighbour_peer *temp_peer = NULL;
  2455. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2456. neighbour_peer_list_elem, temp_peer) {
  2457. /* delete this peer from the list */
  2458. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2459. peer, neighbour_peer_list_elem);
  2460. qdf_mem_free(peer);
  2461. }
  2462. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2463. }
  2464. /**
  2465. * dp_htt_ppdu_stats_detach() - detach stats resources
  2466. * @pdev: Datapath PDEV handle
  2467. *
  2468. * Return: void
  2469. */
  2470. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2471. {
  2472. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2473. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2474. ppdu_info_list_elem, ppdu_info_next) {
  2475. if (!ppdu_info)
  2476. break;
  2477. qdf_assert_always(ppdu_info->nbuf);
  2478. qdf_nbuf_free(ppdu_info->nbuf);
  2479. qdf_mem_free(ppdu_info);
  2480. }
  2481. }
  2482. /*
  2483. * dp_pdev_detach_wifi3() - detach txrx pdev
  2484. * @txrx_pdev: Datapath PDEV handle
  2485. * @force: Force detach
  2486. *
  2487. */
  2488. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2489. {
  2490. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2491. struct dp_soc *soc = pdev->soc;
  2492. qdf_nbuf_t curr_nbuf, next_nbuf;
  2493. int mac_id;
  2494. dp_wdi_event_detach(pdev);
  2495. dp_tx_pdev_detach(pdev);
  2496. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2497. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2498. TCL_DATA, pdev->pdev_id);
  2499. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2500. WBM2SW_RELEASE, pdev->pdev_id);
  2501. }
  2502. dp_pktlogmod_exit(pdev);
  2503. dp_rx_pdev_detach(pdev);
  2504. dp_rx_pdev_mon_detach(pdev);
  2505. dp_neighbour_peers_detach(pdev);
  2506. qdf_spinlock_destroy(&pdev->tx_mutex);
  2507. dp_ipa_uc_detach(soc, pdev);
  2508. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2509. /* Cleanup per PDEV REO rings if configured */
  2510. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2511. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2512. REO_DST, pdev->pdev_id);
  2513. }
  2514. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2515. dp_rxdma_ring_cleanup(soc, pdev);
  2516. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2517. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2518. RXDMA_MONITOR_BUF, 0);
  2519. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2520. RXDMA_MONITOR_DST, 0);
  2521. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2522. RXDMA_MONITOR_STATUS, 0);
  2523. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2524. RXDMA_MONITOR_DESC, 0);
  2525. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2526. RXDMA_DST, 0);
  2527. }
  2528. curr_nbuf = pdev->invalid_peer_head_msdu;
  2529. while (curr_nbuf) {
  2530. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2531. qdf_nbuf_free(curr_nbuf);
  2532. curr_nbuf = next_nbuf;
  2533. }
  2534. dp_htt_ppdu_stats_detach(pdev);
  2535. soc->pdev_list[pdev->pdev_id] = NULL;
  2536. soc->pdev_count--;
  2537. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2538. qdf_mem_free(pdev->dp_txrx_handle);
  2539. qdf_mem_free(pdev);
  2540. }
  2541. /*
  2542. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2543. * @soc: DP SOC handle
  2544. */
  2545. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2546. {
  2547. struct reo_desc_list_node *desc;
  2548. struct dp_rx_tid *rx_tid;
  2549. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2550. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2551. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2552. rx_tid = &desc->rx_tid;
  2553. qdf_mem_unmap_nbytes_single(soc->osdev,
  2554. rx_tid->hw_qdesc_paddr,
  2555. QDF_DMA_BIDIRECTIONAL,
  2556. rx_tid->hw_qdesc_alloc_size);
  2557. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2558. qdf_mem_free(desc);
  2559. }
  2560. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2561. qdf_list_destroy(&soc->reo_desc_freelist);
  2562. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2563. }
  2564. /*
  2565. * dp_soc_detach_wifi3() - Detach txrx SOC
  2566. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2567. */
  2568. static void dp_soc_detach_wifi3(void *txrx_soc)
  2569. {
  2570. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2571. int i;
  2572. qdf_atomic_set(&soc->cmn_init_done, 0);
  2573. qdf_flush_work(&soc->htt_stats.work);
  2574. qdf_disable_work(&soc->htt_stats.work);
  2575. /* Free pending htt stats messages */
  2576. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2577. dp_free_inact_timer(soc);
  2578. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2579. if (soc->pdev_list[i])
  2580. dp_pdev_detach_wifi3(
  2581. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2582. }
  2583. dp_peer_find_detach(soc);
  2584. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2585. * SW descriptors
  2586. */
  2587. /* Free the ring memories */
  2588. /* Common rings */
  2589. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2590. dp_tx_soc_detach(soc);
  2591. /* Tx data rings */
  2592. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2593. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2594. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2595. TCL_DATA, i);
  2596. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2597. WBM2SW_RELEASE, i);
  2598. }
  2599. }
  2600. /* TCL command and status rings */
  2601. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2602. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2603. /* Rx data rings */
  2604. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2605. soc->num_reo_dest_rings =
  2606. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2607. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2608. /* TODO: Get number of rings and ring sizes
  2609. * from wlan_cfg
  2610. */
  2611. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2612. REO_DST, i);
  2613. }
  2614. }
  2615. /* REO reinjection ring */
  2616. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2617. /* Rx release ring */
  2618. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2619. /* Rx exception ring */
  2620. /* TODO: Better to store ring_type and ring_num in
  2621. * dp_srng during setup
  2622. */
  2623. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2624. /* REO command and status rings */
  2625. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2626. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2627. dp_hw_link_desc_pool_cleanup(soc);
  2628. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2629. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2630. htt_soc_detach(soc->htt_handle);
  2631. dp_reo_cmdlist_destroy(soc);
  2632. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2633. dp_reo_desc_freelist_destroy(soc);
  2634. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2635. dp_soc_wds_detach(soc);
  2636. qdf_spinlock_destroy(&soc->ast_lock);
  2637. qdf_mem_free(soc);
  2638. }
  2639. /*
  2640. * dp_rxdma_ring_config() - configure the RX DMA rings
  2641. *
  2642. * This function is used to configure the MAC rings.
  2643. * On MCL host provides buffers in Host2FW ring
  2644. * FW refills (copies) buffers to the ring and updates
  2645. * ring_idx in register
  2646. *
  2647. * @soc: data path SoC handle
  2648. *
  2649. * Return: void
  2650. */
  2651. #ifdef QCA_HOST2FW_RXBUF_RING
  2652. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2653. {
  2654. int i;
  2655. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2656. struct dp_pdev *pdev = soc->pdev_list[i];
  2657. if (pdev) {
  2658. int mac_id;
  2659. bool dbs_enable = 0;
  2660. int max_mac_rings =
  2661. wlan_cfg_get_num_mac_rings
  2662. (pdev->wlan_cfg_ctx);
  2663. htt_srng_setup(soc->htt_handle, 0,
  2664. pdev->rx_refill_buf_ring.hal_srng,
  2665. RXDMA_BUF);
  2666. if (pdev->rx_refill_buf_ring2.hal_srng)
  2667. htt_srng_setup(soc->htt_handle, 0,
  2668. pdev->rx_refill_buf_ring2.hal_srng,
  2669. RXDMA_BUF);
  2670. if (soc->cdp_soc.ol_ops->
  2671. is_hw_dbs_2x2_capable) {
  2672. dbs_enable = soc->cdp_soc.ol_ops->
  2673. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2674. }
  2675. if (dbs_enable) {
  2676. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2677. QDF_TRACE_LEVEL_ERROR,
  2678. FL("DBS enabled max_mac_rings %d\n"),
  2679. max_mac_rings);
  2680. } else {
  2681. max_mac_rings = 1;
  2682. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2683. QDF_TRACE_LEVEL_ERROR,
  2684. FL("DBS disabled, max_mac_rings %d\n"),
  2685. max_mac_rings);
  2686. }
  2687. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2688. FL("pdev_id %d max_mac_rings %d\n"),
  2689. pdev->pdev_id, max_mac_rings);
  2690. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2691. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2692. mac_id, pdev->pdev_id);
  2693. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2694. QDF_TRACE_LEVEL_ERROR,
  2695. FL("mac_id %d\n"), mac_for_pdev);
  2696. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2697. pdev->rx_mac_buf_ring[mac_id]
  2698. .hal_srng,
  2699. RXDMA_BUF);
  2700. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2701. pdev->rxdma_err_dst_ring[mac_id]
  2702. .hal_srng,
  2703. RXDMA_DST);
  2704. /* Configure monitor mode rings */
  2705. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2706. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2707. RXDMA_MONITOR_BUF);
  2708. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2709. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2710. RXDMA_MONITOR_DST);
  2711. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2712. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2713. RXDMA_MONITOR_STATUS);
  2714. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2715. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2716. RXDMA_MONITOR_DESC);
  2717. }
  2718. }
  2719. }
  2720. /*
  2721. * Timer to reap rxdma status rings.
  2722. * Needed until we enable ppdu end interrupts
  2723. */
  2724. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2725. dp_service_mon_rings, (void *)soc,
  2726. QDF_TIMER_TYPE_WAKE_APPS);
  2727. soc->reap_timer_init = 1;
  2728. }
  2729. #else
  2730. /* This is only for WIN */
  2731. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2732. {
  2733. int i;
  2734. int mac_id;
  2735. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2736. struct dp_pdev *pdev = soc->pdev_list[i];
  2737. if (pdev == NULL)
  2738. continue;
  2739. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2740. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2741. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2742. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2743. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2744. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2745. RXDMA_MONITOR_BUF);
  2746. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2747. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2748. RXDMA_MONITOR_DST);
  2749. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2750. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2751. RXDMA_MONITOR_STATUS);
  2752. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2753. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2754. RXDMA_MONITOR_DESC);
  2755. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2756. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2757. RXDMA_DST);
  2758. }
  2759. }
  2760. }
  2761. #endif
  2762. /*
  2763. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2764. * @txrx_soc: Datapath SOC handle
  2765. */
  2766. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2767. {
  2768. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2769. htt_soc_attach_target(soc->htt_handle);
  2770. dp_rxdma_ring_config(soc);
  2771. DP_STATS_INIT(soc);
  2772. /* initialize work queue for stats processing */
  2773. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2774. return 0;
  2775. }
  2776. /*
  2777. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2778. * @txrx_soc: Datapath SOC handle
  2779. */
  2780. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2781. {
  2782. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2783. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2784. }
  2785. /*
  2786. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2787. * @txrx_soc: Datapath SOC handle
  2788. * @nss_cfg: nss config
  2789. */
  2790. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2791. {
  2792. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2793. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2794. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2795. /*
  2796. * TODO: masked out based on the per offloaded radio
  2797. */
  2798. if (config == dp_nss_cfg_dbdc) {
  2799. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2800. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2801. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2802. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2803. }
  2804. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2805. FL("nss-wifi<0> nss config is enabled"));
  2806. }
  2807. /*
  2808. * dp_vdev_attach_wifi3() - attach txrx vdev
  2809. * @txrx_pdev: Datapath PDEV handle
  2810. * @vdev_mac_addr: MAC address of the virtual interface
  2811. * @vdev_id: VDEV Id
  2812. * @wlan_op_mode: VDEV operating mode
  2813. *
  2814. * Return: DP VDEV handle on success, NULL on failure
  2815. */
  2816. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2817. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2818. {
  2819. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2820. struct dp_soc *soc = pdev->soc;
  2821. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2822. int tx_ring_size;
  2823. if (!vdev) {
  2824. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2825. FL("DP VDEV memory allocation failed"));
  2826. goto fail0;
  2827. }
  2828. vdev->pdev = pdev;
  2829. vdev->vdev_id = vdev_id;
  2830. vdev->opmode = op_mode;
  2831. vdev->osdev = soc->osdev;
  2832. vdev->osif_rx = NULL;
  2833. vdev->osif_rsim_rx_decap = NULL;
  2834. vdev->osif_get_key = NULL;
  2835. vdev->osif_rx_mon = NULL;
  2836. vdev->osif_tx_free_ext = NULL;
  2837. vdev->osif_vdev = NULL;
  2838. vdev->delete.pending = 0;
  2839. vdev->safemode = 0;
  2840. vdev->drop_unenc = 1;
  2841. vdev->sec_type = cdp_sec_type_none;
  2842. #ifdef notyet
  2843. vdev->filters_num = 0;
  2844. #endif
  2845. qdf_mem_copy(
  2846. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2847. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2848. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2849. vdev->dscp_tid_map_id = 0;
  2850. vdev->mcast_enhancement_en = 0;
  2851. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2852. /* TODO: Initialize default HTT meta data that will be used in
  2853. * TCL descriptors for packets transmitted from this VDEV
  2854. */
  2855. TAILQ_INIT(&vdev->peer_list);
  2856. /* add this vdev into the pdev's list */
  2857. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2858. pdev->vdev_count++;
  2859. dp_tx_vdev_attach(vdev);
  2860. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2861. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2862. goto fail1;
  2863. if ((soc->intr_mode == DP_INTR_POLL) &&
  2864. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2865. if (pdev->vdev_count == 1)
  2866. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2867. }
  2868. dp_lro_hash_setup(soc);
  2869. /* LRO */
  2870. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2871. wlan_op_mode_sta == vdev->opmode)
  2872. vdev->lro_enable = true;
  2873. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2874. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2876. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2877. DP_STATS_INIT(vdev);
  2878. if (wlan_op_mode_sta == vdev->opmode)
  2879. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2880. vdev->mac_addr.raw);
  2881. return (struct cdp_vdev *)vdev;
  2882. fail1:
  2883. dp_tx_vdev_detach(vdev);
  2884. qdf_mem_free(vdev);
  2885. fail0:
  2886. return NULL;
  2887. }
  2888. /**
  2889. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2890. * @vdev: Datapath VDEV handle
  2891. * @osif_vdev: OSIF vdev handle
  2892. * @txrx_ops: Tx and Rx operations
  2893. *
  2894. * Return: DP VDEV handle on success, NULL on failure
  2895. */
  2896. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2897. void *osif_vdev,
  2898. struct ol_txrx_ops *txrx_ops)
  2899. {
  2900. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2901. vdev->osif_vdev = osif_vdev;
  2902. vdev->osif_rx = txrx_ops->rx.rx;
  2903. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2904. vdev->osif_get_key = txrx_ops->get_key;
  2905. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2906. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2907. #ifdef notyet
  2908. #if ATH_SUPPORT_WAPI
  2909. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2910. #endif
  2911. #endif
  2912. #ifdef UMAC_SUPPORT_PROXY_ARP
  2913. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2914. #endif
  2915. vdev->me_convert = txrx_ops->me_convert;
  2916. /* TODO: Enable the following once Tx code is integrated */
  2917. if (vdev->mesh_vdev)
  2918. txrx_ops->tx.tx = dp_tx_send_mesh;
  2919. else
  2920. txrx_ops->tx.tx = dp_tx_send;
  2921. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2922. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2923. "DP Vdev Register success");
  2924. }
  2925. /**
  2926. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2927. * @vdev: Datapath VDEV handle
  2928. *
  2929. * Return: void
  2930. */
  2931. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2932. {
  2933. struct dp_pdev *pdev = vdev->pdev;
  2934. struct dp_soc *soc = pdev->soc;
  2935. struct dp_peer *peer;
  2936. uint16_t *peer_ids;
  2937. uint8_t i = 0, j = 0;
  2938. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2939. if (!peer_ids) {
  2940. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2941. "DP alloc failure - unable to flush peers");
  2942. return;
  2943. }
  2944. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2945. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2946. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2947. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2948. if (j < soc->max_peers)
  2949. peer_ids[j++] = peer->peer_ids[i];
  2950. }
  2951. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2952. for (i = 0; i < j ; i++)
  2953. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2954. qdf_mem_free(peer_ids);
  2955. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2956. FL("Flushed peers for vdev object %pK "), vdev);
  2957. }
  2958. /*
  2959. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2960. * @txrx_vdev: Datapath VDEV handle
  2961. * @callback: Callback OL_IF on completion of detach
  2962. * @cb_context: Callback context
  2963. *
  2964. */
  2965. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2966. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2967. {
  2968. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2969. struct dp_pdev *pdev = vdev->pdev;
  2970. struct dp_soc *soc = pdev->soc;
  2971. /* preconditions */
  2972. qdf_assert(vdev);
  2973. /* remove the vdev from its parent pdev's list */
  2974. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2975. if (wlan_op_mode_sta == vdev->opmode)
  2976. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2977. /*
  2978. * If Target is hung, flush all peers before detaching vdev
  2979. * this will free all references held due to missing
  2980. * unmap commands from Target
  2981. */
  2982. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  2983. dp_vdev_flush_peers(vdev);
  2984. /*
  2985. * Use peer_ref_mutex while accessing peer_list, in case
  2986. * a peer is in the process of being removed from the list.
  2987. */
  2988. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2989. /* check that the vdev has no peers allocated */
  2990. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2991. /* debug print - will be removed later */
  2992. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2993. FL("not deleting vdev object %pK (%pM)"
  2994. "until deletion finishes for all its peers"),
  2995. vdev, vdev->mac_addr.raw);
  2996. /* indicate that the vdev needs to be deleted */
  2997. vdev->delete.pending = 1;
  2998. vdev->delete.callback = callback;
  2999. vdev->delete.context = cb_context;
  3000. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3001. return;
  3002. }
  3003. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3004. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  3005. vdev->vdev_id);
  3006. dp_tx_vdev_detach(vdev);
  3007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3008. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3009. qdf_mem_free(vdev);
  3010. if (callback)
  3011. callback(cb_context);
  3012. }
  3013. /*
  3014. * dp_peer_create_wifi3() - attach txrx peer
  3015. * @txrx_vdev: Datapath VDEV handle
  3016. * @peer_mac_addr: Peer MAC address
  3017. *
  3018. * Return: DP peeer handle on success, NULL on failure
  3019. */
  3020. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3021. uint8_t *peer_mac_addr)
  3022. {
  3023. struct dp_peer *peer;
  3024. int i;
  3025. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3026. struct dp_pdev *pdev;
  3027. struct dp_soc *soc;
  3028. /* preconditions */
  3029. qdf_assert(vdev);
  3030. qdf_assert(peer_mac_addr);
  3031. pdev = vdev->pdev;
  3032. soc = pdev->soc;
  3033. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr,
  3034. 0, vdev->vdev_id);
  3035. if (peer) {
  3036. peer->delete_in_progress = false;
  3037. return (void *)peer;
  3038. }
  3039. #ifdef notyet
  3040. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3041. soc->mempool_ol_ath_peer);
  3042. #else
  3043. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3044. #endif
  3045. if (!peer)
  3046. return NULL; /* failure */
  3047. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3048. TAILQ_INIT(&peer->ast_entry_list);
  3049. /* store provided params */
  3050. peer->vdev = vdev;
  3051. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  3052. qdf_spinlock_create(&peer->peer_info_lock);
  3053. qdf_mem_copy(
  3054. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3055. /* TODO: See of rx_opt_proc is really required */
  3056. peer->rx_opt_proc = soc->rx_opt_proc;
  3057. /* initialize the peer_id */
  3058. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3059. peer->peer_ids[i] = HTT_INVALID_PEER;
  3060. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3061. qdf_atomic_init(&peer->ref_cnt);
  3062. /* keep one reference for attach */
  3063. qdf_atomic_inc(&peer->ref_cnt);
  3064. /* add this peer into the vdev's list */
  3065. if (wlan_op_mode_sta == vdev->opmode)
  3066. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3067. else
  3068. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3069. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3070. /* TODO: See if hash based search is required */
  3071. dp_peer_find_hash_add(soc, peer);
  3072. /* Initialize the peer state */
  3073. peer->state = OL_TXRX_PEER_STATE_DISC;
  3074. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3075. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3076. vdev, peer, peer->mac_addr.raw,
  3077. qdf_atomic_read(&peer->ref_cnt));
  3078. /*
  3079. * For every peer MAp message search and set if bss_peer
  3080. */
  3081. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3082. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3083. "vdev bss_peer!!!!");
  3084. peer->bss_peer = 1;
  3085. vdev->vap_bss_peer = peer;
  3086. }
  3087. #ifndef CONFIG_WIN
  3088. dp_local_peer_id_alloc(pdev, peer);
  3089. #endif
  3090. DP_STATS_INIT(peer);
  3091. return (void *)peer;
  3092. }
  3093. /*
  3094. * dp_peer_setup_wifi3() - initialize the peer
  3095. * @vdev_hdl: virtual device object
  3096. * @peer: Peer object
  3097. *
  3098. * Return: void
  3099. */
  3100. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3101. {
  3102. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3103. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3104. struct dp_pdev *pdev;
  3105. struct dp_soc *soc;
  3106. bool hash_based = 0;
  3107. enum cdp_host_reo_dest_ring reo_dest;
  3108. /* preconditions */
  3109. qdf_assert(vdev);
  3110. qdf_assert(peer);
  3111. pdev = vdev->pdev;
  3112. soc = pdev->soc;
  3113. peer->last_assoc_rcvd = 0;
  3114. peer->last_disassoc_rcvd = 0;
  3115. peer->last_deauth_rcvd = 0;
  3116. /*
  3117. * hash based steering is disabled for Radios which are offloaded
  3118. * to NSS
  3119. */
  3120. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3121. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3122. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3123. FL("hash based steering for pdev: %d is %d\n"),
  3124. pdev->pdev_id, hash_based);
  3125. /*
  3126. * Below line of code will ensure the proper reo_dest ring is choosen
  3127. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3128. */
  3129. reo_dest = pdev->reo_dest;
  3130. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3131. /* TODO: Check the destination ring number to be passed to FW */
  3132. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3133. pdev->osif_pdev, peer->mac_addr.raw,
  3134. peer->vdev->vdev_id, hash_based, reo_dest);
  3135. }
  3136. dp_peer_rx_init(pdev, peer);
  3137. return;
  3138. }
  3139. /*
  3140. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3141. * @vdev_handle: virtual device object
  3142. * @htt_pkt_type: type of pkt
  3143. *
  3144. * Return: void
  3145. */
  3146. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3147. enum htt_cmn_pkt_type val)
  3148. {
  3149. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3150. vdev->tx_encap_type = val;
  3151. }
  3152. /*
  3153. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3154. * @vdev_handle: virtual device object
  3155. * @htt_pkt_type: type of pkt
  3156. *
  3157. * Return: void
  3158. */
  3159. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3160. enum htt_cmn_pkt_type val)
  3161. {
  3162. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3163. vdev->rx_decap_type = val;
  3164. }
  3165. /*
  3166. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3167. * @pdev_handle: physical device object
  3168. * @val: reo destination ring index (1 - 4)
  3169. *
  3170. * Return: void
  3171. */
  3172. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3173. enum cdp_host_reo_dest_ring val)
  3174. {
  3175. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3176. if (pdev)
  3177. pdev->reo_dest = val;
  3178. }
  3179. /*
  3180. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3181. * @pdev_handle: physical device object
  3182. *
  3183. * Return: reo destination ring index
  3184. */
  3185. static enum cdp_host_reo_dest_ring
  3186. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3187. {
  3188. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3189. if (pdev)
  3190. return pdev->reo_dest;
  3191. else
  3192. return cdp_host_reo_dest_ring_unknown;
  3193. }
  3194. #ifdef QCA_SUPPORT_SON
  3195. static void dp_son_peer_authorize(struct dp_peer *peer)
  3196. {
  3197. struct dp_soc *soc;
  3198. soc = peer->vdev->pdev->soc;
  3199. peer->peer_bs_inact_flag = 0;
  3200. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3201. return;
  3202. }
  3203. #else
  3204. static void dp_son_peer_authorize(struct dp_peer *peer)
  3205. {
  3206. return;
  3207. }
  3208. #endif
  3209. /*
  3210. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3211. * @pdev_handle: device object
  3212. * @val: value to be set
  3213. *
  3214. * Return: void
  3215. */
  3216. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3217. uint32_t val)
  3218. {
  3219. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3220. /* Enable/Disable smart mesh filtering. This flag will be checked
  3221. * during rx processing to check if packets are from NAC clients.
  3222. */
  3223. pdev->filter_neighbour_peers = val;
  3224. return 0;
  3225. }
  3226. /*
  3227. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3228. * address for smart mesh filtering
  3229. * @pdev_handle: device object
  3230. * @cmd: Add/Del command
  3231. * @macaddr: nac client mac address
  3232. *
  3233. * Return: void
  3234. */
  3235. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3236. uint32_t cmd, uint8_t *macaddr)
  3237. {
  3238. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3239. struct dp_neighbour_peer *peer = NULL;
  3240. if (!macaddr)
  3241. goto fail0;
  3242. /* Store address of NAC (neighbour peer) which will be checked
  3243. * against TA of received packets.
  3244. */
  3245. if (cmd == DP_NAC_PARAM_ADD) {
  3246. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3247. sizeof(*peer));
  3248. if (!peer) {
  3249. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3250. FL("DP neighbour peer node memory allocation failed"));
  3251. goto fail0;
  3252. }
  3253. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3254. macaddr, DP_MAC_ADDR_LEN);
  3255. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3256. /* add this neighbour peer into the list */
  3257. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3258. neighbour_peer_list_elem);
  3259. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3260. return 1;
  3261. } else if (cmd == DP_NAC_PARAM_DEL) {
  3262. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3263. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3264. neighbour_peer_list_elem) {
  3265. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3266. macaddr, DP_MAC_ADDR_LEN)) {
  3267. /* delete this peer from the list */
  3268. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3269. peer, neighbour_peer_list_elem);
  3270. qdf_mem_free(peer);
  3271. break;
  3272. }
  3273. }
  3274. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3275. return 1;
  3276. }
  3277. fail0:
  3278. return 0;
  3279. }
  3280. /*
  3281. * dp_get_sec_type() - Get the security type
  3282. * @peer: Datapath peer handle
  3283. * @sec_idx: Security id (mcast, ucast)
  3284. *
  3285. * return sec_type: Security type
  3286. */
  3287. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3288. {
  3289. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3290. return dpeer->security[sec_idx].sec_type;
  3291. }
  3292. /*
  3293. * dp_peer_authorize() - authorize txrx peer
  3294. * @peer_handle: Datapath peer handle
  3295. * @authorize
  3296. *
  3297. */
  3298. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3299. {
  3300. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3301. struct dp_soc *soc;
  3302. if (peer != NULL) {
  3303. soc = peer->vdev->pdev->soc;
  3304. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3305. dp_son_peer_authorize(peer);
  3306. peer->authorize = authorize ? 1 : 0;
  3307. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3308. }
  3309. }
  3310. #ifdef QCA_SUPPORT_SON
  3311. /*
  3312. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3313. * @pdev_handle: Device handle
  3314. * @new_threshold : updated threshold value
  3315. *
  3316. */
  3317. static void
  3318. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3319. u_int16_t new_threshold)
  3320. {
  3321. struct dp_vdev *vdev;
  3322. struct dp_peer *peer;
  3323. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3324. struct dp_soc *soc = pdev->soc;
  3325. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3326. if (old_threshold == new_threshold)
  3327. return;
  3328. soc->pdev_bs_inact_reload = new_threshold;
  3329. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3330. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3331. if (vdev->opmode != wlan_op_mode_ap)
  3332. continue;
  3333. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3334. if (!peer->authorize)
  3335. continue;
  3336. if (old_threshold - peer->peer_bs_inact >=
  3337. new_threshold) {
  3338. dp_mark_peer_inact((void *)peer, true);
  3339. peer->peer_bs_inact = 0;
  3340. } else {
  3341. peer->peer_bs_inact = new_threshold -
  3342. (old_threshold - peer->peer_bs_inact);
  3343. }
  3344. }
  3345. }
  3346. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3347. }
  3348. /**
  3349. * dp_txrx_reset_inact_count(): Reset inact count
  3350. * @pdev_handle - device handle
  3351. *
  3352. * Return: void
  3353. */
  3354. static void
  3355. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3356. {
  3357. struct dp_vdev *vdev = NULL;
  3358. struct dp_peer *peer = NULL;
  3359. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3360. struct dp_soc *soc = pdev->soc;
  3361. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3362. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3363. if (vdev->opmode != wlan_op_mode_ap)
  3364. continue;
  3365. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3366. if (!peer->authorize)
  3367. continue;
  3368. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3369. }
  3370. }
  3371. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3372. }
  3373. /**
  3374. * dp_set_inact_params(): set inactivity params
  3375. * @pdev_handle - device handle
  3376. * @inact_check_interval - inactivity interval
  3377. * @inact_normal - Inactivity normal
  3378. * @inact_overload - Inactivity overload
  3379. *
  3380. * Return: bool
  3381. */
  3382. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3383. u_int16_t inact_check_interval,
  3384. u_int16_t inact_normal, u_int16_t inact_overload)
  3385. {
  3386. struct dp_soc *soc;
  3387. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3388. if (!pdev)
  3389. return false;
  3390. soc = pdev->soc;
  3391. if (!soc)
  3392. return false;
  3393. soc->pdev_bs_inact_interval = inact_check_interval;
  3394. soc->pdev_bs_inact_normal = inact_normal;
  3395. soc->pdev_bs_inact_overload = inact_overload;
  3396. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3397. soc->pdev_bs_inact_normal);
  3398. return true;
  3399. }
  3400. /**
  3401. * dp_start_inact_timer(): Inactivity timer start
  3402. * @pdev_handle - device handle
  3403. * @enable - Inactivity timer start/stop
  3404. *
  3405. * Return: bool
  3406. */
  3407. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3408. {
  3409. struct dp_soc *soc;
  3410. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3411. if (!pdev)
  3412. return false;
  3413. soc = pdev->soc;
  3414. if (!soc)
  3415. return false;
  3416. if (enable) {
  3417. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3418. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3419. soc->pdev_bs_inact_interval * 1000);
  3420. } else {
  3421. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3422. }
  3423. return true;
  3424. }
  3425. /**
  3426. * dp_set_overload(): Set inactivity overload
  3427. * @pdev_handle - device handle
  3428. * @overload - overload status
  3429. *
  3430. * Return: void
  3431. */
  3432. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3433. {
  3434. struct dp_soc *soc;
  3435. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3436. if (!pdev)
  3437. return;
  3438. soc = pdev->soc;
  3439. if (!soc)
  3440. return;
  3441. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3442. overload ? soc->pdev_bs_inact_overload :
  3443. soc->pdev_bs_inact_normal);
  3444. }
  3445. /**
  3446. * dp_peer_is_inact(): check whether peer is inactive
  3447. * @peer_handle - datapath peer handle
  3448. *
  3449. * Return: bool
  3450. */
  3451. bool dp_peer_is_inact(void *peer_handle)
  3452. {
  3453. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3454. if (!peer)
  3455. return false;
  3456. return peer->peer_bs_inact_flag == 1;
  3457. }
  3458. /**
  3459. * dp_init_inact_timer: initialize the inact timer
  3460. * @soc - SOC handle
  3461. *
  3462. * Return: void
  3463. */
  3464. void dp_init_inact_timer(struct dp_soc *soc)
  3465. {
  3466. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3467. dp_txrx_peer_find_inact_timeout_handler,
  3468. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3469. }
  3470. #else
  3471. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3472. u_int16_t inact_normal, u_int16_t inact_overload)
  3473. {
  3474. return false;
  3475. }
  3476. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3477. {
  3478. return false;
  3479. }
  3480. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3481. {
  3482. return;
  3483. }
  3484. void dp_init_inact_timer(struct dp_soc *soc)
  3485. {
  3486. return;
  3487. }
  3488. bool dp_peer_is_inact(void *peer)
  3489. {
  3490. return false;
  3491. }
  3492. #endif
  3493. /*
  3494. * dp_peer_unref_delete() - unref and delete peer
  3495. * @peer_handle: Datapath peer handle
  3496. *
  3497. */
  3498. void dp_peer_unref_delete(void *peer_handle)
  3499. {
  3500. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3501. struct dp_peer *bss_peer = NULL;
  3502. struct dp_vdev *vdev = peer->vdev;
  3503. struct dp_pdev *pdev = vdev->pdev;
  3504. struct dp_soc *soc = pdev->soc;
  3505. struct dp_peer *tmppeer;
  3506. int found = 0;
  3507. uint16_t peer_id;
  3508. uint16_t vdev_id;
  3509. /*
  3510. * Hold the lock all the way from checking if the peer ref count
  3511. * is zero until the peer references are removed from the hash
  3512. * table and vdev list (if the peer ref count is zero).
  3513. * This protects against a new HL tx operation starting to use the
  3514. * peer object just after this function concludes it's done being used.
  3515. * Furthermore, the lock needs to be held while checking whether the
  3516. * vdev's list of peers is empty, to make sure that list is not modified
  3517. * concurrently with the empty check.
  3518. */
  3519. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3520. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3521. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3522. peer, qdf_atomic_read(&peer->ref_cnt));
  3523. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3524. peer_id = peer->peer_ids[0];
  3525. vdev_id = vdev->vdev_id;
  3526. /*
  3527. * Make sure that the reference to the peer in
  3528. * peer object map is removed
  3529. */
  3530. if (peer_id != HTT_INVALID_PEER)
  3531. soc->peer_id_to_obj_map[peer_id] = NULL;
  3532. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3533. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3534. /* remove the reference to the peer from the hash table */
  3535. dp_peer_find_hash_remove(soc, peer);
  3536. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3537. if (tmppeer == peer) {
  3538. found = 1;
  3539. break;
  3540. }
  3541. }
  3542. if (found) {
  3543. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3544. peer_list_elem);
  3545. } else {
  3546. /*Ignoring the remove operation as peer not found*/
  3547. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3548. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3549. peer, vdev, &peer->vdev->peer_list);
  3550. }
  3551. /* cleanup the peer data */
  3552. dp_peer_cleanup(vdev, peer);
  3553. /* check whether the parent vdev has no peers left */
  3554. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3555. /*
  3556. * Now that there are no references to the peer, we can
  3557. * release the peer reference lock.
  3558. */
  3559. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3560. /*
  3561. * Check if the parent vdev was waiting for its peers
  3562. * to be deleted, in order for it to be deleted too.
  3563. */
  3564. if (vdev->delete.pending) {
  3565. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3566. vdev->delete.callback;
  3567. void *vdev_delete_context =
  3568. vdev->delete.context;
  3569. QDF_TRACE(QDF_MODULE_ID_DP,
  3570. QDF_TRACE_LEVEL_INFO_HIGH,
  3571. FL("deleting vdev object %pK (%pM)"
  3572. " - its last peer is done"),
  3573. vdev, vdev->mac_addr.raw);
  3574. /* all peers are gone, go ahead and delete it */
  3575. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3576. FLOW_TYPE_VDEV,
  3577. vdev_id);
  3578. dp_tx_vdev_detach(vdev);
  3579. QDF_TRACE(QDF_MODULE_ID_DP,
  3580. QDF_TRACE_LEVEL_INFO_HIGH,
  3581. FL("deleting vdev object %pK (%pM)"),
  3582. vdev, vdev->mac_addr.raw);
  3583. qdf_mem_free(vdev);
  3584. vdev = NULL;
  3585. if (vdev_delete_cb)
  3586. vdev_delete_cb(vdev_delete_context);
  3587. }
  3588. } else {
  3589. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3590. }
  3591. if (vdev) {
  3592. if (vdev->vap_bss_peer == peer) {
  3593. vdev->vap_bss_peer = NULL;
  3594. }
  3595. }
  3596. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3597. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3598. vdev_id, peer->mac_addr.raw);
  3599. }
  3600. if (!vdev || !vdev->vap_bss_peer) {
  3601. goto free_peer;
  3602. }
  3603. #ifdef notyet
  3604. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3605. #else
  3606. bss_peer = vdev->vap_bss_peer;
  3607. DP_UPDATE_STATS(bss_peer, peer);
  3608. free_peer:
  3609. qdf_mem_free(peer);
  3610. #endif
  3611. } else {
  3612. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3613. }
  3614. }
  3615. /*
  3616. * dp_peer_detach_wifi3() – Detach txrx peer
  3617. * @peer_handle: Datapath peer handle
  3618. * @bitmap: bitmap indicating special handling of request.
  3619. *
  3620. */
  3621. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3622. {
  3623. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3624. /* redirect the peer's rx delivery function to point to a
  3625. * discard func
  3626. */
  3627. peer->rx_opt_proc = dp_rx_discard;
  3628. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3629. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3630. #ifndef CONFIG_WIN
  3631. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3632. #endif
  3633. qdf_spinlock_destroy(&peer->peer_info_lock);
  3634. /*
  3635. * Remove the reference added during peer_attach.
  3636. * The peer will still be left allocated until the
  3637. * PEER_UNMAP message arrives to remove the other
  3638. * reference, added by the PEER_MAP message.
  3639. */
  3640. dp_peer_unref_delete(peer_handle);
  3641. }
  3642. /*
  3643. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3644. * @peer_handle: Datapath peer handle
  3645. *
  3646. */
  3647. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3648. {
  3649. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3650. return vdev->mac_addr.raw;
  3651. }
  3652. /*
  3653. * dp_vdev_set_wds() - Enable per packet stats
  3654. * @vdev_handle: DP VDEV handle
  3655. * @val: value
  3656. *
  3657. * Return: none
  3658. */
  3659. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3660. {
  3661. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3662. vdev->wds_enabled = val;
  3663. return 0;
  3664. }
  3665. /*
  3666. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3667. * @peer_handle: Datapath peer handle
  3668. *
  3669. */
  3670. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3671. uint8_t vdev_id)
  3672. {
  3673. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3674. struct dp_vdev *vdev = NULL;
  3675. if (qdf_unlikely(!pdev))
  3676. return NULL;
  3677. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3678. if (vdev->vdev_id == vdev_id)
  3679. break;
  3680. }
  3681. return (struct cdp_vdev *)vdev;
  3682. }
  3683. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3684. {
  3685. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3686. return vdev->opmode;
  3687. }
  3688. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3689. {
  3690. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3691. struct dp_pdev *pdev = vdev->pdev;
  3692. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3693. }
  3694. /**
  3695. * dp_reset_monitor_mode() - Disable monitor mode
  3696. * @pdev_handle: Datapath PDEV handle
  3697. *
  3698. * Return: 0 on success, not 0 on failure
  3699. */
  3700. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3701. {
  3702. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3703. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3704. struct dp_soc *soc = pdev->soc;
  3705. uint8_t pdev_id;
  3706. int mac_id;
  3707. pdev_id = pdev->pdev_id;
  3708. soc = pdev->soc;
  3709. qdf_spin_lock_bh(&pdev->mon_lock);
  3710. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3711. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3712. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3713. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3714. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3715. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3716. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3717. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3718. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3719. }
  3720. pdev->monitor_vdev = NULL;
  3721. qdf_spin_unlock_bh(&pdev->mon_lock);
  3722. return 0;
  3723. }
  3724. /**
  3725. * dp_set_nac() - set peer_nac
  3726. * @peer_handle: Datapath PEER handle
  3727. *
  3728. * Return: void
  3729. */
  3730. static void dp_set_nac(struct cdp_peer *peer_handle)
  3731. {
  3732. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3733. peer->nac = 1;
  3734. }
  3735. /**
  3736. * dp_get_tx_pending() - read pending tx
  3737. * @pdev_handle: Datapath PDEV handle
  3738. *
  3739. * Return: outstanding tx
  3740. */
  3741. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3742. {
  3743. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3744. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3745. }
  3746. /**
  3747. * dp_get_peer_mac_from_peer_id() - get peer mac
  3748. * @pdev_handle: Datapath PDEV handle
  3749. * @peer_id: Peer ID
  3750. * @peer_mac: MAC addr of PEER
  3751. *
  3752. * Return: void
  3753. */
  3754. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3755. uint32_t peer_id, uint8_t *peer_mac)
  3756. {
  3757. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3758. struct dp_peer *peer;
  3759. if (pdev && peer_mac) {
  3760. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3761. if (peer && peer->mac_addr.raw) {
  3762. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3763. DP_MAC_ADDR_LEN);
  3764. }
  3765. }
  3766. }
  3767. /**
  3768. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3769. * @vdev_handle: Datapath VDEV handle
  3770. * @smart_monitor: Flag to denote if its smart monitor mode
  3771. *
  3772. * Return: 0 on success, not 0 on failure
  3773. */
  3774. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3775. uint8_t smart_monitor)
  3776. {
  3777. /* Many monitor VAPs can exists in a system but only one can be up at
  3778. * anytime
  3779. */
  3780. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3781. struct dp_pdev *pdev;
  3782. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3783. struct dp_soc *soc;
  3784. uint8_t pdev_id;
  3785. int mac_id;
  3786. qdf_assert(vdev);
  3787. pdev = vdev->pdev;
  3788. pdev_id = pdev->pdev_id;
  3789. soc = pdev->soc;
  3790. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3791. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3792. pdev, pdev_id, soc, vdev);
  3793. /*Check if current pdev's monitor_vdev exists */
  3794. if (pdev->monitor_vdev) {
  3795. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3796. "vdev=%pK\n", vdev);
  3797. qdf_assert(vdev);
  3798. }
  3799. pdev->monitor_vdev = vdev;
  3800. /* If smart monitor mode, do not configure monitor ring */
  3801. if (smart_monitor)
  3802. return QDF_STATUS_SUCCESS;
  3803. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3804. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3805. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3806. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3807. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3808. pdev->mo_data_filter);
  3809. htt_tlv_filter.mpdu_start = 1;
  3810. htt_tlv_filter.msdu_start = 1;
  3811. htt_tlv_filter.packet = 1;
  3812. htt_tlv_filter.msdu_end = 1;
  3813. htt_tlv_filter.mpdu_end = 1;
  3814. htt_tlv_filter.packet_header = 1;
  3815. htt_tlv_filter.attention = 1;
  3816. htt_tlv_filter.ppdu_start = 0;
  3817. htt_tlv_filter.ppdu_end = 0;
  3818. htt_tlv_filter.ppdu_end_user_stats = 0;
  3819. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3820. htt_tlv_filter.ppdu_end_status_done = 0;
  3821. htt_tlv_filter.header_per_msdu = 1;
  3822. htt_tlv_filter.enable_fp =
  3823. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3824. htt_tlv_filter.enable_md = 0;
  3825. htt_tlv_filter.enable_mo =
  3826. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3827. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3828. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3829. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3830. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3831. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3832. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3833. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3834. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3835. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3836. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3837. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3838. }
  3839. htt_tlv_filter.mpdu_start = 1;
  3840. htt_tlv_filter.msdu_start = 1;
  3841. htt_tlv_filter.packet = 0;
  3842. htt_tlv_filter.msdu_end = 1;
  3843. htt_tlv_filter.mpdu_end = 1;
  3844. htt_tlv_filter.packet_header = 1;
  3845. htt_tlv_filter.attention = 1;
  3846. htt_tlv_filter.ppdu_start = 1;
  3847. htt_tlv_filter.ppdu_end = 1;
  3848. htt_tlv_filter.ppdu_end_user_stats = 1;
  3849. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3850. htt_tlv_filter.ppdu_end_status_done = 1;
  3851. htt_tlv_filter.header_per_msdu = 0;
  3852. htt_tlv_filter.enable_fp =
  3853. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3854. htt_tlv_filter.enable_md = 0;
  3855. htt_tlv_filter.enable_mo =
  3856. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3857. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3858. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3859. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3860. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3861. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3862. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3863. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3864. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3865. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3866. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3867. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3868. }
  3869. return QDF_STATUS_SUCCESS;
  3870. }
  3871. /**
  3872. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3873. * @pdev_handle: Datapath PDEV handle
  3874. * @filter_val: Flag to select Filter for monitor mode
  3875. * Return: 0 on success, not 0 on failure
  3876. */
  3877. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3878. struct cdp_monitor_filter *filter_val)
  3879. {
  3880. /* Many monitor VAPs can exists in a system but only one can be up at
  3881. * anytime
  3882. */
  3883. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3884. struct dp_vdev *vdev = pdev->monitor_vdev;
  3885. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3886. struct dp_soc *soc;
  3887. uint8_t pdev_id;
  3888. int mac_id;
  3889. pdev_id = pdev->pdev_id;
  3890. soc = pdev->soc;
  3891. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3892. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3893. pdev, pdev_id, soc, vdev);
  3894. /*Check if current pdev's monitor_vdev exists */
  3895. if (!pdev->monitor_vdev) {
  3896. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3897. "vdev=%pK\n", vdev);
  3898. qdf_assert(vdev);
  3899. }
  3900. /* update filter mode, type in pdev structure */
  3901. pdev->mon_filter_mode = filter_val->mode;
  3902. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3903. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3904. pdev->fp_data_filter = filter_val->fp_data;
  3905. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3906. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3907. pdev->mo_data_filter = filter_val->mo_data;
  3908. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3909. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3910. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3911. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3912. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3913. pdev->mo_data_filter);
  3914. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3915. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3916. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3917. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3918. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3919. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3920. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3921. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3922. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3923. }
  3924. htt_tlv_filter.mpdu_start = 1;
  3925. htt_tlv_filter.msdu_start = 1;
  3926. htt_tlv_filter.packet = 1;
  3927. htt_tlv_filter.msdu_end = 1;
  3928. htt_tlv_filter.mpdu_end = 1;
  3929. htt_tlv_filter.packet_header = 1;
  3930. htt_tlv_filter.attention = 1;
  3931. htt_tlv_filter.ppdu_start = 0;
  3932. htt_tlv_filter.ppdu_end = 0;
  3933. htt_tlv_filter.ppdu_end_user_stats = 0;
  3934. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3935. htt_tlv_filter.ppdu_end_status_done = 0;
  3936. htt_tlv_filter.header_per_msdu = 1;
  3937. htt_tlv_filter.enable_fp =
  3938. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3939. htt_tlv_filter.enable_md = 0;
  3940. htt_tlv_filter.enable_mo =
  3941. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3942. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3943. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3944. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3945. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3946. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3947. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3948. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3949. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3950. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3951. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3952. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3953. }
  3954. htt_tlv_filter.mpdu_start = 1;
  3955. htt_tlv_filter.msdu_start = 1;
  3956. htt_tlv_filter.packet = 0;
  3957. htt_tlv_filter.msdu_end = 1;
  3958. htt_tlv_filter.mpdu_end = 1;
  3959. htt_tlv_filter.packet_header = 1;
  3960. htt_tlv_filter.attention = 1;
  3961. htt_tlv_filter.ppdu_start = 1;
  3962. htt_tlv_filter.ppdu_end = 1;
  3963. htt_tlv_filter.ppdu_end_user_stats = 1;
  3964. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3965. htt_tlv_filter.ppdu_end_status_done = 1;
  3966. htt_tlv_filter.header_per_msdu = 0;
  3967. htt_tlv_filter.enable_fp =
  3968. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3969. htt_tlv_filter.enable_md = 0;
  3970. htt_tlv_filter.enable_mo =
  3971. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3972. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3973. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3974. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3975. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3976. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3977. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3978. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3979. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3980. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3981. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3982. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3983. }
  3984. return QDF_STATUS_SUCCESS;
  3985. }
  3986. /**
  3987. * dp_get_pdev_id_frm_pdev() - get pdev_id
  3988. * @pdev_handle: Datapath PDEV handle
  3989. *
  3990. * Return: pdev_id
  3991. */
  3992. static
  3993. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  3994. {
  3995. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3996. return pdev->pdev_id;
  3997. }
  3998. /**
  3999. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4000. * @vdev_handle: Datapath VDEV handle
  4001. * Return: true on ucast filter flag set
  4002. */
  4003. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4004. {
  4005. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4006. struct dp_pdev *pdev;
  4007. pdev = vdev->pdev;
  4008. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4009. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4010. return true;
  4011. return false;
  4012. }
  4013. /**
  4014. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4015. * @vdev_handle: Datapath VDEV handle
  4016. * Return: true on mcast filter flag set
  4017. */
  4018. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4019. {
  4020. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4021. struct dp_pdev *pdev;
  4022. pdev = vdev->pdev;
  4023. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4024. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4025. return true;
  4026. return false;
  4027. }
  4028. /**
  4029. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4030. * @vdev_handle: Datapath VDEV handle
  4031. * Return: true on non data filter flag set
  4032. */
  4033. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4034. {
  4035. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4036. struct dp_pdev *pdev;
  4037. pdev = vdev->pdev;
  4038. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4039. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4040. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4041. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4042. return true;
  4043. }
  4044. }
  4045. return false;
  4046. }
  4047. #ifdef MESH_MODE_SUPPORT
  4048. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4049. {
  4050. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4051. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4052. FL("val %d"), val);
  4053. vdev->mesh_vdev = val;
  4054. }
  4055. /*
  4056. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4057. * @vdev_hdl: virtual device object
  4058. * @val: value to be set
  4059. *
  4060. * Return: void
  4061. */
  4062. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4063. {
  4064. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4065. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4066. FL("val %d"), val);
  4067. vdev->mesh_rx_filter = val;
  4068. }
  4069. #endif
  4070. /*
  4071. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4072. * Current scope is bar recieved count
  4073. *
  4074. * @pdev_handle: DP_PDEV handle
  4075. *
  4076. * Return: void
  4077. */
  4078. #define STATS_PROC_TIMEOUT (HZ/1000)
  4079. static void
  4080. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4081. {
  4082. struct dp_vdev *vdev;
  4083. struct dp_peer *peer;
  4084. uint32_t waitcnt;
  4085. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4086. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4087. if (!peer) {
  4088. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4089. FL("DP Invalid Peer refernce"));
  4090. return;
  4091. }
  4092. if (peer->delete_in_progress) {
  4093. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4094. FL("DP Peer deletion in progress"));
  4095. continue;
  4096. }
  4097. qdf_atomic_inc(&peer->ref_cnt);
  4098. waitcnt = 0;
  4099. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4100. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4101. && waitcnt < 10) {
  4102. schedule_timeout_interruptible(
  4103. STATS_PROC_TIMEOUT);
  4104. waitcnt++;
  4105. }
  4106. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4107. dp_peer_unref_delete(peer);
  4108. }
  4109. }
  4110. }
  4111. /**
  4112. * dp_rx_bar_stats_cb(): BAR received stats callback
  4113. * @soc: SOC handle
  4114. * @cb_ctxt: Call back context
  4115. * @reo_status: Reo status
  4116. *
  4117. * return: void
  4118. */
  4119. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4120. union hal_reo_status *reo_status)
  4121. {
  4122. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4123. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4124. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4125. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4126. queue_status->header.status);
  4127. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4128. return;
  4129. }
  4130. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4131. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4132. }
  4133. /**
  4134. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4135. * @vdev: DP VDEV handle
  4136. *
  4137. * return: void
  4138. */
  4139. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4140. {
  4141. struct dp_peer *peer = NULL;
  4142. struct dp_soc *soc = vdev->pdev->soc;
  4143. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4144. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4145. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4146. DP_UPDATE_STATS(vdev, peer);
  4147. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4148. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4149. &vdev->stats, (uint16_t) vdev->vdev_id,
  4150. UPDATE_VDEV_STATS);
  4151. }
  4152. /**
  4153. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4154. * @pdev: DP PDEV handle
  4155. *
  4156. * return: void
  4157. */
  4158. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4159. {
  4160. struct dp_vdev *vdev = NULL;
  4161. struct dp_soc *soc = pdev->soc;
  4162. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4163. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4164. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4165. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4166. dp_aggregate_vdev_stats(vdev);
  4167. DP_UPDATE_STATS(pdev, vdev);
  4168. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4169. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4170. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4171. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4172. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4173. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4174. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4175. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4176. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4177. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4178. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4179. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4180. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4181. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4182. DP_STATS_AGGR(pdev, vdev,
  4183. tx_i.mcast_en.dropped_map_error);
  4184. DP_STATS_AGGR(pdev, vdev,
  4185. tx_i.mcast_en.dropped_self_mac);
  4186. DP_STATS_AGGR(pdev, vdev,
  4187. tx_i.mcast_en.dropped_send_fail);
  4188. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4189. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4190. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4191. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4192. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4193. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4194. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4195. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4196. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4197. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4198. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4199. pdev->stats.tx_i.dropped.dma_error +
  4200. pdev->stats.tx_i.dropped.ring_full +
  4201. pdev->stats.tx_i.dropped.enqueue_fail +
  4202. pdev->stats.tx_i.dropped.desc_na +
  4203. pdev->stats.tx_i.dropped.res_full;
  4204. pdev->stats.tx.last_ack_rssi =
  4205. vdev->stats.tx.last_ack_rssi;
  4206. pdev->stats.tx_i.tso.num_seg =
  4207. vdev->stats.tx_i.tso.num_seg;
  4208. }
  4209. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4210. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  4211. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4212. }
  4213. /**
  4214. * dp_pdev_getstats() - get pdev packet level stats
  4215. * @pdev_handle: Datapath PDEV handle
  4216. * @stats: cdp network device stats structure
  4217. *
  4218. * Return: void
  4219. */
  4220. static void dp_pdev_getstats(struct cdp_pdev *pdev_handle,
  4221. struct cdp_dev_stats *stats)
  4222. {
  4223. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4224. dp_aggregate_pdev_stats(pdev);
  4225. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4226. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4227. stats->tx_errors = pdev->stats.tx.tx_failed +
  4228. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4229. stats->tx_dropped = stats->tx_errors;
  4230. stats->rx_packets = pdev->stats.rx.unicast.num +
  4231. pdev->stats.rx.multicast.num;
  4232. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4233. pdev->stats.rx.multicast.bytes;
  4234. }
  4235. /**
  4236. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4237. * @pdev: DP_PDEV Handle
  4238. *
  4239. * Return:void
  4240. */
  4241. static inline void
  4242. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4243. {
  4244. uint8_t index = 0;
  4245. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4246. DP_PRINT_STATS("Received From Stack:");
  4247. DP_PRINT_STATS(" Packets = %d",
  4248. pdev->stats.tx_i.rcvd.num);
  4249. DP_PRINT_STATS(" Bytes = %llu",
  4250. pdev->stats.tx_i.rcvd.bytes);
  4251. DP_PRINT_STATS("Processed:");
  4252. DP_PRINT_STATS(" Packets = %d",
  4253. pdev->stats.tx_i.processed.num);
  4254. DP_PRINT_STATS(" Bytes = %llu",
  4255. pdev->stats.tx_i.processed.bytes);
  4256. DP_PRINT_STATS("Total Completions:");
  4257. DP_PRINT_STATS(" Packets = %u",
  4258. pdev->stats.tx.comp_pkt.num);
  4259. DP_PRINT_STATS(" Bytes = %llu",
  4260. pdev->stats.tx.comp_pkt.bytes);
  4261. DP_PRINT_STATS("Successful Completions:");
  4262. DP_PRINT_STATS(" Packets = %u",
  4263. pdev->stats.tx.tx_success.num);
  4264. DP_PRINT_STATS(" Bytes = %llu",
  4265. pdev->stats.tx.tx_success.bytes);
  4266. DP_PRINT_STATS("Dropped:");
  4267. DP_PRINT_STATS(" Total = %d",
  4268. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4269. DP_PRINT_STATS(" Dma_map_error = %d",
  4270. pdev->stats.tx_i.dropped.dma_error);
  4271. DP_PRINT_STATS(" Ring Full = %d",
  4272. pdev->stats.tx_i.dropped.ring_full);
  4273. DP_PRINT_STATS(" Descriptor Not available = %d",
  4274. pdev->stats.tx_i.dropped.desc_na);
  4275. DP_PRINT_STATS(" HW enqueue failed= %d",
  4276. pdev->stats.tx_i.dropped.enqueue_fail);
  4277. DP_PRINT_STATS(" Resources Full = %d",
  4278. pdev->stats.tx_i.dropped.res_full);
  4279. DP_PRINT_STATS(" FW removed = %d",
  4280. pdev->stats.tx.dropped.fw_rem);
  4281. DP_PRINT_STATS(" FW removed transmitted = %d",
  4282. pdev->stats.tx.dropped.fw_rem_tx);
  4283. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4284. pdev->stats.tx.dropped.fw_rem_notx);
  4285. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4286. pdev->stats.tx.dropped.fw_reason1);
  4287. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4288. pdev->stats.tx.dropped.fw_reason2);
  4289. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4290. pdev->stats.tx.dropped.fw_reason3);
  4291. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4292. pdev->stats.tx.dropped.age_out);
  4293. DP_PRINT_STATS("Scatter Gather:");
  4294. DP_PRINT_STATS(" Packets = %d",
  4295. pdev->stats.tx_i.sg.sg_pkt.num);
  4296. DP_PRINT_STATS(" Bytes = %llu",
  4297. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4298. DP_PRINT_STATS(" Dropped By Host = %d",
  4299. pdev->stats.tx_i.sg.dropped_host);
  4300. DP_PRINT_STATS(" Dropped By Target = %d",
  4301. pdev->stats.tx_i.sg.dropped_target);
  4302. DP_PRINT_STATS("TSO:");
  4303. DP_PRINT_STATS(" Number of Segments = %d",
  4304. pdev->stats.tx_i.tso.num_seg);
  4305. DP_PRINT_STATS(" Packets = %d",
  4306. pdev->stats.tx_i.tso.tso_pkt.num);
  4307. DP_PRINT_STATS(" Bytes = %llu",
  4308. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4309. DP_PRINT_STATS(" Dropped By Host = %d",
  4310. pdev->stats.tx_i.tso.dropped_host);
  4311. DP_PRINT_STATS("Mcast Enhancement:");
  4312. DP_PRINT_STATS(" Packets = %d",
  4313. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4314. DP_PRINT_STATS(" Bytes = %llu",
  4315. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4316. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4317. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4318. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4319. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4320. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4321. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4322. DP_PRINT_STATS(" Unicast sent = %d",
  4323. pdev->stats.tx_i.mcast_en.ucast);
  4324. DP_PRINT_STATS("Raw:");
  4325. DP_PRINT_STATS(" Packets = %d",
  4326. pdev->stats.tx_i.raw.raw_pkt.num);
  4327. DP_PRINT_STATS(" Bytes = %llu",
  4328. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4329. DP_PRINT_STATS(" DMA map error = %d",
  4330. pdev->stats.tx_i.raw.dma_map_error);
  4331. DP_PRINT_STATS("Reinjected:");
  4332. DP_PRINT_STATS(" Packets = %d",
  4333. pdev->stats.tx_i.reinject_pkts.num);
  4334. DP_PRINT_STATS("Bytes = %llu\n",
  4335. pdev->stats.tx_i.reinject_pkts.bytes);
  4336. DP_PRINT_STATS("Inspected:");
  4337. DP_PRINT_STATS(" Packets = %d",
  4338. pdev->stats.tx_i.inspect_pkts.num);
  4339. DP_PRINT_STATS(" Bytes = %llu",
  4340. pdev->stats.tx_i.inspect_pkts.bytes);
  4341. DP_PRINT_STATS("Nawds Multicast:");
  4342. DP_PRINT_STATS(" Packets = %d",
  4343. pdev->stats.tx_i.nawds_mcast.num);
  4344. DP_PRINT_STATS(" Bytes = %llu",
  4345. pdev->stats.tx_i.nawds_mcast.bytes);
  4346. DP_PRINT_STATS("CCE Classified:");
  4347. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4348. pdev->stats.tx_i.cce_classified);
  4349. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4350. pdev->stats.tx_i.cce_classified_raw);
  4351. DP_PRINT_STATS("Mesh stats:");
  4352. DP_PRINT_STATS(" frames to firmware: %u",
  4353. pdev->stats.tx_i.mesh.exception_fw);
  4354. DP_PRINT_STATS(" completions from fw: %u",
  4355. pdev->stats.tx_i.mesh.completion_fw);
  4356. DP_PRINT_STATS("PPDU stats counter");
  4357. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4358. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4359. pdev->stats.ppdu_stats_counter[index]);
  4360. }
  4361. }
  4362. /**
  4363. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4364. * @pdev: DP_PDEV Handle
  4365. *
  4366. * Return: void
  4367. */
  4368. static inline void
  4369. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4370. {
  4371. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4372. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4373. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4374. pdev->stats.rx.rcvd_reo[0].num,
  4375. pdev->stats.rx.rcvd_reo[1].num,
  4376. pdev->stats.rx.rcvd_reo[2].num,
  4377. pdev->stats.rx.rcvd_reo[3].num);
  4378. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4379. pdev->stats.rx.rcvd_reo[0].bytes,
  4380. pdev->stats.rx.rcvd_reo[1].bytes,
  4381. pdev->stats.rx.rcvd_reo[2].bytes,
  4382. pdev->stats.rx.rcvd_reo[3].bytes);
  4383. DP_PRINT_STATS("Replenished:");
  4384. DP_PRINT_STATS(" Packets = %d",
  4385. pdev->stats.replenish.pkts.num);
  4386. DP_PRINT_STATS(" Bytes = %llu",
  4387. pdev->stats.replenish.pkts.bytes);
  4388. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4389. pdev->stats.buf_freelist);
  4390. DP_PRINT_STATS(" Low threshold intr = %d",
  4391. pdev->stats.replenish.low_thresh_intrs);
  4392. DP_PRINT_STATS("Dropped:");
  4393. DP_PRINT_STATS(" msdu_not_done = %d",
  4394. pdev->stats.dropped.msdu_not_done);
  4395. DP_PRINT_STATS(" mon_rx_drop = %d",
  4396. pdev->stats.dropped.mon_rx_drop);
  4397. DP_PRINT_STATS("Sent To Stack:");
  4398. DP_PRINT_STATS(" Packets = %d",
  4399. pdev->stats.rx.to_stack.num);
  4400. DP_PRINT_STATS(" Bytes = %llu",
  4401. pdev->stats.rx.to_stack.bytes);
  4402. DP_PRINT_STATS("Multicast/Broadcast:");
  4403. DP_PRINT_STATS(" Packets = %d",
  4404. pdev->stats.rx.multicast.num);
  4405. DP_PRINT_STATS(" Bytes = %llu",
  4406. pdev->stats.rx.multicast.bytes);
  4407. DP_PRINT_STATS("Errors:");
  4408. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4409. pdev->stats.replenish.rxdma_err);
  4410. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4411. pdev->stats.err.desc_alloc_fail);
  4412. /* Get bar_recv_cnt */
  4413. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4414. DP_PRINT_STATS("BAR Received Count: = %d",
  4415. pdev->stats.rx.bar_recv_cnt);
  4416. }
  4417. /**
  4418. * dp_print_soc_tx_stats(): Print SOC level stats
  4419. * @soc DP_SOC Handle
  4420. *
  4421. * Return: void
  4422. */
  4423. static inline void
  4424. dp_print_soc_tx_stats(struct dp_soc *soc)
  4425. {
  4426. DP_PRINT_STATS("SOC Tx Stats:\n");
  4427. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4428. soc->stats.tx.desc_in_use);
  4429. DP_PRINT_STATS("Invalid peer:");
  4430. DP_PRINT_STATS(" Packets = %d",
  4431. soc->stats.tx.tx_invalid_peer.num);
  4432. DP_PRINT_STATS(" Bytes = %llu",
  4433. soc->stats.tx.tx_invalid_peer.bytes);
  4434. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4435. soc->stats.tx.tcl_ring_full[0],
  4436. soc->stats.tx.tcl_ring_full[1],
  4437. soc->stats.tx.tcl_ring_full[2]);
  4438. }
  4439. /**
  4440. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4441. * @soc: DP_SOC Handle
  4442. *
  4443. * Return:void
  4444. */
  4445. static inline void
  4446. dp_print_soc_rx_stats(struct dp_soc *soc)
  4447. {
  4448. uint32_t i;
  4449. char reo_error[DP_REO_ERR_LENGTH];
  4450. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4451. uint8_t index = 0;
  4452. DP_PRINT_STATS("SOC Rx Stats:\n");
  4453. DP_PRINT_STATS("Errors:\n");
  4454. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4455. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4456. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4457. DP_PRINT_STATS("Invalid RBM = %d",
  4458. soc->stats.rx.err.invalid_rbm);
  4459. DP_PRINT_STATS("Invalid Vdev = %d",
  4460. soc->stats.rx.err.invalid_vdev);
  4461. DP_PRINT_STATS("Invalid Pdev = %d",
  4462. soc->stats.rx.err.invalid_pdev);
  4463. DP_PRINT_STATS("Invalid Peer = %d",
  4464. soc->stats.rx.err.rx_invalid_peer.num);
  4465. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4466. soc->stats.rx.err.hal_ring_access_fail);
  4467. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4468. index += qdf_snprint(&rxdma_error[index],
  4469. DP_RXDMA_ERR_LENGTH - index,
  4470. " %d", soc->stats.rx.err.rxdma_error[i]);
  4471. }
  4472. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4473. rxdma_error);
  4474. index = 0;
  4475. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4476. index += qdf_snprint(&reo_error[index],
  4477. DP_REO_ERR_LENGTH - index,
  4478. " %d", soc->stats.rx.err.reo_error[i]);
  4479. }
  4480. DP_PRINT_STATS("REO Error(0-14):%s",
  4481. reo_error);
  4482. }
  4483. /**
  4484. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4485. * @soc: DP_SOC handle
  4486. * @srng: DP_SRNG handle
  4487. * @ring_name: SRNG name
  4488. *
  4489. * Return: void
  4490. */
  4491. static inline void
  4492. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4493. char *ring_name)
  4494. {
  4495. uint32_t tailp;
  4496. uint32_t headp;
  4497. if (srng->hal_srng != NULL) {
  4498. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4499. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4500. ring_name, headp, tailp);
  4501. }
  4502. }
  4503. /**
  4504. * dp_print_ring_stats(): Print tail and head pointer
  4505. * @pdev: DP_PDEV handle
  4506. *
  4507. * Return:void
  4508. */
  4509. static inline void
  4510. dp_print_ring_stats(struct dp_pdev *pdev)
  4511. {
  4512. uint32_t i;
  4513. char ring_name[STR_MAXLEN + 1];
  4514. int mac_id;
  4515. dp_print_ring_stat_from_hal(pdev->soc,
  4516. &pdev->soc->reo_exception_ring,
  4517. "Reo Exception Ring");
  4518. dp_print_ring_stat_from_hal(pdev->soc,
  4519. &pdev->soc->reo_reinject_ring,
  4520. "Reo Inject Ring");
  4521. dp_print_ring_stat_from_hal(pdev->soc,
  4522. &pdev->soc->reo_cmd_ring,
  4523. "Reo Command Ring");
  4524. dp_print_ring_stat_from_hal(pdev->soc,
  4525. &pdev->soc->reo_status_ring,
  4526. "Reo Status Ring");
  4527. dp_print_ring_stat_from_hal(pdev->soc,
  4528. &pdev->soc->rx_rel_ring,
  4529. "Rx Release ring");
  4530. dp_print_ring_stat_from_hal(pdev->soc,
  4531. &pdev->soc->tcl_cmd_ring,
  4532. "Tcl command Ring");
  4533. dp_print_ring_stat_from_hal(pdev->soc,
  4534. &pdev->soc->tcl_status_ring,
  4535. "Tcl Status Ring");
  4536. dp_print_ring_stat_from_hal(pdev->soc,
  4537. &pdev->soc->wbm_desc_rel_ring,
  4538. "Wbm Desc Rel Ring");
  4539. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4540. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4541. dp_print_ring_stat_from_hal(pdev->soc,
  4542. &pdev->soc->reo_dest_ring[i],
  4543. ring_name);
  4544. }
  4545. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4546. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4547. dp_print_ring_stat_from_hal(pdev->soc,
  4548. &pdev->soc->tcl_data_ring[i],
  4549. ring_name);
  4550. }
  4551. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4552. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4553. dp_print_ring_stat_from_hal(pdev->soc,
  4554. &pdev->soc->tx_comp_ring[i],
  4555. ring_name);
  4556. }
  4557. dp_print_ring_stat_from_hal(pdev->soc,
  4558. &pdev->rx_refill_buf_ring,
  4559. "Rx Refill Buf Ring");
  4560. dp_print_ring_stat_from_hal(pdev->soc,
  4561. &pdev->rx_refill_buf_ring2,
  4562. "Second Rx Refill Buf Ring");
  4563. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4564. dp_print_ring_stat_from_hal(pdev->soc,
  4565. &pdev->rxdma_mon_buf_ring[mac_id],
  4566. "Rxdma Mon Buf Ring");
  4567. dp_print_ring_stat_from_hal(pdev->soc,
  4568. &pdev->rxdma_mon_dst_ring[mac_id],
  4569. "Rxdma Mon Dst Ring");
  4570. dp_print_ring_stat_from_hal(pdev->soc,
  4571. &pdev->rxdma_mon_status_ring[mac_id],
  4572. "Rxdma Mon Status Ring");
  4573. dp_print_ring_stat_from_hal(pdev->soc,
  4574. &pdev->rxdma_mon_desc_ring[mac_id],
  4575. "Rxdma mon desc Ring");
  4576. }
  4577. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4578. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4579. dp_print_ring_stat_from_hal(pdev->soc,
  4580. &pdev->rxdma_err_dst_ring[i],
  4581. ring_name);
  4582. }
  4583. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4584. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4585. dp_print_ring_stat_from_hal(pdev->soc,
  4586. &pdev->rx_mac_buf_ring[i],
  4587. ring_name);
  4588. }
  4589. }
  4590. /**
  4591. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4592. * @vdev: DP_VDEV handle
  4593. *
  4594. * Return:void
  4595. */
  4596. static inline void
  4597. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4598. {
  4599. struct dp_peer *peer = NULL;
  4600. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4601. DP_STATS_CLR(vdev->pdev);
  4602. DP_STATS_CLR(vdev->pdev->soc);
  4603. DP_STATS_CLR(vdev);
  4604. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4605. if (!peer)
  4606. return;
  4607. DP_STATS_CLR(peer);
  4608. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4609. soc->cdp_soc.ol_ops->update_dp_stats(
  4610. vdev->pdev->osif_pdev,
  4611. &peer->stats,
  4612. peer->peer_ids[0],
  4613. UPDATE_PEER_STATS);
  4614. }
  4615. }
  4616. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4617. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4618. &vdev->stats, (uint16_t)vdev->vdev_id,
  4619. UPDATE_VDEV_STATS);
  4620. }
  4621. /**
  4622. * dp_print_rx_rates(): Print Rx rate stats
  4623. * @vdev: DP_VDEV handle
  4624. *
  4625. * Return:void
  4626. */
  4627. static inline void
  4628. dp_print_rx_rates(struct dp_vdev *vdev)
  4629. {
  4630. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4631. uint8_t i, mcs, pkt_type;
  4632. uint8_t index = 0;
  4633. char nss[DP_NSS_LENGTH];
  4634. DP_PRINT_STATS("Rx Rate Info:\n");
  4635. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4636. index = 0;
  4637. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4638. if (!dp_rate_string[pkt_type][mcs].valid)
  4639. continue;
  4640. DP_PRINT_STATS(" %s = %d",
  4641. dp_rate_string[pkt_type][mcs].mcs_type,
  4642. pdev->stats.rx.pkt_type[pkt_type].
  4643. mcs_count[mcs]);
  4644. }
  4645. DP_PRINT_STATS("\n");
  4646. }
  4647. index = 0;
  4648. for (i = 0; i < SS_COUNT; i++) {
  4649. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4650. " %d", pdev->stats.rx.nss[i]);
  4651. }
  4652. DP_PRINT_STATS("NSS(1-8) = %s",
  4653. nss);
  4654. DP_PRINT_STATS("SGI ="
  4655. " 0.8us %d,"
  4656. " 0.4us %d,"
  4657. " 1.6us %d,"
  4658. " 3.2us %d,",
  4659. pdev->stats.rx.sgi_count[0],
  4660. pdev->stats.rx.sgi_count[1],
  4661. pdev->stats.rx.sgi_count[2],
  4662. pdev->stats.rx.sgi_count[3]);
  4663. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4664. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4665. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4666. DP_PRINT_STATS("Reception Type ="
  4667. " SU: %d,"
  4668. " MU_MIMO:%d,"
  4669. " MU_OFDMA:%d,"
  4670. " MU_OFDMA_MIMO:%d\n",
  4671. pdev->stats.rx.reception_type[0],
  4672. pdev->stats.rx.reception_type[1],
  4673. pdev->stats.rx.reception_type[2],
  4674. pdev->stats.rx.reception_type[3]);
  4675. DP_PRINT_STATS("Aggregation:\n");
  4676. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4677. pdev->stats.rx.ampdu_cnt);
  4678. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4679. pdev->stats.rx.non_ampdu_cnt);
  4680. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4681. pdev->stats.rx.amsdu_cnt);
  4682. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4683. pdev->stats.rx.non_amsdu_cnt);
  4684. }
  4685. /**
  4686. * dp_print_tx_rates(): Print tx rates
  4687. * @vdev: DP_VDEV handle
  4688. *
  4689. * Return:void
  4690. */
  4691. static inline void
  4692. dp_print_tx_rates(struct dp_vdev *vdev)
  4693. {
  4694. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4695. uint8_t mcs, pkt_type;
  4696. uint32_t index;
  4697. DP_PRINT_STATS("Tx Rate Info:\n");
  4698. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4699. index = 0;
  4700. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4701. if (!dp_rate_string[pkt_type][mcs].valid)
  4702. continue;
  4703. DP_PRINT_STATS(" %s = %d",
  4704. dp_rate_string[pkt_type][mcs].mcs_type,
  4705. pdev->stats.tx.pkt_type[pkt_type].
  4706. mcs_count[mcs]);
  4707. }
  4708. DP_PRINT_STATS("\n");
  4709. }
  4710. DP_PRINT_STATS("SGI ="
  4711. " 0.8us %d"
  4712. " 0.4us %d"
  4713. " 1.6us %d"
  4714. " 3.2us %d",
  4715. pdev->stats.tx.sgi_count[0],
  4716. pdev->stats.tx.sgi_count[1],
  4717. pdev->stats.tx.sgi_count[2],
  4718. pdev->stats.tx.sgi_count[3]);
  4719. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4720. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3],
  4721. pdev->stats.tx.bw[4], pdev->stats.tx.bw[5]);
  4722. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4723. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4724. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4725. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4726. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4727. DP_PRINT_STATS("Aggregation:\n");
  4728. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4729. pdev->stats.tx.amsdu_cnt);
  4730. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4731. pdev->stats.tx.non_amsdu_cnt);
  4732. }
  4733. /**
  4734. * dp_print_peer_stats():print peer stats
  4735. * @peer: DP_PEER handle
  4736. *
  4737. * return void
  4738. */
  4739. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4740. {
  4741. uint8_t i, mcs, pkt_type;
  4742. uint32_t index;
  4743. char nss[DP_NSS_LENGTH];
  4744. DP_PRINT_STATS("Node Tx Stats:\n");
  4745. DP_PRINT_STATS("Total Packet Completions = %d",
  4746. peer->stats.tx.comp_pkt.num);
  4747. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4748. peer->stats.tx.comp_pkt.bytes);
  4749. DP_PRINT_STATS("Success Packets = %d",
  4750. peer->stats.tx.tx_success.num);
  4751. DP_PRINT_STATS("Success Bytes = %llu",
  4752. peer->stats.tx.tx_success.bytes);
  4753. DP_PRINT_STATS("Unicast Success Packets = %d",
  4754. peer->stats.tx.ucast.num);
  4755. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4756. peer->stats.tx.ucast.bytes);
  4757. DP_PRINT_STATS("Multicast Success Packets = %d",
  4758. peer->stats.tx.mcast.num);
  4759. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4760. peer->stats.tx.mcast.bytes);
  4761. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4762. peer->stats.tx.bcast.num);
  4763. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4764. peer->stats.tx.bcast.bytes);
  4765. DP_PRINT_STATS("Packets Failed = %d",
  4766. peer->stats.tx.tx_failed);
  4767. DP_PRINT_STATS("Packets In OFDMA = %d",
  4768. peer->stats.tx.ofdma);
  4769. DP_PRINT_STATS("Packets In STBC = %d",
  4770. peer->stats.tx.stbc);
  4771. DP_PRINT_STATS("Packets In LDPC = %d",
  4772. peer->stats.tx.ldpc);
  4773. DP_PRINT_STATS("Packet Retries = %d",
  4774. peer->stats.tx.retries);
  4775. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4776. peer->stats.tx.amsdu_cnt);
  4777. DP_PRINT_STATS("Last Packet RSSI = %d",
  4778. peer->stats.tx.last_ack_rssi);
  4779. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4780. peer->stats.tx.dropped.fw_rem);
  4781. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4782. peer->stats.tx.dropped.fw_rem_tx);
  4783. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4784. peer->stats.tx.dropped.fw_rem_notx);
  4785. DP_PRINT_STATS("Dropped : Age Out = %d",
  4786. peer->stats.tx.dropped.age_out);
  4787. DP_PRINT_STATS("NAWDS : ");
  4788. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4789. peer->stats.tx.nawds_mcast_drop);
  4790. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4791. peer->stats.tx.nawds_mcast.num);
  4792. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4793. peer->stats.tx.nawds_mcast.bytes);
  4794. DP_PRINT_STATS("Rate Info:");
  4795. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4796. index = 0;
  4797. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4798. if (!dp_rate_string[pkt_type][mcs].valid)
  4799. continue;
  4800. DP_PRINT_STATS(" %s = %d",
  4801. dp_rate_string[pkt_type][mcs].mcs_type,
  4802. peer->stats.tx.pkt_type[pkt_type].
  4803. mcs_count[mcs]);
  4804. }
  4805. DP_PRINT_STATS("\n");
  4806. }
  4807. DP_PRINT_STATS("SGI = "
  4808. " 0.8us %d"
  4809. " 0.4us %d"
  4810. " 1.6us %d"
  4811. " 3.2us %d",
  4812. peer->stats.tx.sgi_count[0],
  4813. peer->stats.tx.sgi_count[1],
  4814. peer->stats.tx.sgi_count[2],
  4815. peer->stats.tx.sgi_count[3]);
  4816. DP_PRINT_STATS("Excess Retries per AC ");
  4817. DP_PRINT_STATS(" Best effort = %d",
  4818. peer->stats.tx.excess_retries_per_ac[0]);
  4819. DP_PRINT_STATS(" Background= %d",
  4820. peer->stats.tx.excess_retries_per_ac[1]);
  4821. DP_PRINT_STATS(" Video = %d",
  4822. peer->stats.tx.excess_retries_per_ac[2]);
  4823. DP_PRINT_STATS(" Voice = %d",
  4824. peer->stats.tx.excess_retries_per_ac[3]);
  4825. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4826. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4827. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4828. index = 0;
  4829. for (i = 0; i < SS_COUNT; i++) {
  4830. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4831. " %d", peer->stats.tx.nss[i]);
  4832. }
  4833. DP_PRINT_STATS("NSS(1-8) = %s",
  4834. nss);
  4835. DP_PRINT_STATS("Aggregation:");
  4836. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4837. peer->stats.tx.amsdu_cnt);
  4838. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4839. peer->stats.tx.non_amsdu_cnt);
  4840. DP_PRINT_STATS("Node Rx Stats:");
  4841. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4842. peer->stats.rx.to_stack.num);
  4843. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4844. peer->stats.rx.to_stack.bytes);
  4845. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4846. DP_PRINT_STATS("Ring Id = %d", i);
  4847. DP_PRINT_STATS(" Packets Received = %d",
  4848. peer->stats.rx.rcvd_reo[i].num);
  4849. DP_PRINT_STATS(" Bytes Received = %llu",
  4850. peer->stats.rx.rcvd_reo[i].bytes);
  4851. }
  4852. DP_PRINT_STATS("Multicast Packets Received = %d",
  4853. peer->stats.rx.multicast.num);
  4854. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4855. peer->stats.rx.multicast.bytes);
  4856. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4857. peer->stats.rx.bcast.num);
  4858. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4859. peer->stats.rx.bcast.bytes);
  4860. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4861. peer->stats.rx.intra_bss.pkts.num);
  4862. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4863. peer->stats.rx.intra_bss.pkts.bytes);
  4864. DP_PRINT_STATS("Raw Packets Received = %d",
  4865. peer->stats.rx.raw.num);
  4866. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4867. peer->stats.rx.raw.bytes);
  4868. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4869. peer->stats.rx.err.mic_err);
  4870. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4871. peer->stats.rx.err.decrypt_err);
  4872. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4873. peer->stats.rx.non_ampdu_cnt);
  4874. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4875. peer->stats.rx.ampdu_cnt);
  4876. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4877. peer->stats.rx.non_amsdu_cnt);
  4878. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4879. peer->stats.rx.amsdu_cnt);
  4880. DP_PRINT_STATS("NAWDS : ");
  4881. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4882. peer->stats.rx.nawds_mcast_drop.num);
  4883. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4884. peer->stats.rx.nawds_mcast_drop.bytes);
  4885. DP_PRINT_STATS("SGI ="
  4886. " 0.8us %d"
  4887. " 0.4us %d"
  4888. " 1.6us %d"
  4889. " 3.2us %d",
  4890. peer->stats.rx.sgi_count[0],
  4891. peer->stats.rx.sgi_count[1],
  4892. peer->stats.rx.sgi_count[2],
  4893. peer->stats.rx.sgi_count[3]);
  4894. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4895. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4896. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4897. DP_PRINT_STATS("Reception Type ="
  4898. " SU %d,"
  4899. " MU_MIMO %d,"
  4900. " MU_OFDMA %d,"
  4901. " MU_OFDMA_MIMO %d",
  4902. peer->stats.rx.reception_type[0],
  4903. peer->stats.rx.reception_type[1],
  4904. peer->stats.rx.reception_type[2],
  4905. peer->stats.rx.reception_type[3]);
  4906. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4907. index = 0;
  4908. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4909. if (!dp_rate_string[pkt_type][mcs].valid)
  4910. continue;
  4911. DP_PRINT_STATS(" %s = %d",
  4912. dp_rate_string[pkt_type][mcs].mcs_type,
  4913. peer->stats.rx.pkt_type[pkt_type].
  4914. mcs_count[mcs]);
  4915. }
  4916. DP_PRINT_STATS("\n");
  4917. }
  4918. index = 0;
  4919. for (i = 0; i < SS_COUNT; i++) {
  4920. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4921. " %d", peer->stats.rx.nss[i]);
  4922. }
  4923. DP_PRINT_STATS("NSS(1-8) = %s",
  4924. nss);
  4925. DP_PRINT_STATS("Aggregation:");
  4926. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4927. peer->stats.rx.ampdu_cnt);
  4928. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4929. peer->stats.rx.non_ampdu_cnt);
  4930. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4931. peer->stats.rx.amsdu_cnt);
  4932. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4933. peer->stats.rx.non_amsdu_cnt);
  4934. }
  4935. /**
  4936. * dp_print_host_stats()- Function to print the stats aggregated at host
  4937. * @vdev_handle: DP_VDEV handle
  4938. * @type: host stats type
  4939. *
  4940. * Available Stat types
  4941. * TXRX_CLEAR_STATS : Clear the stats
  4942. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4943. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4944. * TXRX_TX_HOST_STATS: Print Tx Stats
  4945. * TXRX_RX_HOST_STATS: Print Rx Stats
  4946. * TXRX_AST_STATS: Print AST Stats
  4947. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4948. *
  4949. * Return: 0 on success, print error message in case of failure
  4950. */
  4951. static int
  4952. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4953. {
  4954. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4955. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4956. dp_aggregate_pdev_stats(pdev);
  4957. switch (type) {
  4958. case TXRX_CLEAR_STATS:
  4959. dp_txrx_host_stats_clr(vdev);
  4960. break;
  4961. case TXRX_RX_RATE_STATS:
  4962. dp_print_rx_rates(vdev);
  4963. break;
  4964. case TXRX_TX_RATE_STATS:
  4965. dp_print_tx_rates(vdev);
  4966. break;
  4967. case TXRX_TX_HOST_STATS:
  4968. dp_print_pdev_tx_stats(pdev);
  4969. dp_print_soc_tx_stats(pdev->soc);
  4970. break;
  4971. case TXRX_RX_HOST_STATS:
  4972. dp_print_pdev_rx_stats(pdev);
  4973. dp_print_soc_rx_stats(pdev->soc);
  4974. break;
  4975. case TXRX_AST_STATS:
  4976. dp_print_ast_stats(pdev->soc);
  4977. dp_print_peer_table(vdev);
  4978. break;
  4979. case TXRX_SRNG_PTR_STATS:
  4980. dp_print_ring_stats(pdev);
  4981. break;
  4982. default:
  4983. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4984. break;
  4985. }
  4986. return 0;
  4987. }
  4988. /*
  4989. * dp_get_host_peer_stats()- function to print peer stats
  4990. * @pdev_handle: DP_PDEV handle
  4991. * @mac_addr: mac address of the peer
  4992. *
  4993. * Return: void
  4994. */
  4995. static void
  4996. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4997. {
  4998. struct dp_peer *peer;
  4999. uint8_t local_id;
  5000. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5001. &local_id);
  5002. if (!peer) {
  5003. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5004. "%s: Invalid peer\n", __func__);
  5005. return;
  5006. }
  5007. dp_print_peer_stats(peer);
  5008. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5009. return;
  5010. }
  5011. /*
  5012. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5013. * @pdev: DP_PDEV handle
  5014. *
  5015. * Return: void
  5016. */
  5017. static void
  5018. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5019. {
  5020. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5021. int mac_id;
  5022. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5023. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5024. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5025. pdev->pdev_id);
  5026. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5027. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5028. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5029. }
  5030. }
  5031. /*
  5032. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5033. * @pdev: DP_PDEV handle
  5034. *
  5035. * Return: void
  5036. */
  5037. static void
  5038. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5039. {
  5040. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5041. int mac_id;
  5042. htt_tlv_filter.mpdu_start = 0;
  5043. htt_tlv_filter.msdu_start = 0;
  5044. htt_tlv_filter.packet = 0;
  5045. htt_tlv_filter.msdu_end = 0;
  5046. htt_tlv_filter.mpdu_end = 0;
  5047. htt_tlv_filter.packet_header = 1;
  5048. htt_tlv_filter.attention = 1;
  5049. htt_tlv_filter.ppdu_start = 1;
  5050. htt_tlv_filter.ppdu_end = 1;
  5051. htt_tlv_filter.ppdu_end_user_stats = 1;
  5052. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5053. htt_tlv_filter.ppdu_end_status_done = 1;
  5054. htt_tlv_filter.enable_fp = 1;
  5055. htt_tlv_filter.enable_md = 0;
  5056. if (pdev->mcopy_mode)
  5057. htt_tlv_filter.enable_mo = 1;
  5058. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5059. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5060. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5061. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5062. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5063. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5064. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5065. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5066. pdev->pdev_id);
  5067. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5068. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5069. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5070. }
  5071. }
  5072. /*
  5073. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5074. * @pdev_handle: DP_PDEV handle
  5075. * @val: user provided value
  5076. *
  5077. * Return: void
  5078. */
  5079. static void
  5080. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5081. {
  5082. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5083. switch (val) {
  5084. case 0:
  5085. pdev->tx_sniffer_enable = 0;
  5086. pdev->mcopy_mode = 0;
  5087. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  5088. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5089. dp_ppdu_ring_reset(pdev);
  5090. } else if (pdev->enhanced_stats_en) {
  5091. dp_h2t_cfg_stats_msg_send(pdev,
  5092. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5093. }
  5094. break;
  5095. case 1:
  5096. pdev->tx_sniffer_enable = 1;
  5097. pdev->mcopy_mode = 0;
  5098. if (!pdev->pktlog_ppdu_stats)
  5099. dp_h2t_cfg_stats_msg_send(pdev,
  5100. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5101. break;
  5102. case 2:
  5103. pdev->mcopy_mode = 1;
  5104. pdev->tx_sniffer_enable = 0;
  5105. if (!pdev->enhanced_stats_en)
  5106. dp_ppdu_ring_cfg(pdev);
  5107. if (!pdev->pktlog_ppdu_stats)
  5108. dp_h2t_cfg_stats_msg_send(pdev,
  5109. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5110. break;
  5111. default:
  5112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5113. "Invalid value\n");
  5114. break;
  5115. }
  5116. }
  5117. /*
  5118. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5119. * @pdev_handle: DP_PDEV handle
  5120. *
  5121. * Return: void
  5122. */
  5123. static void
  5124. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5125. {
  5126. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5127. pdev->enhanced_stats_en = 1;
  5128. if (!pdev->mcopy_mode)
  5129. dp_ppdu_ring_cfg(pdev);
  5130. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5131. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5132. }
  5133. /*
  5134. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5135. * @pdev_handle: DP_PDEV handle
  5136. *
  5137. * Return: void
  5138. */
  5139. static void
  5140. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5141. {
  5142. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5143. pdev->enhanced_stats_en = 0;
  5144. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5145. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5146. if (!pdev->mcopy_mode)
  5147. dp_ppdu_ring_reset(pdev);
  5148. }
  5149. /*
  5150. * dp_get_fw_peer_stats()- function to print peer stats
  5151. * @pdev_handle: DP_PDEV handle
  5152. * @mac_addr: mac address of the peer
  5153. * @cap: Type of htt stats requested
  5154. *
  5155. * Currently Supporting only MAC ID based requests Only
  5156. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5157. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5158. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5159. *
  5160. * Return: void
  5161. */
  5162. static void
  5163. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5164. uint32_t cap)
  5165. {
  5166. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5167. int i;
  5168. uint32_t config_param0 = 0;
  5169. uint32_t config_param1 = 0;
  5170. uint32_t config_param2 = 0;
  5171. uint32_t config_param3 = 0;
  5172. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5173. config_param0 |= (1 << (cap + 1));
  5174. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5175. config_param1 |= (1 << i);
  5176. }
  5177. config_param2 |= (mac_addr[0] & 0x000000ff);
  5178. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5179. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5180. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5181. config_param3 |= (mac_addr[4] & 0x000000ff);
  5182. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5183. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5184. config_param0, config_param1, config_param2,
  5185. config_param3, 0, 0, 0);
  5186. }
  5187. /* This struct definition will be removed from here
  5188. * once it get added in FW headers*/
  5189. struct httstats_cmd_req {
  5190. uint32_t config_param0;
  5191. uint32_t config_param1;
  5192. uint32_t config_param2;
  5193. uint32_t config_param3;
  5194. int cookie;
  5195. u_int8_t stats_id;
  5196. };
  5197. /*
  5198. * dp_get_htt_stats: function to process the httstas request
  5199. * @pdev_handle: DP pdev handle
  5200. * @data: pointer to request data
  5201. * @data_len: length for request data
  5202. *
  5203. * return: void
  5204. */
  5205. static void
  5206. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5207. {
  5208. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5209. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5210. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5211. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5212. req->config_param0, req->config_param1,
  5213. req->config_param2, req->config_param3,
  5214. req->cookie, 0, 0);
  5215. }
  5216. /*
  5217. * dp_set_pdev_param: function to set parameters in pdev
  5218. * @pdev_handle: DP pdev handle
  5219. * @param: parameter type to be set
  5220. * @val: value of parameter to be set
  5221. *
  5222. * return: void
  5223. */
  5224. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5225. enum cdp_pdev_param_type param, uint8_t val)
  5226. {
  5227. switch (param) {
  5228. case CDP_CONFIG_DEBUG_SNIFFER:
  5229. dp_config_debug_sniffer(pdev_handle, val);
  5230. break;
  5231. default:
  5232. break;
  5233. }
  5234. }
  5235. /*
  5236. * dp_set_vdev_param: function to set parameters in vdev
  5237. * @param: parameter type to be set
  5238. * @val: value of parameter to be set
  5239. *
  5240. * return: void
  5241. */
  5242. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5243. enum cdp_vdev_param_type param, uint32_t val)
  5244. {
  5245. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5246. switch (param) {
  5247. case CDP_ENABLE_WDS:
  5248. vdev->wds_enabled = val;
  5249. break;
  5250. case CDP_ENABLE_NAWDS:
  5251. vdev->nawds_enabled = val;
  5252. break;
  5253. case CDP_ENABLE_MCAST_EN:
  5254. vdev->mcast_enhancement_en = val;
  5255. break;
  5256. case CDP_ENABLE_PROXYSTA:
  5257. vdev->proxysta_vdev = val;
  5258. break;
  5259. case CDP_UPDATE_TDLS_FLAGS:
  5260. vdev->tdls_link_connected = val;
  5261. break;
  5262. case CDP_CFG_WDS_AGING_TIMER:
  5263. if (val == 0)
  5264. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5265. else if (val != vdev->wds_aging_timer_val)
  5266. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5267. vdev->wds_aging_timer_val = val;
  5268. break;
  5269. case CDP_ENABLE_AP_BRIDGE:
  5270. if (wlan_op_mode_sta != vdev->opmode)
  5271. vdev->ap_bridge_enabled = val;
  5272. else
  5273. vdev->ap_bridge_enabled = false;
  5274. break;
  5275. case CDP_ENABLE_CIPHER:
  5276. vdev->sec_type = val;
  5277. break;
  5278. case CDP_ENABLE_QWRAP_ISOLATION:
  5279. vdev->isolation_vdev = val;
  5280. break;
  5281. default:
  5282. break;
  5283. }
  5284. dp_tx_vdev_update_search_flags(vdev);
  5285. }
  5286. /**
  5287. * dp_peer_set_nawds: set nawds bit in peer
  5288. * @peer_handle: pointer to peer
  5289. * @value: enable/disable nawds
  5290. *
  5291. * return: void
  5292. */
  5293. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5294. {
  5295. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5296. peer->nawds_enabled = value;
  5297. }
  5298. /*
  5299. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5300. * @vdev_handle: DP_VDEV handle
  5301. * @map_id:ID of map that needs to be updated
  5302. *
  5303. * Return: void
  5304. */
  5305. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5306. uint8_t map_id)
  5307. {
  5308. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5309. vdev->dscp_tid_map_id = map_id;
  5310. return;
  5311. }
  5312. /*
  5313. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5314. * @pdev_handle: DP_PDEV handle
  5315. * @buf: to hold pdev_stats
  5316. *
  5317. * Return: int
  5318. */
  5319. static int
  5320. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5321. {
  5322. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5323. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5324. struct cdp_txrx_stats_req req = {0,};
  5325. dp_aggregate_pdev_stats(pdev);
  5326. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5327. req.cookie_val = 1;
  5328. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5329. req.param1, req.param2, req.param3, 0,
  5330. req.cookie_val, 0);
  5331. msleep(DP_MAX_SLEEP_TIME);
  5332. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5333. req.cookie_val = 1;
  5334. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5335. req.param1, req.param2, req.param3, 0,
  5336. req.cookie_val, 0);
  5337. msleep(DP_MAX_SLEEP_TIME);
  5338. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5339. return TXRX_STATS_LEVEL;
  5340. }
  5341. /**
  5342. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5343. * @pdev: DP_PDEV handle
  5344. * @map_id: ID of map that needs to be updated
  5345. * @tos: index value in map
  5346. * @tid: tid value passed by the user
  5347. *
  5348. * Return: void
  5349. */
  5350. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5351. uint8_t map_id, uint8_t tos, uint8_t tid)
  5352. {
  5353. uint8_t dscp;
  5354. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5355. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5356. pdev->dscp_tid_map[map_id][dscp] = tid;
  5357. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5358. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5359. map_id, dscp);
  5360. return;
  5361. }
  5362. /**
  5363. * dp_fw_stats_process(): Process TxRX FW stats request
  5364. * @vdev_handle: DP VDEV handle
  5365. * @req: stats request
  5366. *
  5367. * return: int
  5368. */
  5369. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5370. struct cdp_txrx_stats_req *req)
  5371. {
  5372. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5373. struct dp_pdev *pdev = NULL;
  5374. uint32_t stats = req->stats;
  5375. uint8_t channel = req->channel;
  5376. if (!vdev) {
  5377. DP_TRACE(NONE, "VDEV not found");
  5378. return 1;
  5379. }
  5380. pdev = vdev->pdev;
  5381. /*
  5382. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5383. * from param0 to param3 according to below rule:
  5384. *
  5385. * PARAM:
  5386. * - config_param0 : start_offset (stats type)
  5387. * - config_param1 : stats bmask from start offset
  5388. * - config_param2 : stats bmask from start offset + 32
  5389. * - config_param3 : stats bmask from start offset + 64
  5390. */
  5391. if (req->stats == CDP_TXRX_STATS_0) {
  5392. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5393. req->param1 = 0xFFFFFFFF;
  5394. req->param2 = 0xFFFFFFFF;
  5395. req->param3 = 0xFFFFFFFF;
  5396. }
  5397. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5398. req->param1, req->param2, req->param3,
  5399. 0, 0, channel);
  5400. }
  5401. /**
  5402. * dp_txrx_stats_request - function to map to firmware and host stats
  5403. * @vdev: virtual handle
  5404. * @req: stats request
  5405. *
  5406. * Return: integer
  5407. */
  5408. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5409. struct cdp_txrx_stats_req *req)
  5410. {
  5411. int host_stats;
  5412. int fw_stats;
  5413. enum cdp_stats stats;
  5414. if (!vdev || !req) {
  5415. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5416. "Invalid vdev/req instance");
  5417. return 0;
  5418. }
  5419. stats = req->stats;
  5420. if (stats >= CDP_TXRX_MAX_STATS)
  5421. return 0;
  5422. /*
  5423. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5424. * has to be updated if new FW HTT stats added
  5425. */
  5426. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5427. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5428. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5429. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5430. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5431. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5432. stats, fw_stats, host_stats);
  5433. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5434. /* update request with FW stats type */
  5435. req->stats = fw_stats;
  5436. return dp_fw_stats_process(vdev, req);
  5437. }
  5438. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5439. (host_stats <= TXRX_HOST_STATS_MAX))
  5440. return dp_print_host_stats(vdev, host_stats);
  5441. else
  5442. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5443. "Wrong Input for TxRx Stats");
  5444. return 0;
  5445. }
  5446. /*
  5447. * dp_print_napi_stats(): NAPI stats
  5448. * @soc - soc handle
  5449. */
  5450. static void dp_print_napi_stats(struct dp_soc *soc)
  5451. {
  5452. hif_print_napi_stats(soc->hif_handle);
  5453. }
  5454. /*
  5455. * dp_print_per_ring_stats(): Packet count per ring
  5456. * @soc - soc handle
  5457. */
  5458. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5459. {
  5460. uint8_t ring;
  5461. uint16_t core;
  5462. uint64_t total_packets;
  5463. DP_TRACE(FATAL, "Reo packets per ring:");
  5464. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5465. total_packets = 0;
  5466. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5467. for (core = 0; core < NR_CPUS; core++) {
  5468. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5469. core, soc->stats.rx.ring_packets[core][ring]);
  5470. total_packets += soc->stats.rx.ring_packets[core][ring];
  5471. }
  5472. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5473. ring, total_packets);
  5474. }
  5475. }
  5476. /*
  5477. * dp_txrx_path_stats() - Function to display dump stats
  5478. * @soc - soc handle
  5479. *
  5480. * return: none
  5481. */
  5482. static void dp_txrx_path_stats(struct dp_soc *soc)
  5483. {
  5484. uint8_t error_code;
  5485. uint8_t loop_pdev;
  5486. struct dp_pdev *pdev;
  5487. uint8_t i;
  5488. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5489. pdev = soc->pdev_list[loop_pdev];
  5490. dp_aggregate_pdev_stats(pdev);
  5491. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5492. "Tx path Statistics:");
  5493. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5494. pdev->stats.tx_i.rcvd.num,
  5495. pdev->stats.tx_i.rcvd.bytes);
  5496. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5497. pdev->stats.tx_i.processed.num,
  5498. pdev->stats.tx_i.processed.bytes);
  5499. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5500. pdev->stats.tx.tx_success.num,
  5501. pdev->stats.tx.tx_success.bytes);
  5502. DP_TRACE(FATAL, "Dropped in host:");
  5503. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5504. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5505. DP_TRACE(FATAL, "Descriptor not available: %u",
  5506. pdev->stats.tx_i.dropped.desc_na);
  5507. DP_TRACE(FATAL, "Ring full: %u",
  5508. pdev->stats.tx_i.dropped.ring_full);
  5509. DP_TRACE(FATAL, "Enqueue fail: %u",
  5510. pdev->stats.tx_i.dropped.enqueue_fail);
  5511. DP_TRACE(FATAL, "DMA Error: %u",
  5512. pdev->stats.tx_i.dropped.dma_error);
  5513. DP_TRACE(FATAL, "Dropped in hardware:");
  5514. DP_TRACE(FATAL, "total packets dropped: %u",
  5515. pdev->stats.tx.tx_failed);
  5516. DP_TRACE(FATAL, "mpdu age out: %u",
  5517. pdev->stats.tx.dropped.age_out);
  5518. DP_TRACE(FATAL, "firmware removed: %u",
  5519. pdev->stats.tx.dropped.fw_rem);
  5520. DP_TRACE(FATAL, "firmware removed tx: %u",
  5521. pdev->stats.tx.dropped.fw_rem_tx);
  5522. DP_TRACE(FATAL, "firmware removed notx %u",
  5523. pdev->stats.tx.dropped.fw_rem_notx);
  5524. DP_TRACE(FATAL, "peer_invalid: %u",
  5525. pdev->soc->stats.tx.tx_invalid_peer.num);
  5526. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5527. DP_TRACE(FATAL, "Single Packet: %u",
  5528. pdev->stats.tx_comp_histogram.pkts_1);
  5529. DP_TRACE(FATAL, "2-20 Packets: %u",
  5530. pdev->stats.tx_comp_histogram.pkts_2_20);
  5531. DP_TRACE(FATAL, "21-40 Packets: %u",
  5532. pdev->stats.tx_comp_histogram.pkts_21_40);
  5533. DP_TRACE(FATAL, "41-60 Packets: %u",
  5534. pdev->stats.tx_comp_histogram.pkts_41_60);
  5535. DP_TRACE(FATAL, "61-80 Packets: %u",
  5536. pdev->stats.tx_comp_histogram.pkts_61_80);
  5537. DP_TRACE(FATAL, "81-100 Packets: %u",
  5538. pdev->stats.tx_comp_histogram.pkts_81_100);
  5539. DP_TRACE(FATAL, "101-200 Packets: %u",
  5540. pdev->stats.tx_comp_histogram.pkts_101_200);
  5541. DP_TRACE(FATAL, " 201+ Packets: %u",
  5542. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5543. DP_TRACE(FATAL, "Rx path statistics");
  5544. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5545. pdev->stats.rx.to_stack.num,
  5546. pdev->stats.rx.to_stack.bytes);
  5547. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5548. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5549. i, pdev->stats.rx.rcvd_reo[i].num,
  5550. pdev->stats.rx.rcvd_reo[i].bytes);
  5551. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5552. pdev->stats.rx.intra_bss.pkts.num,
  5553. pdev->stats.rx.intra_bss.pkts.bytes);
  5554. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5555. pdev->stats.rx.intra_bss.fail.num,
  5556. pdev->stats.rx.intra_bss.fail.bytes);
  5557. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5558. pdev->stats.rx.raw.num,
  5559. pdev->stats.rx.raw.bytes);
  5560. DP_TRACE(FATAL, "dropped: error %u msdus",
  5561. pdev->stats.rx.err.mic_err);
  5562. DP_TRACE(FATAL, "peer invalid %u",
  5563. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5564. DP_TRACE(FATAL, "Reo Statistics");
  5565. DP_TRACE(FATAL, "rbm error: %u msdus",
  5566. pdev->soc->stats.rx.err.invalid_rbm);
  5567. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5568. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5569. DP_TRACE(FATAL, "Reo errors");
  5570. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5571. error_code++) {
  5572. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5573. error_code,
  5574. pdev->soc->stats.rx.err.reo_error[error_code]);
  5575. }
  5576. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5577. error_code++) {
  5578. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5579. error_code,
  5580. pdev->soc->stats.rx.err
  5581. .rxdma_error[error_code]);
  5582. }
  5583. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5584. DP_TRACE(FATAL, "Single Packet: %u",
  5585. pdev->stats.rx_ind_histogram.pkts_1);
  5586. DP_TRACE(FATAL, "2-20 Packets: %u",
  5587. pdev->stats.rx_ind_histogram.pkts_2_20);
  5588. DP_TRACE(FATAL, "21-40 Packets: %u",
  5589. pdev->stats.rx_ind_histogram.pkts_21_40);
  5590. DP_TRACE(FATAL, "41-60 Packets: %u",
  5591. pdev->stats.rx_ind_histogram.pkts_41_60);
  5592. DP_TRACE(FATAL, "61-80 Packets: %u",
  5593. pdev->stats.rx_ind_histogram.pkts_61_80);
  5594. DP_TRACE(FATAL, "81-100 Packets: %u",
  5595. pdev->stats.rx_ind_histogram.pkts_81_100);
  5596. DP_TRACE(FATAL, "101-200 Packets: %u",
  5597. pdev->stats.rx_ind_histogram.pkts_101_200);
  5598. DP_TRACE(FATAL, " 201+ Packets: %u",
  5599. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5600. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5601. __func__,
  5602. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5603. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5604. pdev->soc->wlan_cfg_ctx->rx_hash,
  5605. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5606. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5607. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5608. __func__,
  5609. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5610. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5611. #endif
  5612. }
  5613. }
  5614. /*
  5615. * dp_txrx_dump_stats() - Dump statistics
  5616. * @value - Statistics option
  5617. */
  5618. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5619. enum qdf_stats_verbosity_level level)
  5620. {
  5621. struct dp_soc *soc =
  5622. (struct dp_soc *)psoc;
  5623. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5624. if (!soc) {
  5625. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5626. "%s: soc is NULL", __func__);
  5627. return QDF_STATUS_E_INVAL;
  5628. }
  5629. switch (value) {
  5630. case CDP_TXRX_PATH_STATS:
  5631. dp_txrx_path_stats(soc);
  5632. break;
  5633. case CDP_RX_RING_STATS:
  5634. dp_print_per_ring_stats(soc);
  5635. break;
  5636. case CDP_TXRX_TSO_STATS:
  5637. /* TODO: NOT IMPLEMENTED */
  5638. break;
  5639. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5640. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5641. break;
  5642. case CDP_DP_NAPI_STATS:
  5643. dp_print_napi_stats(soc);
  5644. break;
  5645. case CDP_TXRX_DESC_STATS:
  5646. /* TODO: NOT IMPLEMENTED */
  5647. break;
  5648. default:
  5649. status = QDF_STATUS_E_INVAL;
  5650. break;
  5651. }
  5652. return status;
  5653. }
  5654. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5655. /**
  5656. * dp_update_flow_control_parameters() - API to store datapath
  5657. * config parameters
  5658. * @soc: soc handle
  5659. * @cfg: ini parameter handle
  5660. *
  5661. * Return: void
  5662. */
  5663. static inline
  5664. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5665. struct cdp_config_params *params)
  5666. {
  5667. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5668. params->tx_flow_stop_queue_threshold;
  5669. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5670. params->tx_flow_start_queue_offset;
  5671. }
  5672. #else
  5673. static inline
  5674. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5675. struct cdp_config_params *params)
  5676. {
  5677. }
  5678. #endif
  5679. /**
  5680. * dp_update_config_parameters() - API to store datapath
  5681. * config parameters
  5682. * @soc: soc handle
  5683. * @cfg: ini parameter handle
  5684. *
  5685. * Return: status
  5686. */
  5687. static
  5688. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5689. struct cdp_config_params *params)
  5690. {
  5691. struct dp_soc *soc = (struct dp_soc *)psoc;
  5692. if (!(soc)) {
  5693. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5694. "%s: Invalid handle", __func__);
  5695. return QDF_STATUS_E_INVAL;
  5696. }
  5697. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5698. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5699. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5700. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5701. params->tcp_udp_checksumoffload;
  5702. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5703. dp_update_flow_control_parameters(soc, params);
  5704. return QDF_STATUS_SUCCESS;
  5705. }
  5706. /**
  5707. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5708. * config parameters
  5709. * @vdev_handle - datapath vdev handle
  5710. * @cfg: ini parameter handle
  5711. *
  5712. * Return: status
  5713. */
  5714. #ifdef WDS_VENDOR_EXTENSION
  5715. void
  5716. dp_txrx_set_wds_rx_policy(
  5717. struct cdp_vdev *vdev_handle,
  5718. u_int32_t val)
  5719. {
  5720. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5721. struct dp_peer *peer;
  5722. if (vdev->opmode == wlan_op_mode_ap) {
  5723. /* for ap, set it on bss_peer */
  5724. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5725. if (peer->bss_peer) {
  5726. peer->wds_ecm.wds_rx_filter = 1;
  5727. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5728. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5729. break;
  5730. }
  5731. }
  5732. } else if (vdev->opmode == wlan_op_mode_sta) {
  5733. peer = TAILQ_FIRST(&vdev->peer_list);
  5734. peer->wds_ecm.wds_rx_filter = 1;
  5735. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5736. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5737. }
  5738. }
  5739. /**
  5740. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5741. *
  5742. * @peer_handle - datapath peer handle
  5743. * @wds_tx_ucast: policy for unicast transmission
  5744. * @wds_tx_mcast: policy for multicast transmission
  5745. *
  5746. * Return: void
  5747. */
  5748. void
  5749. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5750. int wds_tx_ucast, int wds_tx_mcast)
  5751. {
  5752. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5753. if (wds_tx_ucast || wds_tx_mcast) {
  5754. peer->wds_enabled = 1;
  5755. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5756. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5757. } else {
  5758. peer->wds_enabled = 0;
  5759. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5760. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5761. }
  5762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5763. FL("Policy Update set to :\
  5764. peer->wds_enabled %d\
  5765. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5766. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5767. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5768. peer->wds_ecm.wds_tx_mcast_4addr);
  5769. return;
  5770. }
  5771. #endif
  5772. static struct cdp_wds_ops dp_ops_wds = {
  5773. .vdev_set_wds = dp_vdev_set_wds,
  5774. #ifdef WDS_VENDOR_EXTENSION
  5775. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5776. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5777. #endif
  5778. };
  5779. /*
  5780. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5781. * @soc - datapath soc handle
  5782. * @peer - datapath peer handle
  5783. *
  5784. * Delete the AST entries belonging to a peer
  5785. */
  5786. #ifdef FEATURE_AST
  5787. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5788. struct dp_peer *peer)
  5789. {
  5790. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5791. qdf_spin_lock_bh(&soc->ast_lock);
  5792. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5793. dp_peer_del_ast(soc, ast_entry);
  5794. qdf_spin_unlock_bh(&soc->ast_lock);
  5795. }
  5796. #else
  5797. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5798. struct dp_peer *peer)
  5799. {
  5800. }
  5801. #endif
  5802. /*
  5803. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5804. * @vdev_handle - datapath vdev handle
  5805. * @callback - callback function
  5806. * @ctxt: callback context
  5807. *
  5808. */
  5809. static void
  5810. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5811. ol_txrx_data_tx_cb callback, void *ctxt)
  5812. {
  5813. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5814. vdev->tx_non_std_data_callback.func = callback;
  5815. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5816. }
  5817. /**
  5818. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5819. * @pdev_hdl: datapath pdev handle
  5820. *
  5821. * Return: opaque pointer to dp txrx handle
  5822. */
  5823. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5824. {
  5825. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5826. return pdev->dp_txrx_handle;
  5827. }
  5828. /**
  5829. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5830. * @pdev_hdl: datapath pdev handle
  5831. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5832. *
  5833. * Return: void
  5834. */
  5835. static void
  5836. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5837. {
  5838. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5839. pdev->dp_txrx_handle = dp_txrx_hdl;
  5840. }
  5841. /**
  5842. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  5843. * @soc_handle: datapath soc handle
  5844. *
  5845. * Return: opaque pointer to external dp (non-core DP)
  5846. */
  5847. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  5848. {
  5849. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5850. return soc->external_txrx_handle;
  5851. }
  5852. /**
  5853. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  5854. * @soc_handle: datapath soc handle
  5855. * @txrx_handle: opaque pointer to external dp (non-core DP)
  5856. *
  5857. * Return: void
  5858. */
  5859. static void
  5860. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  5861. {
  5862. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5863. soc->external_txrx_handle = txrx_handle;
  5864. }
  5865. #ifdef FEATURE_AST
  5866. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5867. {
  5868. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5869. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5870. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5871. peer->delete_in_progress = true;
  5872. dp_peer_delete_ast_entries(soc, peer);
  5873. }
  5874. #endif
  5875. #ifdef ATH_SUPPORT_NAC_RSSI
  5876. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  5877. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  5878. uint8_t chan_num)
  5879. {
  5880. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5881. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5882. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5883. pdev->nac_rssi_filtering = 1;
  5884. /* Store address of NAC (neighbour peer) which will be checked
  5885. * against TA of received packets.
  5886. */
  5887. if (cmd == CDP_NAC_PARAM_ADD) {
  5888. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  5889. client_macaddr, DP_MAC_ADDR_LEN);
  5890. vdev->cdp_nac_rssi_enabled = 1;
  5891. } else if (cmd == CDP_NAC_PARAM_DEL) {
  5892. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  5893. client_macaddr, DP_MAC_ADDR_LEN)) {
  5894. /* delete this peer from the list */
  5895. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  5896. DP_MAC_ADDR_LEN);
  5897. }
  5898. vdev->cdp_nac_rssi_enabled = 0;
  5899. }
  5900. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  5901. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  5902. (vdev->pdev->osif_pdev, vdev->vdev_id, cmd, bssid);
  5903. return QDF_STATUS_SUCCESS;
  5904. }
  5905. #endif
  5906. static struct cdp_cmn_ops dp_ops_cmn = {
  5907. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5908. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5909. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5910. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5911. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5912. .txrx_peer_create = dp_peer_create_wifi3,
  5913. .txrx_peer_setup = dp_peer_setup_wifi3,
  5914. #ifdef FEATURE_AST
  5915. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5916. #else
  5917. .txrx_peer_teardown = NULL,
  5918. #endif
  5919. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  5920. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  5921. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  5922. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  5923. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  5924. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  5925. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  5926. .txrx_peer_delete = dp_peer_delete_wifi3,
  5927. .txrx_vdev_register = dp_vdev_register_wifi3,
  5928. .txrx_soc_detach = dp_soc_detach_wifi3,
  5929. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5930. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5931. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5932. .txrx_ath_getstats = dp_pdev_getstats,
  5933. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5934. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5935. .delba_process = dp_delba_process_wifi3,
  5936. .set_addba_response = dp_set_addba_response,
  5937. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5938. .flush_cache_rx_queue = NULL,
  5939. /* TODO: get API's for dscp-tid need to be added*/
  5940. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5941. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5942. .txrx_stats_request = dp_txrx_stats_request,
  5943. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5944. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  5945. .txrx_set_nac = dp_set_nac,
  5946. .txrx_get_tx_pending = dp_get_tx_pending,
  5947. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  5948. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  5949. .display_stats = dp_txrx_dump_stats,
  5950. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5951. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5952. #ifdef DP_INTR_POLL_BASED
  5953. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5954. #else
  5955. .txrx_intr_attach = dp_soc_interrupt_attach,
  5956. #endif
  5957. .txrx_intr_detach = dp_soc_interrupt_detach,
  5958. .set_pn_check = dp_set_pn_check_wifi3,
  5959. .update_config_parameters = dp_update_config_parameters,
  5960. /* TODO: Add other functions */
  5961. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5962. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5963. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5964. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  5965. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  5966. .tx_send = dp_tx_send,
  5967. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  5968. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  5969. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  5970. };
  5971. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5972. .txrx_peer_authorize = dp_peer_authorize,
  5973. #ifdef QCA_SUPPORT_SON
  5974. .txrx_set_inact_params = dp_set_inact_params,
  5975. .txrx_start_inact_timer = dp_start_inact_timer,
  5976. .txrx_set_overload = dp_set_overload,
  5977. .txrx_peer_is_inact = dp_peer_is_inact,
  5978. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5979. #endif
  5980. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5981. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5982. #ifdef MESH_MODE_SUPPORT
  5983. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5984. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5985. #endif
  5986. .txrx_set_vdev_param = dp_set_vdev_param,
  5987. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5988. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5989. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5990. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5991. .txrx_update_filter_neighbour_peers =
  5992. dp_update_filter_neighbour_peers,
  5993. .txrx_get_sec_type = dp_get_sec_type,
  5994. /* TODO: Add other functions */
  5995. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5996. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5997. #ifdef WDI_EVENT_ENABLE
  5998. .txrx_get_pldev = dp_get_pldev,
  5999. #endif
  6000. .txrx_set_pdev_param = dp_set_pdev_param,
  6001. #ifdef ATH_SUPPORT_NAC_RSSI
  6002. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6003. #endif
  6004. };
  6005. static struct cdp_me_ops dp_ops_me = {
  6006. #ifdef ATH_SUPPORT_IQUE
  6007. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6008. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6009. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6010. #endif
  6011. };
  6012. static struct cdp_mon_ops dp_ops_mon = {
  6013. .txrx_monitor_set_filter_ucast_data = NULL,
  6014. .txrx_monitor_set_filter_mcast_data = NULL,
  6015. .txrx_monitor_set_filter_non_data = NULL,
  6016. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6017. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6018. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6019. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6020. /* Added support for HK advance filter */
  6021. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6022. };
  6023. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6024. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6025. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6026. .get_htt_stats = dp_get_htt_stats,
  6027. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6028. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6029. .txrx_stats_publish = dp_txrx_stats_publish,
  6030. /* TODO */
  6031. };
  6032. static struct cdp_raw_ops dp_ops_raw = {
  6033. /* TODO */
  6034. };
  6035. #ifdef CONFIG_WIN
  6036. static struct cdp_pflow_ops dp_ops_pflow = {
  6037. /* TODO */
  6038. };
  6039. #endif /* CONFIG_WIN */
  6040. #ifdef FEATURE_RUNTIME_PM
  6041. /**
  6042. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6043. * @opaque_pdev: DP pdev context
  6044. *
  6045. * DP is ready to runtime suspend if there are no pending TX packets.
  6046. *
  6047. * Return: QDF_STATUS
  6048. */
  6049. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6050. {
  6051. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6052. struct dp_soc *soc = pdev->soc;
  6053. /* Call DP TX flow control API to check if there is any
  6054. pending packets */
  6055. if (soc->intr_mode == DP_INTR_POLL)
  6056. qdf_timer_stop(&soc->int_timer);
  6057. return QDF_STATUS_SUCCESS;
  6058. }
  6059. /**
  6060. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6061. * @opaque_pdev: DP pdev context
  6062. *
  6063. * Resume DP for runtime PM.
  6064. *
  6065. * Return: QDF_STATUS
  6066. */
  6067. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6068. {
  6069. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6070. struct dp_soc *soc = pdev->soc;
  6071. void *hal_srng;
  6072. int i;
  6073. if (soc->intr_mode == DP_INTR_POLL)
  6074. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6075. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6076. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6077. if (hal_srng) {
  6078. /* We actually only need to acquire the lock */
  6079. hal_srng_access_start(soc->hal_soc, hal_srng);
  6080. /* Update SRC ring head pointer for HW to send
  6081. all pending packets */
  6082. hal_srng_access_end(soc->hal_soc, hal_srng);
  6083. }
  6084. }
  6085. return QDF_STATUS_SUCCESS;
  6086. }
  6087. #endif /* FEATURE_RUNTIME_PM */
  6088. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6089. {
  6090. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6091. struct dp_soc *soc = pdev->soc;
  6092. if (soc->intr_mode == DP_INTR_POLL)
  6093. qdf_timer_stop(&soc->int_timer);
  6094. return QDF_STATUS_SUCCESS;
  6095. }
  6096. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6097. {
  6098. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6099. struct dp_soc *soc = pdev->soc;
  6100. if (soc->intr_mode == DP_INTR_POLL)
  6101. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6102. return QDF_STATUS_SUCCESS;
  6103. }
  6104. #ifndef CONFIG_WIN
  6105. static struct cdp_misc_ops dp_ops_misc = {
  6106. .tx_non_std = dp_tx_non_std,
  6107. .get_opmode = dp_get_opmode,
  6108. #ifdef FEATURE_RUNTIME_PM
  6109. .runtime_suspend = dp_runtime_suspend,
  6110. .runtime_resume = dp_runtime_resume,
  6111. #endif /* FEATURE_RUNTIME_PM */
  6112. .pkt_log_init = dp_pkt_log_init,
  6113. .pkt_log_con_service = dp_pkt_log_con_service,
  6114. };
  6115. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6116. /* WIFI 3.0 DP implement as required. */
  6117. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6118. .register_pause_cb = dp_txrx_register_pause_cb,
  6119. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6120. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6121. };
  6122. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6123. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6124. };
  6125. #ifdef IPA_OFFLOAD
  6126. static struct cdp_ipa_ops dp_ops_ipa = {
  6127. .ipa_get_resource = dp_ipa_get_resource,
  6128. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6129. .ipa_op_response = dp_ipa_op_response,
  6130. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6131. .ipa_get_stat = dp_ipa_get_stat,
  6132. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6133. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6134. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6135. .ipa_setup = dp_ipa_setup,
  6136. .ipa_cleanup = dp_ipa_cleanup,
  6137. .ipa_setup_iface = dp_ipa_setup_iface,
  6138. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6139. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6140. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6141. .ipa_set_perf_level = dp_ipa_set_perf_level
  6142. };
  6143. #endif
  6144. static struct cdp_bus_ops dp_ops_bus = {
  6145. .bus_suspend = dp_bus_suspend,
  6146. .bus_resume = dp_bus_resume
  6147. };
  6148. static struct cdp_ocb_ops dp_ops_ocb = {
  6149. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6150. };
  6151. static struct cdp_throttle_ops dp_ops_throttle = {
  6152. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6153. };
  6154. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6155. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6156. };
  6157. static struct cdp_cfg_ops dp_ops_cfg = {
  6158. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6159. };
  6160. /*
  6161. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6162. * @dev: physical device instance
  6163. * @peer_mac_addr: peer mac address
  6164. * @local_id: local id for the peer
  6165. * @debug_id: to track enum peer access
  6166. * Return: peer instance pointer
  6167. */
  6168. static inline void *
  6169. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6170. u8 *local_id,
  6171. enum peer_debug_id_type debug_id)
  6172. {
  6173. /*
  6174. * Currently this function does not implement the "get ref"
  6175. * functionality and is mapped to dp_find_peer_by_addr which does not
  6176. * increment the peer ref count. So the peer state is uncertain after
  6177. * calling this API. The functionality needs to be implemented.
  6178. * Accordingly the corresponding release_ref function is NULL.
  6179. */
  6180. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6181. }
  6182. static struct cdp_peer_ops dp_ops_peer = {
  6183. .register_peer = dp_register_peer,
  6184. .clear_peer = dp_clear_peer,
  6185. .find_peer_by_addr = dp_find_peer_by_addr,
  6186. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6187. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6188. .peer_release_ref = NULL,
  6189. .local_peer_id = dp_local_peer_id,
  6190. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6191. .peer_state_update = dp_peer_state_update,
  6192. .get_vdevid = dp_get_vdevid,
  6193. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6194. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6195. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6196. .get_peer_state = dp_get_peer_state,
  6197. .last_assoc_received = dp_get_last_assoc_received,
  6198. .last_disassoc_received = dp_get_last_disassoc_received,
  6199. .last_deauth_received = dp_get_last_deauth_received,
  6200. };
  6201. #endif
  6202. static struct cdp_ops dp_txrx_ops = {
  6203. .cmn_drv_ops = &dp_ops_cmn,
  6204. .ctrl_ops = &dp_ops_ctrl,
  6205. .me_ops = &dp_ops_me,
  6206. .mon_ops = &dp_ops_mon,
  6207. .host_stats_ops = &dp_ops_host_stats,
  6208. .wds_ops = &dp_ops_wds,
  6209. .raw_ops = &dp_ops_raw,
  6210. #ifdef CONFIG_WIN
  6211. .pflow_ops = &dp_ops_pflow,
  6212. #endif /* CONFIG_WIN */
  6213. #ifndef CONFIG_WIN
  6214. .misc_ops = &dp_ops_misc,
  6215. .cfg_ops = &dp_ops_cfg,
  6216. .flowctl_ops = &dp_ops_flowctl,
  6217. .l_flowctl_ops = &dp_ops_l_flowctl,
  6218. #ifdef IPA_OFFLOAD
  6219. .ipa_ops = &dp_ops_ipa,
  6220. #endif
  6221. .bus_ops = &dp_ops_bus,
  6222. .ocb_ops = &dp_ops_ocb,
  6223. .peer_ops = &dp_ops_peer,
  6224. .throttle_ops = &dp_ops_throttle,
  6225. .mob_stats_ops = &dp_ops_mob_stats,
  6226. #endif
  6227. };
  6228. /*
  6229. * dp_soc_set_txrx_ring_map()
  6230. * @dp_soc: DP handler for soc
  6231. *
  6232. * Return: Void
  6233. */
  6234. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6235. {
  6236. uint32_t i;
  6237. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6238. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6239. }
  6240. }
  6241. /*
  6242. * dp_soc_attach_wifi3() - Attach txrx SOC
  6243. * @ctrl_psoc: Opaque SOC handle from control plane
  6244. * @htc_handle: Opaque HTC handle
  6245. * @hif_handle: Opaque HIF handle
  6246. * @qdf_osdev: QDF device
  6247. *
  6248. * Return: DP SOC handle on success, NULL on failure
  6249. */
  6250. /*
  6251. * Local prototype added to temporarily address warning caused by
  6252. * -Wmissing-prototypes. A more correct solution, namely to expose
  6253. * a prototype in an appropriate header file, will come later.
  6254. */
  6255. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6256. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6257. struct ol_if_ops *ol_ops);
  6258. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6259. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6260. struct ol_if_ops *ol_ops)
  6261. {
  6262. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6263. if (!soc) {
  6264. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6265. FL("DP SOC memory allocation failed"));
  6266. goto fail0;
  6267. }
  6268. soc->cdp_soc.ops = &dp_txrx_ops;
  6269. soc->cdp_soc.ol_ops = ol_ops;
  6270. soc->ctrl_psoc = ctrl_psoc;
  6271. soc->osdev = qdf_osdev;
  6272. soc->hif_handle = hif_handle;
  6273. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6274. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6275. soc->hal_soc, qdf_osdev);
  6276. if (!soc->htt_handle) {
  6277. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6278. FL("HTT attach failed"));
  6279. goto fail1;
  6280. }
  6281. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6282. if (!soc->wlan_cfg_ctx) {
  6283. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6284. FL("wlan_cfg_soc_attach failed"));
  6285. goto fail2;
  6286. }
  6287. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6288. soc->cce_disable = false;
  6289. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6290. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6291. CDP_CFG_MAX_PEER_ID);
  6292. if (ret != -EINVAL) {
  6293. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6294. }
  6295. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6296. CDP_CFG_CCE_DISABLE);
  6297. if (ret == 1)
  6298. soc->cce_disable = true;
  6299. }
  6300. qdf_spinlock_create(&soc->peer_ref_mutex);
  6301. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6302. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6303. /* fill the tx/rx cpu ring map*/
  6304. dp_soc_set_txrx_ring_map(soc);
  6305. qdf_spinlock_create(&soc->htt_stats.lock);
  6306. /* initialize work queue for stats processing */
  6307. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6308. /*Initialize inactivity timer for wifison */
  6309. dp_init_inact_timer(soc);
  6310. return (void *)soc;
  6311. fail2:
  6312. htt_soc_detach(soc->htt_handle);
  6313. fail1:
  6314. qdf_mem_free(soc);
  6315. fail0:
  6316. return NULL;
  6317. }
  6318. /*
  6319. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6320. *
  6321. * @soc: handle to DP soc
  6322. * @mac_id: MAC id
  6323. *
  6324. * Return: Return pdev corresponding to MAC
  6325. */
  6326. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6327. {
  6328. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6329. return soc->pdev_list[mac_id];
  6330. /* Typically for MCL as there only 1 PDEV*/
  6331. return soc->pdev_list[0];
  6332. }
  6333. /*
  6334. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6335. * @soc: DP SoC context
  6336. * @max_mac_rings: No of MAC rings
  6337. *
  6338. * Return: None
  6339. */
  6340. static
  6341. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6342. int *max_mac_rings)
  6343. {
  6344. bool dbs_enable = false;
  6345. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6346. dbs_enable = soc->cdp_soc.ol_ops->
  6347. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6348. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6349. }
  6350. /*
  6351. * dp_set_pktlog_wifi3() - attach txrx vdev
  6352. * @pdev: Datapath PDEV handle
  6353. * @event: which event's notifications are being subscribed to
  6354. * @enable: WDI event subscribe or not. (True or False)
  6355. *
  6356. * Return: Success, NULL on failure
  6357. */
  6358. #ifdef WDI_EVENT_ENABLE
  6359. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6360. bool enable)
  6361. {
  6362. struct dp_soc *soc = pdev->soc;
  6363. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6364. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6365. (pdev->wlan_cfg_ctx);
  6366. uint8_t mac_id = 0;
  6367. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6368. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6369. FL("Max_mac_rings %d \n"),
  6370. max_mac_rings);
  6371. if (enable) {
  6372. switch (event) {
  6373. case WDI_EVENT_RX_DESC:
  6374. if (pdev->monitor_vdev) {
  6375. /* Nothing needs to be done if monitor mode is
  6376. * enabled
  6377. */
  6378. return 0;
  6379. }
  6380. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6381. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6382. htt_tlv_filter.mpdu_start = 1;
  6383. htt_tlv_filter.msdu_start = 1;
  6384. htt_tlv_filter.msdu_end = 1;
  6385. htt_tlv_filter.mpdu_end = 1;
  6386. htt_tlv_filter.packet_header = 1;
  6387. htt_tlv_filter.attention = 1;
  6388. htt_tlv_filter.ppdu_start = 1;
  6389. htt_tlv_filter.ppdu_end = 1;
  6390. htt_tlv_filter.ppdu_end_user_stats = 1;
  6391. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6392. htt_tlv_filter.ppdu_end_status_done = 1;
  6393. htt_tlv_filter.enable_fp = 1;
  6394. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6395. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6396. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6397. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6398. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6399. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6400. for (mac_id = 0; mac_id < max_mac_rings;
  6401. mac_id++) {
  6402. int mac_for_pdev =
  6403. dp_get_mac_id_for_pdev(mac_id,
  6404. pdev->pdev_id);
  6405. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6406. mac_for_pdev,
  6407. pdev->rxdma_mon_status_ring[mac_id]
  6408. .hal_srng,
  6409. RXDMA_MONITOR_STATUS,
  6410. RX_BUFFER_SIZE,
  6411. &htt_tlv_filter);
  6412. }
  6413. if (soc->reap_timer_init)
  6414. qdf_timer_mod(&soc->mon_reap_timer,
  6415. DP_INTR_POLL_TIMER_MS);
  6416. }
  6417. break;
  6418. case WDI_EVENT_LITE_RX:
  6419. if (pdev->monitor_vdev) {
  6420. /* Nothing needs to be done if monitor mode is
  6421. * enabled
  6422. */
  6423. return 0;
  6424. }
  6425. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6426. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6427. htt_tlv_filter.ppdu_start = 1;
  6428. htt_tlv_filter.ppdu_end = 1;
  6429. htt_tlv_filter.ppdu_end_user_stats = 1;
  6430. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6431. htt_tlv_filter.ppdu_end_status_done = 1;
  6432. htt_tlv_filter.mpdu_start = 1;
  6433. htt_tlv_filter.enable_fp = 1;
  6434. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6435. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6436. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6437. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6438. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6439. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6440. for (mac_id = 0; mac_id < max_mac_rings;
  6441. mac_id++) {
  6442. int mac_for_pdev =
  6443. dp_get_mac_id_for_pdev(mac_id,
  6444. pdev->pdev_id);
  6445. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6446. mac_for_pdev,
  6447. pdev->rxdma_mon_status_ring[mac_id]
  6448. .hal_srng,
  6449. RXDMA_MONITOR_STATUS,
  6450. RX_BUFFER_SIZE_PKTLOG_LITE,
  6451. &htt_tlv_filter);
  6452. }
  6453. if (soc->reap_timer_init)
  6454. qdf_timer_mod(&soc->mon_reap_timer,
  6455. DP_INTR_POLL_TIMER_MS);
  6456. }
  6457. break;
  6458. case WDI_EVENT_LITE_T2H:
  6459. if (pdev->monitor_vdev) {
  6460. /* Nothing needs to be done if monitor mode is
  6461. * enabled
  6462. */
  6463. return 0;
  6464. }
  6465. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6466. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6467. mac_id, pdev->pdev_id);
  6468. pdev->pktlog_ppdu_stats = true;
  6469. dp_h2t_cfg_stats_msg_send(pdev,
  6470. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6471. mac_for_pdev);
  6472. }
  6473. break;
  6474. default:
  6475. /* Nothing needs to be done for other pktlog types */
  6476. break;
  6477. }
  6478. } else {
  6479. switch (event) {
  6480. case WDI_EVENT_RX_DESC:
  6481. case WDI_EVENT_LITE_RX:
  6482. if (pdev->monitor_vdev) {
  6483. /* Nothing needs to be done if monitor mode is
  6484. * enabled
  6485. */
  6486. return 0;
  6487. }
  6488. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6489. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6490. for (mac_id = 0; mac_id < max_mac_rings;
  6491. mac_id++) {
  6492. int mac_for_pdev =
  6493. dp_get_mac_id_for_pdev(mac_id,
  6494. pdev->pdev_id);
  6495. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6496. mac_for_pdev,
  6497. pdev->rxdma_mon_status_ring[mac_id]
  6498. .hal_srng,
  6499. RXDMA_MONITOR_STATUS,
  6500. RX_BUFFER_SIZE,
  6501. &htt_tlv_filter);
  6502. }
  6503. if (soc->reap_timer_init)
  6504. qdf_timer_stop(&soc->mon_reap_timer);
  6505. }
  6506. break;
  6507. case WDI_EVENT_LITE_T2H:
  6508. if (pdev->monitor_vdev) {
  6509. /* Nothing needs to be done if monitor mode is
  6510. * enabled
  6511. */
  6512. return 0;
  6513. }
  6514. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6515. * passing value 0. Once these macros will define in htt
  6516. * header file will use proper macros
  6517. */
  6518. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6519. int mac_for_pdev =
  6520. dp_get_mac_id_for_pdev(mac_id,
  6521. pdev->pdev_id);
  6522. pdev->pktlog_ppdu_stats = false;
  6523. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6524. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6525. mac_for_pdev);
  6526. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6527. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6528. mac_for_pdev);
  6529. } else if (pdev->enhanced_stats_en) {
  6530. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6531. mac_for_pdev);
  6532. }
  6533. }
  6534. break;
  6535. default:
  6536. /* Nothing needs to be done for other pktlog types */
  6537. break;
  6538. }
  6539. }
  6540. return 0;
  6541. }
  6542. #endif
  6543. #ifdef CONFIG_MCL
  6544. /*
  6545. * dp_service_mon_rings()- timer to reap monitor rings
  6546. * reqd as we are not getting ppdu end interrupts
  6547. * @arg: SoC Handle
  6548. *
  6549. * Return:
  6550. *
  6551. */
  6552. static void dp_service_mon_rings(void *arg)
  6553. {
  6554. struct dp_soc *soc = (struct dp_soc *) arg;
  6555. int ring = 0, work_done, mac_id;
  6556. struct dp_pdev *pdev = NULL;
  6557. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6558. pdev = soc->pdev_list[ring];
  6559. if (pdev == NULL)
  6560. continue;
  6561. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6562. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6563. pdev->pdev_id);
  6564. work_done = dp_mon_process(soc, mac_for_pdev,
  6565. QCA_NAPI_BUDGET);
  6566. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6567. FL("Reaped %d descs from Monitor rings"),
  6568. work_done);
  6569. }
  6570. }
  6571. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6572. }
  6573. #ifndef REMOVE_PKT_LOG
  6574. /**
  6575. * dp_pkt_log_init() - API to initialize packet log
  6576. * @ppdev: physical device handle
  6577. * @scn: HIF context
  6578. *
  6579. * Return: none
  6580. */
  6581. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6582. {
  6583. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6584. if (handle->pkt_log_init) {
  6585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6586. "%s: Packet log not initialized", __func__);
  6587. return;
  6588. }
  6589. pktlog_sethandle(&handle->pl_dev, scn);
  6590. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6591. if (pktlogmod_init(scn)) {
  6592. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6593. "%s: pktlogmod_init failed", __func__);
  6594. handle->pkt_log_init = false;
  6595. } else {
  6596. handle->pkt_log_init = true;
  6597. }
  6598. }
  6599. /**
  6600. * dp_pkt_log_con_service() - connect packet log service
  6601. * @ppdev: physical device handle
  6602. * @scn: device context
  6603. *
  6604. * Return: none
  6605. */
  6606. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6607. {
  6608. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6609. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6610. pktlog_htc_attach();
  6611. }
  6612. /**
  6613. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6614. * @handle: Pdev handle
  6615. *
  6616. * Return: none
  6617. */
  6618. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6619. {
  6620. void *scn = (void *)handle->soc->hif_handle;
  6621. if (!scn) {
  6622. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6623. "%s: Invalid hif(scn) handle", __func__);
  6624. return;
  6625. }
  6626. pktlogmod_exit(scn);
  6627. handle->pkt_log_init = false;
  6628. }
  6629. #endif
  6630. #else
  6631. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6632. #endif