qcedev.c 73 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI CE device driver.
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. */
  7. #include <linux/mman.h>
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/types.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/kernel.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/fs.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/scatterlist.h>
  23. #include <linux/crypto.h>
  24. #include "linux/platform_data/qcom_crypto_device.h"
  25. #include "linux/qcedev.h"
  26. #include <linux/interconnect.h>
  27. #include <crypto/hash.h>
  28. #include "qcedevi.h"
  29. #include "qce.h"
  30. #include "qcedev_smmu.h"
  31. #include "compat_qcedev.h"
  32. #include <linux/compat.h>
  33. #define CACHE_LINE_SIZE 64
  34. #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
  35. #define MAX_CEHW_REQ_TRANSFER_SIZE (128*32*1024)
  36. /*
  37. * Max wait time once a crypto request is done.
  38. * Assuming 5ms per crypto operation, this is calculated for
  39. * the scenario of having 3 offload reqs + 1 tz req + buffer.
  40. */
  41. #define MAX_CRYPTO_WAIT_TIME 25
  42. #define MAX_REQUEST_TIME 5000
  43. enum qcedev_req_status {
  44. QCEDEV_REQ_CURRENT = 0,
  45. QCEDEV_REQ_WAITING = 1,
  46. QCEDEV_REQ_SUBMITTED = 2,
  47. };
  48. static uint8_t _std_init_vector_sha1_uint8[] = {
  49. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  50. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  51. 0xC3, 0xD2, 0xE1, 0xF0
  52. };
  53. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  54. static uint8_t _std_init_vector_sha256_uint8[] = {
  55. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  56. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  57. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  58. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  59. };
  60. #define QCEDEV_CTX_KEY_MASK 0x000000ff
  61. #define QCEDEV_CTX_USE_HW_KEY 0x00000001
  62. #define QCEDEV_CTX_USE_PIPE_KEY 0x00000002
  63. // Key timer expiry for pipes 1-15 (Status3)
  64. #define PIPE_KEY_TIMER_EXPIRED_STATUS3_MASK 0x000000FF
  65. // Key timer expiry for pipes 16-19 (Status6)
  66. #define PIPE_KEY_TIMER_EXPIRED_STATUS6_MASK 0x00000003
  67. // Key pause for pipes 1-15 (Status3)
  68. #define PIPE_KEY_PAUSE_STATUS3_MASK 0xFF0000
  69. // Key pause for pipes 16-19 (Status6)
  70. #define PIPE_KEY_PAUSE_STATUS6_MASK 0x30000
  71. #define QCEDEV_STATUS1_ERR_INTR_MASK 0x10
  72. static DEFINE_MUTEX(send_cmd_lock);
  73. static DEFINE_MUTEX(qcedev_sent_bw_req);
  74. static DEFINE_MUTEX(hash_access_lock);
  75. static dev_t qcedev_device_no;
  76. static struct class *driver_class;
  77. static struct device *class_dev;
  78. static const struct of_device_id qcedev_match[] = {
  79. { .compatible = "qcom,qcedev"},
  80. { .compatible = "qcom,qcedev,context-bank"},
  81. {}
  82. };
  83. MODULE_DEVICE_TABLE(of, qcedev_match);
  84. static int qcedev_control_clocks(struct qcedev_control *podev, bool enable)
  85. {
  86. unsigned int control_flag;
  87. int ret = 0;
  88. if (podev->ce_support.req_bw_before_clk) {
  89. if (enable)
  90. control_flag = QCE_BW_REQUEST_FIRST;
  91. else
  92. control_flag = QCE_CLK_DISABLE_FIRST;
  93. } else {
  94. if (enable)
  95. control_flag = QCE_CLK_ENABLE_FIRST;
  96. else
  97. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  98. }
  99. switch (control_flag) {
  100. case QCE_CLK_ENABLE_FIRST:
  101. ret = qce_enable_clk(podev->qce);
  102. if (ret) {
  103. pr_err("%s Unable enable clk\n", __func__);
  104. return ret;
  105. }
  106. ret = icc_set_bw(podev->icc_path,
  107. podev->icc_avg_bw, podev->icc_peak_bw);
  108. if (ret) {
  109. pr_err("%s Unable to set high bw\n", __func__);
  110. ret = qce_disable_clk(podev->qce);
  111. if (ret)
  112. pr_err("%s Unable disable clk\n", __func__);
  113. return ret;
  114. }
  115. break;
  116. case QCE_BW_REQUEST_FIRST:
  117. ret = icc_set_bw(podev->icc_path,
  118. podev->icc_avg_bw, podev->icc_peak_bw);
  119. if (ret) {
  120. pr_err("%s Unable to set high bw\n", __func__);
  121. return ret;
  122. }
  123. ret = qce_enable_clk(podev->qce);
  124. if (ret) {
  125. pr_err("%s Unable enable clk\n", __func__);
  126. ret = icc_set_bw(podev->icc_path, 0, 0);
  127. if (ret)
  128. pr_err("%s Unable to set low bw\n", __func__);
  129. return ret;
  130. }
  131. break;
  132. case QCE_CLK_DISABLE_FIRST:
  133. ret = qce_disable_clk(podev->qce);
  134. if (ret) {
  135. pr_err("%s Unable to disable clk\n", __func__);
  136. return ret;
  137. }
  138. ret = icc_set_bw(podev->icc_path, 0, 0);
  139. if (ret) {
  140. pr_err("%s Unable to set low bw\n", __func__);
  141. ret = qce_enable_clk(podev->qce);
  142. if (ret)
  143. pr_err("%s Unable enable clk\n", __func__);
  144. return ret;
  145. }
  146. break;
  147. case QCE_BW_REQUEST_RESET_FIRST:
  148. ret = icc_set_bw(podev->icc_path, 0, 0);
  149. if (ret) {
  150. pr_err("%s Unable to set low bw\n", __func__);
  151. return ret;
  152. }
  153. ret = qce_disable_clk(podev->qce);
  154. if (ret) {
  155. pr_err("%s Unable to disable clk\n", __func__);
  156. ret = icc_set_bw(podev->icc_path,
  157. podev->icc_avg_bw, podev->icc_peak_bw);
  158. if (ret)
  159. pr_err("%s Unable to set high bw\n", __func__);
  160. return ret;
  161. }
  162. break;
  163. default:
  164. return -ENOENT;
  165. }
  166. return 0;
  167. }
  168. static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
  169. bool high_bw_req)
  170. {
  171. int ret = 0;
  172. mutex_lock(&qcedev_sent_bw_req);
  173. if (high_bw_req) {
  174. if (podev->high_bw_req_count == 0) {
  175. ret = qcedev_control_clocks(podev, true);
  176. if (ret)
  177. goto exit_unlock_mutex;
  178. }
  179. podev->high_bw_req_count++;
  180. } else {
  181. if (podev->high_bw_req_count == 1) {
  182. ret = qcedev_control_clocks(podev, false);
  183. if (ret)
  184. goto exit_unlock_mutex;
  185. }
  186. podev->high_bw_req_count--;
  187. }
  188. exit_unlock_mutex:
  189. mutex_unlock(&qcedev_sent_bw_req);
  190. }
  191. #define QCEDEV_MAGIC 0x56434544 /* "qced" */
  192. static int qcedev_open(struct inode *inode, struct file *file);
  193. static int qcedev_release(struct inode *inode, struct file *file);
  194. static int start_cipher_req(struct qcedev_control *podev,
  195. int *current_req_info);
  196. static int start_offload_cipher_req(struct qcedev_control *podev,
  197. int *current_req_info);
  198. static int start_sha_req(struct qcedev_control *podev,
  199. int *current_req_info);
  200. static const struct file_operations qcedev_fops = {
  201. .owner = THIS_MODULE,
  202. .unlocked_ioctl = qcedev_ioctl,
  203. #ifdef CONFIG_COMPAT
  204. .compat_ioctl = compat_qcedev_ioctl,
  205. #endif
  206. .open = qcedev_open,
  207. .release = qcedev_release,
  208. };
  209. static struct qcedev_control qce_dev[] = {
  210. {
  211. .magic = QCEDEV_MAGIC,
  212. },
  213. };
  214. #define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev)
  215. #define DEBUG_MAX_FNAME 16
  216. #define DEBUG_MAX_RW_BUF 1024
  217. struct qcedev_stat {
  218. u32 qcedev_dec_success;
  219. u32 qcedev_dec_fail;
  220. u32 qcedev_enc_success;
  221. u32 qcedev_enc_fail;
  222. u32 qcedev_sha_success;
  223. u32 qcedev_sha_fail;
  224. };
  225. static struct qcedev_stat _qcedev_stat;
  226. static struct dentry *_debug_dent;
  227. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  228. static int _debug_qcedev;
  229. static struct qcedev_control *qcedev_minor_to_control(unsigned int n)
  230. {
  231. int i;
  232. for (i = 0; i < MAX_QCE_DEVICE; i++) {
  233. if (qce_dev[i].minor == n)
  234. return &qce_dev[n];
  235. }
  236. return NULL;
  237. }
  238. static int qcedev_open(struct inode *inode, struct file *file)
  239. {
  240. struct qcedev_handle *handle;
  241. struct qcedev_control *podev;
  242. podev = qcedev_minor_to_control(MINOR(inode->i_rdev));
  243. if (podev == NULL) {
  244. pr_err("%s: no such device %d\n", __func__,
  245. MINOR(inode->i_rdev));
  246. return -ENOENT;
  247. }
  248. handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL);
  249. if (handle == NULL)
  250. return -ENOMEM;
  251. handle->cntl = podev;
  252. file->private_data = handle;
  253. qcedev_ce_high_bw_req(podev, true);
  254. mutex_init(&handle->registeredbufs.lock);
  255. INIT_LIST_HEAD(&handle->registeredbufs.list);
  256. return 0;
  257. }
  258. static int qcedev_release(struct inode *inode, struct file *file)
  259. {
  260. struct qcedev_control *podev;
  261. struct qcedev_handle *handle;
  262. handle = file->private_data;
  263. podev = handle->cntl;
  264. if (podev != NULL && podev->magic != QCEDEV_MAGIC) {
  265. pr_err("%s: invalid handle %pK\n",
  266. __func__, podev);
  267. }
  268. qcedev_ce_high_bw_req(podev, false);
  269. if (qcedev_unmap_all_buffers(handle))
  270. pr_err("%s: failed to unmap all ion buffers\n", __func__);
  271. kfree_sensitive(handle);
  272. file->private_data = NULL;
  273. return 0;
  274. }
  275. static void req_done(unsigned long data)
  276. {
  277. struct qcedev_control *podev = (struct qcedev_control *)data;
  278. struct qcedev_async_req *areq;
  279. unsigned long flags = 0;
  280. struct qcedev_async_req *new_req = NULL;
  281. spin_lock_irqsave(&podev->lock, flags);
  282. areq = podev->active_command;
  283. podev->active_command = NULL;
  284. if (areq && !areq->timed_out)
  285. complete(&areq->complete);
  286. /* Look through queued requests and wake up the corresponding thread */
  287. if (!list_empty(&podev->ready_commands)) {
  288. new_req = container_of(podev->ready_commands.next,
  289. struct qcedev_async_req, list);
  290. list_del(&new_req->list);
  291. new_req->state = QCEDEV_REQ_CURRENT;
  292. wake_up_interruptible(&new_req->wait_q);
  293. }
  294. spin_unlock_irqrestore(&podev->lock, flags);
  295. }
  296. void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
  297. unsigned char *authdata, int ret)
  298. {
  299. struct qcedev_sha_req *areq;
  300. struct qcedev_control *pdev;
  301. struct qcedev_handle *handle;
  302. uint32_t *auth32 = (uint32_t *)authdata;
  303. areq = (struct qcedev_sha_req *) cookie;
  304. if (!areq || !areq->cookie)
  305. return;
  306. handle = (struct qcedev_handle *) areq->cookie;
  307. pdev = handle->cntl;
  308. if (!pdev)
  309. return;
  310. if (digest)
  311. memcpy(&handle->sha_ctxt.digest[0], digest, 32);
  312. if (authdata) {
  313. handle->sha_ctxt.auth_data[0] = auth32[0];
  314. handle->sha_ctxt.auth_data[1] = auth32[1];
  315. }
  316. tasklet_schedule(&pdev->done_tasklet);
  317. };
  318. void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
  319. unsigned char *iv, int ret)
  320. {
  321. struct qcedev_cipher_req *areq;
  322. struct qcedev_handle *handle;
  323. struct qcedev_control *podev;
  324. struct qcedev_async_req *qcedev_areq;
  325. areq = (struct qcedev_cipher_req *) cookie;
  326. if (!areq || !areq->cookie)
  327. return;
  328. handle = (struct qcedev_handle *) areq->cookie;
  329. podev = handle->cntl;
  330. if (!podev)
  331. return;
  332. qcedev_areq = podev->active_command;
  333. if (iv)
  334. memcpy(&qcedev_areq->cipher_op_req.iv[0], iv,
  335. qcedev_areq->cipher_op_req.ivlen);
  336. tasklet_schedule(&podev->done_tasklet);
  337. };
  338. static int start_cipher_req(struct qcedev_control *podev,
  339. int *current_req_info)
  340. {
  341. struct qcedev_async_req *qcedev_areq;
  342. struct qce_req creq;
  343. int ret = 0;
  344. memset(&creq, 0, sizeof(creq));
  345. /* start the command on the podev->active_command */
  346. qcedev_areq = podev->active_command;
  347. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  348. if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) {
  349. pr_err("%s: Use of PMEM is not supported\n", __func__);
  350. goto unsupported;
  351. }
  352. creq.pmem = NULL;
  353. switch (qcedev_areq->cipher_op_req.alg) {
  354. case QCEDEV_ALG_DES:
  355. creq.alg = CIPHER_ALG_DES;
  356. break;
  357. case QCEDEV_ALG_3DES:
  358. creq.alg = CIPHER_ALG_3DES;
  359. break;
  360. case QCEDEV_ALG_AES:
  361. creq.alg = CIPHER_ALG_AES;
  362. break;
  363. default:
  364. return -EINVAL;
  365. }
  366. switch (qcedev_areq->cipher_op_req.mode) {
  367. case QCEDEV_AES_MODE_CBC:
  368. case QCEDEV_DES_MODE_CBC:
  369. creq.mode = QCE_MODE_CBC;
  370. break;
  371. case QCEDEV_AES_MODE_ECB:
  372. case QCEDEV_DES_MODE_ECB:
  373. creq.mode = QCE_MODE_ECB;
  374. break;
  375. case QCEDEV_AES_MODE_CTR:
  376. creq.mode = QCE_MODE_CTR;
  377. break;
  378. case QCEDEV_AES_MODE_XTS:
  379. creq.mode = QCE_MODE_XTS;
  380. break;
  381. default:
  382. return -EINVAL;
  383. }
  384. if ((creq.alg == CIPHER_ALG_AES) &&
  385. (creq.mode == QCE_MODE_CTR)) {
  386. creq.dir = QCE_ENCRYPT;
  387. } else {
  388. if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC)
  389. creq.dir = QCE_ENCRYPT;
  390. else
  391. creq.dir = QCE_DECRYPT;
  392. }
  393. creq.iv = &qcedev_areq->cipher_op_req.iv[0];
  394. creq.ivsize = qcedev_areq->cipher_op_req.ivlen;
  395. creq.iv_ctr_size = 0;
  396. creq.enckey = &qcedev_areq->cipher_op_req.enckey[0];
  397. creq.encklen = qcedev_areq->cipher_op_req.encklen;
  398. creq.cryptlen = qcedev_areq->cipher_op_req.data_len;
  399. if (qcedev_areq->cipher_op_req.encklen == 0) {
  400. if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY)
  401. || (qcedev_areq->cipher_op_req.op ==
  402. QCEDEV_OPER_DEC_NO_KEY))
  403. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  404. else {
  405. int i;
  406. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  407. if (qcedev_areq->cipher_op_req.enckey[i] != 0)
  408. break;
  409. }
  410. if ((podev->platform_support.hw_key_support == 1) &&
  411. (i == QCEDEV_MAX_KEY_SIZE))
  412. creq.op = QCE_REQ_ABLK_CIPHER;
  413. else {
  414. ret = -EINVAL;
  415. goto unsupported;
  416. }
  417. }
  418. } else {
  419. creq.op = QCE_REQ_ABLK_CIPHER;
  420. }
  421. creq.qce_cb = qcedev_cipher_req_cb;
  422. creq.areq = (void *)&qcedev_areq->cipher_req;
  423. creq.flags = 0;
  424. creq.offload_op = QCE_OFFLOAD_NONE;
  425. ret = qce_ablk_cipher_req(podev->qce, &creq);
  426. *current_req_info = creq.current_req_info;
  427. unsupported:
  428. qcedev_areq->err = ret ? -ENXIO : 0;
  429. return ret;
  430. };
  431. void qcedev_offload_cipher_req_cb(void *cookie, unsigned char *icv,
  432. unsigned char *iv, int ret)
  433. {
  434. struct qcedev_cipher_req *areq;
  435. struct qcedev_handle *handle;
  436. struct qcedev_control *podev;
  437. struct qcedev_async_req *qcedev_areq;
  438. areq = (struct qcedev_cipher_req *) cookie;
  439. if (!areq || !areq->cookie)
  440. return;
  441. handle = (struct qcedev_handle *) areq->cookie;
  442. podev = handle->cntl;
  443. if (!podev)
  444. return;
  445. qcedev_areq = podev->active_command;
  446. if (iv)
  447. memcpy(&qcedev_areq->offload_cipher_op_req.iv[0], iv,
  448. qcedev_areq->offload_cipher_op_req.ivlen);
  449. tasklet_schedule(&podev->done_tasklet);
  450. }
  451. static int start_offload_cipher_req(struct qcedev_control *podev,
  452. int *current_req_info)
  453. {
  454. struct qcedev_async_req *qcedev_areq;
  455. struct qce_req creq;
  456. u8 patt_sz = 0, proc_data_sz = 0;
  457. int ret = 0;
  458. memset(&creq, 0, sizeof(creq));
  459. /* Start the command on the podev->active_command */
  460. qcedev_areq = podev->active_command;
  461. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  462. switch (qcedev_areq->offload_cipher_op_req.alg) {
  463. case QCEDEV_ALG_AES:
  464. creq.alg = CIPHER_ALG_AES;
  465. break;
  466. default:
  467. return -EINVAL;
  468. }
  469. switch (qcedev_areq->offload_cipher_op_req.mode) {
  470. case QCEDEV_AES_MODE_CBC:
  471. creq.mode = QCE_MODE_CBC;
  472. break;
  473. case QCEDEV_AES_MODE_CTR:
  474. creq.mode = QCE_MODE_CTR;
  475. break;
  476. default:
  477. return -EINVAL;
  478. }
  479. if (qcedev_areq->offload_cipher_op_req.is_copy_op) {
  480. creq.dir = QCE_ENCRYPT;
  481. } else {
  482. switch(qcedev_areq->offload_cipher_op_req.op) {
  483. case QCEDEV_OFFLOAD_HLOS_HLOS:
  484. case QCEDEV_OFFLOAD_HLOS_CPB:
  485. creq.dir = QCE_DECRYPT;
  486. break;
  487. case QCEDEV_OFFLOAD_CPB_HLOS:
  488. creq.dir = QCE_ENCRYPT;
  489. break;
  490. default:
  491. return -EINVAL;
  492. }
  493. }
  494. creq.iv = &qcedev_areq->offload_cipher_op_req.iv[0];
  495. creq.ivsize = qcedev_areq->offload_cipher_op_req.ivlen;
  496. creq.iv_ctr_size = qcedev_areq->offload_cipher_op_req.iv_ctr_size;
  497. creq.encklen = qcedev_areq->offload_cipher_op_req.encklen;
  498. /* OFFLOAD use cases use PIPE keys so no need to set keys */
  499. creq.flags = QCEDEV_CTX_USE_PIPE_KEY;
  500. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  501. creq.offload_op = (int)qcedev_areq->offload_cipher_op_req.op;
  502. if (qcedev_areq->offload_cipher_op_req.is_copy_op)
  503. creq.is_copy_op = true;
  504. creq.cryptlen = qcedev_areq->offload_cipher_op_req.data_len;
  505. creq.qce_cb = qcedev_offload_cipher_req_cb;
  506. creq.areq = (void *)&qcedev_areq->cipher_req;
  507. patt_sz = qcedev_areq->offload_cipher_op_req.pattern_info.patt_sz;
  508. proc_data_sz =
  509. qcedev_areq->offload_cipher_op_req.pattern_info.proc_data_sz;
  510. creq.is_pattern_valid =
  511. qcedev_areq->offload_cipher_op_req.is_pattern_valid;
  512. if (creq.is_pattern_valid) {
  513. creq.pattern_info = 0x1;
  514. if (patt_sz)
  515. creq.pattern_info |= (patt_sz - 1) << 4;
  516. if (proc_data_sz)
  517. creq.pattern_info |= (proc_data_sz - 1) << 8;
  518. creq.pattern_info |=
  519. qcedev_areq->offload_cipher_op_req.pattern_info.patt_offset << 12;
  520. }
  521. creq.block_offset = qcedev_areq->offload_cipher_op_req.block_offset;
  522. ret = qce_ablk_cipher_req(podev->qce, &creq);
  523. *current_req_info = creq.current_req_info;
  524. qcedev_areq->err = ret ? -ENXIO : 0;
  525. return ret;
  526. }
  527. static int start_sha_req(struct qcedev_control *podev,
  528. int *current_req_info)
  529. {
  530. struct qcedev_async_req *qcedev_areq;
  531. struct qce_sha_req sreq;
  532. int ret = 0;
  533. struct qcedev_handle *handle;
  534. /* start the command on the podev->active_command */
  535. qcedev_areq = podev->active_command;
  536. handle = qcedev_areq->handle;
  537. switch (qcedev_areq->sha_op_req.alg) {
  538. case QCEDEV_ALG_SHA1:
  539. sreq.alg = QCE_HASH_SHA1;
  540. break;
  541. case QCEDEV_ALG_SHA256:
  542. sreq.alg = QCE_HASH_SHA256;
  543. break;
  544. case QCEDEV_ALG_SHA1_HMAC:
  545. if (podev->ce_support.sha_hmac) {
  546. sreq.alg = QCE_HASH_SHA1_HMAC;
  547. sreq.authkey = &handle->sha_ctxt.authkey[0];
  548. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  549. } else {
  550. sreq.alg = QCE_HASH_SHA1;
  551. sreq.authkey = NULL;
  552. }
  553. break;
  554. case QCEDEV_ALG_SHA256_HMAC:
  555. if (podev->ce_support.sha_hmac) {
  556. sreq.alg = QCE_HASH_SHA256_HMAC;
  557. sreq.authkey = &handle->sha_ctxt.authkey[0];
  558. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  559. } else {
  560. sreq.alg = QCE_HASH_SHA256;
  561. sreq.authkey = NULL;
  562. }
  563. break;
  564. case QCEDEV_ALG_AES_CMAC:
  565. sreq.alg = QCE_HASH_AES_CMAC;
  566. sreq.authkey = &handle->sha_ctxt.authkey[0];
  567. sreq.authklen = qcedev_areq->sha_op_req.authklen;
  568. break;
  569. default:
  570. pr_err("Algorithm %d not supported, exiting\n",
  571. qcedev_areq->sha_op_req.alg);
  572. return -EINVAL;
  573. }
  574. qcedev_areq->sha_req.cookie = handle;
  575. sreq.qce_cb = qcedev_sha_req_cb;
  576. if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) {
  577. sreq.auth_data[0] = handle->sha_ctxt.auth_data[0];
  578. sreq.auth_data[1] = handle->sha_ctxt.auth_data[1];
  579. sreq.auth_data[2] = handle->sha_ctxt.auth_data[2];
  580. sreq.auth_data[3] = handle->sha_ctxt.auth_data[3];
  581. sreq.digest = &handle->sha_ctxt.digest[0];
  582. sreq.first_blk = handle->sha_ctxt.first_blk;
  583. sreq.last_blk = handle->sha_ctxt.last_blk;
  584. }
  585. sreq.size = qcedev_areq->sha_req.sreq.nbytes;
  586. sreq.src = qcedev_areq->sha_req.sreq.src;
  587. sreq.areq = (void *)&qcedev_areq->sha_req;
  588. sreq.flags = 0;
  589. ret = qce_process_sha_req(podev->qce, &sreq);
  590. *current_req_info = sreq.current_req_info;
  591. qcedev_areq->err = ret ? -ENXIO : 0;
  592. return ret;
  593. };
  594. static void qcedev_check_crypto_status(
  595. struct qcedev_async_req *qcedev_areq, void *handle,
  596. bool print_err)
  597. {
  598. unsigned int s1, s2, s3, s4, s5, s6;
  599. qcedev_areq->offload_cipher_op_req.err = QCEDEV_OFFLOAD_NO_ERROR;
  600. qce_get_crypto_status(handle, &s1, &s2, &s3, &s4, &s5, &s6);
  601. if (print_err) {
  602. pr_err("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  603. s1, s2, s3, s4, s5, s6);
  604. }
  605. // Check for key timer expiry
  606. if ((s6 & PIPE_KEY_TIMER_EXPIRED_STATUS6_MASK) ||
  607. (s3 & PIPE_KEY_TIMER_EXPIRED_STATUS3_MASK)) {
  608. pr_info("%s: crypto timer expired\n", __func__);
  609. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  610. s1, s2, s3, s4, s5, s6);
  611. qcedev_areq->offload_cipher_op_req.err =
  612. QCEDEV_OFFLOAD_KEY_TIMER_EXPIRED_ERROR;
  613. return;
  614. }
  615. // Check for key pause
  616. if ((s6 & PIPE_KEY_PAUSE_STATUS6_MASK) ||
  617. (s3 & PIPE_KEY_PAUSE_STATUS3_MASK)) {
  618. pr_info("%s: crypto key paused\n", __func__);
  619. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  620. s1, s2, s3, s4, s5, s6);
  621. qcedev_areq->offload_cipher_op_req.err =
  622. QCEDEV_OFFLOAD_KEY_PAUSE_ERROR;
  623. return;
  624. }
  625. // Check for generic error
  626. if (s1 & QCEDEV_STATUS1_ERR_INTR_MASK) {
  627. pr_err("%s: generic crypto error\n", __func__);
  628. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  629. s1, s2, s3, s4, s5, s6);
  630. qcedev_areq->offload_cipher_op_req.err =
  631. QCEDEV_OFFLOAD_GENERIC_ERROR;
  632. return;
  633. }
  634. }
  635. static int submit_req(struct qcedev_async_req *qcedev_areq,
  636. struct qcedev_handle *handle)
  637. {
  638. struct qcedev_control *podev;
  639. unsigned long flags = 0;
  640. int ret = 0;
  641. struct qcedev_stat *pstat;
  642. int current_req_info = 0;
  643. int wait = MAX_CRYPTO_WAIT_TIME;
  644. bool print_sts = false;
  645. struct qcedev_async_req *new_req = NULL;
  646. qcedev_areq->err = 0;
  647. podev = handle->cntl;
  648. init_waitqueue_head(&qcedev_areq->wait_q);
  649. spin_lock_irqsave(&podev->lock, flags);
  650. /*
  651. * Service only one crypto request at a time.
  652. * Any other new requests are queued in ready_commands and woken up
  653. * only when the active command has finished successfully or when the
  654. * request times out or when the command failed when setting up.
  655. */
  656. do {
  657. if (podev->active_command == NULL) {
  658. podev->active_command = qcedev_areq;
  659. qcedev_areq->state = QCEDEV_REQ_SUBMITTED;
  660. switch (qcedev_areq->op_type) {
  661. case QCEDEV_CRYPTO_OPER_CIPHER:
  662. ret = start_cipher_req(podev,
  663. &current_req_info);
  664. break;
  665. case QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER:
  666. ret = start_offload_cipher_req(podev,
  667. &current_req_info);
  668. break;
  669. default:
  670. ret = start_sha_req(podev,
  671. &current_req_info);
  672. break;
  673. }
  674. } else {
  675. list_add_tail(&qcedev_areq->list,
  676. &podev->ready_commands);
  677. qcedev_areq->state = QCEDEV_REQ_WAITING;
  678. if (wait_event_interruptible_lock_irq_timeout(
  679. qcedev_areq->wait_q,
  680. (qcedev_areq->state == QCEDEV_REQ_CURRENT),
  681. podev->lock,
  682. msecs_to_jiffies(MAX_REQUEST_TIME)) == 0) {
  683. pr_err("%s: request timed out\n", __func__);
  684. spin_unlock_irqrestore(&podev->lock, flags);
  685. return qcedev_areq->err;
  686. }
  687. }
  688. } while (qcedev_areq->state != QCEDEV_REQ_SUBMITTED);
  689. if (ret != 0) {
  690. podev->active_command = NULL;
  691. /*
  692. * Look through queued requests and wake up the corresponding
  693. * thread.
  694. */
  695. if (!list_empty(&podev->ready_commands)) {
  696. new_req = container_of(podev->ready_commands.next,
  697. struct qcedev_async_req, list);
  698. list_del(&new_req->list);
  699. new_req->state = QCEDEV_REQ_CURRENT;
  700. wake_up_interruptible(&new_req->wait_q);
  701. }
  702. }
  703. spin_unlock_irqrestore(&podev->lock, flags);
  704. qcedev_areq->timed_out = false;
  705. if (ret == 0)
  706. wait = wait_for_completion_timeout(&qcedev_areq->complete,
  707. msecs_to_jiffies(MAX_CRYPTO_WAIT_TIME));
  708. if (!wait) {
  709. /*
  710. * This means wait timed out, and the callback routine was not
  711. * exercised. The callback sequence does some housekeeping which
  712. * would be missed here, hence having a call to qce here to do
  713. * that.
  714. */
  715. pr_err("%s: wait timed out, req info = %d\n", __func__,
  716. current_req_info);
  717. print_sts = true;
  718. spin_lock_irqsave(&podev->lock, flags);
  719. qcedev_check_crypto_status(qcedev_areq, podev->qce, print_sts);
  720. qcedev_areq->timed_out = true;
  721. ret = qce_manage_timeout(podev->qce, current_req_info);
  722. if (ret) {
  723. pr_err("%s: error during manage timeout", __func__);
  724. qcedev_areq->err = -EIO;
  725. spin_unlock_irqrestore(&podev->lock, flags);
  726. return qcedev_areq->err;
  727. }
  728. spin_unlock_irqrestore(&podev->lock, flags);
  729. tasklet_schedule(&podev->done_tasklet);
  730. if (qcedev_areq->offload_cipher_op_req.err !=
  731. QCEDEV_OFFLOAD_NO_ERROR)
  732. return 0;
  733. }
  734. if (ret)
  735. qcedev_areq->err = -EIO;
  736. pstat = &_qcedev_stat;
  737. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) {
  738. switch (qcedev_areq->cipher_op_req.op) {
  739. case QCEDEV_OPER_DEC:
  740. if (qcedev_areq->err)
  741. pstat->qcedev_dec_fail++;
  742. else
  743. pstat->qcedev_dec_success++;
  744. break;
  745. case QCEDEV_OPER_ENC:
  746. if (qcedev_areq->err)
  747. pstat->qcedev_enc_fail++;
  748. else
  749. pstat->qcedev_enc_success++;
  750. break;
  751. default:
  752. break;
  753. }
  754. } else if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER) {
  755. //Do nothing
  756. } else {
  757. if (qcedev_areq->err)
  758. pstat->qcedev_sha_fail++;
  759. else
  760. pstat->qcedev_sha_success++;
  761. }
  762. return qcedev_areq->err;
  763. }
  764. static int qcedev_sha_init(struct qcedev_async_req *areq,
  765. struct qcedev_handle *handle)
  766. {
  767. struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt;
  768. memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt));
  769. sha_ctxt->first_blk = 1;
  770. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  771. (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) {
  772. memcpy(&sha_ctxt->digest[0],
  773. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  774. sha_ctxt->diglen = SHA1_DIGEST_SIZE;
  775. } else {
  776. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) ||
  777. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) {
  778. memcpy(&sha_ctxt->digest[0],
  779. &_std_init_vector_sha256_uint8[0],
  780. SHA256_DIGEST_SIZE);
  781. sha_ctxt->diglen = SHA256_DIGEST_SIZE;
  782. }
  783. }
  784. sha_ctxt->init_done = true;
  785. return 0;
  786. }
  787. static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq,
  788. struct qcedev_handle *handle,
  789. struct scatterlist *sg_src)
  790. {
  791. int err = 0;
  792. int i = 0;
  793. uint32_t total;
  794. uint8_t *user_src = NULL;
  795. uint8_t *k_src = NULL;
  796. uint8_t *k_buf_src = NULL;
  797. uint32_t buf_size = 0;
  798. uint8_t *k_align_src = NULL;
  799. uint32_t sha_pad_len = 0;
  800. uint32_t trailing_buf_len = 0;
  801. uint32_t t_buf = handle->sha_ctxt.trailing_buf_len;
  802. uint32_t sha_block_size;
  803. total = qcedev_areq->sha_op_req.data_len + t_buf;
  804. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1)
  805. sha_block_size = SHA1_BLOCK_SIZE;
  806. else
  807. sha_block_size = SHA256_BLOCK_SIZE;
  808. if (total <= sha_block_size) {
  809. uint32_t len = qcedev_areq->sha_op_req.data_len;
  810. i = 0;
  811. k_src = &handle->sha_ctxt.trailing_buf[t_buf];
  812. /* Copy data from user src(s) */
  813. while (len > 0) {
  814. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  815. if (user_src && copy_from_user(k_src,
  816. (void __user *)user_src,
  817. qcedev_areq->sha_op_req.data[i].len))
  818. return -EFAULT;
  819. len -= qcedev_areq->sha_op_req.data[i].len;
  820. k_src += qcedev_areq->sha_op_req.data[i].len;
  821. i++;
  822. }
  823. handle->sha_ctxt.trailing_buf_len = total;
  824. return 0;
  825. }
  826. buf_size = total + CACHE_LINE_SIZE * 2;
  827. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  828. if (k_buf_src == NULL)
  829. return -ENOMEM;
  830. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  831. CACHE_LINE_SIZE);
  832. k_src = k_align_src;
  833. /* check for trailing buffer from previous updates and append it */
  834. if (t_buf > 0) {
  835. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  836. t_buf);
  837. k_src += t_buf;
  838. }
  839. /* Copy data from user src(s) */
  840. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  841. if (user_src && copy_from_user(k_src,
  842. (void __user *)user_src,
  843. qcedev_areq->sha_op_req.data[0].len)) {
  844. memset(k_buf_src, 0, buf_size);
  845. kfree(k_buf_src);
  846. return -EFAULT;
  847. }
  848. k_src += qcedev_areq->sha_op_req.data[0].len;
  849. for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) {
  850. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  851. if (user_src && copy_from_user(k_src,
  852. (void __user *)user_src,
  853. qcedev_areq->sha_op_req.data[i].len)) {
  854. memset(k_buf_src, 0, buf_size);
  855. kfree(k_buf_src);
  856. return -EFAULT;
  857. }
  858. k_src += qcedev_areq->sha_op_req.data[i].len;
  859. }
  860. /* get new trailing buffer */
  861. sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total;
  862. trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len;
  863. qcedev_areq->sha_req.sreq.src = sg_src;
  864. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src,
  865. total-trailing_buf_len);
  866. qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len;
  867. /* update sha_ctxt trailing buf content to new trailing buf */
  868. if (trailing_buf_len > 0) {
  869. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  870. memcpy(&handle->sha_ctxt.trailing_buf[0],
  871. (k_src - trailing_buf_len),
  872. trailing_buf_len);
  873. }
  874. handle->sha_ctxt.trailing_buf_len = trailing_buf_len;
  875. err = submit_req(qcedev_areq, handle);
  876. handle->sha_ctxt.last_blk = 0;
  877. handle->sha_ctxt.first_blk = 0;
  878. memset(k_buf_src, 0, buf_size);
  879. kfree(k_buf_src);
  880. return err;
  881. }
  882. static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq,
  883. struct qcedev_handle *handle,
  884. struct scatterlist *sg_src)
  885. {
  886. int err = 0;
  887. int i = 0;
  888. int j = 0;
  889. int k = 0;
  890. int num_entries = 0;
  891. uint32_t total = 0;
  892. if (!handle->sha_ctxt.init_done) {
  893. pr_err("%s Init was not called\n", __func__);
  894. return -EINVAL;
  895. }
  896. if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) {
  897. struct qcedev_sha_op_req *saved_req;
  898. struct qcedev_sha_op_req req;
  899. struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req;
  900. uint32_t req_size = 0;
  901. req_size = sizeof(struct qcedev_sha_op_req);
  902. /* save the original req structure */
  903. saved_req =
  904. kmalloc(req_size, GFP_KERNEL);
  905. if (saved_req == NULL) {
  906. pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n",
  907. __func__, (uintptr_t)saved_req);
  908. return -ENOMEM;
  909. }
  910. memcpy(&req, sreq, sizeof(*sreq));
  911. memcpy(saved_req, sreq, sizeof(*sreq));
  912. i = 0;
  913. /* Address 32 KB at a time */
  914. while ((i < req.entries) && (err == 0)) {
  915. if (sreq->data[i].len > QCE_MAX_OPER_DATA) {
  916. sreq->data[0].len = QCE_MAX_OPER_DATA;
  917. if (i > 0) {
  918. sreq->data[0].vaddr =
  919. sreq->data[i].vaddr;
  920. }
  921. sreq->data_len = QCE_MAX_OPER_DATA;
  922. sreq->entries = 1;
  923. err = qcedev_sha_update_max_xfer(qcedev_areq,
  924. handle, sg_src);
  925. sreq->data[i].len = req.data[i].len -
  926. QCE_MAX_OPER_DATA;
  927. sreq->data[i].vaddr = req.data[i].vaddr +
  928. QCE_MAX_OPER_DATA;
  929. req.data[i].vaddr = sreq->data[i].vaddr;
  930. req.data[i].len = sreq->data[i].len;
  931. } else {
  932. total = 0;
  933. for (j = i; j < req.entries; j++) {
  934. num_entries++;
  935. if ((total + sreq->data[j].len) >=
  936. QCE_MAX_OPER_DATA) {
  937. sreq->data[j].len =
  938. (QCE_MAX_OPER_DATA - total);
  939. total = QCE_MAX_OPER_DATA;
  940. break;
  941. }
  942. total += sreq->data[j].len;
  943. }
  944. sreq->data_len = total;
  945. if (i > 0)
  946. for (k = 0; k < num_entries; k++) {
  947. sreq->data[k].len =
  948. sreq->data[i+k].len;
  949. sreq->data[k].vaddr =
  950. sreq->data[i+k].vaddr;
  951. }
  952. sreq->entries = num_entries;
  953. i = j;
  954. err = qcedev_sha_update_max_xfer(qcedev_areq,
  955. handle, sg_src);
  956. num_entries = 0;
  957. sreq->data[i].vaddr = req.data[i].vaddr +
  958. sreq->data[i].len;
  959. sreq->data[i].len = req.data[i].len -
  960. sreq->data[i].len;
  961. req.data[i].vaddr = sreq->data[i].vaddr;
  962. req.data[i].len = sreq->data[i].len;
  963. if (sreq->data[i].len == 0)
  964. i++;
  965. }
  966. } /* end of while ((i < req.entries) && (err == 0)) */
  967. /* Restore the original req structure */
  968. for (i = 0; i < saved_req->entries; i++) {
  969. sreq->data[i].len = saved_req->data[i].len;
  970. sreq->data[i].vaddr = saved_req->data[i].vaddr;
  971. }
  972. sreq->entries = saved_req->entries;
  973. sreq->data_len = saved_req->data_len;
  974. memset(saved_req, 0, req_size);
  975. kfree(saved_req);
  976. } else
  977. err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src);
  978. return err;
  979. }
  980. static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq,
  981. struct qcedev_handle *handle)
  982. {
  983. int err = 0;
  984. struct scatterlist sg_src;
  985. uint32_t total;
  986. uint8_t *k_buf_src = NULL;
  987. uint32_t buf_size = 0;
  988. uint8_t *k_align_src = NULL;
  989. if (!handle->sha_ctxt.init_done) {
  990. pr_err("%s Init was not called\n", __func__);
  991. return -EINVAL;
  992. }
  993. handle->sha_ctxt.last_blk = 1;
  994. total = handle->sha_ctxt.trailing_buf_len;
  995. buf_size = total + CACHE_LINE_SIZE * 2;
  996. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  997. if (k_buf_src == NULL)
  998. return -ENOMEM;
  999. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1000. CACHE_LINE_SIZE);
  1001. memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total);
  1002. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  1003. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src, total);
  1004. qcedev_areq->sha_req.sreq.nbytes = total;
  1005. err = submit_req(qcedev_areq, handle);
  1006. handle->sha_ctxt.first_blk = 0;
  1007. handle->sha_ctxt.last_blk = 0;
  1008. handle->sha_ctxt.auth_data[0] = 0;
  1009. handle->sha_ctxt.auth_data[1] = 0;
  1010. handle->sha_ctxt.trailing_buf_len = 0;
  1011. handle->sha_ctxt.init_done = false;
  1012. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  1013. memset(k_buf_src, 0, buf_size);
  1014. kfree(k_buf_src);
  1015. qcedev_areq->sha_req.sreq.src = NULL;
  1016. return err;
  1017. }
  1018. static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq,
  1019. struct qcedev_handle *handle,
  1020. struct scatterlist *sg_src)
  1021. {
  1022. int err = 0;
  1023. int i = 0;
  1024. uint32_t total;
  1025. uint8_t *user_src = NULL;
  1026. uint8_t *k_src = NULL;
  1027. uint8_t *k_buf_src = NULL;
  1028. uint32_t buf_size = 0;
  1029. total = qcedev_areq->sha_op_req.data_len;
  1030. if ((qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_128) &&
  1031. (qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_256)) {
  1032. pr_err("%s: unsupported key length\n", __func__);
  1033. return -EINVAL;
  1034. }
  1035. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  1036. (void __user *)qcedev_areq->sha_op_req.authkey,
  1037. qcedev_areq->sha_op_req.authklen))
  1038. return -EFAULT;
  1039. if (total > U32_MAX - CACHE_LINE_SIZE * 2)
  1040. return -EINVAL;
  1041. buf_size = total + CACHE_LINE_SIZE * 2;
  1042. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  1043. if (k_buf_src == NULL)
  1044. return -ENOMEM;
  1045. k_src = k_buf_src;
  1046. /* Copy data from user src(s) */
  1047. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  1048. for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) {
  1049. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  1050. if (user_src && copy_from_user(k_src, (void __user *)user_src,
  1051. qcedev_areq->sha_op_req.data[i].len)) {
  1052. memset(k_buf_src, 0, buf_size);
  1053. kfree(k_buf_src);
  1054. return -EFAULT;
  1055. }
  1056. k_src += qcedev_areq->sha_op_req.data[i].len;
  1057. }
  1058. qcedev_areq->sha_req.sreq.src = sg_src;
  1059. sg_init_one(qcedev_areq->sha_req.sreq.src, k_buf_src, total);
  1060. qcedev_areq->sha_req.sreq.nbytes = total;
  1061. handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen;
  1062. err = submit_req(qcedev_areq, handle);
  1063. memset(k_buf_src, 0, buf_size);
  1064. kfree(k_buf_src);
  1065. return err;
  1066. }
  1067. static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq,
  1068. struct qcedev_handle *handle,
  1069. struct scatterlist *sg_src)
  1070. {
  1071. int err = 0;
  1072. if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) {
  1073. qcedev_sha_init(areq, handle);
  1074. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  1075. (void __user *)areq->sha_op_req.authkey,
  1076. areq->sha_op_req.authklen))
  1077. return -EFAULT;
  1078. } else {
  1079. struct qcedev_async_req authkey_areq;
  1080. uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
  1081. init_completion(&authkey_areq.complete);
  1082. authkey_areq.sha_op_req.entries = 1;
  1083. authkey_areq.sha_op_req.data[0].vaddr =
  1084. areq->sha_op_req.authkey;
  1085. authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen;
  1086. authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen;
  1087. authkey_areq.sha_op_req.diglen = 0;
  1088. authkey_areq.handle = handle;
  1089. memset(&authkey_areq.sha_op_req.digest[0], 0,
  1090. QCEDEV_MAX_SHA_DIGEST);
  1091. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1092. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1;
  1093. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)
  1094. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256;
  1095. authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1096. qcedev_sha_init(&authkey_areq, handle);
  1097. err = qcedev_sha_update(&authkey_areq, handle, sg_src);
  1098. if (!err)
  1099. err = qcedev_sha_final(&authkey_areq, handle);
  1100. else
  1101. return err;
  1102. memcpy(&authkey[0], &handle->sha_ctxt.digest[0],
  1103. handle->sha_ctxt.diglen);
  1104. qcedev_sha_init(areq, handle);
  1105. memcpy(&handle->sha_ctxt.authkey[0], &authkey[0],
  1106. handle->sha_ctxt.diglen);
  1107. }
  1108. return err;
  1109. }
  1110. static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq,
  1111. struct qcedev_handle *handle)
  1112. {
  1113. int err = 0;
  1114. struct scatterlist sg_src;
  1115. uint8_t *k_src = NULL;
  1116. uint32_t sha_block_size = 0;
  1117. uint32_t sha_digest_size = 0;
  1118. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1119. sha_digest_size = SHA1_DIGEST_SIZE;
  1120. sha_block_size = SHA1_BLOCK_SIZE;
  1121. } else {
  1122. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1123. sha_digest_size = SHA256_DIGEST_SIZE;
  1124. sha_block_size = SHA256_BLOCK_SIZE;
  1125. }
  1126. }
  1127. k_src = kmalloc(sha_block_size, GFP_KERNEL);
  1128. if (k_src == NULL)
  1129. return -ENOMEM;
  1130. /* check for trailing buffer from previous updates and append it */
  1131. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  1132. handle->sha_ctxt.trailing_buf_len);
  1133. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  1134. sg_init_one(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size);
  1135. qcedev_areq->sha_req.sreq.nbytes = sha_block_size;
  1136. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1137. memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0],
  1138. sha_digest_size);
  1139. handle->sha_ctxt.trailing_buf_len = sha_digest_size;
  1140. handle->sha_ctxt.first_blk = 1;
  1141. handle->sha_ctxt.last_blk = 0;
  1142. handle->sha_ctxt.auth_data[0] = 0;
  1143. handle->sha_ctxt.auth_data[1] = 0;
  1144. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1145. memcpy(&handle->sha_ctxt.digest[0],
  1146. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  1147. handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE;
  1148. }
  1149. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1150. memcpy(&handle->sha_ctxt.digest[0],
  1151. &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE);
  1152. handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE;
  1153. }
  1154. err = submit_req(qcedev_areq, handle);
  1155. handle->sha_ctxt.last_blk = 0;
  1156. handle->sha_ctxt.first_blk = 0;
  1157. memset(k_src, 0, sha_block_size);
  1158. kfree(k_src);
  1159. qcedev_areq->sha_req.sreq.src = NULL;
  1160. return err;
  1161. }
  1162. static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq,
  1163. struct qcedev_handle *handle, bool ikey)
  1164. {
  1165. int i;
  1166. uint32_t constant;
  1167. uint32_t sha_block_size;
  1168. if (ikey)
  1169. constant = 0x36;
  1170. else
  1171. constant = 0x5c;
  1172. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1173. sha_block_size = SHA1_BLOCK_SIZE;
  1174. else
  1175. sha_block_size = SHA256_BLOCK_SIZE;
  1176. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1177. for (i = 0; i < sha_block_size; i++)
  1178. handle->sha_ctxt.trailing_buf[i] =
  1179. (handle->sha_ctxt.authkey[i] ^ constant);
  1180. handle->sha_ctxt.trailing_buf_len = sha_block_size;
  1181. return 0;
  1182. }
  1183. static int qcedev_hmac_init(struct qcedev_async_req *areq,
  1184. struct qcedev_handle *handle,
  1185. struct scatterlist *sg_src)
  1186. {
  1187. int err;
  1188. struct qcedev_control *podev = handle->cntl;
  1189. err = qcedev_set_hmac_auth_key(areq, handle, sg_src);
  1190. if (err)
  1191. return err;
  1192. if (!podev->ce_support.sha_hmac)
  1193. qcedev_hmac_update_iokey(areq, handle, true);
  1194. return 0;
  1195. }
  1196. static int qcedev_hmac_final(struct qcedev_async_req *areq,
  1197. struct qcedev_handle *handle)
  1198. {
  1199. int err;
  1200. struct qcedev_control *podev = handle->cntl;
  1201. err = qcedev_sha_final(areq, handle);
  1202. if (podev->ce_support.sha_hmac)
  1203. return err;
  1204. qcedev_hmac_update_iokey(areq, handle, false);
  1205. err = qcedev_hmac_get_ohash(areq, handle);
  1206. if (err)
  1207. return err;
  1208. err = qcedev_sha_final(areq, handle);
  1209. return err;
  1210. }
  1211. static int qcedev_hash_init(struct qcedev_async_req *areq,
  1212. struct qcedev_handle *handle,
  1213. struct scatterlist *sg_src)
  1214. {
  1215. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1216. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1217. return qcedev_sha_init(areq, handle);
  1218. else
  1219. return qcedev_hmac_init(areq, handle, sg_src);
  1220. }
  1221. static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq,
  1222. struct qcedev_handle *handle,
  1223. struct scatterlist *sg_src)
  1224. {
  1225. return qcedev_sha_update(qcedev_areq, handle, sg_src);
  1226. }
  1227. static int qcedev_hash_final(struct qcedev_async_req *areq,
  1228. struct qcedev_handle *handle)
  1229. {
  1230. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1231. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1232. return qcedev_sha_final(areq, handle);
  1233. else
  1234. return qcedev_hmac_final(areq, handle);
  1235. }
  1236. static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq,
  1237. int *di, struct qcedev_handle *handle,
  1238. uint8_t *k_align_src)
  1239. {
  1240. int err = 0;
  1241. int i = 0;
  1242. int dst_i = *di;
  1243. struct scatterlist sg_src;
  1244. uint32_t byteoffset = 0;
  1245. uint8_t *user_src = NULL;
  1246. uint8_t *k_align_dst = k_align_src;
  1247. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1248. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1249. byteoffset = areq->cipher_op_req.byteoffset;
  1250. user_src = areq->cipher_op_req.vbuf.src[0].vaddr;
  1251. if (user_src && copy_from_user((k_align_src + byteoffset),
  1252. (void __user *)user_src,
  1253. areq->cipher_op_req.vbuf.src[0].len))
  1254. return -EFAULT;
  1255. k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len;
  1256. for (i = 1; i < areq->cipher_op_req.entries; i++) {
  1257. user_src = areq->cipher_op_req.vbuf.src[i].vaddr;
  1258. if (user_src && copy_from_user(k_align_src,
  1259. (void __user *)user_src,
  1260. areq->cipher_op_req.vbuf.src[i].len)) {
  1261. return -EFAULT;
  1262. }
  1263. k_align_src += areq->cipher_op_req.vbuf.src[i].len;
  1264. }
  1265. /* restore src beginning */
  1266. k_align_src = k_align_dst;
  1267. areq->cipher_op_req.data_len += byteoffset;
  1268. areq->cipher_req.creq.src = (struct scatterlist *) &sg_src;
  1269. areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src;
  1270. /* In place encryption/decryption */
  1271. sg_init_one(areq->cipher_req.creq.src,
  1272. k_align_dst,
  1273. areq->cipher_op_req.data_len);
  1274. areq->cipher_req.creq.cryptlen = areq->cipher_op_req.data_len;
  1275. areq->cipher_req.creq.iv = areq->cipher_op_req.iv;
  1276. areq->cipher_op_req.entries = 1;
  1277. err = submit_req(areq, handle);
  1278. /* copy data to destination buffer*/
  1279. creq->data_len -= byteoffset;
  1280. while (creq->data_len > 0) {
  1281. if (creq->vbuf.dst[dst_i].len <= creq->data_len) {
  1282. if (err == 0 && copy_to_user(
  1283. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1284. (k_align_dst + byteoffset),
  1285. creq->vbuf.dst[dst_i].len)) {
  1286. err = -EFAULT;
  1287. goto exit;
  1288. }
  1289. k_align_dst += creq->vbuf.dst[dst_i].len;
  1290. creq->data_len -= creq->vbuf.dst[dst_i].len;
  1291. dst_i++;
  1292. } else {
  1293. if (err == 0 && copy_to_user(
  1294. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1295. (k_align_dst + byteoffset),
  1296. creq->data_len)) {
  1297. err = -EFAULT;
  1298. goto exit;
  1299. }
  1300. k_align_dst += creq->data_len;
  1301. creq->vbuf.dst[dst_i].len -= creq->data_len;
  1302. creq->vbuf.dst[dst_i].vaddr += creq->data_len;
  1303. creq->data_len = 0;
  1304. }
  1305. }
  1306. *di = dst_i;
  1307. exit:
  1308. areq->cipher_req.creq.src = NULL;
  1309. areq->cipher_req.creq.dst = NULL;
  1310. return err;
  1311. };
  1312. static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq,
  1313. struct qcedev_handle *handle)
  1314. {
  1315. int err = 0;
  1316. int di = 0;
  1317. int i = 0;
  1318. int j = 0;
  1319. int k = 0;
  1320. uint32_t byteoffset = 0;
  1321. int num_entries = 0;
  1322. uint32_t total = 0;
  1323. uint32_t len;
  1324. uint8_t *k_buf_src = NULL;
  1325. uint32_t buf_size = 0;
  1326. uint8_t *k_align_src = NULL;
  1327. uint32_t max_data_xfer;
  1328. struct qcedev_cipher_op_req *saved_req;
  1329. uint32_t req_size = 0;
  1330. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1331. total = 0;
  1332. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1333. byteoffset = areq->cipher_op_req.byteoffset;
  1334. buf_size = QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2;
  1335. k_buf_src = kmalloc(buf_size, GFP_KERNEL);
  1336. if (k_buf_src == NULL)
  1337. return -ENOMEM;
  1338. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1339. CACHE_LINE_SIZE);
  1340. max_data_xfer = QCE_MAX_OPER_DATA - byteoffset;
  1341. req_size = sizeof(struct qcedev_cipher_op_req);
  1342. saved_req = kmemdup(creq, req_size, GFP_KERNEL);
  1343. if (saved_req == NULL) {
  1344. memset(k_buf_src, 0, buf_size);
  1345. kfree(k_buf_src);
  1346. return -ENOMEM;
  1347. }
  1348. if (areq->cipher_op_req.data_len > max_data_xfer) {
  1349. struct qcedev_cipher_op_req req;
  1350. /* save the original req structure */
  1351. memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req));
  1352. i = 0;
  1353. /* Address 32 KB at a time */
  1354. while ((i < req.entries) && (err == 0)) {
  1355. if (creq->vbuf.src[i].len > max_data_xfer) {
  1356. creq->vbuf.src[0].len = max_data_xfer;
  1357. if (i > 0) {
  1358. creq->vbuf.src[0].vaddr =
  1359. creq->vbuf.src[i].vaddr;
  1360. }
  1361. creq->data_len = max_data_xfer;
  1362. creq->entries = 1;
  1363. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1364. &di, handle, k_align_src);
  1365. if (err < 0) {
  1366. memset(saved_req, 0, req_size);
  1367. memset(k_buf_src, 0, buf_size);
  1368. kfree(k_buf_src);
  1369. kfree(saved_req);
  1370. return err;
  1371. }
  1372. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1373. max_data_xfer;
  1374. creq->vbuf.src[i].vaddr =
  1375. req.vbuf.src[i].vaddr +
  1376. max_data_xfer;
  1377. req.vbuf.src[i].vaddr =
  1378. creq->vbuf.src[i].vaddr;
  1379. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1380. } else {
  1381. total = areq->cipher_op_req.byteoffset;
  1382. for (j = i; j < req.entries; j++) {
  1383. num_entries++;
  1384. if ((total + creq->vbuf.src[j].len)
  1385. >= max_data_xfer) {
  1386. creq->vbuf.src[j].len =
  1387. max_data_xfer - total;
  1388. total = max_data_xfer;
  1389. break;
  1390. }
  1391. total += creq->vbuf.src[j].len;
  1392. }
  1393. creq->data_len = total;
  1394. if (i > 0)
  1395. for (k = 0; k < num_entries; k++) {
  1396. creq->vbuf.src[k].len =
  1397. creq->vbuf.src[i+k].len;
  1398. creq->vbuf.src[k].vaddr =
  1399. creq->vbuf.src[i+k].vaddr;
  1400. }
  1401. creq->entries = num_entries;
  1402. i = j;
  1403. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1404. &di, handle, k_align_src);
  1405. if (err < 0) {
  1406. memset(saved_req, 0, req_size);
  1407. memset(k_buf_src, 0, buf_size);
  1408. kfree(k_buf_src);
  1409. kfree(saved_req);
  1410. return err;
  1411. }
  1412. num_entries = 0;
  1413. areq->cipher_op_req.byteoffset = 0;
  1414. creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr
  1415. + creq->vbuf.src[i].len;
  1416. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1417. creq->vbuf.src[i].len;
  1418. req.vbuf.src[i].vaddr =
  1419. creq->vbuf.src[i].vaddr;
  1420. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1421. if (creq->vbuf.src[i].len == 0)
  1422. i++;
  1423. }
  1424. areq->cipher_op_req.byteoffset = 0;
  1425. max_data_xfer = QCE_MAX_OPER_DATA;
  1426. byteoffset = 0;
  1427. } /* end of while ((i < req.entries) && (err == 0)) */
  1428. } else
  1429. err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle,
  1430. k_align_src);
  1431. /* Restore the original req structure */
  1432. for (i = 0; i < saved_req->entries; i++) {
  1433. creq->vbuf.src[i].len = saved_req->vbuf.src[i].len;
  1434. creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr;
  1435. }
  1436. for (len = 0, i = 0; len < saved_req->data_len; i++) {
  1437. creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len;
  1438. creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr;
  1439. len += saved_req->vbuf.dst[i].len;
  1440. }
  1441. creq->entries = saved_req->entries;
  1442. creq->data_len = saved_req->data_len;
  1443. creq->byteoffset = saved_req->byteoffset;
  1444. memset(saved_req, 0, req_size);
  1445. memset(k_buf_src, 0, buf_size);
  1446. kfree(saved_req);
  1447. kfree(k_buf_src);
  1448. return err;
  1449. }
  1450. static int qcedev_smmu_ablk_offload_cipher(struct qcedev_async_req *areq,
  1451. struct qcedev_handle *handle)
  1452. {
  1453. int i = 0;
  1454. int err = 0;
  1455. size_t byteoffset = 0;
  1456. size_t transfer_data_len = 0;
  1457. size_t pending_data_len = 0;
  1458. size_t max_data_xfer = MAX_CEHW_REQ_TRANSFER_SIZE - byteoffset;
  1459. uint8_t *user_src = NULL;
  1460. uint8_t *user_dst = NULL;
  1461. struct scatterlist sg_src;
  1462. struct scatterlist sg_dst;
  1463. if (areq->offload_cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1464. byteoffset = areq->offload_cipher_op_req.byteoffset;
  1465. /*
  1466. * areq has two components:
  1467. * a) Request that comes from userspace i.e. offload_cipher_op_req
  1468. * b) Request that QCE understands - skcipher i.e. cipher_req.creq
  1469. * skcipher has sglist pointers src and dest that would carry
  1470. * data to/from CE.
  1471. */
  1472. areq->cipher_req.creq.src = &sg_src;
  1473. areq->cipher_req.creq.dst = &sg_dst;
  1474. sg_init_table(&sg_src, 1);
  1475. sg_init_table(&sg_dst, 1);
  1476. for (i = 0; i < areq->offload_cipher_op_req.entries; i++) {
  1477. transfer_data_len = 0;
  1478. pending_data_len = areq->offload_cipher_op_req.vbuf.src[i].len;
  1479. user_src = areq->offload_cipher_op_req.vbuf.src[i].vaddr;
  1480. user_src += byteoffset;
  1481. user_dst = areq->offload_cipher_op_req.vbuf.dst[i].vaddr;
  1482. user_dst += byteoffset;
  1483. areq->cipher_req.creq.iv = areq->offload_cipher_op_req.iv;
  1484. while (pending_data_len) {
  1485. transfer_data_len = min(max_data_xfer,
  1486. pending_data_len);
  1487. sg_src.dma_address = (dma_addr_t)user_src;
  1488. sg_dst.dma_address = (dma_addr_t)user_dst;
  1489. areq->cipher_req.creq.cryptlen = transfer_data_len;
  1490. sg_src.length = transfer_data_len;
  1491. sg_dst.length = transfer_data_len;
  1492. err = submit_req(areq, handle);
  1493. if (err) {
  1494. pr_err("%s: Error processing req, err = %d\n",
  1495. __func__, err);
  1496. goto exit;
  1497. }
  1498. /* update data len to be processed */
  1499. pending_data_len -= transfer_data_len;
  1500. user_src += transfer_data_len;
  1501. user_dst += transfer_data_len;
  1502. }
  1503. }
  1504. exit:
  1505. return err;
  1506. }
  1507. static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req,
  1508. struct qcedev_control *podev)
  1509. {
  1510. /* if intending to use HW key make sure key fields are set
  1511. * correctly and HW key is indeed supported in target
  1512. */
  1513. if (req->encklen == 0) {
  1514. int i;
  1515. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  1516. if (req->enckey[i]) {
  1517. pr_err("%s: Invalid key: non-zero key input\n",
  1518. __func__);
  1519. goto error;
  1520. }
  1521. }
  1522. if ((req->op != QCEDEV_OPER_ENC_NO_KEY) &&
  1523. (req->op != QCEDEV_OPER_DEC_NO_KEY))
  1524. if (!podev->platform_support.hw_key_support) {
  1525. pr_err("%s: Invalid op %d\n", __func__,
  1526. (uint32_t)req->op);
  1527. goto error;
  1528. }
  1529. } else {
  1530. if (req->encklen == QCEDEV_AES_KEY_192) {
  1531. if (!podev->ce_support.aes_key_192) {
  1532. pr_err("%s: AES-192 not supported\n", __func__);
  1533. goto error;
  1534. }
  1535. } else {
  1536. /* if not using HW key make sure key
  1537. * length is valid
  1538. */
  1539. if (req->mode == QCEDEV_AES_MODE_XTS) {
  1540. if ((req->encklen != QCEDEV_AES_KEY_128*2) &&
  1541. (req->encklen != QCEDEV_AES_KEY_256*2)) {
  1542. pr_err("%s: unsupported key size: %d\n",
  1543. __func__, req->encklen);
  1544. goto error;
  1545. }
  1546. } else {
  1547. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1548. (req->encklen != QCEDEV_AES_KEY_256)) {
  1549. pr_err("%s: unsupported key size %d\n",
  1550. __func__, req->encklen);
  1551. goto error;
  1552. }
  1553. }
  1554. }
  1555. }
  1556. return 0;
  1557. error:
  1558. return -EINVAL;
  1559. }
  1560. static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req,
  1561. struct qcedev_control *podev)
  1562. {
  1563. uint32_t total = 0;
  1564. uint32_t i;
  1565. if (req->use_pmem) {
  1566. pr_err("%s: Use of PMEM is not supported\n", __func__);
  1567. goto error;
  1568. }
  1569. if ((req->entries == 0) || (req->data_len == 0) ||
  1570. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1571. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1572. goto error;
  1573. }
  1574. if ((req->alg >= QCEDEV_ALG_LAST) ||
  1575. (req->mode >= QCEDEV_AES_DES_MODE_LAST)) {
  1576. pr_err("%s: Invalid algorithm %d\n", __func__,
  1577. (uint32_t)req->alg);
  1578. goto error;
  1579. }
  1580. if ((req->mode == QCEDEV_AES_MODE_XTS) &&
  1581. (!podev->ce_support.aes_xts)) {
  1582. pr_err("%s: XTS algorithm is not supported\n", __func__);
  1583. goto error;
  1584. }
  1585. if (req->alg == QCEDEV_ALG_AES) {
  1586. if (qcedev_check_cipher_key(req, podev))
  1587. goto error;
  1588. }
  1589. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1590. if (req->byteoffset) {
  1591. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1592. pr_err("%s: Operation on byte offset not supported\n",
  1593. __func__);
  1594. goto error;
  1595. }
  1596. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1597. pr_err("%s: Invalid byte offset\n", __func__);
  1598. goto error;
  1599. }
  1600. total = req->byteoffset;
  1601. for (i = 0; i < req->entries; i++) {
  1602. if (total > U32_MAX - req->vbuf.src[i].len) {
  1603. pr_err("%s:Integer overflow on total src len\n",
  1604. __func__);
  1605. goto error;
  1606. }
  1607. total += req->vbuf.src[i].len;
  1608. }
  1609. }
  1610. if (req->data_len < req->byteoffset) {
  1611. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1612. __func__, req->data_len, req->byteoffset);
  1613. goto error;
  1614. }
  1615. /* Ensure IV size */
  1616. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1617. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1618. goto error;
  1619. }
  1620. /* Ensure Key size */
  1621. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1622. pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen);
  1623. goto error;
  1624. }
  1625. /* Ensure zer ivlen for ECB mode */
  1626. if (req->ivlen > 0) {
  1627. if ((req->mode == QCEDEV_AES_MODE_ECB) ||
  1628. (req->mode == QCEDEV_DES_MODE_ECB)) {
  1629. pr_err("%s: Expecting a zero length IV\n", __func__);
  1630. goto error;
  1631. }
  1632. } else {
  1633. if ((req->mode != QCEDEV_AES_MODE_ECB) &&
  1634. (req->mode != QCEDEV_DES_MODE_ECB)) {
  1635. pr_err("%s: Expecting a non-zero ength IV\n", __func__);
  1636. goto error;
  1637. }
  1638. }
  1639. /* Check for sum of all dst length is equal to data_len */
  1640. for (i = 0, total = 0; i < req->entries; i++) {
  1641. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1642. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1643. __func__, i, req->vbuf.dst[i].len);
  1644. goto error;
  1645. }
  1646. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1647. pr_err("%s: Integer overflow on total req dst vbuf length\n",
  1648. __func__);
  1649. goto error;
  1650. }
  1651. total += req->vbuf.dst[i].len;
  1652. }
  1653. if (total != req->data_len) {
  1654. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1655. __func__, i, total, req->data_len);
  1656. goto error;
  1657. }
  1658. /* Check for sum of all src length is equal to data_len */
  1659. for (i = 0, total = 0; i < req->entries; i++) {
  1660. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1661. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1662. __func__, i, req->vbuf.src[i].len);
  1663. goto error;
  1664. }
  1665. if (req->vbuf.src[i].len > U32_MAX - total) {
  1666. pr_err("%s: Integer overflow on total req src vbuf length\n",
  1667. __func__);
  1668. goto error;
  1669. }
  1670. total += req->vbuf.src[i].len;
  1671. }
  1672. if (total != req->data_len) {
  1673. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1674. __func__, total, req->data_len);
  1675. goto error;
  1676. }
  1677. return 0;
  1678. error:
  1679. return -EINVAL;
  1680. }
  1681. static int qcedev_check_sha_params(struct qcedev_sha_op_req *req,
  1682. struct qcedev_control *podev)
  1683. {
  1684. uint32_t total = 0;
  1685. uint32_t i;
  1686. if ((req->alg == QCEDEV_ALG_AES_CMAC) &&
  1687. (!podev->ce_support.cmac)) {
  1688. pr_err("%s: CMAC not supported\n", __func__);
  1689. goto sha_error;
  1690. }
  1691. if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) {
  1692. pr_err("%s: Invalid num entries (%d)\n",
  1693. __func__, req->entries);
  1694. goto sha_error;
  1695. }
  1696. if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) {
  1697. pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg);
  1698. goto sha_error;
  1699. }
  1700. if ((req->alg == QCEDEV_ALG_SHA1_HMAC) ||
  1701. (req->alg == QCEDEV_ALG_SHA256_HMAC)) {
  1702. if (req->authkey == NULL) {
  1703. pr_err("%s: Invalid authkey pointer\n", __func__);
  1704. goto sha_error;
  1705. }
  1706. if (req->authklen <= 0) {
  1707. pr_err("%s: Invalid authkey length (%d)\n",
  1708. __func__, req->authklen);
  1709. goto sha_error;
  1710. }
  1711. }
  1712. if (req->alg == QCEDEV_ALG_AES_CMAC) {
  1713. if ((req->authklen != QCEDEV_AES_KEY_128) &&
  1714. (req->authklen != QCEDEV_AES_KEY_256)) {
  1715. pr_err("%s: unsupported key length\n", __func__);
  1716. goto sha_error;
  1717. }
  1718. }
  1719. /* Check for sum of all src length is equal to data_len */
  1720. for (i = 0, total = 0; i < req->entries; i++) {
  1721. if (req->data[i].len > U32_MAX - total) {
  1722. pr_err("%s: Integer overflow on total req buf length\n",
  1723. __func__);
  1724. goto sha_error;
  1725. }
  1726. total += req->data[i].len;
  1727. }
  1728. if (total != req->data_len) {
  1729. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1730. __func__, total, req->data_len);
  1731. goto sha_error;
  1732. }
  1733. return 0;
  1734. sha_error:
  1735. return -EINVAL;
  1736. }
  1737. static int qcedev_check_offload_cipher_key(struct qcedev_offload_cipher_op_req *req,
  1738. struct qcedev_control *podev)
  1739. {
  1740. if (req->encklen == 0)
  1741. return -EINVAL;
  1742. /* AES-192 is not a valid option for OFFLOAD use case */
  1743. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1744. (req->encklen != QCEDEV_AES_KEY_256)) {
  1745. pr_err("%s: unsupported key size %d\n",
  1746. __func__, req->encklen);
  1747. goto error;
  1748. }
  1749. return 0;
  1750. error:
  1751. return -EINVAL;
  1752. }
  1753. static int qcedev_check_offload_cipher_params(struct qcedev_offload_cipher_op_req *req,
  1754. struct qcedev_control *podev)
  1755. {
  1756. uint32_t total = 0;
  1757. int i = 0;
  1758. if ((req->entries == 0) || (req->data_len == 0) ||
  1759. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1760. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1761. goto error;
  1762. }
  1763. if ((req->alg != QCEDEV_ALG_AES) ||
  1764. (req->mode > QCEDEV_AES_MODE_CTR)) {
  1765. pr_err("%s: Invalid algorithm %d\n", __func__,
  1766. (uint32_t)req->alg);
  1767. goto error;
  1768. }
  1769. if (qcedev_check_offload_cipher_key(req, podev))
  1770. goto error;
  1771. if (req->block_offset >= AES_CE_BLOCK_SIZE)
  1772. goto error;
  1773. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1774. if (req->byteoffset) {
  1775. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1776. pr_err("%s: Operation on byte offset not supported\n",
  1777. __func__);
  1778. goto error;
  1779. }
  1780. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1781. pr_err("%s: Invalid byte offset\n", __func__);
  1782. goto error;
  1783. }
  1784. total = req->byteoffset;
  1785. for (i = 0; i < req->entries; i++) {
  1786. if (total > U32_MAX - req->vbuf.src[i].len) {
  1787. pr_err("%s:Int overflow on total src len\n",
  1788. __func__);
  1789. goto error;
  1790. }
  1791. total += req->vbuf.src[i].len;
  1792. }
  1793. }
  1794. if (req->data_len < req->byteoffset) {
  1795. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1796. __func__, req->data_len, req->byteoffset);
  1797. goto error;
  1798. }
  1799. /* Ensure IV size */
  1800. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1801. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1802. goto error;
  1803. }
  1804. /* Ensure Key size */
  1805. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1806. pr_err("%s: Klen is not correct: %u\n", __func__,
  1807. req->encklen);
  1808. goto error;
  1809. }
  1810. /* Check for sum of all dst length is equal to data_len */
  1811. for (i = 0, total = 0; i < req->entries; i++) {
  1812. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1813. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1814. __func__, i, req->vbuf.dst[i].len);
  1815. goto error;
  1816. }
  1817. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1818. pr_err("%s: Int overflow on total req dst vbuf len\n",
  1819. __func__);
  1820. goto error;
  1821. }
  1822. total += req->vbuf.dst[i].len;
  1823. }
  1824. if (total != req->data_len) {
  1825. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1826. __func__, i, total, req->data_len);
  1827. goto error;
  1828. }
  1829. /* Check for sum of all src length is equal to data_len */
  1830. for (i = 0, total = 0; i < req->entries; i++) {
  1831. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1832. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1833. __func__, i, req->vbuf.src[i].len);
  1834. goto error;
  1835. }
  1836. if (req->vbuf.src[i].len > U32_MAX - total) {
  1837. pr_err("%s: Int overflow on total req src vbuf len\n",
  1838. __func__);
  1839. goto error;
  1840. }
  1841. total += req->vbuf.src[i].len;
  1842. }
  1843. if (total != req->data_len) {
  1844. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1845. __func__, total, req->data_len);
  1846. goto error;
  1847. }
  1848. return 0;
  1849. error:
  1850. return -EINVAL;
  1851. }
  1852. long qcedev_ioctl(struct file *file,
  1853. unsigned int cmd, unsigned long arg)
  1854. {
  1855. int err = 0;
  1856. struct qcedev_handle *handle;
  1857. struct qcedev_control *podev;
  1858. struct qcedev_async_req *qcedev_areq;
  1859. struct qcedev_stat *pstat;
  1860. qcedev_areq = kzalloc(sizeof(struct qcedev_async_req), GFP_KERNEL);
  1861. if (!qcedev_areq)
  1862. return -ENOMEM;
  1863. handle = file->private_data;
  1864. podev = handle->cntl;
  1865. qcedev_areq->handle = handle;
  1866. if (podev == NULL || podev->magic != QCEDEV_MAGIC) {
  1867. pr_err("%s: invalid handle %pK\n",
  1868. __func__, podev);
  1869. err = -ENOENT;
  1870. goto exit_free_qcedev_areq;
  1871. }
  1872. /* Verify user arguments. */
  1873. if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC) {
  1874. err = -ENOTTY;
  1875. goto exit_free_qcedev_areq;
  1876. }
  1877. init_completion(&qcedev_areq->complete);
  1878. pstat = &_qcedev_stat;
  1879. switch (cmd) {
  1880. case QCEDEV_IOCTL_ENC_REQ:
  1881. case QCEDEV_IOCTL_DEC_REQ:
  1882. if (copy_from_user(&qcedev_areq->cipher_op_req,
  1883. (void __user *)arg,
  1884. sizeof(struct qcedev_cipher_op_req))) {
  1885. err = -EFAULT;
  1886. goto exit_free_qcedev_areq;
  1887. }
  1888. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_CIPHER;
  1889. if (qcedev_check_cipher_params(&qcedev_areq->cipher_op_req,
  1890. podev)) {
  1891. err = -EINVAL;
  1892. goto exit_free_qcedev_areq;
  1893. }
  1894. err = qcedev_vbuf_ablk_cipher(qcedev_areq, handle);
  1895. if (err)
  1896. goto exit_free_qcedev_areq;
  1897. if (copy_to_user((void __user *)arg,
  1898. &qcedev_areq->cipher_op_req,
  1899. sizeof(struct qcedev_cipher_op_req))) {
  1900. err = -EFAULT;
  1901. goto exit_free_qcedev_areq;
  1902. }
  1903. break;
  1904. case QCEDEV_IOCTL_OFFLOAD_OP_REQ:
  1905. if (copy_from_user(&qcedev_areq->offload_cipher_op_req,
  1906. (void __user *)arg,
  1907. sizeof(struct qcedev_offload_cipher_op_req))) {
  1908. err = -EFAULT;
  1909. goto exit_free_qcedev_areq;
  1910. }
  1911. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER;
  1912. if (qcedev_check_offload_cipher_params(
  1913. &qcedev_areq->offload_cipher_op_req, podev)) {
  1914. err = -EINVAL;
  1915. goto exit_free_qcedev_areq;
  1916. }
  1917. qcedev_areq->offload_cipher_op_req.err = QCEDEV_OFFLOAD_NO_ERROR;
  1918. err = qcedev_smmu_ablk_offload_cipher(qcedev_areq, handle);
  1919. if (err)
  1920. goto exit_free_qcedev_areq;
  1921. if (copy_to_user((void __user *)arg,
  1922. &qcedev_areq->offload_cipher_op_req,
  1923. sizeof(struct qcedev_offload_cipher_op_req))) {
  1924. err = -EFAULT;
  1925. goto exit_free_qcedev_areq;
  1926. }
  1927. break;
  1928. case QCEDEV_IOCTL_SHA_INIT_REQ:
  1929. {
  1930. struct scatterlist sg_src;
  1931. if (copy_from_user(&qcedev_areq->sha_op_req,
  1932. (void __user *)arg,
  1933. sizeof(struct qcedev_sha_op_req))) {
  1934. err = -EFAULT;
  1935. goto exit_free_qcedev_areq;
  1936. }
  1937. mutex_lock(&hash_access_lock);
  1938. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1939. mutex_unlock(&hash_access_lock);
  1940. err = -EINVAL;
  1941. goto exit_free_qcedev_areq;
  1942. }
  1943. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1944. err = qcedev_hash_init(qcedev_areq, handle, &sg_src);
  1945. if (err) {
  1946. mutex_unlock(&hash_access_lock);
  1947. goto exit_free_qcedev_areq;
  1948. }
  1949. mutex_unlock(&hash_access_lock);
  1950. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1951. sizeof(struct qcedev_sha_op_req))) {
  1952. err = -EFAULT;
  1953. goto exit_free_qcedev_areq;
  1954. }
  1955. handle->sha_ctxt.init_done = true;
  1956. }
  1957. break;
  1958. case QCEDEV_IOCTL_GET_CMAC_REQ:
  1959. if (!podev->ce_support.cmac) {
  1960. err = -ENOTTY;
  1961. goto exit_free_qcedev_areq;
  1962. }
  1963. fallthrough;
  1964. case QCEDEV_IOCTL_SHA_UPDATE_REQ:
  1965. {
  1966. struct scatterlist sg_src;
  1967. if (copy_from_user(&qcedev_areq->sha_op_req,
  1968. (void __user *)arg,
  1969. sizeof(struct qcedev_sha_op_req))) {
  1970. err = -EFAULT;
  1971. goto exit_free_qcedev_areq;
  1972. }
  1973. mutex_lock(&hash_access_lock);
  1974. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1975. mutex_unlock(&hash_access_lock);
  1976. err = -EINVAL;
  1977. goto exit_free_qcedev_areq;
  1978. }
  1979. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1980. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_AES_CMAC) {
  1981. err = qcedev_hash_cmac(qcedev_areq, handle, &sg_src);
  1982. if (err) {
  1983. mutex_unlock(&hash_access_lock);
  1984. goto exit_free_qcedev_areq;
  1985. }
  1986. } else {
  1987. if (!handle->sha_ctxt.init_done) {
  1988. pr_err("%s Init was not called\n", __func__);
  1989. mutex_unlock(&hash_access_lock);
  1990. err = -EINVAL;
  1991. goto exit_free_qcedev_areq;
  1992. }
  1993. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  1994. if (err) {
  1995. mutex_unlock(&hash_access_lock);
  1996. goto exit_free_qcedev_areq;
  1997. }
  1998. }
  1999. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2000. pr_err("Invalid sha_ctxt.diglen %d\n",
  2001. handle->sha_ctxt.diglen);
  2002. mutex_unlock(&hash_access_lock);
  2003. err = -EINVAL;
  2004. goto exit_free_qcedev_areq;
  2005. }
  2006. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2007. &handle->sha_ctxt.digest[0],
  2008. handle->sha_ctxt.diglen);
  2009. mutex_unlock(&hash_access_lock);
  2010. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2011. sizeof(struct qcedev_sha_op_req))) {
  2012. err = -EFAULT;
  2013. goto exit_free_qcedev_areq;
  2014. }
  2015. }
  2016. break;
  2017. case QCEDEV_IOCTL_SHA_FINAL_REQ:
  2018. if (!handle->sha_ctxt.init_done) {
  2019. pr_err("%s Init was not called\n", __func__);
  2020. err = -EINVAL;
  2021. goto exit_free_qcedev_areq;
  2022. }
  2023. if (copy_from_user(&qcedev_areq->sha_op_req,
  2024. (void __user *)arg,
  2025. sizeof(struct qcedev_sha_op_req))) {
  2026. err = -EFAULT;
  2027. goto exit_free_qcedev_areq;
  2028. }
  2029. mutex_lock(&hash_access_lock);
  2030. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  2031. mutex_unlock(&hash_access_lock);
  2032. err = -EINVAL;
  2033. goto exit_free_qcedev_areq;
  2034. }
  2035. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  2036. err = qcedev_hash_final(qcedev_areq, handle);
  2037. if (err) {
  2038. mutex_unlock(&hash_access_lock);
  2039. goto exit_free_qcedev_areq;
  2040. }
  2041. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2042. pr_err("Invalid sha_ctxt.diglen %d\n",
  2043. handle->sha_ctxt.diglen);
  2044. mutex_unlock(&hash_access_lock);
  2045. err = -EINVAL;
  2046. goto exit_free_qcedev_areq;
  2047. }
  2048. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  2049. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2050. &handle->sha_ctxt.digest[0],
  2051. handle->sha_ctxt.diglen);
  2052. mutex_unlock(&hash_access_lock);
  2053. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2054. sizeof(struct qcedev_sha_op_req))) {
  2055. err = -EFAULT;
  2056. goto exit_free_qcedev_areq;
  2057. }
  2058. handle->sha_ctxt.init_done = false;
  2059. break;
  2060. case QCEDEV_IOCTL_GET_SHA_REQ:
  2061. {
  2062. struct scatterlist sg_src;
  2063. if (copy_from_user(&qcedev_areq->sha_op_req,
  2064. (void __user *)arg,
  2065. sizeof(struct qcedev_sha_op_req))) {
  2066. err = -EFAULT;
  2067. goto exit_free_qcedev_areq;
  2068. }
  2069. mutex_lock(&hash_access_lock);
  2070. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  2071. mutex_unlock(&hash_access_lock);
  2072. err = -EINVAL;
  2073. goto exit_free_qcedev_areq;
  2074. }
  2075. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  2076. qcedev_hash_init(qcedev_areq, handle, &sg_src);
  2077. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  2078. if (err) {
  2079. mutex_unlock(&hash_access_lock);
  2080. goto exit_free_qcedev_areq;
  2081. }
  2082. err = qcedev_hash_final(qcedev_areq, handle);
  2083. if (err) {
  2084. mutex_unlock(&hash_access_lock);
  2085. goto exit_free_qcedev_areq;
  2086. }
  2087. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  2088. pr_err("Invalid sha_ctxt.diglen %d\n",
  2089. handle->sha_ctxt.diglen);
  2090. mutex_unlock(&hash_access_lock);
  2091. err = -EINVAL;
  2092. goto exit_free_qcedev_areq;
  2093. }
  2094. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  2095. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2096. &handle->sha_ctxt.digest[0],
  2097. handle->sha_ctxt.diglen);
  2098. mutex_unlock(&hash_access_lock);
  2099. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2100. sizeof(struct qcedev_sha_op_req))) {
  2101. err = -EFAULT;
  2102. goto exit_free_qcedev_areq;
  2103. }
  2104. }
  2105. break;
  2106. case QCEDEV_IOCTL_MAP_BUF_REQ:
  2107. {
  2108. unsigned long long vaddr = 0;
  2109. struct qcedev_map_buf_req map_buf = { {0} };
  2110. int i = 0;
  2111. if (copy_from_user(&map_buf,
  2112. (void __user *)arg, sizeof(map_buf))) {
  2113. err = -EFAULT;
  2114. goto exit_free_qcedev_areq;
  2115. }
  2116. if (map_buf.num_fds > ARRAY_SIZE(map_buf.fd)) {
  2117. pr_err("%s: err: num_fds = %d exceeds max value\n",
  2118. __func__, map_buf.num_fds);
  2119. err = -EINVAL;
  2120. goto exit_free_qcedev_areq;
  2121. }
  2122. for (i = 0; i < map_buf.num_fds; i++) {
  2123. err = qcedev_check_and_map_buffer(handle,
  2124. map_buf.fd[i],
  2125. map_buf.fd_offset[i],
  2126. map_buf.fd_size[i],
  2127. &vaddr);
  2128. if (err) {
  2129. pr_err(
  2130. "%s: err: failed to map fd(%d) - %d\n",
  2131. __func__, map_buf.fd[i], err);
  2132. goto exit_free_qcedev_areq;
  2133. }
  2134. map_buf.buf_vaddr[i] = vaddr;
  2135. pr_info("%s: info: vaddr = %llx\n, fd = %d",
  2136. __func__, vaddr, map_buf.fd[i]);
  2137. }
  2138. if (copy_to_user((void __user *)arg, &map_buf,
  2139. sizeof(map_buf))) {
  2140. err = -EFAULT;
  2141. goto exit_free_qcedev_areq;
  2142. }
  2143. break;
  2144. }
  2145. case QCEDEV_IOCTL_UNMAP_BUF_REQ:
  2146. {
  2147. struct qcedev_unmap_buf_req unmap_buf = { { 0 } };
  2148. int i = 0;
  2149. if (copy_from_user(&unmap_buf,
  2150. (void __user *)arg, sizeof(unmap_buf))) {
  2151. err = -EFAULT;
  2152. goto exit_free_qcedev_areq;
  2153. }
  2154. if (unmap_buf.num_fds > ARRAY_SIZE(unmap_buf.fd)) {
  2155. pr_err("%s: err: num_fds = %d exceeds max value\n",
  2156. __func__, unmap_buf.num_fds);
  2157. err = -EINVAL;
  2158. goto exit_free_qcedev_areq;
  2159. }
  2160. for (i = 0; i < unmap_buf.num_fds; i++) {
  2161. err = qcedev_check_and_unmap_buffer(handle,
  2162. unmap_buf.fd[i]);
  2163. if (err) {
  2164. pr_err(
  2165. "%s: err: failed to unmap fd(%d) - %d\n",
  2166. __func__,
  2167. unmap_buf.fd[i], err);
  2168. goto exit_free_qcedev_areq;
  2169. }
  2170. }
  2171. break;
  2172. }
  2173. default:
  2174. err = -ENOTTY;
  2175. goto exit_free_qcedev_areq;
  2176. }
  2177. exit_free_qcedev_areq:
  2178. kfree(qcedev_areq);
  2179. return err;
  2180. }
  2181. static int qcedev_probe_device(struct platform_device *pdev)
  2182. {
  2183. void *handle = NULL;
  2184. int rc = 0;
  2185. struct qcedev_control *podev;
  2186. struct msm_ce_hw_support *platform_support;
  2187. podev = &qce_dev[0];
  2188. rc = alloc_chrdev_region(&qcedev_device_no, 0, 1, QCEDEV_DEV);
  2189. if (rc < 0) {
  2190. pr_err("alloc_chrdev_region failed %d\n", rc);
  2191. return rc;
  2192. }
  2193. driver_class = class_create(THIS_MODULE, QCEDEV_DEV);
  2194. if (IS_ERR(driver_class)) {
  2195. rc = -ENOMEM;
  2196. pr_err("class_create failed %d\n", rc);
  2197. goto exit_unreg_chrdev_region;
  2198. }
  2199. class_dev = device_create(driver_class, NULL, qcedev_device_no, NULL,
  2200. QCEDEV_DEV);
  2201. if (IS_ERR(class_dev)) {
  2202. pr_err("class_device_create failed %d\n", rc);
  2203. rc = -ENOMEM;
  2204. goto exit_destroy_class;
  2205. }
  2206. cdev_init(&podev->cdev, &qcedev_fops);
  2207. podev->cdev.owner = THIS_MODULE;
  2208. rc = cdev_add(&podev->cdev, MKDEV(MAJOR(qcedev_device_no), 0), 1);
  2209. if (rc < 0) {
  2210. pr_err("cdev_add failed %d\n", rc);
  2211. goto exit_destroy_device;
  2212. }
  2213. podev->minor = 0;
  2214. podev->high_bw_req_count = 0;
  2215. INIT_LIST_HEAD(&podev->ready_commands);
  2216. podev->active_command = NULL;
  2217. INIT_LIST_HEAD(&podev->context_banks);
  2218. spin_lock_init(&podev->lock);
  2219. tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev);
  2220. podev->icc_path = of_icc_get(&pdev->dev, "data_path");
  2221. if (IS_ERR(podev->icc_path)) {
  2222. rc = PTR_ERR(podev->icc_path);
  2223. pr_err("%s Failed to get icc path with error %d\n",
  2224. __func__, rc);
  2225. goto exit_del_cdev;
  2226. }
  2227. /*
  2228. * HLOS crypto vote values from DTSI. If no values specified, use
  2229. * nominal values.
  2230. */
  2231. if (of_property_read_u32((&pdev->dev)->of_node,
  2232. "qcom,icc_avg_bw",
  2233. &podev->icc_avg_bw)) {
  2234. pr_warn("%s: No icc avg BW set, using default\n", __func__);
  2235. podev->icc_avg_bw = CRYPTO_AVG_BW;
  2236. }
  2237. if (of_property_read_u32((&pdev->dev)->of_node,
  2238. "qcom,icc_peak_bw",
  2239. &podev->icc_peak_bw)) {
  2240. pr_warn("%s: No icc peak BW set, using default\n", __func__);
  2241. podev->icc_peak_bw = CRYPTO_PEAK_BW;
  2242. }
  2243. rc = icc_set_bw(podev->icc_path, podev->icc_avg_bw,
  2244. podev->icc_peak_bw);
  2245. if (rc) {
  2246. pr_err("%s Unable to set high bandwidth\n", __func__);
  2247. goto exit_unregister_bus_scale;
  2248. }
  2249. handle = qce_open(pdev, &rc);
  2250. if (handle == NULL) {
  2251. rc = -ENODEV;
  2252. goto exit_scale_busbandwidth;
  2253. }
  2254. rc = icc_set_bw(podev->icc_path, 0, 0);
  2255. if (rc) {
  2256. pr_err("%s Unable to set to low bandwidth\n", __func__);
  2257. goto exit_qce_close;
  2258. }
  2259. podev->qce = handle;
  2260. podev->pdev = pdev;
  2261. platform_set_drvdata(pdev, podev);
  2262. qce_hw_support(podev->qce, &podev->ce_support);
  2263. if (podev->ce_support.bam) {
  2264. podev->platform_support.ce_shared = 0;
  2265. podev->platform_support.shared_ce_resource = 0;
  2266. podev->platform_support.hw_key_support =
  2267. podev->ce_support.hw_key;
  2268. podev->platform_support.sha_hmac = 1;
  2269. } else {
  2270. platform_support =
  2271. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  2272. podev->platform_support.ce_shared = platform_support->ce_shared;
  2273. podev->platform_support.shared_ce_resource =
  2274. platform_support->shared_ce_resource;
  2275. podev->platform_support.hw_key_support =
  2276. platform_support->hw_key_support;
  2277. podev->platform_support.sha_hmac = platform_support->sha_hmac;
  2278. }
  2279. podev->mem_client = qcedev_mem_new_client(MEM_ION);
  2280. if (!podev->mem_client) {
  2281. pr_err("%s: err: qcedev_mem_new_client failed\n", __func__);
  2282. goto exit_qce_close;
  2283. }
  2284. rc = of_platform_populate(pdev->dev.of_node, qcedev_match,
  2285. NULL, &pdev->dev);
  2286. if (rc) {
  2287. pr_err("%s: err: of_platform_populate failed: %d\n",
  2288. __func__, rc);
  2289. goto exit_mem_new_client;
  2290. }
  2291. return 0;
  2292. exit_mem_new_client:
  2293. if (podev->mem_client)
  2294. qcedev_mem_delete_client(podev->mem_client);
  2295. podev->mem_client = NULL;
  2296. exit_qce_close:
  2297. if (handle)
  2298. qce_close(handle);
  2299. exit_scale_busbandwidth:
  2300. icc_set_bw(podev->icc_path, 0, 0);
  2301. exit_unregister_bus_scale:
  2302. if (podev->icc_path)
  2303. icc_put(podev->icc_path);
  2304. exit_del_cdev:
  2305. cdev_del(&podev->cdev);
  2306. exit_destroy_device:
  2307. device_destroy(driver_class, qcedev_device_no);
  2308. exit_destroy_class:
  2309. class_destroy(driver_class);
  2310. exit_unreg_chrdev_region:
  2311. unregister_chrdev_region(qcedev_device_no, 1);
  2312. podev->icc_path = NULL;
  2313. platform_set_drvdata(pdev, NULL);
  2314. podev->pdev = NULL;
  2315. podev->qce = NULL;
  2316. return rc;
  2317. }
  2318. static int qcedev_probe(struct platform_device *pdev)
  2319. {
  2320. if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcedev"))
  2321. return qcedev_probe_device(pdev);
  2322. else if (of_device_is_compatible(pdev->dev.of_node,
  2323. "qcom,qcedev,context-bank"))
  2324. return qcedev_parse_context_bank(pdev);
  2325. return -EINVAL;
  2326. };
  2327. static int qcedev_remove(struct platform_device *pdev)
  2328. {
  2329. struct qcedev_control *podev;
  2330. podev = platform_get_drvdata(pdev);
  2331. if (!podev)
  2332. return 0;
  2333. if (podev->qce)
  2334. qce_close(podev->qce);
  2335. if (podev->icc_path)
  2336. icc_put(podev->icc_path);
  2337. tasklet_kill(&podev->done_tasklet);
  2338. cdev_del(&podev->cdev);
  2339. device_destroy(driver_class, qcedev_device_no);
  2340. class_destroy(driver_class);
  2341. unregister_chrdev_region(qcedev_device_no, 1);
  2342. return 0;
  2343. };
  2344. static int qcedev_suspend(struct platform_device *pdev, pm_message_t state)
  2345. {
  2346. struct qcedev_control *podev;
  2347. int ret;
  2348. podev = platform_get_drvdata(pdev);
  2349. if (!podev)
  2350. return 0;
  2351. mutex_lock(&qcedev_sent_bw_req);
  2352. if (podev->high_bw_req_count) {
  2353. ret = qcedev_control_clocks(podev, false);
  2354. if (ret)
  2355. goto suspend_exit;
  2356. }
  2357. suspend_exit:
  2358. mutex_unlock(&qcedev_sent_bw_req);
  2359. return 0;
  2360. }
  2361. static int qcedev_resume(struct platform_device *pdev)
  2362. {
  2363. struct qcedev_control *podev;
  2364. int ret;
  2365. podev = platform_get_drvdata(pdev);
  2366. if (!podev)
  2367. return 0;
  2368. mutex_lock(&qcedev_sent_bw_req);
  2369. if (podev->high_bw_req_count) {
  2370. ret = qcedev_control_clocks(podev, true);
  2371. if (ret)
  2372. goto resume_exit;
  2373. }
  2374. resume_exit:
  2375. mutex_unlock(&qcedev_sent_bw_req);
  2376. return 0;
  2377. }
  2378. static struct platform_driver qcedev_plat_driver = {
  2379. .probe = qcedev_probe,
  2380. .remove = qcedev_remove,
  2381. .suspend = qcedev_suspend,
  2382. .resume = qcedev_resume,
  2383. .driver = {
  2384. .name = "qce",
  2385. .of_match_table = qcedev_match,
  2386. },
  2387. };
  2388. static int _disp_stats(int id)
  2389. {
  2390. struct qcedev_stat *pstat;
  2391. int len = 0;
  2392. pstat = &_qcedev_stat;
  2393. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  2394. "\nQTI QCE dev driver %d Statistics:\n",
  2395. id + 1);
  2396. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2397. " Encryption operation success : %d\n",
  2398. pstat->qcedev_enc_success);
  2399. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2400. " Encryption operation fail : %d\n",
  2401. pstat->qcedev_enc_fail);
  2402. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2403. " Decryption operation success : %d\n",
  2404. pstat->qcedev_dec_success);
  2405. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2406. " Encryption operation fail : %d\n",
  2407. pstat->qcedev_dec_fail);
  2408. return len;
  2409. }
  2410. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  2411. size_t count, loff_t *ppos)
  2412. {
  2413. ssize_t rc = -EINVAL;
  2414. int qcedev = *((int *) file->private_data);
  2415. int len;
  2416. len = _disp_stats(qcedev);
  2417. if (len <= count)
  2418. rc = simple_read_from_buffer((void __user *) buf, len,
  2419. ppos, (void *) _debug_read_buf, len);
  2420. return rc;
  2421. }
  2422. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  2423. size_t count, loff_t *ppos)
  2424. {
  2425. memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat));
  2426. return count;
  2427. };
  2428. static const struct file_operations _debug_stats_ops = {
  2429. .open = simple_open,
  2430. .read = _debug_stats_read,
  2431. .write = _debug_stats_write,
  2432. };
  2433. static int _qcedev_debug_init(void)
  2434. {
  2435. int rc;
  2436. char name[DEBUG_MAX_FNAME];
  2437. struct dentry *dent;
  2438. _debug_dent = debugfs_create_dir("qcedev", NULL);
  2439. if (IS_ERR(_debug_dent)) {
  2440. pr_debug("qcedev debugfs_create_dir fail, error %ld\n",
  2441. PTR_ERR(_debug_dent));
  2442. return PTR_ERR(_debug_dent);
  2443. }
  2444. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  2445. _debug_qcedev = 0;
  2446. dent = debugfs_create_file(name, 0644, _debug_dent,
  2447. &_debug_qcedev, &_debug_stats_ops);
  2448. if (dent == NULL) {
  2449. pr_debug("qcedev debugfs_create_file fail, error %ld\n",
  2450. PTR_ERR(dent));
  2451. rc = PTR_ERR(dent);
  2452. goto err;
  2453. }
  2454. return 0;
  2455. err:
  2456. debugfs_remove_recursive(_debug_dent);
  2457. return rc;
  2458. }
  2459. static int qcedev_init(void)
  2460. {
  2461. _qcedev_debug_init();
  2462. return platform_driver_register(&qcedev_plat_driver);
  2463. }
  2464. static void qcedev_exit(void)
  2465. {
  2466. debugfs_remove_recursive(_debug_dent);
  2467. platform_driver_unregister(&qcedev_plat_driver);
  2468. }
  2469. MODULE_LICENSE("GPL v2");
  2470. MODULE_DESCRIPTION("QTI DEV Crypto driver");
  2471. MODULE_IMPORT_NS(DMA_BUF);
  2472. module_init(qcedev_init);
  2473. module_exit(qcedev_exit);