wcd937x.c 55 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #include "../msm-cdc-supply.h"
  32. #define WCD9370_VARIANT 0
  33. #define WCD9375_VARIANT 5
  34. #define NUM_SWRS_DT_PARAMS 5
  35. enum {
  36. CODEC_TX = 0,
  37. CODEC_RX,
  38. };
  39. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  40. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  41. static int wcd937x_handle_pre_irq(void *data);
  42. static int wcd937x_handle_post_irq(void *data);
  43. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  44. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  45. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  46. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  64. };
  65. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  66. .name = "wcd937x",
  67. .irqs = wcd937x_irqs,
  68. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  69. .num_regs = 3,
  70. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  71. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  72. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  73. .runtime_pm = true,
  74. .handle_post_irq = wcd937x_handle_post_irq,
  75. .handle_pre_irq = wcd937x_handle_pre_irq,
  76. };
  77. static int wcd937x_handle_pre_irq(void *data)
  78. {
  79. struct wcd937x_priv *wcd937x = data;
  80. int num_irq_regs = wcd937x->num_irq_regs;
  81. int ret = 0;
  82. u8 sts[num_irq_regs];
  83. struct wcd937x_pdata *pdata;
  84. pdata = dev_get_platdata(wcd937x->dev);
  85. memset(sts, 0, sizeof(sts));
  86. ret = regmap_bulk_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0,
  87. sts, num_irq_regs);
  88. if (ret < 0) {
  89. dev_err(wcd937x->dev, "%s: Failed to read intr status: %d\n",
  90. __func__, ret);
  91. } else if (ret == 0) {
  92. dev_dbg(wcd937x->dev,
  93. "%s: clear interrupts except OCP and SCD\n", __func__);
  94. /* Do not affect OCP and SCD interrupts */
  95. sts[0] = sts[0] & 0x5F;
  96. sts[1] = sts[1] & 0xEB;
  97. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0,
  98. sts[0]);
  99. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1,
  100. sts[1]);
  101. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_2,
  102. sts[2]);
  103. }
  104. return IRQ_HANDLED;
  105. }
  106. static int wcd937x_handle_post_irq(void *data)
  107. {
  108. struct wcd937x_priv *wcd937x = data;
  109. int val = 0;
  110. struct wcd937x_pdata *pdata = NULL;
  111. pdata = dev_get_platdata(wcd937x->dev);
  112. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  113. if ((val & 0xA0) != 0) {
  114. dev_dbg(wcd937x->dev, "%s Clear OCP interupts\n", __func__);
  115. regmap_update_bits(wcd937x->regmap,
  116. WCD937X_DIGITAL_INTR_CLEAR_0, 0xA0, 0x00);
  117. }
  118. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  119. if ((val & 0x14) != 0) {
  120. dev_dbg(wcd937x->dev, "%s Clear SCD interupts\n", __func__);
  121. regmap_update_bits(wcd937x->regmap,
  122. WCD937X_DIGITAL_INTR_CLEAR_1, 0x14, 0x00);
  123. }
  124. return IRQ_HANDLED;
  125. }
  126. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  127. {
  128. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  129. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  130. usleep_range(1000, 1010);
  131. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  132. usleep_range(1000, 1010);
  133. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  134. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  135. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  136. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  137. usleep_range(10000, 10010);
  138. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  139. return 0;
  140. }
  141. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  142. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  143. u8 *port_type, u8 path)
  144. {
  145. int i, j;
  146. u8 num_ports;
  147. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  148. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  149. switch (path) {
  150. case CODEC_RX:
  151. map = &wcd937x->rx_port_mapping;
  152. num_ports = wcd937x->num_rx_ports;
  153. break;
  154. case CODEC_TX:
  155. map = &wcd937x->tx_port_mapping;
  156. num_ports = wcd937x->num_tx_ports;
  157. break;
  158. }
  159. for (i = 0; i <= num_ports; i++) {
  160. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  161. if ((*map)[i][j].slave_port_type == slv_prt_type)
  162. goto found;
  163. }
  164. }
  165. found:
  166. if (i > num_ports || j == MAX_CH_PER_PORT) {
  167. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  168. __func__, slv_prt_type);
  169. return -EINVAL;
  170. }
  171. *port_id = i;
  172. *num_ch = (*map)[i][j].num_ch;
  173. *ch_mask = (*map)[i][j].ch_mask;
  174. *ch_rate = (*map)[i][j].ch_rate;
  175. *port_type = (*map)[i][j].master_port_type;
  176. return 0;
  177. }
  178. static int wcd937x_parse_port_mapping(struct device *dev,
  179. char *prop, u8 path)
  180. {
  181. u32 *dt_array, map_size, map_length;
  182. u32 port_num, ch_mask, ch_rate, old_port_num = 0;
  183. u32 slave_port_type, master_port_type;
  184. u32 i, ch_iter = 0;
  185. int ret = 0;
  186. u8 *num_ports;
  187. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  188. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  189. switch (path) {
  190. case CODEC_RX:
  191. map = &wcd937x->rx_port_mapping;
  192. num_ports = &wcd937x->num_rx_ports;
  193. break;
  194. case CODEC_TX:
  195. map = &wcd937x->tx_port_mapping;
  196. num_ports = &wcd937x->num_tx_ports;
  197. break;
  198. }
  199. if (!of_find_property(dev->of_node, prop,
  200. &map_size)) {
  201. dev_err(dev, "missing port mapping prop %s\n", prop);
  202. goto err_pdata_fail;
  203. }
  204. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  205. dt_array = kzalloc(map_size, GFP_KERNEL);
  206. if (!dt_array) {
  207. ret = -ENOMEM;
  208. goto err_pdata_fail;
  209. }
  210. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  211. NUM_SWRS_DT_PARAMS * map_length);
  212. if (ret) {
  213. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  214. __func__, prop);
  215. goto err_pdata_fail;
  216. }
  217. for (i = 0; i < map_length; i++) {
  218. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  219. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  220. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  221. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  222. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  223. if (port_num != old_port_num)
  224. ch_iter = 0;
  225. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  226. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  227. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  228. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  229. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  230. old_port_num = port_num;
  231. }
  232. *num_ports = port_num;
  233. kfree(dt_array);
  234. return 0;
  235. err_pdata_fail:
  236. kfree(dt_array);
  237. return -EINVAL;
  238. }
  239. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  240. u8 slv_port_type, u8 enable)
  241. {
  242. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  243. u8 port_id;
  244. u8 num_ch;
  245. u8 ch_mask;
  246. u32 ch_rate;
  247. u8 port_type;
  248. u8 num_port = 1;
  249. int ret = 0;
  250. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  251. &num_ch, &ch_mask, &ch_rate,
  252. &port_type, CODEC_TX);
  253. if (ret)
  254. return ret;
  255. if (enable)
  256. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  257. num_port, &ch_mask, &ch_rate,
  258. &num_ch, &port_type);
  259. else
  260. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  261. num_port, &ch_mask, &port_type);
  262. return ret;
  263. }
  264. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  265. u8 slv_port_type, u8 enable)
  266. {
  267. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  268. u8 port_id;
  269. u8 num_ch;
  270. u8 ch_mask;
  271. u32 ch_rate;
  272. u8 port_type;
  273. u8 num_port = 1;
  274. int ret = 0;
  275. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  276. &num_ch, &ch_mask, &ch_rate,
  277. &port_type, CODEC_RX);
  278. if (ret)
  279. return ret;
  280. if (enable)
  281. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  282. num_port, &ch_mask, &ch_rate,
  283. &num_ch, &port_type);
  284. else
  285. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  286. num_port, &ch_mask, &port_type);
  287. return ret;
  288. }
  289. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  290. {
  291. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  292. if (wcd937x->rx_clk_cnt == 0) {
  293. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  294. 0x08, 0x08);
  295. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  296. 0x01, 0x01);
  297. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  298. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  299. 0x40, 0x00);
  300. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  301. 0x40, 0x00);
  302. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  303. 0x40, 0x00);
  304. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  305. 0x02, 0x02);
  306. }
  307. wcd937x->rx_clk_cnt++;
  308. return 0;
  309. }
  310. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  311. {
  312. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  313. wcd937x->rx_clk_cnt--;
  314. if (wcd937x->rx_clk_cnt == 0) {
  315. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  316. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  317. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  318. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  319. 0x02, 0x00);
  320. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  321. 0x01, 0x00);
  322. }
  323. return 0;
  324. }
  325. /*
  326. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  327. * @codec: handle to snd_soc_codec *
  328. *
  329. * return wcd937x_mbhc handle or error code in case of failure
  330. */
  331. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  332. {
  333. struct wcd937x_priv *wcd937x;
  334. if (!codec) {
  335. pr_err("%s: Invalid params, NULL codec\n", __func__);
  336. return NULL;
  337. }
  338. wcd937x = snd_soc_codec_get_drvdata(codec);
  339. if (!wcd937x) {
  340. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  341. return NULL;
  342. }
  343. return wcd937x->mbhc;
  344. }
  345. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  346. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  347. struct snd_kcontrol *kcontrol,
  348. int event)
  349. {
  350. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  351. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  352. int ret = 0;
  353. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  354. w->name, event);
  355. switch (event) {
  356. case SND_SOC_DAPM_PRE_PMU:
  357. wcd937x_rx_clk_enable(codec);
  358. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  359. 0x01, 0x01);
  360. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  361. 0x04, 0x04);
  362. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  363. 0x80, 0x00);
  364. break;
  365. case SND_SOC_DAPM_POST_PMU:
  366. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  367. 0x0F, 0x02);
  368. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  369. 0x02, 0x02);
  370. usleep_range(5000, 5010);
  371. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  372. 0x02, 0x00);
  373. break;
  374. case SND_SOC_DAPM_POST_PMD:
  375. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  376. wcd937x->rx_swr_dev->dev_num,
  377. false);
  378. break;
  379. }
  380. return ret;
  381. }
  382. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  383. struct snd_kcontrol *kcontrol,
  384. int event)
  385. {
  386. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  387. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  388. int ret = 0;
  389. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  390. w->name, event);
  391. switch (event) {
  392. case SND_SOC_DAPM_PRE_PMU:
  393. wcd937x_rx_clk_enable(codec);
  394. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  395. 0x02, 0x02);
  396. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  397. 0x08, 0x08);
  398. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  399. 0x80, 0x00);
  400. break;
  401. case SND_SOC_DAPM_POST_PMU:
  402. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  403. 0x0F, 0x02);
  404. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  405. 0x01, 0x01);
  406. usleep_range(5000, 5010);
  407. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  408. 0x02, 0x00);
  409. break;
  410. case SND_SOC_DAPM_POST_PMD:
  411. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  412. wcd937x->rx_swr_dev->dev_num,
  413. false);
  414. break;
  415. }
  416. return ret;
  417. }
  418. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  419. struct snd_kcontrol *kcontrol,
  420. int event)
  421. {
  422. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  423. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  424. int ret = 0;
  425. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  426. w->name, event);
  427. switch (event) {
  428. case SND_SOC_DAPM_PRE_PMU:
  429. wcd937x_rx_clk_enable(codec);
  430. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  431. 0x04, 0x04);
  432. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  433. 0x01, 0x01);
  434. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  435. 0x02, 0x02);
  436. usleep_range(5000, 5010);
  437. break;
  438. case SND_SOC_DAPM_POST_PMD:
  439. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  440. wcd937x->rx_swr_dev->dev_num,
  441. false);
  442. break;
  443. };
  444. return ret;
  445. }
  446. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  447. struct snd_kcontrol *kcontrol,
  448. int event)
  449. {
  450. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  451. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  452. int ret = 0;
  453. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  454. w->name, event);
  455. switch (event) {
  456. case SND_SOC_DAPM_PRE_PMU:
  457. wcd937x_rx_clk_enable(codec);
  458. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  459. 0x04, 0x04);
  460. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  461. 0x04, 0x04);
  462. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  463. 0x01, 0x01);
  464. break;
  465. case SND_SOC_DAPM_POST_PMD:
  466. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  467. wcd937x->rx_swr_dev->dev_num,
  468. false);
  469. wcd937x_rx_clk_disable(codec);
  470. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  471. 0x04, 0x00);
  472. break;
  473. };
  474. return ret;
  475. }
  476. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  477. struct snd_kcontrol *kcontrol,
  478. int event)
  479. {
  480. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  481. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  482. int ret = 0;
  483. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  484. w->name, event);
  485. switch (event) {
  486. case SND_SOC_DAPM_PRE_PMU:
  487. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  488. usleep_range(100, 110);
  489. break;
  490. case SND_SOC_DAPM_POST_PMU:
  491. usleep_range(7000, 7010);
  492. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  493. 0x02, 0x02);
  494. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  495. 0x02, 0x02);
  496. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  497. wcd937x->rx_swr_dev->dev_num,
  498. true);
  499. break;
  500. case SND_SOC_DAPM_POST_PMD:
  501. usleep_range(7000, 7010);
  502. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  503. break;
  504. };
  505. return ret;
  506. }
  507. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  508. struct snd_kcontrol *kcontrol,
  509. int event)
  510. {
  511. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  512. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  513. int ret = 0;
  514. switch (event) {
  515. case SND_SOC_DAPM_PRE_PMU:
  516. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x0C, 0x08);
  517. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  518. usleep_range(100, 110);
  519. break;
  520. case SND_SOC_DAPM_POST_PMU:
  521. usleep_range(7000, 7010);
  522. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  523. 0x02, 0x02);
  524. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  525. 0x02, 0x02);
  526. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  527. wcd937x->rx_swr_dev->dev_num,
  528. true);
  529. break;
  530. case SND_SOC_DAPM_POST_PMD:
  531. usleep_range(7000, 7010);
  532. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  533. break;
  534. };
  535. return ret;
  536. }
  537. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  538. struct snd_kcontrol *kcontrol,
  539. int event)
  540. {
  541. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  542. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  543. int ret = 0;
  544. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  545. w->name, event);
  546. switch (event) {
  547. case SND_SOC_DAPM_PRE_PMU:
  548. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  549. 0x80, 0x80);
  550. usleep_range(500, 510);
  551. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  552. usleep_range(500, 510);
  553. break;
  554. case SND_SOC_DAPM_POST_PMU:
  555. usleep_range(1000, 1010);
  556. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  557. 0x20, 0x20);
  558. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  559. wcd937x->rx_swr_dev->dev_num,
  560. true);
  561. break;
  562. case SND_SOC_DAPM_POST_PMD:
  563. usleep_range(1000, 1010);
  564. usleep_range(1000, 1010);
  565. break;
  566. };
  567. return ret;
  568. }
  569. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  570. struct snd_kcontrol *kcontrol,
  571. int event)
  572. {
  573. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  574. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  575. int ret = 0;
  576. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  577. w->name, event);
  578. switch (event) {
  579. case SND_SOC_DAPM_PRE_PMU:
  580. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  581. 0x08, 0x08);
  582. usleep_range(500, 510);
  583. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  584. usleep_range(500, 510);
  585. break;
  586. case SND_SOC_DAPM_POST_PMU:
  587. usleep_range(6000, 6010);
  588. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  589. 0x02, 0x02);
  590. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  591. wcd937x->rx_swr_dev->dev_num,
  592. true);
  593. break;
  594. case SND_SOC_DAPM_POST_PMD:
  595. usleep_range(7000, 7010);
  596. break;
  597. };
  598. return ret;
  599. }
  600. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  601. struct snd_kcontrol *kcontrol,
  602. int event)
  603. {
  604. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  605. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  606. w->name, event);
  607. switch (event) {
  608. case SND_SOC_DAPM_PRE_PMU:
  609. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  610. 0xF0, 0x80);
  611. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  612. 0xE0, 0xA0);
  613. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  614. 0x02, 0x02);
  615. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  616. 0xFF, 0x1C);
  617. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  618. 0x40, 0x40);
  619. usleep_range(100, 110);
  620. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  621. 0xE0, 0xE0);
  622. usleep_range(100, 110);
  623. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  624. 0x80, 0x80);
  625. usleep_range(500, 510);
  626. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  627. usleep_range(500, 510);
  628. wcd937x_rx_connect_port(codec, HPH_L, true);
  629. wcd937x_rx_connect_port(codec, COMP_L, true);
  630. break;
  631. case SND_SOC_DAPM_POST_PMD:
  632. wcd937x_rx_connect_port(codec, HPH_L, false);
  633. wcd937x_rx_connect_port(codec, COMP_L, false);
  634. wcd937x_rx_clk_disable(codec);
  635. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  636. 0x01, 0x00);
  637. break;
  638. };
  639. return 0;
  640. }
  641. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  642. struct snd_kcontrol *kcontrol, int event)
  643. {
  644. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  645. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  646. w->name, event);
  647. switch (event) {
  648. case SND_SOC_DAPM_PRE_PMU:
  649. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  650. 0xF0, 0x80);
  651. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  652. 0xE0, 0xA0);
  653. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  654. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  655. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  656. 0x40, 0x40);
  657. usleep_range(100, 110);
  658. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  659. 0xE0, 0xE0);
  660. usleep_range(100, 110);
  661. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  662. 0x80, 0x80);
  663. usleep_range(500, 510);
  664. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  665. usleep_range(500, 510);
  666. wcd937x_rx_connect_port(codec, HPH_R, true);
  667. wcd937x_rx_connect_port(codec, COMP_R, true);
  668. break;
  669. case SND_SOC_DAPM_POST_PMD:
  670. wcd937x_rx_connect_port(codec, HPH_R, false);
  671. wcd937x_rx_connect_port(codec, COMP_R, false);
  672. wcd937x_rx_clk_disable(codec);
  673. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  674. 0x02, 0x00);
  675. break;
  676. };
  677. return 0;
  678. }
  679. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  680. struct snd_kcontrol *kcontrol,
  681. int event)
  682. {
  683. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  684. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  685. w->name, event);
  686. switch (event) {
  687. case SND_SOC_DAPM_PRE_PMU:
  688. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  689. 0xE0, 0xA0);
  690. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  691. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  692. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  693. 0x40, 0x40);
  694. usleep_range(100, 110);
  695. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  696. 0xE0, 0xE0);
  697. usleep_range(100, 110);
  698. wcd937x_rx_connect_port(codec, LO, true);
  699. break;
  700. case SND_SOC_DAPM_POST_PMD:
  701. wcd937x_rx_connect_port(codec, LO, false);
  702. usleep_range(6000, 6010);
  703. wcd937x_rx_clk_disable(codec);
  704. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  705. 0x04, 0x00);
  706. break;
  707. }
  708. return 0;
  709. }
  710. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  711. struct snd_kcontrol *kcontrol,
  712. int event)
  713. {
  714. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  715. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  716. u16 dmic_clk_reg;
  717. s32 *dmic_clk_cnt;
  718. unsigned int dmic;
  719. char *wname;
  720. int ret = 0;
  721. wname = strpbrk(w->name, "012345");
  722. if (!wname) {
  723. dev_err(codec->dev, "%s: widget not found\n", __func__);
  724. return -EINVAL;
  725. }
  726. ret = kstrtouint(wname, 10, &dmic);
  727. if (ret < 0) {
  728. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  729. __func__);
  730. return -EINVAL;
  731. }
  732. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  733. w->name, event);
  734. switch (dmic) {
  735. case 0:
  736. case 1:
  737. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  738. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  739. break;
  740. case 2:
  741. case 3:
  742. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  743. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  744. break;
  745. case 4:
  746. case 5:
  747. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  748. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  749. break;
  750. default:
  751. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  752. __func__);
  753. return -EINVAL;
  754. };
  755. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  756. __func__, event, dmic, *dmic_clk_cnt);
  757. switch (event) {
  758. case SND_SOC_DAPM_PRE_PMU:
  759. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  760. 0x80, 0x80);
  761. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  762. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  763. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  764. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  765. break;
  766. case SND_SOC_DAPM_POST_PMD:
  767. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  768. break;
  769. };
  770. return 0;
  771. }
  772. /*
  773. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  774. * @micb_mv: micbias in mv
  775. *
  776. * return register value converted
  777. */
  778. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  779. {
  780. /* min micbias voltage is 1V and maximum is 2.85V */
  781. if (micb_mv < 1000 || micb_mv > 2850) {
  782. pr_err("%s: unsupported micbias voltage\n", __func__);
  783. return -EINVAL;
  784. }
  785. return (micb_mv - 1000) / 50;
  786. }
  787. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  788. /*
  789. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  790. * @codec: handle to snd_soc_codec *
  791. * @req_volt: micbias voltage to be set
  792. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  793. *
  794. * return 0 if adjustment is success or error code in case of failure
  795. */
  796. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  797. int req_volt, int micb_num)
  798. {
  799. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  800. int cur_vout_ctl, req_vout_ctl;
  801. int micb_reg, micb_val, micb_en;
  802. int ret = 0;
  803. switch (micb_num) {
  804. case MIC_BIAS_1:
  805. micb_reg = WCD937X_ANA_MICB1;
  806. break;
  807. case MIC_BIAS_2:
  808. micb_reg = WCD937X_ANA_MICB2;
  809. break;
  810. case MIC_BIAS_3:
  811. micb_reg = WCD937X_ANA_MICB3;
  812. break;
  813. default:
  814. return -EINVAL;
  815. }
  816. mutex_lock(&wcd937x->micb_lock);
  817. /*
  818. * If requested micbias voltage is same as current micbias
  819. * voltage, then just return. Otherwise, adjust voltage as
  820. * per requested value. If micbias is already enabled, then
  821. * to avoid slow micbias ramp-up or down enable pull-up
  822. * momentarily, change the micbias value and then re-enable
  823. * micbias.
  824. */
  825. micb_val = snd_soc_read(codec, micb_reg);
  826. micb_en = (micb_val & 0xC0) >> 6;
  827. cur_vout_ctl = micb_val & 0x3F;
  828. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  829. if (req_vout_ctl < 0) {
  830. ret = -EINVAL;
  831. goto exit;
  832. }
  833. if (cur_vout_ctl == req_vout_ctl) {
  834. ret = 0;
  835. goto exit;
  836. }
  837. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  838. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  839. req_volt, micb_en);
  840. if (micb_en == 0x1)
  841. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  842. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  843. if (micb_en == 0x1) {
  844. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  845. /*
  846. * Add 2ms delay as per HW requirement after enabling
  847. * micbias
  848. */
  849. usleep_range(2000, 2100);
  850. }
  851. exit:
  852. mutex_unlock(&wcd937x->micb_lock);
  853. return ret;
  854. }
  855. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  856. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  857. struct snd_kcontrol *kcontrol,
  858. int event)
  859. {
  860. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  861. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  862. int ret = 0;
  863. switch (event) {
  864. case SND_SOC_DAPM_PRE_PMU:
  865. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  866. wcd937x->tx_swr_dev->dev_num,
  867. true);
  868. break;
  869. case SND_SOC_DAPM_POST_PMD:
  870. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  871. wcd937x->tx_swr_dev->dev_num,
  872. false);
  873. break;
  874. };
  875. return ret;
  876. }
  877. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  878. struct snd_kcontrol *kcontrol,
  879. int event){
  880. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  881. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  882. w->name, event);
  883. switch (event) {
  884. case SND_SOC_DAPM_PRE_PMU:
  885. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  886. 0x80, 0x80);
  887. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  888. 0x08, 0x08);
  889. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  890. 0x10, 0x10);
  891. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  892. break;
  893. case SND_SOC_DAPM_POST_PMD:
  894. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  895. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  896. 0x08, 0x00);
  897. break;
  898. };
  899. return 0;
  900. }
  901. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  902. struct snd_kcontrol *kcontrol, int event)
  903. {
  904. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  905. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  906. w->name, event);
  907. switch (event) {
  908. case SND_SOC_DAPM_PRE_PMU:
  909. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  910. 0x02, 0x02);
  911. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  912. 0x00);
  913. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  914. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  915. 0x30, 0x30);
  916. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  917. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  918. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  919. break;
  920. case SND_SOC_DAPM_POST_PMD:
  921. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  922. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  923. 0x10, 0x00);
  924. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  925. 0x10, 0x00);
  926. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  927. 0x80, 0x00);
  928. break;
  929. };
  930. return 0;
  931. }
  932. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  933. int micb_num, int req, bool is_dapm)
  934. {
  935. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  936. int micb_index = micb_num - 1;
  937. u16 micb_reg;
  938. int pre_off_event = 0, post_off_event = 0;
  939. int post_on_event = 0, post_dapm_off = 0;
  940. int post_dapm_on = 0;
  941. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  942. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  943. __func__, micb_index);
  944. return -EINVAL;
  945. }
  946. switch (micb_num) {
  947. case MIC_BIAS_1:
  948. micb_reg = WCD937X_ANA_MICB1;
  949. break;
  950. case MIC_BIAS_2:
  951. micb_reg = WCD937X_ANA_MICB2;
  952. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  953. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  954. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  955. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  956. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  957. break;
  958. case MIC_BIAS_3:
  959. micb_reg = WCD937X_ANA_MICB3;
  960. break;
  961. default:
  962. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  963. __func__, micb_num);
  964. return -EINVAL;
  965. };
  966. mutex_lock(&wcd937x->micb_lock);
  967. switch (req) {
  968. case MICB_PULLUP_ENABLE:
  969. wcd937x->pullup_ref[micb_index]++;
  970. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  971. (wcd937x->micb_ref[micb_index] == 0))
  972. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  973. break;
  974. case MICB_PULLUP_DISABLE:
  975. if (wcd937x->pullup_ref[micb_index] > 0)
  976. wcd937x->pullup_ref[micb_index]--;
  977. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  978. (wcd937x->micb_ref[micb_index] == 0))
  979. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  980. break;
  981. case MICB_ENABLE:
  982. wcd937x->micb_ref[micb_index]++;
  983. if (wcd937x->micb_ref[micb_index] == 1) {
  984. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  985. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  986. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  987. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  988. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  989. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  990. if (post_on_event)
  991. blocking_notifier_call_chain(&wcd937x->notifier,
  992. post_on_event,
  993. &wcd937x->mbhc);
  994. }
  995. if (is_dapm && post_dapm_on)
  996. blocking_notifier_call_chain(&wcd937x->notifier,
  997. post_dapm_on,
  998. &wcd937x->mbhc);
  999. break;
  1000. case MICB_DISABLE:
  1001. if (wcd937x->micb_ref[micb_index] > 0)
  1002. wcd937x->micb_ref[micb_index]--;
  1003. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1004. (wcd937x->pullup_ref[micb_index] > 0))
  1005. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1006. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1007. (wcd937x->pullup_ref[micb_index] == 0)) {
  1008. if (pre_off_event)
  1009. blocking_notifier_call_chain(&wcd937x->notifier,
  1010. pre_off_event,
  1011. &wcd937x->mbhc);
  1012. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1013. if (post_off_event)
  1014. blocking_notifier_call_chain(&wcd937x->notifier,
  1015. post_off_event,
  1016. &wcd937x->mbhc);
  1017. }
  1018. if (is_dapm && post_dapm_off)
  1019. blocking_notifier_call_chain(&wcd937x->notifier,
  1020. post_dapm_off,
  1021. &wcd937x->mbhc);
  1022. break;
  1023. };
  1024. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1025. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1026. wcd937x->pullup_ref[micb_index]);
  1027. mutex_unlock(&wcd937x->micb_lock);
  1028. return 0;
  1029. }
  1030. EXPORT_SYMBOL(wcd937x_micbias_control);
  1031. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1032. int event)
  1033. {
  1034. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1035. int micb_num;
  1036. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1037. __func__, w->name, event);
  1038. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1039. micb_num = MIC_BIAS_1;
  1040. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1041. micb_num = MIC_BIAS_2;
  1042. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1043. micb_num = MIC_BIAS_3;
  1044. else
  1045. return -EINVAL;
  1046. switch (event) {
  1047. case SND_SOC_DAPM_PRE_PMU:
  1048. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1049. break;
  1050. case SND_SOC_DAPM_POST_PMU:
  1051. usleep_range(1000, 1100);
  1052. break;
  1053. case SND_SOC_DAPM_POST_PMD:
  1054. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1055. break;
  1056. };
  1057. return 0;
  1058. }
  1059. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1060. struct snd_kcontrol *kcontrol,
  1061. int event)
  1062. {
  1063. return __wcd937x_codec_enable_micbias(w, event);
  1064. }
  1065. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1066. struct snd_ctl_elem_value *ucontrol)
  1067. {
  1068. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1069. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1070. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1071. return 0;
  1072. }
  1073. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1074. struct snd_ctl_elem_value *ucontrol)
  1075. {
  1076. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1077. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1078. u32 mode_val;
  1079. mode_val = ucontrol->value.enumerated.item[0];
  1080. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1081. if (mode_val == 0) {
  1082. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1083. __func__);
  1084. mode_val = 3; /* enum will be updated later */
  1085. }
  1086. wcd937x->hph_mode = mode_val;
  1087. return 0;
  1088. }
  1089. static const char * const rx_hph_mode_mux_text[] = {
  1090. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1091. "CLS_H_ULP", "CLS_AB_HIFI",
  1092. };
  1093. static const struct soc_enum rx_hph_mode_mux_enum =
  1094. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1095. rx_hph_mode_mux_text);
  1096. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1097. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1098. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1099. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1100. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1101. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1102. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1103. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1104. };
  1105. static const struct snd_kcontrol_new adc1_switch[] = {
  1106. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1107. };
  1108. static const struct snd_kcontrol_new adc2_switch[] = {
  1109. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1110. };
  1111. static const struct snd_kcontrol_new adc3_switch[] = {
  1112. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1113. };
  1114. static const struct snd_kcontrol_new dmic1_switch[] = {
  1115. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1116. };
  1117. static const struct snd_kcontrol_new dmic2_switch[] = {
  1118. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1119. };
  1120. static const struct snd_kcontrol_new dmic3_switch[] = {
  1121. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1122. };
  1123. static const struct snd_kcontrol_new dmic4_switch[] = {
  1124. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1125. };
  1126. static const struct snd_kcontrol_new dmic5_switch[] = {
  1127. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1128. };
  1129. static const struct snd_kcontrol_new dmic6_switch[] = {
  1130. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1131. };
  1132. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1133. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1134. };
  1135. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1136. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1137. };
  1138. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1139. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1140. };
  1141. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1142. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1143. };
  1144. static const char * const adc2_mux_text[] = {
  1145. "INP2", "INP3"
  1146. };
  1147. static const char * const rdac3_mux_text[] = {
  1148. "RX1", "RX3"
  1149. };
  1150. static const struct soc_enum adc2_enum =
  1151. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1152. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1153. static const struct soc_enum rdac3_enum =
  1154. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1155. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1156. static const struct snd_kcontrol_new tx_adc2_mux =
  1157. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1158. static const struct snd_kcontrol_new rx_rdac3_mux =
  1159. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1160. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1161. /*input widgets*/
  1162. SND_SOC_DAPM_INPUT("AMIC1"),
  1163. SND_SOC_DAPM_INPUT("AMIC2"),
  1164. SND_SOC_DAPM_INPUT("AMIC3"),
  1165. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1166. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1167. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1168. /*tx widgets*/
  1169. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1170. wcd937x_codec_enable_adc,
  1171. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1172. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1173. wcd937x_codec_enable_adc,
  1174. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1175. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1176. NULL, 0, wcd937x_enable_req,
  1177. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1178. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1179. NULL, 0, wcd937x_enable_req,
  1180. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1181. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1182. &tx_adc2_mux),
  1183. /*tx mixers*/
  1184. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1185. adc1_switch, ARRAY_SIZE(adc1_switch),
  1186. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1187. SND_SOC_DAPM_POST_PMD),
  1188. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1189. adc2_switch, ARRAY_SIZE(adc2_switch),
  1190. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1191. SND_SOC_DAPM_POST_PMD),
  1192. /* micbias widgets*/
  1193. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1194. wcd937x_codec_enable_micbias,
  1195. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1196. SND_SOC_DAPM_POST_PMD),
  1197. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1198. wcd937x_codec_enable_micbias,
  1199. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1200. SND_SOC_DAPM_POST_PMD),
  1201. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1202. wcd937x_codec_enable_micbias,
  1203. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1204. SND_SOC_DAPM_POST_PMD),
  1205. /*rx widgets*/
  1206. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1207. wcd937x_codec_enable_ear_pa,
  1208. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1209. SND_SOC_DAPM_POST_PMD),
  1210. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1211. wcd937x_codec_enable_aux_pa,
  1212. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1213. SND_SOC_DAPM_POST_PMD),
  1214. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1215. wcd937x_codec_enable_hphl_pa,
  1216. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1217. SND_SOC_DAPM_POST_PMD),
  1218. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1219. wcd937x_codec_enable_hphr_pa,
  1220. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1221. SND_SOC_DAPM_POST_PMD),
  1222. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1223. wcd937x_codec_hphl_dac_event,
  1224. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1225. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1226. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1227. wcd937x_codec_hphr_dac_event,
  1228. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1229. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1230. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1231. wcd937x_codec_ear_dac_event,
  1232. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1233. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1234. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1235. wcd937x_codec_aux_dac_event,
  1236. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1237. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1238. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1239. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1240. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1241. SND_SOC_DAPM_POST_PMD),
  1242. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1243. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1244. SND_SOC_DAPM_POST_PMD),
  1245. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1246. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1247. SND_SOC_DAPM_POST_PMD),
  1248. /* rx mixer widgets*/
  1249. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1250. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1251. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1252. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1253. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1254. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1255. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1256. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1257. /*output widgets tx*/
  1258. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1259. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1260. /*output widgets rx*/
  1261. SND_SOC_DAPM_OUTPUT("EAR"),
  1262. SND_SOC_DAPM_OUTPUT("AUX"),
  1263. SND_SOC_DAPM_OUTPUT("HPHL"),
  1264. SND_SOC_DAPM_OUTPUT("HPHR"),
  1265. };
  1266. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1267. /*input widgets*/
  1268. SND_SOC_DAPM_INPUT("AMIC4"),
  1269. /*tx widgets*/
  1270. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1271. wcd937x_codec_enable_adc,
  1272. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1273. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1274. NULL, 0, wcd937x_enable_req,
  1275. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1276. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1277. wcd937x_codec_enable_dmic,
  1278. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1279. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1280. wcd937x_codec_enable_dmic,
  1281. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1282. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1283. wcd937x_codec_enable_dmic,
  1284. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1285. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1286. wcd937x_codec_enable_dmic,
  1287. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1288. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1289. wcd937x_codec_enable_dmic,
  1290. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1291. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1292. wcd937x_codec_enable_dmic,
  1293. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1294. /*tx mixer widgets*/
  1295. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1296. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1297. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1298. SND_SOC_DAPM_POST_PMD),
  1299. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1300. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1301. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1302. SND_SOC_DAPM_POST_PMD),
  1303. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1304. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1305. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1306. SND_SOC_DAPM_POST_PMD),
  1307. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1308. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1309. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1310. SND_SOC_DAPM_POST_PMD),
  1311. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1312. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1313. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1314. SND_SOC_DAPM_POST_PMD),
  1315. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1316. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1317. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1318. SND_SOC_DAPM_POST_PMD),
  1319. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1320. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1321. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1322. /*output widgets*/
  1323. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1324. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1325. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1326. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1327. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1328. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1329. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1330. };
  1331. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1332. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1333. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1334. {"ADC1 REQ", NULL, "ADC1"},
  1335. {"ADC1", NULL, "AMIC1"},
  1336. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1337. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1338. {"ADC2 REQ", NULL, "ADC2"},
  1339. {"ADC2", NULL, "ADC2 MUX"},
  1340. {"ADC2 MUX", "INP3", "AMIC3"},
  1341. {"ADC2 MUX", "INP2", "AMIC2"},
  1342. {"RX1", NULL, "IN1_HPHL"},
  1343. {"RDAC1", NULL, "RX1"},
  1344. {"HPHL_RDAC", "Switch", "RDAC1"},
  1345. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1346. {"HPHL", NULL, "HPHL PGA"},
  1347. {"RX2", NULL, "IN2_HPHR"},
  1348. {"RDAC2", NULL, "RX2"},
  1349. {"HPHR_RDAC", "Switch", "RDAC2"},
  1350. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1351. {"HPHR", NULL, "HPHR PGA"},
  1352. {"RX3", NULL, "IN3_AUX"},
  1353. {"RDAC4", NULL, "RX3"},
  1354. {"AUX_RDAC", "Switch", "RDAC4"},
  1355. {"AUX PGA", NULL, "AUX_RDAC"},
  1356. {"AUX", NULL, "AUX PGA"},
  1357. {"RDAC3_MUX", "RX3", "RX3"},
  1358. {"RDAC3_MUX", "RX1", "RX1"},
  1359. {"RDAC3", NULL, "RDAC3_MUX"},
  1360. {"EAR_RDAC", "Switch", "RDAC3"},
  1361. {"EAR PGA", NULL, "EAR_RDAC"},
  1362. {"EAR", NULL, "EAR PGA"},
  1363. };
  1364. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1365. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1366. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1367. {"ADC3 REQ", NULL, "ADC3"},
  1368. {"ADC3", NULL, "AMIC4"},
  1369. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1370. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1371. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1372. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1373. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1374. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1375. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1376. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1377. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1378. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1379. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1380. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1381. };
  1382. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1383. {
  1384. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1385. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1386. int variant;
  1387. int ret = -EINVAL;
  1388. dev_info(codec->dev, "%s()\n", __func__);
  1389. wcd937x = snd_soc_codec_get_drvdata(codec);
  1390. if (!wcd937x)
  1391. return -EINVAL;
  1392. wcd937x->codec = codec;
  1393. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1394. wcd937x->variant = variant;
  1395. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1396. sizeof(*(wcd937x->fw_data)),
  1397. GFP_KERNEL);
  1398. if (!wcd937x->fw_data) {
  1399. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1400. ret = -ENOMEM;
  1401. goto err;
  1402. }
  1403. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1404. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1405. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1406. if (ret < 0) {
  1407. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1408. goto err_hwdep;
  1409. }
  1410. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1411. if (ret) {
  1412. pr_err("%s: mbhc initialization failed\n", __func__);
  1413. goto err_hwdep;
  1414. }
  1415. wcd937x_init_reg(codec);
  1416. if (wcd937x->variant == WCD9375_VARIANT) {
  1417. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1418. ARRAY_SIZE(wcd9375_dapm_widgets));
  1419. if (ret < 0) {
  1420. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1421. __func__);
  1422. goto err_hwdep;
  1423. }
  1424. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1425. ARRAY_SIZE(wcd9375_audio_map));
  1426. if (ret < 0) {
  1427. dev_err(codec->dev, "%s: Failed to add routes\n",
  1428. __func__);
  1429. goto err_hwdep;
  1430. }
  1431. ret = snd_soc_dapm_new_widgets(dapm->card);
  1432. if (ret < 0) {
  1433. dev_err(codec->dev, "%s: Failed to add widgets\n",
  1434. __func__);
  1435. goto err_hwdep;
  1436. }
  1437. }
  1438. return ret;
  1439. err_hwdep:
  1440. wcd937x->fw_data = NULL;
  1441. err:
  1442. return ret;
  1443. }
  1444. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1445. {
  1446. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1447. if (!wcd937x)
  1448. return -EINVAL;
  1449. return 0;
  1450. }
  1451. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1452. {
  1453. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1454. return wcd937x->regmap;
  1455. }
  1456. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1457. .probe = wcd937x_soc_codec_probe,
  1458. .remove = wcd937x_soc_codec_remove,
  1459. .get_regmap = wcd937x_get_regmap,
  1460. .component_driver = {
  1461. .controls = wcd937x_snd_controls,
  1462. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1463. .dapm_widgets = wcd937x_dapm_widgets,
  1464. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1465. .dapm_routes = wcd937x_audio_map,
  1466. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1467. },
  1468. };
  1469. int wcd937x_reset(struct device *dev)
  1470. {
  1471. struct wcd937x_priv *wcd937x = NULL;
  1472. int rc = 0;
  1473. int value = 0;
  1474. if (!dev)
  1475. return -ENODEV;
  1476. wcd937x = dev_get_drvdata(dev);
  1477. if (!wcd937x)
  1478. return -EINVAL;
  1479. if (!wcd937x->rst_np) {
  1480. dev_err(dev, "%s: reset gpio device node not specified\n",
  1481. __func__);
  1482. return -EINVAL;
  1483. }
  1484. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1485. if (value > 0)
  1486. return 0;
  1487. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1488. if (rc) {
  1489. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1490. __func__);
  1491. return rc;
  1492. }
  1493. /* 20ms sleep required after pulling the reset gpio to LOW */
  1494. usleep_range(20, 30);
  1495. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1496. if (rc) {
  1497. dev_err(dev, "%s: wcd active state request fail!\n",
  1498. __func__);
  1499. return rc;
  1500. }
  1501. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1502. usleep_range(20, 30);
  1503. return rc;
  1504. }
  1505. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1506. {
  1507. struct wcd937x_pdata *pdata = NULL;
  1508. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1509. GFP_KERNEL);
  1510. if (!pdata)
  1511. return NULL;
  1512. pdata->rst_np = of_parse_phandle(dev->of_node,
  1513. "qcom,wcd-rst-gpio-node", 0);
  1514. if (!pdata->rst_np) {
  1515. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1516. __func__, "qcom,wcd-rst-gpio-node",
  1517. dev->of_node->full_name);
  1518. return NULL;
  1519. }
  1520. /* Parse power supplies */
  1521. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1522. &pdata->num_supplies);
  1523. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1524. dev_err(dev, "%s: no power supplies defined for codec\n",
  1525. __func__);
  1526. return NULL;
  1527. }
  1528. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1529. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1530. return pdata;
  1531. }
  1532. static int wcd937x_bind(struct device *dev)
  1533. {
  1534. int ret = 0, i = 0;
  1535. struct wcd937x_priv *wcd937x = NULL;
  1536. struct wcd937x_pdata *pdata = NULL;
  1537. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1538. if (!wcd937x)
  1539. return -ENOMEM;
  1540. dev_set_drvdata(dev, wcd937x);
  1541. pdata = wcd937x_populate_dt_data(dev);
  1542. if (!pdata) {
  1543. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1544. return -EINVAL;
  1545. }
  1546. wcd937x->rst_np = pdata->rst_np;
  1547. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  1548. pdata->regulator, pdata->num_supplies);
  1549. if (!wcd937x->supplies) {
  1550. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1551. __func__);
  1552. return ret;
  1553. }
  1554. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  1555. pdata->regulator,
  1556. pdata->num_supplies);
  1557. if (ret) {
  1558. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1559. __func__);
  1560. return ret;
  1561. }
  1562. wcd937x_reset(dev);
  1563. /*
  1564. * Add 5msec delay to provide sufficient time for
  1565. * soundwire auto enumeration of slave devices as
  1566. * as per HW requirement.
  1567. */
  1568. usleep_range(5000, 5010);
  1569. ret = component_bind_all(dev, wcd937x);
  1570. if (ret) {
  1571. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1572. __func__, ret);
  1573. return ret;
  1574. }
  1575. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1576. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1577. if (ret) {
  1578. dev_err(dev, "Failed to read port mapping\n");
  1579. goto err;
  1580. }
  1581. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1582. if (!wcd937x->rx_swr_dev) {
  1583. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1584. __func__);
  1585. ret = -ENODEV;
  1586. goto err;
  1587. }
  1588. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  1589. if (!wcd937x->tx_swr_dev) {
  1590. dev_err(dev, "%s: Could not find TX swr slave device\n",
  1591. __func__);
  1592. ret = -ENODEV;
  1593. goto err;
  1594. }
  1595. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  1596. &wcd937x_regmap_config);
  1597. if (!wcd937x->regmap) {
  1598. dev_err(dev, "%s: Regmap init failed\n",
  1599. __func__);
  1600. goto err;
  1601. }
  1602. /* Set all interupts as edge triggered */
  1603. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  1604. regmap_write(wcd937x->regmap,
  1605. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  1606. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  1607. wcd937x->irq_info.codec_name = "WCD937X";
  1608. wcd937x->irq_info.regmap = wcd937x->regmap;
  1609. wcd937x->irq_info.dev = dev;
  1610. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  1611. if (ret) {
  1612. dev_err(wcd937x->dev, "%s: IRQ init failed: %d\n",
  1613. __func__, ret);
  1614. goto err;
  1615. }
  1616. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  1617. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  1618. NULL, 0);
  1619. if (ret) {
  1620. dev_err(dev, "%s: Codec registration failed\n",
  1621. __func__);
  1622. goto err_irq;
  1623. }
  1624. return ret;
  1625. err_irq:
  1626. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  1627. err:
  1628. component_unbind_all(dev, wcd937x);
  1629. return ret;
  1630. }
  1631. static void wcd937x_unbind(struct device *dev)
  1632. {
  1633. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1634. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  1635. snd_soc_unregister_codec(dev);
  1636. component_unbind_all(dev, wcd937x);
  1637. }
  1638. static const struct of_device_id wcd937x_dt_match[] = {
  1639. { .compatible = "qcom,wcd937x-codec" },
  1640. {}
  1641. };
  1642. static const struct component_master_ops wcd937x_comp_ops = {
  1643. .bind = wcd937x_bind,
  1644. .unbind = wcd937x_unbind,
  1645. };
  1646. static int wcd937x_compare_of(struct device *dev, void *data)
  1647. {
  1648. return dev->of_node == data;
  1649. }
  1650. static void wcd937x_release_of(struct device *dev, void *data)
  1651. {
  1652. of_node_put(data);
  1653. }
  1654. static int wcd937x_add_slave_components(struct device *dev,
  1655. struct component_match **matchptr)
  1656. {
  1657. struct device_node *np, *rx_node, *tx_node;
  1658. np = dev->of_node;
  1659. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  1660. if (!rx_node) {
  1661. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  1662. return -ENODEV;
  1663. }
  1664. of_node_get(rx_node);
  1665. component_match_add_release(dev, matchptr,
  1666. wcd937x_release_of,
  1667. wcd937x_compare_of,
  1668. rx_node);
  1669. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  1670. if (!tx_node) {
  1671. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  1672. return -ENODEV;
  1673. }
  1674. of_node_get(tx_node);
  1675. component_match_add_release(dev, matchptr,
  1676. wcd937x_release_of,
  1677. wcd937x_compare_of,
  1678. tx_node);
  1679. return 0;
  1680. }
  1681. static int wcd937x_probe(struct platform_device *pdev)
  1682. {
  1683. struct component_match *match = NULL;
  1684. int ret;
  1685. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  1686. if (ret)
  1687. return ret;
  1688. return component_master_add_with_match(&pdev->dev,
  1689. &wcd937x_comp_ops, match);
  1690. }
  1691. static int wcd937x_remove(struct platform_device *pdev)
  1692. {
  1693. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  1694. return 0;
  1695. }
  1696. static struct platform_driver wcd937x_codec_driver = {
  1697. .probe = wcd937x_probe,
  1698. .remove = wcd937x_remove,
  1699. .driver = {
  1700. .name = "wcd937x_codec",
  1701. .owner = THIS_MODULE,
  1702. .of_match_table = of_match_ptr(wcd937x_dt_match),
  1703. },
  1704. };
  1705. module_platform_driver(wcd937x_codec_driver);
  1706. MODULE_DESCRIPTION("WCD937X Codec driver");
  1707. MODULE_LICENSE("GPL v2");