sm6150.c 238 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443844484458446844784488449845084518452845384548455845684578458845984608461846284638464846584668467
  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <soc/snd_event.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #include "codecs/wcd937x/internal.h"
  44. #define DRV_NAME "sm6150-asoc-snd"
  45. #define __CHIPSET__ "SM6150 "
  46. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  47. #define SAMPLING_RATE_8KHZ 8000
  48. #define SAMPLING_RATE_11P025KHZ 11025
  49. #define SAMPLING_RATE_16KHZ 16000
  50. #define SAMPLING_RATE_22P05KHZ 22050
  51. #define SAMPLING_RATE_32KHZ 32000
  52. #define SAMPLING_RATE_44P1KHZ 44100
  53. #define SAMPLING_RATE_48KHZ 48000
  54. #define SAMPLING_RATE_88P2KHZ 88200
  55. #define SAMPLING_RATE_96KHZ 96000
  56. #define SAMPLING_RATE_176P4KHZ 176400
  57. #define SAMPLING_RATE_192KHZ 192000
  58. #define SAMPLING_RATE_352P8KHZ 352800
  59. #define SAMPLING_RATE_384KHZ 384000
  60. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  61. #define WCD9XXX_MBHC_DEF_RLOADS 5
  62. #define CODEC_EXT_CLK_RATE 9600000
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define DEV_NAME_STR_LEN 32
  65. #define WSA8810_NAME_1 "wsa881x.20170211"
  66. #define WSA8810_NAME_2 "wsa881x.20170212"
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. #define TDM_CHANNEL_MAX 8
  70. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  71. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  72. #define MSM_HIFI_ON 1
  73. enum {
  74. SLIM_RX_0 = 0,
  75. SLIM_RX_1,
  76. SLIM_RX_2,
  77. SLIM_RX_3,
  78. SLIM_RX_4,
  79. SLIM_RX_5,
  80. SLIM_RX_6,
  81. SLIM_RX_7,
  82. SLIM_RX_MAX,
  83. };
  84. enum {
  85. SLIM_TX_0 = 0,
  86. SLIM_TX_1,
  87. SLIM_TX_2,
  88. SLIM_TX_3,
  89. SLIM_TX_4,
  90. SLIM_TX_5,
  91. SLIM_TX_6,
  92. SLIM_TX_7,
  93. SLIM_TX_8,
  94. SLIM_TX_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. QUIN_MI2S,
  102. MI2S_MAX,
  103. };
  104. enum {
  105. PRIM_AUX_PCM = 0,
  106. SEC_AUX_PCM,
  107. TERT_AUX_PCM,
  108. QUAT_AUX_PCM,
  109. QUIN_AUX_PCM,
  110. AUX_PCM_MAX,
  111. };
  112. enum {
  113. WSA_CDC_DMA_RX_0 = 0,
  114. WSA_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_0,
  116. RX_CDC_DMA_RX_1,
  117. RX_CDC_DMA_RX_2,
  118. RX_CDC_DMA_RX_3,
  119. RX_CDC_DMA_RX_5,
  120. CDC_DMA_RX_MAX,
  121. };
  122. enum {
  123. WSA_CDC_DMA_TX_0 = 0,
  124. WSA_CDC_DMA_TX_1,
  125. WSA_CDC_DMA_TX_2,
  126. TX_CDC_DMA_TX_0,
  127. TX_CDC_DMA_TX_3,
  128. TX_CDC_DMA_TX_4,
  129. CDC_DMA_TX_MAX,
  130. };
  131. struct mi2s_conf {
  132. struct mutex lock;
  133. u32 ref_cnt;
  134. u32 msm_is_mi2s_master;
  135. };
  136. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  137. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  142. };
  143. struct dev_config {
  144. u32 sample_rate;
  145. u32 bit_format;
  146. u32 channels;
  147. };
  148. enum {
  149. DP_RX_IDX = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. enum pinctrl_pin_state {
  161. STATE_DISABLE = 0, /* All pins are in sleep state */
  162. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  163. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  164. };
  165. struct msm_pinctrl_info {
  166. struct pinctrl *pinctrl;
  167. struct pinctrl_state *mi2s_disable;
  168. struct pinctrl_state *tdm_disable;
  169. struct pinctrl_state *mi2s_active;
  170. struct pinctrl_state *tdm_active;
  171. enum pinctrl_pin_state curr_state;
  172. };
  173. struct msm_asoc_mach_data {
  174. struct snd_info_entry *codec_root;
  175. struct msm_pinctrl_info pinctrl_info;
  176. int usbc_en2_gpio; /* used by gpio driver API */
  177. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  178. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  179. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  180. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  183. bool is_afe_config_done;
  184. };
  185. struct msm_asoc_wcd93xx_codec {
  186. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  187. enum afe_config_type config_type);
  188. };
  189. static const char *const pin_states[] = {"sleep", "i2s-active",
  190. "tdm-active"};
  191. static struct snd_soc_card snd_soc_card_sm6150_msm;
  192. enum {
  193. TDM_0 = 0,
  194. TDM_1,
  195. TDM_2,
  196. TDM_3,
  197. TDM_4,
  198. TDM_5,
  199. TDM_6,
  200. TDM_7,
  201. TDM_PORT_MAX,
  202. };
  203. enum {
  204. TDM_PRI = 0,
  205. TDM_SEC,
  206. TDM_TERT,
  207. TDM_QUAT,
  208. TDM_QUIN,
  209. TDM_INTERFACE_MAX,
  210. };
  211. struct tdm_port {
  212. u32 mode;
  213. u32 channel;
  214. };
  215. /* TDM default config */
  216. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  217. { /* PRI TDM */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  226. },
  227. { /* SEC TDM */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  236. },
  237. { /* TERT TDM */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  246. },
  247. { /* QUAT TDM */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  256. },
  257. { /* QUIN TDM */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  266. }
  267. };
  268. /* TDM default config */
  269. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  270. { /* PRI TDM */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  279. },
  280. { /* SEC TDM */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  289. },
  290. { /* TERT TDM */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  299. },
  300. { /* QUAT TDM */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  309. },
  310. { /* QUIN TDM */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  319. }
  320. };
  321. /* Default configuration of slimbus channels */
  322. static struct dev_config slim_rx_cfg[] = {
  323. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. };
  332. static struct dev_config slim_tx_cfg[] = {
  333. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  341. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. };
  343. /* Default configuration of Codec DMA Interface Tx */
  344. static struct dev_config cdc_dma_rx_cfg[] = {
  345. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. };
  353. /* Default configuration of Codec DMA Interface Rx */
  354. static struct dev_config cdc_dma_tx_cfg[] = {
  355. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. };
  362. /* Default configuration of external display BE */
  363. static struct dev_config ext_disp_rx_cfg[] = {
  364. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  365. };
  366. static struct dev_config usb_rx_cfg = {
  367. .sample_rate = SAMPLING_RATE_48KHZ,
  368. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  369. .channels = 2,
  370. };
  371. static struct dev_config usb_tx_cfg = {
  372. .sample_rate = SAMPLING_RATE_48KHZ,
  373. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  374. .channels = 1,
  375. };
  376. static struct dev_config proxy_rx_cfg = {
  377. .sample_rate = SAMPLING_RATE_48KHZ,
  378. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  379. .channels = 2,
  380. };
  381. /* Default configuration of MI2S channels */
  382. static struct dev_config mi2s_rx_cfg[] = {
  383. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  388. };
  389. static struct dev_config mi2s_tx_cfg[] = {
  390. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. };
  396. static struct dev_config aux_pcm_rx_cfg[] = {
  397. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. };
  403. static struct dev_config aux_pcm_tx_cfg[] = {
  404. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  409. };
  410. static int msm_vi_feed_tx_ch = 2;
  411. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  412. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  413. "Five", "Six", "Seven",
  414. "Eight"};
  415. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  416. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  417. "S32_LE"};
  418. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  419. "S24_3LE"};
  420. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  421. "KHZ_32", "KHZ_44P1", "KHZ_48",
  422. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  423. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  424. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  425. "KHZ_44P1", "KHZ_48",
  426. "KHZ_88P2", "KHZ_96"};
  427. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  428. "Five", "Six", "Seven",
  429. "Eight"};
  430. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  431. "Six", "Seven", "Eight"};
  432. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  433. "KHZ_16", "KHZ_22P05",
  434. "KHZ_32", "KHZ_44P1", "KHZ_48",
  435. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  436. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  437. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  438. "KHZ_192", "KHZ_32", "KHZ_44P1",
  439. "KHZ_88P2", "KHZ_176P4" };
  440. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  441. "Five", "Six", "Seven", "Eight"};
  442. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  443. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  444. "KHZ_48", "KHZ_176P4",
  445. "KHZ_352P8"};
  446. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  447. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  448. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  449. "KHZ_48", "KHZ_96", "KHZ_192"};
  450. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  451. "Five", "Six", "Seven",
  452. "Eight"};
  453. static const char *const hifi_text[] = {"Off", "On"};
  454. static const char *const qos_text[] = {"Disable", "Enable"};
  455. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  456. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  457. "Five", "Six", "Seven",
  458. "Eight"};
  459. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  460. "KHZ_16", "KHZ_22P05",
  461. "KHZ_32", "KHZ_44P1", "KHZ_48",
  462. "KHZ_88P2", "KHZ_96",
  463. "KHZ_176P4", "KHZ_192",
  464. "KHZ_352P8", "KHZ_384"};
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  492. ext_disp_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  560. cdc_dma_sample_rate_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  562. cdc_dma_sample_rate_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  564. cdc_dma_sample_rate_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  566. cdc_dma_sample_rate_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  580. cdc_dma_sample_rate_text);
  581. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  582. cdc_dma_sample_rate_text);
  583. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  584. cdc_dma_sample_rate_text);
  585. static int msm_hifi_control;
  586. static bool codec_reg_done;
  587. static struct snd_soc_aux_dev *msm_aux_dev;
  588. static struct snd_soc_codec_conf *msm_codec_conf;
  589. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  590. static int dmic_0_1_gpio_cnt;
  591. static int dmic_2_3_gpio_cnt;
  592. static void *def_wcd_mbhc_cal(void);
  593. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  594. int enable, bool dapm);
  595. static int msm_wsa881x_init(struct snd_soc_component *component);
  596. static int msm_aux_codec_init(struct snd_soc_component *component);
  597. /*
  598. * Need to report LINEIN
  599. * if R/L channel impedance is larger than 5K ohm
  600. */
  601. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  602. .read_fw_bin = false,
  603. .calibration = NULL,
  604. .detect_extn_cable = true,
  605. .mono_stero_detection = false,
  606. .swap_gnd_mic = NULL,
  607. .hs_ext_micbias = true,
  608. .key_code[0] = KEY_MEDIA,
  609. .key_code[1] = KEY_VOICECOMMAND,
  610. .key_code[2] = KEY_VOLUMEUP,
  611. .key_code[3] = KEY_VOLUMEDOWN,
  612. .key_code[4] = 0,
  613. .key_code[5] = 0,
  614. .key_code[6] = 0,
  615. .key_code[7] = 0,
  616. .linein_th = 5000,
  617. .moisture_en = true,
  618. .mbhc_micbias = MIC_BIAS_2,
  619. .anc_micbias = MIC_BIAS_2,
  620. .enable_anc_mic_detect = false,
  621. };
  622. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  623. {"MIC BIAS1", NULL, "MCLK TX"},
  624. {"MIC BIAS2", NULL, "MCLK TX"},
  625. {"MIC BIAS3", NULL, "MCLK TX"},
  626. {"MIC BIAS4", NULL, "MCLK TX"},
  627. };
  628. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  629. {
  630. AFE_API_VERSION_I2S_CONFIG,
  631. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  632. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  633. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  634. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  635. 0,
  636. },
  637. {
  638. AFE_API_VERSION_I2S_CONFIG,
  639. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  640. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  641. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  642. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  643. 0,
  644. },
  645. {
  646. AFE_API_VERSION_I2S_CONFIG,
  647. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  648. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  649. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  650. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  651. 0,
  652. },
  653. {
  654. AFE_API_VERSION_I2S_CONFIG,
  655. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  656. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  657. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  658. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  659. 0,
  660. },
  661. {
  662. AFE_API_VERSION_I2S_CONFIG,
  663. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  664. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  665. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  666. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  667. 0,
  668. }
  669. };
  670. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  671. static int slim_get_sample_rate_val(int sample_rate)
  672. {
  673. int sample_rate_val = 0;
  674. switch (sample_rate) {
  675. case SAMPLING_RATE_8KHZ:
  676. sample_rate_val = 0;
  677. break;
  678. case SAMPLING_RATE_16KHZ:
  679. sample_rate_val = 1;
  680. break;
  681. case SAMPLING_RATE_32KHZ:
  682. sample_rate_val = 2;
  683. break;
  684. case SAMPLING_RATE_44P1KHZ:
  685. sample_rate_val = 3;
  686. break;
  687. case SAMPLING_RATE_48KHZ:
  688. sample_rate_val = 4;
  689. break;
  690. case SAMPLING_RATE_88P2KHZ:
  691. sample_rate_val = 5;
  692. break;
  693. case SAMPLING_RATE_96KHZ:
  694. sample_rate_val = 6;
  695. break;
  696. case SAMPLING_RATE_176P4KHZ:
  697. sample_rate_val = 7;
  698. break;
  699. case SAMPLING_RATE_192KHZ:
  700. sample_rate_val = 8;
  701. break;
  702. case SAMPLING_RATE_352P8KHZ:
  703. sample_rate_val = 9;
  704. break;
  705. case SAMPLING_RATE_384KHZ:
  706. sample_rate_val = 10;
  707. break;
  708. default:
  709. sample_rate_val = 4;
  710. break;
  711. }
  712. return sample_rate_val;
  713. }
  714. static int slim_get_sample_rate(int value)
  715. {
  716. int sample_rate = 0;
  717. switch (value) {
  718. case 0:
  719. sample_rate = SAMPLING_RATE_8KHZ;
  720. break;
  721. case 1:
  722. sample_rate = SAMPLING_RATE_16KHZ;
  723. break;
  724. case 2:
  725. sample_rate = SAMPLING_RATE_32KHZ;
  726. break;
  727. case 3:
  728. sample_rate = SAMPLING_RATE_44P1KHZ;
  729. break;
  730. case 4:
  731. sample_rate = SAMPLING_RATE_48KHZ;
  732. break;
  733. case 5:
  734. sample_rate = SAMPLING_RATE_88P2KHZ;
  735. break;
  736. case 6:
  737. sample_rate = SAMPLING_RATE_96KHZ;
  738. break;
  739. case 7:
  740. sample_rate = SAMPLING_RATE_176P4KHZ;
  741. break;
  742. case 8:
  743. sample_rate = SAMPLING_RATE_192KHZ;
  744. break;
  745. case 9:
  746. sample_rate = SAMPLING_RATE_352P8KHZ;
  747. break;
  748. case 10:
  749. sample_rate = SAMPLING_RATE_384KHZ;
  750. break;
  751. default:
  752. sample_rate = SAMPLING_RATE_48KHZ;
  753. break;
  754. }
  755. return sample_rate;
  756. }
  757. static int slim_get_bit_format_val(int bit_format)
  758. {
  759. int val = 0;
  760. switch (bit_format) {
  761. case SNDRV_PCM_FORMAT_S32_LE:
  762. val = 3;
  763. break;
  764. case SNDRV_PCM_FORMAT_S24_3LE:
  765. val = 2;
  766. break;
  767. case SNDRV_PCM_FORMAT_S24_LE:
  768. val = 1;
  769. break;
  770. case SNDRV_PCM_FORMAT_S16_LE:
  771. default:
  772. val = 0;
  773. break;
  774. }
  775. return val;
  776. }
  777. static int slim_get_bit_format(int val)
  778. {
  779. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  780. switch (val) {
  781. case 0:
  782. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  783. break;
  784. case 1:
  785. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  786. break;
  787. case 2:
  788. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  789. break;
  790. case 3:
  791. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  792. break;
  793. default:
  794. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  795. break;
  796. }
  797. return bit_fmt;
  798. }
  799. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  800. {
  801. int port_id = 0;
  802. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  803. port_id = SLIM_RX_0;
  804. } else if (strnstr(kcontrol->id.name,
  805. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  806. port_id = SLIM_RX_2;
  807. } else if (strnstr(kcontrol->id.name,
  808. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  809. port_id = SLIM_RX_5;
  810. } else if (strnstr(kcontrol->id.name,
  811. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  812. port_id = SLIM_RX_6;
  813. } else if (strnstr(kcontrol->id.name,
  814. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  815. port_id = SLIM_TX_0;
  816. } else if (strnstr(kcontrol->id.name,
  817. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  818. port_id = SLIM_TX_1;
  819. } else {
  820. pr_err("%s: unsupported channel: %s\n",
  821. __func__, kcontrol->id.name);
  822. return -EINVAL;
  823. }
  824. return port_id;
  825. }
  826. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  827. struct snd_ctl_elem_value *ucontrol)
  828. {
  829. int ch_num = slim_get_port_idx(kcontrol);
  830. if (ch_num < 0)
  831. return ch_num;
  832. ucontrol->value.enumerated.item[0] =
  833. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  834. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  835. ch_num, slim_rx_cfg[ch_num].sample_rate,
  836. ucontrol->value.enumerated.item[0]);
  837. return 0;
  838. }
  839. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  840. struct snd_ctl_elem_value *ucontrol)
  841. {
  842. int ch_num = slim_get_port_idx(kcontrol);
  843. if (ch_num < 0)
  844. return ch_num;
  845. slim_rx_cfg[ch_num].sample_rate =
  846. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  847. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  848. ch_num, slim_rx_cfg[ch_num].sample_rate,
  849. ucontrol->value.enumerated.item[0]);
  850. return 0;
  851. }
  852. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  853. struct snd_ctl_elem_value *ucontrol)
  854. {
  855. int ch_num = slim_get_port_idx(kcontrol);
  856. if (ch_num < 0)
  857. return ch_num;
  858. ucontrol->value.enumerated.item[0] =
  859. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  860. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  861. ch_num, slim_tx_cfg[ch_num].sample_rate,
  862. ucontrol->value.enumerated.item[0]);
  863. return 0;
  864. }
  865. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  866. struct snd_ctl_elem_value *ucontrol)
  867. {
  868. int sample_rate = 0;
  869. int ch_num = slim_get_port_idx(kcontrol);
  870. if (ch_num < 0)
  871. return ch_num;
  872. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  873. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  874. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  875. __func__, sample_rate);
  876. return -EINVAL;
  877. }
  878. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  879. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  880. ch_num, slim_tx_cfg[ch_num].sample_rate,
  881. ucontrol->value.enumerated.item[0]);
  882. return 0;
  883. }
  884. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  885. struct snd_ctl_elem_value *ucontrol)
  886. {
  887. int ch_num = slim_get_port_idx(kcontrol);
  888. if (ch_num < 0)
  889. return ch_num;
  890. ucontrol->value.enumerated.item[0] =
  891. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  892. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  893. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  894. ucontrol->value.enumerated.item[0]);
  895. return 0;
  896. }
  897. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  898. struct snd_ctl_elem_value *ucontrol)
  899. {
  900. int ch_num = slim_get_port_idx(kcontrol);
  901. if (ch_num < 0)
  902. return ch_num;
  903. slim_rx_cfg[ch_num].bit_format =
  904. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  905. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  906. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  907. ucontrol->value.enumerated.item[0]);
  908. return 0;
  909. }
  910. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  911. struct snd_ctl_elem_value *ucontrol)
  912. {
  913. int ch_num = slim_get_port_idx(kcontrol);
  914. if (ch_num < 0)
  915. return ch_num;
  916. ucontrol->value.enumerated.item[0] =
  917. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  918. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  919. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  920. ucontrol->value.enumerated.item[0]);
  921. return 0;
  922. }
  923. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  924. struct snd_ctl_elem_value *ucontrol)
  925. {
  926. int ch_num = slim_get_port_idx(kcontrol);
  927. if (ch_num < 0)
  928. return ch_num;
  929. slim_tx_cfg[ch_num].bit_format =
  930. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  931. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  932. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  933. ucontrol->value.enumerated.item[0]);
  934. return 0;
  935. }
  936. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. int ch_num = slim_get_port_idx(kcontrol);
  940. if (ch_num < 0)
  941. return ch_num;
  942. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  943. ch_num, slim_rx_cfg[ch_num].channels);
  944. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  945. return 0;
  946. }
  947. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  948. struct snd_ctl_elem_value *ucontrol)
  949. {
  950. int ch_num = slim_get_port_idx(kcontrol);
  951. if (ch_num < 0)
  952. return ch_num;
  953. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  954. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  955. ch_num, slim_rx_cfg[ch_num].channels);
  956. return 1;
  957. }
  958. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  959. struct snd_ctl_elem_value *ucontrol)
  960. {
  961. int ch_num = slim_get_port_idx(kcontrol);
  962. if (ch_num < 0)
  963. return ch_num;
  964. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  965. ch_num, slim_tx_cfg[ch_num].channels);
  966. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  967. return 0;
  968. }
  969. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  970. struct snd_ctl_elem_value *ucontrol)
  971. {
  972. int ch_num = slim_get_port_idx(kcontrol);
  973. if (ch_num < 0)
  974. return ch_num;
  975. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  976. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  977. ch_num, slim_tx_cfg[ch_num].channels);
  978. return 1;
  979. }
  980. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  981. struct snd_ctl_elem_value *ucontrol)
  982. {
  983. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  984. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  985. ucontrol->value.integer.value[0]);
  986. return 0;
  987. }
  988. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  989. struct snd_ctl_elem_value *ucontrol)
  990. {
  991. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  992. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  993. return 1;
  994. }
  995. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  996. struct snd_ctl_elem_value *ucontrol)
  997. {
  998. /*
  999. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1000. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1001. * value.
  1002. */
  1003. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1004. case SAMPLING_RATE_96KHZ:
  1005. ucontrol->value.integer.value[0] = 5;
  1006. break;
  1007. case SAMPLING_RATE_88P2KHZ:
  1008. ucontrol->value.integer.value[0] = 4;
  1009. break;
  1010. case SAMPLING_RATE_48KHZ:
  1011. ucontrol->value.integer.value[0] = 3;
  1012. break;
  1013. case SAMPLING_RATE_44P1KHZ:
  1014. ucontrol->value.integer.value[0] = 2;
  1015. break;
  1016. case SAMPLING_RATE_16KHZ:
  1017. ucontrol->value.integer.value[0] = 1;
  1018. break;
  1019. case SAMPLING_RATE_8KHZ:
  1020. default:
  1021. ucontrol->value.integer.value[0] = 0;
  1022. break;
  1023. }
  1024. pr_debug("%s: sample rate = %d\n", __func__,
  1025. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1026. return 0;
  1027. }
  1028. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1029. struct snd_ctl_elem_value *ucontrol)
  1030. {
  1031. switch (ucontrol->value.integer.value[0]) {
  1032. case 1:
  1033. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1034. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1035. break;
  1036. case 2:
  1037. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1038. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1039. break;
  1040. case 3:
  1041. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1042. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1043. break;
  1044. case 4:
  1045. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1046. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1047. break;
  1048. case 5:
  1049. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1050. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1051. break;
  1052. case 0:
  1053. default:
  1054. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1055. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1056. break;
  1057. }
  1058. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1059. __func__,
  1060. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1061. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1062. ucontrol->value.enumerated.item[0]);
  1063. return 0;
  1064. }
  1065. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1066. {
  1067. int idx = 0;
  1068. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1069. sizeof("WSA_CDC_DMA_RX_0")))
  1070. idx = WSA_CDC_DMA_RX_0;
  1071. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1072. sizeof("WSA_CDC_DMA_RX_0")))
  1073. idx = WSA_CDC_DMA_RX_1;
  1074. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1075. sizeof("RX_CDC_DMA_RX_0")))
  1076. idx = RX_CDC_DMA_RX_0;
  1077. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1078. sizeof("RX_CDC_DMA_RX_1")))
  1079. idx = RX_CDC_DMA_RX_1;
  1080. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1081. sizeof("RX_CDC_DMA_RX_2")))
  1082. idx = RX_CDC_DMA_RX_2;
  1083. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1084. sizeof("RX_CDC_DMA_RX_3")))
  1085. idx = RX_CDC_DMA_RX_3;
  1086. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1087. sizeof("RX_CDC_DMA_RX_5")))
  1088. idx = RX_CDC_DMA_RX_5;
  1089. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1090. sizeof("WSA_CDC_DMA_TX_0")))
  1091. idx = WSA_CDC_DMA_TX_0;
  1092. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1093. sizeof("WSA_CDC_DMA_TX_1")))
  1094. idx = WSA_CDC_DMA_TX_1;
  1095. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1096. sizeof("WSA_CDC_DMA_TX_2")))
  1097. idx = WSA_CDC_DMA_TX_2;
  1098. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1099. sizeof("TX_CDC_DMA_TX_0")))
  1100. idx = TX_CDC_DMA_TX_0;
  1101. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1102. sizeof("TX_CDC_DMA_TX_3")))
  1103. idx = TX_CDC_DMA_TX_3;
  1104. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1105. sizeof("TX_CDC_DMA_TX_4")))
  1106. idx = TX_CDC_DMA_TX_4;
  1107. else {
  1108. pr_err("%s: unsupported channel: %s\n",
  1109. __func__, kcontrol->id.name);
  1110. return -EINVAL;
  1111. }
  1112. return idx;
  1113. }
  1114. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1115. struct snd_ctl_elem_value *ucontrol)
  1116. {
  1117. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1118. if (ch_num < 0)
  1119. return ch_num;
  1120. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1121. cdc_dma_rx_cfg[ch_num].channels - 1);
  1122. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1123. return 0;
  1124. }
  1125. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1126. struct snd_ctl_elem_value *ucontrol)
  1127. {
  1128. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1129. if (ch_num < 0)
  1130. return ch_num;
  1131. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1132. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1133. cdc_dma_rx_cfg[ch_num].channels);
  1134. return 1;
  1135. }
  1136. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1137. struct snd_ctl_elem_value *ucontrol)
  1138. {
  1139. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1140. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1141. case SNDRV_PCM_FORMAT_S32_LE:
  1142. ucontrol->value.integer.value[0] = 3;
  1143. break;
  1144. case SNDRV_PCM_FORMAT_S24_3LE:
  1145. ucontrol->value.integer.value[0] = 2;
  1146. break;
  1147. case SNDRV_PCM_FORMAT_S24_LE:
  1148. ucontrol->value.integer.value[0] = 1;
  1149. break;
  1150. case SNDRV_PCM_FORMAT_S16_LE:
  1151. default:
  1152. ucontrol->value.integer.value[0] = 0;
  1153. break;
  1154. }
  1155. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1156. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1157. ucontrol->value.integer.value[0]);
  1158. return 0;
  1159. }
  1160. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1161. struct snd_ctl_elem_value *ucontrol)
  1162. {
  1163. int rc = 0;
  1164. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1165. switch (ucontrol->value.integer.value[0]) {
  1166. case 3:
  1167. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1168. break;
  1169. case 2:
  1170. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1171. break;
  1172. case 1:
  1173. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1174. break;
  1175. case 0:
  1176. default:
  1177. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1178. break;
  1179. }
  1180. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1181. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1182. ucontrol->value.integer.value[0]);
  1183. return rc;
  1184. }
  1185. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1186. {
  1187. int sample_rate_val = 0;
  1188. switch (sample_rate) {
  1189. case SAMPLING_RATE_8KHZ:
  1190. sample_rate_val = 0;
  1191. break;
  1192. case SAMPLING_RATE_11P025KHZ:
  1193. sample_rate_val = 1;
  1194. break;
  1195. case SAMPLING_RATE_16KHZ:
  1196. sample_rate_val = 2;
  1197. break;
  1198. case SAMPLING_RATE_22P05KHZ:
  1199. sample_rate_val = 3;
  1200. break;
  1201. case SAMPLING_RATE_32KHZ:
  1202. sample_rate_val = 4;
  1203. break;
  1204. case SAMPLING_RATE_44P1KHZ:
  1205. sample_rate_val = 5;
  1206. break;
  1207. case SAMPLING_RATE_48KHZ:
  1208. sample_rate_val = 6;
  1209. break;
  1210. case SAMPLING_RATE_88P2KHZ:
  1211. sample_rate_val = 7;
  1212. break;
  1213. case SAMPLING_RATE_96KHZ:
  1214. sample_rate_val = 8;
  1215. break;
  1216. case SAMPLING_RATE_176P4KHZ:
  1217. sample_rate_val = 9;
  1218. break;
  1219. case SAMPLING_RATE_192KHZ:
  1220. sample_rate_val = 10;
  1221. break;
  1222. case SAMPLING_RATE_352P8KHZ:
  1223. sample_rate_val = 11;
  1224. break;
  1225. case SAMPLING_RATE_384KHZ:
  1226. sample_rate_val = 12;
  1227. break;
  1228. default:
  1229. sample_rate_val = 6;
  1230. break;
  1231. }
  1232. return sample_rate_val;
  1233. }
  1234. static int cdc_dma_get_sample_rate(int value)
  1235. {
  1236. int sample_rate = 0;
  1237. switch (value) {
  1238. case 0:
  1239. sample_rate = SAMPLING_RATE_8KHZ;
  1240. break;
  1241. case 1:
  1242. sample_rate = SAMPLING_RATE_11P025KHZ;
  1243. break;
  1244. case 2:
  1245. sample_rate = SAMPLING_RATE_16KHZ;
  1246. break;
  1247. case 3:
  1248. sample_rate = SAMPLING_RATE_22P05KHZ;
  1249. break;
  1250. case 4:
  1251. sample_rate = SAMPLING_RATE_32KHZ;
  1252. break;
  1253. case 5:
  1254. sample_rate = SAMPLING_RATE_44P1KHZ;
  1255. break;
  1256. case 6:
  1257. sample_rate = SAMPLING_RATE_48KHZ;
  1258. break;
  1259. case 7:
  1260. sample_rate = SAMPLING_RATE_88P2KHZ;
  1261. break;
  1262. case 8:
  1263. sample_rate = SAMPLING_RATE_96KHZ;
  1264. break;
  1265. case 9:
  1266. sample_rate = SAMPLING_RATE_176P4KHZ;
  1267. break;
  1268. case 10:
  1269. sample_rate = SAMPLING_RATE_192KHZ;
  1270. break;
  1271. case 11:
  1272. sample_rate = SAMPLING_RATE_352P8KHZ;
  1273. break;
  1274. case 12:
  1275. sample_rate = SAMPLING_RATE_384KHZ;
  1276. break;
  1277. default:
  1278. sample_rate = SAMPLING_RATE_48KHZ;
  1279. break;
  1280. }
  1281. return sample_rate;
  1282. }
  1283. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1284. struct snd_ctl_elem_value *ucontrol)
  1285. {
  1286. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1287. if (ch_num < 0)
  1288. return ch_num;
  1289. ucontrol->value.enumerated.item[0] =
  1290. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1291. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1292. cdc_dma_rx_cfg[ch_num].sample_rate);
  1293. return 0;
  1294. }
  1295. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1296. struct snd_ctl_elem_value *ucontrol)
  1297. {
  1298. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1299. if (ch_num < 0)
  1300. return ch_num;
  1301. cdc_dma_rx_cfg[ch_num].sample_rate =
  1302. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1303. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1304. __func__, ucontrol->value.enumerated.item[0],
  1305. cdc_dma_rx_cfg[ch_num].sample_rate);
  1306. return 0;
  1307. }
  1308. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1309. struct snd_ctl_elem_value *ucontrol)
  1310. {
  1311. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1312. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1313. cdc_dma_tx_cfg[ch_num].channels);
  1314. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1315. return 0;
  1316. }
  1317. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1318. struct snd_ctl_elem_value *ucontrol)
  1319. {
  1320. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1321. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1322. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1323. cdc_dma_tx_cfg[ch_num].channels);
  1324. return 1;
  1325. }
  1326. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1327. struct snd_ctl_elem_value *ucontrol)
  1328. {
  1329. int sample_rate_val;
  1330. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1331. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1332. case SAMPLING_RATE_384KHZ:
  1333. sample_rate_val = 12;
  1334. break;
  1335. case SAMPLING_RATE_352P8KHZ:
  1336. sample_rate_val = 11;
  1337. break;
  1338. case SAMPLING_RATE_192KHZ:
  1339. sample_rate_val = 10;
  1340. break;
  1341. case SAMPLING_RATE_176P4KHZ:
  1342. sample_rate_val = 9;
  1343. break;
  1344. case SAMPLING_RATE_96KHZ:
  1345. sample_rate_val = 8;
  1346. break;
  1347. case SAMPLING_RATE_88P2KHZ:
  1348. sample_rate_val = 7;
  1349. break;
  1350. case SAMPLING_RATE_48KHZ:
  1351. sample_rate_val = 6;
  1352. break;
  1353. case SAMPLING_RATE_44P1KHZ:
  1354. sample_rate_val = 5;
  1355. break;
  1356. case SAMPLING_RATE_32KHZ:
  1357. sample_rate_val = 4;
  1358. break;
  1359. case SAMPLING_RATE_22P05KHZ:
  1360. sample_rate_val = 3;
  1361. break;
  1362. case SAMPLING_RATE_16KHZ:
  1363. sample_rate_val = 2;
  1364. break;
  1365. case SAMPLING_RATE_11P025KHZ:
  1366. sample_rate_val = 1;
  1367. break;
  1368. case SAMPLING_RATE_8KHZ:
  1369. sample_rate_val = 0;
  1370. break;
  1371. default:
  1372. sample_rate_val = 6;
  1373. break;
  1374. }
  1375. ucontrol->value.integer.value[0] = sample_rate_val;
  1376. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1377. cdc_dma_tx_cfg[ch_num].sample_rate);
  1378. return 0;
  1379. }
  1380. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1381. struct snd_ctl_elem_value *ucontrol)
  1382. {
  1383. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1384. switch (ucontrol->value.integer.value[0]) {
  1385. case 12:
  1386. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1387. break;
  1388. case 11:
  1389. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1390. break;
  1391. case 10:
  1392. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1393. break;
  1394. case 9:
  1395. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1396. break;
  1397. case 8:
  1398. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1399. break;
  1400. case 7:
  1401. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1402. break;
  1403. case 6:
  1404. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1405. break;
  1406. case 5:
  1407. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1408. break;
  1409. case 4:
  1410. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1411. break;
  1412. case 3:
  1413. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1414. break;
  1415. case 2:
  1416. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1417. break;
  1418. case 1:
  1419. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1420. break;
  1421. case 0:
  1422. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1423. break;
  1424. default:
  1425. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1426. break;
  1427. }
  1428. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1429. __func__, ucontrol->value.integer.value[0],
  1430. cdc_dma_tx_cfg[ch_num].sample_rate);
  1431. return 0;
  1432. }
  1433. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1434. struct snd_ctl_elem_value *ucontrol)
  1435. {
  1436. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1437. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1438. case SNDRV_PCM_FORMAT_S32_LE:
  1439. ucontrol->value.integer.value[0] = 3;
  1440. break;
  1441. case SNDRV_PCM_FORMAT_S24_3LE:
  1442. ucontrol->value.integer.value[0] = 2;
  1443. break;
  1444. case SNDRV_PCM_FORMAT_S24_LE:
  1445. ucontrol->value.integer.value[0] = 1;
  1446. break;
  1447. case SNDRV_PCM_FORMAT_S16_LE:
  1448. default:
  1449. ucontrol->value.integer.value[0] = 0;
  1450. break;
  1451. }
  1452. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1453. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1454. ucontrol->value.integer.value[0]);
  1455. return 0;
  1456. }
  1457. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1458. struct snd_ctl_elem_value *ucontrol)
  1459. {
  1460. int rc = 0;
  1461. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1462. switch (ucontrol->value.integer.value[0]) {
  1463. case 3:
  1464. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1465. break;
  1466. case 2:
  1467. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1468. break;
  1469. case 1:
  1470. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1471. break;
  1472. case 0:
  1473. default:
  1474. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1475. break;
  1476. }
  1477. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1478. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1479. ucontrol->value.integer.value[0]);
  1480. return rc;
  1481. }
  1482. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1483. struct snd_ctl_elem_value *ucontrol)
  1484. {
  1485. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1486. usb_rx_cfg.channels);
  1487. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1488. return 0;
  1489. }
  1490. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1491. struct snd_ctl_elem_value *ucontrol)
  1492. {
  1493. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1494. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1495. return 1;
  1496. }
  1497. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1498. struct snd_ctl_elem_value *ucontrol)
  1499. {
  1500. int sample_rate_val;
  1501. switch (usb_rx_cfg.sample_rate) {
  1502. case SAMPLING_RATE_384KHZ:
  1503. sample_rate_val = 12;
  1504. break;
  1505. case SAMPLING_RATE_352P8KHZ:
  1506. sample_rate_val = 11;
  1507. break;
  1508. case SAMPLING_RATE_192KHZ:
  1509. sample_rate_val = 10;
  1510. break;
  1511. case SAMPLING_RATE_176P4KHZ:
  1512. sample_rate_val = 9;
  1513. break;
  1514. case SAMPLING_RATE_96KHZ:
  1515. sample_rate_val = 8;
  1516. break;
  1517. case SAMPLING_RATE_88P2KHZ:
  1518. sample_rate_val = 7;
  1519. break;
  1520. case SAMPLING_RATE_48KHZ:
  1521. sample_rate_val = 6;
  1522. break;
  1523. case SAMPLING_RATE_44P1KHZ:
  1524. sample_rate_val = 5;
  1525. break;
  1526. case SAMPLING_RATE_32KHZ:
  1527. sample_rate_val = 4;
  1528. break;
  1529. case SAMPLING_RATE_22P05KHZ:
  1530. sample_rate_val = 3;
  1531. break;
  1532. case SAMPLING_RATE_16KHZ:
  1533. sample_rate_val = 2;
  1534. break;
  1535. case SAMPLING_RATE_11P025KHZ:
  1536. sample_rate_val = 1;
  1537. break;
  1538. case SAMPLING_RATE_8KHZ:
  1539. default:
  1540. sample_rate_val = 0;
  1541. break;
  1542. }
  1543. ucontrol->value.integer.value[0] = sample_rate_val;
  1544. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1545. usb_rx_cfg.sample_rate);
  1546. return 0;
  1547. }
  1548. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1549. struct snd_ctl_elem_value *ucontrol)
  1550. {
  1551. switch (ucontrol->value.integer.value[0]) {
  1552. case 12:
  1553. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1554. break;
  1555. case 11:
  1556. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1557. break;
  1558. case 10:
  1559. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1560. break;
  1561. case 9:
  1562. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1563. break;
  1564. case 8:
  1565. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1566. break;
  1567. case 7:
  1568. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1569. break;
  1570. case 6:
  1571. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1572. break;
  1573. case 5:
  1574. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1575. break;
  1576. case 4:
  1577. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1578. break;
  1579. case 3:
  1580. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1581. break;
  1582. case 2:
  1583. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1584. break;
  1585. case 1:
  1586. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1587. break;
  1588. case 0:
  1589. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1590. break;
  1591. default:
  1592. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1593. break;
  1594. }
  1595. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1596. __func__, ucontrol->value.integer.value[0],
  1597. usb_rx_cfg.sample_rate);
  1598. return 0;
  1599. }
  1600. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1601. struct snd_ctl_elem_value *ucontrol)
  1602. {
  1603. switch (usb_rx_cfg.bit_format) {
  1604. case SNDRV_PCM_FORMAT_S32_LE:
  1605. ucontrol->value.integer.value[0] = 3;
  1606. break;
  1607. case SNDRV_PCM_FORMAT_S24_3LE:
  1608. ucontrol->value.integer.value[0] = 2;
  1609. break;
  1610. case SNDRV_PCM_FORMAT_S24_LE:
  1611. ucontrol->value.integer.value[0] = 1;
  1612. break;
  1613. case SNDRV_PCM_FORMAT_S16_LE:
  1614. default:
  1615. ucontrol->value.integer.value[0] = 0;
  1616. break;
  1617. }
  1618. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1619. __func__, usb_rx_cfg.bit_format,
  1620. ucontrol->value.integer.value[0]);
  1621. return 0;
  1622. }
  1623. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1624. struct snd_ctl_elem_value *ucontrol)
  1625. {
  1626. int rc = 0;
  1627. switch (ucontrol->value.integer.value[0]) {
  1628. case 3:
  1629. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1630. break;
  1631. case 2:
  1632. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1633. break;
  1634. case 1:
  1635. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1636. break;
  1637. case 0:
  1638. default:
  1639. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1640. break;
  1641. }
  1642. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1643. __func__, usb_rx_cfg.bit_format,
  1644. ucontrol->value.integer.value[0]);
  1645. return rc;
  1646. }
  1647. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1648. struct snd_ctl_elem_value *ucontrol)
  1649. {
  1650. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1651. usb_tx_cfg.channels);
  1652. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1653. return 0;
  1654. }
  1655. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1656. struct snd_ctl_elem_value *ucontrol)
  1657. {
  1658. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1659. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1660. return 1;
  1661. }
  1662. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1663. struct snd_ctl_elem_value *ucontrol)
  1664. {
  1665. int sample_rate_val;
  1666. switch (usb_tx_cfg.sample_rate) {
  1667. case SAMPLING_RATE_384KHZ:
  1668. sample_rate_val = 12;
  1669. break;
  1670. case SAMPLING_RATE_352P8KHZ:
  1671. sample_rate_val = 11;
  1672. break;
  1673. case SAMPLING_RATE_192KHZ:
  1674. sample_rate_val = 10;
  1675. break;
  1676. case SAMPLING_RATE_176P4KHZ:
  1677. sample_rate_val = 9;
  1678. break;
  1679. case SAMPLING_RATE_96KHZ:
  1680. sample_rate_val = 8;
  1681. break;
  1682. case SAMPLING_RATE_88P2KHZ:
  1683. sample_rate_val = 7;
  1684. break;
  1685. case SAMPLING_RATE_48KHZ:
  1686. sample_rate_val = 6;
  1687. break;
  1688. case SAMPLING_RATE_44P1KHZ:
  1689. sample_rate_val = 5;
  1690. break;
  1691. case SAMPLING_RATE_32KHZ:
  1692. sample_rate_val = 4;
  1693. break;
  1694. case SAMPLING_RATE_22P05KHZ:
  1695. sample_rate_val = 3;
  1696. break;
  1697. case SAMPLING_RATE_16KHZ:
  1698. sample_rate_val = 2;
  1699. break;
  1700. case SAMPLING_RATE_11P025KHZ:
  1701. sample_rate_val = 1;
  1702. break;
  1703. case SAMPLING_RATE_8KHZ:
  1704. sample_rate_val = 0;
  1705. break;
  1706. default:
  1707. sample_rate_val = 6;
  1708. break;
  1709. }
  1710. ucontrol->value.integer.value[0] = sample_rate_val;
  1711. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1712. usb_tx_cfg.sample_rate);
  1713. return 0;
  1714. }
  1715. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1716. struct snd_ctl_elem_value *ucontrol)
  1717. {
  1718. switch (ucontrol->value.integer.value[0]) {
  1719. case 12:
  1720. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1721. break;
  1722. case 11:
  1723. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1724. break;
  1725. case 10:
  1726. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1727. break;
  1728. case 9:
  1729. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1730. break;
  1731. case 8:
  1732. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1733. break;
  1734. case 7:
  1735. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1736. break;
  1737. case 6:
  1738. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1739. break;
  1740. case 5:
  1741. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1742. break;
  1743. case 4:
  1744. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1745. break;
  1746. case 3:
  1747. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1748. break;
  1749. case 2:
  1750. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1751. break;
  1752. case 1:
  1753. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1754. break;
  1755. case 0:
  1756. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1757. break;
  1758. default:
  1759. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1760. break;
  1761. }
  1762. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1763. __func__, ucontrol->value.integer.value[0],
  1764. usb_tx_cfg.sample_rate);
  1765. return 0;
  1766. }
  1767. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1768. struct snd_ctl_elem_value *ucontrol)
  1769. {
  1770. switch (usb_tx_cfg.bit_format) {
  1771. case SNDRV_PCM_FORMAT_S32_LE:
  1772. ucontrol->value.integer.value[0] = 3;
  1773. break;
  1774. case SNDRV_PCM_FORMAT_S24_3LE:
  1775. ucontrol->value.integer.value[0] = 2;
  1776. break;
  1777. case SNDRV_PCM_FORMAT_S24_LE:
  1778. ucontrol->value.integer.value[0] = 1;
  1779. break;
  1780. case SNDRV_PCM_FORMAT_S16_LE:
  1781. default:
  1782. ucontrol->value.integer.value[0] = 0;
  1783. break;
  1784. }
  1785. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1786. __func__, usb_tx_cfg.bit_format,
  1787. ucontrol->value.integer.value[0]);
  1788. return 0;
  1789. }
  1790. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1791. struct snd_ctl_elem_value *ucontrol)
  1792. {
  1793. int rc = 0;
  1794. switch (ucontrol->value.integer.value[0]) {
  1795. case 3:
  1796. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1797. break;
  1798. case 2:
  1799. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1800. break;
  1801. case 1:
  1802. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1803. break;
  1804. case 0:
  1805. default:
  1806. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1807. break;
  1808. }
  1809. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1810. __func__, usb_tx_cfg.bit_format,
  1811. ucontrol->value.integer.value[0]);
  1812. return rc;
  1813. }
  1814. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1815. {
  1816. int idx;
  1817. if (strnstr(kcontrol->id.name, "Display Port RX",
  1818. sizeof("Display Port RX"))) {
  1819. idx = DP_RX_IDX;
  1820. } else {
  1821. pr_err("%s: unsupported BE: %s\n",
  1822. __func__, kcontrol->id.name);
  1823. idx = -EINVAL;
  1824. }
  1825. return idx;
  1826. }
  1827. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1828. struct snd_ctl_elem_value *ucontrol)
  1829. {
  1830. int idx = ext_disp_get_port_idx(kcontrol);
  1831. if (idx < 0)
  1832. return idx;
  1833. switch (ext_disp_rx_cfg[idx].bit_format) {
  1834. case SNDRV_PCM_FORMAT_S24_3LE:
  1835. ucontrol->value.integer.value[0] = 2;
  1836. break;
  1837. case SNDRV_PCM_FORMAT_S24_LE:
  1838. ucontrol->value.integer.value[0] = 1;
  1839. break;
  1840. case SNDRV_PCM_FORMAT_S16_LE:
  1841. default:
  1842. ucontrol->value.integer.value[0] = 0;
  1843. break;
  1844. }
  1845. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1846. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1847. ucontrol->value.integer.value[0]);
  1848. return 0;
  1849. }
  1850. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1851. struct snd_ctl_elem_value *ucontrol)
  1852. {
  1853. int idx = ext_disp_get_port_idx(kcontrol);
  1854. if (idx < 0)
  1855. return idx;
  1856. switch (ucontrol->value.integer.value[0]) {
  1857. case 2:
  1858. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1859. break;
  1860. case 1:
  1861. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1862. break;
  1863. case 0:
  1864. default:
  1865. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1866. break;
  1867. }
  1868. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1869. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1870. ucontrol->value.integer.value[0]);
  1871. return 0;
  1872. }
  1873. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1874. struct snd_ctl_elem_value *ucontrol)
  1875. {
  1876. int idx = ext_disp_get_port_idx(kcontrol);
  1877. if (idx < 0)
  1878. return idx;
  1879. ucontrol->value.integer.value[0] =
  1880. ext_disp_rx_cfg[idx].channels - 2;
  1881. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1882. idx, ext_disp_rx_cfg[idx].channels);
  1883. return 0;
  1884. }
  1885. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1886. struct snd_ctl_elem_value *ucontrol)
  1887. {
  1888. int idx = ext_disp_get_port_idx(kcontrol);
  1889. if (idx < 0)
  1890. return idx;
  1891. ext_disp_rx_cfg[idx].channels =
  1892. ucontrol->value.integer.value[0] + 2;
  1893. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1894. idx, ext_disp_rx_cfg[idx].channels);
  1895. return 1;
  1896. }
  1897. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1898. struct snd_ctl_elem_value *ucontrol)
  1899. {
  1900. int sample_rate_val;
  1901. int idx = ext_disp_get_port_idx(kcontrol);
  1902. if (idx < 0)
  1903. return idx;
  1904. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1905. case SAMPLING_RATE_176P4KHZ:
  1906. sample_rate_val = 6;
  1907. break;
  1908. case SAMPLING_RATE_88P2KHZ:
  1909. sample_rate_val = 5;
  1910. break;
  1911. case SAMPLING_RATE_44P1KHZ:
  1912. sample_rate_val = 4;
  1913. break;
  1914. case SAMPLING_RATE_32KHZ:
  1915. sample_rate_val = 3;
  1916. break;
  1917. case SAMPLING_RATE_192KHZ:
  1918. sample_rate_val = 2;
  1919. break;
  1920. case SAMPLING_RATE_96KHZ:
  1921. sample_rate_val = 1;
  1922. break;
  1923. case SAMPLING_RATE_48KHZ:
  1924. default:
  1925. sample_rate_val = 0;
  1926. break;
  1927. }
  1928. ucontrol->value.integer.value[0] = sample_rate_val;
  1929. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1930. idx, ext_disp_rx_cfg[idx].sample_rate);
  1931. return 0;
  1932. }
  1933. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1934. struct snd_ctl_elem_value *ucontrol)
  1935. {
  1936. int idx = ext_disp_get_port_idx(kcontrol);
  1937. if (idx < 0)
  1938. return idx;
  1939. switch (ucontrol->value.integer.value[0]) {
  1940. case 6:
  1941. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1942. break;
  1943. case 5:
  1944. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1945. break;
  1946. case 4:
  1947. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1948. break;
  1949. case 3:
  1950. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1951. break;
  1952. case 2:
  1953. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1954. break;
  1955. case 1:
  1956. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1957. break;
  1958. case 0:
  1959. default:
  1960. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1961. break;
  1962. }
  1963. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1964. __func__, ucontrol->value.integer.value[0], idx,
  1965. ext_disp_rx_cfg[idx].sample_rate);
  1966. return 0;
  1967. }
  1968. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1969. struct snd_ctl_elem_value *ucontrol)
  1970. {
  1971. pr_debug("%s: proxy_rx channels = %d\n",
  1972. __func__, proxy_rx_cfg.channels);
  1973. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1974. return 0;
  1975. }
  1976. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1977. struct snd_ctl_elem_value *ucontrol)
  1978. {
  1979. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1980. pr_debug("%s: proxy_rx channels = %d\n",
  1981. __func__, proxy_rx_cfg.channels);
  1982. return 1;
  1983. }
  1984. static int tdm_get_sample_rate(int value)
  1985. {
  1986. int sample_rate = 0;
  1987. switch (value) {
  1988. case 0:
  1989. sample_rate = SAMPLING_RATE_8KHZ;
  1990. break;
  1991. case 1:
  1992. sample_rate = SAMPLING_RATE_16KHZ;
  1993. break;
  1994. case 2:
  1995. sample_rate = SAMPLING_RATE_32KHZ;
  1996. break;
  1997. case 3:
  1998. sample_rate = SAMPLING_RATE_48KHZ;
  1999. break;
  2000. case 4:
  2001. sample_rate = SAMPLING_RATE_176P4KHZ;
  2002. break;
  2003. case 5:
  2004. sample_rate = SAMPLING_RATE_352P8KHZ;
  2005. break;
  2006. default:
  2007. sample_rate = SAMPLING_RATE_48KHZ;
  2008. break;
  2009. }
  2010. return sample_rate;
  2011. }
  2012. static int aux_pcm_get_sample_rate(int value)
  2013. {
  2014. int sample_rate;
  2015. switch (value) {
  2016. case 1:
  2017. sample_rate = SAMPLING_RATE_16KHZ;
  2018. break;
  2019. case 0:
  2020. default:
  2021. sample_rate = SAMPLING_RATE_8KHZ;
  2022. break;
  2023. }
  2024. return sample_rate;
  2025. }
  2026. static int tdm_get_sample_rate_val(int sample_rate)
  2027. {
  2028. int sample_rate_val = 0;
  2029. switch (sample_rate) {
  2030. case SAMPLING_RATE_8KHZ:
  2031. sample_rate_val = 0;
  2032. break;
  2033. case SAMPLING_RATE_16KHZ:
  2034. sample_rate_val = 1;
  2035. break;
  2036. case SAMPLING_RATE_32KHZ:
  2037. sample_rate_val = 2;
  2038. break;
  2039. case SAMPLING_RATE_48KHZ:
  2040. sample_rate_val = 3;
  2041. break;
  2042. case SAMPLING_RATE_176P4KHZ:
  2043. sample_rate_val = 4;
  2044. break;
  2045. case SAMPLING_RATE_352P8KHZ:
  2046. sample_rate_val = 5;
  2047. break;
  2048. default:
  2049. sample_rate_val = 3;
  2050. break;
  2051. }
  2052. return sample_rate_val;
  2053. }
  2054. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2055. {
  2056. int sample_rate_val;
  2057. switch (sample_rate) {
  2058. case SAMPLING_RATE_16KHZ:
  2059. sample_rate_val = 1;
  2060. break;
  2061. case SAMPLING_RATE_8KHZ:
  2062. default:
  2063. sample_rate_val = 0;
  2064. break;
  2065. }
  2066. return sample_rate_val;
  2067. }
  2068. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2069. struct tdm_port *port)
  2070. {
  2071. if (port) {
  2072. if (strnstr(kcontrol->id.name, "PRI",
  2073. sizeof(kcontrol->id.name))) {
  2074. port->mode = TDM_PRI;
  2075. } else if (strnstr(kcontrol->id.name, "SEC",
  2076. sizeof(kcontrol->id.name))) {
  2077. port->mode = TDM_SEC;
  2078. } else if (strnstr(kcontrol->id.name, "TERT",
  2079. sizeof(kcontrol->id.name))) {
  2080. port->mode = TDM_TERT;
  2081. } else if (strnstr(kcontrol->id.name, "QUAT",
  2082. sizeof(kcontrol->id.name))) {
  2083. port->mode = TDM_QUAT;
  2084. } else if (strnstr(kcontrol->id.name, "QUIN",
  2085. sizeof(kcontrol->id.name))) {
  2086. port->mode = TDM_QUIN;
  2087. } else {
  2088. pr_err("%s: unsupported mode in: %s\n",
  2089. __func__, kcontrol->id.name);
  2090. return -EINVAL;
  2091. }
  2092. if (strnstr(kcontrol->id.name, "RX_0",
  2093. sizeof(kcontrol->id.name)) ||
  2094. strnstr(kcontrol->id.name, "TX_0",
  2095. sizeof(kcontrol->id.name))) {
  2096. port->channel = TDM_0;
  2097. } else if (strnstr(kcontrol->id.name, "RX_1",
  2098. sizeof(kcontrol->id.name)) ||
  2099. strnstr(kcontrol->id.name, "TX_1",
  2100. sizeof(kcontrol->id.name))) {
  2101. port->channel = TDM_1;
  2102. } else if (strnstr(kcontrol->id.name, "RX_2",
  2103. sizeof(kcontrol->id.name)) ||
  2104. strnstr(kcontrol->id.name, "TX_2",
  2105. sizeof(kcontrol->id.name))) {
  2106. port->channel = TDM_2;
  2107. } else if (strnstr(kcontrol->id.name, "RX_3",
  2108. sizeof(kcontrol->id.name)) ||
  2109. strnstr(kcontrol->id.name, "TX_3",
  2110. sizeof(kcontrol->id.name))) {
  2111. port->channel = TDM_3;
  2112. } else if (strnstr(kcontrol->id.name, "RX_4",
  2113. sizeof(kcontrol->id.name)) ||
  2114. strnstr(kcontrol->id.name, "TX_4",
  2115. sizeof(kcontrol->id.name))) {
  2116. port->channel = TDM_4;
  2117. } else if (strnstr(kcontrol->id.name, "RX_5",
  2118. sizeof(kcontrol->id.name)) ||
  2119. strnstr(kcontrol->id.name, "TX_5",
  2120. sizeof(kcontrol->id.name))) {
  2121. port->channel = TDM_5;
  2122. } else if (strnstr(kcontrol->id.name, "RX_6",
  2123. sizeof(kcontrol->id.name)) ||
  2124. strnstr(kcontrol->id.name, "TX_6",
  2125. sizeof(kcontrol->id.name))) {
  2126. port->channel = TDM_6;
  2127. } else if (strnstr(kcontrol->id.name, "RX_7",
  2128. sizeof(kcontrol->id.name)) ||
  2129. strnstr(kcontrol->id.name, "TX_7",
  2130. sizeof(kcontrol->id.name))) {
  2131. port->channel = TDM_7;
  2132. } else {
  2133. pr_err("%s: unsupported channel in: %s\n",
  2134. __func__, kcontrol->id.name);
  2135. return -EINVAL;
  2136. }
  2137. } else {
  2138. return -EINVAL;
  2139. }
  2140. return 0;
  2141. }
  2142. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2143. struct snd_ctl_elem_value *ucontrol)
  2144. {
  2145. struct tdm_port port;
  2146. int ret = tdm_get_port_idx(kcontrol, &port);
  2147. if (ret) {
  2148. pr_err("%s: unsupported control: %s\n",
  2149. __func__, kcontrol->id.name);
  2150. } else {
  2151. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2152. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2153. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2154. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2155. ucontrol->value.enumerated.item[0]);
  2156. }
  2157. return ret;
  2158. }
  2159. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2160. struct snd_ctl_elem_value *ucontrol)
  2161. {
  2162. struct tdm_port port;
  2163. int ret = tdm_get_port_idx(kcontrol, &port);
  2164. if (ret) {
  2165. pr_err("%s: unsupported control: %s\n",
  2166. __func__, kcontrol->id.name);
  2167. } else {
  2168. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2169. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2170. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2171. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2172. ucontrol->value.enumerated.item[0]);
  2173. }
  2174. return ret;
  2175. }
  2176. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2177. struct snd_ctl_elem_value *ucontrol)
  2178. {
  2179. struct tdm_port port;
  2180. int ret = tdm_get_port_idx(kcontrol, &port);
  2181. if (ret) {
  2182. pr_err("%s: unsupported control: %s\n",
  2183. __func__, kcontrol->id.name);
  2184. } else {
  2185. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2186. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2187. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2188. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2189. ucontrol->value.enumerated.item[0]);
  2190. }
  2191. return ret;
  2192. }
  2193. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2194. struct snd_ctl_elem_value *ucontrol)
  2195. {
  2196. struct tdm_port port;
  2197. int ret = tdm_get_port_idx(kcontrol, &port);
  2198. if (ret) {
  2199. pr_err("%s: unsupported control: %s\n",
  2200. __func__, kcontrol->id.name);
  2201. } else {
  2202. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2203. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2204. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2205. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2206. ucontrol->value.enumerated.item[0]);
  2207. }
  2208. return ret;
  2209. }
  2210. static int tdm_get_format(int value)
  2211. {
  2212. int format = 0;
  2213. switch (value) {
  2214. case 0:
  2215. format = SNDRV_PCM_FORMAT_S16_LE;
  2216. break;
  2217. case 1:
  2218. format = SNDRV_PCM_FORMAT_S24_LE;
  2219. break;
  2220. case 2:
  2221. format = SNDRV_PCM_FORMAT_S32_LE;
  2222. break;
  2223. default:
  2224. format = SNDRV_PCM_FORMAT_S16_LE;
  2225. break;
  2226. }
  2227. return format;
  2228. }
  2229. static int tdm_get_format_val(int format)
  2230. {
  2231. int value = 0;
  2232. switch (format) {
  2233. case SNDRV_PCM_FORMAT_S16_LE:
  2234. value = 0;
  2235. break;
  2236. case SNDRV_PCM_FORMAT_S24_LE:
  2237. value = 1;
  2238. break;
  2239. case SNDRV_PCM_FORMAT_S32_LE:
  2240. value = 2;
  2241. break;
  2242. default:
  2243. value = 0;
  2244. break;
  2245. }
  2246. return value;
  2247. }
  2248. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2249. struct snd_ctl_elem_value *ucontrol)
  2250. {
  2251. struct tdm_port port;
  2252. int ret = tdm_get_port_idx(kcontrol, &port);
  2253. if (ret) {
  2254. pr_err("%s: unsupported control: %s\n",
  2255. __func__, kcontrol->id.name);
  2256. } else {
  2257. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2258. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2259. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2260. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2261. ucontrol->value.enumerated.item[0]);
  2262. }
  2263. return ret;
  2264. }
  2265. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2266. struct snd_ctl_elem_value *ucontrol)
  2267. {
  2268. struct tdm_port port;
  2269. int ret = tdm_get_port_idx(kcontrol, &port);
  2270. if (ret) {
  2271. pr_err("%s: unsupported control: %s\n",
  2272. __func__, kcontrol->id.name);
  2273. } else {
  2274. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2275. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2276. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2277. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2278. ucontrol->value.enumerated.item[0]);
  2279. }
  2280. return ret;
  2281. }
  2282. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2283. struct snd_ctl_elem_value *ucontrol)
  2284. {
  2285. struct tdm_port port;
  2286. int ret = tdm_get_port_idx(kcontrol, &port);
  2287. if (ret) {
  2288. pr_err("%s: unsupported control: %s\n",
  2289. __func__, kcontrol->id.name);
  2290. } else {
  2291. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2292. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2293. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2294. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2295. ucontrol->value.enumerated.item[0]);
  2296. }
  2297. return ret;
  2298. }
  2299. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2300. struct snd_ctl_elem_value *ucontrol)
  2301. {
  2302. struct tdm_port port;
  2303. int ret = tdm_get_port_idx(kcontrol, &port);
  2304. if (ret) {
  2305. pr_err("%s: unsupported control: %s\n",
  2306. __func__, kcontrol->id.name);
  2307. } else {
  2308. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2309. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2310. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2311. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2312. ucontrol->value.enumerated.item[0]);
  2313. }
  2314. return ret;
  2315. }
  2316. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2317. struct snd_ctl_elem_value *ucontrol)
  2318. {
  2319. struct tdm_port port;
  2320. int ret = tdm_get_port_idx(kcontrol, &port);
  2321. if (ret) {
  2322. pr_err("%s: unsupported control: %s\n",
  2323. __func__, kcontrol->id.name);
  2324. } else {
  2325. ucontrol->value.enumerated.item[0] =
  2326. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2327. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2328. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2329. ucontrol->value.enumerated.item[0]);
  2330. }
  2331. return ret;
  2332. }
  2333. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2334. struct snd_ctl_elem_value *ucontrol)
  2335. {
  2336. struct tdm_port port;
  2337. int ret = tdm_get_port_idx(kcontrol, &port);
  2338. if (ret) {
  2339. pr_err("%s: unsupported control: %s\n",
  2340. __func__, kcontrol->id.name);
  2341. } else {
  2342. tdm_rx_cfg[port.mode][port.channel].channels =
  2343. ucontrol->value.enumerated.item[0] + 1;
  2344. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2345. tdm_rx_cfg[port.mode][port.channel].channels,
  2346. ucontrol->value.enumerated.item[0] + 1);
  2347. }
  2348. return ret;
  2349. }
  2350. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2351. struct snd_ctl_elem_value *ucontrol)
  2352. {
  2353. struct tdm_port port;
  2354. int ret = tdm_get_port_idx(kcontrol, &port);
  2355. if (ret) {
  2356. pr_err("%s: unsupported control: %s\n",
  2357. __func__, kcontrol->id.name);
  2358. } else {
  2359. ucontrol->value.enumerated.item[0] =
  2360. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2361. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2362. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2363. ucontrol->value.enumerated.item[0]);
  2364. }
  2365. return ret;
  2366. }
  2367. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2368. struct snd_ctl_elem_value *ucontrol)
  2369. {
  2370. struct tdm_port port;
  2371. int ret = tdm_get_port_idx(kcontrol, &port);
  2372. if (ret) {
  2373. pr_err("%s: unsupported control: %s\n",
  2374. __func__, kcontrol->id.name);
  2375. } else {
  2376. tdm_tx_cfg[port.mode][port.channel].channels =
  2377. ucontrol->value.enumerated.item[0] + 1;
  2378. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2379. tdm_tx_cfg[port.mode][port.channel].channels,
  2380. ucontrol->value.enumerated.item[0] + 1);
  2381. }
  2382. return ret;
  2383. }
  2384. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2385. {
  2386. int idx;
  2387. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2388. sizeof("PRIM_AUX_PCM"))) {
  2389. idx = PRIM_AUX_PCM;
  2390. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2391. sizeof("SEC_AUX_PCM"))) {
  2392. idx = SEC_AUX_PCM;
  2393. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2394. sizeof("TERT_AUX_PCM"))) {
  2395. idx = TERT_AUX_PCM;
  2396. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2397. sizeof("QUAT_AUX_PCM"))) {
  2398. idx = QUAT_AUX_PCM;
  2399. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2400. sizeof("QUIN_AUX_PCM"))) {
  2401. idx = QUIN_AUX_PCM;
  2402. } else {
  2403. pr_err("%s: unsupported port: %s\n",
  2404. __func__, kcontrol->id.name);
  2405. idx = -EINVAL;
  2406. }
  2407. return idx;
  2408. }
  2409. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2410. struct snd_ctl_elem_value *ucontrol)
  2411. {
  2412. int idx = aux_pcm_get_port_idx(kcontrol);
  2413. if (idx < 0)
  2414. return idx;
  2415. aux_pcm_rx_cfg[idx].sample_rate =
  2416. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2417. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2418. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2419. ucontrol->value.enumerated.item[0]);
  2420. return 0;
  2421. }
  2422. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2423. struct snd_ctl_elem_value *ucontrol)
  2424. {
  2425. int idx = aux_pcm_get_port_idx(kcontrol);
  2426. if (idx < 0)
  2427. return idx;
  2428. ucontrol->value.enumerated.item[0] =
  2429. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2430. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2431. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2432. ucontrol->value.enumerated.item[0]);
  2433. return 0;
  2434. }
  2435. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2436. struct snd_ctl_elem_value *ucontrol)
  2437. {
  2438. int idx = aux_pcm_get_port_idx(kcontrol);
  2439. if (idx < 0)
  2440. return idx;
  2441. aux_pcm_tx_cfg[idx].sample_rate =
  2442. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2443. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2444. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2445. ucontrol->value.enumerated.item[0]);
  2446. return 0;
  2447. }
  2448. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2449. struct snd_ctl_elem_value *ucontrol)
  2450. {
  2451. int idx = aux_pcm_get_port_idx(kcontrol);
  2452. if (idx < 0)
  2453. return idx;
  2454. ucontrol->value.enumerated.item[0] =
  2455. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2456. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2457. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2458. ucontrol->value.enumerated.item[0]);
  2459. return 0;
  2460. }
  2461. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2462. {
  2463. int idx;
  2464. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2465. sizeof("PRIM_MI2S_RX"))) {
  2466. idx = PRIM_MI2S;
  2467. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2468. sizeof("SEC_MI2S_RX"))) {
  2469. idx = SEC_MI2S;
  2470. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2471. sizeof("TERT_MI2S_RX"))) {
  2472. idx = TERT_MI2S;
  2473. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2474. sizeof("QUAT_MI2S_RX"))) {
  2475. idx = QUAT_MI2S;
  2476. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2477. sizeof("QUIN_MI2S_RX"))) {
  2478. idx = QUIN_MI2S;
  2479. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2480. sizeof("PRIM_MI2S_TX"))) {
  2481. idx = PRIM_MI2S;
  2482. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2483. sizeof("SEC_MI2S_TX"))) {
  2484. idx = SEC_MI2S;
  2485. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2486. sizeof("TERT_MI2S_TX"))) {
  2487. idx = TERT_MI2S;
  2488. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2489. sizeof("QUAT_MI2S_TX"))) {
  2490. idx = QUAT_MI2S;
  2491. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2492. sizeof("QUIN_MI2S_TX"))) {
  2493. idx = QUIN_MI2S;
  2494. } else {
  2495. pr_err("%s: unsupported channel: %s\n",
  2496. __func__, kcontrol->id.name);
  2497. idx = -EINVAL;
  2498. }
  2499. return idx;
  2500. }
  2501. static int mi2s_get_sample_rate_val(int sample_rate)
  2502. {
  2503. int sample_rate_val;
  2504. switch (sample_rate) {
  2505. case SAMPLING_RATE_8KHZ:
  2506. sample_rate_val = 0;
  2507. break;
  2508. case SAMPLING_RATE_11P025KHZ:
  2509. sample_rate_val = 1;
  2510. break;
  2511. case SAMPLING_RATE_16KHZ:
  2512. sample_rate_val = 2;
  2513. break;
  2514. case SAMPLING_RATE_22P05KHZ:
  2515. sample_rate_val = 3;
  2516. break;
  2517. case SAMPLING_RATE_32KHZ:
  2518. sample_rate_val = 4;
  2519. break;
  2520. case SAMPLING_RATE_44P1KHZ:
  2521. sample_rate_val = 5;
  2522. break;
  2523. case SAMPLING_RATE_48KHZ:
  2524. sample_rate_val = 6;
  2525. break;
  2526. case SAMPLING_RATE_96KHZ:
  2527. sample_rate_val = 7;
  2528. break;
  2529. case SAMPLING_RATE_192KHZ:
  2530. sample_rate_val = 8;
  2531. break;
  2532. default:
  2533. sample_rate_val = 6;
  2534. break;
  2535. }
  2536. return sample_rate_val;
  2537. }
  2538. static int mi2s_get_sample_rate(int value)
  2539. {
  2540. int sample_rate;
  2541. switch (value) {
  2542. case 0:
  2543. sample_rate = SAMPLING_RATE_8KHZ;
  2544. break;
  2545. case 1:
  2546. sample_rate = SAMPLING_RATE_11P025KHZ;
  2547. break;
  2548. case 2:
  2549. sample_rate = SAMPLING_RATE_16KHZ;
  2550. break;
  2551. case 3:
  2552. sample_rate = SAMPLING_RATE_22P05KHZ;
  2553. break;
  2554. case 4:
  2555. sample_rate = SAMPLING_RATE_32KHZ;
  2556. break;
  2557. case 5:
  2558. sample_rate = SAMPLING_RATE_44P1KHZ;
  2559. break;
  2560. case 6:
  2561. sample_rate = SAMPLING_RATE_48KHZ;
  2562. break;
  2563. case 7:
  2564. sample_rate = SAMPLING_RATE_96KHZ;
  2565. break;
  2566. case 8:
  2567. sample_rate = SAMPLING_RATE_192KHZ;
  2568. break;
  2569. default:
  2570. sample_rate = SAMPLING_RATE_48KHZ;
  2571. break;
  2572. }
  2573. return sample_rate;
  2574. }
  2575. static int mi2s_auxpcm_get_format(int value)
  2576. {
  2577. int format;
  2578. switch (value) {
  2579. case 0:
  2580. format = SNDRV_PCM_FORMAT_S16_LE;
  2581. break;
  2582. case 1:
  2583. format = SNDRV_PCM_FORMAT_S24_LE;
  2584. break;
  2585. case 2:
  2586. format = SNDRV_PCM_FORMAT_S24_3LE;
  2587. break;
  2588. case 3:
  2589. format = SNDRV_PCM_FORMAT_S32_LE;
  2590. break;
  2591. default:
  2592. format = SNDRV_PCM_FORMAT_S16_LE;
  2593. break;
  2594. }
  2595. return format;
  2596. }
  2597. static int mi2s_auxpcm_get_format_value(int format)
  2598. {
  2599. int value;
  2600. switch (format) {
  2601. case SNDRV_PCM_FORMAT_S16_LE:
  2602. value = 0;
  2603. break;
  2604. case SNDRV_PCM_FORMAT_S24_LE:
  2605. value = 1;
  2606. break;
  2607. case SNDRV_PCM_FORMAT_S24_3LE:
  2608. value = 2;
  2609. break;
  2610. case SNDRV_PCM_FORMAT_S32_LE:
  2611. value = 3;
  2612. break;
  2613. default:
  2614. value = 0;
  2615. break;
  2616. }
  2617. return value;
  2618. }
  2619. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2620. struct snd_ctl_elem_value *ucontrol)
  2621. {
  2622. int idx = mi2s_get_port_idx(kcontrol);
  2623. if (idx < 0)
  2624. return idx;
  2625. mi2s_rx_cfg[idx].sample_rate =
  2626. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2627. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2628. idx, mi2s_rx_cfg[idx].sample_rate,
  2629. ucontrol->value.enumerated.item[0]);
  2630. return 0;
  2631. }
  2632. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2633. struct snd_ctl_elem_value *ucontrol)
  2634. {
  2635. int idx = mi2s_get_port_idx(kcontrol);
  2636. if (idx < 0)
  2637. return idx;
  2638. ucontrol->value.enumerated.item[0] =
  2639. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2640. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2641. idx, mi2s_rx_cfg[idx].sample_rate,
  2642. ucontrol->value.enumerated.item[0]);
  2643. return 0;
  2644. }
  2645. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2646. struct snd_ctl_elem_value *ucontrol)
  2647. {
  2648. int idx = mi2s_get_port_idx(kcontrol);
  2649. if (idx < 0)
  2650. return idx;
  2651. mi2s_tx_cfg[idx].sample_rate =
  2652. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2653. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2654. idx, mi2s_tx_cfg[idx].sample_rate,
  2655. ucontrol->value.enumerated.item[0]);
  2656. return 0;
  2657. }
  2658. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2659. struct snd_ctl_elem_value *ucontrol)
  2660. {
  2661. int idx = mi2s_get_port_idx(kcontrol);
  2662. if (idx < 0)
  2663. return idx;
  2664. ucontrol->value.enumerated.item[0] =
  2665. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2666. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2667. idx, mi2s_tx_cfg[idx].sample_rate,
  2668. ucontrol->value.enumerated.item[0]);
  2669. return 0;
  2670. }
  2671. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2672. struct snd_ctl_elem_value *ucontrol)
  2673. {
  2674. int idx = mi2s_get_port_idx(kcontrol);
  2675. if (idx < 0)
  2676. return idx;
  2677. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2678. idx, mi2s_rx_cfg[idx].channels);
  2679. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2680. return 0;
  2681. }
  2682. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2683. struct snd_ctl_elem_value *ucontrol)
  2684. {
  2685. int idx = mi2s_get_port_idx(kcontrol);
  2686. if (idx < 0)
  2687. return idx;
  2688. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2689. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2690. idx, mi2s_rx_cfg[idx].channels);
  2691. return 1;
  2692. }
  2693. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2694. struct snd_ctl_elem_value *ucontrol)
  2695. {
  2696. int idx = mi2s_get_port_idx(kcontrol);
  2697. if (idx < 0)
  2698. return idx;
  2699. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2700. idx, mi2s_tx_cfg[idx].channels);
  2701. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2702. return 0;
  2703. }
  2704. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2705. struct snd_ctl_elem_value *ucontrol)
  2706. {
  2707. int idx = mi2s_get_port_idx(kcontrol);
  2708. if (idx < 0)
  2709. return idx;
  2710. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2711. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2712. idx, mi2s_tx_cfg[idx].channels);
  2713. return 1;
  2714. }
  2715. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2716. struct snd_ctl_elem_value *ucontrol)
  2717. {
  2718. int idx = mi2s_get_port_idx(kcontrol);
  2719. if (idx < 0)
  2720. return idx;
  2721. ucontrol->value.enumerated.item[0] =
  2722. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2723. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2724. idx, mi2s_rx_cfg[idx].bit_format,
  2725. ucontrol->value.enumerated.item[0]);
  2726. return 0;
  2727. }
  2728. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2729. struct snd_ctl_elem_value *ucontrol)
  2730. {
  2731. int idx = mi2s_get_port_idx(kcontrol);
  2732. if (idx < 0)
  2733. return idx;
  2734. mi2s_rx_cfg[idx].bit_format =
  2735. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2736. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2737. idx, mi2s_rx_cfg[idx].bit_format,
  2738. ucontrol->value.enumerated.item[0]);
  2739. return 0;
  2740. }
  2741. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2742. struct snd_ctl_elem_value *ucontrol)
  2743. {
  2744. int idx = mi2s_get_port_idx(kcontrol);
  2745. if (idx < 0)
  2746. return idx;
  2747. ucontrol->value.enumerated.item[0] =
  2748. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2749. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2750. idx, mi2s_tx_cfg[idx].bit_format,
  2751. ucontrol->value.enumerated.item[0]);
  2752. return 0;
  2753. }
  2754. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2755. struct snd_ctl_elem_value *ucontrol)
  2756. {
  2757. int idx = mi2s_get_port_idx(kcontrol);
  2758. if (idx < 0)
  2759. return idx;
  2760. mi2s_tx_cfg[idx].bit_format =
  2761. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2762. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2763. idx, mi2s_tx_cfg[idx].bit_format,
  2764. ucontrol->value.enumerated.item[0]);
  2765. return 0;
  2766. }
  2767. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2768. struct snd_ctl_elem_value *ucontrol)
  2769. {
  2770. int idx = aux_pcm_get_port_idx(kcontrol);
  2771. if (idx < 0)
  2772. return idx;
  2773. ucontrol->value.enumerated.item[0] =
  2774. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2775. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2776. idx, aux_pcm_rx_cfg[idx].bit_format,
  2777. ucontrol->value.enumerated.item[0]);
  2778. return 0;
  2779. }
  2780. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2781. struct snd_ctl_elem_value *ucontrol)
  2782. {
  2783. int idx = aux_pcm_get_port_idx(kcontrol);
  2784. if (idx < 0)
  2785. return idx;
  2786. aux_pcm_rx_cfg[idx].bit_format =
  2787. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2788. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2789. idx, aux_pcm_rx_cfg[idx].bit_format,
  2790. ucontrol->value.enumerated.item[0]);
  2791. return 0;
  2792. }
  2793. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2794. struct snd_ctl_elem_value *ucontrol)
  2795. {
  2796. int idx = aux_pcm_get_port_idx(kcontrol);
  2797. if (idx < 0)
  2798. return idx;
  2799. ucontrol->value.enumerated.item[0] =
  2800. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2801. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2802. idx, aux_pcm_tx_cfg[idx].bit_format,
  2803. ucontrol->value.enumerated.item[0]);
  2804. return 0;
  2805. }
  2806. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2807. struct snd_ctl_elem_value *ucontrol)
  2808. {
  2809. int idx = aux_pcm_get_port_idx(kcontrol);
  2810. if (idx < 0)
  2811. return idx;
  2812. aux_pcm_tx_cfg[idx].bit_format =
  2813. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2814. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2815. idx, aux_pcm_tx_cfg[idx].bit_format,
  2816. ucontrol->value.enumerated.item[0]);
  2817. return 0;
  2818. }
  2819. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2820. {
  2821. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2822. struct snd_soc_card *card = codec->component.card;
  2823. struct msm_asoc_mach_data *pdata =
  2824. snd_soc_card_get_drvdata(card);
  2825. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2826. msm_hifi_control);
  2827. if (!pdata || !pdata->hph_en1_gpio_p) {
  2828. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2829. return -EINVAL;
  2830. }
  2831. if (msm_hifi_control == MSM_HIFI_ON) {
  2832. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2833. /* 5msec delay needed as per HW requirement */
  2834. usleep_range(5000, 5010);
  2835. } else {
  2836. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2837. }
  2838. snd_soc_dapm_sync(dapm);
  2839. return 0;
  2840. }
  2841. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2842. struct snd_ctl_elem_value *ucontrol)
  2843. {
  2844. pr_debug("%s: msm_hifi_control = %d\n",
  2845. __func__, msm_hifi_control);
  2846. ucontrol->value.integer.value[0] = msm_hifi_control;
  2847. return 0;
  2848. }
  2849. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2850. struct snd_ctl_elem_value *ucontrol)
  2851. {
  2852. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2853. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2854. __func__, ucontrol->value.integer.value[0]);
  2855. msm_hifi_control = ucontrol->value.integer.value[0];
  2856. msm_hifi_ctrl(codec);
  2857. return 0;
  2858. }
  2859. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2860. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2861. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2862. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2863. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2864. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2865. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2866. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2867. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2868. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2869. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2870. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2871. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2872. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2873. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2874. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2875. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2876. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2877. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2878. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2879. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2880. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2881. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2882. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2883. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2884. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2885. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2886. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2887. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2888. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2889. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2890. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2891. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2892. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2893. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2894. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2895. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2896. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2897. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2898. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2899. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2900. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2901. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2902. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2903. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2904. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2905. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2906. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2907. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2908. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2909. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2910. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2911. wsa_cdc_dma_rx_0_sample_rate,
  2912. cdc_dma_rx_sample_rate_get,
  2913. cdc_dma_rx_sample_rate_put),
  2914. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2915. wsa_cdc_dma_rx_1_sample_rate,
  2916. cdc_dma_rx_sample_rate_get,
  2917. cdc_dma_rx_sample_rate_put),
  2918. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2919. rx_cdc_dma_rx_0_sample_rate,
  2920. cdc_dma_rx_sample_rate_get,
  2921. cdc_dma_rx_sample_rate_put),
  2922. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2923. rx_cdc_dma_rx_1_sample_rate,
  2924. cdc_dma_rx_sample_rate_get,
  2925. cdc_dma_rx_sample_rate_put),
  2926. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2927. rx_cdc_dma_rx_2_sample_rate,
  2928. cdc_dma_rx_sample_rate_get,
  2929. cdc_dma_rx_sample_rate_put),
  2930. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2931. rx_cdc_dma_rx_3_sample_rate,
  2932. cdc_dma_rx_sample_rate_get,
  2933. cdc_dma_rx_sample_rate_put),
  2934. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2935. rx_cdc_dma_rx_5_sample_rate,
  2936. cdc_dma_rx_sample_rate_get,
  2937. cdc_dma_rx_sample_rate_put),
  2938. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2939. wsa_cdc_dma_tx_0_sample_rate,
  2940. cdc_dma_tx_sample_rate_get,
  2941. cdc_dma_tx_sample_rate_put),
  2942. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2943. wsa_cdc_dma_tx_1_sample_rate,
  2944. cdc_dma_tx_sample_rate_get,
  2945. cdc_dma_tx_sample_rate_put),
  2946. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2947. wsa_cdc_dma_tx_2_sample_rate,
  2948. cdc_dma_tx_sample_rate_get,
  2949. cdc_dma_tx_sample_rate_put),
  2950. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2951. tx_cdc_dma_tx_0_sample_rate,
  2952. cdc_dma_tx_sample_rate_get,
  2953. cdc_dma_tx_sample_rate_put),
  2954. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2955. tx_cdc_dma_tx_3_sample_rate,
  2956. cdc_dma_tx_sample_rate_get,
  2957. cdc_dma_tx_sample_rate_put),
  2958. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2959. tx_cdc_dma_tx_4_sample_rate,
  2960. cdc_dma_tx_sample_rate_get,
  2961. cdc_dma_tx_sample_rate_put),
  2962. };
  2963. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2964. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2965. slim_rx_ch_get, slim_rx_ch_put),
  2966. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2967. slim_rx_ch_get, slim_rx_ch_put),
  2968. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2969. slim_tx_ch_get, slim_tx_ch_put),
  2970. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2971. slim_tx_ch_get, slim_tx_ch_put),
  2972. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2973. slim_rx_ch_get, slim_rx_ch_put),
  2974. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2975. slim_rx_ch_get, slim_rx_ch_put),
  2976. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2977. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2978. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2979. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2980. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2981. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2982. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2983. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2984. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2985. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2986. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2987. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2988. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2989. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2990. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2991. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2992. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2993. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2994. };
  2995. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2996. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2997. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2998. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2999. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3000. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3001. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3002. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3003. proxy_rx_ch_get, proxy_rx_ch_put),
  3004. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3005. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3006. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3007. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3008. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3009. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3010. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3011. usb_audio_rx_sample_rate_get,
  3012. usb_audio_rx_sample_rate_put),
  3013. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3014. usb_audio_tx_sample_rate_get,
  3015. usb_audio_tx_sample_rate_put),
  3016. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3017. ext_disp_rx_sample_rate_get,
  3018. ext_disp_rx_sample_rate_put),
  3019. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3020. tdm_rx_sample_rate_get,
  3021. tdm_rx_sample_rate_put),
  3022. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3023. tdm_tx_sample_rate_get,
  3024. tdm_tx_sample_rate_put),
  3025. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3026. tdm_rx_format_get,
  3027. tdm_rx_format_put),
  3028. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3029. tdm_tx_format_get,
  3030. tdm_tx_format_put),
  3031. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3032. tdm_rx_ch_get,
  3033. tdm_rx_ch_put),
  3034. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3035. tdm_tx_ch_get,
  3036. tdm_tx_ch_put),
  3037. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3038. tdm_rx_sample_rate_get,
  3039. tdm_rx_sample_rate_put),
  3040. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3041. tdm_tx_sample_rate_get,
  3042. tdm_tx_sample_rate_put),
  3043. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3044. tdm_rx_format_get,
  3045. tdm_rx_format_put),
  3046. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3047. tdm_tx_format_get,
  3048. tdm_tx_format_put),
  3049. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3050. tdm_rx_ch_get,
  3051. tdm_rx_ch_put),
  3052. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3053. tdm_tx_ch_get,
  3054. tdm_tx_ch_put),
  3055. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3056. tdm_rx_sample_rate_get,
  3057. tdm_rx_sample_rate_put),
  3058. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3059. tdm_tx_sample_rate_get,
  3060. tdm_tx_sample_rate_put),
  3061. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3062. tdm_rx_format_get,
  3063. tdm_rx_format_put),
  3064. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3065. tdm_tx_format_get,
  3066. tdm_tx_format_put),
  3067. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3068. tdm_rx_ch_get,
  3069. tdm_rx_ch_put),
  3070. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3071. tdm_tx_ch_get,
  3072. tdm_tx_ch_put),
  3073. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3074. tdm_rx_sample_rate_get,
  3075. tdm_rx_sample_rate_put),
  3076. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3077. tdm_tx_sample_rate_get,
  3078. tdm_tx_sample_rate_put),
  3079. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3080. tdm_rx_format_get,
  3081. tdm_rx_format_put),
  3082. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3083. tdm_tx_format_get,
  3084. tdm_tx_format_put),
  3085. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3086. tdm_rx_ch_get,
  3087. tdm_rx_ch_put),
  3088. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3089. tdm_tx_ch_get,
  3090. tdm_tx_ch_put),
  3091. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3092. tdm_rx_sample_rate_get,
  3093. tdm_rx_sample_rate_put),
  3094. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3095. tdm_tx_sample_rate_get,
  3096. tdm_tx_sample_rate_put),
  3097. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3098. tdm_rx_format_get,
  3099. tdm_rx_format_put),
  3100. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3101. tdm_tx_format_get,
  3102. tdm_tx_format_put),
  3103. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3104. tdm_rx_ch_get,
  3105. tdm_rx_ch_put),
  3106. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3107. tdm_tx_ch_get,
  3108. tdm_tx_ch_put),
  3109. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3110. aux_pcm_rx_sample_rate_get,
  3111. aux_pcm_rx_sample_rate_put),
  3112. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3113. aux_pcm_rx_sample_rate_get,
  3114. aux_pcm_rx_sample_rate_put),
  3115. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3116. aux_pcm_rx_sample_rate_get,
  3117. aux_pcm_rx_sample_rate_put),
  3118. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3119. aux_pcm_rx_sample_rate_get,
  3120. aux_pcm_rx_sample_rate_put),
  3121. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3122. aux_pcm_rx_sample_rate_get,
  3123. aux_pcm_rx_sample_rate_put),
  3124. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3125. aux_pcm_tx_sample_rate_get,
  3126. aux_pcm_tx_sample_rate_put),
  3127. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3128. aux_pcm_tx_sample_rate_get,
  3129. aux_pcm_tx_sample_rate_put),
  3130. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3131. aux_pcm_tx_sample_rate_get,
  3132. aux_pcm_tx_sample_rate_put),
  3133. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3134. aux_pcm_tx_sample_rate_get,
  3135. aux_pcm_tx_sample_rate_put),
  3136. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3137. aux_pcm_tx_sample_rate_get,
  3138. aux_pcm_tx_sample_rate_put),
  3139. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3140. mi2s_rx_sample_rate_get,
  3141. mi2s_rx_sample_rate_put),
  3142. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3143. mi2s_rx_sample_rate_get,
  3144. mi2s_rx_sample_rate_put),
  3145. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3146. mi2s_rx_sample_rate_get,
  3147. mi2s_rx_sample_rate_put),
  3148. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3149. mi2s_rx_sample_rate_get,
  3150. mi2s_rx_sample_rate_put),
  3151. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3152. mi2s_rx_sample_rate_get,
  3153. mi2s_rx_sample_rate_put),
  3154. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3155. mi2s_tx_sample_rate_get,
  3156. mi2s_tx_sample_rate_put),
  3157. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3158. mi2s_tx_sample_rate_get,
  3159. mi2s_tx_sample_rate_put),
  3160. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3161. mi2s_tx_sample_rate_get,
  3162. mi2s_tx_sample_rate_put),
  3163. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3164. mi2s_tx_sample_rate_get,
  3165. mi2s_tx_sample_rate_put),
  3166. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3167. mi2s_tx_sample_rate_get,
  3168. mi2s_tx_sample_rate_put),
  3169. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3170. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3171. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3172. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3173. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3174. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3175. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3176. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3177. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3178. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3179. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3180. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3181. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3182. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3183. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3184. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3185. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3186. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3187. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3188. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3189. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3190. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3191. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3192. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3193. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3194. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3195. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3196. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3197. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3198. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3199. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3200. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3201. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3202. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3203. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3204. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3205. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3206. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3207. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3208. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3209. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3210. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3211. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3212. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3213. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3214. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3215. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3216. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3217. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3218. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3219. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3220. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3221. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3222. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3223. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3224. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3225. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3226. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3227. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3228. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3229. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3230. msm_hifi_put),
  3231. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3232. msm_bt_sample_rate_get,
  3233. msm_bt_sample_rate_put),
  3234. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3235. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3236. };
  3237. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3238. int enable, bool dapm)
  3239. {
  3240. int ret = 0;
  3241. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3242. ret = tavil_cdc_mclk_enable(codec, enable);
  3243. } else {
  3244. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3245. __func__);
  3246. ret = -EINVAL;
  3247. }
  3248. return ret;
  3249. }
  3250. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3251. int enable, bool dapm)
  3252. {
  3253. int ret = 0;
  3254. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3255. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3256. } else {
  3257. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3258. __func__);
  3259. ret = -EINVAL;
  3260. }
  3261. return ret;
  3262. }
  3263. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3264. struct snd_kcontrol *kcontrol, int event)
  3265. {
  3266. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3267. pr_debug("%s: event = %d\n", __func__, event);
  3268. switch (event) {
  3269. case SND_SOC_DAPM_PRE_PMU:
  3270. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3271. case SND_SOC_DAPM_POST_PMD:
  3272. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3273. }
  3274. return 0;
  3275. }
  3276. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3277. struct snd_kcontrol *kcontrol, int event)
  3278. {
  3279. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3280. pr_debug("%s: event = %d\n", __func__, event);
  3281. switch (event) {
  3282. case SND_SOC_DAPM_PRE_PMU:
  3283. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3284. case SND_SOC_DAPM_POST_PMD:
  3285. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3286. }
  3287. return 0;
  3288. }
  3289. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3290. struct snd_kcontrol *k, int event)
  3291. {
  3292. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3293. struct snd_soc_card *card = codec->component.card;
  3294. struct msm_asoc_mach_data *pdata =
  3295. snd_soc_card_get_drvdata(card);
  3296. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3297. __func__, msm_hifi_control);
  3298. if (!pdata || !pdata->hph_en0_gpio_p) {
  3299. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3300. return -EINVAL;
  3301. }
  3302. if (msm_hifi_control != MSM_HIFI_ON) {
  3303. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3304. __func__);
  3305. return 0;
  3306. }
  3307. switch (event) {
  3308. case SND_SOC_DAPM_POST_PMU:
  3309. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3310. break;
  3311. case SND_SOC_DAPM_PRE_PMD:
  3312. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3313. break;
  3314. }
  3315. return 0;
  3316. }
  3317. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3318. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3319. msm_mclk_event,
  3320. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3321. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3322. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3323. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3324. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3325. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3326. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3327. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3328. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3329. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3330. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3331. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3332. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3333. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3334. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3335. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3336. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3337. };
  3338. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3339. struct snd_kcontrol *kcontrol, int event)
  3340. {
  3341. struct msm_asoc_mach_data *pdata = NULL;
  3342. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3343. int ret = 0;
  3344. u32 dmic_idx;
  3345. int *dmic_gpio_cnt;
  3346. struct device_node *dmic_gpio;
  3347. char *wname;
  3348. wname = strpbrk(w->name, "0123");
  3349. if (!wname) {
  3350. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3351. return -EINVAL;
  3352. }
  3353. ret = kstrtouint(wname, 10, &dmic_idx);
  3354. if (ret < 0) {
  3355. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3356. __func__);
  3357. return -EINVAL;
  3358. }
  3359. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3360. switch (dmic_idx) {
  3361. case 0:
  3362. case 1:
  3363. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3364. dmic_gpio = pdata->dmic01_gpio_p;
  3365. break;
  3366. case 2:
  3367. case 3:
  3368. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3369. dmic_gpio = pdata->dmic23_gpio_p;
  3370. break;
  3371. default:
  3372. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3373. __func__);
  3374. return -EINVAL;
  3375. }
  3376. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3377. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3378. switch (event) {
  3379. case SND_SOC_DAPM_PRE_PMU:
  3380. (*dmic_gpio_cnt)++;
  3381. if (*dmic_gpio_cnt == 1) {
  3382. ret = msm_cdc_pinctrl_select_active_state(
  3383. dmic_gpio);
  3384. if (ret < 0) {
  3385. pr_err("%s: gpio set cannot be activated %sd",
  3386. __func__, "dmic_gpio");
  3387. return ret;
  3388. }
  3389. }
  3390. break;
  3391. case SND_SOC_DAPM_POST_PMD:
  3392. (*dmic_gpio_cnt)--;
  3393. if (*dmic_gpio_cnt == 0) {
  3394. ret = msm_cdc_pinctrl_select_sleep_state(
  3395. dmic_gpio);
  3396. if (ret < 0) {
  3397. pr_err("%s: gpio set cannot be de-activated %sd",
  3398. __func__, "dmic_gpio");
  3399. return ret;
  3400. }
  3401. }
  3402. break;
  3403. default:
  3404. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3405. return -EINVAL;
  3406. }
  3407. return 0;
  3408. }
  3409. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3410. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3411. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3412. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3413. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3414. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3415. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3416. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3417. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3418. };
  3419. static inline int param_is_mask(int p)
  3420. {
  3421. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3422. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3423. }
  3424. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3425. int n)
  3426. {
  3427. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3428. }
  3429. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3430. unsigned int bit)
  3431. {
  3432. if (bit >= SNDRV_MASK_MAX)
  3433. return;
  3434. if (param_is_mask(n)) {
  3435. struct snd_mask *m = param_to_mask(p, n);
  3436. m->bits[0] = 0;
  3437. m->bits[1] = 0;
  3438. m->bits[bit >> 5] |= (1 << (bit & 31));
  3439. }
  3440. }
  3441. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3442. {
  3443. int ch_id = 0;
  3444. switch (be_id) {
  3445. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3446. ch_id = SLIM_RX_0;
  3447. break;
  3448. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3449. ch_id = SLIM_RX_1;
  3450. break;
  3451. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3452. ch_id = SLIM_RX_2;
  3453. break;
  3454. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3455. ch_id = SLIM_RX_3;
  3456. break;
  3457. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3458. ch_id = SLIM_RX_4;
  3459. break;
  3460. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3461. ch_id = SLIM_RX_6;
  3462. break;
  3463. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3464. ch_id = SLIM_TX_0;
  3465. break;
  3466. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3467. ch_id = SLIM_TX_3;
  3468. break;
  3469. default:
  3470. ch_id = SLIM_RX_0;
  3471. break;
  3472. }
  3473. return ch_id;
  3474. }
  3475. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3476. {
  3477. int idx = 0;
  3478. switch (be_id) {
  3479. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3480. idx = WSA_CDC_DMA_RX_0;
  3481. break;
  3482. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3483. idx = WSA_CDC_DMA_TX_0;
  3484. break;
  3485. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3486. idx = WSA_CDC_DMA_RX_1;
  3487. break;
  3488. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3489. idx = WSA_CDC_DMA_TX_1;
  3490. break;
  3491. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3492. idx = WSA_CDC_DMA_TX_2;
  3493. break;
  3494. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3495. idx = RX_CDC_DMA_RX_0;
  3496. break;
  3497. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3498. idx = RX_CDC_DMA_RX_1;
  3499. break;
  3500. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3501. idx = RX_CDC_DMA_RX_2;
  3502. break;
  3503. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3504. idx = RX_CDC_DMA_RX_3;
  3505. break;
  3506. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3507. idx = RX_CDC_DMA_RX_5;
  3508. break;
  3509. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3510. idx = TX_CDC_DMA_TX_0;
  3511. break;
  3512. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3513. idx = TX_CDC_DMA_TX_3;
  3514. break;
  3515. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3516. idx = TX_CDC_DMA_TX_4;
  3517. break;
  3518. default:
  3519. idx = RX_CDC_DMA_RX_0;
  3520. break;
  3521. }
  3522. return idx;
  3523. }
  3524. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3525. {
  3526. int idx = -EINVAL;
  3527. switch (be_id) {
  3528. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3529. idx = DP_RX_IDX;
  3530. break;
  3531. default:
  3532. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3533. idx = -EINVAL;
  3534. break;
  3535. }
  3536. return idx;
  3537. }
  3538. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3539. struct snd_pcm_hw_params *params)
  3540. {
  3541. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3542. struct snd_interval *rate = hw_param_interval(params,
  3543. SNDRV_PCM_HW_PARAM_RATE);
  3544. struct snd_interval *channels = hw_param_interval(params,
  3545. SNDRV_PCM_HW_PARAM_CHANNELS);
  3546. int rc = 0;
  3547. int idx;
  3548. void *config = NULL;
  3549. struct snd_soc_codec *codec = NULL;
  3550. pr_debug("%s: format = %d, rate = %d\n",
  3551. __func__, params_format(params), params_rate(params));
  3552. switch (dai_link->id) {
  3553. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3554. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3555. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3556. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3557. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3558. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3559. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3560. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3561. slim_rx_cfg[idx].bit_format);
  3562. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3563. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3564. break;
  3565. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3566. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3567. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3568. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3569. slim_tx_cfg[idx].bit_format);
  3570. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3571. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3572. break;
  3573. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3574. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3575. slim_tx_cfg[1].bit_format);
  3576. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3577. channels->min = channels->max = slim_tx_cfg[1].channels;
  3578. break;
  3579. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3580. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3581. SNDRV_PCM_FORMAT_S32_LE);
  3582. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3583. channels->min = channels->max = msm_vi_feed_tx_ch;
  3584. break;
  3585. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3586. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3587. slim_rx_cfg[5].bit_format);
  3588. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3589. channels->min = channels->max = slim_rx_cfg[5].channels;
  3590. break;
  3591. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3592. codec = rtd->codec;
  3593. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3594. channels->min = channels->max = 1;
  3595. config = msm_codec_fn.get_afe_config_fn(codec,
  3596. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3597. if (config) {
  3598. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3599. config, SLIMBUS_5_TX);
  3600. if (rc)
  3601. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3602. __func__, rc);
  3603. }
  3604. break;
  3605. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3606. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3607. slim_rx_cfg[SLIM_RX_7].bit_format);
  3608. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3609. channels->min = channels->max =
  3610. slim_rx_cfg[SLIM_RX_7].channels;
  3611. break;
  3612. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3613. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3614. channels->min = channels->max =
  3615. slim_tx_cfg[SLIM_TX_7].channels;
  3616. break;
  3617. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3618. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3619. channels->min = channels->max =
  3620. slim_tx_cfg[SLIM_TX_8].channels;
  3621. break;
  3622. case MSM_BACKEND_DAI_USB_RX:
  3623. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3624. usb_rx_cfg.bit_format);
  3625. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3626. channels->min = channels->max = usb_rx_cfg.channels;
  3627. break;
  3628. case MSM_BACKEND_DAI_USB_TX:
  3629. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3630. usb_tx_cfg.bit_format);
  3631. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3632. channels->min = channels->max = usb_tx_cfg.channels;
  3633. break;
  3634. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3635. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3636. if (idx < 0) {
  3637. pr_err("%s: Incorrect ext disp idx %d\n",
  3638. __func__, idx);
  3639. rc = idx;
  3640. goto done;
  3641. }
  3642. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3643. ext_disp_rx_cfg[idx].bit_format);
  3644. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3645. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3646. break;
  3647. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3648. channels->min = channels->max = proxy_rx_cfg.channels;
  3649. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3650. break;
  3651. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3652. channels->min = channels->max =
  3653. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3654. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3655. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3656. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3657. break;
  3658. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3659. channels->min = channels->max =
  3660. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3661. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3662. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3663. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3664. break;
  3665. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3666. channels->min = channels->max =
  3667. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3668. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3669. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3670. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3671. break;
  3672. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3673. channels->min = channels->max =
  3674. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3675. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3676. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3677. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3678. break;
  3679. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3680. channels->min = channels->max =
  3681. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3682. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3683. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3684. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3685. break;
  3686. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3687. channels->min = channels->max =
  3688. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3689. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3690. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3691. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3692. break;
  3693. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3694. channels->min = channels->max =
  3695. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3696. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3697. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3698. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3699. break;
  3700. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3701. channels->min = channels->max =
  3702. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3703. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3704. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3705. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3706. break;
  3707. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3708. channels->min = channels->max =
  3709. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3710. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3711. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3712. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3713. break;
  3714. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3715. channels->min = channels->max =
  3716. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3717. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3718. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3719. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3720. break;
  3721. case MSM_BACKEND_DAI_AUXPCM_RX:
  3722. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3723. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3724. rate->min = rate->max =
  3725. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3726. channels->min = channels->max =
  3727. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3728. break;
  3729. case MSM_BACKEND_DAI_AUXPCM_TX:
  3730. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3731. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3732. rate->min = rate->max =
  3733. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3734. channels->min = channels->max =
  3735. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3736. break;
  3737. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3738. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3739. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3740. rate->min = rate->max =
  3741. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3742. channels->min = channels->max =
  3743. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3744. break;
  3745. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3746. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3747. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3748. rate->min = rate->max =
  3749. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3750. channels->min = channels->max =
  3751. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3752. break;
  3753. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3754. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3755. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3756. rate->min = rate->max =
  3757. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3758. channels->min = channels->max =
  3759. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3760. break;
  3761. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3762. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3763. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3764. rate->min = rate->max =
  3765. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3766. channels->min = channels->max =
  3767. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3768. break;
  3769. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3770. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3771. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3772. rate->min = rate->max =
  3773. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3774. channels->min = channels->max =
  3775. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3776. break;
  3777. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3778. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3779. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3780. rate->min = rate->max =
  3781. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3782. channels->min = channels->max =
  3783. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3784. break;
  3785. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3786. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3787. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3788. rate->min = rate->max =
  3789. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3790. channels->min = channels->max =
  3791. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3792. break;
  3793. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3794. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3795. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3796. rate->min = rate->max =
  3797. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3798. channels->min = channels->max =
  3799. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3800. break;
  3801. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3802. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3803. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3804. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3805. channels->min = channels->max =
  3806. mi2s_rx_cfg[PRIM_MI2S].channels;
  3807. break;
  3808. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3809. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3810. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3811. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3812. channels->min = channels->max =
  3813. mi2s_tx_cfg[PRIM_MI2S].channels;
  3814. break;
  3815. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3816. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3817. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3818. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3819. channels->min = channels->max =
  3820. mi2s_rx_cfg[SEC_MI2S].channels;
  3821. break;
  3822. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3823. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3824. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3825. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3826. channels->min = channels->max =
  3827. mi2s_tx_cfg[SEC_MI2S].channels;
  3828. break;
  3829. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3830. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3831. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3832. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3833. channels->min = channels->max =
  3834. mi2s_rx_cfg[TERT_MI2S].channels;
  3835. break;
  3836. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3837. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3838. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3839. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3840. channels->min = channels->max =
  3841. mi2s_tx_cfg[TERT_MI2S].channels;
  3842. break;
  3843. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3844. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3845. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3846. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3847. channels->min = channels->max =
  3848. mi2s_rx_cfg[QUAT_MI2S].channels;
  3849. break;
  3850. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3851. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3852. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3853. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3854. channels->min = channels->max =
  3855. mi2s_tx_cfg[QUAT_MI2S].channels;
  3856. break;
  3857. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3858. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3859. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3860. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3861. channels->min = channels->max =
  3862. mi2s_rx_cfg[QUIN_MI2S].channels;
  3863. break;
  3864. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3865. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3866. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3867. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3868. channels->min = channels->max =
  3869. mi2s_tx_cfg[QUIN_MI2S].channels;
  3870. break;
  3871. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3872. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3873. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3874. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3875. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3876. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3878. cdc_dma_rx_cfg[idx].bit_format);
  3879. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3880. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3881. break;
  3882. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3883. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3884. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3885. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3886. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3887. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3888. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3889. cdc_dma_tx_cfg[idx].bit_format);
  3890. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3891. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3892. break;
  3893. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3894. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3895. SNDRV_PCM_FORMAT_S32_LE);
  3896. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3897. channels->min = channels->max = msm_vi_feed_tx_ch;
  3898. break;
  3899. default:
  3900. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3901. break;
  3902. }
  3903. done:
  3904. return rc;
  3905. }
  3906. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3907. {
  3908. int value = 0;
  3909. bool ret = 0;
  3910. struct snd_soc_card *card = codec->component.card;
  3911. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3912. struct pinctrl_state *en2_pinctrl_active;
  3913. struct pinctrl_state *en2_pinctrl_sleep;
  3914. if (!pdata->usbc_en2_gpio_p) {
  3915. if (active) {
  3916. /* if active and usbc_en2_gpio undefined, get pin */
  3917. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3918. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3919. dev_err(card->dev,
  3920. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3921. __func__,
  3922. PTR_ERR(pdata->usbc_en2_gpio_p));
  3923. pdata->usbc_en2_gpio_p = NULL;
  3924. return false;
  3925. }
  3926. } else {
  3927. /* if not active and usbc_en2_gpio undefined, return */
  3928. return false;
  3929. }
  3930. }
  3931. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3932. "qcom,usbc-analog-en2-gpio", 0);
  3933. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3934. dev_err(card->dev, "%s, property %s not in node %s",
  3935. __func__, "qcom,usbc-analog-en2-gpio",
  3936. card->dev->of_node->full_name);
  3937. return false;
  3938. }
  3939. en2_pinctrl_active = pinctrl_lookup_state(
  3940. pdata->usbc_en2_gpio_p, "aud_active");
  3941. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3942. dev_err(card->dev,
  3943. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3944. __func__, PTR_ERR(en2_pinctrl_active));
  3945. ret = false;
  3946. goto err_lookup_state;
  3947. }
  3948. en2_pinctrl_sleep = pinctrl_lookup_state(
  3949. pdata->usbc_en2_gpio_p, "aud_sleep");
  3950. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3951. dev_err(card->dev,
  3952. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3953. __func__, PTR_ERR(en2_pinctrl_sleep));
  3954. ret = false;
  3955. goto err_lookup_state;
  3956. }
  3957. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3958. if (active) {
  3959. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3960. if (pdata->usbc_en2_gpio_p) {
  3961. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3962. if (value)
  3963. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3964. en2_pinctrl_sleep);
  3965. else
  3966. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3967. en2_pinctrl_active);
  3968. } else if (pdata->usbc_en2_gpio >= 0) {
  3969. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3970. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3971. }
  3972. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3973. value, !value);
  3974. ret = true;
  3975. } else {
  3976. /* if not active, release usbc_en2_gpio_p pin */
  3977. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3978. en2_pinctrl_sleep);
  3979. }
  3980. err_lookup_state:
  3981. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3982. pdata->usbc_en2_gpio_p = NULL;
  3983. return ret;
  3984. }
  3985. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3986. {
  3987. int value = 0;
  3988. bool ret = false;
  3989. struct snd_soc_card *card;
  3990. struct msm_asoc_mach_data *pdata;
  3991. if (!codec) {
  3992. pr_err("%s codec is NULL\n", __func__);
  3993. return false;
  3994. }
  3995. card = codec->component.card;
  3996. pdata = snd_soc_card_get_drvdata(card);
  3997. if (!pdata)
  3998. return false;
  3999. if (wcd_mbhc_cfg.enable_usbc_analog)
  4000. return msm_usbc_swap_gnd_mic(codec, active);
  4001. /* if usbc is not defined, swap using us_euro_gpio_p */
  4002. if (pdata->us_euro_gpio_p) {
  4003. value = msm_cdc_pinctrl_get_state(
  4004. pdata->us_euro_gpio_p);
  4005. if (value)
  4006. msm_cdc_pinctrl_select_sleep_state(
  4007. pdata->us_euro_gpio_p);
  4008. else
  4009. msm_cdc_pinctrl_select_active_state(
  4010. pdata->us_euro_gpio_p);
  4011. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4012. __func__, value, !value);
  4013. ret = true;
  4014. }
  4015. return ret;
  4016. }
  4017. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4018. {
  4019. int ret = 0;
  4020. void *config_data = NULL;
  4021. if (!msm_codec_fn.get_afe_config_fn) {
  4022. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4023. __func__);
  4024. return -EINVAL;
  4025. }
  4026. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4027. AFE_CDC_REGISTERS_CONFIG);
  4028. if (config_data) {
  4029. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4030. if (ret) {
  4031. dev_err(codec->dev,
  4032. "%s: Failed to set codec registers config %d\n",
  4033. __func__, ret);
  4034. return ret;
  4035. }
  4036. }
  4037. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4038. AFE_CDC_REGISTER_PAGE_CONFIG);
  4039. if (config_data) {
  4040. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4041. 0);
  4042. if (ret)
  4043. dev_err(codec->dev,
  4044. "%s: Failed to set cdc register page config\n",
  4045. __func__);
  4046. }
  4047. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4048. AFE_SLIMBUS_SLAVE_CONFIG);
  4049. if (config_data) {
  4050. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4051. if (ret) {
  4052. dev_err(codec->dev,
  4053. "%s: Failed to set slimbus slave config %d\n",
  4054. __func__, ret);
  4055. return ret;
  4056. }
  4057. }
  4058. return 0;
  4059. }
  4060. static void msm_afe_clear_config(void)
  4061. {
  4062. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4063. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4064. }
  4065. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4066. {
  4067. int ret = 0;
  4068. void *config_data;
  4069. struct snd_soc_codec *codec = rtd->codec;
  4070. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4071. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4072. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4073. struct snd_soc_component *aux_comp;
  4074. struct snd_card *card;
  4075. struct snd_info_entry *entry;
  4076. struct msm_asoc_mach_data *pdata =
  4077. snd_soc_card_get_drvdata(rtd->card);
  4078. /*
  4079. * Codec SLIMBUS configuration
  4080. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4081. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4082. * TX14, TX15, TX16
  4083. */
  4084. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4085. 150, 151};
  4086. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4087. 134, 135, 136, 137, 138, 139,
  4088. 140, 141, 142, 143};
  4089. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4090. rtd->pmdown_time = 0;
  4091. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4092. ARRAY_SIZE(msm_tavil_snd_controls));
  4093. if (ret < 0) {
  4094. pr_err("%s: add_codec_controls failed, err %d\n",
  4095. __func__, ret);
  4096. return ret;
  4097. }
  4098. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4099. ARRAY_SIZE(msm_common_snd_controls));
  4100. if (ret < 0) {
  4101. pr_err("%s: add_codec_controls failed, err %d\n",
  4102. __func__, ret);
  4103. return ret;
  4104. }
  4105. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4106. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4107. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4108. ARRAY_SIZE(wcd_audio_paths_tavil));
  4109. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4110. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4111. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4112. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4113. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4114. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4115. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4116. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4117. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4118. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4119. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4120. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4121. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4122. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4123. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4124. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4125. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4126. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4127. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4128. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4129. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4130. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4131. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4132. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4133. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4134. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4135. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4136. snd_soc_dapm_sync(dapm);
  4137. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4138. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4139. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4140. ret = msm_afe_set_config(codec);
  4141. if (ret) {
  4142. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4143. goto err;
  4144. }
  4145. pdata->is_afe_config_done = true;
  4146. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4147. AFE_AANC_VERSION);
  4148. if (config_data) {
  4149. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4150. if (ret) {
  4151. pr_err("%s: Failed to set aanc version %d\n",
  4152. __func__, ret);
  4153. goto err;
  4154. }
  4155. }
  4156. /*
  4157. * Send speaker configuration only for WSA8810.
  4158. * Default configuration is for WSA8815.
  4159. */
  4160. pr_debug("%s: Number of aux devices: %d\n",
  4161. __func__, rtd->card->num_aux_devs);
  4162. if (rtd->card->num_aux_devs &&
  4163. !list_empty(&rtd->card->aux_comp_list)) {
  4164. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4165. struct snd_soc_component, card_aux_list);
  4166. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4167. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4168. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4169. tavil_set_spkr_gain_offset(rtd->codec,
  4170. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4171. }
  4172. }
  4173. card = rtd->card->snd_card;
  4174. entry = snd_info_create_subdir(card->module, "codecs",
  4175. card->proc_root);
  4176. if (!entry) {
  4177. pr_debug("%s: Cannot create codecs module entry\n",
  4178. __func__);
  4179. ret = 0;
  4180. goto err;
  4181. }
  4182. pdata->codec_root = entry;
  4183. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4184. codec_reg_done = true;
  4185. return 0;
  4186. err:
  4187. return ret;
  4188. }
  4189. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4190. {
  4191. int ret = 0;
  4192. struct snd_soc_codec *codec = rtd->codec;
  4193. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4194. struct snd_card *card;
  4195. struct snd_info_entry *entry;
  4196. struct snd_soc_component *aux_comp;
  4197. struct msm_asoc_mach_data *pdata =
  4198. snd_soc_card_get_drvdata(rtd->card);
  4199. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4200. ARRAY_SIZE(msm_int_snd_controls));
  4201. if (ret < 0) {
  4202. pr_err("%s: add_codec_controls failed: %d\n",
  4203. __func__, ret);
  4204. return ret;
  4205. }
  4206. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4207. ARRAY_SIZE(msm_common_snd_controls));
  4208. if (ret < 0) {
  4209. pr_err("%s: add common snd controls failed: %d\n",
  4210. __func__, ret);
  4211. return ret;
  4212. }
  4213. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4214. ARRAY_SIZE(msm_int_dapm_widgets));
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4220. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4221. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4222. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4223. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4224. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4225. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4226. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4227. snd_soc_dapm_sync(dapm);
  4228. /*
  4229. * Send speaker configuration only for WSA8810.
  4230. * Default configuration is for WSA8815.
  4231. */
  4232. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4233. __func__, rtd->card->num_aux_devs);
  4234. if (rtd->card->num_aux_devs &&
  4235. !list_empty(&rtd->card->component_dev_list)) {
  4236. aux_comp = list_first_entry(
  4237. &rtd->card->component_dev_list,
  4238. struct snd_soc_component,
  4239. card_aux_list);
  4240. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4241. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4242. wsa_macro_set_spkr_mode(rtd->codec,
  4243. WSA_MACRO_SPKR_MODE_1);
  4244. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4245. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4246. }
  4247. }
  4248. card = rtd->card->snd_card;
  4249. if (!pdata->codec_root) {
  4250. entry = snd_info_create_subdir(card->module, "codecs",
  4251. card->proc_root);
  4252. if (!entry) {
  4253. pr_debug("%s: Cannot create codecs module entry\n",
  4254. __func__);
  4255. ret = 0;
  4256. goto err;
  4257. }
  4258. pdata->codec_root = entry;
  4259. }
  4260. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4261. codec_reg_done = true;
  4262. return 0;
  4263. err:
  4264. return ret;
  4265. }
  4266. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4267. {
  4268. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4269. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4270. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4271. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4272. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4273. }
  4274. static void *def_wcd_mbhc_cal(void)
  4275. {
  4276. void *wcd_mbhc_cal;
  4277. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4278. u16 *btn_high;
  4279. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4280. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4281. if (!wcd_mbhc_cal)
  4282. return NULL;
  4283. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4284. S(v_hs_max, 1600);
  4285. #undef S
  4286. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4287. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4288. #undef S
  4289. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4290. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4291. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4292. btn_high[0] = 75;
  4293. btn_high[1] = 150;
  4294. btn_high[2] = 237;
  4295. btn_high[3] = 500;
  4296. btn_high[4] = 500;
  4297. btn_high[5] = 500;
  4298. btn_high[6] = 500;
  4299. btn_high[7] = 500;
  4300. return wcd_mbhc_cal;
  4301. }
  4302. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4303. struct snd_pcm_hw_params *params)
  4304. {
  4305. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4306. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4307. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4308. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4309. int ret = 0;
  4310. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4311. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4312. u32 user_set_tx_ch = 0;
  4313. u32 rx_ch_count;
  4314. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4315. ret = snd_soc_dai_get_channel_map(codec_dai,
  4316. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4317. if (ret < 0) {
  4318. pr_err("%s: failed to get codec chan map, err:%d\n",
  4319. __func__, ret);
  4320. goto err;
  4321. }
  4322. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4323. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4324. slim_rx_cfg[5].channels);
  4325. rx_ch_count = slim_rx_cfg[5].channels;
  4326. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4327. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4328. slim_rx_cfg[2].channels);
  4329. rx_ch_count = slim_rx_cfg[2].channels;
  4330. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4331. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4332. slim_rx_cfg[6].channels);
  4333. rx_ch_count = slim_rx_cfg[6].channels;
  4334. } else {
  4335. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4336. slim_rx_cfg[0].channels);
  4337. rx_ch_count = slim_rx_cfg[0].channels;
  4338. }
  4339. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4340. rx_ch_count, rx_ch);
  4341. if (ret < 0) {
  4342. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4343. __func__, ret);
  4344. goto err;
  4345. }
  4346. } else {
  4347. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4348. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4349. ret = snd_soc_dai_get_channel_map(codec_dai,
  4350. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4351. if (ret < 0) {
  4352. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4353. __func__, ret);
  4354. goto err;
  4355. }
  4356. /* For <codec>_tx1 case */
  4357. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4358. user_set_tx_ch = slim_tx_cfg[0].channels;
  4359. /* For <codec>_tx3 case */
  4360. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4361. user_set_tx_ch = slim_tx_cfg[1].channels;
  4362. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4363. user_set_tx_ch = msm_vi_feed_tx_ch;
  4364. else
  4365. user_set_tx_ch = tx_ch_cnt;
  4366. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4367. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4368. tx_ch_cnt, dai_link->id);
  4369. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4370. user_set_tx_ch, tx_ch, 0, 0);
  4371. if (ret < 0)
  4372. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4373. __func__, ret);
  4374. }
  4375. err:
  4376. return ret;
  4377. }
  4378. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4379. struct snd_pcm_hw_params *params)
  4380. {
  4381. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4382. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4383. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4384. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4385. int ret = 0;
  4386. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4387. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4388. u32 user_set_tx_ch = 0;
  4389. u32 user_set_rx_ch = 0;
  4390. u32 ch_id;
  4391. ret = snd_soc_dai_get_channel_map(codec_dai,
  4392. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4393. &rx_ch_cdc_dma);
  4394. if (ret < 0) {
  4395. pr_err("%s: failed to get codec chan map, err:%d\n",
  4396. __func__, ret);
  4397. goto err;
  4398. }
  4399. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4400. switch (dai_link->id) {
  4401. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4402. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4403. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4404. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4405. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4406. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4407. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4408. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4409. {
  4410. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4411. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4412. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4413. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4414. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4415. user_set_rx_ch, &rx_ch_cdc_dma);
  4416. if (ret < 0) {
  4417. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4418. __func__, ret);
  4419. goto err;
  4420. }
  4421. }
  4422. break;
  4423. }
  4424. } else {
  4425. switch (dai_link->id) {
  4426. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4427. {
  4428. user_set_tx_ch = msm_vi_feed_tx_ch;
  4429. }
  4430. break;
  4431. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4432. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4433. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4434. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4435. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4436. {
  4437. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4438. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4439. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4440. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4441. }
  4442. break;
  4443. }
  4444. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4445. &tx_ch_cdc_dma, 0, 0);
  4446. if (ret < 0) {
  4447. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4448. __func__, ret);
  4449. goto err;
  4450. }
  4451. }
  4452. err:
  4453. return ret;
  4454. }
  4455. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4456. struct snd_pcm_hw_params *params)
  4457. {
  4458. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4459. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4460. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4461. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4462. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4463. unsigned int num_tx_ch = 0;
  4464. unsigned int num_rx_ch = 0;
  4465. int ret = 0;
  4466. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4467. num_rx_ch = params_channels(params);
  4468. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4469. codec_dai->name, codec_dai->id, num_rx_ch);
  4470. ret = snd_soc_dai_get_channel_map(codec_dai,
  4471. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4472. if (ret < 0) {
  4473. pr_err("%s: failed to get codec chan map, err:%d\n",
  4474. __func__, ret);
  4475. goto err;
  4476. }
  4477. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4478. num_rx_ch, rx_ch);
  4479. if (ret < 0) {
  4480. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4481. __func__, ret);
  4482. goto err;
  4483. }
  4484. } else {
  4485. num_tx_ch = params_channels(params);
  4486. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4487. codec_dai->name, codec_dai->id, num_tx_ch);
  4488. ret = snd_soc_dai_get_channel_map(codec_dai,
  4489. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4490. if (ret < 0) {
  4491. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4492. __func__, ret);
  4493. goto err;
  4494. }
  4495. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4496. num_tx_ch, tx_ch, 0, 0);
  4497. if (ret < 0) {
  4498. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4499. __func__, ret);
  4500. goto err;
  4501. }
  4502. }
  4503. err:
  4504. return ret;
  4505. }
  4506. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4507. struct snd_pcm_hw_params *params)
  4508. {
  4509. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4510. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4511. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4512. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4513. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4514. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4515. int ret;
  4516. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4517. codec_dai->name, codec_dai->id);
  4518. ret = snd_soc_dai_get_channel_map(codec_dai,
  4519. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4520. if (ret) {
  4521. dev_err(rtd->dev,
  4522. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4523. __func__, ret);
  4524. goto err;
  4525. }
  4526. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4527. __func__, tx_ch_cnt, dai_link->id);
  4528. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4529. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4530. if (ret)
  4531. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4532. __func__, ret);
  4533. err:
  4534. return ret;
  4535. }
  4536. static int msm_get_port_id(int be_id)
  4537. {
  4538. int afe_port_id;
  4539. switch (be_id) {
  4540. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4541. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4542. break;
  4543. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4544. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4545. break;
  4546. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4547. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4548. break;
  4549. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4550. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4551. break;
  4552. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4553. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4554. break;
  4555. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4556. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4557. break;
  4558. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4559. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4560. break;
  4561. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4562. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4563. break;
  4564. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4565. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4566. break;
  4567. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4568. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4569. break;
  4570. default:
  4571. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4572. afe_port_id = -EINVAL;
  4573. }
  4574. return afe_port_id;
  4575. }
  4576. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4577. {
  4578. u32 bit_per_sample;
  4579. switch (bit_format) {
  4580. case SNDRV_PCM_FORMAT_S32_LE:
  4581. case SNDRV_PCM_FORMAT_S24_3LE:
  4582. case SNDRV_PCM_FORMAT_S24_LE:
  4583. bit_per_sample = 32;
  4584. break;
  4585. case SNDRV_PCM_FORMAT_S16_LE:
  4586. default:
  4587. bit_per_sample = 16;
  4588. break;
  4589. }
  4590. return bit_per_sample;
  4591. }
  4592. static void update_mi2s_clk_val(int dai_id, int stream)
  4593. {
  4594. u32 bit_per_sample;
  4595. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4596. bit_per_sample =
  4597. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4598. mi2s_clk[dai_id].clk_freq_in_hz =
  4599. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4600. } else {
  4601. bit_per_sample =
  4602. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4603. mi2s_clk[dai_id].clk_freq_in_hz =
  4604. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4605. }
  4606. }
  4607. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4608. {
  4609. int ret = 0;
  4610. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4611. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4612. int port_id = 0;
  4613. int index = cpu_dai->id;
  4614. port_id = msm_get_port_id(rtd->dai_link->id);
  4615. if (port_id < 0) {
  4616. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4617. ret = port_id;
  4618. goto err;
  4619. }
  4620. if (enable) {
  4621. update_mi2s_clk_val(index, substream->stream);
  4622. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4623. mi2s_clk[index].clk_freq_in_hz);
  4624. }
  4625. mi2s_clk[index].enable = enable;
  4626. ret = afe_set_lpass_clock_v2(port_id,
  4627. &mi2s_clk[index]);
  4628. if (ret < 0) {
  4629. dev_err(rtd->card->dev,
  4630. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4631. __func__, port_id, ret);
  4632. goto err;
  4633. }
  4634. err:
  4635. return ret;
  4636. }
  4637. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4638. enum pinctrl_pin_state new_state)
  4639. {
  4640. int ret = 0;
  4641. int curr_state = 0;
  4642. if (pinctrl_info == NULL) {
  4643. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4644. ret = -EINVAL;
  4645. goto err;
  4646. }
  4647. if (pinctrl_info->pinctrl == NULL) {
  4648. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4649. ret = -EINVAL;
  4650. goto err;
  4651. }
  4652. curr_state = pinctrl_info->curr_state;
  4653. pinctrl_info->curr_state = new_state;
  4654. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4655. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4656. if (curr_state == pinctrl_info->curr_state) {
  4657. pr_debug("%s: Already in same state\n", __func__);
  4658. goto err;
  4659. }
  4660. if (curr_state != STATE_DISABLE &&
  4661. pinctrl_info->curr_state != STATE_DISABLE) {
  4662. pr_debug("%s: state already active cannot switch\n", __func__);
  4663. ret = -EIO;
  4664. goto err;
  4665. }
  4666. switch (pinctrl_info->curr_state) {
  4667. case STATE_MI2S_ACTIVE:
  4668. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4669. pinctrl_info->mi2s_active);
  4670. if (ret) {
  4671. pr_err("%s: MI2S state select failed with %d\n",
  4672. __func__, ret);
  4673. ret = -EIO;
  4674. goto err;
  4675. }
  4676. break;
  4677. case STATE_TDM_ACTIVE:
  4678. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4679. pinctrl_info->tdm_active);
  4680. if (ret) {
  4681. pr_err("%s: TDM state select failed with %d\n",
  4682. __func__, ret);
  4683. ret = -EIO;
  4684. goto err;
  4685. }
  4686. break;
  4687. case STATE_DISABLE:
  4688. if (curr_state == STATE_MI2S_ACTIVE) {
  4689. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4690. pinctrl_info->mi2s_disable);
  4691. } else {
  4692. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4693. pinctrl_info->tdm_disable);
  4694. }
  4695. if (ret) {
  4696. pr_err("%s: state disable failed with %d\n",
  4697. __func__, ret);
  4698. ret = -EIO;
  4699. goto err;
  4700. }
  4701. break;
  4702. default:
  4703. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4704. return -EINVAL;
  4705. }
  4706. err:
  4707. return ret;
  4708. }
  4709. static int msm_get_pinctrl(struct platform_device *pdev)
  4710. {
  4711. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4712. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4713. struct msm_pinctrl_info *pinctrl_info = NULL;
  4714. struct pinctrl *pinctrl;
  4715. int ret = 0;
  4716. pinctrl_info = &pdata->pinctrl_info;
  4717. if (pinctrl_info == NULL) {
  4718. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4719. return -EINVAL;
  4720. }
  4721. pinctrl = devm_pinctrl_get(&pdev->dev);
  4722. if (IS_ERR_OR_NULL(pinctrl)) {
  4723. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4724. return -EINVAL;
  4725. }
  4726. pinctrl_info->pinctrl = pinctrl;
  4727. /* get all the states handles from Device Tree */
  4728. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4729. "quat-mi2s-sleep");
  4730. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4731. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4732. goto err;
  4733. }
  4734. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4735. "quat-mi2s-active");
  4736. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4737. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4738. goto err;
  4739. }
  4740. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4741. "quat-tdm-sleep");
  4742. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4743. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4744. goto err;
  4745. }
  4746. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4747. "quat-tdm-active");
  4748. if (IS_ERR(pinctrl_info->tdm_active)) {
  4749. pr_err("%s: could not get tdm_active pinstate\n",
  4750. __func__);
  4751. goto err;
  4752. }
  4753. /* Reset the TLMM pins to a default state */
  4754. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4755. pinctrl_info->mi2s_disable);
  4756. if (ret != 0) {
  4757. pr_err("%s: Disable TLMM pins failed with %d\n",
  4758. __func__, ret);
  4759. ret = -EIO;
  4760. goto err;
  4761. }
  4762. pinctrl_info->curr_state = STATE_DISABLE;
  4763. return 0;
  4764. err:
  4765. devm_pinctrl_put(pinctrl);
  4766. pinctrl_info->pinctrl = NULL;
  4767. return -EINVAL;
  4768. }
  4769. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4770. struct snd_pcm_hw_params *params)
  4771. {
  4772. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4773. struct snd_interval *rate = hw_param_interval(params,
  4774. SNDRV_PCM_HW_PARAM_RATE);
  4775. struct snd_interval *channels = hw_param_interval(params,
  4776. SNDRV_PCM_HW_PARAM_CHANNELS);
  4777. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4778. channels->min = channels->max =
  4779. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4780. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4781. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4782. rate->min = rate->max =
  4783. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4784. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4785. channels->min = channels->max =
  4786. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4788. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4789. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4790. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4791. channels->min = channels->max =
  4792. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4793. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4794. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4795. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4796. } else {
  4797. pr_err("%s: dai id 0x%x not supported\n",
  4798. __func__, cpu_dai->id);
  4799. return -EINVAL;
  4800. }
  4801. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4802. __func__, cpu_dai->id, channels->max, rate->max,
  4803. params_format(params));
  4804. return 0;
  4805. }
  4806. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4807. struct snd_pcm_hw_params *params)
  4808. {
  4809. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4810. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4811. int ret = 0;
  4812. int slot_width = 32;
  4813. int channels, slots;
  4814. unsigned int slot_mask, rate, clk_freq;
  4815. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4816. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4817. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4818. switch (cpu_dai->id) {
  4819. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4820. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4821. break;
  4822. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4823. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4824. break;
  4825. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4826. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4827. break;
  4828. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4829. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4830. break;
  4831. case AFE_PORT_ID_QUINARY_TDM_RX:
  4832. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4833. break;
  4834. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4835. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4836. break;
  4837. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4838. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4839. break;
  4840. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4841. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4842. break;
  4843. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4844. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4845. break;
  4846. case AFE_PORT_ID_QUINARY_TDM_TX:
  4847. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4848. break;
  4849. default:
  4850. pr_err("%s: dai id 0x%x not supported\n",
  4851. __func__, cpu_dai->id);
  4852. return -EINVAL;
  4853. }
  4854. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4855. /*2 slot config - bits 0 and 1 set for the first two slots */
  4856. slot_mask = 0x0000FFFF >> (16-slots);
  4857. channels = slots;
  4858. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4859. __func__, slot_width, slots);
  4860. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4861. slots, slot_width);
  4862. if (ret < 0) {
  4863. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4864. __func__, ret);
  4865. goto end;
  4866. }
  4867. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4868. 0, NULL, channels, slot_offset);
  4869. if (ret < 0) {
  4870. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4871. __func__, ret);
  4872. goto end;
  4873. }
  4874. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4875. /*2 slot config - bits 0 and 1 set for the first two slots */
  4876. slot_mask = 0x0000FFFF >> (16-slots);
  4877. channels = slots;
  4878. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4879. __func__, slot_width, slots);
  4880. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4881. slots, slot_width);
  4882. if (ret < 0) {
  4883. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4884. __func__, ret);
  4885. goto end;
  4886. }
  4887. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4888. channels, slot_offset, 0, NULL);
  4889. if (ret < 0) {
  4890. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4891. __func__, ret);
  4892. goto end;
  4893. }
  4894. } else {
  4895. ret = -EINVAL;
  4896. pr_err("%s: invalid use case, err:%d\n",
  4897. __func__, ret);
  4898. goto end;
  4899. }
  4900. rate = params_rate(params);
  4901. clk_freq = rate * slot_width * slots;
  4902. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4903. if (ret < 0)
  4904. pr_err("%s: failed to set tdm clk, err:%d\n",
  4905. __func__, ret);
  4906. end:
  4907. return ret;
  4908. }
  4909. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  4910. {
  4911. int ret = 0;
  4912. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4913. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4914. struct snd_soc_card *card = rtd->card;
  4915. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4916. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4917. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4918. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4919. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4920. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  4921. if (ret)
  4922. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4923. __func__, ret);
  4924. }
  4925. return ret;
  4926. }
  4927. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  4928. {
  4929. int ret = 0;
  4930. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4931. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4932. struct snd_soc_card *card = rtd->card;
  4933. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4934. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4935. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4936. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4937. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4938. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  4939. if (ret)
  4940. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4941. __func__, ret);
  4942. }
  4943. }
  4944. static struct snd_soc_ops sm6150_tdm_be_ops = {
  4945. .hw_params = sm6150_tdm_snd_hw_params,
  4946. .startup = sm6150_tdm_snd_startup,
  4947. .shutdown = sm6150_tdm_snd_shutdown
  4948. };
  4949. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  4950. {
  4951. cpumask_t mask;
  4952. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  4953. pm_qos_remove_request(&substream->latency_pm_qos_req);
  4954. cpumask_clear(&mask);
  4955. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  4956. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  4957. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  4958. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  4959. pm_qos_add_request(&substream->latency_pm_qos_req,
  4960. PM_QOS_CPU_DMA_LATENCY,
  4961. MSM_LL_QOS_VALUE);
  4962. return 0;
  4963. }
  4964. static struct snd_soc_ops msm_fe_qos_ops = {
  4965. .prepare = msm_fe_qos_prepare,
  4966. };
  4967. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  4968. {
  4969. int ret = 0;
  4970. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4971. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4972. int index = cpu_dai->id;
  4973. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  4974. struct snd_soc_card *card = rtd->card;
  4975. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4976. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4977. int ret_pinctrl = 0;
  4978. dev_dbg(rtd->card->dev,
  4979. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  4980. __func__, substream->name, substream->stream,
  4981. cpu_dai->name, cpu_dai->id);
  4982. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  4983. ret = -EINVAL;
  4984. dev_err(rtd->card->dev,
  4985. "%s: CPU DAI id (%d) out of range\n",
  4986. __func__, cpu_dai->id);
  4987. goto err;
  4988. }
  4989. /*
  4990. * Mutex protection in case the same MI2S
  4991. * interface using for both TX and RX so
  4992. * that the same clock won't be enable twice.
  4993. */
  4994. mutex_lock(&mi2s_intf_conf[index].lock);
  4995. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  4996. /* Check if msm needs to provide the clock to the interface */
  4997. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  4998. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  4999. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5000. }
  5001. ret = msm_mi2s_set_sclk(substream, true);
  5002. if (ret < 0) {
  5003. dev_err(rtd->card->dev,
  5004. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5005. __func__, ret);
  5006. goto clean_up;
  5007. }
  5008. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5009. if (ret < 0) {
  5010. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5011. __func__, index, ret);
  5012. goto clk_off;
  5013. }
  5014. if (index == QUAT_MI2S) {
  5015. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5016. STATE_MI2S_ACTIVE);
  5017. if (ret_pinctrl)
  5018. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5019. __func__, ret_pinctrl);
  5020. }
  5021. }
  5022. clk_off:
  5023. if (ret < 0)
  5024. msm_mi2s_set_sclk(substream, false);
  5025. clean_up:
  5026. if (ret < 0)
  5027. mi2s_intf_conf[index].ref_cnt--;
  5028. mutex_unlock(&mi2s_intf_conf[index].lock);
  5029. err:
  5030. return ret;
  5031. }
  5032. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5033. {
  5034. int ret;
  5035. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5036. int index = rtd->cpu_dai->id;
  5037. struct snd_soc_card *card = rtd->card;
  5038. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5039. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5040. int ret_pinctrl = 0;
  5041. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5042. substream->name, substream->stream);
  5043. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5044. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5045. return;
  5046. }
  5047. mutex_lock(&mi2s_intf_conf[index].lock);
  5048. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5049. ret = msm_mi2s_set_sclk(substream, false);
  5050. if (ret < 0)
  5051. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5052. __func__, index, ret);
  5053. if (index == QUAT_MI2S) {
  5054. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5055. STATE_DISABLE);
  5056. if (ret_pinctrl)
  5057. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5058. __func__, ret_pinctrl);
  5059. }
  5060. }
  5061. mutex_unlock(&mi2s_intf_conf[index].lock);
  5062. }
  5063. static struct snd_soc_ops msm_mi2s_be_ops = {
  5064. .startup = msm_mi2s_snd_startup,
  5065. .shutdown = msm_mi2s_snd_shutdown,
  5066. };
  5067. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5068. .hw_params = msm_snd_cdc_dma_hw_params,
  5069. };
  5070. static struct snd_soc_ops msm_be_ops = {
  5071. .hw_params = msm_snd_hw_params,
  5072. };
  5073. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5074. .hw_params = msm_slimbus_2_hw_params,
  5075. };
  5076. static struct snd_soc_ops msm_wcn_ops = {
  5077. .hw_params = msm_wcn_hw_params,
  5078. };
  5079. /* Digital audio interface glue - connects codec <---> CPU */
  5080. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5081. /* FrontEnd DAI Links */
  5082. {/* hw:x,0 */
  5083. .name = MSM_DAILINK_NAME(Media1),
  5084. .stream_name = "MultiMedia1",
  5085. .cpu_dai_name = "MultiMedia1",
  5086. .platform_name = "msm-pcm-dsp.0",
  5087. .dynamic = 1,
  5088. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5089. .dpcm_playback = 1,
  5090. .dpcm_capture = 1,
  5091. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5092. SND_SOC_DPCM_TRIGGER_POST},
  5093. .codec_dai_name = "snd-soc-dummy-dai",
  5094. .codec_name = "snd-soc-dummy",
  5095. .ignore_suspend = 1,
  5096. /* this dainlink has playback support */
  5097. .ignore_pmdown_time = 1,
  5098. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5099. },
  5100. {/* hw:x,1 */
  5101. .name = MSM_DAILINK_NAME(Media2),
  5102. .stream_name = "MultiMedia2",
  5103. .cpu_dai_name = "MultiMedia2",
  5104. .platform_name = "msm-pcm-dsp.0",
  5105. .dynamic = 1,
  5106. .dpcm_playback = 1,
  5107. .dpcm_capture = 1,
  5108. .codec_dai_name = "snd-soc-dummy-dai",
  5109. .codec_name = "snd-soc-dummy",
  5110. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5111. SND_SOC_DPCM_TRIGGER_POST},
  5112. .ignore_suspend = 1,
  5113. /* this dainlink has playback support */
  5114. .ignore_pmdown_time = 1,
  5115. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5116. },
  5117. {/* hw:x,2 */
  5118. .name = "VoiceMMode1",
  5119. .stream_name = "VoiceMMode1",
  5120. .cpu_dai_name = "VoiceMMode1",
  5121. .platform_name = "msm-pcm-voice",
  5122. .dynamic = 1,
  5123. .dpcm_playback = 1,
  5124. .dpcm_capture = 1,
  5125. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5126. SND_SOC_DPCM_TRIGGER_POST},
  5127. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5128. .ignore_suspend = 1,
  5129. .ignore_pmdown_time = 1,
  5130. .codec_dai_name = "snd-soc-dummy-dai",
  5131. .codec_name = "snd-soc-dummy",
  5132. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5133. },
  5134. {/* hw:x,3 */
  5135. .name = "MSM VoIP",
  5136. .stream_name = "VoIP",
  5137. .cpu_dai_name = "VoIP",
  5138. .platform_name = "msm-voip-dsp",
  5139. .dynamic = 1,
  5140. .dpcm_playback = 1,
  5141. .dpcm_capture = 1,
  5142. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5143. SND_SOC_DPCM_TRIGGER_POST},
  5144. .codec_dai_name = "snd-soc-dummy-dai",
  5145. .codec_name = "snd-soc-dummy",
  5146. .ignore_suspend = 1,
  5147. /* this dainlink has playback support */
  5148. .ignore_pmdown_time = 1,
  5149. .id = MSM_FRONTEND_DAI_VOIP,
  5150. },
  5151. {/* hw:x,4 */
  5152. .name = MSM_DAILINK_NAME(ULL),
  5153. .stream_name = "MultiMedia3",
  5154. .cpu_dai_name = "MultiMedia3",
  5155. .platform_name = "msm-pcm-dsp.2",
  5156. .dynamic = 1,
  5157. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5158. .dpcm_playback = 1,
  5159. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5160. SND_SOC_DPCM_TRIGGER_POST},
  5161. .codec_dai_name = "snd-soc-dummy-dai",
  5162. .codec_name = "snd-soc-dummy",
  5163. .ignore_suspend = 1,
  5164. /* this dainlink has playback support */
  5165. .ignore_pmdown_time = 1,
  5166. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5167. },
  5168. /* Hostless PCM purpose */
  5169. {/* hw:x,5 */
  5170. .name = "SLIMBUS_0 Hostless",
  5171. .stream_name = "SLIMBUS_0 Hostless",
  5172. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5173. .platform_name = "msm-pcm-hostless",
  5174. .dynamic = 1,
  5175. .dpcm_playback = 1,
  5176. .dpcm_capture = 1,
  5177. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5178. SND_SOC_DPCM_TRIGGER_POST},
  5179. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5180. .ignore_suspend = 1,
  5181. /* this dailink has playback support */
  5182. .ignore_pmdown_time = 1,
  5183. .codec_dai_name = "snd-soc-dummy-dai",
  5184. .codec_name = "snd-soc-dummy",
  5185. },
  5186. {/* hw:x,6 */
  5187. .name = "MSM AFE-PCM RX",
  5188. .stream_name = "AFE-PROXY RX",
  5189. .cpu_dai_name = "msm-dai-q6-dev.241",
  5190. .codec_name = "msm-stub-codec.1",
  5191. .codec_dai_name = "msm-stub-rx",
  5192. .platform_name = "msm-pcm-afe",
  5193. .dpcm_playback = 1,
  5194. .ignore_suspend = 1,
  5195. /* this dainlink has playback support */
  5196. .ignore_pmdown_time = 1,
  5197. },
  5198. {/* hw:x,7 */
  5199. .name = "MSM AFE-PCM TX",
  5200. .stream_name = "AFE-PROXY TX",
  5201. .cpu_dai_name = "msm-dai-q6-dev.240",
  5202. .codec_name = "msm-stub-codec.1",
  5203. .codec_dai_name = "msm-stub-tx",
  5204. .platform_name = "msm-pcm-afe",
  5205. .dpcm_capture = 1,
  5206. .ignore_suspend = 1,
  5207. },
  5208. {/* hw:x,8 */
  5209. .name = MSM_DAILINK_NAME(Compress1),
  5210. .stream_name = "Compress1",
  5211. .cpu_dai_name = "MultiMedia4",
  5212. .platform_name = "msm-compress-dsp",
  5213. .dynamic = 1,
  5214. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5215. .dpcm_playback = 1,
  5216. .dpcm_capture = 1,
  5217. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5218. SND_SOC_DPCM_TRIGGER_POST},
  5219. .codec_dai_name = "snd-soc-dummy-dai",
  5220. .codec_name = "snd-soc-dummy",
  5221. .ignore_suspend = 1,
  5222. .ignore_pmdown_time = 1,
  5223. /* this dainlink has playback support */
  5224. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5225. },
  5226. {/* hw:x,9 */
  5227. .name = "AUXPCM Hostless",
  5228. .stream_name = "AUXPCM Hostless",
  5229. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5230. .platform_name = "msm-pcm-hostless",
  5231. .dynamic = 1,
  5232. .dpcm_playback = 1,
  5233. .dpcm_capture = 1,
  5234. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5235. SND_SOC_DPCM_TRIGGER_POST},
  5236. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5237. .ignore_suspend = 1,
  5238. /* this dainlink has playback support */
  5239. .ignore_pmdown_time = 1,
  5240. .codec_dai_name = "snd-soc-dummy-dai",
  5241. .codec_name = "snd-soc-dummy",
  5242. },
  5243. {/* hw:x,10 */
  5244. .name = "SLIMBUS_1 Hostless",
  5245. .stream_name = "SLIMBUS_1 Hostless",
  5246. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5247. .platform_name = "msm-pcm-hostless",
  5248. .dynamic = 1,
  5249. .dpcm_playback = 1,
  5250. .dpcm_capture = 1,
  5251. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5252. SND_SOC_DPCM_TRIGGER_POST},
  5253. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5254. .ignore_suspend = 1,
  5255. /* this dailink has playback support */
  5256. .ignore_pmdown_time = 1,
  5257. .codec_dai_name = "snd-soc-dummy-dai",
  5258. .codec_name = "snd-soc-dummy",
  5259. },
  5260. {/* hw:x,11 */
  5261. .name = "SLIMBUS_3 Hostless",
  5262. .stream_name = "SLIMBUS_3 Hostless",
  5263. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5264. .platform_name = "msm-pcm-hostless",
  5265. .dynamic = 1,
  5266. .dpcm_playback = 1,
  5267. .dpcm_capture = 1,
  5268. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5269. SND_SOC_DPCM_TRIGGER_POST},
  5270. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5271. .ignore_suspend = 1,
  5272. /* this dailink has playback support */
  5273. .ignore_pmdown_time = 1,
  5274. .codec_dai_name = "snd-soc-dummy-dai",
  5275. .codec_name = "snd-soc-dummy",
  5276. },
  5277. {/* hw:x,12 */
  5278. .name = "SLIMBUS_7 Hostless",
  5279. .stream_name = "SLIMBUS_7 Hostless",
  5280. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5281. .platform_name = "msm-pcm-hostless",
  5282. .dynamic = 1,
  5283. .dpcm_playback = 1,
  5284. .dpcm_capture = 1,
  5285. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5286. SND_SOC_DPCM_TRIGGER_POST},
  5287. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5288. .ignore_suspend = 1,
  5289. /* this dailink has playback support */
  5290. .ignore_pmdown_time = 1,
  5291. .codec_dai_name = "snd-soc-dummy-dai",
  5292. .codec_name = "snd-soc-dummy",
  5293. },
  5294. {/* hw:x,13 */
  5295. .name = MSM_DAILINK_NAME(LowLatency),
  5296. .stream_name = "MultiMedia5",
  5297. .cpu_dai_name = "MultiMedia5",
  5298. .platform_name = "msm-pcm-dsp.1",
  5299. .dynamic = 1,
  5300. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5301. .dpcm_playback = 1,
  5302. .dpcm_capture = 1,
  5303. .codec_dai_name = "snd-soc-dummy-dai",
  5304. .codec_name = "snd-soc-dummy",
  5305. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5306. SND_SOC_DPCM_TRIGGER_POST},
  5307. .ignore_suspend = 1,
  5308. /* this dainlink has playback support */
  5309. .ignore_pmdown_time = 1,
  5310. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5311. .ops = &msm_fe_qos_ops,
  5312. },
  5313. {/* hw:x,14 */
  5314. .name = "Listen 1 Audio Service",
  5315. .stream_name = "Listen 1 Audio Service",
  5316. .cpu_dai_name = "LSM1",
  5317. .platform_name = "msm-lsm-client",
  5318. .dynamic = 1,
  5319. .dpcm_capture = 1,
  5320. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5321. SND_SOC_DPCM_TRIGGER_POST },
  5322. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5323. .ignore_suspend = 1,
  5324. .codec_dai_name = "snd-soc-dummy-dai",
  5325. .codec_name = "snd-soc-dummy",
  5326. .id = MSM_FRONTEND_DAI_LSM1,
  5327. },
  5328. /* Multiple Tunnel instances */
  5329. {/* hw:x,15 */
  5330. .name = MSM_DAILINK_NAME(Compress2),
  5331. .stream_name = "Compress2",
  5332. .cpu_dai_name = "MultiMedia7",
  5333. .platform_name = "msm-compress-dsp",
  5334. .dynamic = 1,
  5335. .dpcm_playback = 1,
  5336. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5337. SND_SOC_DPCM_TRIGGER_POST},
  5338. .codec_dai_name = "snd-soc-dummy-dai",
  5339. .codec_name = "snd-soc-dummy",
  5340. .ignore_suspend = 1,
  5341. .ignore_pmdown_time = 1,
  5342. /* this dainlink has playback support */
  5343. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5344. },
  5345. {/* hw:x,16 */
  5346. .name = MSM_DAILINK_NAME(MultiMedia10),
  5347. .stream_name = "MultiMedia10",
  5348. .cpu_dai_name = "MultiMedia10",
  5349. .platform_name = "msm-pcm-dsp.1",
  5350. .dynamic = 1,
  5351. .dpcm_playback = 1,
  5352. .dpcm_capture = 1,
  5353. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5354. SND_SOC_DPCM_TRIGGER_POST},
  5355. .codec_dai_name = "snd-soc-dummy-dai",
  5356. .codec_name = "snd-soc-dummy",
  5357. .ignore_suspend = 1,
  5358. .ignore_pmdown_time = 1,
  5359. /* this dainlink has playback support */
  5360. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5361. },
  5362. {/* hw:x,17 */
  5363. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5364. .stream_name = "MM_NOIRQ",
  5365. .cpu_dai_name = "MultiMedia8",
  5366. .platform_name = "msm-pcm-dsp-noirq",
  5367. .dynamic = 1,
  5368. .dpcm_playback = 1,
  5369. .dpcm_capture = 1,
  5370. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5371. SND_SOC_DPCM_TRIGGER_POST},
  5372. .codec_dai_name = "snd-soc-dummy-dai",
  5373. .codec_name = "snd-soc-dummy",
  5374. .ignore_suspend = 1,
  5375. .ignore_pmdown_time = 1,
  5376. /* this dainlink has playback support */
  5377. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5378. .ops = &msm_fe_qos_ops,
  5379. },
  5380. /* HDMI Hostless */
  5381. {/* hw:x,18 */
  5382. .name = "HDMI_RX_HOSTLESS",
  5383. .stream_name = "HDMI_RX_HOSTLESS",
  5384. .cpu_dai_name = "HDMI_HOSTLESS",
  5385. .platform_name = "msm-pcm-hostless",
  5386. .dynamic = 1,
  5387. .dpcm_playback = 1,
  5388. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5389. SND_SOC_DPCM_TRIGGER_POST},
  5390. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5391. .ignore_suspend = 1,
  5392. .ignore_pmdown_time = 1,
  5393. .codec_dai_name = "snd-soc-dummy-dai",
  5394. .codec_name = "snd-soc-dummy",
  5395. },
  5396. {/* hw:x,19 */
  5397. .name = "VoiceMMode2",
  5398. .stream_name = "VoiceMMode2",
  5399. .cpu_dai_name = "VoiceMMode2",
  5400. .platform_name = "msm-pcm-voice",
  5401. .dynamic = 1,
  5402. .dpcm_playback = 1,
  5403. .dpcm_capture = 1,
  5404. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5405. SND_SOC_DPCM_TRIGGER_POST},
  5406. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5407. .ignore_suspend = 1,
  5408. .ignore_pmdown_time = 1,
  5409. .codec_dai_name = "snd-soc-dummy-dai",
  5410. .codec_name = "snd-soc-dummy",
  5411. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5412. },
  5413. /* LSM FE */
  5414. {/* hw:x,20 */
  5415. .name = "Listen 2 Audio Service",
  5416. .stream_name = "Listen 2 Audio Service",
  5417. .cpu_dai_name = "LSM2",
  5418. .platform_name = "msm-lsm-client",
  5419. .dynamic = 1,
  5420. .dpcm_capture = 1,
  5421. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5422. SND_SOC_DPCM_TRIGGER_POST },
  5423. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5424. .ignore_suspend = 1,
  5425. .codec_dai_name = "snd-soc-dummy-dai",
  5426. .codec_name = "snd-soc-dummy",
  5427. .id = MSM_FRONTEND_DAI_LSM2,
  5428. },
  5429. {/* hw:x,21 */
  5430. .name = "Listen 3 Audio Service",
  5431. .stream_name = "Listen 3 Audio Service",
  5432. .cpu_dai_name = "LSM3",
  5433. .platform_name = "msm-lsm-client",
  5434. .dynamic = 1,
  5435. .dpcm_capture = 1,
  5436. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5437. SND_SOC_DPCM_TRIGGER_POST },
  5438. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5439. .ignore_suspend = 1,
  5440. .codec_dai_name = "snd-soc-dummy-dai",
  5441. .codec_name = "snd-soc-dummy",
  5442. .id = MSM_FRONTEND_DAI_LSM3,
  5443. },
  5444. {/* hw:x,22 */
  5445. .name = "Listen 4 Audio Service",
  5446. .stream_name = "Listen 4 Audio Service",
  5447. .cpu_dai_name = "LSM4",
  5448. .platform_name = "msm-lsm-client",
  5449. .dynamic = 1,
  5450. .dpcm_capture = 1,
  5451. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5452. SND_SOC_DPCM_TRIGGER_POST },
  5453. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5454. .ignore_suspend = 1,
  5455. .codec_dai_name = "snd-soc-dummy-dai",
  5456. .codec_name = "snd-soc-dummy",
  5457. .id = MSM_FRONTEND_DAI_LSM4,
  5458. },
  5459. {/* hw:x,23 */
  5460. .name = "Listen 5 Audio Service",
  5461. .stream_name = "Listen 5 Audio Service",
  5462. .cpu_dai_name = "LSM5",
  5463. .platform_name = "msm-lsm-client",
  5464. .dynamic = 1,
  5465. .dpcm_capture = 1,
  5466. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5467. SND_SOC_DPCM_TRIGGER_POST },
  5468. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5469. .ignore_suspend = 1,
  5470. .codec_dai_name = "snd-soc-dummy-dai",
  5471. .codec_name = "snd-soc-dummy",
  5472. .id = MSM_FRONTEND_DAI_LSM5,
  5473. },
  5474. {/* hw:x,24 */
  5475. .name = "Listen 6 Audio Service",
  5476. .stream_name = "Listen 6 Audio Service",
  5477. .cpu_dai_name = "LSM6",
  5478. .platform_name = "msm-lsm-client",
  5479. .dynamic = 1,
  5480. .dpcm_capture = 1,
  5481. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5482. SND_SOC_DPCM_TRIGGER_POST },
  5483. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5484. .ignore_suspend = 1,
  5485. .codec_dai_name = "snd-soc-dummy-dai",
  5486. .codec_name = "snd-soc-dummy",
  5487. .id = MSM_FRONTEND_DAI_LSM6,
  5488. },
  5489. {/* hw:x,25 */
  5490. .name = "Listen 7 Audio Service",
  5491. .stream_name = "Listen 7 Audio Service",
  5492. .cpu_dai_name = "LSM7",
  5493. .platform_name = "msm-lsm-client",
  5494. .dynamic = 1,
  5495. .dpcm_capture = 1,
  5496. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5497. SND_SOC_DPCM_TRIGGER_POST },
  5498. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5499. .ignore_suspend = 1,
  5500. .codec_dai_name = "snd-soc-dummy-dai",
  5501. .codec_name = "snd-soc-dummy",
  5502. .id = MSM_FRONTEND_DAI_LSM7,
  5503. },
  5504. {/* hw:x,26 */
  5505. .name = "Listen 8 Audio Service",
  5506. .stream_name = "Listen 8 Audio Service",
  5507. .cpu_dai_name = "LSM8",
  5508. .platform_name = "msm-lsm-client",
  5509. .dynamic = 1,
  5510. .dpcm_capture = 1,
  5511. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5512. SND_SOC_DPCM_TRIGGER_POST },
  5513. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5514. .ignore_suspend = 1,
  5515. .codec_dai_name = "snd-soc-dummy-dai",
  5516. .codec_name = "snd-soc-dummy",
  5517. .id = MSM_FRONTEND_DAI_LSM8,
  5518. },
  5519. {/* hw:x,27 */
  5520. .name = MSM_DAILINK_NAME(Media9),
  5521. .stream_name = "MultiMedia9",
  5522. .cpu_dai_name = "MultiMedia9",
  5523. .platform_name = "msm-pcm-dsp.0",
  5524. .dynamic = 1,
  5525. .dpcm_playback = 1,
  5526. .dpcm_capture = 1,
  5527. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5528. SND_SOC_DPCM_TRIGGER_POST},
  5529. .codec_dai_name = "snd-soc-dummy-dai",
  5530. .codec_name = "snd-soc-dummy",
  5531. .ignore_suspend = 1,
  5532. /* this dainlink has playback support */
  5533. .ignore_pmdown_time = 1,
  5534. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5535. },
  5536. {/* hw:x,28 */
  5537. .name = MSM_DAILINK_NAME(Compress4),
  5538. .stream_name = "Compress4",
  5539. .cpu_dai_name = "MultiMedia11",
  5540. .platform_name = "msm-compress-dsp",
  5541. .dynamic = 1,
  5542. .dpcm_playback = 1,
  5543. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5544. SND_SOC_DPCM_TRIGGER_POST},
  5545. .codec_dai_name = "snd-soc-dummy-dai",
  5546. .codec_name = "snd-soc-dummy",
  5547. .ignore_suspend = 1,
  5548. .ignore_pmdown_time = 1,
  5549. /* this dainlink has playback support */
  5550. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5551. },
  5552. {/* hw:x,29 */
  5553. .name = MSM_DAILINK_NAME(Compress5),
  5554. .stream_name = "Compress5",
  5555. .cpu_dai_name = "MultiMedia12",
  5556. .platform_name = "msm-compress-dsp",
  5557. .dynamic = 1,
  5558. .dpcm_playback = 1,
  5559. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5560. SND_SOC_DPCM_TRIGGER_POST},
  5561. .codec_dai_name = "snd-soc-dummy-dai",
  5562. .codec_name = "snd-soc-dummy",
  5563. .ignore_suspend = 1,
  5564. .ignore_pmdown_time = 1,
  5565. /* this dainlink has playback support */
  5566. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5567. },
  5568. {/* hw:x,30 */
  5569. .name = MSM_DAILINK_NAME(Compress6),
  5570. .stream_name = "Compress6",
  5571. .cpu_dai_name = "MultiMedia13",
  5572. .platform_name = "msm-compress-dsp",
  5573. .dynamic = 1,
  5574. .dpcm_playback = 1,
  5575. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5576. SND_SOC_DPCM_TRIGGER_POST},
  5577. .codec_dai_name = "snd-soc-dummy-dai",
  5578. .codec_name = "snd-soc-dummy",
  5579. .ignore_suspend = 1,
  5580. .ignore_pmdown_time = 1,
  5581. /* this dainlink has playback support */
  5582. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5583. },
  5584. {/* hw:x,31 */
  5585. .name = MSM_DAILINK_NAME(Compress7),
  5586. .stream_name = "Compress7",
  5587. .cpu_dai_name = "MultiMedia14",
  5588. .platform_name = "msm-compress-dsp",
  5589. .dynamic = 1,
  5590. .dpcm_playback = 1,
  5591. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5592. SND_SOC_DPCM_TRIGGER_POST},
  5593. .codec_dai_name = "snd-soc-dummy-dai",
  5594. .codec_name = "snd-soc-dummy",
  5595. .ignore_suspend = 1,
  5596. .ignore_pmdown_time = 1,
  5597. /* this dainlink has playback support */
  5598. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5599. },
  5600. {/* hw:x,32 */
  5601. .name = MSM_DAILINK_NAME(Compress8),
  5602. .stream_name = "Compress8",
  5603. .cpu_dai_name = "MultiMedia15",
  5604. .platform_name = "msm-compress-dsp",
  5605. .dynamic = 1,
  5606. .dpcm_playback = 1,
  5607. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5608. SND_SOC_DPCM_TRIGGER_POST},
  5609. .codec_dai_name = "snd-soc-dummy-dai",
  5610. .codec_name = "snd-soc-dummy",
  5611. .ignore_suspend = 1,
  5612. .ignore_pmdown_time = 1,
  5613. /* this dainlink has playback support */
  5614. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5615. },
  5616. {/* hw:x,33 */
  5617. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5618. .stream_name = "MM_NOIRQ_2",
  5619. .cpu_dai_name = "MultiMedia16",
  5620. .platform_name = "msm-pcm-dsp-noirq",
  5621. .dynamic = 1,
  5622. .dpcm_playback = 1,
  5623. .dpcm_capture = 1,
  5624. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5625. SND_SOC_DPCM_TRIGGER_POST},
  5626. .codec_dai_name = "snd-soc-dummy-dai",
  5627. .codec_name = "snd-soc-dummy",
  5628. .ignore_suspend = 1,
  5629. .ignore_pmdown_time = 1,
  5630. /* this dainlink has playback support */
  5631. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5632. },
  5633. {/* hw:x,34 */
  5634. .name = "SLIMBUS_8 Hostless",
  5635. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5636. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5637. .platform_name = "msm-pcm-hostless",
  5638. .dynamic = 1,
  5639. .dpcm_capture = 1,
  5640. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5641. SND_SOC_DPCM_TRIGGER_POST},
  5642. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5643. .ignore_suspend = 1,
  5644. .codec_dai_name = "snd-soc-dummy-dai",
  5645. .codec_name = "snd-soc-dummy",
  5646. },
  5647. {/* hw:x,35 */
  5648. .name = "CDC_DMA Hostless",
  5649. .stream_name = "CDC_DMA Hostless",
  5650. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5651. .platform_name = "msm-pcm-hostless",
  5652. .dynamic = 1,
  5653. .dpcm_playback = 1,
  5654. .dpcm_capture = 1,
  5655. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5656. SND_SOC_DPCM_TRIGGER_POST},
  5657. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5658. .ignore_suspend = 1,
  5659. /* this dailink has playback support */
  5660. .ignore_pmdown_time = 1,
  5661. .codec_dai_name = "snd-soc-dummy-dai",
  5662. .codec_name = "snd-soc-dummy",
  5663. },
  5664. {/* hw:x,36 */
  5665. .name = "TX3_CDC_DMA Hostless",
  5666. .stream_name = "TX3_CDC_DMA Hostless",
  5667. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5668. .platform_name = "msm-pcm-hostless",
  5669. .dynamic = 1,
  5670. .dpcm_capture = 1,
  5671. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5672. SND_SOC_DPCM_TRIGGER_POST},
  5673. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5674. .ignore_suspend = 1,
  5675. .codec_dai_name = "snd-soc-dummy-dai",
  5676. .codec_name = "snd-soc-dummy",
  5677. },
  5678. };
  5679. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5680. {/* hw:x,37 */
  5681. .name = LPASS_BE_SLIMBUS_4_TX,
  5682. .stream_name = "Slimbus4 Capture",
  5683. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5684. .platform_name = "msm-pcm-hostless",
  5685. .codec_name = "tavil_codec",
  5686. .codec_dai_name = "tavil_vifeedback",
  5687. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5688. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5689. .ops = &msm_be_ops,
  5690. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5691. .ignore_suspend = 1,
  5692. },
  5693. /* Ultrasound RX DAI Link */
  5694. {/* hw:x,38 */
  5695. .name = "SLIMBUS_2 Hostless Playback",
  5696. .stream_name = "SLIMBUS_2 Hostless Playback",
  5697. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5698. .platform_name = "msm-pcm-hostless",
  5699. .codec_name = "tavil_codec",
  5700. .codec_dai_name = "tavil_rx2",
  5701. .ignore_suspend = 1,
  5702. .ignore_pmdown_time = 1,
  5703. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5704. .ops = &msm_slimbus_2_be_ops,
  5705. },
  5706. /* Ultrasound TX DAI Link */
  5707. {/* hw:x,39 */
  5708. .name = "SLIMBUS_2 Hostless Capture",
  5709. .stream_name = "SLIMBUS_2 Hostless Capture",
  5710. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5711. .platform_name = "msm-pcm-hostless",
  5712. .codec_name = "tavil_codec",
  5713. .codec_dai_name = "tavil_tx2",
  5714. .ignore_suspend = 1,
  5715. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5716. .ops = &msm_slimbus_2_be_ops,
  5717. },
  5718. };
  5719. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5720. {/* hw:x,37 */
  5721. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5722. .stream_name = "WSA CDC DMA0 Capture",
  5723. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5724. .platform_name = "msm-pcm-hostless",
  5725. .codec_name = "bolero_codec",
  5726. .codec_dai_name = "wsa_macro_vifeedback",
  5727. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5728. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5729. .ignore_suspend = 1,
  5730. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5731. .ops = &msm_cdc_dma_be_ops,
  5732. },
  5733. };
  5734. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5735. {
  5736. .name = MSM_DAILINK_NAME(ASM Loopback),
  5737. .stream_name = "MultiMedia6",
  5738. .cpu_dai_name = "MultiMedia6",
  5739. .platform_name = "msm-pcm-loopback",
  5740. .dynamic = 1,
  5741. .dpcm_playback = 1,
  5742. .dpcm_capture = 1,
  5743. .codec_dai_name = "snd-soc-dummy-dai",
  5744. .codec_name = "snd-soc-dummy",
  5745. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5746. SND_SOC_DPCM_TRIGGER_POST},
  5747. .ignore_suspend = 1,
  5748. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5749. .ignore_pmdown_time = 1,
  5750. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5751. },
  5752. {
  5753. .name = "USB Audio Hostless",
  5754. .stream_name = "USB Audio Hostless",
  5755. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5756. .platform_name = "msm-pcm-hostless",
  5757. .dynamic = 1,
  5758. .dpcm_playback = 1,
  5759. .dpcm_capture = 1,
  5760. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5761. SND_SOC_DPCM_TRIGGER_POST},
  5762. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5763. .ignore_suspend = 1,
  5764. .ignore_pmdown_time = 1,
  5765. .codec_dai_name = "snd-soc-dummy-dai",
  5766. .codec_name = "snd-soc-dummy",
  5767. },
  5768. };
  5769. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5770. /* Backend AFE DAI Links */
  5771. {
  5772. .name = LPASS_BE_AFE_PCM_RX,
  5773. .stream_name = "AFE Playback",
  5774. .cpu_dai_name = "msm-dai-q6-dev.224",
  5775. .platform_name = "msm-pcm-routing",
  5776. .codec_name = "msm-stub-codec.1",
  5777. .codec_dai_name = "msm-stub-rx",
  5778. .no_pcm = 1,
  5779. .dpcm_playback = 1,
  5780. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5781. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5782. /* this dainlink has playback support */
  5783. .ignore_pmdown_time = 1,
  5784. .ignore_suspend = 1,
  5785. },
  5786. {
  5787. .name = LPASS_BE_AFE_PCM_TX,
  5788. .stream_name = "AFE Capture",
  5789. .cpu_dai_name = "msm-dai-q6-dev.225",
  5790. .platform_name = "msm-pcm-routing",
  5791. .codec_name = "msm-stub-codec.1",
  5792. .codec_dai_name = "msm-stub-tx",
  5793. .no_pcm = 1,
  5794. .dpcm_capture = 1,
  5795. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5796. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5797. .ignore_suspend = 1,
  5798. },
  5799. /* Incall Record Uplink BACK END DAI Link */
  5800. {
  5801. .name = LPASS_BE_INCALL_RECORD_TX,
  5802. .stream_name = "Voice Uplink Capture",
  5803. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5804. .platform_name = "msm-pcm-routing",
  5805. .codec_name = "msm-stub-codec.1",
  5806. .codec_dai_name = "msm-stub-tx",
  5807. .no_pcm = 1,
  5808. .dpcm_capture = 1,
  5809. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5810. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5811. .ignore_suspend = 1,
  5812. },
  5813. /* Incall Record Downlink BACK END DAI Link */
  5814. {
  5815. .name = LPASS_BE_INCALL_RECORD_RX,
  5816. .stream_name = "Voice Downlink Capture",
  5817. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5818. .platform_name = "msm-pcm-routing",
  5819. .codec_name = "msm-stub-codec.1",
  5820. .codec_dai_name = "msm-stub-tx",
  5821. .no_pcm = 1,
  5822. .dpcm_capture = 1,
  5823. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5824. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5825. .ignore_suspend = 1,
  5826. },
  5827. /* Incall Music BACK END DAI Link */
  5828. {
  5829. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5830. .stream_name = "Voice Farend Playback",
  5831. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5832. .platform_name = "msm-pcm-routing",
  5833. .codec_name = "msm-stub-codec.1",
  5834. .codec_dai_name = "msm-stub-rx",
  5835. .no_pcm = 1,
  5836. .dpcm_playback = 1,
  5837. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5838. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5839. .ignore_suspend = 1,
  5840. .ignore_pmdown_time = 1,
  5841. },
  5842. /* Incall Music 2 BACK END DAI Link */
  5843. {
  5844. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5845. .stream_name = "Voice2 Farend Playback",
  5846. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5847. .platform_name = "msm-pcm-routing",
  5848. .codec_name = "msm-stub-codec.1",
  5849. .codec_dai_name = "msm-stub-rx",
  5850. .no_pcm = 1,
  5851. .dpcm_playback = 1,
  5852. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5853. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5854. .ignore_suspend = 1,
  5855. .ignore_pmdown_time = 1,
  5856. },
  5857. {
  5858. .name = LPASS_BE_USB_AUDIO_RX,
  5859. .stream_name = "USB Audio Playback",
  5860. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5861. .platform_name = "msm-pcm-routing",
  5862. .codec_name = "msm-stub-codec.1",
  5863. .codec_dai_name = "msm-stub-rx",
  5864. .no_pcm = 1,
  5865. .dpcm_playback = 1,
  5866. .id = MSM_BACKEND_DAI_USB_RX,
  5867. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5868. .ignore_pmdown_time = 1,
  5869. .ignore_suspend = 1,
  5870. },
  5871. {
  5872. .name = LPASS_BE_USB_AUDIO_TX,
  5873. .stream_name = "USB Audio Capture",
  5874. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5875. .platform_name = "msm-pcm-routing",
  5876. .codec_name = "msm-stub-codec.1",
  5877. .codec_dai_name = "msm-stub-tx",
  5878. .no_pcm = 1,
  5879. .dpcm_capture = 1,
  5880. .id = MSM_BACKEND_DAI_USB_TX,
  5881. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5882. .ignore_suspend = 1,
  5883. },
  5884. {
  5885. .name = LPASS_BE_PRI_TDM_RX_0,
  5886. .stream_name = "Primary TDM0 Playback",
  5887. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5888. .platform_name = "msm-pcm-routing",
  5889. .codec_name = "msm-stub-codec.1",
  5890. .codec_dai_name = "msm-stub-rx",
  5891. .no_pcm = 1,
  5892. .dpcm_playback = 1,
  5893. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5894. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5895. .ops = &sm6150_tdm_be_ops,
  5896. .ignore_suspend = 1,
  5897. .ignore_pmdown_time = 1,
  5898. },
  5899. {
  5900. .name = LPASS_BE_PRI_TDM_TX_0,
  5901. .stream_name = "Primary TDM0 Capture",
  5902. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5903. .platform_name = "msm-pcm-routing",
  5904. .codec_name = "msm-stub-codec.1",
  5905. .codec_dai_name = "msm-stub-tx",
  5906. .no_pcm = 1,
  5907. .dpcm_capture = 1,
  5908. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5909. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5910. .ops = &sm6150_tdm_be_ops,
  5911. .ignore_suspend = 1,
  5912. },
  5913. {
  5914. .name = LPASS_BE_SEC_TDM_RX_0,
  5915. .stream_name = "Secondary TDM0 Playback",
  5916. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5917. .platform_name = "msm-pcm-routing",
  5918. .codec_name = "msm-stub-codec.1",
  5919. .codec_dai_name = "msm-stub-rx",
  5920. .no_pcm = 1,
  5921. .dpcm_playback = 1,
  5922. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5923. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5924. .ops = &sm6150_tdm_be_ops,
  5925. .ignore_suspend = 1,
  5926. .ignore_pmdown_time = 1,
  5927. },
  5928. {
  5929. .name = LPASS_BE_SEC_TDM_TX_0,
  5930. .stream_name = "Secondary TDM0 Capture",
  5931. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5932. .platform_name = "msm-pcm-routing",
  5933. .codec_name = "msm-stub-codec.1",
  5934. .codec_dai_name = "msm-stub-tx",
  5935. .no_pcm = 1,
  5936. .dpcm_capture = 1,
  5937. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  5938. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5939. .ops = &sm6150_tdm_be_ops,
  5940. .ignore_suspend = 1,
  5941. },
  5942. {
  5943. .name = LPASS_BE_TERT_TDM_RX_0,
  5944. .stream_name = "Tertiary TDM0 Playback",
  5945. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  5946. .platform_name = "msm-pcm-routing",
  5947. .codec_name = "msm-stub-codec.1",
  5948. .codec_dai_name = "msm-stub-rx",
  5949. .no_pcm = 1,
  5950. .dpcm_playback = 1,
  5951. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  5952. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5953. .ops = &sm6150_tdm_be_ops,
  5954. .ignore_suspend = 1,
  5955. .ignore_pmdown_time = 1,
  5956. },
  5957. {
  5958. .name = LPASS_BE_TERT_TDM_TX_0,
  5959. .stream_name = "Tertiary TDM0 Capture",
  5960. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  5961. .platform_name = "msm-pcm-routing",
  5962. .codec_name = "msm-stub-codec.1",
  5963. .codec_dai_name = "msm-stub-tx",
  5964. .no_pcm = 1,
  5965. .dpcm_capture = 1,
  5966. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  5967. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5968. .ops = &sm6150_tdm_be_ops,
  5969. .ignore_suspend = 1,
  5970. },
  5971. {
  5972. .name = LPASS_BE_QUAT_TDM_RX_0,
  5973. .stream_name = "Quaternary TDM0 Playback",
  5974. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  5975. .platform_name = "msm-pcm-routing",
  5976. .codec_name = "msm-stub-codec.1",
  5977. .codec_dai_name = "msm-stub-rx",
  5978. .no_pcm = 1,
  5979. .dpcm_playback = 1,
  5980. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  5981. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  5982. .ops = &sm6150_tdm_be_ops,
  5983. .ignore_suspend = 1,
  5984. .ignore_pmdown_time = 1,
  5985. },
  5986. {
  5987. .name = LPASS_BE_QUAT_TDM_TX_0,
  5988. .stream_name = "Quaternary TDM0 Capture",
  5989. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  5990. .platform_name = "msm-pcm-routing",
  5991. .codec_name = "msm-stub-codec.1",
  5992. .codec_dai_name = "msm-stub-tx",
  5993. .no_pcm = 1,
  5994. .dpcm_capture = 1,
  5995. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  5996. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5997. .ops = &sm6150_tdm_be_ops,
  5998. .ignore_suspend = 1,
  5999. },
  6000. };
  6001. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6002. {
  6003. .name = LPASS_BE_SLIMBUS_0_RX,
  6004. .stream_name = "Slimbus Playback",
  6005. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6006. .platform_name = "msm-pcm-routing",
  6007. .codec_name = "tavil_codec",
  6008. .codec_dai_name = "tavil_rx1",
  6009. .no_pcm = 1,
  6010. .dpcm_playback = 1,
  6011. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6012. .init = &msm_audrx_tavil_init,
  6013. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6014. /* this dainlink has playback support */
  6015. .ignore_pmdown_time = 1,
  6016. .ignore_suspend = 1,
  6017. .ops = &msm_be_ops,
  6018. },
  6019. {
  6020. .name = LPASS_BE_SLIMBUS_0_TX,
  6021. .stream_name = "Slimbus Capture",
  6022. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6023. .platform_name = "msm-pcm-routing",
  6024. .codec_name = "tavil_codec",
  6025. .codec_dai_name = "tavil_tx1",
  6026. .no_pcm = 1,
  6027. .dpcm_capture = 1,
  6028. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6029. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6030. .ignore_suspend = 1,
  6031. .ops = &msm_be_ops,
  6032. },
  6033. {
  6034. .name = LPASS_BE_SLIMBUS_1_RX,
  6035. .stream_name = "Slimbus1 Playback",
  6036. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6037. .platform_name = "msm-pcm-routing",
  6038. .codec_name = "tavil_codec",
  6039. .codec_dai_name = "tavil_rx1",
  6040. .no_pcm = 1,
  6041. .dpcm_playback = 1,
  6042. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6043. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6044. .ops = &msm_be_ops,
  6045. /* dai link has playback support */
  6046. .ignore_pmdown_time = 1,
  6047. .ignore_suspend = 1,
  6048. },
  6049. {
  6050. .name = LPASS_BE_SLIMBUS_1_TX,
  6051. .stream_name = "Slimbus1 Capture",
  6052. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6053. .platform_name = "msm-pcm-routing",
  6054. .codec_name = "tavil_codec",
  6055. .codec_dai_name = "tavil_tx3",
  6056. .no_pcm = 1,
  6057. .dpcm_capture = 1,
  6058. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6059. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6060. .ops = &msm_be_ops,
  6061. .ignore_suspend = 1,
  6062. },
  6063. {
  6064. .name = LPASS_BE_SLIMBUS_2_RX,
  6065. .stream_name = "Slimbus2 Playback",
  6066. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6067. .platform_name = "msm-pcm-routing",
  6068. .codec_name = "tavil_codec",
  6069. .codec_dai_name = "tavil_rx2",
  6070. .no_pcm = 1,
  6071. .dpcm_playback = 1,
  6072. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6073. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6074. .ops = &msm_be_ops,
  6075. .ignore_pmdown_time = 1,
  6076. .ignore_suspend = 1,
  6077. },
  6078. {
  6079. .name = LPASS_BE_SLIMBUS_3_RX,
  6080. .stream_name = "Slimbus3 Playback",
  6081. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6082. .platform_name = "msm-pcm-routing",
  6083. .codec_name = "tavil_codec",
  6084. .codec_dai_name = "tavil_rx1",
  6085. .no_pcm = 1,
  6086. .dpcm_playback = 1,
  6087. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6088. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6089. .ops = &msm_be_ops,
  6090. /* dai link has playback support */
  6091. .ignore_pmdown_time = 1,
  6092. .ignore_suspend = 1,
  6093. },
  6094. {
  6095. .name = LPASS_BE_SLIMBUS_3_TX,
  6096. .stream_name = "Slimbus3 Capture",
  6097. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6098. .platform_name = "msm-pcm-routing",
  6099. .codec_name = "tavil_codec",
  6100. .codec_dai_name = "tavil_tx1",
  6101. .no_pcm = 1,
  6102. .dpcm_capture = 1,
  6103. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6104. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6105. .ops = &msm_be_ops,
  6106. .ignore_suspend = 1,
  6107. },
  6108. {
  6109. .name = LPASS_BE_SLIMBUS_4_RX,
  6110. .stream_name = "Slimbus4 Playback",
  6111. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6112. .platform_name = "msm-pcm-routing",
  6113. .codec_name = "tavil_codec",
  6114. .codec_dai_name = "tavil_rx1",
  6115. .no_pcm = 1,
  6116. .dpcm_playback = 1,
  6117. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6118. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6119. .ops = &msm_be_ops,
  6120. /* dai link has playback support */
  6121. .ignore_pmdown_time = 1,
  6122. .ignore_suspend = 1,
  6123. },
  6124. {
  6125. .name = LPASS_BE_SLIMBUS_5_RX,
  6126. .stream_name = "Slimbus5 Playback",
  6127. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6128. .platform_name = "msm-pcm-routing",
  6129. .codec_name = "tavil_codec",
  6130. .codec_dai_name = "tavil_rx3",
  6131. .no_pcm = 1,
  6132. .dpcm_playback = 1,
  6133. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6134. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6135. .ops = &msm_be_ops,
  6136. /* dai link has playback support */
  6137. .ignore_pmdown_time = 1,
  6138. .ignore_suspend = 1,
  6139. },
  6140. /* MAD BE */
  6141. {
  6142. .name = LPASS_BE_SLIMBUS_5_TX,
  6143. .stream_name = "Slimbus5 Capture",
  6144. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6145. .platform_name = "msm-pcm-routing",
  6146. .codec_name = "tavil_codec",
  6147. .codec_dai_name = "tavil_mad1",
  6148. .no_pcm = 1,
  6149. .dpcm_capture = 1,
  6150. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6151. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6152. .ops = &msm_be_ops,
  6153. .ignore_suspend = 1,
  6154. },
  6155. {
  6156. .name = LPASS_BE_SLIMBUS_6_RX,
  6157. .stream_name = "Slimbus6 Playback",
  6158. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6159. .platform_name = "msm-pcm-routing",
  6160. .codec_name = "tavil_codec",
  6161. .codec_dai_name = "tavil_rx4",
  6162. .no_pcm = 1,
  6163. .dpcm_playback = 1,
  6164. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6165. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6166. .ops = &msm_be_ops,
  6167. /* dai link has playback support */
  6168. .ignore_pmdown_time = 1,
  6169. .ignore_suspend = 1,
  6170. },
  6171. /* Slimbus VI Recording */
  6172. {
  6173. .name = LPASS_BE_SLIMBUS_TX_VI,
  6174. .stream_name = "Slimbus4 Capture",
  6175. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6176. .platform_name = "msm-pcm-routing",
  6177. .codec_name = "tavil_codec",
  6178. .codec_dai_name = "tavil_vifeedback",
  6179. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6180. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6181. .ops = &msm_be_ops,
  6182. .ignore_suspend = 1,
  6183. .no_pcm = 1,
  6184. .dpcm_capture = 1,
  6185. },
  6186. };
  6187. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6188. {
  6189. .name = LPASS_BE_SLIMBUS_7_RX,
  6190. .stream_name = "Slimbus7 Playback",
  6191. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6192. .platform_name = "msm-pcm-routing",
  6193. .codec_name = "btfmslim_slave",
  6194. /* BT codec driver determines capabilities based on
  6195. * dai name, bt codecdai name should always contains
  6196. * supported usecase information
  6197. */
  6198. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6199. .no_pcm = 1,
  6200. .dpcm_playback = 1,
  6201. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6202. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6203. .ops = &msm_wcn_ops,
  6204. /* dai link has playback support */
  6205. .ignore_pmdown_time = 1,
  6206. .ignore_suspend = 1,
  6207. },
  6208. {
  6209. .name = LPASS_BE_SLIMBUS_7_TX,
  6210. .stream_name = "Slimbus7 Capture",
  6211. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6212. .platform_name = "msm-pcm-routing",
  6213. .codec_name = "btfmslim_slave",
  6214. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6215. .no_pcm = 1,
  6216. .dpcm_capture = 1,
  6217. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6218. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6219. .ops = &msm_wcn_ops,
  6220. .ignore_suspend = 1,
  6221. },
  6222. {
  6223. .name = LPASS_BE_SLIMBUS_8_TX,
  6224. .stream_name = "Slimbus8 Capture",
  6225. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6226. .platform_name = "msm-pcm-routing",
  6227. .codec_name = "btfmslim_slave",
  6228. .codec_dai_name = "btfm_fm_slim_tx",
  6229. .no_pcm = 1,
  6230. .dpcm_capture = 1,
  6231. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6232. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6233. .init = &msm_wcn_init,
  6234. .ops = &msm_wcn_ops,
  6235. .ignore_suspend = 1,
  6236. },
  6237. };
  6238. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6239. /* DISP PORT BACK END DAI Link */
  6240. {
  6241. .name = LPASS_BE_DISPLAY_PORT,
  6242. .stream_name = "Display Port Playback",
  6243. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6244. .platform_name = "msm-pcm-routing",
  6245. .codec_name = "msm-ext-disp-audio-codec-rx",
  6246. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6247. .no_pcm = 1,
  6248. .dpcm_playback = 1,
  6249. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6250. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6251. .ignore_pmdown_time = 1,
  6252. .ignore_suspend = 1,
  6253. },
  6254. };
  6255. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6256. {
  6257. .name = LPASS_BE_PRI_MI2S_RX,
  6258. .stream_name = "Primary MI2S Playback",
  6259. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6260. .platform_name = "msm-pcm-routing",
  6261. .codec_name = "msm-stub-codec.1",
  6262. .codec_dai_name = "msm-stub-rx",
  6263. .no_pcm = 1,
  6264. .dpcm_playback = 1,
  6265. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6266. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6267. .ops = &msm_mi2s_be_ops,
  6268. .ignore_suspend = 1,
  6269. .ignore_pmdown_time = 1,
  6270. },
  6271. {
  6272. .name = LPASS_BE_PRI_MI2S_TX,
  6273. .stream_name = "Primary MI2S Capture",
  6274. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6275. .platform_name = "msm-pcm-routing",
  6276. .codec_name = "msm-stub-codec.1",
  6277. .codec_dai_name = "msm-stub-tx",
  6278. .no_pcm = 1,
  6279. .dpcm_capture = 1,
  6280. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6281. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6282. .ops = &msm_mi2s_be_ops,
  6283. .ignore_suspend = 1,
  6284. },
  6285. {
  6286. .name = LPASS_BE_SEC_MI2S_RX,
  6287. .stream_name = "Secondary MI2S Playback",
  6288. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6289. .platform_name = "msm-pcm-routing",
  6290. .codec_name = "msm-stub-codec.1",
  6291. .codec_dai_name = "msm-stub-rx",
  6292. .no_pcm = 1,
  6293. .dpcm_playback = 1,
  6294. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6295. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6296. .ops = &msm_mi2s_be_ops,
  6297. .ignore_suspend = 1,
  6298. .ignore_pmdown_time = 1,
  6299. },
  6300. {
  6301. .name = LPASS_BE_SEC_MI2S_TX,
  6302. .stream_name = "Secondary MI2S Capture",
  6303. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6304. .platform_name = "msm-pcm-routing",
  6305. .codec_name = "msm-stub-codec.1",
  6306. .codec_dai_name = "msm-stub-tx",
  6307. .no_pcm = 1,
  6308. .dpcm_capture = 1,
  6309. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6310. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6311. .ops = &msm_mi2s_be_ops,
  6312. .ignore_suspend = 1,
  6313. },
  6314. {
  6315. .name = LPASS_BE_TERT_MI2S_RX,
  6316. .stream_name = "Tertiary MI2S Playback",
  6317. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6318. .platform_name = "msm-pcm-routing",
  6319. .codec_name = "msm-stub-codec.1",
  6320. .codec_dai_name = "msm-stub-rx",
  6321. .no_pcm = 1,
  6322. .dpcm_playback = 1,
  6323. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6324. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6325. .ops = &msm_mi2s_be_ops,
  6326. .ignore_suspend = 1,
  6327. .ignore_pmdown_time = 1,
  6328. },
  6329. {
  6330. .name = LPASS_BE_TERT_MI2S_TX,
  6331. .stream_name = "Tertiary MI2S Capture",
  6332. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6333. .platform_name = "msm-pcm-routing",
  6334. .codec_name = "msm-stub-codec.1",
  6335. .codec_dai_name = "msm-stub-tx",
  6336. .no_pcm = 1,
  6337. .dpcm_capture = 1,
  6338. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6339. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6340. .ops = &msm_mi2s_be_ops,
  6341. .ignore_suspend = 1,
  6342. },
  6343. {
  6344. .name = LPASS_BE_QUAT_MI2S_RX,
  6345. .stream_name = "Quaternary MI2S Playback",
  6346. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6347. .platform_name = "msm-pcm-routing",
  6348. .codec_name = "msm-stub-codec.1",
  6349. .codec_dai_name = "msm-stub-rx",
  6350. .no_pcm = 1,
  6351. .dpcm_playback = 1,
  6352. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6353. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6354. .ops = &msm_mi2s_be_ops,
  6355. .ignore_suspend = 1,
  6356. .ignore_pmdown_time = 1,
  6357. },
  6358. {
  6359. .name = LPASS_BE_QUAT_MI2S_TX,
  6360. .stream_name = "Quaternary MI2S Capture",
  6361. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6362. .platform_name = "msm-pcm-routing",
  6363. .codec_name = "msm-stub-codec.1",
  6364. .codec_dai_name = "msm-stub-tx",
  6365. .no_pcm = 1,
  6366. .dpcm_capture = 1,
  6367. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6368. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6369. .ops = &msm_mi2s_be_ops,
  6370. .ignore_suspend = 1,
  6371. },
  6372. {
  6373. .name = LPASS_BE_QUIN_MI2S_RX,
  6374. .stream_name = "Quinary MI2S Playback",
  6375. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6376. .platform_name = "msm-pcm-routing",
  6377. .codec_name = "msm-stub-codec.1",
  6378. .codec_dai_name = "msm-stub-rx",
  6379. .no_pcm = 1,
  6380. .dpcm_playback = 1,
  6381. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6382. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6383. .ops = &msm_mi2s_be_ops,
  6384. .ignore_suspend = 1,
  6385. .ignore_pmdown_time = 1,
  6386. },
  6387. {
  6388. .name = LPASS_BE_QUIN_MI2S_TX,
  6389. .stream_name = "Quinary MI2S Capture",
  6390. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6391. .platform_name = "msm-pcm-routing",
  6392. .codec_name = "msm-stub-codec.1",
  6393. .codec_dai_name = "msm-stub-tx",
  6394. .no_pcm = 1,
  6395. .dpcm_capture = 1,
  6396. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6397. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6398. .ops = &msm_mi2s_be_ops,
  6399. .ignore_suspend = 1,
  6400. },
  6401. };
  6402. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6403. /* Primary AUX PCM Backend DAI Links */
  6404. {
  6405. .name = LPASS_BE_AUXPCM_RX,
  6406. .stream_name = "AUX PCM Playback",
  6407. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6408. .platform_name = "msm-pcm-routing",
  6409. .codec_name = "msm-stub-codec.1",
  6410. .codec_dai_name = "msm-stub-rx",
  6411. .no_pcm = 1,
  6412. .dpcm_playback = 1,
  6413. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6414. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6415. .ignore_pmdown_time = 1,
  6416. .ignore_suspend = 1,
  6417. },
  6418. {
  6419. .name = LPASS_BE_AUXPCM_TX,
  6420. .stream_name = "AUX PCM Capture",
  6421. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6422. .platform_name = "msm-pcm-routing",
  6423. .codec_name = "msm-stub-codec.1",
  6424. .codec_dai_name = "msm-stub-tx",
  6425. .no_pcm = 1,
  6426. .dpcm_capture = 1,
  6427. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6428. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6429. .ignore_suspend = 1,
  6430. },
  6431. /* Secondary AUX PCM Backend DAI Links */
  6432. {
  6433. .name = LPASS_BE_SEC_AUXPCM_RX,
  6434. .stream_name = "Sec AUX PCM Playback",
  6435. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6436. .platform_name = "msm-pcm-routing",
  6437. .codec_name = "msm-stub-codec.1",
  6438. .codec_dai_name = "msm-stub-rx",
  6439. .no_pcm = 1,
  6440. .dpcm_playback = 1,
  6441. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6442. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6443. .ignore_pmdown_time = 1,
  6444. .ignore_suspend = 1,
  6445. },
  6446. {
  6447. .name = LPASS_BE_SEC_AUXPCM_TX,
  6448. .stream_name = "Sec AUX PCM Capture",
  6449. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6450. .platform_name = "msm-pcm-routing",
  6451. .codec_name = "msm-stub-codec.1",
  6452. .codec_dai_name = "msm-stub-tx",
  6453. .no_pcm = 1,
  6454. .dpcm_capture = 1,
  6455. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6456. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6457. .ignore_suspend = 1,
  6458. },
  6459. /* Tertiary AUX PCM Backend DAI Links */
  6460. {
  6461. .name = LPASS_BE_TERT_AUXPCM_RX,
  6462. .stream_name = "Tert AUX PCM Playback",
  6463. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6464. .platform_name = "msm-pcm-routing",
  6465. .codec_name = "msm-stub-codec.1",
  6466. .codec_dai_name = "msm-stub-rx",
  6467. .no_pcm = 1,
  6468. .dpcm_playback = 1,
  6469. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6470. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6471. .ignore_suspend = 1,
  6472. },
  6473. {
  6474. .name = LPASS_BE_TERT_AUXPCM_TX,
  6475. .stream_name = "Tert AUX PCM Capture",
  6476. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6477. .platform_name = "msm-pcm-routing",
  6478. .codec_name = "msm-stub-codec.1",
  6479. .codec_dai_name = "msm-stub-tx",
  6480. .no_pcm = 1,
  6481. .dpcm_capture = 1,
  6482. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6483. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6484. .ignore_suspend = 1,
  6485. },
  6486. /* Quaternary AUX PCM Backend DAI Links */
  6487. {
  6488. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6489. .stream_name = "Quat AUX PCM Playback",
  6490. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6491. .platform_name = "msm-pcm-routing",
  6492. .codec_name = "msm-stub-codec.1",
  6493. .codec_dai_name = "msm-stub-rx",
  6494. .no_pcm = 1,
  6495. .dpcm_playback = 1,
  6496. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6497. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6498. .ignore_pmdown_time = 1,
  6499. .ignore_suspend = 1,
  6500. },
  6501. {
  6502. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6503. .stream_name = "Quat AUX PCM Capture",
  6504. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6505. .platform_name = "msm-pcm-routing",
  6506. .codec_name = "msm-stub-codec.1",
  6507. .codec_dai_name = "msm-stub-tx",
  6508. .no_pcm = 1,
  6509. .dpcm_capture = 1,
  6510. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6511. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6512. .ignore_suspend = 1,
  6513. },
  6514. /* Quinary AUX PCM Backend DAI Links */
  6515. {
  6516. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6517. .stream_name = "Quin AUX PCM Playback",
  6518. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6519. .platform_name = "msm-pcm-routing",
  6520. .codec_name = "msm-stub-codec.1",
  6521. .codec_dai_name = "msm-stub-rx",
  6522. .no_pcm = 1,
  6523. .dpcm_playback = 1,
  6524. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6525. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6526. .ignore_pmdown_time = 1,
  6527. .ignore_suspend = 1,
  6528. },
  6529. {
  6530. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6531. .stream_name = "Quin AUX PCM Capture",
  6532. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6533. .platform_name = "msm-pcm-routing",
  6534. .codec_name = "msm-stub-codec.1",
  6535. .codec_dai_name = "msm-stub-tx",
  6536. .no_pcm = 1,
  6537. .dpcm_capture = 1,
  6538. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6539. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6540. .ignore_suspend = 1,
  6541. },
  6542. };
  6543. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6544. /* WSA CDC DMA Backend DAI Links */
  6545. {
  6546. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6547. .stream_name = "WSA CDC DMA0 Playback",
  6548. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6549. .platform_name = "msm-pcm-routing",
  6550. .codec_name = "bolero_codec",
  6551. .codec_dai_name = "wsa_macro_rx1",
  6552. .no_pcm = 1,
  6553. .dpcm_playback = 1,
  6554. .init = &msm_int_audrx_init,
  6555. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6556. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6557. .ignore_pmdown_time = 1,
  6558. .ignore_suspend = 1,
  6559. .ops = &msm_cdc_dma_be_ops,
  6560. },
  6561. {
  6562. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6563. .stream_name = "WSA CDC DMA1 Playback",
  6564. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6565. .platform_name = "msm-pcm-routing",
  6566. .codec_name = "bolero_codec",
  6567. .codec_dai_name = "wsa_macro_rx_mix",
  6568. .no_pcm = 1,
  6569. .dpcm_playback = 1,
  6570. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6571. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6572. .ignore_pmdown_time = 1,
  6573. .ignore_suspend = 1,
  6574. .ops = &msm_cdc_dma_be_ops,
  6575. },
  6576. {
  6577. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6578. .stream_name = "WSA CDC DMA1 Capture",
  6579. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6580. .platform_name = "msm-pcm-routing",
  6581. .codec_name = "bolero_codec",
  6582. .codec_dai_name = "wsa_macro_echo",
  6583. .no_pcm = 1,
  6584. .dpcm_capture = 1,
  6585. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6586. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6587. .ignore_suspend = 1,
  6588. .ops = &msm_cdc_dma_be_ops,
  6589. },
  6590. };
  6591. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6592. /* RX CDC DMA Backend DAI Links */
  6593. {
  6594. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6595. .stream_name = "RX CDC DMA0 Playback",
  6596. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6597. .platform_name = "msm-pcm-routing",
  6598. .codec_name = "bolero_codec",
  6599. .codec_dai_name = "rx_macro_rx1",
  6600. .no_pcm = 1,
  6601. .dpcm_playback = 1,
  6602. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6603. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6604. .ignore_pmdown_time = 1,
  6605. .ignore_suspend = 1,
  6606. .ops = &msm_cdc_dma_be_ops,
  6607. },
  6608. {
  6609. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6610. .stream_name = "RX CDC DMA1 Playback",
  6611. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6612. .platform_name = "msm-pcm-routing",
  6613. .codec_name = "bolero_codec",
  6614. .codec_dai_name = "rx_macro_rx2",
  6615. .no_pcm = 1,
  6616. .dpcm_playback = 1,
  6617. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6618. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6619. .ignore_pmdown_time = 1,
  6620. .ignore_suspend = 1,
  6621. .ops = &msm_cdc_dma_be_ops,
  6622. },
  6623. {
  6624. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6625. .stream_name = "RX CDC DMA2 Playback",
  6626. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6627. .platform_name = "msm-pcm-routing",
  6628. .codec_name = "bolero_codec",
  6629. .codec_dai_name = "rx_macro_rx3",
  6630. .no_pcm = 1,
  6631. .dpcm_playback = 1,
  6632. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6633. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6634. .ignore_pmdown_time = 1,
  6635. .ignore_suspend = 1,
  6636. .ops = &msm_cdc_dma_be_ops,
  6637. },
  6638. {
  6639. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6640. .stream_name = "RX CDC DMA3 Playback",
  6641. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6642. .platform_name = "msm-pcm-routing",
  6643. .codec_name = "bolero_codec",
  6644. .codec_dai_name = "rx_macro_rx4",
  6645. .no_pcm = 1,
  6646. .dpcm_playback = 1,
  6647. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6648. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6649. .ignore_pmdown_time = 1,
  6650. .ignore_suspend = 1,
  6651. .ops = &msm_cdc_dma_be_ops,
  6652. },
  6653. /* TX CDC DMA Backend DAI Links */
  6654. {
  6655. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6656. .stream_name = "TX CDC DMA3 Capture",
  6657. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6658. .platform_name = "msm-pcm-routing",
  6659. .codec_name = "bolero_codec",
  6660. .codec_dai_name = "tx_macro_tx1",
  6661. .no_pcm = 1,
  6662. .dpcm_capture = 1,
  6663. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6664. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6665. .ignore_suspend = 1,
  6666. .ops = &msm_cdc_dma_be_ops,
  6667. },
  6668. {
  6669. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6670. .stream_name = "TX CDC DMA4 Capture",
  6671. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6672. .platform_name = "msm-pcm-routing",
  6673. .codec_name = "bolero_codec",
  6674. .codec_dai_name = "tx_macro_tx2",
  6675. .no_pcm = 1,
  6676. .dpcm_capture = 1,
  6677. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6678. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6679. .ignore_suspend = 1,
  6680. .ops = &msm_cdc_dma_be_ops,
  6681. },
  6682. };
  6683. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6684. ARRAY_SIZE(msm_common_dai_links) +
  6685. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6686. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6687. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6688. ARRAY_SIZE(msm_common_be_dai_links) +
  6689. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6690. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6691. ARRAY_SIZE(ext_disp_be_dai_link) +
  6692. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6693. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6694. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6695. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6696. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6697. {
  6698. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6699. struct snd_soc_pcm_runtime *rtd;
  6700. int ret = 0;
  6701. void *mbhc_calibration;
  6702. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6703. if (!rtd) {
  6704. dev_err(card->dev,
  6705. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6706. __func__, be_dl_name);
  6707. ret = -EINVAL;
  6708. goto err_pcm_runtime;
  6709. }
  6710. mbhc_calibration = def_wcd_mbhc_cal();
  6711. if (!mbhc_calibration) {
  6712. ret = -ENOMEM;
  6713. goto err_mbhc_cal;
  6714. }
  6715. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6716. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6717. if (ret) {
  6718. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6719. __func__, ret);
  6720. goto err_hs_detect;
  6721. }
  6722. return 0;
  6723. err_hs_detect:
  6724. kfree(mbhc_calibration);
  6725. err_mbhc_cal:
  6726. err_pcm_runtime:
  6727. return ret;
  6728. }
  6729. static int msm_populate_dai_link_component_of_node(
  6730. struct snd_soc_card *card)
  6731. {
  6732. int i, index, ret = 0;
  6733. struct device *cdev = card->dev;
  6734. struct snd_soc_dai_link *dai_link = card->dai_link;
  6735. struct device_node *np;
  6736. if (!cdev) {
  6737. pr_err("%s: Sound card device memory NULL\n", __func__);
  6738. return -ENODEV;
  6739. }
  6740. for (i = 0; i < card->num_links; i++) {
  6741. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6742. continue;
  6743. /* populate platform_of_node for snd card dai links */
  6744. if (dai_link[i].platform_name &&
  6745. !dai_link[i].platform_of_node) {
  6746. index = of_property_match_string(cdev->of_node,
  6747. "asoc-platform-names",
  6748. dai_link[i].platform_name);
  6749. if (index < 0) {
  6750. pr_err("%s: No match found for platform name: %s\n",
  6751. __func__, dai_link[i].platform_name);
  6752. ret = index;
  6753. goto err;
  6754. }
  6755. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6756. index);
  6757. if (!np) {
  6758. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6759. __func__, dai_link[i].platform_name,
  6760. index);
  6761. ret = -ENODEV;
  6762. goto err;
  6763. }
  6764. dai_link[i].platform_of_node = np;
  6765. dai_link[i].platform_name = NULL;
  6766. }
  6767. /* populate cpu_of_node for snd card dai links */
  6768. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6769. index = of_property_match_string(cdev->of_node,
  6770. "asoc-cpu-names",
  6771. dai_link[i].cpu_dai_name);
  6772. if (index >= 0) {
  6773. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6774. index);
  6775. if (!np) {
  6776. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6777. __func__,
  6778. dai_link[i].cpu_dai_name);
  6779. ret = -ENODEV;
  6780. goto err;
  6781. }
  6782. dai_link[i].cpu_of_node = np;
  6783. dai_link[i].cpu_dai_name = NULL;
  6784. }
  6785. }
  6786. /* populate codec_of_node for snd card dai links */
  6787. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6788. index = of_property_match_string(cdev->of_node,
  6789. "asoc-codec-names",
  6790. dai_link[i].codec_name);
  6791. if (index < 0)
  6792. continue;
  6793. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6794. index);
  6795. if (!np) {
  6796. pr_err("%s: retrieving phandle for codec %s failed\n",
  6797. __func__, dai_link[i].codec_name);
  6798. ret = -ENODEV;
  6799. goto err;
  6800. }
  6801. dai_link[i].codec_of_node = np;
  6802. dai_link[i].codec_name = NULL;
  6803. }
  6804. }
  6805. err:
  6806. return ret;
  6807. }
  6808. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6809. {
  6810. int ret = 0;
  6811. struct snd_soc_codec *codec = rtd->codec;
  6812. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6813. ARRAY_SIZE(msm_tavil_snd_controls));
  6814. if (ret < 0) {
  6815. dev_err(codec->dev,
  6816. "%s: add_codec_controls failed, err = %d\n",
  6817. __func__, ret);
  6818. return ret;
  6819. }
  6820. return 0;
  6821. }
  6822. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6823. struct snd_pcm_hw_params *params)
  6824. {
  6825. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6826. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6827. int ret = 0;
  6828. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6829. 151};
  6830. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6831. 134, 135, 136, 137, 138, 139,
  6832. 140, 141, 142, 143};
  6833. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6834. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6835. slim_rx_cfg[SLIM_RX_0].channels,
  6836. rx_ch);
  6837. if (ret < 0)
  6838. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6839. __func__, ret);
  6840. } else {
  6841. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6842. slim_tx_cfg[SLIM_TX_0].channels,
  6843. tx_ch, 0, 0);
  6844. if (ret < 0)
  6845. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6846. __func__, ret);
  6847. }
  6848. return ret;
  6849. }
  6850. static struct snd_soc_ops msm_stub_be_ops = {
  6851. .hw_params = msm_snd_stub_hw_params,
  6852. };
  6853. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6854. /* FrontEnd DAI Links */
  6855. {
  6856. .name = "MSMSTUB Media1",
  6857. .stream_name = "MultiMedia1",
  6858. .cpu_dai_name = "MultiMedia1",
  6859. .platform_name = "msm-pcm-dsp.0",
  6860. .dynamic = 1,
  6861. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6862. .dpcm_playback = 1,
  6863. .dpcm_capture = 1,
  6864. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6865. SND_SOC_DPCM_TRIGGER_POST},
  6866. .codec_dai_name = "snd-soc-dummy-dai",
  6867. .codec_name = "snd-soc-dummy",
  6868. .ignore_suspend = 1,
  6869. /* this dainlink has playback support */
  6870. .ignore_pmdown_time = 1,
  6871. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6872. },
  6873. };
  6874. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6875. /* Backend DAI Links */
  6876. {
  6877. .name = LPASS_BE_SLIMBUS_0_RX,
  6878. .stream_name = "Slimbus Playback",
  6879. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6880. .platform_name = "msm-pcm-routing",
  6881. .codec_name = "msm-stub-codec.1",
  6882. .codec_dai_name = "msm-stub-rx",
  6883. .no_pcm = 1,
  6884. .dpcm_playback = 1,
  6885. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6886. .init = &msm_audrx_stub_init,
  6887. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6888. .ignore_pmdown_time = 1, /* dai link has playback support */
  6889. .ignore_suspend = 1,
  6890. .ops = &msm_stub_be_ops,
  6891. },
  6892. {
  6893. .name = LPASS_BE_SLIMBUS_0_TX,
  6894. .stream_name = "Slimbus Capture",
  6895. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6896. .platform_name = "msm-pcm-routing",
  6897. .codec_name = "msm-stub-codec.1",
  6898. .codec_dai_name = "msm-stub-tx",
  6899. .no_pcm = 1,
  6900. .dpcm_capture = 1,
  6901. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6902. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6903. .ignore_suspend = 1,
  6904. .ops = &msm_stub_be_ops,
  6905. },
  6906. };
  6907. static struct snd_soc_dai_link msm_stub_dai_links[
  6908. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6909. ARRAY_SIZE(msm_stub_be_dai_links)];
  6910. struct snd_soc_card snd_soc_card_stub_msm = {
  6911. .name = "sm6150-stub-snd-card",
  6912. };
  6913. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  6914. { .compatible = "qcom,sm6150-asoc-snd",
  6915. .data = "codec"},
  6916. { .compatible = "qcom,sm6150-asoc-snd-stub",
  6917. .data = "stub_codec"},
  6918. {},
  6919. };
  6920. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6921. {
  6922. struct snd_soc_card *card = NULL;
  6923. struct snd_soc_dai_link *dailink;
  6924. int total_links = 0, rc = 0;
  6925. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  6926. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  6927. u32 wcn_btfm_intf = 0;
  6928. const struct of_device_id *match;
  6929. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  6930. if (!match) {
  6931. dev_err(dev, "%s: No DT match found for sound card\n",
  6932. __func__);
  6933. return NULL;
  6934. }
  6935. if (!strcmp(match->data, "codec")) {
  6936. card = &snd_soc_card_sm6150_msm;
  6937. memcpy(msm_sm6150_dai_links + total_links,
  6938. msm_common_dai_links,
  6939. sizeof(msm_common_dai_links));
  6940. total_links += ARRAY_SIZE(msm_common_dai_links);
  6941. memcpy(msm_sm6150_dai_links + total_links,
  6942. msm_common_misc_fe_dai_links,
  6943. sizeof(msm_common_misc_fe_dai_links));
  6944. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  6945. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  6946. &tavil_codec);
  6947. if (rc) {
  6948. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  6949. __func__);
  6950. } else {
  6951. if (tavil_codec) {
  6952. card->late_probe =
  6953. msm_snd_card_tavil_late_probe;
  6954. memcpy(msm_sm6150_dai_links + total_links,
  6955. msm_tavil_fe_dai_links,
  6956. sizeof(msm_tavil_fe_dai_links));
  6957. total_links +=
  6958. ARRAY_SIZE(msm_tavil_fe_dai_links);
  6959. }
  6960. }
  6961. if (!tavil_codec) {
  6962. memcpy(msm_sm6150_dai_links + total_links,
  6963. msm_bolero_fe_dai_links,
  6964. sizeof(msm_bolero_fe_dai_links));
  6965. total_links +=
  6966. ARRAY_SIZE(msm_bolero_fe_dai_links);
  6967. }
  6968. memcpy(msm_sm6150_dai_links + total_links,
  6969. msm_common_be_dai_links,
  6970. sizeof(msm_common_be_dai_links));
  6971. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  6972. if (tavil_codec) {
  6973. memcpy(msm_sm6150_dai_links + total_links,
  6974. msm_tavil_be_dai_links,
  6975. sizeof(msm_tavil_be_dai_links));
  6976. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  6977. } else {
  6978. memcpy(msm_sm6150_dai_links + total_links,
  6979. msm_wsa_cdc_dma_be_dai_links,
  6980. sizeof(msm_wsa_cdc_dma_be_dai_links));
  6981. total_links +=
  6982. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  6983. memcpy(msm_sm6150_dai_links + total_links,
  6984. msm_rx_tx_cdc_dma_be_dai_links,
  6985. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  6986. total_links +=
  6987. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  6988. }
  6989. rc = of_property_read_u32(dev->of_node,
  6990. "qcom,ext-disp-audio-rx",
  6991. &ext_disp_audio_intf);
  6992. if (rc) {
  6993. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  6994. __func__);
  6995. } else {
  6996. if (auxpcm_audio_intf) {
  6997. memcpy(msm_sm6150_dai_links + total_links,
  6998. ext_disp_be_dai_link,
  6999. sizeof(ext_disp_be_dai_link));
  7000. total_links +=
  7001. ARRAY_SIZE(ext_disp_be_dai_link);
  7002. }
  7003. }
  7004. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7005. &mi2s_audio_intf);
  7006. if (rc) {
  7007. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7008. __func__);
  7009. } else {
  7010. if (mi2s_audio_intf) {
  7011. memcpy(msm_sm6150_dai_links + total_links,
  7012. msm_mi2s_be_dai_links,
  7013. sizeof(msm_mi2s_be_dai_links));
  7014. total_links +=
  7015. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7016. }
  7017. }
  7018. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7019. &wcn_btfm_intf);
  7020. if (rc) {
  7021. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7022. __func__);
  7023. } else {
  7024. if (wcn_btfm_intf) {
  7025. memcpy(msm_sm6150_dai_links + total_links,
  7026. msm_wcn_be_dai_links,
  7027. sizeof(msm_wcn_be_dai_links));
  7028. total_links +=
  7029. ARRAY_SIZE(msm_wcn_be_dai_links);
  7030. }
  7031. }
  7032. rc = of_property_read_u32(dev->of_node,
  7033. "qcom,auxpcm-audio-intf",
  7034. &auxpcm_audio_intf);
  7035. if (rc) {
  7036. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7037. __func__);
  7038. } else {
  7039. if (auxpcm_audio_intf) {
  7040. memcpy(msm_sm6150_dai_links + total_links,
  7041. msm_auxpcm_be_dai_links,
  7042. sizeof(msm_auxpcm_be_dai_links));
  7043. total_links +=
  7044. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7045. }
  7046. }
  7047. dailink = msm_sm6150_dai_links;
  7048. } else if (!strcmp(match->data, "stub_codec")) {
  7049. card = &snd_soc_card_stub_msm;
  7050. memcpy(msm_stub_dai_links + total_links,
  7051. msm_stub_fe_dai_links,
  7052. sizeof(msm_stub_fe_dai_links));
  7053. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7054. memcpy(msm_stub_dai_links + total_links,
  7055. msm_stub_be_dai_links,
  7056. sizeof(msm_stub_be_dai_links));
  7057. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7058. dailink = msm_stub_dai_links;
  7059. }
  7060. if (card) {
  7061. card->dai_link = dailink;
  7062. card->num_links = total_links;
  7063. }
  7064. return card;
  7065. }
  7066. static int msm_wsa881x_init(struct snd_soc_component *component)
  7067. {
  7068. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7069. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7070. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7071. SPKR_L_BOOST, SPKR_L_VI};
  7072. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7073. SPKR_R_BOOST, SPKR_R_VI};
  7074. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7075. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7076. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7077. struct msm_asoc_mach_data *pdata;
  7078. struct snd_soc_dapm_context *dapm;
  7079. struct snd_card *card = component->card->snd_card;
  7080. struct snd_info_entry *entry;
  7081. int ret = 0;
  7082. if (!codec) {
  7083. pr_err("%s codec is NULL\n", __func__);
  7084. return -EINVAL;
  7085. }
  7086. dapm = snd_soc_codec_get_dapm(codec);
  7087. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7088. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7089. __func__, codec->component.name);
  7090. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7091. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7092. &ch_rate[0], &spkleft_port_types[0]);
  7093. if (dapm->component) {
  7094. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7095. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7096. }
  7097. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7098. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7099. __func__, codec->component.name);
  7100. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7101. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7102. &ch_rate[0], &spkright_port_types[0]);
  7103. if (dapm->component) {
  7104. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7105. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7106. }
  7107. } else {
  7108. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7109. codec->component.name);
  7110. ret = -EINVAL;
  7111. goto err;
  7112. }
  7113. pdata = snd_soc_card_get_drvdata(component->card);
  7114. if (!pdata->codec_root) {
  7115. entry = snd_info_create_subdir(card->module, "codecs",
  7116. card->proc_root);
  7117. if (!entry) {
  7118. pr_err("%s: Cannot create codecs module entry\n",
  7119. __func__);
  7120. ret = 0;
  7121. goto err;
  7122. }
  7123. pdata->codec_root = entry;
  7124. }
  7125. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7126. codec);
  7127. err:
  7128. return ret;
  7129. }
  7130. static int msm_aux_codec_init(struct snd_soc_component *component)
  7131. {
  7132. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7133. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7134. int ret = 0;
  7135. void *mbhc_calibration;
  7136. struct snd_info_entry *entry;
  7137. struct snd_card *card = component->card->snd_card;
  7138. struct msm_asoc_mach_data *pdata;
  7139. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7140. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7141. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7142. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7143. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7144. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7145. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7146. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7147. snd_soc_dapm_sync(dapm);
  7148. pdata = snd_soc_card_get_drvdata(component->card);
  7149. if (!pdata->codec_root) {
  7150. entry = snd_info_create_subdir(card->module, "codecs",
  7151. card->proc_root);
  7152. if (!entry) {
  7153. pr_err("%s: Cannot create codecs module entry\n",
  7154. __func__);
  7155. ret = 0;
  7156. goto codec_root_err;
  7157. }
  7158. pdata->codec_root = entry;
  7159. }
  7160. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7161. codec_root_err:
  7162. mbhc_calibration = def_wcd_mbhc_cal();
  7163. if (!mbhc_calibration) {
  7164. return -ENOMEM;
  7165. }
  7166. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7167. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7168. return ret;
  7169. }
  7170. static int msm_init_aux_dev(struct platform_device *pdev,
  7171. struct snd_soc_card *card)
  7172. {
  7173. struct device_node *wsa_of_node;
  7174. struct device_node *aux_codec_of_node;
  7175. u32 wsa_max_devs;
  7176. u32 wsa_dev_cnt;
  7177. u32 codec_aux_dev_cnt = 0;
  7178. int i;
  7179. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7180. struct aux_codec_dev_info *aux_cdc_dev_info;
  7181. const char *auxdev_name_prefix[1];
  7182. char *dev_name_str = NULL;
  7183. int found = 0;
  7184. int codecs_found = 0;
  7185. int ret = 0;
  7186. /* Get maximum WSA device count for this platform */
  7187. ret = of_property_read_u32(pdev->dev.of_node,
  7188. "qcom,wsa-max-devs", &wsa_max_devs);
  7189. if (ret) {
  7190. dev_info(&pdev->dev,
  7191. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7192. __func__, pdev->dev.of_node->full_name, ret);
  7193. wsa_max_devs = 0;
  7194. goto codec_aux_dev;
  7195. }
  7196. if (wsa_max_devs == 0) {
  7197. dev_warn(&pdev->dev,
  7198. "%s: Max WSA devices is 0 for this target?\n",
  7199. __func__);
  7200. goto codec_aux_dev;
  7201. }
  7202. /* Get count of WSA device phandles for this platform */
  7203. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7204. "qcom,wsa-devs", NULL);
  7205. if (wsa_dev_cnt == -ENOENT) {
  7206. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7207. __func__);
  7208. goto err;
  7209. } else if (wsa_dev_cnt <= 0) {
  7210. dev_err(&pdev->dev,
  7211. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7212. __func__, wsa_dev_cnt);
  7213. ret = -EINVAL;
  7214. goto err;
  7215. }
  7216. /*
  7217. * Expect total phandles count to be NOT less than maximum possible
  7218. * WSA count. However, if it is less, then assign same value to
  7219. * max count as well.
  7220. */
  7221. if (wsa_dev_cnt < wsa_max_devs) {
  7222. dev_dbg(&pdev->dev,
  7223. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7224. __func__, wsa_max_devs, wsa_dev_cnt);
  7225. wsa_max_devs = wsa_dev_cnt;
  7226. }
  7227. /* Make sure prefix string passed for each WSA device */
  7228. ret = of_property_count_strings(pdev->dev.of_node,
  7229. "qcom,wsa-aux-dev-prefix");
  7230. if (ret != wsa_dev_cnt) {
  7231. dev_err(&pdev->dev,
  7232. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7233. __func__, wsa_dev_cnt, ret);
  7234. ret = -EINVAL;
  7235. goto err;
  7236. }
  7237. /*
  7238. * Alloc mem to store phandle and index info of WSA device, if already
  7239. * registered with ALSA core
  7240. */
  7241. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7242. sizeof(struct msm_wsa881x_dev_info),
  7243. GFP_KERNEL);
  7244. if (!wsa881x_dev_info) {
  7245. ret = -ENOMEM;
  7246. goto err;
  7247. }
  7248. /*
  7249. * search and check whether all WSA devices are already
  7250. * registered with ALSA core or not. If found a node, store
  7251. * the node and the index in a local array of struct for later
  7252. * use.
  7253. */
  7254. for (i = 0; i < wsa_dev_cnt; i++) {
  7255. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7256. "qcom,wsa-devs", i);
  7257. if (unlikely(!wsa_of_node)) {
  7258. /* we should not be here */
  7259. dev_err(&pdev->dev,
  7260. "%s: wsa dev node is not present\n",
  7261. __func__);
  7262. ret = -EINVAL;
  7263. goto err;
  7264. }
  7265. if (soc_find_component(wsa_of_node, NULL)) {
  7266. /* WSA device registered with ALSA core */
  7267. wsa881x_dev_info[found].of_node = wsa_of_node;
  7268. wsa881x_dev_info[found].index = i;
  7269. found++;
  7270. if (found == wsa_max_devs)
  7271. break;
  7272. }
  7273. }
  7274. if (found < wsa_max_devs) {
  7275. dev_dbg(&pdev->dev,
  7276. "%s: failed to find %d components. Found only %d\n",
  7277. __func__, wsa_max_devs, found);
  7278. return -EPROBE_DEFER;
  7279. }
  7280. dev_info(&pdev->dev,
  7281. "%s: found %d wsa881x devices registered with ALSA core\n",
  7282. __func__, found);
  7283. codec_aux_dev:
  7284. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7285. /* Get count of aux codec device phandles for this platform */
  7286. codec_aux_dev_cnt = of_count_phandle_with_args(
  7287. pdev->dev.of_node,
  7288. "qcom,codec-aux-devs", NULL);
  7289. if (codec_aux_dev_cnt == -ENOENT) {
  7290. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7291. __func__);
  7292. goto err;
  7293. } else if (codec_aux_dev_cnt <= 0) {
  7294. dev_err(&pdev->dev,
  7295. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7296. __func__, codec_aux_dev_cnt);
  7297. ret = -EINVAL;
  7298. goto err;
  7299. }
  7300. /*
  7301. * Alloc mem to store phandle and index info of aux codec
  7302. * if already registered with ALSA core
  7303. */
  7304. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7305. sizeof(struct aux_codec_dev_info),
  7306. GFP_KERNEL);
  7307. if (!aux_cdc_dev_info) {
  7308. ret = -ENOMEM;
  7309. goto err;
  7310. }
  7311. /*
  7312. * search and check whether all aux codecs are already
  7313. * registered with ALSA core or not. If found a node, store
  7314. * the node and the index in a local array of struct for later
  7315. * use.
  7316. */
  7317. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7318. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7319. "qcom,codec-aux-devs", i);
  7320. if (unlikely(!aux_codec_of_node)) {
  7321. /* we should not be here */
  7322. dev_err(&pdev->dev,
  7323. "%s: aux codec dev node is not present\n",
  7324. __func__);
  7325. ret = -EINVAL;
  7326. goto err;
  7327. }
  7328. if (soc_find_component(aux_codec_of_node, NULL)) {
  7329. /* AUX codec registered with ALSA core */
  7330. aux_cdc_dev_info[codecs_found].of_node =
  7331. aux_codec_of_node;
  7332. aux_cdc_dev_info[codecs_found].index = i;
  7333. codecs_found++;
  7334. }
  7335. }
  7336. if (codecs_found < codec_aux_dev_cnt) {
  7337. dev_dbg(&pdev->dev,
  7338. "%s: failed to find %d components. Found only %d\n",
  7339. __func__, codec_aux_dev_cnt, codecs_found);
  7340. return -EPROBE_DEFER;
  7341. }
  7342. dev_info(&pdev->dev,
  7343. "%s: found %d AUX codecs registered with ALSA core\n",
  7344. __func__, codecs_found);
  7345. }
  7346. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7347. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7348. /* Alloc array of AUX devs struct */
  7349. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7350. sizeof(struct snd_soc_aux_dev),
  7351. GFP_KERNEL);
  7352. if (!msm_aux_dev) {
  7353. ret = -ENOMEM;
  7354. goto err;
  7355. }
  7356. /* Alloc array of codec conf struct */
  7357. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7358. sizeof(struct snd_soc_codec_conf),
  7359. GFP_KERNEL);
  7360. if (!msm_codec_conf) {
  7361. ret = -ENOMEM;
  7362. goto err;
  7363. }
  7364. for (i = 0; i < wsa_max_devs; i++) {
  7365. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7366. GFP_KERNEL);
  7367. if (!dev_name_str) {
  7368. ret = -ENOMEM;
  7369. goto err;
  7370. }
  7371. ret = of_property_read_string_index(pdev->dev.of_node,
  7372. "qcom,wsa-aux-dev-prefix",
  7373. wsa881x_dev_info[i].index,
  7374. auxdev_name_prefix);
  7375. if (ret) {
  7376. dev_err(&pdev->dev,
  7377. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7378. __func__, ret);
  7379. ret = -EINVAL;
  7380. goto err;
  7381. }
  7382. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7383. msm_aux_dev[i].name = dev_name_str;
  7384. msm_aux_dev[i].codec_name = NULL;
  7385. msm_aux_dev[i].codec_of_node =
  7386. wsa881x_dev_info[i].of_node;
  7387. msm_aux_dev[i].init = msm_wsa881x_init;
  7388. msm_codec_conf[i].dev_name = NULL;
  7389. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7390. msm_codec_conf[i].of_node =
  7391. wsa881x_dev_info[i].of_node;
  7392. }
  7393. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7394. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7395. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7396. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7397. aux_cdc_dev_info[i].of_node;
  7398. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7399. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7400. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7401. NULL;
  7402. msm_codec_conf[wsa_max_devs + i].of_node =
  7403. aux_cdc_dev_info[i].of_node;
  7404. }
  7405. card->codec_conf = msm_codec_conf;
  7406. card->aux_dev = msm_aux_dev;
  7407. err:
  7408. return ret;
  7409. }
  7410. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7411. {
  7412. int count;
  7413. u32 mi2s_master_slave[MI2S_MAX];
  7414. int ret;
  7415. for (count = 0; count < MI2S_MAX; count++) {
  7416. mutex_init(&mi2s_intf_conf[count].lock);
  7417. mi2s_intf_conf[count].ref_cnt = 0;
  7418. }
  7419. ret = of_property_read_u32_array(pdev->dev.of_node,
  7420. "qcom,msm-mi2s-master",
  7421. mi2s_master_slave, MI2S_MAX);
  7422. if (ret) {
  7423. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7424. __func__);
  7425. } else {
  7426. for (count = 0; count < MI2S_MAX; count++) {
  7427. mi2s_intf_conf[count].msm_is_mi2s_master =
  7428. mi2s_master_slave[count];
  7429. }
  7430. }
  7431. }
  7432. static void msm_i2s_auxpcm_deinit(void)
  7433. {
  7434. int count;
  7435. for (count = 0; count < MI2S_MAX; count++) {
  7436. mutex_destroy(&mi2s_intf_conf[count].lock);
  7437. mi2s_intf_conf[count].ref_cnt = 0;
  7438. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7439. }
  7440. }
  7441. static int sm6150_ssr_enable(struct device *dev, void *data)
  7442. {
  7443. struct platform_device *pdev = to_platform_device(dev);
  7444. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7445. struct msm_asoc_mach_data *pdata;
  7446. int ret = 0;
  7447. if (!card) {
  7448. dev_err(dev, "%s: card is NULL\n", __func__);
  7449. ret = -EINVAL;
  7450. goto err;
  7451. }
  7452. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7453. pdata = snd_soc_card_get_drvdata(card);
  7454. if (!pdata->is_afe_config_done) {
  7455. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7456. struct snd_soc_pcm_runtime *rtd;
  7457. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7458. if (!rtd) {
  7459. dev_err(dev,
  7460. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7461. __func__, be_dl_name);
  7462. ret = -EINVAL;
  7463. goto err;
  7464. }
  7465. ret = msm_afe_set_config(rtd->codec);
  7466. if (ret)
  7467. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7468. __func__, ret);
  7469. else
  7470. pdata->is_afe_config_done = true;
  7471. }
  7472. }
  7473. snd_soc_card_change_online_state(card, 1);
  7474. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7475. err:
  7476. return ret;
  7477. }
  7478. static void sm6150_ssr_disable(struct device *dev, void *data)
  7479. {
  7480. struct platform_device *pdev = to_platform_device(dev);
  7481. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7482. struct msm_asoc_mach_data *pdata;
  7483. if (!card) {
  7484. dev_err(dev, "%s: card is NULL\n", __func__);
  7485. return;
  7486. }
  7487. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7488. snd_soc_card_change_online_state(card, 0);
  7489. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7490. pdata = snd_soc_card_get_drvdata(card);
  7491. msm_afe_clear_config();
  7492. pdata->is_afe_config_done = false;
  7493. }
  7494. }
  7495. static const struct snd_event_ops sm6150_ssr_ops = {
  7496. .enable = sm6150_ssr_enable,
  7497. .disable = sm6150_ssr_disable,
  7498. };
  7499. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7500. {
  7501. struct device_node *node = data;
  7502. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7503. __func__, dev->of_node, node);
  7504. return (dev->of_node && dev->of_node == node);
  7505. }
  7506. static int msm_audio_ssr_register(struct device *dev)
  7507. {
  7508. struct device_node *np = dev->of_node;
  7509. struct snd_event_clients *ssr_clients = NULL;
  7510. struct device_node *node;
  7511. int ret;
  7512. int i;
  7513. for (i = 0; ; i++) {
  7514. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7515. if (!node)
  7516. break;
  7517. snd_event_mstr_add_client(&ssr_clients,
  7518. msm_audio_ssr_compare, node);
  7519. }
  7520. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7521. ssr_clients, NULL);
  7522. if (!ret)
  7523. snd_event_notify(dev, SND_EVENT_UP);
  7524. return ret;
  7525. }
  7526. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7527. {
  7528. struct snd_soc_card *card;
  7529. struct msm_asoc_mach_data *pdata;
  7530. const char *mbhc_audio_jack_type = NULL;
  7531. int ret;
  7532. if (!pdev->dev.of_node) {
  7533. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7534. return -EINVAL;
  7535. }
  7536. pdata = devm_kzalloc(&pdev->dev,
  7537. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7538. if (!pdata)
  7539. return -ENOMEM;
  7540. card = populate_snd_card_dailinks(&pdev->dev);
  7541. if (!card) {
  7542. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7543. ret = -EINVAL;
  7544. goto err;
  7545. }
  7546. card->dev = &pdev->dev;
  7547. platform_set_drvdata(pdev, card);
  7548. snd_soc_card_set_drvdata(card, pdata);
  7549. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7550. if (ret) {
  7551. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7552. ret);
  7553. goto err;
  7554. }
  7555. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7556. if (ret) {
  7557. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7558. ret);
  7559. goto err;
  7560. }
  7561. ret = msm_populate_dai_link_component_of_node(card);
  7562. if (ret) {
  7563. ret = -EPROBE_DEFER;
  7564. goto err;
  7565. }
  7566. ret = msm_init_aux_dev(pdev, card);
  7567. if (ret)
  7568. goto err;
  7569. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7570. if (ret == -EPROBE_DEFER) {
  7571. if (codec_reg_done)
  7572. ret = -EINVAL;
  7573. goto err;
  7574. } else if (ret) {
  7575. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7576. ret);
  7577. goto err;
  7578. }
  7579. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7580. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7581. "qcom,hph-en1-gpio", 0);
  7582. if (!pdata->hph_en1_gpio_p) {
  7583. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7584. "qcom,hph-en1-gpio",
  7585. pdev->dev.of_node->full_name);
  7586. }
  7587. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7588. "qcom,hph-en0-gpio", 0);
  7589. if (!pdata->hph_en0_gpio_p) {
  7590. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7591. "qcom,hph-en0-gpio",
  7592. pdev->dev.of_node->full_name);
  7593. }
  7594. ret = of_property_read_string(pdev->dev.of_node,
  7595. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7596. if (ret) {
  7597. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7598. "qcom,mbhc-audio-jack-type",
  7599. pdev->dev.of_node->full_name);
  7600. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7601. } else {
  7602. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7603. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7604. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7605. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7606. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7607. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7608. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7609. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7610. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7611. } else {
  7612. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7613. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7614. }
  7615. }
  7616. /*
  7617. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7618. * entry is not found in DT file as some targets do not support
  7619. * US-Euro detection
  7620. */
  7621. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7622. "qcom,us-euro-gpios", 0);
  7623. if (!pdata->us_euro_gpio_p) {
  7624. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7625. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7626. } else {
  7627. dev_dbg(&pdev->dev, "%s detected\n",
  7628. "qcom,us-euro-gpios");
  7629. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7630. }
  7631. /* Parse pinctrl info from devicetree */
  7632. ret = msm_get_pinctrl(pdev);
  7633. if (!ret) {
  7634. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7635. } else {
  7636. dev_dbg(&pdev->dev,
  7637. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7638. __func__, ret);
  7639. ret = 0;
  7640. }
  7641. msm_i2s_auxpcm_init(pdev);
  7642. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7643. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7644. "qcom,cdc-dmic01-gpios",
  7645. 0);
  7646. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7647. "qcom,cdc-dmic23-gpios",
  7648. 0);
  7649. }
  7650. ret = msm_audio_ssr_register(&pdev->dev);
  7651. if (ret)
  7652. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7653. __func__, ret);
  7654. err:
  7655. return ret;
  7656. }
  7657. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7658. {
  7659. snd_event_master_deregister(&pdev->dev);
  7660. msm_i2s_auxpcm_deinit();
  7661. return 0;
  7662. }
  7663. static struct platform_driver sm6150_asoc_machine_driver = {
  7664. .driver = {
  7665. .name = DRV_NAME,
  7666. .owner = THIS_MODULE,
  7667. .pm = &snd_soc_pm_ops,
  7668. .of_match_table = sm6150_asoc_machine_of_match,
  7669. },
  7670. .probe = msm_asoc_machine_probe,
  7671. .remove = msm_asoc_machine_remove,
  7672. };
  7673. module_platform_driver(sm6150_asoc_machine_driver);
  7674. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7675. MODULE_LICENSE("GPL v2");
  7676. MODULE_ALIAS("platform:" DRV_NAME);
  7677. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);