dp_rx_err.c 36 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <linux/ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  49. * back on same vap or a different vap.
  50. *
  51. * @soc: core DP main context
  52. * @peer: dp peer handler
  53. * @rx_tlv_hdr: start of the rx TLV header
  54. * @nbuf: pkt buffer
  55. *
  56. * Return: bool (true if it is a looped back pkt else false)
  57. *
  58. */
  59. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  60. struct dp_peer *peer,
  61. uint8_t *rx_tlv_hdr,
  62. qdf_nbuf_t nbuf)
  63. {
  64. struct dp_vdev *vdev = peer->vdev;
  65. struct dp_ast_entry *ase;
  66. uint16_t sa_idx;
  67. uint8_t *data;
  68. /*
  69. * Multicast Echo Check is required only if vdev is STA and
  70. * received pkt is a multicast/broadcast pkt. otherwise
  71. * skip the MEC check.
  72. */
  73. if (vdev->opmode != wlan_op_mode_sta)
  74. return false;
  75. if (!hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))
  76. return false;
  77. data = qdf_nbuf_data(nbuf);
  78. /*
  79. * if the received pkts src mac addr matches with vdev
  80. * mac address then drop the pkt as it is looped back
  81. */
  82. if (!(qdf_mem_cmp(&data[DP_MAC_ADDR_LEN],
  83. vdev->mac_addr.raw,
  84. DP_MAC_ADDR_LEN)))
  85. return true;
  86. /* if the received pkts src mac addr matches with the
  87. * wired PCs MAC addr which is behind the STA or with
  88. * wireless STAs MAC addr which are behind the Repeater,
  89. * then drop the pkt as it is looped back
  90. */
  91. qdf_spin_lock_bh(&soc->ast_lock);
  92. if (hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr)) {
  93. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  94. if ((sa_idx < 0) || (sa_idx > (WLAN_UMAC_PSOC_MAX_PEERS * 2))) {
  95. qdf_spin_unlock_bh(&soc->ast_lock);
  96. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  97. "invalid sa_idx: %d", sa_idx);
  98. qdf_assert_always(0);
  99. }
  100. ase = soc->ast_table[sa_idx];
  101. } else
  102. ase = dp_peer_ast_hash_find(soc, &data[DP_MAC_ADDR_LEN], 0);
  103. if (ase) {
  104. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  105. (ase->peer != peer)) {
  106. qdf_spin_unlock_bh(&soc->ast_lock);
  107. QDF_TRACE(QDF_MODULE_ID_DP,
  108. QDF_TRACE_LEVEL_INFO,
  109. "received pkt with same src mac %pM",
  110. &data[DP_MAC_ADDR_LEN]);
  111. return true;
  112. }
  113. }
  114. qdf_spin_unlock_bh(&soc->ast_lock);
  115. return false;
  116. }
  117. /**
  118. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  119. * (WBM), following error handling
  120. *
  121. * @soc: core DP main context
  122. * @ring_desc: opaque pointer to the REO error ring descriptor
  123. *
  124. * Return: QDF_STATUS
  125. */
  126. QDF_STATUS
  127. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action)
  128. {
  129. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  130. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  131. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  132. void *hal_soc = soc->hal_soc;
  133. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  134. void *src_srng_desc;
  135. if (!wbm_rel_srng) {
  136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  137. "WBM RELEASE RING not initialized");
  138. return status;
  139. }
  140. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  141. /* TODO */
  142. /*
  143. * Need API to convert from hal_ring pointer to
  144. * Ring Type / Ring Id combo
  145. */
  146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  147. FL("HAL RING Access For WBM Release SRNG Failed - %pK"),
  148. wbm_rel_srng);
  149. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  150. goto done;
  151. }
  152. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  153. if (qdf_likely(src_srng_desc)) {
  154. /* Return link descriptor through WBM ring (SW2WBM)*/
  155. hal_rx_msdu_link_desc_set(hal_soc,
  156. src_srng_desc, buf_addr_info, bm_action);
  157. status = QDF_STATUS_SUCCESS;
  158. } else {
  159. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  161. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  162. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  163. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  164. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  165. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  166. }
  167. done:
  168. hal_srng_access_end(hal_soc, wbm_rel_srng);
  169. return status;
  170. }
  171. /**
  172. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  173. *
  174. * @soc: core txrx main context
  175. * @ring_desc: opaque pointer to the REO error ring descriptor
  176. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  177. * @head: head of the local descriptor free-list
  178. * @tail: tail of the local descriptor free-list
  179. * @quota: No. of units (packets) that can be serviced in one shot.
  180. *
  181. * This function is used to drop all MSDU in an MPDU
  182. *
  183. * Return: uint32_t: No. of elements processed
  184. */
  185. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  186. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  187. union dp_rx_desc_list_elem_t **head,
  188. union dp_rx_desc_list_elem_t **tail,
  189. uint32_t quota)
  190. {
  191. uint32_t rx_bufs_used = 0;
  192. void *link_desc_va;
  193. struct hal_buf_info buf_info;
  194. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  195. int i;
  196. uint8_t *rx_tlv_hdr;
  197. uint32_t tid;
  198. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  199. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  200. /* No UNMAP required -- this is "malloc_consistent" memory */
  201. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  202. &mpdu_desc_info->msdu_count);
  203. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  204. struct dp_rx_desc *rx_desc =
  205. dp_rx_cookie_2_va_rxdma_buf(soc,
  206. msdu_list.sw_cookie[i]);
  207. qdf_assert(rx_desc);
  208. if (!dp_rx_desc_check_magic(rx_desc)) {
  209. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  210. FL("Invalid rx_desc cookie=%d"),
  211. msdu_list.sw_cookie[i]);
  212. return rx_bufs_used;
  213. }
  214. rx_bufs_used++;
  215. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  216. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  217. "Packet received with PN error for tid :%d", tid);
  218. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  219. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  220. hal_rx_print_pn(rx_tlv_hdr);
  221. /* Just free the buffers */
  222. qdf_nbuf_free(rx_desc->nbuf);
  223. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  224. }
  225. /* Return link descriptor through WBM ring (SW2WBM)*/
  226. dp_rx_link_desc_return(soc, ring_desc, HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  227. return rx_bufs_used;
  228. }
  229. /**
  230. * dp_rx_pn_error_handle() - Handles PN check errors
  231. *
  232. * @soc: core txrx main context
  233. * @ring_desc: opaque pointer to the REO error ring descriptor
  234. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  235. * @head: head of the local descriptor free-list
  236. * @tail: tail of the local descriptor free-list
  237. * @quota: No. of units (packets) that can be serviced in one shot.
  238. *
  239. * This function implements PN error handling
  240. * If the peer is configured to ignore the PN check errors
  241. * or if DP feels, that this frame is still OK, the frame can be
  242. * re-injected back to REO to use some of the other features
  243. * of REO e.g. duplicate detection/routing to other cores
  244. *
  245. * Return: uint32_t: No. of elements processed
  246. */
  247. static uint32_t
  248. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  249. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  250. union dp_rx_desc_list_elem_t **head,
  251. union dp_rx_desc_list_elem_t **tail,
  252. uint32_t quota)
  253. {
  254. uint16_t peer_id;
  255. uint32_t rx_bufs_used = 0;
  256. struct dp_peer *peer;
  257. bool peer_pn_policy = false;
  258. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  259. mpdu_desc_info->peer_meta_data);
  260. peer = dp_peer_find_by_id(soc, peer_id);
  261. if (qdf_likely(peer)) {
  262. /*
  263. * TODO: Check for peer specific policies & set peer_pn_policy
  264. */
  265. }
  266. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  267. "Packet received with PN error");
  268. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  269. "discard rx due to PN error for peer %pK "
  270. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  271. peer,
  272. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  273. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  274. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  275. /* No peer PN policy -- definitely drop */
  276. if (!peer_pn_policy)
  277. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  278. mpdu_desc_info,
  279. head, tail, quota);
  280. return rx_bufs_used;
  281. }
  282. /**
  283. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  284. *
  285. * @soc: core txrx main context
  286. * @ring_desc: opaque pointer to the REO error ring descriptor
  287. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  288. * @head: head of the local descriptor free-list
  289. * @tail: tail of the local descriptor free-list
  290. * @quota: No. of units (packets) that can be serviced in one shot.
  291. *
  292. * This function implements the error handling when sequence number
  293. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  294. * need to be handled:
  295. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  296. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  297. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  298. * For case B), the frame is normally dropped, no more action is taken
  299. *
  300. * Return: uint32_t: No. of elements processed
  301. */
  302. static uint32_t
  303. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  304. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  305. union dp_rx_desc_list_elem_t **head,
  306. union dp_rx_desc_list_elem_t **tail,
  307. uint32_t quota)
  308. {
  309. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  310. head, tail, quota);
  311. }
  312. static bool
  313. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  314. uint8_t mac_id)
  315. {
  316. bool mpdu_done = false;
  317. qdf_nbuf_t curr_nbuf, next_nbuf;
  318. /* TODO: Currently only single radio is supported, hence
  319. * pdev hard coded to '0' index
  320. */
  321. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  322. if (hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr)) {
  323. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  324. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  325. while (curr_nbuf) {
  326. next_nbuf = qdf_nbuf_next(curr_nbuf);
  327. qdf_nbuf_free(curr_nbuf);
  328. curr_nbuf = next_nbuf;
  329. }
  330. dp_pdev->invalid_peer_head_msdu = NULL;
  331. dp_pdev->invalid_peer_tail_msdu = NULL;
  332. hal_rx_mon_hw_desc_get_mpdu_status(rx_tlv_hdr,
  333. &(dp_pdev->ppdu_info.rx_status));
  334. }
  335. if (hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr)) {
  336. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  337. mpdu_done = true;
  338. }
  339. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  340. dp_pdev->invalid_peer_tail_msdu,
  341. nbuf);
  342. return mpdu_done;
  343. }
  344. /**
  345. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  346. * descriptor violation on either a
  347. * REO or WBM ring
  348. *
  349. * @soc: core DP main context
  350. * @rx_desc : pointer to the sw rx descriptor
  351. * @head: pointer to head of rx descriptors to be added to free list
  352. * @tail: pointer to tail of rx descriptors to be added to free list
  353. * quota: upper limit of descriptors that can be reaped
  354. *
  355. * This function handles NULL queue descriptor violations arising out
  356. * a missing REO queue for a given peer or a given TID. This typically
  357. * may happen if a packet is received on a QOS enabled TID before the
  358. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  359. * it may also happen for MC/BC frames if they are not routed to the
  360. * non-QOS TID queue, in the absence of any other default TID queue.
  361. * This error can show up both in a REO destination or WBM release ring.
  362. *
  363. * Return: uint32_t: No. of Rx buffers reaped
  364. */
  365. static void
  366. dp_rx_null_q_desc_handle(struct dp_soc *soc,
  367. qdf_nbuf_t nbuf,
  368. uint8_t *rx_tlv_hdr,
  369. uint8_t pool_id)
  370. {
  371. uint32_t pkt_len, l2_hdr_offset;
  372. uint16_t msdu_len;
  373. struct dp_vdev *vdev;
  374. uint16_t peer_id = 0xFFFF;
  375. struct dp_peer *peer = NULL;
  376. uint8_t tid;
  377. qdf_nbuf_set_rx_chfrag_start(nbuf,
  378. hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr));
  379. qdf_nbuf_set_rx_chfrag_end(nbuf,
  380. hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr));
  381. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  382. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  383. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  384. /* Set length in nbuf */
  385. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  386. /*
  387. * Check if DMA completed -- msdu_done is the last bit
  388. * to be written
  389. */
  390. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  391. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  392. FL("MSDU DONE failure"));
  393. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  394. qdf_assert(0);
  395. }
  396. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  397. peer = dp_peer_find_by_id(soc, peer_id);
  398. if (!peer) {
  399. bool mpdu_done = false;
  400. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  401. FL("peer is NULL"));
  402. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  403. /* Trigger invalid peer handler wrapper */
  404. dp_rx_process_invalid_peer_wrapper(soc, nbuf, mpdu_done);
  405. return;
  406. }
  407. vdev = peer->vdev;
  408. if (!vdev) {
  409. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  410. FL("INVALID vdev %pK OR osif_rx"), vdev);
  411. /* Drop & free packet */
  412. qdf_nbuf_free(nbuf);
  413. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  414. return;
  415. }
  416. /*
  417. * Advance the packet start pointer by total size of
  418. * pre-header TLV's
  419. */
  420. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  421. if (dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf)) {
  422. /* this is a looped back MCBC pkt, drop it */
  423. qdf_nbuf_free(nbuf);
  424. return;
  425. }
  426. /*
  427. * In qwrap mode if the received packet matches with any of the vdev
  428. * mac addresses, drop it. Donot receive multicast packets originated
  429. * from any proxysta.
  430. */
  431. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  432. qdf_nbuf_free(nbuf);
  433. return;
  434. }
  435. if (qdf_unlikely((peer->nawds_enabled == true) &&
  436. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  437. QDF_TRACE(QDF_MODULE_ID_DP,
  438. QDF_TRACE_LEVEL_DEBUG,
  439. "%s free buffer for multicast packet",
  440. __func__);
  441. DP_STATS_INC_PKT(peer, rx.nawds_mcast_drop,
  442. 1, qdf_nbuf_len(nbuf));
  443. qdf_nbuf_free(nbuf);
  444. return;
  445. }
  446. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  447. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  448. QDF_TRACE(QDF_MODULE_ID_DP,
  449. QDF_TRACE_LEVEL_ERROR,
  450. FL("mcast Policy Check Drop pkt"));
  451. /* Drop & free packet */
  452. qdf_nbuf_free(nbuf);
  453. return;
  454. }
  455. /* WDS Source Port Learning */
  456. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))
  457. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
  458. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(rx_tlv_hdr)) {
  459. /* TODO: Assuming that qos_control_valid also indicates
  460. * unicast. Should we check this?
  461. */
  462. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  463. if (peer &&
  464. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  465. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  466. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  467. }
  468. }
  469. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  470. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  471. "%s: p_id %d msdu_len %d hdr_off %d",
  472. __func__, peer_id, msdu_len, l2_hdr_offset);
  473. print_hex_dump(KERN_ERR, "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  474. qdf_nbuf_data(nbuf), 128, false);
  475. #endif /* NAPIER_EMULATION */
  476. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  477. qdf_nbuf_set_next(nbuf, NULL);
  478. dp_rx_deliver_raw(vdev, nbuf, peer);
  479. } else {
  480. if (qdf_unlikely(peer->bss_peer)) {
  481. QDF_TRACE(QDF_MODULE_ID_DP,
  482. QDF_TRACE_LEVEL_INFO,
  483. FL("received pkt with same src MAC"));
  484. /* Drop & free packet */
  485. qdf_nbuf_free(nbuf);
  486. return;
  487. }
  488. if (vdev->osif_rx) {
  489. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  490. FL("vdev %pK osif_rx %pK"), vdev,
  491. vdev->osif_rx);
  492. qdf_nbuf_set_next(nbuf, NULL);
  493. vdev->osif_rx(vdev->osif_vdev, nbuf);
  494. DP_STATS_INCC_PKT(vdev->pdev, rx.multicast, 1,
  495. qdf_nbuf_len(nbuf),
  496. hal_rx_msdu_end_da_is_mcbc_get(
  497. rx_tlv_hdr));
  498. DP_STATS_INC_PKT(vdev->pdev, rx.to_stack, 1,
  499. qdf_nbuf_len(nbuf));
  500. } else {
  501. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  502. FL("INVALID vdev %pK OR osif_rx"), vdev);
  503. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  504. }
  505. }
  506. return;
  507. }
  508. /**
  509. * dp_rx_err_deliver() - Function to deliver error frames to OS
  510. *
  511. * @soc: core DP main context
  512. * @rx_desc : pointer to the sw rx descriptor
  513. * @head: pointer to head of rx descriptors to be added to free list
  514. * @tail: pointer to tail of rx descriptors to be added to free list
  515. * quota: upper limit of descriptors that can be reaped
  516. *
  517. * Return: uint32_t: No. of Rx buffers reaped
  518. */
  519. static void
  520. dp_rx_err_deliver(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  521. {
  522. uint32_t pkt_len, l2_hdr_offset;
  523. uint16_t msdu_len;
  524. struct dp_vdev *vdev;
  525. uint16_t peer_id = 0xFFFF;
  526. struct dp_peer *peer = NULL;
  527. /*
  528. * Check if DMA completed -- msdu_done is the last bit
  529. * to be written
  530. */
  531. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  532. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  533. FL("MSDU DONE failure"));
  534. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  535. qdf_assert(0);
  536. }
  537. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  538. peer = dp_peer_find_by_id(soc, peer_id);
  539. if (!peer) {
  540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  541. FL("peer is NULL"));
  542. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  543. qdf_nbuf_len(nbuf));
  544. /* Drop & free packet */
  545. qdf_nbuf_free(nbuf);
  546. return;
  547. }
  548. vdev = peer->vdev;
  549. if (!vdev) {
  550. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  551. FL("INVALID vdev %pK OR osif_rx"), vdev);
  552. /* Drop & free packet */
  553. qdf_nbuf_free(nbuf);
  554. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  555. return;
  556. }
  557. /* Drop & free packet if mesh mode not enabled */
  558. if (!vdev->mesh_vdev) {
  559. qdf_nbuf_free(nbuf);
  560. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  561. return;
  562. }
  563. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  564. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  565. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  566. /* Set length in nbuf */
  567. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  568. qdf_nbuf_set_next(nbuf, NULL);
  569. /*
  570. * Advance the packet start pointer by total size of
  571. * pre-header TLV's
  572. */
  573. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  574. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  575. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  576. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  577. == QDF_STATUS_SUCCESS) {
  578. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_MED,
  579. FL("mesh pkt filtered"));
  580. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  581. qdf_nbuf_free(nbuf);
  582. return;
  583. }
  584. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  585. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  586. dp_rx_deliver_raw(vdev, nbuf, peer);
  587. } else {
  588. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  589. vdev->osif_rx(vdev->osif_vdev, nbuf);
  590. }
  591. return;
  592. }
  593. /**
  594. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  595. * @soc: DP SOC handle
  596. * @rx_desc : pointer to the sw rx descriptor
  597. * @head: pointer to head of rx descriptors to be added to free list
  598. * @tail: pointer to tail of rx descriptors to be added to free list
  599. *
  600. * return: void
  601. */
  602. void
  603. dp_rx_process_mic_error(struct dp_soc *soc,
  604. qdf_nbuf_t nbuf,
  605. uint8_t *rx_tlv_hdr)
  606. {
  607. struct dp_vdev *vdev = NULL;
  608. struct dp_pdev *pdev = NULL;
  609. struct ol_if_ops *tops = NULL;
  610. struct ieee80211_frame *wh;
  611. uint8_t *rx_pkt_hdr;
  612. struct dp_peer *peer;
  613. uint16_t peer_id;
  614. if (!hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr))
  615. return;
  616. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(nbuf));
  617. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  618. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  619. peer = dp_peer_find_by_id(soc, peer_id);
  620. if (!peer) {
  621. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  622. "peer not found");
  623. goto fail;
  624. }
  625. vdev = peer->vdev;
  626. if (!vdev) {
  627. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  628. "VDEV not found");
  629. goto fail;
  630. }
  631. pdev = vdev->pdev;
  632. if (!pdev) {
  633. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  634. "PDEV not found");
  635. goto fail;
  636. }
  637. tops = pdev->soc->cdp_soc.ol_ops;
  638. if (tops->rx_mic_error)
  639. tops->rx_mic_error(pdev->osif_pdev, vdev->vdev_id, wh);
  640. fail:
  641. qdf_nbuf_free(nbuf);
  642. return;
  643. }
  644. /**
  645. * dp_rx_err_process() - Processes error frames routed to REO error ring
  646. *
  647. * @soc: core txrx main context
  648. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  649. * @quota: No. of units (packets) that can be serviced in one shot.
  650. *
  651. * This function implements error processing and top level demultiplexer
  652. * for all the frames routed to REO error ring.
  653. *
  654. * Return: uint32_t: No. of elements processed
  655. */
  656. uint32_t
  657. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  658. {
  659. void *hal_soc;
  660. void *ring_desc;
  661. union dp_rx_desc_list_elem_t *head = NULL;
  662. union dp_rx_desc_list_elem_t *tail = NULL;
  663. uint32_t rx_bufs_used = 0;
  664. uint8_t buf_type;
  665. uint8_t error, rbm;
  666. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  667. struct hal_buf_info hbi;
  668. struct dp_pdev *dp_pdev;
  669. struct dp_srng *dp_rxdma_srng;
  670. struct rx_desc_pool *rx_desc_pool;
  671. uint32_t cookie = 0;
  672. void *link_desc_va;
  673. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  674. uint16_t num_msdus;
  675. /* Debug -- Remove later */
  676. qdf_assert(soc && hal_ring);
  677. hal_soc = soc->hal_soc;
  678. /* Debug -- Remove later */
  679. qdf_assert(hal_soc);
  680. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  681. /* TODO */
  682. /*
  683. * Need API to convert from hal_ring pointer to
  684. * Ring Type / Ring Id combo
  685. */
  686. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  687. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  688. FL("HAL RING Access Failed -- %pK"), hal_ring);
  689. goto done;
  690. }
  691. while (qdf_likely(quota-- && (ring_desc =
  692. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  693. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  694. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  695. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  696. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  697. /*
  698. * For REO error ring, expect only MSDU LINK DESC
  699. */
  700. qdf_assert_always(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  701. cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  702. /*
  703. * check for the magic number in the sw cookie
  704. */
  705. qdf_assert_always((cookie >> LINK_DESC_ID_SHIFT) &
  706. LINK_DESC_ID_START);
  707. /*
  708. * Check if the buffer is to be processed on this processor
  709. */
  710. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  711. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  712. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  713. hal_rx_msdu_list_get(link_desc_va, &msdu_list, &num_msdus);
  714. if (qdf_unlikely((msdu_list.rbm[0] !=
  715. HAL_RX_BUF_RBM_SW3_BM) &&
  716. (msdu_list.rbm[0] !=
  717. HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST))) {
  718. /* TODO */
  719. /* Call appropriate handler */
  720. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  721. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  722. FL("Invalid RBM %d"), rbm);
  723. /* Return link descriptor through WBM ring (SW2WBM)*/
  724. dp_rx_link_desc_return(soc, ring_desc,
  725. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  726. continue;
  727. }
  728. /* Get the MPDU DESC info */
  729. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  730. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  731. /* TODO */
  732. rx_bufs_used += dp_rx_frag_handle(soc,
  733. ring_desc, &mpdu_desc_info,
  734. &head, &tail, quota);
  735. DP_STATS_INC(soc, rx.rx_frags, 1);
  736. continue;
  737. }
  738. if (hal_rx_reo_is_pn_error(ring_desc)) {
  739. /* TOD0 */
  740. DP_STATS_INC(soc,
  741. rx.err.
  742. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  743. 1);
  744. rx_bufs_used += dp_rx_pn_error_handle(soc,
  745. ring_desc, &mpdu_desc_info,
  746. &head, &tail, quota);
  747. continue;
  748. }
  749. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  750. /* TOD0 */
  751. DP_STATS_INC(soc,
  752. rx.err.
  753. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  754. 1);
  755. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  756. ring_desc, &mpdu_desc_info,
  757. &head, &tail, quota);
  758. continue;
  759. }
  760. }
  761. done:
  762. hal_srng_access_end(hal_soc, hal_ring);
  763. if (soc->rx.flags.defrag_timeout_check)
  764. dp_rx_defrag_waitlist_flush(soc);
  765. /* Assume MAC id = 0, owner = 0 */
  766. if (rx_bufs_used) {
  767. dp_pdev = soc->pdev_list[0];
  768. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  769. rx_desc_pool = &soc->rx_desc_buf[0];
  770. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  771. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  772. }
  773. return rx_bufs_used; /* Assume no scale factor for now */
  774. }
  775. /**
  776. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  777. *
  778. * @soc: core txrx main context
  779. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  780. * @quota: No. of units (packets) that can be serviced in one shot.
  781. *
  782. * This function implements error processing and top level demultiplexer
  783. * for all the frames routed to WBM2HOST sw release ring.
  784. *
  785. * Return: uint32_t: No. of elements processed
  786. */
  787. uint32_t
  788. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  789. {
  790. void *hal_soc;
  791. void *ring_desc;
  792. struct dp_rx_desc *rx_desc;
  793. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  794. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  795. uint32_t rx_bufs_used = 0;
  796. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  797. uint8_t buf_type, rbm;
  798. uint32_t rx_buf_cookie;
  799. uint8_t mac_id;
  800. struct dp_pdev *dp_pdev;
  801. struct dp_srng *dp_rxdma_srng;
  802. struct rx_desc_pool *rx_desc_pool;
  803. uint8_t *rx_tlv_hdr;
  804. qdf_nbuf_t nbuf_head = NULL;
  805. qdf_nbuf_t nbuf_tail = NULL;
  806. qdf_nbuf_t nbuf, next;
  807. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  808. uint8_t pool_id;
  809. /* Debug -- Remove later */
  810. qdf_assert(soc && hal_ring);
  811. hal_soc = soc->hal_soc;
  812. /* Debug -- Remove later */
  813. qdf_assert(hal_soc);
  814. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  815. /* TODO */
  816. /*
  817. * Need API to convert from hal_ring pointer to
  818. * Ring Type / Ring Id combo
  819. */
  820. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  821. FL("HAL RING Access Failed -- %pK"), hal_ring);
  822. goto done;
  823. }
  824. while (qdf_likely(quota-- && (ring_desc =
  825. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  826. /* XXX */
  827. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  828. /*
  829. * For WBM ring, expect only MSDU buffers
  830. */
  831. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  832. qdf_assert((HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  833. == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  834. (HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  835. == HAL_RX_WBM_ERR_SRC_REO));
  836. /*
  837. * Check if the buffer is to be processed on this processor
  838. */
  839. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  840. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  841. /* TODO */
  842. /* Call appropriate handler */
  843. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  844. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  845. FL("Invalid RBM %d"), rbm);
  846. continue;
  847. }
  848. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  849. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  850. qdf_assert(rx_desc);
  851. if (!dp_rx_desc_check_magic(rx_desc)) {
  852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  853. FL("Invalid rx_desc cookie=%d"),
  854. rx_buf_cookie);
  855. continue;
  856. }
  857. nbuf = rx_desc->nbuf;
  858. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_BIDIRECTIONAL);
  859. /*
  860. * save the wbm desc info in nbuf TLV. We will need this
  861. * info when we do the actual nbuf processing
  862. */
  863. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info);
  864. wbm_err_info.pool_id = rx_desc->pool_id;
  865. hal_rx_wbm_err_info_set_in_tlv(qdf_nbuf_data(nbuf),
  866. &wbm_err_info);
  867. rx_bufs_reaped[rx_desc->pool_id]++;
  868. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  869. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  870. &tail[rx_desc->pool_id],
  871. rx_desc);
  872. }
  873. done:
  874. hal_srng_access_end(hal_soc, hal_ring);
  875. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  876. if (rx_bufs_reaped[mac_id]) {
  877. dp_pdev = soc->pdev_list[mac_id];
  878. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  879. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  880. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  881. rx_desc_pool, rx_bufs_reaped[mac_id],
  882. &head[mac_id], &tail[mac_id],
  883. HAL_RX_BUF_RBM_SW3_BM);
  884. rx_bufs_used += rx_bufs_reaped[mac_id];
  885. }
  886. }
  887. nbuf = nbuf_head;
  888. while (nbuf) {
  889. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  890. /*
  891. * retrieve the wbm desc info from nbuf TLV, so we can
  892. * handle error cases appropriately
  893. */
  894. hal_rx_wbm_err_info_get_from_tlv(rx_tlv_hdr, &wbm_err_info);
  895. next = nbuf->next;
  896. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  897. if (wbm_err_info.reo_psh_rsn
  898. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  899. DP_STATS_INC(soc,
  900. rx.err.reo_error
  901. [wbm_err_info.reo_err_code], 1);
  902. switch (wbm_err_info.reo_err_code) {
  903. /*
  904. * Handling for packets which have NULL REO
  905. * queue descriptor
  906. */
  907. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  908. pool_id = wbm_err_info.pool_id;
  909. QDF_TRACE(QDF_MODULE_ID_DP,
  910. QDF_TRACE_LEVEL_WARN,
  911. "Got pkt with REO ERROR: %d",
  912. wbm_err_info.reo_err_code);
  913. dp_rx_null_q_desc_handle(soc,
  914. nbuf,
  915. rx_tlv_hdr,
  916. pool_id);
  917. nbuf = next;
  918. continue;
  919. /* TODO */
  920. /* Add per error code accounting */
  921. default:
  922. QDF_TRACE(QDF_MODULE_ID_DP,
  923. QDF_TRACE_LEVEL_DEBUG,
  924. "REO error %d detected",
  925. wbm_err_info.reo_err_code);
  926. }
  927. }
  928. } else if (wbm_err_info.wbm_err_src ==
  929. HAL_RX_WBM_ERR_SRC_RXDMA) {
  930. if (wbm_err_info.rxdma_psh_rsn
  931. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  932. struct dp_peer *peer = NULL;
  933. uint16_t peer_id = 0xFFFF;
  934. DP_STATS_INC(soc,
  935. rx.err.rxdma_error
  936. [wbm_err_info.rxdma_err_code], 1);
  937. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  938. peer = dp_peer_find_by_id(soc, peer_id);
  939. switch (wbm_err_info.rxdma_err_code) {
  940. case HAL_RXDMA_ERR_UNENCRYPTED:
  941. dp_rx_err_deliver(soc,
  942. nbuf,
  943. rx_tlv_hdr);
  944. nbuf = next;
  945. continue;
  946. case HAL_RXDMA_ERR_TKIP_MIC:
  947. dp_rx_process_mic_error(soc,
  948. nbuf,
  949. rx_tlv_hdr);
  950. nbuf = next;
  951. if (peer)
  952. DP_STATS_INC(peer, rx.err.mic_err, 1);
  953. continue;
  954. case HAL_RXDMA_ERR_DECRYPT:
  955. if (peer)
  956. DP_STATS_INC(peer, rx.err.decrypt_err, 1);
  957. QDF_TRACE(QDF_MODULE_ID_DP,
  958. QDF_TRACE_LEVEL_DEBUG,
  959. "Packet received with Decrypt error");
  960. break;
  961. default:
  962. QDF_TRACE(QDF_MODULE_ID_DP,
  963. QDF_TRACE_LEVEL_DEBUG,
  964. "RXDMA error %d",
  965. wbm_err_info.
  966. rxdma_err_code);
  967. }
  968. }
  969. } else {
  970. /* Should not come here */
  971. qdf_assert(0);
  972. }
  973. qdf_nbuf_free(nbuf);
  974. nbuf = next;
  975. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_DEBUG);
  976. }
  977. return rx_bufs_used; /* Assume no scale factor for now */
  978. }
  979. /**
  980. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  981. *
  982. * @soc: core DP main context
  983. * @mac_id: mac id which is one of 3 mac_ids
  984. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  985. * @head: head of descs list to be freed
  986. * @tail: tail of decs list to be freed
  987. * Return: number of msdu in MPDU to be popped
  988. */
  989. static inline uint32_t
  990. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  991. void *rxdma_dst_ring_desc,
  992. union dp_rx_desc_list_elem_t **head,
  993. union dp_rx_desc_list_elem_t **tail)
  994. {
  995. void *rx_msdu_link_desc;
  996. qdf_nbuf_t msdu;
  997. qdf_nbuf_t last;
  998. struct hal_rx_msdu_list msdu_list;
  999. uint16_t num_msdus;
  1000. struct hal_buf_info buf_info;
  1001. void *p_buf_addr_info;
  1002. void *p_last_buf_addr_info;
  1003. uint32_t rx_bufs_used = 0;
  1004. uint32_t msdu_cnt;
  1005. uint32_t i;
  1006. uint8_t push_reason;
  1007. uint8_t rxdma_error_code = 0;
  1008. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  1009. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  1010. msdu = 0;
  1011. last = NULL;
  1012. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  1013. &p_last_buf_addr_info, &msdu_cnt);
  1014. push_reason =
  1015. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  1016. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  1017. rxdma_error_code =
  1018. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  1019. }
  1020. do {
  1021. rx_msdu_link_desc =
  1022. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1023. qdf_assert(rx_msdu_link_desc);
  1024. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  1025. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  1026. /* if the msdus belongs to NSS offloaded radio &&
  1027. * the rbm is not SW3_BM then return the msdu_link
  1028. * descriptor without freeing the msdus (nbufs). let
  1029. * these buffers be given to NSS completion ring for
  1030. * NSS to free them.
  1031. * else iterate through the msdu link desc list and
  1032. * free each msdu in the list.
  1033. */
  1034. if (msdu_list.rbm[0] != HAL_RX_BUF_RBM_SW3_BM &&
  1035. wlan_cfg_get_dp_pdev_nss_enabled(
  1036. pdev->wlan_cfg_ctx))
  1037. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  1038. else {
  1039. for (i = 0; i < num_msdus; i++) {
  1040. struct dp_rx_desc *rx_desc =
  1041. dp_rx_cookie_2_va_rxdma_buf(soc,
  1042. msdu_list.sw_cookie[i]);
  1043. qdf_assert(rx_desc);
  1044. msdu = rx_desc->nbuf;
  1045. qdf_nbuf_unmap_single(soc->osdev, msdu,
  1046. QDF_DMA_FROM_DEVICE);
  1047. QDF_TRACE(QDF_MODULE_ID_DP,
  1048. QDF_TRACE_LEVEL_DEBUG,
  1049. "[%s][%d] msdu_nbuf=%pK \n",
  1050. __func__, __LINE__, msdu);
  1051. qdf_nbuf_free(msdu);
  1052. rx_bufs_used++;
  1053. dp_rx_add_to_free_desc_list(head,
  1054. tail, rx_desc);
  1055. }
  1056. }
  1057. } else {
  1058. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  1059. }
  1060. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  1061. &p_buf_addr_info);
  1062. dp_rx_link_desc_return(soc, p_last_buf_addr_info, bm_action);
  1063. p_last_buf_addr_info = p_buf_addr_info;
  1064. } while (buf_info.paddr);
  1065. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  1066. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  1067. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1068. "Packet received with Decrypt error");
  1069. }
  1070. return rx_bufs_used;
  1071. }
  1072. /**
  1073. * dp_rxdma_err_process() - RxDMA error processing functionality
  1074. *
  1075. * @soc: core txrx main contex
  1076. * @mac_id: mac id which is one of 3 mac_ids
  1077. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1078. * @quota: No. of units (packets) that can be serviced in one shot.
  1079. * Return: num of buffers processed
  1080. */
  1081. uint32_t
  1082. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  1083. {
  1084. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1085. int ring_idx = dp_get_ring_id_for_mac_id(soc, mac_id);
  1086. uint8_t pdev_id;
  1087. void *hal_soc;
  1088. void *rxdma_dst_ring_desc;
  1089. void *err_dst_srng;
  1090. union dp_rx_desc_list_elem_t *head = NULL;
  1091. union dp_rx_desc_list_elem_t *tail = NULL;
  1092. struct dp_srng *dp_rxdma_srng;
  1093. struct rx_desc_pool *rx_desc_pool;
  1094. uint32_t work_done = 0;
  1095. uint32_t rx_bufs_used = 0;
  1096. #ifdef DP_INTR_POLL_BASED
  1097. if (!pdev)
  1098. return 0;
  1099. #endif
  1100. pdev_id = pdev->pdev_id;
  1101. err_dst_srng = pdev->rxdma_err_dst_ring[ring_idx].hal_srng;
  1102. if (!err_dst_srng) {
  1103. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1104. "%s %d : HAL Monitor Destination Ring Init \
  1105. Failed -- %pK\n",
  1106. __func__, __LINE__, err_dst_srng);
  1107. return 0;
  1108. }
  1109. hal_soc = soc->hal_soc;
  1110. qdf_assert(hal_soc);
  1111. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  1112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1113. "%s %d : HAL Monitor Destination Ring Init \
  1114. Failed -- %pK\n",
  1115. __func__, __LINE__, err_dst_srng);
  1116. return 0;
  1117. }
  1118. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  1119. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  1120. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  1121. rxdma_dst_ring_desc,
  1122. &head, &tail);
  1123. }
  1124. hal_srng_access_end(hal_soc, err_dst_srng);
  1125. if (rx_bufs_used) {
  1126. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1127. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1128. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng,
  1129. rx_desc_pool, rx_bufs_used, &head, &tail,
  1130. HAL_RX_BUF_RBM_SW3_BM);
  1131. work_done += rx_bufs_used;
  1132. }
  1133. return work_done;
  1134. }