dp_main.c 182 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include <qdf_util.h>
  38. #include "dp_peer.h"
  39. #include "dp_rx_mon.h"
  40. #include "htt_stats.h"
  41. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  42. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  43. #include "cdp_txrx_flow_ctrl_v2.h"
  44. #else
  45. static inline void
  46. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  47. {
  48. return;
  49. }
  50. #endif
  51. #include "dp_ipa.h"
  52. #ifdef CONFIG_MCL
  53. static void dp_service_mon_rings(void *arg);
  54. #ifndef REMOVE_PKT_LOG
  55. #include <pktlog_ac_api.h>
  56. #include <pktlog_ac.h>
  57. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  58. #endif
  59. #endif
  60. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  61. #define DP_INTR_POLL_TIMER_MS 10
  62. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  63. #define DP_MCS_LENGTH (6*MAX_MCS)
  64. #define DP_NSS_LENGTH (6*SS_COUNT)
  65. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  66. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  67. #define DP_MAX_MCS_STRING_LEN 30
  68. #define DP_CURR_FW_STATS_AVAIL 19
  69. #define DP_HTT_DBG_EXT_STATS_MAX 256
  70. #ifdef IPA_OFFLOAD
  71. /* Exclude IPA rings from the interrupt context */
  72. #define TX_RING_MASK_VAL 0xb
  73. #define RX_RING_MASK_VAL 0x7
  74. #else
  75. #define TX_RING_MASK_VAL 0xF
  76. #define RX_RING_MASK_VAL 0xF
  77. #endif
  78. bool rx_hash = 1;
  79. qdf_declare_param(rx_hash, bool);
  80. #define STR_MAXLEN 64
  81. #define DP_PPDU_STATS_CFG_ALL 0xffff
  82. /**
  83. * default_dscp_tid_map - Default DSCP-TID mapping
  84. *
  85. * DSCP TID AC
  86. * 000000 0 WME_AC_BE
  87. * 001000 1 WME_AC_BK
  88. * 010000 1 WME_AC_BK
  89. * 011000 0 WME_AC_BE
  90. * 100000 5 WME_AC_VI
  91. * 101000 5 WME_AC_VI
  92. * 110000 6 WME_AC_VO
  93. * 111000 6 WME_AC_VO
  94. */
  95. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  96. 0, 0, 0, 0, 0, 0, 0, 0,
  97. 1, 1, 1, 1, 1, 1, 1, 1,
  98. 1, 1, 1, 1, 1, 1, 1, 1,
  99. 0, 0, 0, 0, 0, 0, 0, 0,
  100. 5, 5, 5, 5, 5, 5, 5, 5,
  101. 5, 5, 5, 5, 5, 5, 5, 5,
  102. 6, 6, 6, 6, 6, 6, 6, 6,
  103. 6, 6, 6, 6, 6, 6, 6, 6,
  104. };
  105. /*
  106. * struct dp_rate_debug
  107. *
  108. * @mcs_type: print string for a given mcs
  109. * @valid: valid mcs rate?
  110. */
  111. struct dp_rate_debug {
  112. char mcs_type[DP_MAX_MCS_STRING_LEN];
  113. uint8_t valid;
  114. };
  115. #define MCS_VALID 1
  116. #define MCS_INVALID 0
  117. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  118. {
  119. {"OFDM 48 Mbps", MCS_VALID},
  120. {"OFDM 24 Mbps", MCS_VALID},
  121. {"OFDM 12 Mbps", MCS_VALID},
  122. {"OFDM 6 Mbps ", MCS_VALID},
  123. {"OFDM 54 Mbps", MCS_VALID},
  124. {"OFDM 36 Mbps", MCS_VALID},
  125. {"OFDM 18 Mbps", MCS_VALID},
  126. {"OFDM 9 Mbps ", MCS_VALID},
  127. {"INVALID ", MCS_INVALID},
  128. {"INVALID ", MCS_INVALID},
  129. {"INVALID ", MCS_INVALID},
  130. {"INVALID ", MCS_INVALID},
  131. {"INVALID ", MCS_VALID},
  132. },
  133. {
  134. {"CCK 11 Mbps Long ", MCS_VALID},
  135. {"CCK 5.5 Mbps Long ", MCS_VALID},
  136. {"CCK 2 Mbps Long ", MCS_VALID},
  137. {"CCK 1 Mbps Long ", MCS_VALID},
  138. {"CCK 11 Mbps Short ", MCS_VALID},
  139. {"CCK 5.5 Mbps Short", MCS_VALID},
  140. {"CCK 2 Mbps Short ", MCS_VALID},
  141. {"INVALID ", MCS_INVALID},
  142. {"INVALID ", MCS_INVALID},
  143. {"INVALID ", MCS_INVALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_VALID},
  147. },
  148. {
  149. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  150. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  151. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  152. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  153. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  154. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  155. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  156. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  157. {"INVALID ", MCS_INVALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_VALID},
  162. },
  163. {
  164. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  165. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  166. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  167. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  168. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  169. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  170. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  171. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  172. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  173. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  174. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  175. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  176. {"INVALID ", MCS_VALID},
  177. },
  178. {
  179. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  180. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  181. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  182. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  183. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  184. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  185. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  186. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  187. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  188. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  189. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  190. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  191. {"INVALID ", MCS_VALID},
  192. }
  193. };
  194. /**
  195. * @brief Cpu ring map types
  196. */
  197. enum dp_cpu_ring_map_types {
  198. DP_DEFAULT_MAP,
  199. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  200. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  201. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  202. DP_CPU_RING_MAP_MAX
  203. };
  204. /**
  205. * @brief Cpu to tx ring map
  206. */
  207. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  208. {0x0, 0x1, 0x2, 0x0},
  209. {0x1, 0x2, 0x1, 0x2},
  210. {0x0, 0x2, 0x0, 0x2},
  211. {0x2, 0x2, 0x2, 0x2}
  212. };
  213. /**
  214. * @brief Select the type of statistics
  215. */
  216. enum dp_stats_type {
  217. STATS_FW = 0,
  218. STATS_HOST = 1,
  219. STATS_TYPE_MAX = 2,
  220. };
  221. /**
  222. * @brief General Firmware statistics options
  223. *
  224. */
  225. enum dp_fw_stats {
  226. TXRX_FW_STATS_INVALID = -1,
  227. };
  228. /**
  229. * dp_stats_mapping_table - Firmware and Host statistics
  230. * currently supported
  231. */
  232. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  233. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  234. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  235. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  236. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  237. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  238. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  239. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  240. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  241. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  242. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  244. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  252. /* Last ENUM for HTT FW STATS */
  253. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  254. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  255. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  256. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  257. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  258. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  259. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  260. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  261. };
  262. /**
  263. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  264. * @ring_num: ring num of the ring being queried
  265. * @grp_mask: the grp_mask array for the ring type in question.
  266. *
  267. * The grp_mask array is indexed by group number and the bit fields correspond
  268. * to ring numbers. We are finding which interrupt group a ring belongs to.
  269. *
  270. * Return: the index in the grp_mask array with the ring number.
  271. * -QDF_STATUS_E_NOENT if no entry is found
  272. */
  273. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  274. {
  275. int ext_group_num;
  276. int mask = 1 << ring_num;
  277. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  278. ext_group_num++) {
  279. if (mask & grp_mask[ext_group_num])
  280. return ext_group_num;
  281. }
  282. return -QDF_STATUS_E_NOENT;
  283. }
  284. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  285. enum hal_ring_type ring_type,
  286. int ring_num)
  287. {
  288. int *grp_mask;
  289. switch (ring_type) {
  290. case WBM2SW_RELEASE:
  291. /* dp_tx_comp_handler - soc->tx_comp_ring */
  292. if (ring_num < 3)
  293. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  294. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  295. else if (ring_num == 3) {
  296. /* sw treats this as a separate ring type */
  297. grp_mask = &soc->wlan_cfg_ctx->
  298. int_rx_wbm_rel_ring_mask[0];
  299. ring_num = 0;
  300. } else {
  301. qdf_assert(0);
  302. return -QDF_STATUS_E_NOENT;
  303. }
  304. break;
  305. case REO_EXCEPTION:
  306. /* dp_rx_err_process - &soc->reo_exception_ring */
  307. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  308. break;
  309. case REO_DST:
  310. /* dp_rx_process - soc->reo_dest_ring */
  311. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  312. break;
  313. case REO_STATUS:
  314. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  315. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  316. break;
  317. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  318. case RXDMA_MONITOR_STATUS:
  319. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  320. case RXDMA_MONITOR_DST:
  321. /* dp_mon_process */
  322. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  323. break;
  324. case RXDMA_DST:
  325. /* dp_rxdma_err_process */
  326. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  327. break;
  328. case RXDMA_BUF:
  329. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  330. break;
  331. case RXDMA_MONITOR_BUF:
  332. /* TODO: support low_thresh interrupt */
  333. return -QDF_STATUS_E_NOENT;
  334. break;
  335. case TCL_DATA:
  336. case TCL_CMD:
  337. case REO_CMD:
  338. case SW2WBM_RELEASE:
  339. case WBM_IDLE_LINK:
  340. /* normally empty SW_TO_HW rings */
  341. return -QDF_STATUS_E_NOENT;
  342. break;
  343. case TCL_STATUS:
  344. case REO_REINJECT:
  345. /* misc unused rings */
  346. return -QDF_STATUS_E_NOENT;
  347. break;
  348. case CE_SRC:
  349. case CE_DST:
  350. case CE_DST_STATUS:
  351. /* CE_rings - currently handled by hif */
  352. default:
  353. return -QDF_STATUS_E_NOENT;
  354. break;
  355. }
  356. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  357. }
  358. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  359. *ring_params, int ring_type, int ring_num)
  360. {
  361. int msi_group_number;
  362. int msi_data_count;
  363. int ret;
  364. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  365. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  366. &msi_data_count, &msi_data_start,
  367. &msi_irq_start);
  368. if (ret)
  369. return;
  370. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  371. ring_num);
  372. if (msi_group_number < 0) {
  373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  374. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  375. ring_type, ring_num);
  376. ring_params->msi_addr = 0;
  377. ring_params->msi_data = 0;
  378. return;
  379. }
  380. if (msi_group_number > msi_data_count) {
  381. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  382. FL("2 msi_groups will share an msi; msi_group_num %d"),
  383. msi_group_number);
  384. QDF_ASSERT(0);
  385. }
  386. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  387. ring_params->msi_addr = addr_low;
  388. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  389. ring_params->msi_data = (msi_group_number % msi_data_count)
  390. + msi_data_start;
  391. ring_params->flags |= HAL_SRNG_MSI_INTR;
  392. }
  393. /**
  394. * dp_print_ast_stats() - Dump AST table contents
  395. * @soc: Datapath soc handle
  396. *
  397. * return void
  398. */
  399. #ifdef FEATURE_WDS
  400. static void dp_print_ast_stats(struct dp_soc *soc)
  401. {
  402. uint8_t i;
  403. uint8_t num_entries = 0;
  404. struct dp_vdev *vdev;
  405. struct dp_pdev *pdev;
  406. struct dp_peer *peer;
  407. struct dp_ast_entry *ase, *tmp_ase;
  408. DP_PRINT_STATS("AST Stats:");
  409. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  410. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  411. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  412. DP_PRINT_STATS("AST Table:");
  413. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  414. pdev = soc->pdev_list[i];
  415. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  416. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  417. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  418. DP_PRINT_STATS("%6d mac_addr = %pM"
  419. " peer_mac_addr = %pM"
  420. " type = %d"
  421. " next_hop = %d"
  422. " is_active = %d"
  423. " is_bss = %d",
  424. ++num_entries,
  425. ase->mac_addr.raw,
  426. ase->peer->mac_addr.raw,
  427. ase->type,
  428. ase->next_hop,
  429. ase->is_active,
  430. ase->is_bss);
  431. }
  432. }
  433. }
  434. }
  435. }
  436. #else
  437. static void dp_print_ast_stats(struct dp_soc *soc)
  438. {
  439. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_WDS");
  440. return;
  441. }
  442. #endif
  443. /*
  444. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  445. */
  446. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  447. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  448. {
  449. void *hal_soc = soc->hal_soc;
  450. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  451. /* TODO: See if we should get align size from hal */
  452. uint32_t ring_base_align = 8;
  453. struct hal_srng_params ring_params;
  454. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  455. /* TODO: Currently hal layer takes care of endianness related settings.
  456. * See if these settings need to passed from DP layer
  457. */
  458. ring_params.flags = 0;
  459. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  460. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  461. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  462. srng->hal_srng = NULL;
  463. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  464. srng->num_entries = num_entries;
  465. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  466. soc->osdev, soc->osdev->dev, srng->alloc_size,
  467. &(srng->base_paddr_unaligned));
  468. if (!srng->base_vaddr_unaligned) {
  469. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  470. FL("alloc failed - ring_type: %d, ring_num %d"),
  471. ring_type, ring_num);
  472. return QDF_STATUS_E_NOMEM;
  473. }
  474. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  475. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  476. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  477. ((unsigned long)(ring_params.ring_base_vaddr) -
  478. (unsigned long)srng->base_vaddr_unaligned);
  479. ring_params.num_entries = num_entries;
  480. if (soc->intr_mode == DP_INTR_MSI) {
  481. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  482. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  483. FL("Using MSI for ring_type: %d, ring_num %d"),
  484. ring_type, ring_num);
  485. } else {
  486. ring_params.msi_data = 0;
  487. ring_params.msi_addr = 0;
  488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  489. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  490. ring_type, ring_num);
  491. }
  492. /*
  493. * Setup interrupt timer and batch counter thresholds for
  494. * interrupt mitigation based on ring type
  495. */
  496. if (ring_type == REO_DST) {
  497. ring_params.intr_timer_thres_us =
  498. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  499. ring_params.intr_batch_cntr_thres_entries =
  500. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  501. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  502. ring_params.intr_timer_thres_us =
  503. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  504. ring_params.intr_batch_cntr_thres_entries =
  505. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  506. } else {
  507. ring_params.intr_timer_thres_us =
  508. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  509. ring_params.intr_batch_cntr_thres_entries =
  510. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  511. }
  512. /* Enable low threshold interrupts for rx buffer rings (regular and
  513. * monitor buffer rings.
  514. * TODO: See if this is required for any other ring
  515. */
  516. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  517. /* TODO: Setting low threshold to 1/8th of ring size
  518. * see if this needs to be configurable
  519. */
  520. ring_params.low_threshold = num_entries >> 3;
  521. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  522. ring_params.intr_timer_thres_us = 0x1000;
  523. }
  524. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  525. mac_id, &ring_params);
  526. if (!srng->hal_srng) {
  527. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  528. srng->alloc_size,
  529. srng->base_vaddr_unaligned,
  530. srng->base_paddr_unaligned, 0);
  531. }
  532. return 0;
  533. }
  534. /**
  535. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  536. * Any buffers allocated and attached to ring entries are expected to be freed
  537. * before calling this function.
  538. */
  539. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  540. int ring_type, int ring_num)
  541. {
  542. if (!srng->hal_srng) {
  543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  544. FL("Ring type: %d, num:%d not setup"),
  545. ring_type, ring_num);
  546. return;
  547. }
  548. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  549. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  550. srng->alloc_size,
  551. srng->base_vaddr_unaligned,
  552. srng->base_paddr_unaligned, 0);
  553. srng->hal_srng = NULL;
  554. }
  555. /* TODO: Need this interface from HIF */
  556. void *hif_get_hal_handle(void *hif_handle);
  557. /*
  558. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  559. * @dp_ctx: DP SOC handle
  560. * @budget: Number of frames/descriptors that can be processed in one shot
  561. *
  562. * Return: remaining budget/quota for the soc device
  563. */
  564. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  565. {
  566. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  567. struct dp_soc *soc = int_ctx->soc;
  568. int ring = 0;
  569. uint32_t work_done = 0;
  570. int budget = dp_budget;
  571. uint8_t tx_mask = int_ctx->tx_ring_mask;
  572. uint8_t rx_mask = int_ctx->rx_ring_mask;
  573. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  574. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  575. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  576. uint32_t remaining_quota = dp_budget;
  577. struct dp_pdev *pdev = NULL;
  578. /* Process Tx completion interrupts first to return back buffers */
  579. while (tx_mask) {
  580. if (tx_mask & 0x1) {
  581. work_done = dp_tx_comp_handler(soc,
  582. soc->tx_comp_ring[ring].hal_srng,
  583. remaining_quota);
  584. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  585. "tx mask 0x%x ring %d, budget %d, work_done %d",
  586. tx_mask, ring, budget, work_done);
  587. budget -= work_done;
  588. if (budget <= 0)
  589. goto budget_done;
  590. remaining_quota = budget;
  591. }
  592. tx_mask = tx_mask >> 1;
  593. ring++;
  594. }
  595. /* Process REO Exception ring interrupt */
  596. if (rx_err_mask) {
  597. work_done = dp_rx_err_process(soc,
  598. soc->reo_exception_ring.hal_srng,
  599. remaining_quota);
  600. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  601. "REO Exception Ring: work_done %d budget %d",
  602. work_done, budget);
  603. budget -= work_done;
  604. if (budget <= 0) {
  605. goto budget_done;
  606. }
  607. remaining_quota = budget;
  608. }
  609. /* Process Rx WBM release ring interrupt */
  610. if (rx_wbm_rel_mask) {
  611. work_done = dp_rx_wbm_err_process(soc,
  612. soc->rx_rel_ring.hal_srng, remaining_quota);
  613. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  614. "WBM Release Ring: work_done %d budget %d",
  615. work_done, budget);
  616. budget -= work_done;
  617. if (budget <= 0) {
  618. goto budget_done;
  619. }
  620. remaining_quota = budget;
  621. }
  622. /* Process Rx interrupts */
  623. if (rx_mask) {
  624. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  625. if (rx_mask & (1 << ring)) {
  626. work_done = dp_rx_process(int_ctx,
  627. soc->reo_dest_ring[ring].hal_srng,
  628. remaining_quota);
  629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  630. "rx mask 0x%x ring %d, work_done %d budget %d",
  631. rx_mask, ring, work_done, budget);
  632. budget -= work_done;
  633. if (budget <= 0)
  634. goto budget_done;
  635. remaining_quota = budget;
  636. }
  637. }
  638. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  639. /* Need to check on this, why is required */
  640. work_done = dp_rxdma_err_process(soc, ring,
  641. remaining_quota);
  642. budget -= work_done;
  643. }
  644. }
  645. if (reo_status_mask)
  646. dp_reo_status_ring_handler(soc);
  647. /* Process LMAC interrupts */
  648. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  649. pdev = soc->pdev_list[ring];
  650. if (pdev == NULL)
  651. continue;
  652. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  653. work_done = dp_mon_process(soc, ring, remaining_quota);
  654. budget -= work_done;
  655. if (budget <= 0)
  656. goto budget_done;
  657. remaining_quota = budget;
  658. }
  659. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  660. work_done = dp_rxdma_err_process(soc, ring,
  661. remaining_quota);
  662. budget -= work_done;
  663. if (budget <= 0)
  664. goto budget_done;
  665. remaining_quota = budget;
  666. }
  667. if (int_ctx->host2rxdma_ring_mask & (1 << ring)) {
  668. union dp_rx_desc_list_elem_t *desc_list = NULL;
  669. union dp_rx_desc_list_elem_t *tail = NULL;
  670. struct dp_srng *rx_refill_buf_ring =
  671. &pdev->rx_refill_buf_ring;
  672. DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
  673. dp_rx_buffers_replenish(soc, ring,
  674. rx_refill_buf_ring,
  675. &soc->rx_desc_buf[ring], 0,
  676. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  677. }
  678. }
  679. qdf_lro_flush(int_ctx->lro_ctx);
  680. budget_done:
  681. return dp_budget - budget;
  682. }
  683. #ifdef DP_INTR_POLL_BASED
  684. /* dp_interrupt_timer()- timer poll for interrupts
  685. *
  686. * @arg: SoC Handle
  687. *
  688. * Return:
  689. *
  690. */
  691. static void dp_interrupt_timer(void *arg)
  692. {
  693. struct dp_soc *soc = (struct dp_soc *) arg;
  694. int i;
  695. if (qdf_atomic_read(&soc->cmn_init_done)) {
  696. for (i = 0;
  697. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  698. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  699. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  700. }
  701. }
  702. /*
  703. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  704. * @txrx_soc: DP SOC handle
  705. *
  706. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  707. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  708. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  709. *
  710. * Return: 0 for success. nonzero for failure.
  711. */
  712. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  713. {
  714. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  715. int i;
  716. soc->intr_mode = DP_INTR_POLL;
  717. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  718. soc->intr_ctx[i].dp_intr_id = i;
  719. soc->intr_ctx[i].tx_ring_mask =
  720. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  721. soc->intr_ctx[i].rx_ring_mask =
  722. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  723. soc->intr_ctx[i].rx_mon_ring_mask =
  724. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  725. soc->intr_ctx[i].rx_err_ring_mask =
  726. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  727. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  728. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  729. soc->intr_ctx[i].reo_status_ring_mask =
  730. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  731. soc->intr_ctx[i].rxdma2host_ring_mask =
  732. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  733. soc->intr_ctx[i].soc = soc;
  734. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  735. }
  736. qdf_timer_init(soc->osdev, &soc->int_timer,
  737. dp_interrupt_timer, (void *)soc,
  738. QDF_TIMER_TYPE_WAKE_APPS);
  739. return QDF_STATUS_SUCCESS;
  740. }
  741. #if defined(CONFIG_MCL)
  742. extern int con_mode_monitor;
  743. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  744. /*
  745. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  746. * @txrx_soc: DP SOC handle
  747. *
  748. * Call the appropriate attach function based on the mode of operation.
  749. * This is a WAR for enabling monitor mode.
  750. *
  751. * Return: 0 for success. nonzero for failure.
  752. */
  753. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  754. {
  755. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  756. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  757. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  758. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  759. "%s: Poll mode", __func__);
  760. return dp_soc_interrupt_attach_poll(txrx_soc);
  761. } else {
  762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  763. "%s: Interrupt mode", __func__);
  764. return dp_soc_interrupt_attach(txrx_soc);
  765. }
  766. }
  767. #else
  768. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  769. {
  770. return dp_soc_interrupt_attach_poll(txrx_soc);
  771. }
  772. #endif
  773. #endif
  774. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  775. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  776. {
  777. int j;
  778. int num_irq = 0;
  779. int tx_mask =
  780. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  781. int rx_mask =
  782. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  783. int rx_mon_mask =
  784. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  785. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  786. soc->wlan_cfg_ctx, intr_ctx_num);
  787. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  788. soc->wlan_cfg_ctx, intr_ctx_num);
  789. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  790. soc->wlan_cfg_ctx, intr_ctx_num);
  791. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  792. soc->wlan_cfg_ctx, intr_ctx_num);
  793. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  794. soc->wlan_cfg_ctx, intr_ctx_num);
  795. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  796. if (tx_mask & (1 << j)) {
  797. irq_id_map[num_irq++] =
  798. (wbm2host_tx_completions_ring1 - j);
  799. }
  800. if (rx_mask & (1 << j)) {
  801. irq_id_map[num_irq++] =
  802. (reo2host_destination_ring1 - j);
  803. }
  804. if (rxdma2host_ring_mask & (1 << j)) {
  805. irq_id_map[num_irq++] =
  806. rxdma2host_destination_ring_mac1 -
  807. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  808. }
  809. if (host2rxdma_ring_mask & (1 << j)) {
  810. irq_id_map[num_irq++] =
  811. host2rxdma_host_buf_ring_mac1 -
  812. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  813. }
  814. if (rx_mon_mask & (1 << j)) {
  815. irq_id_map[num_irq++] =
  816. ppdu_end_interrupts_mac1 -
  817. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  818. }
  819. if (rx_wbm_rel_ring_mask & (1 << j))
  820. irq_id_map[num_irq++] = wbm2host_rx_release;
  821. if (rx_err_ring_mask & (1 << j))
  822. irq_id_map[num_irq++] = reo2host_exception;
  823. if (reo_status_ring_mask & (1 << j))
  824. irq_id_map[num_irq++] = reo2host_status;
  825. }
  826. *num_irq_r = num_irq;
  827. }
  828. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  829. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  830. int msi_vector_count, int msi_vector_start)
  831. {
  832. int tx_mask = wlan_cfg_get_tx_ring_mask(
  833. soc->wlan_cfg_ctx, intr_ctx_num);
  834. int rx_mask = wlan_cfg_get_rx_ring_mask(
  835. soc->wlan_cfg_ctx, intr_ctx_num);
  836. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  837. soc->wlan_cfg_ctx, intr_ctx_num);
  838. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  839. soc->wlan_cfg_ctx, intr_ctx_num);
  840. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  841. soc->wlan_cfg_ctx, intr_ctx_num);
  842. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  843. soc->wlan_cfg_ctx, intr_ctx_num);
  844. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  845. soc->wlan_cfg_ctx, intr_ctx_num);
  846. unsigned int vector =
  847. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  848. int num_irq = 0;
  849. soc->intr_mode = DP_INTR_MSI;
  850. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  851. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  852. irq_id_map[num_irq++] =
  853. pld_get_msi_irq(soc->osdev->dev, vector);
  854. *num_irq_r = num_irq;
  855. }
  856. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  857. int *irq_id_map, int *num_irq)
  858. {
  859. int msi_vector_count, ret;
  860. uint32_t msi_base_data, msi_vector_start;
  861. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  862. &msi_vector_count,
  863. &msi_base_data,
  864. &msi_vector_start);
  865. if (ret)
  866. return dp_soc_interrupt_map_calculate_integrated(soc,
  867. intr_ctx_num, irq_id_map, num_irq);
  868. else
  869. dp_soc_interrupt_map_calculate_msi(soc,
  870. intr_ctx_num, irq_id_map, num_irq,
  871. msi_vector_count, msi_vector_start);
  872. }
  873. /*
  874. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  875. * @txrx_soc: DP SOC handle
  876. *
  877. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  878. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  879. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  880. *
  881. * Return: 0 for success. nonzero for failure.
  882. */
  883. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  884. {
  885. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  886. int i = 0;
  887. int num_irq = 0;
  888. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  889. int ret = 0;
  890. /* Map of IRQ ids registered with one interrupt context */
  891. int irq_id_map[HIF_MAX_GRP_IRQ];
  892. int tx_mask =
  893. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  894. int rx_mask =
  895. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  896. int rx_mon_mask =
  897. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  898. int rx_err_ring_mask =
  899. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  900. int rx_wbm_rel_ring_mask =
  901. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  902. int reo_status_ring_mask =
  903. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  904. int rxdma2host_ring_mask =
  905. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  906. int host2rxdma_ring_mask =
  907. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  908. soc->intr_ctx[i].dp_intr_id = i;
  909. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  910. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  911. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  912. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  913. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  914. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  915. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  916. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  917. soc->intr_ctx[i].soc = soc;
  918. num_irq = 0;
  919. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  920. &num_irq);
  921. ret = hif_register_ext_group(soc->hif_handle,
  922. num_irq, irq_id_map, dp_service_srngs,
  923. &soc->intr_ctx[i], "dp_intr",
  924. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  925. if (ret) {
  926. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  927. FL("failed, ret = %d"), ret);
  928. return QDF_STATUS_E_FAILURE;
  929. }
  930. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  931. }
  932. hif_configure_ext_group_interrupts(soc->hif_handle);
  933. return QDF_STATUS_SUCCESS;
  934. }
  935. /*
  936. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  937. * @txrx_soc: DP SOC handle
  938. *
  939. * Return: void
  940. */
  941. static void dp_soc_interrupt_detach(void *txrx_soc)
  942. {
  943. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  944. int i;
  945. if (soc->intr_mode == DP_INTR_POLL) {
  946. qdf_timer_stop(&soc->int_timer);
  947. qdf_timer_free(&soc->int_timer);
  948. } else {
  949. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  950. }
  951. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  952. soc->intr_ctx[i].tx_ring_mask = 0;
  953. soc->intr_ctx[i].rx_ring_mask = 0;
  954. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  955. soc->intr_ctx[i].rx_err_ring_mask = 0;
  956. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  957. soc->intr_ctx[i].reo_status_ring_mask = 0;
  958. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  959. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  960. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  961. }
  962. }
  963. #define AVG_MAX_MPDUS_PER_TID 128
  964. #define AVG_TIDS_PER_CLIENT 2
  965. #define AVG_FLOWS_PER_TID 2
  966. #define AVG_MSDUS_PER_FLOW 128
  967. #define AVG_MSDUS_PER_MPDU 4
  968. /*
  969. * Allocate and setup link descriptor pool that will be used by HW for
  970. * various link and queue descriptors and managed by WBM
  971. */
  972. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  973. {
  974. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  975. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  976. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  977. uint32_t num_mpdus_per_link_desc =
  978. hal_num_mpdus_per_link_desc(soc->hal_soc);
  979. uint32_t num_msdus_per_link_desc =
  980. hal_num_msdus_per_link_desc(soc->hal_soc);
  981. uint32_t num_mpdu_links_per_queue_desc =
  982. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  983. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  984. uint32_t total_link_descs, total_mem_size;
  985. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  986. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  987. uint32_t num_link_desc_banks;
  988. uint32_t last_bank_size = 0;
  989. uint32_t entry_size, num_entries;
  990. int i;
  991. uint32_t desc_id = 0;
  992. /* Only Tx queue descriptors are allocated from common link descriptor
  993. * pool Rx queue descriptors are not included in this because (REO queue
  994. * extension descriptors) they are expected to be allocated contiguously
  995. * with REO queue descriptors
  996. */
  997. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  998. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  999. num_mpdu_queue_descs = num_mpdu_link_descs /
  1000. num_mpdu_links_per_queue_desc;
  1001. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1002. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1003. num_msdus_per_link_desc;
  1004. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1005. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1006. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1007. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1008. /* Round up to power of 2 */
  1009. total_link_descs = 1;
  1010. while (total_link_descs < num_entries)
  1011. total_link_descs <<= 1;
  1012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1013. FL("total_link_descs: %u, link_desc_size: %d"),
  1014. total_link_descs, link_desc_size);
  1015. total_mem_size = total_link_descs * link_desc_size;
  1016. total_mem_size += link_desc_align;
  1017. if (total_mem_size <= max_alloc_size) {
  1018. num_link_desc_banks = 0;
  1019. last_bank_size = total_mem_size;
  1020. } else {
  1021. num_link_desc_banks = (total_mem_size) /
  1022. (max_alloc_size - link_desc_align);
  1023. last_bank_size = total_mem_size %
  1024. (max_alloc_size - link_desc_align);
  1025. }
  1026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1027. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1028. total_mem_size, num_link_desc_banks);
  1029. for (i = 0; i < num_link_desc_banks; i++) {
  1030. soc->link_desc_banks[i].base_vaddr_unaligned =
  1031. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1032. max_alloc_size,
  1033. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1034. soc->link_desc_banks[i].size = max_alloc_size;
  1035. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1036. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1037. ((unsigned long)(
  1038. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1039. link_desc_align));
  1040. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1041. soc->link_desc_banks[i].base_paddr_unaligned) +
  1042. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1043. (unsigned long)(
  1044. soc->link_desc_banks[i].base_vaddr_unaligned));
  1045. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1046. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1047. FL("Link descriptor memory alloc failed"));
  1048. goto fail;
  1049. }
  1050. }
  1051. if (last_bank_size) {
  1052. /* Allocate last bank in case total memory required is not exact
  1053. * multiple of max_alloc_size
  1054. */
  1055. soc->link_desc_banks[i].base_vaddr_unaligned =
  1056. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1057. last_bank_size,
  1058. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1059. soc->link_desc_banks[i].size = last_bank_size;
  1060. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1061. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1062. ((unsigned long)(
  1063. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1064. link_desc_align));
  1065. soc->link_desc_banks[i].base_paddr =
  1066. (unsigned long)(
  1067. soc->link_desc_banks[i].base_paddr_unaligned) +
  1068. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1069. (unsigned long)(
  1070. soc->link_desc_banks[i].base_vaddr_unaligned));
  1071. }
  1072. /* Allocate and setup link descriptor idle list for HW internal use */
  1073. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1074. total_mem_size = entry_size * total_link_descs;
  1075. if (total_mem_size <= max_alloc_size) {
  1076. void *desc;
  1077. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1078. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1079. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1080. FL("Link desc idle ring setup failed"));
  1081. goto fail;
  1082. }
  1083. hal_srng_access_start_unlocked(soc->hal_soc,
  1084. soc->wbm_idle_link_ring.hal_srng);
  1085. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1086. soc->link_desc_banks[i].base_paddr; i++) {
  1087. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1088. ((unsigned long)(
  1089. soc->link_desc_banks[i].base_vaddr) -
  1090. (unsigned long)(
  1091. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1092. / link_desc_size;
  1093. unsigned long paddr = (unsigned long)(
  1094. soc->link_desc_banks[i].base_paddr);
  1095. while (num_entries && (desc = hal_srng_src_get_next(
  1096. soc->hal_soc,
  1097. soc->wbm_idle_link_ring.hal_srng))) {
  1098. hal_set_link_desc_addr(desc,
  1099. LINK_DESC_COOKIE(desc_id, i), paddr);
  1100. num_entries--;
  1101. desc_id++;
  1102. paddr += link_desc_size;
  1103. }
  1104. }
  1105. hal_srng_access_end_unlocked(soc->hal_soc,
  1106. soc->wbm_idle_link_ring.hal_srng);
  1107. } else {
  1108. uint32_t num_scatter_bufs;
  1109. uint32_t num_entries_per_buf;
  1110. uint32_t rem_entries;
  1111. uint8_t *scatter_buf_ptr;
  1112. uint16_t scatter_buf_num;
  1113. soc->wbm_idle_scatter_buf_size =
  1114. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1115. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1116. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1117. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1118. soc->hal_soc, total_mem_size,
  1119. soc->wbm_idle_scatter_buf_size);
  1120. for (i = 0; i < num_scatter_bufs; i++) {
  1121. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1122. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1123. soc->wbm_idle_scatter_buf_size,
  1124. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1125. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1126. QDF_TRACE(QDF_MODULE_ID_DP,
  1127. QDF_TRACE_LEVEL_ERROR,
  1128. FL("Scatter list memory alloc failed"));
  1129. goto fail;
  1130. }
  1131. }
  1132. /* Populate idle list scatter buffers with link descriptor
  1133. * pointers
  1134. */
  1135. scatter_buf_num = 0;
  1136. scatter_buf_ptr = (uint8_t *)(
  1137. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1138. rem_entries = num_entries_per_buf;
  1139. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1140. soc->link_desc_banks[i].base_paddr; i++) {
  1141. uint32_t num_link_descs =
  1142. (soc->link_desc_banks[i].size -
  1143. ((unsigned long)(
  1144. soc->link_desc_banks[i].base_vaddr) -
  1145. (unsigned long)(
  1146. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1147. / link_desc_size;
  1148. unsigned long paddr = (unsigned long)(
  1149. soc->link_desc_banks[i].base_paddr);
  1150. while (num_link_descs) {
  1151. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1152. LINK_DESC_COOKIE(desc_id, i), paddr);
  1153. num_link_descs--;
  1154. desc_id++;
  1155. paddr += link_desc_size;
  1156. rem_entries--;
  1157. if (rem_entries) {
  1158. scatter_buf_ptr += entry_size;
  1159. } else {
  1160. rem_entries = num_entries_per_buf;
  1161. scatter_buf_num++;
  1162. if (scatter_buf_num >= num_scatter_bufs)
  1163. break;
  1164. scatter_buf_ptr = (uint8_t *)(
  1165. soc->wbm_idle_scatter_buf_base_vaddr[
  1166. scatter_buf_num]);
  1167. }
  1168. }
  1169. }
  1170. /* Setup link descriptor idle list in HW */
  1171. hal_setup_link_idle_list(soc->hal_soc,
  1172. soc->wbm_idle_scatter_buf_base_paddr,
  1173. soc->wbm_idle_scatter_buf_base_vaddr,
  1174. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1175. (uint32_t)(scatter_buf_ptr -
  1176. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1177. scatter_buf_num-1])), total_link_descs);
  1178. }
  1179. return 0;
  1180. fail:
  1181. if (soc->wbm_idle_link_ring.hal_srng) {
  1182. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1183. WBM_IDLE_LINK, 0);
  1184. }
  1185. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1186. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1187. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1188. soc->wbm_idle_scatter_buf_size,
  1189. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1190. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1191. }
  1192. }
  1193. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1194. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1195. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1196. soc->link_desc_banks[i].size,
  1197. soc->link_desc_banks[i].base_vaddr_unaligned,
  1198. soc->link_desc_banks[i].base_paddr_unaligned,
  1199. 0);
  1200. }
  1201. }
  1202. return QDF_STATUS_E_FAILURE;
  1203. }
  1204. /*
  1205. * Free link descriptor pool that was setup HW
  1206. */
  1207. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1208. {
  1209. int i;
  1210. if (soc->wbm_idle_link_ring.hal_srng) {
  1211. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1212. WBM_IDLE_LINK, 0);
  1213. }
  1214. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1215. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1216. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1217. soc->wbm_idle_scatter_buf_size,
  1218. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1219. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1220. }
  1221. }
  1222. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1223. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1224. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1225. soc->link_desc_banks[i].size,
  1226. soc->link_desc_banks[i].base_vaddr_unaligned,
  1227. soc->link_desc_banks[i].base_paddr_unaligned,
  1228. 0);
  1229. }
  1230. }
  1231. }
  1232. /* TODO: Following should be configurable */
  1233. #define WBM_RELEASE_RING_SIZE 64
  1234. #define TCL_CMD_RING_SIZE 32
  1235. #define TCL_STATUS_RING_SIZE 32
  1236. #if defined(QCA_WIFI_QCA6290)
  1237. #define REO_DST_RING_SIZE 1024
  1238. #else
  1239. #define REO_DST_RING_SIZE 2048
  1240. #endif
  1241. #define REO_REINJECT_RING_SIZE 32
  1242. #define RX_RELEASE_RING_SIZE 1024
  1243. #define REO_EXCEPTION_RING_SIZE 128
  1244. #define REO_CMD_RING_SIZE 32
  1245. #define REO_STATUS_RING_SIZE 32
  1246. #define RXDMA_BUF_RING_SIZE 1024
  1247. #define RXDMA_REFILL_RING_SIZE 4096
  1248. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1249. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1250. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1251. #define RXDMA_MONITOR_DESC_RING_SIZE 2048
  1252. #define RXDMA_ERR_DST_RING_SIZE 1024
  1253. /*
  1254. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1255. * @soc: Datapath SOC handle
  1256. *
  1257. * This is a timer function used to age out stale WDS nodes from
  1258. * AST table
  1259. */
  1260. #ifdef FEATURE_WDS
  1261. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1262. {
  1263. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1264. struct dp_pdev *pdev;
  1265. struct dp_vdev *vdev;
  1266. struct dp_peer *peer;
  1267. struct dp_ast_entry *ase, *temp_ase;
  1268. int i;
  1269. qdf_spin_lock_bh(&soc->ast_lock);
  1270. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1271. pdev = soc->pdev_list[i];
  1272. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1273. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1274. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1275. /*
  1276. * Do not expire static ast entries
  1277. */
  1278. if (ase->type == CDP_TXRX_AST_TYPE_STATIC)
  1279. continue;
  1280. if (ase->is_active) {
  1281. ase->is_active = FALSE;
  1282. continue;
  1283. }
  1284. DP_STATS_INC(soc, ast.aged_out, 1);
  1285. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  1286. vdev->osif_vdev,
  1287. ase->mac_addr.raw);
  1288. dp_peer_del_ast(soc, ase);
  1289. }
  1290. }
  1291. }
  1292. }
  1293. qdf_spin_unlock_bh(&soc->ast_lock);
  1294. if (qdf_atomic_read(&soc->cmn_init_done))
  1295. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1296. }
  1297. /*
  1298. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1299. * @soc: Datapath SOC handle
  1300. *
  1301. * Return: None
  1302. */
  1303. static void dp_soc_wds_attach(struct dp_soc *soc)
  1304. {
  1305. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1306. dp_wds_aging_timer_fn, (void *)soc,
  1307. QDF_TIMER_TYPE_WAKE_APPS);
  1308. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1309. }
  1310. /*
  1311. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1312. * @txrx_soc: DP SOC handle
  1313. *
  1314. * Return: None
  1315. */
  1316. static void dp_soc_wds_detach(struct dp_soc *soc)
  1317. {
  1318. qdf_timer_stop(&soc->wds_aging_timer);
  1319. qdf_timer_free(&soc->wds_aging_timer);
  1320. }
  1321. #else
  1322. static void dp_soc_wds_attach(struct dp_soc *soc)
  1323. {
  1324. }
  1325. static void dp_soc_wds_detach(struct dp_soc *soc)
  1326. {
  1327. }
  1328. #endif
  1329. /*
  1330. * dp_soc_reset_ring_map() - Reset cpu ring map
  1331. * @soc: Datapath soc handler
  1332. *
  1333. * This api resets the default cpu ring map
  1334. */
  1335. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1336. {
  1337. uint8_t i;
  1338. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1339. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1340. if (nss_config == 1) {
  1341. /*
  1342. * Setting Tx ring map for one nss offloaded radio
  1343. */
  1344. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1345. } else if (nss_config == 2) {
  1346. /*
  1347. * Setting Tx ring for two nss offloaded radios
  1348. */
  1349. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1350. } else {
  1351. /*
  1352. * Setting Tx ring map for all nss offloaded radios
  1353. */
  1354. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1355. }
  1356. }
  1357. }
  1358. /*
  1359. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1360. * @dp_soc - DP soc handle
  1361. * @ring_type - ring type
  1362. * @ring_num - ring_num
  1363. *
  1364. * return 0 or 1
  1365. */
  1366. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1367. {
  1368. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1369. uint8_t status = 0;
  1370. switch (ring_type) {
  1371. case WBM2SW_RELEASE:
  1372. case REO_DST:
  1373. case RXDMA_BUF:
  1374. status = ((nss_config) & (1 << ring_num));
  1375. break;
  1376. default:
  1377. break;
  1378. }
  1379. return status;
  1380. }
  1381. /*
  1382. * dp_soc_reset_intr_mask() - reset interrupt mask
  1383. * @dp_soc - DP Soc handle
  1384. *
  1385. * Return: Return void
  1386. */
  1387. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1388. {
  1389. uint8_t j;
  1390. int *grp_mask = NULL;
  1391. int group_number, mask, num_ring;
  1392. /* number of tx ring */
  1393. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1394. /*
  1395. * group mask for tx completion ring.
  1396. */
  1397. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1398. /* loop and reset the mask for only offloaded ring */
  1399. for (j = 0; j < num_ring; j++) {
  1400. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1401. continue;
  1402. }
  1403. /*
  1404. * Group number corresponding to tx offloaded ring.
  1405. */
  1406. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1407. if (group_number < 0) {
  1408. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1409. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1410. WBM2SW_RELEASE, j);
  1411. return;
  1412. }
  1413. /* reset the tx mask for offloaded ring */
  1414. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1415. mask &= (~(1 << j));
  1416. /*
  1417. * reset the interrupt mask for offloaded ring.
  1418. */
  1419. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1420. }
  1421. /* number of rx rings */
  1422. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1423. /*
  1424. * group mask for reo destination ring.
  1425. */
  1426. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1427. /* loop and reset the mask for only offloaded ring */
  1428. for (j = 0; j < num_ring; j++) {
  1429. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1430. continue;
  1431. }
  1432. /*
  1433. * Group number corresponding to rx offloaded ring.
  1434. */
  1435. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1436. if (group_number < 0) {
  1437. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1438. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1439. REO_DST, j);
  1440. return;
  1441. }
  1442. /* set the interrupt mask for offloaded ring */
  1443. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1444. mask &= (~(1 << j));
  1445. /*
  1446. * set the interrupt mask to zero for rx offloaded radio.
  1447. */
  1448. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1449. }
  1450. /*
  1451. * group mask for Rx buffer refill ring
  1452. */
  1453. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1454. /* loop and reset the mask for only offloaded ring */
  1455. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1456. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1457. continue;
  1458. }
  1459. /*
  1460. * Group number corresponding to rx offloaded ring.
  1461. */
  1462. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1463. if (group_number < 0) {
  1464. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1465. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1466. REO_DST, j);
  1467. return;
  1468. }
  1469. /* set the interrupt mask for offloaded ring */
  1470. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1471. group_number);
  1472. mask &= (~(1 << j));
  1473. /*
  1474. * set the interrupt mask to zero for rx offloaded radio.
  1475. */
  1476. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1477. group_number, mask);
  1478. }
  1479. }
  1480. #ifdef IPA_OFFLOAD
  1481. /**
  1482. * dp_reo_remap_config() - configure reo remap register value based
  1483. * nss configuration.
  1484. * based on offload_radio value below remap configuration
  1485. * get applied.
  1486. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1487. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1488. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1489. * 3 - both Radios handled by NSS (remap not required)
  1490. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1491. *
  1492. * @remap1: output parameter indicates reo remap 1 register value
  1493. * @remap2: output parameter indicates reo remap 2 register value
  1494. * Return: bool type, true if remap is configured else false.
  1495. */
  1496. static bool dp_reo_remap_config(struct dp_soc *soc,
  1497. uint32_t *remap1,
  1498. uint32_t *remap2)
  1499. {
  1500. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1501. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1502. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1503. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1504. return true;
  1505. }
  1506. #else
  1507. static bool dp_reo_remap_config(struct dp_soc *soc,
  1508. uint32_t *remap1,
  1509. uint32_t *remap2)
  1510. {
  1511. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1512. switch (offload_radio) {
  1513. case 0:
  1514. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1515. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1516. (0x3 << 18) | (0x4 << 21)) << 8;
  1517. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1518. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1519. (0x3 << 18) | (0x4 << 21)) << 8;
  1520. break;
  1521. case 1:
  1522. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1523. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1524. (0x2 << 18) | (0x3 << 21)) << 8;
  1525. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1526. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1527. (0x4 << 18) | (0x2 << 21)) << 8;
  1528. break;
  1529. case 2:
  1530. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1531. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1532. (0x1 << 18) | (0x3 << 21)) << 8;
  1533. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1534. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1535. (0x4 << 18) | (0x1 << 21)) << 8;
  1536. break;
  1537. case 3:
  1538. /* return false if both radios are offloaded to NSS */
  1539. return false;
  1540. }
  1541. return true;
  1542. }
  1543. #endif
  1544. /*
  1545. * dp_soc_cmn_setup() - Common SoC level initializion
  1546. * @soc: Datapath SOC handle
  1547. *
  1548. * This is an internal function used to setup common SOC data structures,
  1549. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1550. */
  1551. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1552. {
  1553. int i;
  1554. struct hal_reo_params reo_params;
  1555. int tx_ring_size;
  1556. int tx_comp_ring_size;
  1557. if (qdf_atomic_read(&soc->cmn_init_done))
  1558. return 0;
  1559. if (dp_peer_find_attach(soc))
  1560. goto fail0;
  1561. if (dp_hw_link_desc_pool_setup(soc))
  1562. goto fail1;
  1563. /* Setup SRNG rings */
  1564. /* Common rings */
  1565. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1566. WBM_RELEASE_RING_SIZE)) {
  1567. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1568. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1569. goto fail1;
  1570. }
  1571. soc->num_tcl_data_rings = 0;
  1572. /* Tx data rings */
  1573. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1574. soc->num_tcl_data_rings =
  1575. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1576. tx_comp_ring_size =
  1577. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1578. tx_ring_size =
  1579. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1580. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1581. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1582. TCL_DATA, i, 0, tx_ring_size)) {
  1583. QDF_TRACE(QDF_MODULE_ID_DP,
  1584. QDF_TRACE_LEVEL_ERROR,
  1585. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1586. goto fail1;
  1587. }
  1588. /*
  1589. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1590. * count
  1591. */
  1592. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1593. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1594. QDF_TRACE(QDF_MODULE_ID_DP,
  1595. QDF_TRACE_LEVEL_ERROR,
  1596. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1597. goto fail1;
  1598. }
  1599. }
  1600. } else {
  1601. /* This will be incremented during per pdev ring setup */
  1602. soc->num_tcl_data_rings = 0;
  1603. }
  1604. if (dp_tx_soc_attach(soc)) {
  1605. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1606. FL("dp_tx_soc_attach failed"));
  1607. goto fail1;
  1608. }
  1609. /* TCL command and status rings */
  1610. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1611. TCL_CMD_RING_SIZE)) {
  1612. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1613. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1614. goto fail1;
  1615. }
  1616. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1617. TCL_STATUS_RING_SIZE)) {
  1618. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1619. FL("dp_srng_setup failed for tcl_status_ring"));
  1620. goto fail1;
  1621. }
  1622. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1623. * descriptors
  1624. */
  1625. /* Rx data rings */
  1626. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1627. soc->num_reo_dest_rings =
  1628. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1629. QDF_TRACE(QDF_MODULE_ID_DP,
  1630. QDF_TRACE_LEVEL_ERROR,
  1631. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1632. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1633. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1634. i, 0, REO_DST_RING_SIZE)) {
  1635. QDF_TRACE(QDF_MODULE_ID_DP,
  1636. QDF_TRACE_LEVEL_ERROR,
  1637. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1638. goto fail1;
  1639. }
  1640. }
  1641. } else {
  1642. /* This will be incremented during per pdev ring setup */
  1643. soc->num_reo_dest_rings = 0;
  1644. }
  1645. /* LMAC RxDMA to SW Rings configuration */
  1646. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1647. /* Only valid for MCL */
  1648. struct dp_pdev *pdev = soc->pdev_list[0];
  1649. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1650. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1651. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1652. QDF_TRACE(QDF_MODULE_ID_DP,
  1653. QDF_TRACE_LEVEL_ERROR,
  1654. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1655. goto fail1;
  1656. }
  1657. }
  1658. }
  1659. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1660. /* REO reinjection ring */
  1661. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1662. REO_REINJECT_RING_SIZE)) {
  1663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1664. FL("dp_srng_setup failed for reo_reinject_ring"));
  1665. goto fail1;
  1666. }
  1667. /* Rx release ring */
  1668. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1669. RX_RELEASE_RING_SIZE)) {
  1670. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1671. FL("dp_srng_setup failed for rx_rel_ring"));
  1672. goto fail1;
  1673. }
  1674. /* Rx exception ring */
  1675. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1676. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1677. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1678. FL("dp_srng_setup failed for reo_exception_ring"));
  1679. goto fail1;
  1680. }
  1681. /* REO command and status rings */
  1682. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1683. REO_CMD_RING_SIZE)) {
  1684. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1685. FL("dp_srng_setup failed for reo_cmd_ring"));
  1686. goto fail1;
  1687. }
  1688. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1689. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1690. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1691. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1692. REO_STATUS_RING_SIZE)) {
  1693. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1694. FL("dp_srng_setup failed for reo_status_ring"));
  1695. goto fail1;
  1696. }
  1697. qdf_spinlock_create(&soc->ast_lock);
  1698. dp_soc_wds_attach(soc);
  1699. /* Reset the cpu ring map if radio is NSS offloaded */
  1700. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1701. dp_soc_reset_cpu_ring_map(soc);
  1702. dp_soc_reset_intr_mask(soc);
  1703. }
  1704. /* Setup HW REO */
  1705. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1706. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1707. /*
  1708. * Reo ring remap is not required if both radios
  1709. * are offloaded to NSS
  1710. */
  1711. if (!dp_reo_remap_config(soc,
  1712. &reo_params.remap1,
  1713. &reo_params.remap2))
  1714. goto out;
  1715. reo_params.rx_hash_enabled = true;
  1716. }
  1717. /* setup the global rx defrag waitlist */
  1718. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1719. soc->rx.defrag.timeout_ms =
  1720. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1721. soc->rx.flags.defrag_timeout_check =
  1722. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1723. out:
  1724. hal_reo_setup(soc->hal_soc, &reo_params);
  1725. qdf_atomic_set(&soc->cmn_init_done, 1);
  1726. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1727. return 0;
  1728. fail1:
  1729. /*
  1730. * Cleanup will be done as part of soc_detach, which will
  1731. * be called on pdev attach failure
  1732. */
  1733. fail0:
  1734. return QDF_STATUS_E_FAILURE;
  1735. }
  1736. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1737. static void dp_lro_hash_setup(struct dp_soc *soc)
  1738. {
  1739. struct cdp_lro_hash_config lro_hash;
  1740. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1741. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1742. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1743. FL("LRO disabled RX hash disabled"));
  1744. return;
  1745. }
  1746. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1747. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1748. lro_hash.lro_enable = 1;
  1749. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1750. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1751. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1752. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1753. }
  1754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1755. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1756. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1757. LRO_IPV4_SEED_ARR_SZ));
  1758. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1759. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1760. LRO_IPV6_SEED_ARR_SZ));
  1761. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1762. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1763. lro_hash.lro_enable, lro_hash.tcp_flag,
  1764. lro_hash.tcp_flag_mask);
  1765. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1766. QDF_TRACE_LEVEL_ERROR,
  1767. (void *)lro_hash.toeplitz_hash_ipv4,
  1768. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1769. LRO_IPV4_SEED_ARR_SZ));
  1770. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1771. QDF_TRACE_LEVEL_ERROR,
  1772. (void *)lro_hash.toeplitz_hash_ipv6,
  1773. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1774. LRO_IPV6_SEED_ARR_SZ));
  1775. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1776. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1777. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1778. (soc->osif_soc, &lro_hash);
  1779. }
  1780. /*
  1781. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1782. * @soc: data path SoC handle
  1783. * @pdev: Physical device handle
  1784. *
  1785. * Return: 0 - success, > 0 - failure
  1786. */
  1787. #ifdef QCA_HOST2FW_RXBUF_RING
  1788. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1789. struct dp_pdev *pdev)
  1790. {
  1791. int max_mac_rings =
  1792. wlan_cfg_get_num_mac_rings
  1793. (pdev->wlan_cfg_ctx);
  1794. int i;
  1795. for (i = 0; i < max_mac_rings; i++) {
  1796. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1797. "%s: pdev_id %d mac_id %d\n",
  1798. __func__, pdev->pdev_id, i);
  1799. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1800. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1801. QDF_TRACE(QDF_MODULE_ID_DP,
  1802. QDF_TRACE_LEVEL_ERROR,
  1803. FL("failed rx mac ring setup"));
  1804. return QDF_STATUS_E_FAILURE;
  1805. }
  1806. }
  1807. return QDF_STATUS_SUCCESS;
  1808. }
  1809. #else
  1810. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1811. struct dp_pdev *pdev)
  1812. {
  1813. return QDF_STATUS_SUCCESS;
  1814. }
  1815. #endif
  1816. /**
  1817. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1818. * @pdev - DP_PDEV handle
  1819. *
  1820. * Return: void
  1821. */
  1822. static inline void
  1823. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1824. {
  1825. uint8_t map_id;
  1826. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1827. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1828. sizeof(default_dscp_tid_map));
  1829. }
  1830. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1831. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1832. pdev->dscp_tid_map[map_id],
  1833. map_id);
  1834. }
  1835. }
  1836. #ifdef QCA_SUPPORT_SON
  1837. /**
  1838. * dp_mark_peer_inact(): Update peer inactivity status
  1839. * @peer_handle - datapath peer handle
  1840. *
  1841. * Return: void
  1842. */
  1843. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1844. {
  1845. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1846. struct dp_pdev *pdev;
  1847. struct dp_soc *soc;
  1848. bool inactive_old;
  1849. if (!peer)
  1850. return;
  1851. pdev = peer->vdev->pdev;
  1852. soc = pdev->soc;
  1853. inactive_old = peer->peer_bs_inact_flag == 1;
  1854. if (!inactive)
  1855. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1856. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1857. if (inactive_old != inactive) {
  1858. struct ieee80211com *ic;
  1859. struct ol_ath_softc_net80211 *scn;
  1860. scn = (struct ol_ath_softc_net80211 *)pdev->osif_pdev;
  1861. ic = &scn->sc_ic;
  1862. /**
  1863. * Note: a node lookup can happen in RX datapath context
  1864. * when a node changes from inactive to active (at most once
  1865. * per inactivity timeout threshold)
  1866. */
  1867. if (soc->cdp_soc.ol_ops->record_act_change) {
  1868. soc->cdp_soc.ol_ops->record_act_change(ic->ic_pdev_obj,
  1869. peer->mac_addr.raw, !inactive);
  1870. }
  1871. }
  1872. }
  1873. /**
  1874. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  1875. *
  1876. * Periodically checks the inactivity status
  1877. */
  1878. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  1879. {
  1880. struct dp_pdev *pdev;
  1881. struct dp_vdev *vdev;
  1882. struct dp_peer *peer;
  1883. struct dp_soc *soc;
  1884. int i;
  1885. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  1886. qdf_spin_lock(&soc->peer_ref_mutex);
  1887. for (i = 0; i < soc->pdev_count; i++) {
  1888. pdev = soc->pdev_list[i];
  1889. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1890. if (vdev->opmode != wlan_op_mode_ap)
  1891. continue;
  1892. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1893. if (!peer->authorize) {
  1894. /**
  1895. * Inactivity check only interested in
  1896. * connected node
  1897. */
  1898. continue;
  1899. }
  1900. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  1901. /**
  1902. * This check ensures we do not wait extra long
  1903. * due to the potential race condition
  1904. */
  1905. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1906. }
  1907. if (peer->peer_bs_inact > 0) {
  1908. /* Do not let it wrap around */
  1909. peer->peer_bs_inact--;
  1910. }
  1911. if (peer->peer_bs_inact == 0)
  1912. dp_mark_peer_inact(peer, true);
  1913. }
  1914. }
  1915. }
  1916. qdf_spin_unlock(&soc->peer_ref_mutex);
  1917. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  1918. soc->pdev_bs_inact_interval * 1000);
  1919. }
  1920. #endif
  1921. /*
  1922. * dp_pdev_attach_wifi3() - attach txrx pdev
  1923. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  1924. * @txrx_soc: Datapath SOC handle
  1925. * @htc_handle: HTC handle for host-target interface
  1926. * @qdf_osdev: QDF OS device
  1927. * @pdev_id: PDEV ID
  1928. *
  1929. * Return: DP PDEV handle on success, NULL on failure
  1930. */
  1931. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  1932. struct cdp_cfg *ctrl_pdev,
  1933. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  1934. {
  1935. int tx_ring_size;
  1936. int tx_comp_ring_size;
  1937. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1938. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  1939. if (!pdev) {
  1940. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1941. FL("DP PDEV memory allocation failed"));
  1942. goto fail0;
  1943. }
  1944. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1945. if (!pdev->wlan_cfg_ctx) {
  1946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1947. FL("pdev cfg_attach failed"));
  1948. qdf_mem_free(pdev);
  1949. goto fail0;
  1950. }
  1951. /*
  1952. * set nss pdev config based on soc config
  1953. */
  1954. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  1955. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  1956. pdev->soc = soc;
  1957. pdev->osif_pdev = ctrl_pdev;
  1958. pdev->pdev_id = pdev_id;
  1959. soc->pdev_list[pdev_id] = pdev;
  1960. soc->pdev_count++;
  1961. TAILQ_INIT(&pdev->vdev_list);
  1962. pdev->vdev_count = 0;
  1963. qdf_spinlock_create(&pdev->tx_mutex);
  1964. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  1965. TAILQ_INIT(&pdev->neighbour_peers_list);
  1966. if (dp_soc_cmn_setup(soc)) {
  1967. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1968. FL("dp_soc_cmn_setup failed"));
  1969. goto fail1;
  1970. }
  1971. /* Setup per PDEV TCL rings if configured */
  1972. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1973. tx_ring_size =
  1974. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1975. tx_comp_ring_size =
  1976. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1977. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1978. pdev_id, pdev_id, tx_ring_size)) {
  1979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1980. FL("dp_srng_setup failed for tcl_data_ring"));
  1981. goto fail1;
  1982. }
  1983. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1984. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  1985. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1986. FL("dp_srng_setup failed for tx_comp_ring"));
  1987. goto fail1;
  1988. }
  1989. soc->num_tcl_data_rings++;
  1990. }
  1991. /* Tx specific init */
  1992. if (dp_tx_pdev_attach(pdev)) {
  1993. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1994. FL("dp_tx_pdev_attach failed"));
  1995. goto fail1;
  1996. }
  1997. /* Setup per PDEV REO rings if configured */
  1998. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1999. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2000. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2001. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2002. FL("dp_srng_setup failed for reo_dest_ringn"));
  2003. goto fail1;
  2004. }
  2005. soc->num_reo_dest_rings++;
  2006. }
  2007. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2008. RXDMA_REFILL_RING_SIZE)) {
  2009. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2010. FL("dp_srng_setup failed rx refill ring"));
  2011. goto fail1;
  2012. }
  2013. if (dp_rxdma_ring_setup(soc, pdev)) {
  2014. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2015. FL("RXDMA ring config failed"));
  2016. goto fail1;
  2017. }
  2018. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  2019. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  2020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2021. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2022. goto fail1;
  2023. }
  2024. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  2025. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  2026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2027. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2028. goto fail1;
  2029. }
  2030. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  2031. RXDMA_MONITOR_STATUS, 0, pdev_id,
  2032. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2033. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2034. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2035. goto fail1;
  2036. }
  2037. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  2038. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  2039. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2040. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2041. goto fail1;
  2042. }
  2043. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2044. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2045. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2046. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2047. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2048. goto fail1;
  2049. }
  2050. }
  2051. /* Setup second Rx refill buffer ring */
  2052. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2,
  2053. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2054. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2055. FL("dp_srng_setup failed second rx refill ring"));
  2056. goto fail1;
  2057. }
  2058. if (dp_ipa_ring_resource_setup(soc, pdev))
  2059. goto fail1;
  2060. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2062. FL("dp_ipa_uc_attach failed"));
  2063. goto fail1;
  2064. }
  2065. /* Rx specific init */
  2066. if (dp_rx_pdev_attach(pdev)) {
  2067. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2068. FL("dp_rx_pdev_attach failed"));
  2069. goto fail0;
  2070. }
  2071. DP_STATS_INIT(pdev);
  2072. /* Monitor filter init */
  2073. pdev->mon_filter_mode = MON_FILTER_ALL;
  2074. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2075. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2076. pdev->fp_data_filter = FILTER_DATA_ALL;
  2077. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2078. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2079. pdev->mo_data_filter = FILTER_DATA_ALL;
  2080. #ifndef CONFIG_WIN
  2081. /* MCL */
  2082. dp_local_peer_id_pool_init(pdev);
  2083. #endif
  2084. dp_dscp_tid_map_setup(pdev);
  2085. /* Rx monitor mode specific init */
  2086. if (dp_rx_pdev_mon_attach(pdev)) {
  2087. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2088. "dp_rx_pdev_attach failed\n");
  2089. goto fail1;
  2090. }
  2091. if (dp_wdi_event_attach(pdev)) {
  2092. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2093. "dp_wdi_evet_attach failed\n");
  2094. goto fail1;
  2095. }
  2096. #ifdef QCA_SUPPORT_SON
  2097. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  2098. dp_txrx_peer_find_inact_timeout_handler,
  2099. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  2100. #endif
  2101. /* set the reo destination during initialization */
  2102. pdev->reo_dest = pdev->pdev_id + 1;
  2103. return (struct cdp_pdev *)pdev;
  2104. fail1:
  2105. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2106. fail0:
  2107. return NULL;
  2108. }
  2109. /*
  2110. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2111. * @soc: data path SoC handle
  2112. * @pdev: Physical device handle
  2113. *
  2114. * Return: void
  2115. */
  2116. #ifdef QCA_HOST2FW_RXBUF_RING
  2117. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2118. struct dp_pdev *pdev)
  2119. {
  2120. int max_mac_rings =
  2121. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2122. int i;
  2123. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2124. max_mac_rings : MAX_RX_MAC_RINGS;
  2125. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2126. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2127. RXDMA_BUF, 1);
  2128. qdf_timer_free(&soc->mon_reap_timer);
  2129. }
  2130. #else
  2131. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2132. struct dp_pdev *pdev)
  2133. {
  2134. }
  2135. #endif
  2136. /*
  2137. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2138. * @pdev: device object
  2139. *
  2140. * Return: void
  2141. */
  2142. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2143. {
  2144. struct dp_neighbour_peer *peer = NULL;
  2145. struct dp_neighbour_peer *temp_peer = NULL;
  2146. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2147. neighbour_peer_list_elem, temp_peer) {
  2148. /* delete this peer from the list */
  2149. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2150. peer, neighbour_peer_list_elem);
  2151. qdf_mem_free(peer);
  2152. }
  2153. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2154. }
  2155. /*
  2156. * dp_pdev_detach_wifi3() - detach txrx pdev
  2157. * @txrx_pdev: Datapath PDEV handle
  2158. * @force: Force detach
  2159. *
  2160. */
  2161. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2162. {
  2163. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2164. struct dp_soc *soc = pdev->soc;
  2165. qdf_nbuf_t curr_nbuf, next_nbuf;
  2166. dp_wdi_event_detach(pdev);
  2167. dp_tx_pdev_detach(pdev);
  2168. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2169. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2170. TCL_DATA, pdev->pdev_id);
  2171. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2172. WBM2SW_RELEASE, pdev->pdev_id);
  2173. }
  2174. dp_pktlogmod_exit(pdev);
  2175. dp_rx_pdev_detach(pdev);
  2176. dp_rx_pdev_mon_detach(pdev);
  2177. dp_neighbour_peers_detach(pdev);
  2178. qdf_spinlock_destroy(&pdev->tx_mutex);
  2179. dp_ipa_uc_detach(soc, pdev);
  2180. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2);
  2181. /* Cleanup per PDEV REO rings if configured */
  2182. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2183. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2184. REO_DST, pdev->pdev_id);
  2185. }
  2186. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2187. dp_rxdma_ring_cleanup(soc, pdev);
  2188. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  2189. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  2190. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  2191. RXDMA_MONITOR_STATUS, 0);
  2192. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  2193. RXDMA_MONITOR_DESC, 0);
  2194. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2195. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST, 0);
  2196. } else {
  2197. int i;
  2198. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2199. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[i],
  2200. RXDMA_DST, 0);
  2201. }
  2202. curr_nbuf = pdev->invalid_peer_head_msdu;
  2203. while (curr_nbuf) {
  2204. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2205. qdf_nbuf_free(curr_nbuf);
  2206. curr_nbuf = next_nbuf;
  2207. }
  2208. soc->pdev_list[pdev->pdev_id] = NULL;
  2209. soc->pdev_count--;
  2210. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2211. qdf_mem_free(pdev->dp_txrx_handle);
  2212. qdf_mem_free(pdev);
  2213. }
  2214. /*
  2215. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2216. * @soc: DP SOC handle
  2217. */
  2218. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2219. {
  2220. struct reo_desc_list_node *desc;
  2221. struct dp_rx_tid *rx_tid;
  2222. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2223. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2224. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2225. rx_tid = &desc->rx_tid;
  2226. qdf_mem_unmap_nbytes_single(soc->osdev,
  2227. rx_tid->hw_qdesc_paddr,
  2228. QDF_DMA_BIDIRECTIONAL,
  2229. rx_tid->hw_qdesc_alloc_size);
  2230. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2231. qdf_mem_free(desc);
  2232. }
  2233. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2234. qdf_list_destroy(&soc->reo_desc_freelist);
  2235. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2236. }
  2237. /*
  2238. * dp_soc_detach_wifi3() - Detach txrx SOC
  2239. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2240. */
  2241. static void dp_soc_detach_wifi3(void *txrx_soc)
  2242. {
  2243. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2244. int i;
  2245. qdf_atomic_set(&soc->cmn_init_done, 0);
  2246. qdf_flush_work(&soc->htt_stats.work);
  2247. qdf_disable_work(&soc->htt_stats.work);
  2248. /* Free pending htt stats messages */
  2249. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2250. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2251. if (soc->pdev_list[i])
  2252. dp_pdev_detach_wifi3(
  2253. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2254. }
  2255. dp_peer_find_detach(soc);
  2256. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2257. * SW descriptors
  2258. */
  2259. /* Free the ring memories */
  2260. /* Common rings */
  2261. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2262. dp_tx_soc_detach(soc);
  2263. /* Tx data rings */
  2264. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2265. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2266. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2267. TCL_DATA, i);
  2268. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2269. WBM2SW_RELEASE, i);
  2270. }
  2271. }
  2272. /* TCL command and status rings */
  2273. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2274. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2275. /* Rx data rings */
  2276. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2277. soc->num_reo_dest_rings =
  2278. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2279. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2280. /* TODO: Get number of rings and ring sizes
  2281. * from wlan_cfg
  2282. */
  2283. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2284. REO_DST, i);
  2285. }
  2286. }
  2287. /* REO reinjection ring */
  2288. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2289. /* Rx release ring */
  2290. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2291. /* Rx exception ring */
  2292. /* TODO: Better to store ring_type and ring_num in
  2293. * dp_srng during setup
  2294. */
  2295. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2296. /* REO command and status rings */
  2297. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2298. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2299. dp_hw_link_desc_pool_cleanup(soc);
  2300. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2301. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2302. htt_soc_detach(soc->htt_handle);
  2303. dp_reo_cmdlist_destroy(soc);
  2304. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2305. dp_reo_desc_freelist_destroy(soc);
  2306. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2307. dp_soc_wds_detach(soc);
  2308. qdf_spinlock_destroy(&soc->ast_lock);
  2309. qdf_mem_free(soc);
  2310. }
  2311. /*
  2312. * dp_rxdma_ring_config() - configure the RX DMA rings
  2313. *
  2314. * This function is used to configure the MAC rings.
  2315. * On MCL host provides buffers in Host2FW ring
  2316. * FW refills (copies) buffers to the ring and updates
  2317. * ring_idx in register
  2318. *
  2319. * @soc: data path SoC handle
  2320. *
  2321. * Return: void
  2322. */
  2323. #ifdef QCA_HOST2FW_RXBUF_RING
  2324. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2325. {
  2326. int i;
  2327. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2328. struct dp_pdev *pdev = soc->pdev_list[i];
  2329. if (pdev) {
  2330. int mac_id = 0;
  2331. int j;
  2332. bool dbs_enable = 0;
  2333. int max_mac_rings =
  2334. wlan_cfg_get_num_mac_rings
  2335. (pdev->wlan_cfg_ctx);
  2336. htt_srng_setup(soc->htt_handle, 0,
  2337. pdev->rx_refill_buf_ring.hal_srng,
  2338. RXDMA_BUF);
  2339. if (pdev->rx_refill_buf_ring2.hal_srng)
  2340. htt_srng_setup(soc->htt_handle, 0,
  2341. pdev->rx_refill_buf_ring2.hal_srng,
  2342. RXDMA_BUF);
  2343. if (soc->cdp_soc.ol_ops->
  2344. is_hw_dbs_2x2_capable) {
  2345. dbs_enable = soc->cdp_soc.ol_ops->
  2346. is_hw_dbs_2x2_capable(soc->psoc);
  2347. }
  2348. if (dbs_enable) {
  2349. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2350. QDF_TRACE_LEVEL_ERROR,
  2351. FL("DBS enabled max_mac_rings %d\n"),
  2352. max_mac_rings);
  2353. } else {
  2354. max_mac_rings = 1;
  2355. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2356. QDF_TRACE_LEVEL_ERROR,
  2357. FL("DBS disabled, max_mac_rings %d\n"),
  2358. max_mac_rings);
  2359. }
  2360. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2361. FL("pdev_id %d max_mac_rings %d\n"),
  2362. pdev->pdev_id, max_mac_rings);
  2363. for (j = 0; j < max_mac_rings; j++) {
  2364. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2365. QDF_TRACE_LEVEL_ERROR,
  2366. FL("mac_id %d\n"), mac_id);
  2367. htt_srng_setup(soc->htt_handle, mac_id,
  2368. pdev->rx_mac_buf_ring[j]
  2369. .hal_srng,
  2370. RXDMA_BUF);
  2371. htt_srng_setup(soc->htt_handle, mac_id,
  2372. pdev->rxdma_err_dst_ring[j]
  2373. .hal_srng,
  2374. RXDMA_DST);
  2375. mac_id++;
  2376. }
  2377. /* Configure monitor mode rings */
  2378. htt_srng_setup(soc->htt_handle, i,
  2379. pdev->rxdma_mon_buf_ring.hal_srng,
  2380. RXDMA_MONITOR_BUF);
  2381. htt_srng_setup(soc->htt_handle, i,
  2382. pdev->rxdma_mon_dst_ring.hal_srng,
  2383. RXDMA_MONITOR_DST);
  2384. htt_srng_setup(soc->htt_handle, i,
  2385. pdev->rxdma_mon_status_ring.hal_srng,
  2386. RXDMA_MONITOR_STATUS);
  2387. htt_srng_setup(soc->htt_handle, i,
  2388. pdev->rxdma_mon_desc_ring.hal_srng,
  2389. RXDMA_MONITOR_DESC);
  2390. }
  2391. }
  2392. /*
  2393. * Timer to reap rxdma status rings.
  2394. * Needed until we enable ppdu end interrupts
  2395. */
  2396. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2397. dp_service_mon_rings, (void *)soc,
  2398. QDF_TIMER_TYPE_WAKE_APPS);
  2399. soc->reap_timer_init = 1;
  2400. }
  2401. #else
  2402. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2403. {
  2404. int i;
  2405. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2406. struct dp_pdev *pdev = soc->pdev_list[i];
  2407. if (pdev) {
  2408. int ring_idx = dp_get_ring_id_for_mac_id(soc, i);
  2409. htt_srng_setup(soc->htt_handle, i,
  2410. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2411. htt_srng_setup(soc->htt_handle, i,
  2412. pdev->rxdma_mon_buf_ring.hal_srng,
  2413. RXDMA_MONITOR_BUF);
  2414. htt_srng_setup(soc->htt_handle, i,
  2415. pdev->rxdma_mon_dst_ring.hal_srng,
  2416. RXDMA_MONITOR_DST);
  2417. htt_srng_setup(soc->htt_handle, i,
  2418. pdev->rxdma_mon_status_ring.hal_srng,
  2419. RXDMA_MONITOR_STATUS);
  2420. htt_srng_setup(soc->htt_handle, i,
  2421. pdev->rxdma_mon_desc_ring.hal_srng,
  2422. RXDMA_MONITOR_DESC);
  2423. htt_srng_setup(soc->htt_handle, i,
  2424. pdev->rxdma_err_dst_ring[ring_idx].hal_srng,
  2425. RXDMA_DST);
  2426. }
  2427. }
  2428. }
  2429. #endif
  2430. /*
  2431. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2432. * @txrx_soc: Datapath SOC handle
  2433. */
  2434. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2435. {
  2436. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2437. htt_soc_attach_target(soc->htt_handle);
  2438. dp_rxdma_ring_config(soc);
  2439. DP_STATS_INIT(soc);
  2440. /* initialize work queue for stats processing */
  2441. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2442. return 0;
  2443. }
  2444. /*
  2445. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2446. * @txrx_soc: Datapath SOC handle
  2447. */
  2448. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2449. {
  2450. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2451. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2452. }
  2453. /*
  2454. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2455. * @txrx_soc: Datapath SOC handle
  2456. * @nss_cfg: nss config
  2457. */
  2458. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2459. {
  2460. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2461. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  2462. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2463. FL("nss-wifi<0> nss config is enabled"));
  2464. }
  2465. /*
  2466. * dp_vdev_attach_wifi3() - attach txrx vdev
  2467. * @txrx_pdev: Datapath PDEV handle
  2468. * @vdev_mac_addr: MAC address of the virtual interface
  2469. * @vdev_id: VDEV Id
  2470. * @wlan_op_mode: VDEV operating mode
  2471. *
  2472. * Return: DP VDEV handle on success, NULL on failure
  2473. */
  2474. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2475. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2476. {
  2477. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2478. struct dp_soc *soc = pdev->soc;
  2479. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2480. int tx_ring_size;
  2481. if (!vdev) {
  2482. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2483. FL("DP VDEV memory allocation failed"));
  2484. goto fail0;
  2485. }
  2486. vdev->pdev = pdev;
  2487. vdev->vdev_id = vdev_id;
  2488. vdev->opmode = op_mode;
  2489. vdev->osdev = soc->osdev;
  2490. vdev->osif_rx = NULL;
  2491. vdev->osif_rsim_rx_decap = NULL;
  2492. vdev->osif_get_key = NULL;
  2493. vdev->osif_rx_mon = NULL;
  2494. vdev->osif_tx_free_ext = NULL;
  2495. vdev->osif_vdev = NULL;
  2496. vdev->delete.pending = 0;
  2497. vdev->safemode = 0;
  2498. vdev->drop_unenc = 1;
  2499. vdev->sec_type = cdp_sec_type_none;
  2500. #ifdef notyet
  2501. vdev->filters_num = 0;
  2502. #endif
  2503. qdf_mem_copy(
  2504. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2505. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2506. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2507. vdev->dscp_tid_map_id = 0;
  2508. vdev->mcast_enhancement_en = 0;
  2509. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2510. /* TODO: Initialize default HTT meta data that will be used in
  2511. * TCL descriptors for packets transmitted from this VDEV
  2512. */
  2513. TAILQ_INIT(&vdev->peer_list);
  2514. /* add this vdev into the pdev's list */
  2515. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2516. pdev->vdev_count++;
  2517. dp_tx_vdev_attach(vdev);
  2518. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2519. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2520. goto fail1;
  2521. if ((soc->intr_mode == DP_INTR_POLL) &&
  2522. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2523. if (pdev->vdev_count == 1)
  2524. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2525. }
  2526. dp_lro_hash_setup(soc);
  2527. /* LRO */
  2528. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2529. wlan_op_mode_sta == vdev->opmode)
  2530. vdev->lro_enable = true;
  2531. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2532. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2533. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2534. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2535. DP_STATS_INIT(vdev);
  2536. return (struct cdp_vdev *)vdev;
  2537. fail1:
  2538. dp_tx_vdev_detach(vdev);
  2539. qdf_mem_free(vdev);
  2540. fail0:
  2541. return NULL;
  2542. }
  2543. /**
  2544. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2545. * @vdev: Datapath VDEV handle
  2546. * @osif_vdev: OSIF vdev handle
  2547. * @txrx_ops: Tx and Rx operations
  2548. *
  2549. * Return: DP VDEV handle on success, NULL on failure
  2550. */
  2551. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2552. void *osif_vdev,
  2553. struct ol_txrx_ops *txrx_ops)
  2554. {
  2555. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2556. vdev->osif_vdev = osif_vdev;
  2557. vdev->osif_rx = txrx_ops->rx.rx;
  2558. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2559. vdev->osif_get_key = txrx_ops->get_key;
  2560. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2561. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2562. #ifdef notyet
  2563. #if ATH_SUPPORT_WAPI
  2564. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2565. #endif
  2566. #endif
  2567. #ifdef UMAC_SUPPORT_PROXY_ARP
  2568. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2569. #endif
  2570. vdev->me_convert = txrx_ops->me_convert;
  2571. /* TODO: Enable the following once Tx code is integrated */
  2572. if (vdev->mesh_vdev)
  2573. txrx_ops->tx.tx = dp_tx_send_mesh;
  2574. else
  2575. txrx_ops->tx.tx = dp_tx_send;
  2576. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2577. "DP Vdev Register success");
  2578. }
  2579. /*
  2580. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2581. * @txrx_vdev: Datapath VDEV handle
  2582. * @callback: Callback OL_IF on completion of detach
  2583. * @cb_context: Callback context
  2584. *
  2585. */
  2586. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2587. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2588. {
  2589. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2590. struct dp_pdev *pdev = vdev->pdev;
  2591. struct dp_soc *soc = pdev->soc;
  2592. /* preconditions */
  2593. qdf_assert(vdev);
  2594. /* remove the vdev from its parent pdev's list */
  2595. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2596. /*
  2597. * Use peer_ref_mutex while accessing peer_list, in case
  2598. * a peer is in the process of being removed from the list.
  2599. */
  2600. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2601. /* check that the vdev has no peers allocated */
  2602. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2603. /* debug print - will be removed later */
  2604. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2605. FL("not deleting vdev object %pK (%pM)"
  2606. "until deletion finishes for all its peers"),
  2607. vdev, vdev->mac_addr.raw);
  2608. /* indicate that the vdev needs to be deleted */
  2609. vdev->delete.pending = 1;
  2610. vdev->delete.callback = callback;
  2611. vdev->delete.context = cb_context;
  2612. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2613. return;
  2614. }
  2615. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2616. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2617. vdev->vdev_id);
  2618. dp_tx_vdev_detach(vdev);
  2619. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2620. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2621. qdf_mem_free(vdev);
  2622. if (callback)
  2623. callback(cb_context);
  2624. }
  2625. /*
  2626. * dp_peer_create_wifi3() - attach txrx peer
  2627. * @txrx_vdev: Datapath VDEV handle
  2628. * @peer_mac_addr: Peer MAC address
  2629. *
  2630. * Return: DP peeer handle on success, NULL on failure
  2631. */
  2632. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2633. uint8_t *peer_mac_addr)
  2634. {
  2635. struct dp_peer *peer;
  2636. int i;
  2637. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2638. struct dp_pdev *pdev;
  2639. struct dp_soc *soc;
  2640. /* preconditions */
  2641. qdf_assert(vdev);
  2642. qdf_assert(peer_mac_addr);
  2643. pdev = vdev->pdev;
  2644. soc = pdev->soc;
  2645. #ifdef notyet
  2646. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2647. soc->mempool_ol_ath_peer);
  2648. #else
  2649. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2650. #endif
  2651. if (!peer)
  2652. return NULL; /* failure */
  2653. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2654. TAILQ_INIT(&peer->ast_entry_list);
  2655. /* store provided params */
  2656. peer->vdev = vdev;
  2657. dp_peer_add_ast(soc, peer, peer_mac_addr, dp_ast_type_static);
  2658. qdf_spinlock_create(&peer->peer_info_lock);
  2659. qdf_mem_copy(
  2660. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2661. /* TODO: See of rx_opt_proc is really required */
  2662. peer->rx_opt_proc = soc->rx_opt_proc;
  2663. /* initialize the peer_id */
  2664. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2665. peer->peer_ids[i] = HTT_INVALID_PEER;
  2666. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2667. qdf_atomic_init(&peer->ref_cnt);
  2668. /* keep one reference for attach */
  2669. qdf_atomic_inc(&peer->ref_cnt);
  2670. /* add this peer into the vdev's list */
  2671. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2672. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2673. /* TODO: See if hash based search is required */
  2674. dp_peer_find_hash_add(soc, peer);
  2675. /* Initialize the peer state */
  2676. peer->state = OL_TXRX_PEER_STATE_DISC;
  2677. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2678. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2679. vdev, peer, peer->mac_addr.raw,
  2680. qdf_atomic_read(&peer->ref_cnt));
  2681. /*
  2682. * For every peer MAp message search and set if bss_peer
  2683. */
  2684. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2686. "vdev bss_peer!!!!");
  2687. peer->bss_peer = 1;
  2688. vdev->vap_bss_peer = peer;
  2689. }
  2690. #ifndef CONFIG_WIN
  2691. dp_local_peer_id_alloc(pdev, peer);
  2692. #endif
  2693. DP_STATS_INIT(peer);
  2694. return (void *)peer;
  2695. }
  2696. /*
  2697. * dp_peer_setup_wifi3() - initialize the peer
  2698. * @vdev_hdl: virtual device object
  2699. * @peer: Peer object
  2700. *
  2701. * Return: void
  2702. */
  2703. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2704. {
  2705. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2706. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2707. struct dp_pdev *pdev;
  2708. struct dp_soc *soc;
  2709. bool hash_based = 0;
  2710. enum cdp_host_reo_dest_ring reo_dest;
  2711. /* preconditions */
  2712. qdf_assert(vdev);
  2713. qdf_assert(peer);
  2714. pdev = vdev->pdev;
  2715. soc = pdev->soc;
  2716. dp_peer_rx_init(pdev, peer);
  2717. peer->last_assoc_rcvd = 0;
  2718. peer->last_disassoc_rcvd = 0;
  2719. peer->last_deauth_rcvd = 0;
  2720. /*
  2721. * hash based steering is disabled for Radios which are offloaded
  2722. * to NSS
  2723. */
  2724. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2725. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2727. FL("hash based steering for pdev: %d is %d\n"),
  2728. pdev->pdev_id, hash_based);
  2729. /*
  2730. * Below line of code will ensure the proper reo_dest ring is choosen
  2731. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2732. */
  2733. reo_dest = pdev->reo_dest;
  2734. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2735. /* TODO: Check the destination ring number to be passed to FW */
  2736. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2737. pdev->osif_pdev, peer->mac_addr.raw,
  2738. peer->vdev->vdev_id, hash_based, reo_dest);
  2739. }
  2740. return;
  2741. }
  2742. /*
  2743. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  2744. * @vdev_handle: virtual device object
  2745. * @htt_pkt_type: type of pkt
  2746. *
  2747. * Return: void
  2748. */
  2749. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  2750. enum htt_cmn_pkt_type val)
  2751. {
  2752. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2753. vdev->tx_encap_type = val;
  2754. }
  2755. /*
  2756. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  2757. * @vdev_handle: virtual device object
  2758. * @htt_pkt_type: type of pkt
  2759. *
  2760. * Return: void
  2761. */
  2762. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  2763. enum htt_cmn_pkt_type val)
  2764. {
  2765. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2766. vdev->rx_decap_type = val;
  2767. }
  2768. /*
  2769. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2770. * @pdev_handle: physical device object
  2771. * @val: reo destination ring index (1 - 4)
  2772. *
  2773. * Return: void
  2774. */
  2775. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  2776. enum cdp_host_reo_dest_ring val)
  2777. {
  2778. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2779. if (pdev)
  2780. pdev->reo_dest = val;
  2781. }
  2782. /*
  2783. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2784. * @pdev_handle: physical device object
  2785. *
  2786. * Return: reo destination ring index
  2787. */
  2788. static enum cdp_host_reo_dest_ring
  2789. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  2790. {
  2791. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2792. if (pdev)
  2793. return pdev->reo_dest;
  2794. else
  2795. return cdp_host_reo_dest_ring_unknown;
  2796. }
  2797. #ifdef QCA_SUPPORT_SON
  2798. static void dp_son_peer_authorize(struct dp_peer *peer)
  2799. {
  2800. struct dp_soc *soc;
  2801. soc = peer->vdev->pdev->soc;
  2802. peer->peer_bs_inact_flag = 0;
  2803. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2804. return;
  2805. }
  2806. #else
  2807. static void dp_son_peer_authorize(struct dp_peer *peer)
  2808. {
  2809. return;
  2810. }
  2811. #endif
  2812. /*
  2813. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  2814. * @pdev_handle: device object
  2815. * @val: value to be set
  2816. *
  2817. * Return: void
  2818. */
  2819. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2820. uint32_t val)
  2821. {
  2822. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2823. /* Enable/Disable smart mesh filtering. This flag will be checked
  2824. * during rx processing to check if packets are from NAC clients.
  2825. */
  2826. pdev->filter_neighbour_peers = val;
  2827. return 0;
  2828. }
  2829. /*
  2830. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  2831. * address for smart mesh filtering
  2832. * @pdev_handle: device object
  2833. * @cmd: Add/Del command
  2834. * @macaddr: nac client mac address
  2835. *
  2836. * Return: void
  2837. */
  2838. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2839. uint32_t cmd, uint8_t *macaddr)
  2840. {
  2841. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2842. struct dp_neighbour_peer *peer = NULL;
  2843. if (!macaddr)
  2844. goto fail0;
  2845. /* Store address of NAC (neighbour peer) which will be checked
  2846. * against TA of received packets.
  2847. */
  2848. if (cmd == DP_NAC_PARAM_ADD) {
  2849. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  2850. sizeof(*peer));
  2851. if (!peer) {
  2852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2853. FL("DP neighbour peer node memory allocation failed"));
  2854. goto fail0;
  2855. }
  2856. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  2857. macaddr, DP_MAC_ADDR_LEN);
  2858. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2859. /* add this neighbour peer into the list */
  2860. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  2861. neighbour_peer_list_elem);
  2862. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2863. return 1;
  2864. } else if (cmd == DP_NAC_PARAM_DEL) {
  2865. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2866. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  2867. neighbour_peer_list_elem) {
  2868. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  2869. macaddr, DP_MAC_ADDR_LEN)) {
  2870. /* delete this peer from the list */
  2871. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2872. peer, neighbour_peer_list_elem);
  2873. qdf_mem_free(peer);
  2874. break;
  2875. }
  2876. }
  2877. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2878. return 1;
  2879. }
  2880. fail0:
  2881. return 0;
  2882. }
  2883. /*
  2884. * dp_get_sec_type() - Get the security type
  2885. * @peer: Datapath peer handle
  2886. * @sec_idx: Security id (mcast, ucast)
  2887. *
  2888. * return sec_type: Security type
  2889. */
  2890. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  2891. {
  2892. struct dp_peer *dpeer = (struct dp_peer *)peer;
  2893. return dpeer->security[sec_idx].sec_type;
  2894. }
  2895. /*
  2896. * dp_peer_authorize() - authorize txrx peer
  2897. * @peer_handle: Datapath peer handle
  2898. * @authorize
  2899. *
  2900. */
  2901. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  2902. {
  2903. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2904. struct dp_soc *soc;
  2905. if (peer != NULL) {
  2906. soc = peer->vdev->pdev->soc;
  2907. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2908. dp_son_peer_authorize(peer);
  2909. peer->authorize = authorize ? 1 : 0;
  2910. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2911. }
  2912. }
  2913. #ifdef QCA_SUPPORT_SON
  2914. /*
  2915. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  2916. * @pdev_handle: Device handle
  2917. * @new_threshold : updated threshold value
  2918. *
  2919. */
  2920. static void
  2921. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  2922. u_int16_t new_threshold)
  2923. {
  2924. struct dp_vdev *vdev;
  2925. struct dp_peer *peer;
  2926. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2927. struct dp_soc *soc = pdev->soc;
  2928. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  2929. if (old_threshold == new_threshold)
  2930. return;
  2931. soc->pdev_bs_inact_reload = new_threshold;
  2932. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2933. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2934. if (vdev->opmode != wlan_op_mode_ap)
  2935. continue;
  2936. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2937. if (!peer->authorize)
  2938. continue;
  2939. if (old_threshold - peer->peer_bs_inact >=
  2940. new_threshold) {
  2941. dp_mark_peer_inact((void *)peer, true);
  2942. peer->peer_bs_inact = 0;
  2943. } else {
  2944. peer->peer_bs_inact = new_threshold -
  2945. (old_threshold - peer->peer_bs_inact);
  2946. }
  2947. }
  2948. }
  2949. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2950. }
  2951. /**
  2952. * dp_txrx_reset_inact_count(): Reset inact count
  2953. * @pdev_handle - device handle
  2954. *
  2955. * Return: void
  2956. */
  2957. static void
  2958. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  2959. {
  2960. struct dp_vdev *vdev = NULL;
  2961. struct dp_peer *peer = NULL;
  2962. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2963. struct dp_soc *soc = pdev->soc;
  2964. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2965. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2966. if (vdev->opmode != wlan_op_mode_ap)
  2967. continue;
  2968. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2969. if (!peer->authorize)
  2970. continue;
  2971. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2972. }
  2973. }
  2974. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2975. }
  2976. /**
  2977. * dp_set_inact_params(): set inactivity params
  2978. * @pdev_handle - device handle
  2979. * @inact_check_interval - inactivity interval
  2980. * @inact_normal - Inactivity normal
  2981. * @inact_overload - Inactivity overload
  2982. *
  2983. * Return: bool
  2984. */
  2985. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  2986. u_int16_t inact_check_interval,
  2987. u_int16_t inact_normal, u_int16_t inact_overload)
  2988. {
  2989. struct dp_soc *soc;
  2990. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2991. if (!pdev)
  2992. return false;
  2993. soc = pdev->soc;
  2994. if (!soc)
  2995. return false;
  2996. soc->pdev_bs_inact_interval = inact_check_interval;
  2997. soc->pdev_bs_inact_normal = inact_normal;
  2998. soc->pdev_bs_inact_overload = inact_overload;
  2999. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3000. soc->pdev_bs_inact_normal);
  3001. return true;
  3002. }
  3003. /**
  3004. * dp_start_inact_timer(): Inactivity timer start
  3005. * @pdev_handle - device handle
  3006. * @enable - Inactivity timer start/stop
  3007. *
  3008. * Return: bool
  3009. */
  3010. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3011. {
  3012. struct dp_soc *soc;
  3013. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3014. if (!pdev)
  3015. return false;
  3016. soc = pdev->soc;
  3017. if (!soc)
  3018. return false;
  3019. if (enable) {
  3020. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3021. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3022. soc->pdev_bs_inact_interval * 1000);
  3023. } else {
  3024. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3025. }
  3026. return true;
  3027. }
  3028. /**
  3029. * dp_set_overload(): Set inactivity overload
  3030. * @pdev_handle - device handle
  3031. * @overload - overload status
  3032. *
  3033. * Return: void
  3034. */
  3035. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3036. {
  3037. struct dp_soc *soc;
  3038. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3039. if (!pdev)
  3040. return;
  3041. soc = pdev->soc;
  3042. if (!soc)
  3043. return;
  3044. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3045. overload ? soc->pdev_bs_inact_overload :
  3046. soc->pdev_bs_inact_normal);
  3047. }
  3048. /**
  3049. * dp_peer_is_inact(): check whether peer is inactive
  3050. * @peer_handle - datapath peer handle
  3051. *
  3052. * Return: bool
  3053. */
  3054. bool dp_peer_is_inact(void *peer_handle)
  3055. {
  3056. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3057. if (!peer)
  3058. return false;
  3059. return peer->peer_bs_inact_flag == 1;
  3060. }
  3061. #else
  3062. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3063. u_int16_t inact_normal, u_int16_t inact_overload)
  3064. {
  3065. return false;
  3066. }
  3067. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3068. {
  3069. return false;
  3070. }
  3071. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3072. {
  3073. return;
  3074. }
  3075. bool dp_peer_is_inact(void *peer)
  3076. {
  3077. return false;
  3078. }
  3079. void dp_mark_peer_inact(void *peer, bool inactive)
  3080. {
  3081. return;
  3082. }
  3083. #endif
  3084. /*
  3085. * dp_peer_unref_delete() - unref and delete peer
  3086. * @peer_handle: Datapath peer handle
  3087. *
  3088. */
  3089. void dp_peer_unref_delete(void *peer_handle)
  3090. {
  3091. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3092. struct dp_peer *bss_peer = NULL;
  3093. struct dp_vdev *vdev = peer->vdev;
  3094. struct dp_pdev *pdev = vdev->pdev;
  3095. struct dp_soc *soc = pdev->soc;
  3096. struct dp_peer *tmppeer;
  3097. int found = 0;
  3098. uint16_t peer_id;
  3099. /*
  3100. * Hold the lock all the way from checking if the peer ref count
  3101. * is zero until the peer references are removed from the hash
  3102. * table and vdev list (if the peer ref count is zero).
  3103. * This protects against a new HL tx operation starting to use the
  3104. * peer object just after this function concludes it's done being used.
  3105. * Furthermore, the lock needs to be held while checking whether the
  3106. * vdev's list of peers is empty, to make sure that list is not modified
  3107. * concurrently with the empty check.
  3108. */
  3109. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3110. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3111. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3112. peer, qdf_atomic_read(&peer->ref_cnt));
  3113. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3114. peer_id = peer->peer_ids[0];
  3115. /*
  3116. * Make sure that the reference to the peer in
  3117. * peer object map is removed
  3118. */
  3119. if (peer_id != HTT_INVALID_PEER)
  3120. soc->peer_id_to_obj_map[peer_id] = NULL;
  3121. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3122. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3123. /* remove the reference to the peer from the hash table */
  3124. dp_peer_find_hash_remove(soc, peer);
  3125. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3126. if (tmppeer == peer) {
  3127. found = 1;
  3128. break;
  3129. }
  3130. }
  3131. if (found) {
  3132. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3133. peer_list_elem);
  3134. } else {
  3135. /*Ignoring the remove operation as peer not found*/
  3136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3137. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3138. peer, vdev, &peer->vdev->peer_list);
  3139. }
  3140. /* cleanup the peer data */
  3141. dp_peer_cleanup(vdev, peer);
  3142. /* check whether the parent vdev has no peers left */
  3143. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3144. /*
  3145. * Now that there are no references to the peer, we can
  3146. * release the peer reference lock.
  3147. */
  3148. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3149. /*
  3150. * Check if the parent vdev was waiting for its peers
  3151. * to be deleted, in order for it to be deleted too.
  3152. */
  3153. if (vdev->delete.pending) {
  3154. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3155. vdev->delete.callback;
  3156. void *vdev_delete_context =
  3157. vdev->delete.context;
  3158. QDF_TRACE(QDF_MODULE_ID_DP,
  3159. QDF_TRACE_LEVEL_INFO_HIGH,
  3160. FL("deleting vdev object %pK (%pM)"
  3161. " - its last peer is done"),
  3162. vdev, vdev->mac_addr.raw);
  3163. /* all peers are gone, go ahead and delete it */
  3164. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id,
  3165. FLOW_TYPE_VDEV,
  3166. vdev->vdev_id);
  3167. dp_tx_vdev_detach(vdev);
  3168. QDF_TRACE(QDF_MODULE_ID_DP,
  3169. QDF_TRACE_LEVEL_INFO_HIGH,
  3170. FL("deleting vdev object %pK (%pM)"),
  3171. vdev, vdev->mac_addr.raw);
  3172. qdf_mem_free(vdev);
  3173. if (vdev_delete_cb)
  3174. vdev_delete_cb(vdev_delete_context);
  3175. }
  3176. } else {
  3177. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3178. }
  3179. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3180. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3181. vdev->vdev_id, peer->mac_addr.raw);
  3182. }
  3183. #ifdef notyet
  3184. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3185. #else
  3186. if (!vdev || !vdev->vap_bss_peer)
  3187. goto free_peer;
  3188. bss_peer = vdev->vap_bss_peer;
  3189. DP_UPDATE_STATS(bss_peer, peer);
  3190. free_peer:
  3191. qdf_mem_free(peer);
  3192. #endif
  3193. } else {
  3194. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3195. }
  3196. }
  3197. /*
  3198. * dp_peer_detach_wifi3() – Detach txrx peer
  3199. * @peer_handle: Datapath peer handle
  3200. * @bitmap: bitmap indicating special handling of request.
  3201. *
  3202. */
  3203. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3204. {
  3205. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3206. /* redirect the peer's rx delivery function to point to a
  3207. * discard func
  3208. */
  3209. peer->rx_opt_proc = dp_rx_discard;
  3210. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3211. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3212. #ifndef CONFIG_WIN
  3213. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3214. #endif
  3215. qdf_spinlock_destroy(&peer->peer_info_lock);
  3216. /*
  3217. * Remove the reference added during peer_attach.
  3218. * The peer will still be left allocated until the
  3219. * PEER_UNMAP message arrives to remove the other
  3220. * reference, added by the PEER_MAP message.
  3221. */
  3222. dp_peer_unref_delete(peer_handle);
  3223. }
  3224. /*
  3225. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3226. * @peer_handle: Datapath peer handle
  3227. *
  3228. */
  3229. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3230. {
  3231. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3232. return vdev->mac_addr.raw;
  3233. }
  3234. /*
  3235. * dp_vdev_set_wds() - Enable per packet stats
  3236. * @vdev_handle: DP VDEV handle
  3237. * @val: value
  3238. *
  3239. * Return: none
  3240. */
  3241. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3242. {
  3243. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3244. vdev->wds_enabled = val;
  3245. return 0;
  3246. }
  3247. /*
  3248. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3249. * @peer_handle: Datapath peer handle
  3250. *
  3251. */
  3252. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3253. uint8_t vdev_id)
  3254. {
  3255. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3256. struct dp_vdev *vdev = NULL;
  3257. if (qdf_unlikely(!pdev))
  3258. return NULL;
  3259. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3260. if (vdev->vdev_id == vdev_id)
  3261. break;
  3262. }
  3263. return (struct cdp_vdev *)vdev;
  3264. }
  3265. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3266. {
  3267. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3268. return vdev->opmode;
  3269. }
  3270. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3271. {
  3272. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3273. struct dp_pdev *pdev = vdev->pdev;
  3274. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3275. }
  3276. /**
  3277. * dp_reset_monitor_mode() - Disable monitor mode
  3278. * @pdev_handle: Datapath PDEV handle
  3279. *
  3280. * Return: 0 on success, not 0 on failure
  3281. */
  3282. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3283. {
  3284. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3285. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3286. struct dp_soc *soc;
  3287. uint8_t pdev_id;
  3288. pdev_id = pdev->pdev_id;
  3289. soc = pdev->soc;
  3290. pdev->monitor_vdev = NULL;
  3291. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3292. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3293. pdev->rxdma_mon_buf_ring.hal_srng,
  3294. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3295. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3296. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3297. RX_BUFFER_SIZE, &htt_tlv_filter);
  3298. return 0;
  3299. }
  3300. /**
  3301. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3302. * @vdev_handle: Datapath VDEV handle
  3303. * @smart_monitor: Flag to denote if its smart monitor mode
  3304. *
  3305. * Return: 0 on success, not 0 on failure
  3306. */
  3307. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3308. uint8_t smart_monitor)
  3309. {
  3310. /* Many monitor VAPs can exists in a system but only one can be up at
  3311. * anytime
  3312. */
  3313. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3314. struct dp_pdev *pdev;
  3315. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3316. struct dp_soc *soc;
  3317. uint8_t pdev_id;
  3318. qdf_assert(vdev);
  3319. pdev = vdev->pdev;
  3320. pdev_id = pdev->pdev_id;
  3321. soc = pdev->soc;
  3322. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3323. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3324. pdev, pdev_id, soc, vdev);
  3325. /*Check if current pdev's monitor_vdev exists */
  3326. if (pdev->monitor_vdev) {
  3327. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3328. "vdev=%pK\n", vdev);
  3329. qdf_assert(vdev);
  3330. }
  3331. pdev->monitor_vdev = vdev;
  3332. /* If smart monitor mode, do not configure monitor ring */
  3333. if (smart_monitor)
  3334. return QDF_STATUS_SUCCESS;
  3335. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3336. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3337. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3338. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3339. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3340. pdev->mo_data_filter);
  3341. htt_tlv_filter.mpdu_start = 1;
  3342. htt_tlv_filter.msdu_start = 1;
  3343. htt_tlv_filter.packet = 1;
  3344. htt_tlv_filter.msdu_end = 1;
  3345. htt_tlv_filter.mpdu_end = 1;
  3346. htt_tlv_filter.packet_header = 1;
  3347. htt_tlv_filter.attention = 1;
  3348. htt_tlv_filter.ppdu_start = 0;
  3349. htt_tlv_filter.ppdu_end = 0;
  3350. htt_tlv_filter.ppdu_end_user_stats = 0;
  3351. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3352. htt_tlv_filter.ppdu_end_status_done = 0;
  3353. htt_tlv_filter.header_per_msdu = 1;
  3354. htt_tlv_filter.enable_fp =
  3355. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3356. htt_tlv_filter.enable_md = 0;
  3357. htt_tlv_filter.enable_mo =
  3358. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3359. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3360. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3361. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3362. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3363. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3364. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3365. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3366. pdev->rxdma_mon_buf_ring.hal_srng,
  3367. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3368. htt_tlv_filter.mpdu_start = 1;
  3369. htt_tlv_filter.msdu_start = 1;
  3370. htt_tlv_filter.packet = 0;
  3371. htt_tlv_filter.msdu_end = 1;
  3372. htt_tlv_filter.mpdu_end = 1;
  3373. htt_tlv_filter.packet_header = 1;
  3374. htt_tlv_filter.attention = 1;
  3375. htt_tlv_filter.ppdu_start = 1;
  3376. htt_tlv_filter.ppdu_end = 1;
  3377. htt_tlv_filter.ppdu_end_user_stats = 1;
  3378. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3379. htt_tlv_filter.ppdu_end_status_done = 1;
  3380. htt_tlv_filter.header_per_msdu = 0;
  3381. htt_tlv_filter.enable_fp =
  3382. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3383. htt_tlv_filter.enable_md = 0;
  3384. htt_tlv_filter.enable_mo =
  3385. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3386. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3387. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3388. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3389. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3390. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3391. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3392. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3393. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3394. RX_BUFFER_SIZE, &htt_tlv_filter);
  3395. return QDF_STATUS_SUCCESS;
  3396. }
  3397. /**
  3398. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3399. * @pdev_handle: Datapath PDEV handle
  3400. * @filter_val: Flag to select Filter for monitor mode
  3401. * Return: 0 on success, not 0 on failure
  3402. */
  3403. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3404. struct cdp_monitor_filter *filter_val)
  3405. {
  3406. /* Many monitor VAPs can exists in a system but only one can be up at
  3407. * anytime
  3408. */
  3409. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3410. struct dp_vdev *vdev = pdev->monitor_vdev;
  3411. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3412. struct dp_soc *soc;
  3413. uint8_t pdev_id;
  3414. pdev_id = pdev->pdev_id;
  3415. soc = pdev->soc;
  3416. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3417. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3418. pdev, pdev_id, soc, vdev);
  3419. /*Check if current pdev's monitor_vdev exists */
  3420. if (!pdev->monitor_vdev) {
  3421. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3422. "vdev=%pK\n", vdev);
  3423. qdf_assert(vdev);
  3424. }
  3425. /* update filter mode, type in pdev structure */
  3426. pdev->mon_filter_mode = filter_val->mode;
  3427. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3428. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3429. pdev->fp_data_filter = filter_val->fp_data;
  3430. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3431. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3432. pdev->mo_data_filter = filter_val->mo_data;
  3433. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3434. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3435. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3436. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3437. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3438. pdev->mo_data_filter);
  3439. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3440. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3441. pdev->rxdma_mon_buf_ring.hal_srng,
  3442. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3443. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3444. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3445. RX_BUFFER_SIZE, &htt_tlv_filter);
  3446. htt_tlv_filter.mpdu_start = 1;
  3447. htt_tlv_filter.msdu_start = 1;
  3448. htt_tlv_filter.packet = 1;
  3449. htt_tlv_filter.msdu_end = 1;
  3450. htt_tlv_filter.mpdu_end = 1;
  3451. htt_tlv_filter.packet_header = 1;
  3452. htt_tlv_filter.attention = 1;
  3453. htt_tlv_filter.ppdu_start = 0;
  3454. htt_tlv_filter.ppdu_end = 0;
  3455. htt_tlv_filter.ppdu_end_user_stats = 0;
  3456. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3457. htt_tlv_filter.ppdu_end_status_done = 0;
  3458. htt_tlv_filter.header_per_msdu = 1;
  3459. htt_tlv_filter.enable_fp =
  3460. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3461. htt_tlv_filter.enable_md = 0;
  3462. htt_tlv_filter.enable_mo =
  3463. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3464. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3465. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3466. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3467. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3468. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3469. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3470. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3471. pdev->rxdma_mon_buf_ring.hal_srng, RXDMA_MONITOR_BUF,
  3472. RX_BUFFER_SIZE, &htt_tlv_filter);
  3473. htt_tlv_filter.mpdu_start = 1;
  3474. htt_tlv_filter.msdu_start = 1;
  3475. htt_tlv_filter.packet = 0;
  3476. htt_tlv_filter.msdu_end = 1;
  3477. htt_tlv_filter.mpdu_end = 1;
  3478. htt_tlv_filter.packet_header = 1;
  3479. htt_tlv_filter.attention = 1;
  3480. htt_tlv_filter.ppdu_start = 1;
  3481. htt_tlv_filter.ppdu_end = 1;
  3482. htt_tlv_filter.ppdu_end_user_stats = 1;
  3483. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3484. htt_tlv_filter.ppdu_end_status_done = 1;
  3485. htt_tlv_filter.header_per_msdu = 0;
  3486. htt_tlv_filter.enable_fp =
  3487. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3488. htt_tlv_filter.enable_md = 0;
  3489. htt_tlv_filter.enable_mo =
  3490. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3491. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3492. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3493. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3494. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3495. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3496. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3497. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3498. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3499. RX_BUFFER_SIZE, &htt_tlv_filter);
  3500. return QDF_STATUS_SUCCESS;
  3501. }
  3502. #ifdef MESH_MODE_SUPPORT
  3503. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3504. {
  3505. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3506. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3507. FL("val %d"), val);
  3508. vdev->mesh_vdev = val;
  3509. }
  3510. /*
  3511. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3512. * @vdev_hdl: virtual device object
  3513. * @val: value to be set
  3514. *
  3515. * Return: void
  3516. */
  3517. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3518. {
  3519. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3520. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3521. FL("val %d"), val);
  3522. vdev->mesh_rx_filter = val;
  3523. }
  3524. #endif
  3525. /*
  3526. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3527. * Current scope is bar recieved count
  3528. *
  3529. * @pdev_handle: DP_PDEV handle
  3530. *
  3531. * Return: void
  3532. */
  3533. #define STATS_PROC_TIMEOUT (HZ/10)
  3534. static void
  3535. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3536. {
  3537. struct dp_vdev *vdev;
  3538. struct dp_peer *peer;
  3539. uint32_t waitcnt;
  3540. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3541. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3542. if (!peer) {
  3543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3544. FL("DP Invalid Peer refernce"));
  3545. return;
  3546. }
  3547. waitcnt = 0;
  3548. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3549. while (!(qdf_atomic_read(&(pdev->stats.cmd_complete)))
  3550. && waitcnt < 10) {
  3551. schedule_timeout_interruptible(
  3552. STATS_PROC_TIMEOUT);
  3553. waitcnt++;
  3554. }
  3555. qdf_atomic_set(&(pdev->stats.cmd_complete), 0);
  3556. }
  3557. }
  3558. }
  3559. /**
  3560. * dp_rx_bar_stats_cb(): BAR received stats callback
  3561. * @soc: SOC handle
  3562. * @cb_ctxt: Call back context
  3563. * @reo_status: Reo status
  3564. *
  3565. * return: void
  3566. */
  3567. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3568. union hal_reo_status *reo_status)
  3569. {
  3570. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3571. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3572. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3573. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3574. queue_status->header.status);
  3575. qdf_atomic_set(&(pdev->stats.cmd_complete), 1);
  3576. return;
  3577. }
  3578. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3579. qdf_atomic_set(&(pdev->stats.cmd_complete), 1);
  3580. }
  3581. /**
  3582. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  3583. * @vdev: DP VDEV handle
  3584. *
  3585. * return: void
  3586. */
  3587. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  3588. {
  3589. struct dp_peer *peer = NULL;
  3590. struct dp_soc *soc = vdev->pdev->soc;
  3591. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  3592. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  3593. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  3594. DP_UPDATE_STATS(vdev, peer);
  3595. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3596. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  3597. &vdev->stats, (uint16_t) vdev->vdev_id,
  3598. UPDATE_VDEV_STATS);
  3599. }
  3600. /**
  3601. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  3602. * @pdev: DP PDEV handle
  3603. *
  3604. * return: void
  3605. */
  3606. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  3607. {
  3608. struct dp_vdev *vdev = NULL;
  3609. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  3610. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  3611. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  3612. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3613. dp_aggregate_vdev_stats(vdev);
  3614. DP_UPDATE_STATS(pdev, vdev);
  3615. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  3616. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  3617. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  3618. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  3619. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  3620. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  3621. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  3622. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  3623. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  3624. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  3625. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  3626. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  3627. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  3628. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  3629. DP_STATS_AGGR(pdev, vdev,
  3630. tx_i.mcast_en.dropped_map_error);
  3631. DP_STATS_AGGR(pdev, vdev,
  3632. tx_i.mcast_en.dropped_self_mac);
  3633. DP_STATS_AGGR(pdev, vdev,
  3634. tx_i.mcast_en.dropped_send_fail);
  3635. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  3636. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  3637. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  3638. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  3639. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  3640. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  3641. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  3642. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  3643. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  3644. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  3645. pdev->stats.tx_i.dropped.dropped_pkt.num =
  3646. pdev->stats.tx_i.dropped.dma_error +
  3647. pdev->stats.tx_i.dropped.ring_full +
  3648. pdev->stats.tx_i.dropped.enqueue_fail +
  3649. pdev->stats.tx_i.dropped.desc_na +
  3650. pdev->stats.tx_i.dropped.res_full;
  3651. pdev->stats.tx.last_ack_rssi =
  3652. vdev->stats.tx.last_ack_rssi;
  3653. pdev->stats.tx_i.tso.num_seg =
  3654. vdev->stats.tx_i.tso.num_seg;
  3655. }
  3656. }
  3657. /**
  3658. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  3659. * @pdev: DP_PDEV Handle
  3660. *
  3661. * Return:void
  3662. */
  3663. static inline void
  3664. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  3665. {
  3666. DP_PRINT_STATS("PDEV Tx Stats:\n");
  3667. DP_PRINT_STATS("Received From Stack:");
  3668. DP_PRINT_STATS(" Packets = %d",
  3669. pdev->stats.tx_i.rcvd.num);
  3670. DP_PRINT_STATS(" Bytes = %llu",
  3671. pdev->stats.tx_i.rcvd.bytes);
  3672. DP_PRINT_STATS("Processed:");
  3673. DP_PRINT_STATS(" Packets = %d",
  3674. pdev->stats.tx_i.processed.num);
  3675. DP_PRINT_STATS(" Bytes = %llu",
  3676. pdev->stats.tx_i.processed.bytes);
  3677. DP_PRINT_STATS("Completions:");
  3678. DP_PRINT_STATS(" Packets = %d",
  3679. pdev->stats.tx.comp_pkt.num);
  3680. DP_PRINT_STATS(" Bytes = %llu",
  3681. pdev->stats.tx.comp_pkt.bytes);
  3682. DP_PRINT_STATS("Dropped:");
  3683. DP_PRINT_STATS(" Total = %d",
  3684. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3685. DP_PRINT_STATS(" Dma_map_error = %d",
  3686. pdev->stats.tx_i.dropped.dma_error);
  3687. DP_PRINT_STATS(" Ring Full = %d",
  3688. pdev->stats.tx_i.dropped.ring_full);
  3689. DP_PRINT_STATS(" Descriptor Not available = %d",
  3690. pdev->stats.tx_i.dropped.desc_na);
  3691. DP_PRINT_STATS(" HW enqueue failed= %d",
  3692. pdev->stats.tx_i.dropped.enqueue_fail);
  3693. DP_PRINT_STATS(" Resources Full = %d",
  3694. pdev->stats.tx_i.dropped.res_full);
  3695. DP_PRINT_STATS(" FW removed = %d",
  3696. pdev->stats.tx.dropped.fw_rem);
  3697. DP_PRINT_STATS(" FW removed transmitted = %d",
  3698. pdev->stats.tx.dropped.fw_rem_tx);
  3699. DP_PRINT_STATS(" FW removed untransmitted = %d",
  3700. pdev->stats.tx.dropped.fw_rem_notx);
  3701. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  3702. pdev->stats.tx.dropped.age_out);
  3703. DP_PRINT_STATS("Scatter Gather:");
  3704. DP_PRINT_STATS(" Packets = %d",
  3705. pdev->stats.tx_i.sg.sg_pkt.num);
  3706. DP_PRINT_STATS(" Bytes = %llu",
  3707. pdev->stats.tx_i.sg.sg_pkt.bytes);
  3708. DP_PRINT_STATS(" Dropped By Host = %d",
  3709. pdev->stats.tx_i.sg.dropped_host);
  3710. DP_PRINT_STATS(" Dropped By Target = %d",
  3711. pdev->stats.tx_i.sg.dropped_target);
  3712. DP_PRINT_STATS("TSO:");
  3713. DP_PRINT_STATS(" Number of Segments = %d",
  3714. pdev->stats.tx_i.tso.num_seg);
  3715. DP_PRINT_STATS(" Packets = %d",
  3716. pdev->stats.tx_i.tso.tso_pkt.num);
  3717. DP_PRINT_STATS(" Bytes = %llu",
  3718. pdev->stats.tx_i.tso.tso_pkt.bytes);
  3719. DP_PRINT_STATS(" Dropped By Host = %d",
  3720. pdev->stats.tx_i.tso.dropped_host);
  3721. DP_PRINT_STATS("Mcast Enhancement:");
  3722. DP_PRINT_STATS(" Packets = %d",
  3723. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  3724. DP_PRINT_STATS(" Bytes = %llu",
  3725. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  3726. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  3727. pdev->stats.tx_i.mcast_en.dropped_map_error);
  3728. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  3729. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  3730. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  3731. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  3732. DP_PRINT_STATS(" Unicast sent = %d",
  3733. pdev->stats.tx_i.mcast_en.ucast);
  3734. DP_PRINT_STATS("Raw:");
  3735. DP_PRINT_STATS(" Packets = %d",
  3736. pdev->stats.tx_i.raw.raw_pkt.num);
  3737. DP_PRINT_STATS(" Bytes = %llu",
  3738. pdev->stats.tx_i.raw.raw_pkt.bytes);
  3739. DP_PRINT_STATS(" DMA map error = %d",
  3740. pdev->stats.tx_i.raw.dma_map_error);
  3741. DP_PRINT_STATS("Reinjected:");
  3742. DP_PRINT_STATS(" Packets = %d",
  3743. pdev->stats.tx_i.reinject_pkts.num);
  3744. DP_PRINT_STATS("Bytes = %llu\n",
  3745. pdev->stats.tx_i.reinject_pkts.bytes);
  3746. DP_PRINT_STATS("Inspected:");
  3747. DP_PRINT_STATS(" Packets = %d",
  3748. pdev->stats.tx_i.inspect_pkts.num);
  3749. DP_PRINT_STATS(" Bytes = %llu",
  3750. pdev->stats.tx_i.inspect_pkts.bytes);
  3751. DP_PRINT_STATS("Nawds Multicast:");
  3752. DP_PRINT_STATS(" Packets = %d",
  3753. pdev->stats.tx_i.nawds_mcast.num);
  3754. DP_PRINT_STATS(" Bytes = %llu",
  3755. pdev->stats.tx_i.nawds_mcast.bytes);
  3756. DP_PRINT_STATS("CCE Classified:");
  3757. DP_PRINT_STATS(" CCE Classified Packets: %u",
  3758. pdev->stats.tx_i.cce_classified);
  3759. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  3760. pdev->stats.tx_i.cce_classified_raw);
  3761. DP_PRINT_STATS("Mesh stats:");
  3762. DP_PRINT_STATS(" frames to firmware: %u",
  3763. pdev->stats.tx_i.mesh.exception_fw);
  3764. DP_PRINT_STATS(" completions from fw: %u",
  3765. pdev->stats.tx_i.mesh.completion_fw);
  3766. }
  3767. /**
  3768. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  3769. * @pdev: DP_PDEV Handle
  3770. *
  3771. * Return: void
  3772. */
  3773. static inline void
  3774. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  3775. {
  3776. DP_PRINT_STATS("PDEV Rx Stats:\n");
  3777. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  3778. DP_PRINT_STATS(" Packets = %d %d %d %d",
  3779. pdev->stats.rx.rcvd_reo[0].num,
  3780. pdev->stats.rx.rcvd_reo[1].num,
  3781. pdev->stats.rx.rcvd_reo[2].num,
  3782. pdev->stats.rx.rcvd_reo[3].num);
  3783. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  3784. pdev->stats.rx.rcvd_reo[0].bytes,
  3785. pdev->stats.rx.rcvd_reo[1].bytes,
  3786. pdev->stats.rx.rcvd_reo[2].bytes,
  3787. pdev->stats.rx.rcvd_reo[3].bytes);
  3788. DP_PRINT_STATS("Replenished:");
  3789. DP_PRINT_STATS(" Packets = %d",
  3790. pdev->stats.replenish.pkts.num);
  3791. DP_PRINT_STATS(" Bytes = %llu",
  3792. pdev->stats.replenish.pkts.bytes);
  3793. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  3794. pdev->stats.buf_freelist);
  3795. DP_PRINT_STATS(" Low threshold intr = %d",
  3796. pdev->stats.replenish.low_thresh_intrs);
  3797. DP_PRINT_STATS("Dropped:");
  3798. DP_PRINT_STATS(" msdu_not_done = %d",
  3799. pdev->stats.dropped.msdu_not_done);
  3800. DP_PRINT_STATS("Sent To Stack:");
  3801. DP_PRINT_STATS(" Packets = %d",
  3802. pdev->stats.rx.to_stack.num);
  3803. DP_PRINT_STATS(" Bytes = %llu",
  3804. pdev->stats.rx.to_stack.bytes);
  3805. DP_PRINT_STATS("Multicast/Broadcast:");
  3806. DP_PRINT_STATS(" Packets = %d",
  3807. pdev->stats.rx.multicast.num);
  3808. DP_PRINT_STATS(" Bytes = %llu",
  3809. pdev->stats.rx.multicast.bytes);
  3810. DP_PRINT_STATS("Errors:");
  3811. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  3812. pdev->stats.replenish.rxdma_err);
  3813. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  3814. pdev->stats.err.desc_alloc_fail);
  3815. /* Get bar_recv_cnt */
  3816. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  3817. DP_PRINT_STATS("BAR Received Count: = %d",
  3818. pdev->stats.rx.bar_recv_cnt);
  3819. }
  3820. /**
  3821. * dp_print_soc_tx_stats(): Print SOC level stats
  3822. * @soc DP_SOC Handle
  3823. *
  3824. * Return: void
  3825. */
  3826. static inline void
  3827. dp_print_soc_tx_stats(struct dp_soc *soc)
  3828. {
  3829. DP_PRINT_STATS("SOC Tx Stats:\n");
  3830. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  3831. soc->stats.tx.desc_in_use);
  3832. DP_PRINT_STATS("Invalid peer:");
  3833. DP_PRINT_STATS(" Packets = %d",
  3834. soc->stats.tx.tx_invalid_peer.num);
  3835. DP_PRINT_STATS(" Bytes = %llu",
  3836. soc->stats.tx.tx_invalid_peer.bytes);
  3837. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  3838. soc->stats.tx.tcl_ring_full[0],
  3839. soc->stats.tx.tcl_ring_full[1],
  3840. soc->stats.tx.tcl_ring_full[2]);
  3841. }
  3842. /**
  3843. * dp_print_soc_rx_stats: Print SOC level Rx stats
  3844. * @soc: DP_SOC Handle
  3845. *
  3846. * Return:void
  3847. */
  3848. static inline void
  3849. dp_print_soc_rx_stats(struct dp_soc *soc)
  3850. {
  3851. uint32_t i;
  3852. char reo_error[DP_REO_ERR_LENGTH];
  3853. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  3854. uint8_t index = 0;
  3855. DP_PRINT_STATS("SOC Rx Stats:\n");
  3856. DP_PRINT_STATS("Errors:\n");
  3857. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  3858. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  3859. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  3860. DP_PRINT_STATS("Invalid RBM = %d",
  3861. soc->stats.rx.err.invalid_rbm);
  3862. DP_PRINT_STATS("Invalid Vdev = %d",
  3863. soc->stats.rx.err.invalid_vdev);
  3864. DP_PRINT_STATS("Invalid Pdev = %d",
  3865. soc->stats.rx.err.invalid_pdev);
  3866. DP_PRINT_STATS("Invalid Peer = %d",
  3867. soc->stats.rx.err.rx_invalid_peer.num);
  3868. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  3869. soc->stats.rx.err.hal_ring_access_fail);
  3870. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  3871. index += qdf_snprint(&rxdma_error[index],
  3872. DP_RXDMA_ERR_LENGTH - index,
  3873. " %d", soc->stats.rx.err.rxdma_error[i]);
  3874. }
  3875. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  3876. rxdma_error);
  3877. index = 0;
  3878. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  3879. index += qdf_snprint(&reo_error[index],
  3880. DP_REO_ERR_LENGTH - index,
  3881. " %d", soc->stats.rx.err.reo_error[i]);
  3882. }
  3883. DP_PRINT_STATS("REO Error(0-14):%s",
  3884. reo_error);
  3885. }
  3886. /**
  3887. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  3888. * @soc: DP_SOC handle
  3889. * @srng: DP_SRNG handle
  3890. * @ring_name: SRNG name
  3891. *
  3892. * Return: void
  3893. */
  3894. static inline void
  3895. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  3896. char *ring_name)
  3897. {
  3898. uint32_t tailp;
  3899. uint32_t headp;
  3900. if (srng->hal_srng != NULL) {
  3901. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  3902. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  3903. ring_name, headp, tailp);
  3904. }
  3905. }
  3906. /**
  3907. * dp_print_ring_stats(): Print tail and head pointer
  3908. * @pdev: DP_PDEV handle
  3909. *
  3910. * Return:void
  3911. */
  3912. static inline void
  3913. dp_print_ring_stats(struct dp_pdev *pdev)
  3914. {
  3915. uint32_t i;
  3916. char ring_name[STR_MAXLEN + 1];
  3917. dp_print_ring_stat_from_hal(pdev->soc,
  3918. &pdev->soc->reo_exception_ring,
  3919. "Reo Exception Ring");
  3920. dp_print_ring_stat_from_hal(pdev->soc,
  3921. &pdev->soc->reo_reinject_ring,
  3922. "Reo Inject Ring");
  3923. dp_print_ring_stat_from_hal(pdev->soc,
  3924. &pdev->soc->reo_cmd_ring,
  3925. "Reo Command Ring");
  3926. dp_print_ring_stat_from_hal(pdev->soc,
  3927. &pdev->soc->reo_status_ring,
  3928. "Reo Status Ring");
  3929. dp_print_ring_stat_from_hal(pdev->soc,
  3930. &pdev->soc->rx_rel_ring,
  3931. "Rx Release ring");
  3932. dp_print_ring_stat_from_hal(pdev->soc,
  3933. &pdev->soc->tcl_cmd_ring,
  3934. "Tcl command Ring");
  3935. dp_print_ring_stat_from_hal(pdev->soc,
  3936. &pdev->soc->tcl_status_ring,
  3937. "Tcl Status Ring");
  3938. dp_print_ring_stat_from_hal(pdev->soc,
  3939. &pdev->soc->wbm_desc_rel_ring,
  3940. "Wbm Desc Rel Ring");
  3941. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  3942. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  3943. dp_print_ring_stat_from_hal(pdev->soc,
  3944. &pdev->soc->reo_dest_ring[i],
  3945. ring_name);
  3946. }
  3947. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  3948. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  3949. dp_print_ring_stat_from_hal(pdev->soc,
  3950. &pdev->soc->tcl_data_ring[i],
  3951. ring_name);
  3952. }
  3953. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  3954. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  3955. dp_print_ring_stat_from_hal(pdev->soc,
  3956. &pdev->soc->tx_comp_ring[i],
  3957. ring_name);
  3958. }
  3959. dp_print_ring_stat_from_hal(pdev->soc,
  3960. &pdev->rx_refill_buf_ring,
  3961. "Rx Refill Buf Ring");
  3962. dp_print_ring_stat_from_hal(pdev->soc,
  3963. &pdev->rx_refill_buf_ring2,
  3964. "Second Rx Refill Buf Ring");
  3965. dp_print_ring_stat_from_hal(pdev->soc,
  3966. &pdev->rxdma_mon_buf_ring,
  3967. "Rxdma Mon Buf Ring");
  3968. dp_print_ring_stat_from_hal(pdev->soc,
  3969. &pdev->rxdma_mon_dst_ring,
  3970. "Rxdma Mon Dst Ring");
  3971. dp_print_ring_stat_from_hal(pdev->soc,
  3972. &pdev->rxdma_mon_status_ring,
  3973. "Rxdma Mon Status Ring");
  3974. dp_print_ring_stat_from_hal(pdev->soc,
  3975. &pdev->rxdma_mon_desc_ring,
  3976. "Rxdma mon desc Ring");
  3977. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  3978. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  3979. dp_print_ring_stat_from_hal(pdev->soc,
  3980. &pdev->rxdma_err_dst_ring[i],
  3981. ring_name);
  3982. }
  3983. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  3984. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  3985. dp_print_ring_stat_from_hal(pdev->soc,
  3986. &pdev->rx_mac_buf_ring[i],
  3987. ring_name);
  3988. }
  3989. }
  3990. /**
  3991. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  3992. * @vdev: DP_VDEV handle
  3993. *
  3994. * Return:void
  3995. */
  3996. static inline void
  3997. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  3998. {
  3999. struct dp_peer *peer = NULL;
  4000. DP_STATS_CLR(vdev->pdev);
  4001. DP_STATS_CLR(vdev->pdev->soc);
  4002. DP_STATS_CLR(vdev);
  4003. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4004. if (!peer)
  4005. return;
  4006. DP_STATS_CLR(peer);
  4007. }
  4008. }
  4009. /**
  4010. * dp_print_rx_rates(): Print Rx rate stats
  4011. * @vdev: DP_VDEV handle
  4012. *
  4013. * Return:void
  4014. */
  4015. static inline void
  4016. dp_print_rx_rates(struct dp_vdev *vdev)
  4017. {
  4018. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4019. uint8_t i, mcs, pkt_type;
  4020. uint8_t index = 0;
  4021. char nss[DP_NSS_LENGTH];
  4022. DP_PRINT_STATS("Rx Rate Info:\n");
  4023. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4024. index = 0;
  4025. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4026. if (!dp_rate_string[pkt_type][mcs].valid)
  4027. continue;
  4028. DP_PRINT_STATS(" %s = %d",
  4029. dp_rate_string[pkt_type][mcs].mcs_type,
  4030. pdev->stats.rx.pkt_type[pkt_type].
  4031. mcs_count[mcs]);
  4032. }
  4033. DP_PRINT_STATS("\n");
  4034. }
  4035. index = 0;
  4036. for (i = 0; i < SS_COUNT; i++) {
  4037. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4038. " %d", pdev->stats.rx.nss[i]);
  4039. }
  4040. DP_PRINT_STATS("NSS(1-8) = %s",
  4041. nss);
  4042. DP_PRINT_STATS("SGI ="
  4043. " 0.8us %d,"
  4044. " 0.4us %d,"
  4045. " 1.6us %d,"
  4046. " 3.2us %d,",
  4047. pdev->stats.rx.sgi_count[0],
  4048. pdev->stats.rx.sgi_count[1],
  4049. pdev->stats.rx.sgi_count[2],
  4050. pdev->stats.rx.sgi_count[3]);
  4051. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4052. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4053. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4054. DP_PRINT_STATS("Reception Type ="
  4055. " SU: %d,"
  4056. " MU_MIMO:%d,"
  4057. " MU_OFDMA:%d,"
  4058. " MU_OFDMA_MIMO:%d\n",
  4059. pdev->stats.rx.reception_type[0],
  4060. pdev->stats.rx.reception_type[1],
  4061. pdev->stats.rx.reception_type[2],
  4062. pdev->stats.rx.reception_type[3]);
  4063. DP_PRINT_STATS("Aggregation:\n");
  4064. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4065. pdev->stats.rx.ampdu_cnt);
  4066. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4067. pdev->stats.rx.non_ampdu_cnt);
  4068. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4069. pdev->stats.rx.amsdu_cnt);
  4070. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4071. pdev->stats.rx.non_amsdu_cnt);
  4072. }
  4073. /**
  4074. * dp_print_tx_rates(): Print tx rates
  4075. * @vdev: DP_VDEV handle
  4076. *
  4077. * Return:void
  4078. */
  4079. static inline void
  4080. dp_print_tx_rates(struct dp_vdev *vdev)
  4081. {
  4082. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4083. uint8_t mcs, pkt_type;
  4084. uint32_t index;
  4085. DP_PRINT_STATS("Tx Rate Info:\n");
  4086. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4087. index = 0;
  4088. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4089. if (!dp_rate_string[pkt_type][mcs].valid)
  4090. continue;
  4091. DP_PRINT_STATS(" %s = %d",
  4092. dp_rate_string[pkt_type][mcs].mcs_type,
  4093. pdev->stats.tx.pkt_type[pkt_type].
  4094. mcs_count[mcs]);
  4095. }
  4096. DP_PRINT_STATS("\n");
  4097. }
  4098. DP_PRINT_STATS("SGI ="
  4099. " 0.8us %d"
  4100. " 0.4us %d"
  4101. " 1.6us %d"
  4102. " 3.2us %d",
  4103. pdev->stats.tx.sgi_count[0],
  4104. pdev->stats.tx.sgi_count[1],
  4105. pdev->stats.tx.sgi_count[2],
  4106. pdev->stats.tx.sgi_count[3]);
  4107. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4108. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4109. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4110. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4111. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4112. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4113. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4114. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4115. DP_PRINT_STATS("Aggregation:\n");
  4116. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4117. pdev->stats.tx.amsdu_cnt);
  4118. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4119. pdev->stats.tx.non_amsdu_cnt);
  4120. }
  4121. /**
  4122. * dp_print_peer_stats():print peer stats
  4123. * @peer: DP_PEER handle
  4124. *
  4125. * return void
  4126. */
  4127. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4128. {
  4129. uint8_t i, mcs, pkt_type;
  4130. uint32_t index;
  4131. char nss[DP_NSS_LENGTH];
  4132. DP_PRINT_STATS("Node Tx Stats:\n");
  4133. DP_PRINT_STATS("Total Packet Completions = %d",
  4134. peer->stats.tx.comp_pkt.num);
  4135. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4136. peer->stats.tx.comp_pkt.bytes);
  4137. DP_PRINT_STATS("Success Packets = %d",
  4138. peer->stats.tx.tx_success.num);
  4139. DP_PRINT_STATS("Success Bytes = %llu",
  4140. peer->stats.tx.tx_success.bytes);
  4141. DP_PRINT_STATS("Unicast Success Packets = %d",
  4142. peer->stats.tx.ucast.num);
  4143. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4144. peer->stats.tx.ucast.bytes);
  4145. DP_PRINT_STATS("Multicast Success Packets = %d",
  4146. peer->stats.tx.mcast.num);
  4147. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4148. peer->stats.tx.mcast.bytes);
  4149. DP_PRINT_STATS("Packets Failed = %d",
  4150. peer->stats.tx.tx_failed);
  4151. DP_PRINT_STATS("Packets In OFDMA = %d",
  4152. peer->stats.tx.ofdma);
  4153. DP_PRINT_STATS("Packets In STBC = %d",
  4154. peer->stats.tx.stbc);
  4155. DP_PRINT_STATS("Packets In LDPC = %d",
  4156. peer->stats.tx.ldpc);
  4157. DP_PRINT_STATS("Packet Retries = %d",
  4158. peer->stats.tx.retries);
  4159. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4160. peer->stats.tx.amsdu_cnt);
  4161. DP_PRINT_STATS("Last Packet RSSI = %d",
  4162. peer->stats.tx.last_ack_rssi);
  4163. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4164. peer->stats.tx.dropped.fw_rem);
  4165. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4166. peer->stats.tx.dropped.fw_rem_tx);
  4167. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4168. peer->stats.tx.dropped.fw_rem_notx);
  4169. DP_PRINT_STATS("Dropped : Age Out = %d",
  4170. peer->stats.tx.dropped.age_out);
  4171. DP_PRINT_STATS("NAWDS : ");
  4172. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4173. peer->stats.tx.nawds_mcast_drop);
  4174. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4175. peer->stats.tx.nawds_mcast.num);
  4176. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4177. peer->stats.tx.nawds_mcast.bytes);
  4178. DP_PRINT_STATS("Rate Info:");
  4179. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4180. index = 0;
  4181. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4182. if (!dp_rate_string[pkt_type][mcs].valid)
  4183. continue;
  4184. DP_PRINT_STATS(" %s = %d",
  4185. dp_rate_string[pkt_type][mcs].mcs_type,
  4186. peer->stats.tx.pkt_type[pkt_type].
  4187. mcs_count[mcs]);
  4188. }
  4189. DP_PRINT_STATS("\n");
  4190. }
  4191. DP_PRINT_STATS("SGI = "
  4192. " 0.8us %d"
  4193. " 0.4us %d"
  4194. " 1.6us %d"
  4195. " 3.2us %d",
  4196. peer->stats.tx.sgi_count[0],
  4197. peer->stats.tx.sgi_count[1],
  4198. peer->stats.tx.sgi_count[2],
  4199. peer->stats.tx.sgi_count[3]);
  4200. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4201. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4202. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4203. index = 0;
  4204. for (i = 0; i < SS_COUNT; i++) {
  4205. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4206. " %d", peer->stats.tx.nss[i]);
  4207. }
  4208. DP_PRINT_STATS("NSS(1-8) = %s",
  4209. nss);
  4210. DP_PRINT_STATS("Aggregation:");
  4211. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4212. peer->stats.tx.amsdu_cnt);
  4213. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4214. peer->stats.tx.non_amsdu_cnt);
  4215. DP_PRINT_STATS("Node Rx Stats:");
  4216. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4217. peer->stats.rx.to_stack.num);
  4218. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4219. peer->stats.rx.to_stack.bytes);
  4220. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4221. DP_PRINT_STATS("Ring Id = %d", i);
  4222. DP_PRINT_STATS(" Packets Received = %d",
  4223. peer->stats.rx.rcvd_reo[i].num);
  4224. DP_PRINT_STATS(" Bytes Received = %llu",
  4225. peer->stats.rx.rcvd_reo[i].bytes);
  4226. }
  4227. DP_PRINT_STATS("Multicast Packets Received = %d",
  4228. peer->stats.rx.multicast.num);
  4229. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4230. peer->stats.rx.multicast.bytes);
  4231. DP_PRINT_STATS("WDS Packets Received = %d",
  4232. peer->stats.rx.wds.num);
  4233. DP_PRINT_STATS("WDS Bytes Received = %llu",
  4234. peer->stats.rx.wds.bytes);
  4235. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4236. peer->stats.rx.intra_bss.pkts.num);
  4237. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4238. peer->stats.rx.intra_bss.pkts.bytes);
  4239. DP_PRINT_STATS("Raw Packets Received = %d",
  4240. peer->stats.rx.raw.num);
  4241. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4242. peer->stats.rx.raw.bytes);
  4243. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4244. peer->stats.rx.err.mic_err);
  4245. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4246. peer->stats.rx.err.decrypt_err);
  4247. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4248. peer->stats.rx.non_ampdu_cnt);
  4249. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4250. peer->stats.rx.ampdu_cnt);
  4251. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4252. peer->stats.rx.non_amsdu_cnt);
  4253. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4254. peer->stats.rx.amsdu_cnt);
  4255. DP_PRINT_STATS("NAWDS : ");
  4256. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4257. peer->stats.rx.nawds_mcast_drop.num);
  4258. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4259. peer->stats.rx.nawds_mcast_drop.bytes);
  4260. DP_PRINT_STATS("SGI ="
  4261. " 0.8us %d"
  4262. " 0.4us %d"
  4263. " 1.6us %d"
  4264. " 3.2us %d",
  4265. peer->stats.rx.sgi_count[0],
  4266. peer->stats.rx.sgi_count[1],
  4267. peer->stats.rx.sgi_count[2],
  4268. peer->stats.rx.sgi_count[3]);
  4269. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4270. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4271. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4272. DP_PRINT_STATS("Reception Type ="
  4273. " SU %d,"
  4274. " MU_MIMO %d,"
  4275. " MU_OFDMA %d,"
  4276. " MU_OFDMA_MIMO %d",
  4277. peer->stats.rx.reception_type[0],
  4278. peer->stats.rx.reception_type[1],
  4279. peer->stats.rx.reception_type[2],
  4280. peer->stats.rx.reception_type[3]);
  4281. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4282. index = 0;
  4283. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4284. if (!dp_rate_string[pkt_type][mcs].valid)
  4285. continue;
  4286. DP_PRINT_STATS(" %s = %d",
  4287. dp_rate_string[pkt_type][mcs].mcs_type,
  4288. peer->stats.rx.pkt_type[pkt_type].
  4289. mcs_count[mcs]);
  4290. }
  4291. DP_PRINT_STATS("\n");
  4292. }
  4293. index = 0;
  4294. for (i = 0; i < SS_COUNT; i++) {
  4295. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4296. " %d", peer->stats.rx.nss[i]);
  4297. }
  4298. DP_PRINT_STATS("NSS(1-8) = %s",
  4299. nss);
  4300. DP_PRINT_STATS("Aggregation:");
  4301. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4302. peer->stats.rx.ampdu_cnt);
  4303. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4304. peer->stats.rx.non_ampdu_cnt);
  4305. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4306. peer->stats.rx.amsdu_cnt);
  4307. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4308. peer->stats.rx.non_amsdu_cnt);
  4309. }
  4310. /**
  4311. * dp_print_host_stats()- Function to print the stats aggregated at host
  4312. * @vdev_handle: DP_VDEV handle
  4313. * @type: host stats type
  4314. *
  4315. * Available Stat types
  4316. * TXRX_CLEAR_STATS : Clear the stats
  4317. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4318. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4319. * TXRX_TX_HOST_STATS: Print Tx Stats
  4320. * TXRX_RX_HOST_STATS: Print Rx Stats
  4321. * TXRX_AST_STATS: Print AST Stats
  4322. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4323. *
  4324. * Return: 0 on success, print error message in case of failure
  4325. */
  4326. static int
  4327. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4328. {
  4329. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4330. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4331. dp_aggregate_pdev_stats(pdev);
  4332. switch (type) {
  4333. case TXRX_CLEAR_STATS:
  4334. dp_txrx_host_stats_clr(vdev);
  4335. break;
  4336. case TXRX_RX_RATE_STATS:
  4337. dp_print_rx_rates(vdev);
  4338. break;
  4339. case TXRX_TX_RATE_STATS:
  4340. dp_print_tx_rates(vdev);
  4341. break;
  4342. case TXRX_TX_HOST_STATS:
  4343. dp_print_pdev_tx_stats(pdev);
  4344. dp_print_soc_tx_stats(pdev->soc);
  4345. break;
  4346. case TXRX_RX_HOST_STATS:
  4347. dp_print_pdev_rx_stats(pdev);
  4348. dp_print_soc_rx_stats(pdev->soc);
  4349. break;
  4350. case TXRX_AST_STATS:
  4351. dp_print_ast_stats(pdev->soc);
  4352. break;
  4353. case TXRX_SRNG_PTR_STATS:
  4354. dp_print_ring_stats(pdev);
  4355. break;
  4356. default:
  4357. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4358. break;
  4359. }
  4360. return 0;
  4361. }
  4362. /*
  4363. * dp_get_host_peer_stats()- function to print peer stats
  4364. * @pdev_handle: DP_PDEV handle
  4365. * @mac_addr: mac address of the peer
  4366. *
  4367. * Return: void
  4368. */
  4369. static void
  4370. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4371. {
  4372. struct dp_peer *peer;
  4373. uint8_t local_id;
  4374. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4375. &local_id);
  4376. if (!peer) {
  4377. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4378. "%s: Invalid peer\n", __func__);
  4379. return;
  4380. }
  4381. dp_print_peer_stats(peer);
  4382. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4383. return;
  4384. }
  4385. /*
  4386. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4387. * @pdev: DP_PDEV handle
  4388. *
  4389. * Return: void
  4390. */
  4391. static void
  4392. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4393. {
  4394. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4395. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4396. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4397. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4398. RX_BUFFER_SIZE, &htt_tlv_filter);
  4399. }
  4400. /*
  4401. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4402. * @pdev: DP_PDEV handle
  4403. *
  4404. * Return: void
  4405. */
  4406. static void
  4407. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4408. {
  4409. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4410. htt_tlv_filter.mpdu_start = 0;
  4411. htt_tlv_filter.msdu_start = 0;
  4412. htt_tlv_filter.packet = 0;
  4413. htt_tlv_filter.msdu_end = 0;
  4414. htt_tlv_filter.mpdu_end = 0;
  4415. htt_tlv_filter.packet_header = 1;
  4416. htt_tlv_filter.attention = 1;
  4417. htt_tlv_filter.ppdu_start = 1;
  4418. htt_tlv_filter.ppdu_end = 1;
  4419. htt_tlv_filter.ppdu_end_user_stats = 1;
  4420. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4421. htt_tlv_filter.ppdu_end_status_done = 1;
  4422. htt_tlv_filter.enable_fp = 1;
  4423. htt_tlv_filter.enable_md = 0;
  4424. htt_tlv_filter.enable_mo = 0;
  4425. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4426. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4427. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4428. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4429. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4430. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4431. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4432. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4433. RX_BUFFER_SIZE, &htt_tlv_filter);
  4434. }
  4435. /*
  4436. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4437. * @pdev_handle: DP_PDEV handle
  4438. * @val: user provided value
  4439. *
  4440. * Return: void
  4441. */
  4442. static void
  4443. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4444. {
  4445. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4446. switch (val) {
  4447. case 0:
  4448. pdev->tx_sniffer_enable = 0;
  4449. pdev->mcopy_mode = 0;
  4450. if (!pdev->enhanced_stats_en) {
  4451. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4452. dp_ppdu_ring_reset(pdev);
  4453. }
  4454. break;
  4455. case 1:
  4456. pdev->tx_sniffer_enable = 1;
  4457. pdev->mcopy_mode = 0;
  4458. if (!pdev->enhanced_stats_en)
  4459. dp_h2t_cfg_stats_msg_send(pdev,
  4460. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4461. break;
  4462. case 2:
  4463. pdev->mcopy_mode = 1;
  4464. pdev->tx_sniffer_enable = 0;
  4465. if (!pdev->enhanced_stats_en) {
  4466. dp_ppdu_ring_cfg(pdev);
  4467. dp_h2t_cfg_stats_msg_send(pdev,
  4468. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4469. }
  4470. break;
  4471. default:
  4472. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4473. "Invalid value\n");
  4474. break;
  4475. }
  4476. }
  4477. /*
  4478. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4479. * @pdev_handle: DP_PDEV handle
  4480. *
  4481. * Return: void
  4482. */
  4483. static void
  4484. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4485. {
  4486. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4487. pdev->enhanced_stats_en = 1;
  4488. if (!pdev->mcopy_mode)
  4489. dp_ppdu_ring_cfg(pdev);
  4490. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4491. dp_h2t_cfg_stats_msg_send(pdev, 0xffff, pdev->pdev_id);
  4492. }
  4493. /*
  4494. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4495. * @pdev_handle: DP_PDEV handle
  4496. *
  4497. * Return: void
  4498. */
  4499. static void
  4500. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4501. {
  4502. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4503. pdev->enhanced_stats_en = 0;
  4504. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4505. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4506. if (!pdev->mcopy_mode)
  4507. dp_ppdu_ring_reset(pdev);
  4508. }
  4509. /*
  4510. * dp_get_fw_peer_stats()- function to print peer stats
  4511. * @pdev_handle: DP_PDEV handle
  4512. * @mac_addr: mac address of the peer
  4513. * @cap: Type of htt stats requested
  4514. *
  4515. * Currently Supporting only MAC ID based requests Only
  4516. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  4517. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  4518. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  4519. *
  4520. * Return: void
  4521. */
  4522. static void
  4523. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  4524. uint32_t cap)
  4525. {
  4526. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4527. int i;
  4528. uint32_t config_param0 = 0;
  4529. uint32_t config_param1 = 0;
  4530. uint32_t config_param2 = 0;
  4531. uint32_t config_param3 = 0;
  4532. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  4533. config_param0 |= (1 << (cap + 1));
  4534. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  4535. config_param1 |= (1 << i);
  4536. }
  4537. config_param2 |= (mac_addr[0] & 0x000000ff);
  4538. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  4539. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  4540. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  4541. config_param3 |= (mac_addr[4] & 0x000000ff);
  4542. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  4543. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  4544. config_param0, config_param1, config_param2,
  4545. config_param3, 0);
  4546. }
  4547. /* This struct definition will be removed from here
  4548. * once it get added in FW headers*/
  4549. struct httstats_cmd_req {
  4550. uint32_t config_param0;
  4551. uint32_t config_param1;
  4552. uint32_t config_param2;
  4553. uint32_t config_param3;
  4554. int cookie;
  4555. u_int8_t stats_id;
  4556. };
  4557. /*
  4558. * dp_get_htt_stats: function to process the httstas request
  4559. * @pdev_handle: DP pdev handle
  4560. * @data: pointer to request data
  4561. * @data_len: length for request data
  4562. *
  4563. * return: void
  4564. */
  4565. static void
  4566. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  4567. {
  4568. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4569. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  4570. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  4571. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  4572. req->config_param0, req->config_param1,
  4573. req->config_param2, req->config_param3,
  4574. req->cookie);
  4575. }
  4576. /*
  4577. * dp_set_pdev_param: function to set parameters in pdev
  4578. * @pdev_handle: DP pdev handle
  4579. * @param: parameter type to be set
  4580. * @val: value of parameter to be set
  4581. *
  4582. * return: void
  4583. */
  4584. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  4585. enum cdp_pdev_param_type param, uint8_t val)
  4586. {
  4587. switch (param) {
  4588. case CDP_CONFIG_DEBUG_SNIFFER:
  4589. dp_config_debug_sniffer(pdev_handle, val);
  4590. break;
  4591. default:
  4592. break;
  4593. }
  4594. }
  4595. /*
  4596. * dp_set_vdev_param: function to set parameters in vdev
  4597. * @param: parameter type to be set
  4598. * @val: value of parameter to be set
  4599. *
  4600. * return: void
  4601. */
  4602. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  4603. enum cdp_vdev_param_type param, uint32_t val)
  4604. {
  4605. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4606. switch (param) {
  4607. case CDP_ENABLE_WDS:
  4608. vdev->wds_enabled = val;
  4609. break;
  4610. case CDP_ENABLE_NAWDS:
  4611. vdev->nawds_enabled = val;
  4612. break;
  4613. case CDP_ENABLE_MCAST_EN:
  4614. vdev->mcast_enhancement_en = val;
  4615. break;
  4616. case CDP_ENABLE_PROXYSTA:
  4617. vdev->proxysta_vdev = val;
  4618. break;
  4619. case CDP_UPDATE_TDLS_FLAGS:
  4620. vdev->tdls_link_connected = val;
  4621. break;
  4622. case CDP_CFG_WDS_AGING_TIMER:
  4623. if (val == 0)
  4624. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  4625. else if (val != vdev->wds_aging_timer_val)
  4626. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  4627. vdev->wds_aging_timer_val = val;
  4628. break;
  4629. case CDP_ENABLE_AP_BRIDGE:
  4630. if (wlan_op_mode_sta != vdev->opmode)
  4631. vdev->ap_bridge_enabled = val;
  4632. else
  4633. vdev->ap_bridge_enabled = false;
  4634. break;
  4635. case CDP_ENABLE_CIPHER:
  4636. vdev->sec_type = val;
  4637. break;
  4638. case CDP_ENABLE_QWRAP_ISOLATION:
  4639. vdev->isolation_vdev = val;
  4640. break;
  4641. default:
  4642. break;
  4643. }
  4644. dp_tx_vdev_update_search_flags(vdev);
  4645. }
  4646. /**
  4647. * dp_peer_set_nawds: set nawds bit in peer
  4648. * @peer_handle: pointer to peer
  4649. * @value: enable/disable nawds
  4650. *
  4651. * return: void
  4652. */
  4653. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  4654. {
  4655. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4656. peer->nawds_enabled = value;
  4657. }
  4658. /*
  4659. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  4660. * @vdev_handle: DP_VDEV handle
  4661. * @map_id:ID of map that needs to be updated
  4662. *
  4663. * Return: void
  4664. */
  4665. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  4666. uint8_t map_id)
  4667. {
  4668. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4669. vdev->dscp_tid_map_id = map_id;
  4670. return;
  4671. }
  4672. /**
  4673. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  4674. * @pdev: DP_PDEV handle
  4675. * @map_id: ID of map that needs to be updated
  4676. * @tos: index value in map
  4677. * @tid: tid value passed by the user
  4678. *
  4679. * Return: void
  4680. */
  4681. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  4682. uint8_t map_id, uint8_t tos, uint8_t tid)
  4683. {
  4684. uint8_t dscp;
  4685. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  4686. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  4687. pdev->dscp_tid_map[map_id][dscp] = tid;
  4688. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  4689. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  4690. map_id, dscp);
  4691. return;
  4692. }
  4693. /**
  4694. * dp_fw_stats_process(): Process TxRX FW stats request
  4695. * @vdev_handle: DP VDEV handle
  4696. * @req: stats request
  4697. *
  4698. * return: int
  4699. */
  4700. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  4701. struct cdp_txrx_stats_req *req)
  4702. {
  4703. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4704. struct dp_pdev *pdev = NULL;
  4705. uint32_t stats = req->stats;
  4706. if (!vdev) {
  4707. DP_TRACE(NONE, "VDEV not found");
  4708. return 1;
  4709. }
  4710. pdev = vdev->pdev;
  4711. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  4712. req->param1, req->param2, req->param3, 0);
  4713. }
  4714. /**
  4715. * dp_txrx_stats_request - function to map to firmware and host stats
  4716. * @vdev: virtual handle
  4717. * @req: stats request
  4718. *
  4719. * Return: integer
  4720. */
  4721. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  4722. struct cdp_txrx_stats_req *req)
  4723. {
  4724. int host_stats;
  4725. int fw_stats;
  4726. enum cdp_stats stats;
  4727. if (!vdev || !req) {
  4728. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4729. "Invalid vdev/req instance");
  4730. return 0;
  4731. }
  4732. stats = req->stats;
  4733. if (stats >= CDP_TXRX_MAX_STATS)
  4734. return 0;
  4735. /*
  4736. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  4737. * has to be updated if new FW HTT stats added
  4738. */
  4739. if (stats > CDP_TXRX_STATS_HTT_MAX)
  4740. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  4741. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  4742. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  4743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4744. "stats: %u fw_stats_type: %d host_stats_type: %d",
  4745. stats, fw_stats, host_stats);
  4746. if (fw_stats != TXRX_FW_STATS_INVALID) {
  4747. /* update request with FW stats type */
  4748. req->stats = fw_stats;
  4749. return dp_fw_stats_process(vdev, req);
  4750. }
  4751. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  4752. (host_stats <= TXRX_HOST_STATS_MAX))
  4753. return dp_print_host_stats(vdev, host_stats);
  4754. else
  4755. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4756. "Wrong Input for TxRx Stats");
  4757. return 0;
  4758. }
  4759. /**
  4760. * dp_txrx_stats() - function to map to firmware and host stats
  4761. * @vdev: virtual handle
  4762. * @stats: type of statistics requested
  4763. *
  4764. * Return: integer
  4765. */
  4766. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  4767. {
  4768. struct cdp_txrx_stats_req req = {0,};
  4769. req.stats = stats;
  4770. return dp_txrx_stats_request(vdev, &req);
  4771. }
  4772. /*
  4773. * dp_print_napi_stats(): NAPI stats
  4774. * @soc - soc handle
  4775. */
  4776. static void dp_print_napi_stats(struct dp_soc *soc)
  4777. {
  4778. hif_print_napi_stats(soc->hif_handle);
  4779. }
  4780. /*
  4781. * dp_print_per_ring_stats(): Packet count per ring
  4782. * @soc - soc handle
  4783. */
  4784. static void dp_print_per_ring_stats(struct dp_soc *soc)
  4785. {
  4786. uint8_t ring;
  4787. uint16_t core;
  4788. uint64_t total_packets;
  4789. DP_TRACE(FATAL, "Reo packets per ring:");
  4790. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  4791. total_packets = 0;
  4792. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  4793. for (core = 0; core < NR_CPUS; core++) {
  4794. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  4795. core, soc->stats.rx.ring_packets[core][ring]);
  4796. total_packets += soc->stats.rx.ring_packets[core][ring];
  4797. }
  4798. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  4799. ring, total_packets);
  4800. }
  4801. }
  4802. /*
  4803. * dp_txrx_path_stats() - Function to display dump stats
  4804. * @soc - soc handle
  4805. *
  4806. * return: none
  4807. */
  4808. static void dp_txrx_path_stats(struct dp_soc *soc)
  4809. {
  4810. uint8_t error_code;
  4811. uint8_t loop_pdev;
  4812. struct dp_pdev *pdev;
  4813. uint8_t i;
  4814. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  4815. pdev = soc->pdev_list[loop_pdev];
  4816. dp_aggregate_pdev_stats(pdev);
  4817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4818. "Tx path Statistics:");
  4819. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  4820. pdev->stats.tx_i.rcvd.num,
  4821. pdev->stats.tx_i.rcvd.bytes);
  4822. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  4823. pdev->stats.tx_i.processed.num,
  4824. pdev->stats.tx_i.processed.bytes);
  4825. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  4826. pdev->stats.tx.tx_success.num,
  4827. pdev->stats.tx.tx_success.bytes);
  4828. DP_TRACE(FATAL, "Dropped in host:");
  4829. DP_TRACE(FATAL, "Total packets dropped: %u,",
  4830. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4831. DP_TRACE(FATAL, "Descriptor not available: %u",
  4832. pdev->stats.tx_i.dropped.desc_na);
  4833. DP_TRACE(FATAL, "Ring full: %u",
  4834. pdev->stats.tx_i.dropped.ring_full);
  4835. DP_TRACE(FATAL, "Enqueue fail: %u",
  4836. pdev->stats.tx_i.dropped.enqueue_fail);
  4837. DP_TRACE(FATAL, "DMA Error: %u",
  4838. pdev->stats.tx_i.dropped.dma_error);
  4839. DP_TRACE(FATAL, "Dropped in hardware:");
  4840. DP_TRACE(FATAL, "total packets dropped: %u",
  4841. pdev->stats.tx.tx_failed);
  4842. DP_TRACE(FATAL, "mpdu age out: %u",
  4843. pdev->stats.tx.dropped.age_out);
  4844. DP_TRACE(FATAL, "firmware removed: %u",
  4845. pdev->stats.tx.dropped.fw_rem);
  4846. DP_TRACE(FATAL, "firmware removed tx: %u",
  4847. pdev->stats.tx.dropped.fw_rem_tx);
  4848. DP_TRACE(FATAL, "firmware removed notx %u",
  4849. pdev->stats.tx.dropped.fw_rem_notx);
  4850. DP_TRACE(FATAL, "peer_invalid: %u",
  4851. pdev->soc->stats.tx.tx_invalid_peer.num);
  4852. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  4853. DP_TRACE(FATAL, "Single Packet: %u",
  4854. pdev->stats.tx_comp_histogram.pkts_1);
  4855. DP_TRACE(FATAL, "2-20 Packets: %u",
  4856. pdev->stats.tx_comp_histogram.pkts_2_20);
  4857. DP_TRACE(FATAL, "21-40 Packets: %u",
  4858. pdev->stats.tx_comp_histogram.pkts_21_40);
  4859. DP_TRACE(FATAL, "41-60 Packets: %u",
  4860. pdev->stats.tx_comp_histogram.pkts_41_60);
  4861. DP_TRACE(FATAL, "61-80 Packets: %u",
  4862. pdev->stats.tx_comp_histogram.pkts_61_80);
  4863. DP_TRACE(FATAL, "81-100 Packets: %u",
  4864. pdev->stats.tx_comp_histogram.pkts_81_100);
  4865. DP_TRACE(FATAL, "101-200 Packets: %u",
  4866. pdev->stats.tx_comp_histogram.pkts_101_200);
  4867. DP_TRACE(FATAL, " 201+ Packets: %u",
  4868. pdev->stats.tx_comp_histogram.pkts_201_plus);
  4869. DP_TRACE(FATAL, "Rx path statistics");
  4870. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  4871. pdev->stats.rx.to_stack.num,
  4872. pdev->stats.rx.to_stack.bytes);
  4873. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  4874. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  4875. i, pdev->stats.rx.rcvd_reo[i].num,
  4876. pdev->stats.rx.rcvd_reo[i].bytes);
  4877. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  4878. pdev->stats.rx.intra_bss.pkts.num,
  4879. pdev->stats.rx.intra_bss.pkts.bytes);
  4880. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  4881. pdev->stats.rx.intra_bss.fail.num,
  4882. pdev->stats.rx.intra_bss.fail.bytes);
  4883. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  4884. pdev->stats.rx.raw.num,
  4885. pdev->stats.rx.raw.bytes);
  4886. DP_TRACE(FATAL, "dropped: error %u msdus",
  4887. pdev->stats.rx.err.mic_err);
  4888. DP_TRACE(FATAL, "peer invalid %u",
  4889. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  4890. DP_TRACE(FATAL, "Reo Statistics");
  4891. DP_TRACE(FATAL, "rbm error: %u msdus",
  4892. pdev->soc->stats.rx.err.invalid_rbm);
  4893. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  4894. pdev->soc->stats.rx.err.hal_ring_access_fail);
  4895. DP_TRACE(FATAL, "Reo errors");
  4896. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  4897. error_code++) {
  4898. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  4899. error_code,
  4900. pdev->soc->stats.rx.err.reo_error[error_code]);
  4901. }
  4902. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  4903. error_code++) {
  4904. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  4905. error_code,
  4906. pdev->soc->stats.rx.err
  4907. .rxdma_error[error_code]);
  4908. }
  4909. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  4910. DP_TRACE(FATAL, "Single Packet: %u",
  4911. pdev->stats.rx_ind_histogram.pkts_1);
  4912. DP_TRACE(FATAL, "2-20 Packets: %u",
  4913. pdev->stats.rx_ind_histogram.pkts_2_20);
  4914. DP_TRACE(FATAL, "21-40 Packets: %u",
  4915. pdev->stats.rx_ind_histogram.pkts_21_40);
  4916. DP_TRACE(FATAL, "41-60 Packets: %u",
  4917. pdev->stats.rx_ind_histogram.pkts_41_60);
  4918. DP_TRACE(FATAL, "61-80 Packets: %u",
  4919. pdev->stats.rx_ind_histogram.pkts_61_80);
  4920. DP_TRACE(FATAL, "81-100 Packets: %u",
  4921. pdev->stats.rx_ind_histogram.pkts_81_100);
  4922. DP_TRACE(FATAL, "101-200 Packets: %u",
  4923. pdev->stats.rx_ind_histogram.pkts_101_200);
  4924. DP_TRACE(FATAL, " 201+ Packets: %u",
  4925. pdev->stats.rx_ind_histogram.pkts_201_plus);
  4926. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  4927. __func__,
  4928. pdev->soc->wlan_cfg_ctx->tso_enabled,
  4929. pdev->soc->wlan_cfg_ctx->lro_enabled,
  4930. pdev->soc->wlan_cfg_ctx->rx_hash,
  4931. pdev->soc->wlan_cfg_ctx->napi_enabled);
  4932. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4933. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  4934. __func__,
  4935. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  4936. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  4937. #endif
  4938. }
  4939. }
  4940. /*
  4941. * dp_txrx_dump_stats() - Dump statistics
  4942. * @value - Statistics option
  4943. */
  4944. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  4945. enum qdf_stats_verbosity_level level)
  4946. {
  4947. struct dp_soc *soc =
  4948. (struct dp_soc *)psoc;
  4949. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4950. if (!soc) {
  4951. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4952. "%s: soc is NULL", __func__);
  4953. return QDF_STATUS_E_INVAL;
  4954. }
  4955. switch (value) {
  4956. case CDP_TXRX_PATH_STATS:
  4957. dp_txrx_path_stats(soc);
  4958. break;
  4959. case CDP_RX_RING_STATS:
  4960. dp_print_per_ring_stats(soc);
  4961. break;
  4962. case CDP_TXRX_TSO_STATS:
  4963. /* TODO: NOT IMPLEMENTED */
  4964. break;
  4965. case CDP_DUMP_TX_FLOW_POOL_INFO:
  4966. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  4967. break;
  4968. case CDP_DP_NAPI_STATS:
  4969. dp_print_napi_stats(soc);
  4970. break;
  4971. case CDP_TXRX_DESC_STATS:
  4972. /* TODO: NOT IMPLEMENTED */
  4973. break;
  4974. default:
  4975. status = QDF_STATUS_E_INVAL;
  4976. break;
  4977. }
  4978. return status;
  4979. }
  4980. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4981. /**
  4982. * dp_update_flow_control_parameters() - API to store datapath
  4983. * config parameters
  4984. * @soc: soc handle
  4985. * @cfg: ini parameter handle
  4986. *
  4987. * Return: void
  4988. */
  4989. static inline
  4990. void dp_update_flow_control_parameters(struct dp_soc *soc,
  4991. struct cdp_config_params *params)
  4992. {
  4993. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  4994. params->tx_flow_stop_queue_threshold;
  4995. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  4996. params->tx_flow_start_queue_offset;
  4997. }
  4998. #else
  4999. static inline
  5000. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5001. struct cdp_config_params *params)
  5002. {
  5003. }
  5004. #endif
  5005. /**
  5006. * dp_update_config_parameters() - API to store datapath
  5007. * config parameters
  5008. * @soc: soc handle
  5009. * @cfg: ini parameter handle
  5010. *
  5011. * Return: status
  5012. */
  5013. static
  5014. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5015. struct cdp_config_params *params)
  5016. {
  5017. struct dp_soc *soc = (struct dp_soc *)psoc;
  5018. if (!(soc)) {
  5019. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5020. "%s: Invalid handle", __func__);
  5021. return QDF_STATUS_E_INVAL;
  5022. }
  5023. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5024. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5025. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5026. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5027. params->tcp_udp_checksumoffload;
  5028. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5029. dp_update_flow_control_parameters(soc, params);
  5030. return QDF_STATUS_SUCCESS;
  5031. }
  5032. /**
  5033. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5034. * config parameters
  5035. * @vdev_handle - datapath vdev handle
  5036. * @cfg: ini parameter handle
  5037. *
  5038. * Return: status
  5039. */
  5040. #ifdef WDS_VENDOR_EXTENSION
  5041. void
  5042. dp_txrx_set_wds_rx_policy(
  5043. struct cdp_vdev *vdev_handle,
  5044. u_int32_t val)
  5045. {
  5046. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5047. struct dp_peer *peer;
  5048. if (vdev->opmode == wlan_op_mode_ap) {
  5049. /* for ap, set it on bss_peer */
  5050. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5051. if (peer->bss_peer) {
  5052. peer->wds_ecm.wds_rx_filter = 1;
  5053. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5054. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5055. break;
  5056. }
  5057. }
  5058. } else if (vdev->opmode == wlan_op_mode_sta) {
  5059. peer = TAILQ_FIRST(&vdev->peer_list);
  5060. peer->wds_ecm.wds_rx_filter = 1;
  5061. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5062. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5063. }
  5064. }
  5065. /**
  5066. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5067. *
  5068. * @peer_handle - datapath peer handle
  5069. * @wds_tx_ucast: policy for unicast transmission
  5070. * @wds_tx_mcast: policy for multicast transmission
  5071. *
  5072. * Return: void
  5073. */
  5074. void
  5075. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5076. int wds_tx_ucast, int wds_tx_mcast)
  5077. {
  5078. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5079. if (wds_tx_ucast || wds_tx_mcast) {
  5080. peer->wds_enabled = 1;
  5081. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5082. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5083. } else {
  5084. peer->wds_enabled = 0;
  5085. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5086. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5087. }
  5088. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5089. FL("Policy Update set to :\
  5090. peer->wds_enabled %d\
  5091. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5092. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5093. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5094. peer->wds_ecm.wds_tx_mcast_4addr);
  5095. return;
  5096. }
  5097. #endif
  5098. static struct cdp_wds_ops dp_ops_wds = {
  5099. .vdev_set_wds = dp_vdev_set_wds,
  5100. #ifdef WDS_VENDOR_EXTENSION
  5101. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5102. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5103. #endif
  5104. };
  5105. /*
  5106. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5107. * @soc - datapath soc handle
  5108. * @peer - datapath peer handle
  5109. *
  5110. * Delete the AST entries belonging to a peer
  5111. */
  5112. #ifdef FEATURE_WDS
  5113. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5114. struct dp_peer *peer)
  5115. {
  5116. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5117. qdf_spin_lock_bh(&soc->ast_lock);
  5118. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry) {
  5119. if (ast_entry->next_hop) {
  5120. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  5121. peer->vdev->osif_vdev,
  5122. ast_entry->mac_addr.raw);
  5123. }
  5124. dp_peer_del_ast(soc, ast_entry);
  5125. }
  5126. qdf_spin_unlock_bh(&soc->ast_lock);
  5127. }
  5128. #else
  5129. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5130. struct dp_peer *peer)
  5131. {
  5132. }
  5133. #endif
  5134. /*
  5135. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5136. * @vdev_handle - datapath vdev handle
  5137. * @callback - callback function
  5138. * @ctxt: callback context
  5139. *
  5140. */
  5141. static void
  5142. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5143. ol_txrx_data_tx_cb callback, void *ctxt)
  5144. {
  5145. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5146. vdev->tx_non_std_data_callback.func = callback;
  5147. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5148. }
  5149. /**
  5150. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5151. * @pdev_hdl: datapath pdev handle
  5152. *
  5153. * Return: opaque pointer to dp txrx handle
  5154. */
  5155. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5156. {
  5157. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5158. return pdev->dp_txrx_handle;
  5159. }
  5160. /**
  5161. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5162. * @pdev_hdl: datapath pdev handle
  5163. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5164. *
  5165. * Return: void
  5166. */
  5167. static void
  5168. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5169. {
  5170. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5171. pdev->dp_txrx_handle = dp_txrx_hdl;
  5172. }
  5173. #ifdef CONFIG_WIN
  5174. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5175. {
  5176. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5177. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5178. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5179. peer->delete_in_progress = true;
  5180. dp_peer_delete_ast_entries(soc, peer);
  5181. }
  5182. #endif
  5183. static struct cdp_cmn_ops dp_ops_cmn = {
  5184. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5185. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5186. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5187. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5188. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5189. .txrx_peer_create = dp_peer_create_wifi3,
  5190. .txrx_peer_setup = dp_peer_setup_wifi3,
  5191. #ifdef CONFIG_WIN
  5192. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5193. #else
  5194. .txrx_peer_teardown = NULL,
  5195. #endif
  5196. .txrx_peer_delete = dp_peer_delete_wifi3,
  5197. .txrx_vdev_register = dp_vdev_register_wifi3,
  5198. .txrx_soc_detach = dp_soc_detach_wifi3,
  5199. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5200. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5201. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5202. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5203. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5204. .delba_process = dp_delba_process_wifi3,
  5205. .set_addba_response = dp_set_addba_response,
  5206. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5207. .flush_cache_rx_queue = NULL,
  5208. /* TODO: get API's for dscp-tid need to be added*/
  5209. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5210. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5211. .txrx_stats = dp_txrx_stats,
  5212. .txrx_stats_request = dp_txrx_stats_request,
  5213. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5214. .display_stats = dp_txrx_dump_stats,
  5215. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5216. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5217. #ifdef DP_INTR_POLL_BASED
  5218. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5219. #else
  5220. .txrx_intr_attach = dp_soc_interrupt_attach,
  5221. #endif
  5222. .txrx_intr_detach = dp_soc_interrupt_detach,
  5223. .set_pn_check = dp_set_pn_check_wifi3,
  5224. .update_config_parameters = dp_update_config_parameters,
  5225. /* TODO: Add other functions */
  5226. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5227. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5228. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5229. };
  5230. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5231. .txrx_peer_authorize = dp_peer_authorize,
  5232. #ifdef QCA_SUPPORT_SON
  5233. .txrx_set_inact_params = dp_set_inact_params,
  5234. .txrx_start_inact_timer = dp_start_inact_timer,
  5235. .txrx_set_overload = dp_set_overload,
  5236. .txrx_peer_is_inact = dp_peer_is_inact,
  5237. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5238. #endif
  5239. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5240. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5241. #ifdef MESH_MODE_SUPPORT
  5242. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5243. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5244. #endif
  5245. .txrx_set_vdev_param = dp_set_vdev_param,
  5246. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5247. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5248. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5249. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5250. .txrx_update_filter_neighbour_peers =
  5251. dp_update_filter_neighbour_peers,
  5252. .txrx_get_sec_type = dp_get_sec_type,
  5253. /* TODO: Add other functions */
  5254. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5255. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5256. #ifdef WDI_EVENT_ENABLE
  5257. .txrx_get_pldev = dp_get_pldev,
  5258. #endif
  5259. .txrx_set_pdev_param = dp_set_pdev_param,
  5260. };
  5261. static struct cdp_me_ops dp_ops_me = {
  5262. #ifdef ATH_SUPPORT_IQUE
  5263. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5264. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5265. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5266. #endif
  5267. };
  5268. static struct cdp_mon_ops dp_ops_mon = {
  5269. .txrx_monitor_set_filter_ucast_data = NULL,
  5270. .txrx_monitor_set_filter_mcast_data = NULL,
  5271. .txrx_monitor_set_filter_non_data = NULL,
  5272. .txrx_monitor_get_filter_ucast_data = NULL,
  5273. .txrx_monitor_get_filter_mcast_data = NULL,
  5274. .txrx_monitor_get_filter_non_data = NULL,
  5275. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5276. /* Added support for HK advance filter */
  5277. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5278. };
  5279. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5280. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5281. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5282. .get_htt_stats = dp_get_htt_stats,
  5283. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5284. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5285. /* TODO */
  5286. };
  5287. static struct cdp_raw_ops dp_ops_raw = {
  5288. /* TODO */
  5289. };
  5290. #ifdef CONFIG_WIN
  5291. static struct cdp_pflow_ops dp_ops_pflow = {
  5292. /* TODO */
  5293. };
  5294. #endif /* CONFIG_WIN */
  5295. #ifdef FEATURE_RUNTIME_PM
  5296. /**
  5297. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5298. * @opaque_pdev: DP pdev context
  5299. *
  5300. * DP is ready to runtime suspend if there are no pending TX packets.
  5301. *
  5302. * Return: QDF_STATUS
  5303. */
  5304. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5305. {
  5306. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5307. struct dp_soc *soc = pdev->soc;
  5308. /* Call DP TX flow control API to check if there is any
  5309. pending packets */
  5310. if (soc->intr_mode == DP_INTR_POLL)
  5311. qdf_timer_stop(&soc->int_timer);
  5312. return QDF_STATUS_SUCCESS;
  5313. }
  5314. /**
  5315. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5316. * @opaque_pdev: DP pdev context
  5317. *
  5318. * Resume DP for runtime PM.
  5319. *
  5320. * Return: QDF_STATUS
  5321. */
  5322. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5323. {
  5324. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5325. struct dp_soc *soc = pdev->soc;
  5326. void *hal_srng;
  5327. int i;
  5328. if (soc->intr_mode == DP_INTR_POLL)
  5329. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5330. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5331. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5332. if (hal_srng) {
  5333. /* We actually only need to acquire the lock */
  5334. hal_srng_access_start(soc->hal_soc, hal_srng);
  5335. /* Update SRC ring head pointer for HW to send
  5336. all pending packets */
  5337. hal_srng_access_end(soc->hal_soc, hal_srng);
  5338. }
  5339. }
  5340. return QDF_STATUS_SUCCESS;
  5341. }
  5342. #endif /* FEATURE_RUNTIME_PM */
  5343. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5344. {
  5345. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5346. struct dp_soc *soc = pdev->soc;
  5347. if (soc->intr_mode == DP_INTR_POLL)
  5348. qdf_timer_stop(&soc->int_timer);
  5349. return QDF_STATUS_SUCCESS;
  5350. }
  5351. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5352. {
  5353. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5354. struct dp_soc *soc = pdev->soc;
  5355. if (soc->intr_mode == DP_INTR_POLL)
  5356. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5357. return QDF_STATUS_SUCCESS;
  5358. }
  5359. #ifndef CONFIG_WIN
  5360. static struct cdp_misc_ops dp_ops_misc = {
  5361. .tx_non_std = dp_tx_non_std,
  5362. .get_opmode = dp_get_opmode,
  5363. #ifdef FEATURE_RUNTIME_PM
  5364. .runtime_suspend = dp_runtime_suspend,
  5365. .runtime_resume = dp_runtime_resume,
  5366. #endif /* FEATURE_RUNTIME_PM */
  5367. .pkt_log_init = dp_pkt_log_init,
  5368. .pkt_log_con_service = dp_pkt_log_con_service,
  5369. };
  5370. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5371. /* WIFI 3.0 DP implement as required. */
  5372. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5373. .register_pause_cb = dp_txrx_register_pause_cb,
  5374. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5375. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5376. };
  5377. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5378. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5379. };
  5380. #ifdef IPA_OFFLOAD
  5381. static struct cdp_ipa_ops dp_ops_ipa = {
  5382. .ipa_get_resource = dp_ipa_get_resource,
  5383. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5384. .ipa_op_response = dp_ipa_op_response,
  5385. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5386. .ipa_get_stat = dp_ipa_get_stat,
  5387. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5388. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5389. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5390. .ipa_setup = dp_ipa_setup,
  5391. .ipa_cleanup = dp_ipa_cleanup,
  5392. .ipa_setup_iface = dp_ipa_setup_iface,
  5393. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5394. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5395. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5396. .ipa_set_perf_level = dp_ipa_set_perf_level
  5397. };
  5398. #endif
  5399. static struct cdp_bus_ops dp_ops_bus = {
  5400. .bus_suspend = dp_bus_suspend,
  5401. .bus_resume = dp_bus_resume
  5402. };
  5403. static struct cdp_ocb_ops dp_ops_ocb = {
  5404. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5405. };
  5406. static struct cdp_throttle_ops dp_ops_throttle = {
  5407. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5408. };
  5409. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5410. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5411. };
  5412. static struct cdp_cfg_ops dp_ops_cfg = {
  5413. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5414. };
  5415. /*
  5416. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  5417. * @dev: physical device instance
  5418. * @peer_mac_addr: peer mac address
  5419. * @local_id: local id for the peer
  5420. * @debug_id: to track enum peer access
  5421. * Return: peer instance pointer
  5422. */
  5423. static inline void *
  5424. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  5425. u8 *local_id,
  5426. enum peer_debug_id_type debug_id)
  5427. {
  5428. /*
  5429. * Currently this function does not implement the "get ref"
  5430. * functionality and is mapped to dp_find_peer_by_addr which does not
  5431. * increment the peer ref count. So the peer state is uncertain after
  5432. * calling this API. The functionality needs to be implemented.
  5433. * Accordingly the corresponding release_ref function is NULL.
  5434. */
  5435. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  5436. }
  5437. static struct cdp_peer_ops dp_ops_peer = {
  5438. .register_peer = dp_register_peer,
  5439. .clear_peer = dp_clear_peer,
  5440. .find_peer_by_addr = dp_find_peer_by_addr,
  5441. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  5442. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  5443. .peer_release_ref = NULL,
  5444. .local_peer_id = dp_local_peer_id,
  5445. .peer_find_by_local_id = dp_peer_find_by_local_id,
  5446. .peer_state_update = dp_peer_state_update,
  5447. .get_vdevid = dp_get_vdevid,
  5448. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  5449. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  5450. .get_vdev_for_peer = dp_get_vdev_for_peer,
  5451. .get_peer_state = dp_get_peer_state,
  5452. .last_assoc_received = dp_get_last_assoc_received,
  5453. .last_disassoc_received = dp_get_last_disassoc_received,
  5454. .last_deauth_received = dp_get_last_deauth_received,
  5455. };
  5456. #endif
  5457. static struct cdp_ops dp_txrx_ops = {
  5458. .cmn_drv_ops = &dp_ops_cmn,
  5459. .ctrl_ops = &dp_ops_ctrl,
  5460. .me_ops = &dp_ops_me,
  5461. .mon_ops = &dp_ops_mon,
  5462. .host_stats_ops = &dp_ops_host_stats,
  5463. .wds_ops = &dp_ops_wds,
  5464. .raw_ops = &dp_ops_raw,
  5465. #ifdef CONFIG_WIN
  5466. .pflow_ops = &dp_ops_pflow,
  5467. #endif /* CONFIG_WIN */
  5468. #ifndef CONFIG_WIN
  5469. .misc_ops = &dp_ops_misc,
  5470. .cfg_ops = &dp_ops_cfg,
  5471. .flowctl_ops = &dp_ops_flowctl,
  5472. .l_flowctl_ops = &dp_ops_l_flowctl,
  5473. #ifdef IPA_OFFLOAD
  5474. .ipa_ops = &dp_ops_ipa,
  5475. #endif
  5476. .bus_ops = &dp_ops_bus,
  5477. .ocb_ops = &dp_ops_ocb,
  5478. .peer_ops = &dp_ops_peer,
  5479. .throttle_ops = &dp_ops_throttle,
  5480. .mob_stats_ops = &dp_ops_mob_stats,
  5481. #endif
  5482. };
  5483. /*
  5484. * dp_soc_set_txrx_ring_map()
  5485. * @dp_soc: DP handler for soc
  5486. *
  5487. * Return: Void
  5488. */
  5489. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  5490. {
  5491. uint32_t i;
  5492. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  5493. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  5494. }
  5495. }
  5496. /*
  5497. * dp_soc_attach_wifi3() - Attach txrx SOC
  5498. * @osif_soc: Opaque SOC handle from OSIF/HDD
  5499. * @htc_handle: Opaque HTC handle
  5500. * @hif_handle: Opaque HIF handle
  5501. * @qdf_osdev: QDF device
  5502. *
  5503. * Return: DP SOC handle on success, NULL on failure
  5504. */
  5505. /*
  5506. * Local prototype added to temporarily address warning caused by
  5507. * -Wmissing-prototypes. A more correct solution, namely to expose
  5508. * a prototype in an appropriate header file, will come later.
  5509. */
  5510. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  5511. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5512. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  5513. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  5514. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5515. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  5516. {
  5517. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  5518. if (!soc) {
  5519. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5520. FL("DP SOC memory allocation failed"));
  5521. goto fail0;
  5522. }
  5523. soc->cdp_soc.ops = &dp_txrx_ops;
  5524. soc->cdp_soc.ol_ops = ol_ops;
  5525. soc->osif_soc = osif_soc;
  5526. soc->osdev = qdf_osdev;
  5527. soc->hif_handle = hif_handle;
  5528. soc->psoc = psoc;
  5529. soc->hal_soc = hif_get_hal_handle(hif_handle);
  5530. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  5531. soc->hal_soc, qdf_osdev);
  5532. if (!soc->htt_handle) {
  5533. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5534. FL("HTT attach failed"));
  5535. goto fail1;
  5536. }
  5537. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  5538. if (!soc->wlan_cfg_ctx) {
  5539. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5540. FL("wlan_cfg_soc_attach failed"));
  5541. goto fail2;
  5542. }
  5543. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  5544. soc->cce_disable = false;
  5545. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  5546. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->osif_soc,
  5547. CDP_CFG_MAX_PEER_ID);
  5548. if (ret != -EINVAL) {
  5549. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  5550. }
  5551. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->osif_soc,
  5552. CDP_CFG_CCE_DISABLE);
  5553. if (ret)
  5554. soc->cce_disable = true;
  5555. }
  5556. qdf_spinlock_create(&soc->peer_ref_mutex);
  5557. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  5558. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  5559. /* fill the tx/rx cpu ring map*/
  5560. dp_soc_set_txrx_ring_map(soc);
  5561. qdf_spinlock_create(&soc->htt_stats.lock);
  5562. /* initialize work queue for stats processing */
  5563. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  5564. return (void *)soc;
  5565. fail2:
  5566. htt_soc_detach(soc->htt_handle);
  5567. fail1:
  5568. qdf_mem_free(soc);
  5569. fail0:
  5570. return NULL;
  5571. }
  5572. /*
  5573. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  5574. *
  5575. * @soc: handle to DP soc
  5576. * @mac_id: MAC id
  5577. *
  5578. * Return: Return pdev corresponding to MAC
  5579. */
  5580. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5581. {
  5582. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5583. return soc->pdev_list[mac_id];
  5584. /* Typically for MCL as there only 1 PDEV*/
  5585. return soc->pdev_list[0];
  5586. }
  5587. /*
  5588. * dp_get_ring_id_for_mac_id() - Return pdev for mac_id
  5589. *
  5590. * @soc: handle to DP soc
  5591. * @mac_id: MAC id
  5592. *
  5593. * Return: ring id
  5594. */
  5595. int dp_get_ring_id_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5596. {
  5597. /*
  5598. * Single pdev using both MACs will operate on both MAC rings,
  5599. * which is the case for MCL.
  5600. */
  5601. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5602. return mac_id;
  5603. /* For WIN each PDEV will operate one ring, so index is zero. */
  5604. return 0;
  5605. }
  5606. /*
  5607. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  5608. * @soc: DP SoC context
  5609. * @max_mac_rings: No of MAC rings
  5610. *
  5611. * Return: None
  5612. */
  5613. static
  5614. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  5615. int *max_mac_rings)
  5616. {
  5617. bool dbs_enable = false;
  5618. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  5619. dbs_enable = soc->cdp_soc.ol_ops->
  5620. is_hw_dbs_2x2_capable(soc->psoc);
  5621. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  5622. }
  5623. /*
  5624. * dp_set_pktlog_wifi3() - attach txrx vdev
  5625. * @pdev: Datapath PDEV handle
  5626. * @event: which event's notifications are being subscribed to
  5627. * @enable: WDI event subscribe or not. (True or False)
  5628. *
  5629. * Return: Success, NULL on failure
  5630. */
  5631. #ifdef WDI_EVENT_ENABLE
  5632. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  5633. bool enable)
  5634. {
  5635. struct dp_soc *soc = pdev->soc;
  5636. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5637. int max_mac_rings = wlan_cfg_get_num_mac_rings
  5638. (pdev->wlan_cfg_ctx);
  5639. uint8_t mac_id = 0;
  5640. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  5641. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  5642. FL("Max_mac_rings %d \n"),
  5643. max_mac_rings);
  5644. if (enable) {
  5645. switch (event) {
  5646. case WDI_EVENT_RX_DESC:
  5647. if (pdev->monitor_vdev) {
  5648. /* Nothing needs to be done if monitor mode is
  5649. * enabled
  5650. */
  5651. return 0;
  5652. }
  5653. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  5654. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  5655. htt_tlv_filter.mpdu_start = 1;
  5656. htt_tlv_filter.msdu_start = 1;
  5657. htt_tlv_filter.msdu_end = 1;
  5658. htt_tlv_filter.mpdu_end = 1;
  5659. htt_tlv_filter.packet_header = 1;
  5660. htt_tlv_filter.attention = 1;
  5661. htt_tlv_filter.ppdu_start = 1;
  5662. htt_tlv_filter.ppdu_end = 1;
  5663. htt_tlv_filter.ppdu_end_user_stats = 1;
  5664. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5665. htt_tlv_filter.ppdu_end_status_done = 1;
  5666. htt_tlv_filter.enable_fp = 1;
  5667. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5668. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5669. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5670. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5671. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5672. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5673. for (mac_id = 0; mac_id < max_mac_rings;
  5674. mac_id++) {
  5675. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5676. pdev->pdev_id + mac_id,
  5677. pdev->rxdma_mon_status_ring
  5678. .hal_srng,
  5679. RXDMA_MONITOR_STATUS,
  5680. RX_BUFFER_SIZE,
  5681. &htt_tlv_filter);
  5682. }
  5683. if (soc->reap_timer_init)
  5684. qdf_timer_mod(&soc->mon_reap_timer,
  5685. DP_INTR_POLL_TIMER_MS);
  5686. }
  5687. break;
  5688. case WDI_EVENT_LITE_RX:
  5689. if (pdev->monitor_vdev) {
  5690. /* Nothing needs to be done if monitor mode is
  5691. * enabled
  5692. */
  5693. return 0;
  5694. }
  5695. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  5696. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  5697. htt_tlv_filter.ppdu_start = 1;
  5698. htt_tlv_filter.ppdu_end = 1;
  5699. htt_tlv_filter.ppdu_end_user_stats = 1;
  5700. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5701. htt_tlv_filter.ppdu_end_status_done = 1;
  5702. htt_tlv_filter.mpdu_start = 1;
  5703. htt_tlv_filter.enable_fp = 1;
  5704. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5705. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5706. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5707. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5708. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5709. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5710. for (mac_id = 0; mac_id < max_mac_rings;
  5711. mac_id++) {
  5712. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5713. pdev->pdev_id + mac_id,
  5714. pdev->rxdma_mon_status_ring
  5715. .hal_srng,
  5716. RXDMA_MONITOR_STATUS,
  5717. RX_BUFFER_SIZE_PKTLOG_LITE,
  5718. &htt_tlv_filter);
  5719. }
  5720. if (soc->reap_timer_init)
  5721. qdf_timer_mod(&soc->mon_reap_timer,
  5722. DP_INTR_POLL_TIMER_MS);
  5723. }
  5724. break;
  5725. case WDI_EVENT_LITE_T2H:
  5726. if (pdev->monitor_vdev) {
  5727. /* Nothing needs to be done if monitor mode is
  5728. * enabled
  5729. */
  5730. return 0;
  5731. }
  5732. /* To enable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5733. * passing value 0xffff. Once these macros will define
  5734. * in htt header file will use proper macros
  5735. */
  5736. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5737. dp_h2t_cfg_stats_msg_send(pdev, 0xffff,
  5738. pdev->pdev_id + mac_id);
  5739. }
  5740. break;
  5741. default:
  5742. /* Nothing needs to be done for other pktlog types */
  5743. break;
  5744. }
  5745. } else {
  5746. switch (event) {
  5747. case WDI_EVENT_RX_DESC:
  5748. case WDI_EVENT_LITE_RX:
  5749. if (pdev->monitor_vdev) {
  5750. /* Nothing needs to be done if monitor mode is
  5751. * enabled
  5752. */
  5753. return 0;
  5754. }
  5755. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  5756. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  5757. for (mac_id = 0; mac_id < max_mac_rings;
  5758. mac_id++) {
  5759. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5760. pdev->pdev_id + mac_id,
  5761. pdev->rxdma_mon_status_ring
  5762. .hal_srng,
  5763. RXDMA_MONITOR_STATUS,
  5764. RX_BUFFER_SIZE,
  5765. &htt_tlv_filter);
  5766. }
  5767. if (soc->reap_timer_init)
  5768. qdf_timer_stop(&soc->mon_reap_timer);
  5769. }
  5770. break;
  5771. case WDI_EVENT_LITE_T2H:
  5772. if (pdev->monitor_vdev) {
  5773. /* Nothing needs to be done if monitor mode is
  5774. * enabled
  5775. */
  5776. return 0;
  5777. }
  5778. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5779. * passing value 0. Once these macros will define in htt
  5780. * header file will use proper macros
  5781. */
  5782. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5783. dp_h2t_cfg_stats_msg_send(pdev, 0,
  5784. pdev->pdev_id + mac_id);
  5785. }
  5786. break;
  5787. default:
  5788. /* Nothing needs to be done for other pktlog types */
  5789. break;
  5790. }
  5791. }
  5792. return 0;
  5793. }
  5794. #endif
  5795. #ifdef CONFIG_MCL
  5796. /*
  5797. * dp_service_mon_rings()- timer to reap monitor rings
  5798. * reqd as we are not getting ppdu end interrupts
  5799. * @arg: SoC Handle
  5800. *
  5801. * Return:
  5802. *
  5803. */
  5804. static void dp_service_mon_rings(void *arg)
  5805. {
  5806. struct dp_soc *soc = (struct dp_soc *) arg;
  5807. int ring = 0, work_done;
  5808. work_done = dp_mon_process(soc, ring, QCA_NAPI_BUDGET);
  5809. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  5810. FL("Reaped %d descs from Monitor rings"), work_done);
  5811. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  5812. }
  5813. #ifndef REMOVE_PKT_LOG
  5814. /**
  5815. * dp_pkt_log_init() - API to initialize packet log
  5816. * @ppdev: physical device handle
  5817. * @scn: HIF context
  5818. *
  5819. * Return: none
  5820. */
  5821. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  5822. {
  5823. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  5824. if (handle->pkt_log_init) {
  5825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5826. "%s: Packet log not initialized", __func__);
  5827. return;
  5828. }
  5829. pktlog_sethandle(&handle->pl_dev, scn);
  5830. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  5831. if (pktlogmod_init(scn)) {
  5832. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5833. "%s: pktlogmod_init failed", __func__);
  5834. handle->pkt_log_init = false;
  5835. } else {
  5836. handle->pkt_log_init = true;
  5837. }
  5838. }
  5839. /**
  5840. * dp_pkt_log_con_service() - connect packet log service
  5841. * @ppdev: physical device handle
  5842. * @scn: device context
  5843. *
  5844. * Return: none
  5845. */
  5846. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  5847. {
  5848. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  5849. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  5850. pktlog_htc_attach();
  5851. }
  5852. /**
  5853. * dp_pktlogmod_exit() - API to cleanup pktlog info
  5854. * @handle: Pdev handle
  5855. *
  5856. * Return: none
  5857. */
  5858. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  5859. {
  5860. void *scn = (void *)handle->soc->hif_handle;
  5861. if (!scn) {
  5862. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5863. "%s: Invalid hif(scn) handle", __func__);
  5864. return;
  5865. }
  5866. pktlogmod_exit(scn);
  5867. handle->pkt_log_init = false;
  5868. }
  5869. #endif
  5870. #else
  5871. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  5872. #endif