
Add support for using system cache for SFE WMs and RMs in case of sHDR use-cases for power saving. Also add debugfs capability to control this feature. CRs-Fixed: 2841729 Change-Id: Ic4dad50e8c396705b33bb0bc8330d25e51ca79a2 Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
178 行
6.2 KiB
C
178 行
6.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_CPAS_SOC_H_
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#define _CAM_CPAS_SOC_H_
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#include <linux/soc/qcom/llcc-qcom.h>
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#include "cam_soc_util.h"
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#include "cam_cpas_hw.h"
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#define CAM_REGULATOR_LEVEL_MAX 16
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#define CAM_CPAS_MAX_TREE_NODES 56
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#define CAM_CPAS_MAX_FUSE_FEATURE 10
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/**
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* struct cam_cpas_vdd_ahb_mapping : Voltage to ahb level mapping
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*
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* @vdd_corner : Voltage corner value
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* @ahb_level : AHB vote level corresponds to this vdd_corner
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*
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*/
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struct cam_cpas_vdd_ahb_mapping {
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unsigned int vdd_corner;
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enum cam_vote_level ahb_level;
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};
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/**
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* struct cpas_tree_node: Generic cpas tree node for BW voting
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*
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* @cell_idx: Index to identify node from device tree and its parent
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* @level_idx: Index to identify at what level the node is present
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* @axi_port_idx: Index to identify which axi port to vote the consolidated bw
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* @camnoc_axi_port_idx: Index to find which axi port to vote consolidated bw
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* @path_data_type: Traffic type info from device tree (ife-vid, ife-disp etc)
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* @path_trans_type: Transaction type info from device tree (rd, wr)
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* @merge_type: Traffic merge type (calculation info) from device tree
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* @bus_width_factor: Factor for accounting bus width in CAMNOC bw calculation
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* @camnoc_bw: CAMNOC bw value at current node
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* @mnoc_ab_bw: MNOC AB bw value at current node
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* @mnoc_ib_bw: MNOC IB bw value at current node
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* @ddr_ab_bw: DDR AB bw value at current node
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* @ddr_ib_bw: DDR IB bw value at current node
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* @camnoc_max_needed: If node is needed for CAMNOC BW calculation then true
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* @constituent_paths: Constituent paths presence info from device tree
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* Ex: For CAM_CPAS_PATH_DATA_IFE_UBWC_STATS, index corresponding to
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* CAM_CPAS_PATH_DATA_IFE_VID, CAM_CPAS_PATH_DATA_IFE_DISP and
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* CAM_CPAS_PATH_DATA_IFE_STATS
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* @tree_dev_node: Device node from devicetree for current tree node
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* @parent_node: Pointer to node one or more level above the current level
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* (starting from end node of cpas client)
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*
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*/
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struct cam_cpas_tree_node {
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uint32_t cell_idx;
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int level_idx;
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int axi_port_idx;
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int camnoc_axi_port_idx;
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const char *node_name;
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uint32_t path_data_type;
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uint32_t path_trans_type;
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uint32_t merge_type;
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uint32_t bus_width_factor;
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uint64_t camnoc_bw;
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uint64_t mnoc_ab_bw;
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uint64_t mnoc_ib_bw;
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uint64_t ddr_ab_bw;
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uint64_t ddr_ib_bw;
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bool camnoc_max_needed;
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bool constituent_paths[CAM_CPAS_PATH_DATA_MAX];
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struct device_node *tree_dev_node;
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struct cam_cpas_tree_node *parent_node;
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};
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/**
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* struct cam_cpas_feature_info : CPAS fuse feature info
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* @feature: Identifier for feature
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* @type: Type of feature
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* @value: Fuse value
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* @enable: Feature enable or disable
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* @hw_map: Each bit position indicates if the hw_id for the feature
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*/
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struct cam_cpas_feature_info {
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uint32_t feature;
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uint32_t type;
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uint32_t value;
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bool enable;
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uint32_t hw_map;
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};
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/**
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* struct cam_sys_cache_info : Last level camera cache info
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*
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* @ref_cnt: Ref cnt activate/deactivate cache
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* @type: cache type small/large etc.
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* @uid: Client user ID
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* @size: Cache size
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* @scid: Slice ID
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* @slic_desc: Slice descriptor
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*/
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struct cam_sys_cache_info {
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uint32_t ref_cnt;
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enum cam_sys_cache_config_types type;
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uint32_t uid;
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size_t size;
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int32_t scid;
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const char *name;
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struct llcc_slice_desc *slic_desc;
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};
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/**
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* struct cam_cpas_private_soc : CPAS private DT info
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*
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* @arch_compat: ARCH compatible string
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* @client_id_based: Whether clients are id based
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* @bus_icc_based: Interconnect based bus interaction
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* @num_clients: Number of clients supported
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* @client_name: Client names
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* @tree_node: Array of pointers to all tree nodes required to calculate
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* axi bw, arranged with help of cell index in device tree
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* @camera_bus_node: Device tree node from cpas node
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* @level_node: Device tree node for each level in camera_bus_node
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* @num_vdd_ahb_mapping : Number of vdd to ahb level mapping supported
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* @vdd_ahb : AHB level mapping info for the supported vdd levels
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* @control_camnoc_axi_clk : Whether CPAS driver need to set camnoc axi clk freq
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* @camnoc_bus_width : CAMNOC Bus width
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* @camnoc_axi_clk_bw_margin : BW Margin in percentage to add while calculating
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* camnoc axi clock
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* @camnoc_axi_min_ib_bw: Min camnoc BW which varies based on target
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* @fuse_info: fuse information
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* @rpmh_info: RPMH BCM info
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* @num_feature_info: number of feature_info entries
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* @feature_info: Structure for storing feature information
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* @num_caches: Number of last level caches
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* @llcc_info: Cache info
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*/
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struct cam_cpas_private_soc {
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const char *arch_compat;
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bool client_id_based;
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bool bus_icc_based;
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uint32_t num_clients;
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const char *client_name[CAM_CPAS_MAX_CLIENTS];
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struct cam_cpas_tree_node *tree_node[CAM_CPAS_MAX_TREE_NODES];
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struct device_node *camera_bus_node;
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struct device_node *level_node[CAM_CPAS_MAX_TREE_LEVELS];
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uint32_t num_vdd_ahb_mapping;
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struct cam_cpas_vdd_ahb_mapping vdd_ahb[CAM_REGULATOR_LEVEL_MAX];
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bool control_camnoc_axi_clk;
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uint32_t camnoc_bus_width;
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uint32_t camnoc_axi_clk_bw_margin;
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uint64_t camnoc_axi_min_ib_bw;
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struct cam_cpas_fuse_info fuse_info;
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uint32_t rpmh_info[CAM_RPMH_BCM_INFO_MAX];
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uint32_t num_feature_info;
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struct cam_cpas_feature_info feature_info[CAM_CPAS_MAX_FUSE_FEATURE];
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uint32_t num_caches;
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struct cam_sys_cache_info *llcc_info;
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};
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void cam_cpas_util_debug_parse_data(struct cam_cpas_private_soc *soc_private);
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void cam_cpas_dump_axi_vote_info(
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const struct cam_cpas_client *cpas_client,
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const char *identifier,
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struct cam_axi_vote *axi_vote);
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int cam_cpas_node_tree_cleanup(struct cam_cpas *cpas_core,
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struct cam_cpas_private_soc *soc_private);
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int cam_cpas_soc_init_resources(struct cam_hw_soc_info *soc_info,
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irq_handler_t vfe_irq_handler, struct cam_hw_info *cpas_hw);
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int cam_cpas_soc_deinit_resources(struct cam_hw_soc_info *soc_info);
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int cam_cpas_soc_enable_resources(struct cam_hw_soc_info *soc_info,
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enum cam_vote_level default_level);
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int cam_cpas_soc_disable_resources(struct cam_hw_soc_info *soc_info,
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bool disable_clocks, bool disable_irq);
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int cam_cpas_soc_disable_irq(struct cam_hw_soc_info *soc_info);
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#endif /* _CAM_CPAS_SOC_H_ */
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